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Commit | Line | Data |
---|---|---|
d8f4a9ed TR |
1 | /* |
2 | * Copyright (C) 2012 Avionic Design GmbH | |
d43f81cb | 3 | * Copyright (C) 2012-2013 NVIDIA CORPORATION. All rights reserved. |
d8f4a9ed TR |
4 | * |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License version 2 as | |
7 | * published by the Free Software Foundation. | |
8 | */ | |
9 | ||
776dc384 TR |
10 | #include <linux/host1x.h> |
11 | ||
d8f4a9ed | 12 | #include "drm.h" |
de2ba664 | 13 | #include "gem.h" |
d8f4a9ed TR |
14 | |
15 | #define DRIVER_NAME "tegra" | |
16 | #define DRIVER_DESC "NVIDIA Tegra graphics" | |
17 | #define DRIVER_DATE "20120330" | |
18 | #define DRIVER_MAJOR 0 | |
19 | #define DRIVER_MINOR 0 | |
20 | #define DRIVER_PATCHLEVEL 0 | |
21 | ||
08943e6c TR |
22 | struct tegra_drm_file { |
23 | struct list_head contexts; | |
24 | }; | |
25 | ||
776dc384 | 26 | static int tegra_drm_load(struct drm_device *drm, unsigned long flags) |
692e6d7b | 27 | { |
776dc384 | 28 | struct host1x_device *device = to_host1x_device(drm->dev); |
386a2a71 | 29 | struct tegra_drm *tegra; |
692e6d7b TB |
30 | int err; |
31 | ||
776dc384 | 32 | tegra = kzalloc(sizeof(*tegra), GFP_KERNEL); |
386a2a71 | 33 | if (!tegra) |
692e6d7b TB |
34 | return -ENOMEM; |
35 | ||
776dc384 | 36 | dev_set_drvdata(drm->dev, tegra); |
386a2a71 TR |
37 | mutex_init(&tegra->clients_lock); |
38 | INIT_LIST_HEAD(&tegra->clients); | |
386a2a71 TR |
39 | drm->dev_private = tegra; |
40 | tegra->drm = drm; | |
d8f4a9ed TR |
41 | |
42 | drm_mode_config_init(drm); | |
43 | ||
776dc384 | 44 | err = host1x_device_init(device); |
d8f4a9ed TR |
45 | if (err < 0) |
46 | return err; | |
47 | ||
603f0cc9 TR |
48 | /* |
49 | * We don't use the drm_irq_install() helpers provided by the DRM | |
50 | * core, so we need to set this manually in order to allow the | |
51 | * DRM_IOCTL_WAIT_VBLANK to operate correctly. | |
52 | */ | |
4423843c | 53 | drm->irq_enabled = true; |
603f0cc9 | 54 | |
6e5ff998 TR |
55 | err = drm_vblank_init(drm, drm->mode_config.num_crtc); |
56 | if (err < 0) | |
57 | return err; | |
58 | ||
d8f4a9ed TR |
59 | err = tegra_drm_fb_init(drm); |
60 | if (err < 0) | |
61 | return err; | |
62 | ||
63 | drm_kms_helper_poll_init(drm); | |
64 | ||
65 | return 0; | |
66 | } | |
67 | ||
68 | static int tegra_drm_unload(struct drm_device *drm) | |
69 | { | |
776dc384 TR |
70 | struct host1x_device *device = to_host1x_device(drm->dev); |
71 | int err; | |
72 | ||
d8f4a9ed TR |
73 | drm_kms_helper_poll_fini(drm); |
74 | tegra_drm_fb_exit(drm); | |
f002abc1 TR |
75 | drm_vblank_cleanup(drm); |
76 | drm_mode_config_cleanup(drm); | |
d8f4a9ed | 77 | |
776dc384 TR |
78 | err = host1x_device_exit(device); |
79 | if (err < 0) | |
80 | return err; | |
81 | ||
d8f4a9ed TR |
82 | return 0; |
83 | } | |
84 | ||
85 | static int tegra_drm_open(struct drm_device *drm, struct drm_file *filp) | |
86 | { | |
08943e6c | 87 | struct tegra_drm_file *fpriv; |
d43f81cb TB |
88 | |
89 | fpriv = kzalloc(sizeof(*fpriv), GFP_KERNEL); | |
90 | if (!fpriv) | |
91 | return -ENOMEM; | |
92 | ||
93 | INIT_LIST_HEAD(&fpriv->contexts); | |
94 | filp->driver_priv = fpriv; | |
95 | ||
d8f4a9ed TR |
96 | return 0; |
97 | } | |
98 | ||
c88c3630 | 99 | static void tegra_drm_context_free(struct tegra_drm_context *context) |
d43f81cb TB |
100 | { |
101 | context->client->ops->close_channel(context); | |
102 | kfree(context); | |
103 | } | |
104 | ||
d8f4a9ed TR |
105 | static void tegra_drm_lastclose(struct drm_device *drm) |
106 | { | |
386a2a71 | 107 | struct tegra_drm *tegra = drm->dev_private; |
d8f4a9ed | 108 | |
386a2a71 | 109 | tegra_fbdev_restore_mode(tegra->fbdev); |
d8f4a9ed TR |
110 | } |
111 | ||
d43f81cb | 112 | #ifdef CONFIG_DRM_TEGRA_STAGING |
c88c3630 TR |
113 | static struct tegra_drm_context *tegra_drm_get_context(__u64 context) |
114 | { | |
115 | return (struct tegra_drm_context *)(uintptr_t)context; | |
116 | } | |
117 | ||
08943e6c | 118 | static bool tegra_drm_file_owns_context(struct tegra_drm_file *file, |
c88c3630 | 119 | struct tegra_drm_context *context) |
d43f81cb | 120 | { |
c88c3630 | 121 | struct tegra_drm_context *ctx; |
d43f81cb TB |
122 | |
123 | list_for_each_entry(ctx, &file->contexts, list) | |
124 | if (ctx == context) | |
125 | return true; | |
126 | ||
127 | return false; | |
128 | } | |
129 | ||
130 | static int tegra_gem_create(struct drm_device *drm, void *data, | |
131 | struct drm_file *file) | |
132 | { | |
133 | struct drm_tegra_gem_create *args = data; | |
134 | struct tegra_bo *bo; | |
135 | ||
136 | bo = tegra_bo_create_with_handle(file, drm, args->size, | |
137 | &args->handle); | |
138 | if (IS_ERR(bo)) | |
139 | return PTR_ERR(bo); | |
140 | ||
141 | return 0; | |
142 | } | |
143 | ||
144 | static int tegra_gem_mmap(struct drm_device *drm, void *data, | |
145 | struct drm_file *file) | |
146 | { | |
147 | struct drm_tegra_gem_mmap *args = data; | |
148 | struct drm_gem_object *gem; | |
149 | struct tegra_bo *bo; | |
150 | ||
151 | gem = drm_gem_object_lookup(drm, file, args->handle); | |
152 | if (!gem) | |
153 | return -EINVAL; | |
154 | ||
155 | bo = to_tegra_bo(gem); | |
156 | ||
2bc7b0ca | 157 | args->offset = drm_vma_node_offset_addr(&bo->gem.vma_node); |
d43f81cb TB |
158 | |
159 | drm_gem_object_unreference(gem); | |
160 | ||
161 | return 0; | |
162 | } | |
163 | ||
164 | static int tegra_syncpt_read(struct drm_device *drm, void *data, | |
165 | struct drm_file *file) | |
166 | { | |
776dc384 | 167 | struct host1x *host = dev_get_drvdata(drm->dev->parent); |
d43f81cb | 168 | struct drm_tegra_syncpt_read *args = data; |
776dc384 | 169 | struct host1x_syncpt *sp; |
d43f81cb | 170 | |
776dc384 | 171 | sp = host1x_syncpt_get(host, args->id); |
d43f81cb TB |
172 | if (!sp) |
173 | return -EINVAL; | |
174 | ||
175 | args->value = host1x_syncpt_read_min(sp); | |
176 | return 0; | |
177 | } | |
178 | ||
179 | static int tegra_syncpt_incr(struct drm_device *drm, void *data, | |
180 | struct drm_file *file) | |
181 | { | |
776dc384 | 182 | struct host1x *host1x = dev_get_drvdata(drm->dev->parent); |
d43f81cb | 183 | struct drm_tegra_syncpt_incr *args = data; |
776dc384 | 184 | struct host1x_syncpt *sp; |
d43f81cb | 185 | |
776dc384 | 186 | sp = host1x_syncpt_get(host1x, args->id); |
d43f81cb TB |
187 | if (!sp) |
188 | return -EINVAL; | |
189 | ||
ebae30b1 | 190 | return host1x_syncpt_incr(sp); |
d43f81cb TB |
191 | } |
192 | ||
193 | static int tegra_syncpt_wait(struct drm_device *drm, void *data, | |
194 | struct drm_file *file) | |
195 | { | |
776dc384 | 196 | struct host1x *host1x = dev_get_drvdata(drm->dev->parent); |
d43f81cb | 197 | struct drm_tegra_syncpt_wait *args = data; |
776dc384 | 198 | struct host1x_syncpt *sp; |
d43f81cb | 199 | |
776dc384 | 200 | sp = host1x_syncpt_get(host1x, args->id); |
d43f81cb TB |
201 | if (!sp) |
202 | return -EINVAL; | |
203 | ||
204 | return host1x_syncpt_wait(sp, args->thresh, args->timeout, | |
205 | &args->value); | |
206 | } | |
207 | ||
208 | static int tegra_open_channel(struct drm_device *drm, void *data, | |
209 | struct drm_file *file) | |
210 | { | |
08943e6c | 211 | struct tegra_drm_file *fpriv = file->driver_priv; |
386a2a71 | 212 | struct tegra_drm *tegra = drm->dev_private; |
d43f81cb | 213 | struct drm_tegra_open_channel *args = data; |
c88c3630 | 214 | struct tegra_drm_context *context; |
53fa7f72 | 215 | struct tegra_drm_client *client; |
d43f81cb TB |
216 | int err = -ENODEV; |
217 | ||
218 | context = kzalloc(sizeof(*context), GFP_KERNEL); | |
219 | if (!context) | |
220 | return -ENOMEM; | |
221 | ||
776dc384 | 222 | list_for_each_entry(client, &tegra->clients, list) |
53fa7f72 | 223 | if (client->base.class == args->client) { |
d43f81cb TB |
224 | err = client->ops->open_channel(client, context); |
225 | if (err) | |
226 | break; | |
227 | ||
d43f81cb TB |
228 | list_add(&context->list, &fpriv->contexts); |
229 | args->context = (uintptr_t)context; | |
53fa7f72 | 230 | context->client = client; |
d43f81cb TB |
231 | return 0; |
232 | } | |
233 | ||
234 | kfree(context); | |
235 | return err; | |
236 | } | |
237 | ||
238 | static int tegra_close_channel(struct drm_device *drm, void *data, | |
239 | struct drm_file *file) | |
240 | { | |
08943e6c | 241 | struct tegra_drm_file *fpriv = file->driver_priv; |
776dc384 | 242 | struct drm_tegra_close_channel *args = data; |
c88c3630 TR |
243 | struct tegra_drm_context *context; |
244 | ||
245 | context = tegra_drm_get_context(args->context); | |
d43f81cb | 246 | |
08943e6c | 247 | if (!tegra_drm_file_owns_context(fpriv, context)) |
d43f81cb TB |
248 | return -EINVAL; |
249 | ||
250 | list_del(&context->list); | |
c88c3630 | 251 | tegra_drm_context_free(context); |
d43f81cb TB |
252 | |
253 | return 0; | |
254 | } | |
255 | ||
256 | static int tegra_get_syncpt(struct drm_device *drm, void *data, | |
257 | struct drm_file *file) | |
258 | { | |
08943e6c | 259 | struct tegra_drm_file *fpriv = file->driver_priv; |
d43f81cb | 260 | struct drm_tegra_get_syncpt *args = data; |
c88c3630 | 261 | struct tegra_drm_context *context; |
d43f81cb TB |
262 | struct host1x_syncpt *syncpt; |
263 | ||
c88c3630 TR |
264 | context = tegra_drm_get_context(args->context); |
265 | ||
08943e6c | 266 | if (!tegra_drm_file_owns_context(fpriv, context)) |
d43f81cb TB |
267 | return -ENODEV; |
268 | ||
53fa7f72 | 269 | if (args->index >= context->client->base.num_syncpts) |
d43f81cb TB |
270 | return -EINVAL; |
271 | ||
53fa7f72 | 272 | syncpt = context->client->base.syncpts[args->index]; |
d43f81cb TB |
273 | args->id = host1x_syncpt_id(syncpt); |
274 | ||
275 | return 0; | |
276 | } | |
277 | ||
278 | static int tegra_submit(struct drm_device *drm, void *data, | |
279 | struct drm_file *file) | |
280 | { | |
08943e6c | 281 | struct tegra_drm_file *fpriv = file->driver_priv; |
d43f81cb | 282 | struct drm_tegra_submit *args = data; |
c88c3630 TR |
283 | struct tegra_drm_context *context; |
284 | ||
285 | context = tegra_drm_get_context(args->context); | |
d43f81cb | 286 | |
08943e6c | 287 | if (!tegra_drm_file_owns_context(fpriv, context)) |
d43f81cb TB |
288 | return -ENODEV; |
289 | ||
290 | return context->client->ops->submit(context, args, drm, file); | |
291 | } | |
292 | #endif | |
293 | ||
baa70943 | 294 | static const struct drm_ioctl_desc tegra_drm_ioctls[] = { |
d43f81cb TB |
295 | #ifdef CONFIG_DRM_TEGRA_STAGING |
296 | DRM_IOCTL_DEF_DRV(TEGRA_GEM_CREATE, tegra_gem_create, DRM_UNLOCKED | DRM_AUTH), | |
297 | DRM_IOCTL_DEF_DRV(TEGRA_GEM_MMAP, tegra_gem_mmap, DRM_UNLOCKED), | |
298 | DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_READ, tegra_syncpt_read, DRM_UNLOCKED), | |
299 | DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_INCR, tegra_syncpt_incr, DRM_UNLOCKED), | |
300 | DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_WAIT, tegra_syncpt_wait, DRM_UNLOCKED), | |
301 | DRM_IOCTL_DEF_DRV(TEGRA_OPEN_CHANNEL, tegra_open_channel, DRM_UNLOCKED), | |
302 | DRM_IOCTL_DEF_DRV(TEGRA_CLOSE_CHANNEL, tegra_close_channel, DRM_UNLOCKED), | |
303 | DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT, tegra_get_syncpt, DRM_UNLOCKED), | |
304 | DRM_IOCTL_DEF_DRV(TEGRA_SUBMIT, tegra_submit, DRM_UNLOCKED), | |
305 | #endif | |
d8f4a9ed TR |
306 | }; |
307 | ||
308 | static const struct file_operations tegra_drm_fops = { | |
309 | .owner = THIS_MODULE, | |
310 | .open = drm_open, | |
311 | .release = drm_release, | |
312 | .unlocked_ioctl = drm_ioctl, | |
de2ba664 | 313 | .mmap = tegra_drm_mmap, |
d8f4a9ed | 314 | .poll = drm_poll, |
d8f4a9ed TR |
315 | .read = drm_read, |
316 | #ifdef CONFIG_COMPAT | |
317 | .compat_ioctl = drm_compat_ioctl, | |
318 | #endif | |
319 | .llseek = noop_llseek, | |
320 | }; | |
321 | ||
6e5ff998 TR |
322 | static struct drm_crtc *tegra_crtc_from_pipe(struct drm_device *drm, int pipe) |
323 | { | |
324 | struct drm_crtc *crtc; | |
325 | ||
326 | list_for_each_entry(crtc, &drm->mode_config.crtc_list, head) { | |
327 | struct tegra_dc *dc = to_tegra_dc(crtc); | |
328 | ||
329 | if (dc->pipe == pipe) | |
330 | return crtc; | |
331 | } | |
332 | ||
333 | return NULL; | |
334 | } | |
335 | ||
336 | static u32 tegra_drm_get_vblank_counter(struct drm_device *dev, int crtc) | |
337 | { | |
338 | /* TODO: implement real hardware counter using syncpoints */ | |
339 | return drm_vblank_count(dev, crtc); | |
340 | } | |
341 | ||
342 | static int tegra_drm_enable_vblank(struct drm_device *drm, int pipe) | |
343 | { | |
344 | struct drm_crtc *crtc = tegra_crtc_from_pipe(drm, pipe); | |
345 | struct tegra_dc *dc = to_tegra_dc(crtc); | |
346 | ||
347 | if (!crtc) | |
348 | return -ENODEV; | |
349 | ||
350 | tegra_dc_enable_vblank(dc); | |
351 | ||
352 | return 0; | |
353 | } | |
354 | ||
355 | static void tegra_drm_disable_vblank(struct drm_device *drm, int pipe) | |
356 | { | |
357 | struct drm_crtc *crtc = tegra_crtc_from_pipe(drm, pipe); | |
358 | struct tegra_dc *dc = to_tegra_dc(crtc); | |
359 | ||
360 | if (crtc) | |
361 | tegra_dc_disable_vblank(dc); | |
362 | } | |
363 | ||
3c03c46a TR |
364 | static void tegra_drm_preclose(struct drm_device *drm, struct drm_file *file) |
365 | { | |
08943e6c | 366 | struct tegra_drm_file *fpriv = file->driver_priv; |
c88c3630 | 367 | struct tegra_drm_context *context, *tmp; |
3c03c46a TR |
368 | struct drm_crtc *crtc; |
369 | ||
370 | list_for_each_entry(crtc, &drm->mode_config.crtc_list, head) | |
371 | tegra_dc_cancel_page_flip(crtc, file); | |
d43f81cb TB |
372 | |
373 | list_for_each_entry_safe(context, tmp, &fpriv->contexts, list) | |
c88c3630 | 374 | tegra_drm_context_free(context); |
d43f81cb TB |
375 | |
376 | kfree(fpriv); | |
3c03c46a TR |
377 | } |
378 | ||
e450fcc6 TR |
379 | #ifdef CONFIG_DEBUG_FS |
380 | static int tegra_debugfs_framebuffers(struct seq_file *s, void *data) | |
381 | { | |
382 | struct drm_info_node *node = (struct drm_info_node *)s->private; | |
383 | struct drm_device *drm = node->minor->dev; | |
384 | struct drm_framebuffer *fb; | |
385 | ||
386 | mutex_lock(&drm->mode_config.fb_lock); | |
387 | ||
388 | list_for_each_entry(fb, &drm->mode_config.fb_list, head) { | |
389 | seq_printf(s, "%3d: user size: %d x %d, depth %d, %d bpp, refcount %d\n", | |
390 | fb->base.id, fb->width, fb->height, fb->depth, | |
391 | fb->bits_per_pixel, | |
392 | atomic_read(&fb->refcount.refcount)); | |
393 | } | |
394 | ||
395 | mutex_unlock(&drm->mode_config.fb_lock); | |
396 | ||
397 | return 0; | |
398 | } | |
399 | ||
400 | static struct drm_info_list tegra_debugfs_list[] = { | |
401 | { "framebuffers", tegra_debugfs_framebuffers, 0 }, | |
402 | }; | |
403 | ||
404 | static int tegra_debugfs_init(struct drm_minor *minor) | |
405 | { | |
406 | return drm_debugfs_create_files(tegra_debugfs_list, | |
407 | ARRAY_SIZE(tegra_debugfs_list), | |
408 | minor->debugfs_root, minor); | |
409 | } | |
410 | ||
411 | static void tegra_debugfs_cleanup(struct drm_minor *minor) | |
412 | { | |
413 | drm_debugfs_remove_files(tegra_debugfs_list, | |
414 | ARRAY_SIZE(tegra_debugfs_list), minor); | |
415 | } | |
416 | #endif | |
417 | ||
d8f4a9ed | 418 | struct drm_driver tegra_drm_driver = { |
604faa7d | 419 | .driver_features = DRIVER_MODESET | DRIVER_GEM, |
d8f4a9ed TR |
420 | .load = tegra_drm_load, |
421 | .unload = tegra_drm_unload, | |
422 | .open = tegra_drm_open, | |
3c03c46a | 423 | .preclose = tegra_drm_preclose, |
d8f4a9ed TR |
424 | .lastclose = tegra_drm_lastclose, |
425 | ||
6e5ff998 TR |
426 | .get_vblank_counter = tegra_drm_get_vblank_counter, |
427 | .enable_vblank = tegra_drm_enable_vblank, | |
428 | .disable_vblank = tegra_drm_disable_vblank, | |
429 | ||
e450fcc6 TR |
430 | #if defined(CONFIG_DEBUG_FS) |
431 | .debugfs_init = tegra_debugfs_init, | |
432 | .debugfs_cleanup = tegra_debugfs_cleanup, | |
433 | #endif | |
434 | ||
de2ba664 AM |
435 | .gem_free_object = tegra_bo_free_object, |
436 | .gem_vm_ops = &tegra_bo_vm_ops, | |
437 | .dumb_create = tegra_bo_dumb_create, | |
438 | .dumb_map_offset = tegra_bo_dumb_map_offset, | |
43387b37 | 439 | .dumb_destroy = drm_gem_dumb_destroy, |
d8f4a9ed TR |
440 | |
441 | .ioctls = tegra_drm_ioctls, | |
442 | .num_ioctls = ARRAY_SIZE(tegra_drm_ioctls), | |
443 | .fops = &tegra_drm_fops, | |
444 | ||
445 | .name = DRIVER_NAME, | |
446 | .desc = DRIVER_DESC, | |
447 | .date = DRIVER_DATE, | |
448 | .major = DRIVER_MAJOR, | |
449 | .minor = DRIVER_MINOR, | |
450 | .patchlevel = DRIVER_PATCHLEVEL, | |
451 | }; | |
776dc384 TR |
452 | |
453 | int tegra_drm_register_client(struct tegra_drm *tegra, | |
454 | struct tegra_drm_client *client) | |
455 | { | |
456 | mutex_lock(&tegra->clients_lock); | |
457 | list_add_tail(&client->list, &tegra->clients); | |
458 | mutex_unlock(&tegra->clients_lock); | |
459 | ||
460 | return 0; | |
461 | } | |
462 | ||
463 | int tegra_drm_unregister_client(struct tegra_drm *tegra, | |
464 | struct tegra_drm_client *client) | |
465 | { | |
466 | mutex_lock(&tegra->clients_lock); | |
467 | list_del_init(&client->list); | |
468 | mutex_unlock(&tegra->clients_lock); | |
469 | ||
470 | return 0; | |
471 | } | |
472 | ||
473 | static int host1x_drm_probe(struct host1x_device *device) | |
474 | { | |
475 | return drm_host1x_init(&tegra_drm_driver, device); | |
476 | } | |
477 | ||
478 | static int host1x_drm_remove(struct host1x_device *device) | |
479 | { | |
480 | drm_host1x_exit(&tegra_drm_driver, device); | |
481 | ||
482 | return 0; | |
483 | } | |
484 | ||
485 | static const struct of_device_id host1x_drm_subdevs[] = { | |
486 | { .compatible = "nvidia,tegra20-dc", }, | |
487 | { .compatible = "nvidia,tegra20-hdmi", }, | |
488 | { .compatible = "nvidia,tegra20-gr2d", }, | |
489 | { .compatible = "nvidia,tegra30-dc", }, | |
490 | { .compatible = "nvidia,tegra30-hdmi", }, | |
491 | { .compatible = "nvidia,tegra30-gr2d", }, | |
492 | { /* sentinel */ } | |
493 | }; | |
494 | ||
495 | static struct host1x_driver host1x_drm_driver = { | |
496 | .name = "drm", | |
497 | .probe = host1x_drm_probe, | |
498 | .remove = host1x_drm_remove, | |
499 | .subdevs = host1x_drm_subdevs, | |
500 | }; | |
501 | ||
502 | static int __init host1x_drm_init(void) | |
503 | { | |
504 | int err; | |
505 | ||
506 | err = host1x_driver_register(&host1x_drm_driver); | |
507 | if (err < 0) | |
508 | return err; | |
509 | ||
510 | err = platform_driver_register(&tegra_dc_driver); | |
511 | if (err < 0) | |
512 | goto unregister_host1x; | |
513 | ||
514 | err = platform_driver_register(&tegra_hdmi_driver); | |
515 | if (err < 0) | |
516 | goto unregister_dc; | |
517 | ||
518 | err = platform_driver_register(&tegra_gr2d_driver); | |
519 | if (err < 0) | |
520 | goto unregister_hdmi; | |
521 | ||
522 | return 0; | |
523 | ||
524 | unregister_hdmi: | |
525 | platform_driver_unregister(&tegra_hdmi_driver); | |
526 | unregister_dc: | |
527 | platform_driver_unregister(&tegra_dc_driver); | |
528 | unregister_host1x: | |
529 | host1x_driver_unregister(&host1x_drm_driver); | |
530 | return err; | |
531 | } | |
532 | module_init(host1x_drm_init); | |
533 | ||
534 | static void __exit host1x_drm_exit(void) | |
535 | { | |
536 | platform_driver_unregister(&tegra_gr2d_driver); | |
537 | platform_driver_unregister(&tegra_hdmi_driver); | |
538 | platform_driver_unregister(&tegra_dc_driver); | |
539 | host1x_driver_unregister(&host1x_drm_driver); | |
540 | } | |
541 | module_exit(host1x_drm_exit); | |
542 | ||
543 | MODULE_AUTHOR("Thierry Reding <thierry.reding@avionic-design.de>"); | |
544 | MODULE_DESCRIPTION("NVIDIA Tegra DRM driver"); | |
545 | MODULE_LICENSE("GPL v2"); |