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Commit | Line | Data |
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d8f4a9ed TR |
1 | /* |
2 | * Copyright (C) 2012 Avionic Design GmbH | |
d43f81cb | 3 | * Copyright (C) 2012-2013 NVIDIA CORPORATION. All rights reserved. |
d8f4a9ed TR |
4 | * |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License version 2 as | |
7 | * published by the Free Software Foundation. | |
8 | */ | |
9 | ||
776dc384 TR |
10 | #include <linux/host1x.h> |
11 | ||
d8f4a9ed | 12 | #include "drm.h" |
de2ba664 | 13 | #include "gem.h" |
d8f4a9ed TR |
14 | |
15 | #define DRIVER_NAME "tegra" | |
16 | #define DRIVER_DESC "NVIDIA Tegra graphics" | |
17 | #define DRIVER_DATE "20120330" | |
18 | #define DRIVER_MAJOR 0 | |
19 | #define DRIVER_MINOR 0 | |
20 | #define DRIVER_PATCHLEVEL 0 | |
21 | ||
08943e6c TR |
22 | struct tegra_drm_file { |
23 | struct list_head contexts; | |
24 | }; | |
25 | ||
776dc384 | 26 | static int tegra_drm_load(struct drm_device *drm, unsigned long flags) |
692e6d7b | 27 | { |
776dc384 | 28 | struct host1x_device *device = to_host1x_device(drm->dev); |
386a2a71 | 29 | struct tegra_drm *tegra; |
692e6d7b TB |
30 | int err; |
31 | ||
776dc384 | 32 | tegra = kzalloc(sizeof(*tegra), GFP_KERNEL); |
386a2a71 | 33 | if (!tegra) |
692e6d7b TB |
34 | return -ENOMEM; |
35 | ||
386a2a71 TR |
36 | mutex_init(&tegra->clients_lock); |
37 | INIT_LIST_HEAD(&tegra->clients); | |
386a2a71 TR |
38 | drm->dev_private = tegra; |
39 | tegra->drm = drm; | |
d8f4a9ed TR |
40 | |
41 | drm_mode_config_init(drm); | |
42 | ||
e2215321 TR |
43 | err = tegra_drm_fb_prepare(drm); |
44 | if (err < 0) | |
45 | return err; | |
46 | ||
47 | drm_kms_helper_poll_init(drm); | |
48 | ||
776dc384 | 49 | err = host1x_device_init(device); |
d8f4a9ed TR |
50 | if (err < 0) |
51 | return err; | |
52 | ||
603f0cc9 TR |
53 | /* |
54 | * We don't use the drm_irq_install() helpers provided by the DRM | |
55 | * core, so we need to set this manually in order to allow the | |
56 | * DRM_IOCTL_WAIT_VBLANK to operate correctly. | |
57 | */ | |
4423843c | 58 | drm->irq_enabled = true; |
603f0cc9 | 59 | |
6e5ff998 TR |
60 | err = drm_vblank_init(drm, drm->mode_config.num_crtc); |
61 | if (err < 0) | |
62 | return err; | |
63 | ||
d8f4a9ed TR |
64 | err = tegra_drm_fb_init(drm); |
65 | if (err < 0) | |
66 | return err; | |
67 | ||
d8f4a9ed TR |
68 | return 0; |
69 | } | |
70 | ||
71 | static int tegra_drm_unload(struct drm_device *drm) | |
72 | { | |
776dc384 TR |
73 | struct host1x_device *device = to_host1x_device(drm->dev); |
74 | int err; | |
75 | ||
d8f4a9ed TR |
76 | drm_kms_helper_poll_fini(drm); |
77 | tegra_drm_fb_exit(drm); | |
f002abc1 TR |
78 | drm_vblank_cleanup(drm); |
79 | drm_mode_config_cleanup(drm); | |
d8f4a9ed | 80 | |
776dc384 TR |
81 | err = host1x_device_exit(device); |
82 | if (err < 0) | |
83 | return err; | |
84 | ||
d8f4a9ed TR |
85 | return 0; |
86 | } | |
87 | ||
88 | static int tegra_drm_open(struct drm_device *drm, struct drm_file *filp) | |
89 | { | |
08943e6c | 90 | struct tegra_drm_file *fpriv; |
d43f81cb TB |
91 | |
92 | fpriv = kzalloc(sizeof(*fpriv), GFP_KERNEL); | |
93 | if (!fpriv) | |
94 | return -ENOMEM; | |
95 | ||
96 | INIT_LIST_HEAD(&fpriv->contexts); | |
97 | filp->driver_priv = fpriv; | |
98 | ||
d8f4a9ed TR |
99 | return 0; |
100 | } | |
101 | ||
c88c3630 | 102 | static void tegra_drm_context_free(struct tegra_drm_context *context) |
d43f81cb TB |
103 | { |
104 | context->client->ops->close_channel(context); | |
105 | kfree(context); | |
106 | } | |
107 | ||
d8f4a9ed TR |
108 | static void tegra_drm_lastclose(struct drm_device *drm) |
109 | { | |
6e60163b | 110 | #ifdef CONFIG_DRM_TEGRA_FBDEV |
386a2a71 | 111 | struct tegra_drm *tegra = drm->dev_private; |
d8f4a9ed | 112 | |
386a2a71 | 113 | tegra_fbdev_restore_mode(tegra->fbdev); |
60c2f709 | 114 | #endif |
d8f4a9ed TR |
115 | } |
116 | ||
c40f0f1a TR |
117 | static struct host1x_bo * |
118 | host1x_bo_lookup(struct drm_device *drm, struct drm_file *file, u32 handle) | |
119 | { | |
120 | struct drm_gem_object *gem; | |
121 | struct tegra_bo *bo; | |
122 | ||
123 | gem = drm_gem_object_lookup(drm, file, handle); | |
124 | if (!gem) | |
125 | return NULL; | |
126 | ||
127 | mutex_lock(&drm->struct_mutex); | |
128 | drm_gem_object_unreference(gem); | |
129 | mutex_unlock(&drm->struct_mutex); | |
130 | ||
131 | bo = to_tegra_bo(gem); | |
132 | return &bo->base; | |
133 | } | |
134 | ||
135 | int tegra_drm_submit(struct tegra_drm_context *context, | |
136 | struct drm_tegra_submit *args, struct drm_device *drm, | |
137 | struct drm_file *file) | |
138 | { | |
139 | unsigned int num_cmdbufs = args->num_cmdbufs; | |
140 | unsigned int num_relocs = args->num_relocs; | |
141 | unsigned int num_waitchks = args->num_waitchks; | |
142 | struct drm_tegra_cmdbuf __user *cmdbufs = | |
a7ed68fc | 143 | (void __user *)(uintptr_t)args->cmdbufs; |
c40f0f1a | 144 | struct drm_tegra_reloc __user *relocs = |
a7ed68fc | 145 | (void __user *)(uintptr_t)args->relocs; |
c40f0f1a | 146 | struct drm_tegra_waitchk __user *waitchks = |
a7ed68fc | 147 | (void __user *)(uintptr_t)args->waitchks; |
c40f0f1a TR |
148 | struct drm_tegra_syncpt syncpt; |
149 | struct host1x_job *job; | |
150 | int err; | |
151 | ||
152 | /* We don't yet support other than one syncpt_incr struct per submit */ | |
153 | if (args->num_syncpts != 1) | |
154 | return -EINVAL; | |
155 | ||
156 | job = host1x_job_alloc(context->channel, args->num_cmdbufs, | |
157 | args->num_relocs, args->num_waitchks); | |
158 | if (!job) | |
159 | return -ENOMEM; | |
160 | ||
161 | job->num_relocs = args->num_relocs; | |
162 | job->num_waitchk = args->num_waitchks; | |
163 | job->client = (u32)args->context; | |
164 | job->class = context->client->base.class; | |
165 | job->serialize = true; | |
166 | ||
167 | while (num_cmdbufs) { | |
168 | struct drm_tegra_cmdbuf cmdbuf; | |
169 | struct host1x_bo *bo; | |
170 | ||
9a991600 DC |
171 | if (copy_from_user(&cmdbuf, cmdbufs, sizeof(cmdbuf))) { |
172 | err = -EFAULT; | |
c40f0f1a | 173 | goto fail; |
9a991600 | 174 | } |
c40f0f1a TR |
175 | |
176 | bo = host1x_bo_lookup(drm, file, cmdbuf.handle); | |
177 | if (!bo) { | |
178 | err = -ENOENT; | |
179 | goto fail; | |
180 | } | |
181 | ||
182 | host1x_job_add_gather(job, bo, cmdbuf.words, cmdbuf.offset); | |
183 | num_cmdbufs--; | |
184 | cmdbufs++; | |
185 | } | |
186 | ||
9a991600 DC |
187 | if (copy_from_user(job->relocarray, relocs, |
188 | sizeof(*relocs) * num_relocs)) { | |
189 | err = -EFAULT; | |
c40f0f1a | 190 | goto fail; |
9a991600 | 191 | } |
c40f0f1a TR |
192 | |
193 | while (num_relocs--) { | |
194 | struct host1x_reloc *reloc = &job->relocarray[num_relocs]; | |
195 | struct host1x_bo *cmdbuf, *target; | |
196 | ||
197 | cmdbuf = host1x_bo_lookup(drm, file, (u32)reloc->cmdbuf); | |
198 | target = host1x_bo_lookup(drm, file, (u32)reloc->target); | |
199 | ||
200 | reloc->cmdbuf = cmdbuf; | |
201 | reloc->target = target; | |
202 | ||
203 | if (!reloc->target || !reloc->cmdbuf) { | |
204 | err = -ENOENT; | |
205 | goto fail; | |
206 | } | |
207 | } | |
208 | ||
9a991600 DC |
209 | if (copy_from_user(job->waitchk, waitchks, |
210 | sizeof(*waitchks) * num_waitchks)) { | |
211 | err = -EFAULT; | |
c40f0f1a | 212 | goto fail; |
9a991600 | 213 | } |
c40f0f1a | 214 | |
9a991600 DC |
215 | if (copy_from_user(&syncpt, (void __user *)(uintptr_t)args->syncpts, |
216 | sizeof(syncpt))) { | |
217 | err = -EFAULT; | |
c40f0f1a | 218 | goto fail; |
9a991600 | 219 | } |
c40f0f1a TR |
220 | |
221 | job->is_addr_reg = context->client->ops->is_addr_reg; | |
222 | job->syncpt_incrs = syncpt.incrs; | |
223 | job->syncpt_id = syncpt.id; | |
224 | job->timeout = 10000; | |
225 | ||
226 | if (args->timeout && args->timeout < 10000) | |
227 | job->timeout = args->timeout; | |
228 | ||
229 | err = host1x_job_pin(job, context->client->base.dev); | |
230 | if (err) | |
231 | goto fail; | |
232 | ||
233 | err = host1x_job_submit(job); | |
234 | if (err) | |
235 | goto fail_submit; | |
236 | ||
237 | args->fence = job->syncpt_end; | |
238 | ||
239 | host1x_job_put(job); | |
240 | return 0; | |
241 | ||
242 | fail_submit: | |
243 | host1x_job_unpin(job); | |
244 | fail: | |
245 | host1x_job_put(job); | |
246 | return err; | |
247 | } | |
248 | ||
249 | ||
d43f81cb | 250 | #ifdef CONFIG_DRM_TEGRA_STAGING |
c88c3630 TR |
251 | static struct tegra_drm_context *tegra_drm_get_context(__u64 context) |
252 | { | |
253 | return (struct tegra_drm_context *)(uintptr_t)context; | |
254 | } | |
255 | ||
08943e6c | 256 | static bool tegra_drm_file_owns_context(struct tegra_drm_file *file, |
c88c3630 | 257 | struct tegra_drm_context *context) |
d43f81cb | 258 | { |
c88c3630 | 259 | struct tegra_drm_context *ctx; |
d43f81cb TB |
260 | |
261 | list_for_each_entry(ctx, &file->contexts, list) | |
262 | if (ctx == context) | |
263 | return true; | |
264 | ||
265 | return false; | |
266 | } | |
267 | ||
268 | static int tegra_gem_create(struct drm_device *drm, void *data, | |
269 | struct drm_file *file) | |
270 | { | |
271 | struct drm_tegra_gem_create *args = data; | |
272 | struct tegra_bo *bo; | |
273 | ||
773af77f | 274 | bo = tegra_bo_create_with_handle(file, drm, args->size, args->flags, |
d43f81cb TB |
275 | &args->handle); |
276 | if (IS_ERR(bo)) | |
277 | return PTR_ERR(bo); | |
278 | ||
279 | return 0; | |
280 | } | |
281 | ||
282 | static int tegra_gem_mmap(struct drm_device *drm, void *data, | |
283 | struct drm_file *file) | |
284 | { | |
285 | struct drm_tegra_gem_mmap *args = data; | |
286 | struct drm_gem_object *gem; | |
287 | struct tegra_bo *bo; | |
288 | ||
289 | gem = drm_gem_object_lookup(drm, file, args->handle); | |
290 | if (!gem) | |
291 | return -EINVAL; | |
292 | ||
293 | bo = to_tegra_bo(gem); | |
294 | ||
2bc7b0ca | 295 | args->offset = drm_vma_node_offset_addr(&bo->gem.vma_node); |
d43f81cb TB |
296 | |
297 | drm_gem_object_unreference(gem); | |
298 | ||
299 | return 0; | |
300 | } | |
301 | ||
302 | static int tegra_syncpt_read(struct drm_device *drm, void *data, | |
303 | struct drm_file *file) | |
304 | { | |
776dc384 | 305 | struct host1x *host = dev_get_drvdata(drm->dev->parent); |
d43f81cb | 306 | struct drm_tegra_syncpt_read *args = data; |
776dc384 | 307 | struct host1x_syncpt *sp; |
d43f81cb | 308 | |
776dc384 | 309 | sp = host1x_syncpt_get(host, args->id); |
d43f81cb TB |
310 | if (!sp) |
311 | return -EINVAL; | |
312 | ||
313 | args->value = host1x_syncpt_read_min(sp); | |
314 | return 0; | |
315 | } | |
316 | ||
317 | static int tegra_syncpt_incr(struct drm_device *drm, void *data, | |
318 | struct drm_file *file) | |
319 | { | |
776dc384 | 320 | struct host1x *host1x = dev_get_drvdata(drm->dev->parent); |
d43f81cb | 321 | struct drm_tegra_syncpt_incr *args = data; |
776dc384 | 322 | struct host1x_syncpt *sp; |
d43f81cb | 323 | |
776dc384 | 324 | sp = host1x_syncpt_get(host1x, args->id); |
d43f81cb TB |
325 | if (!sp) |
326 | return -EINVAL; | |
327 | ||
ebae30b1 | 328 | return host1x_syncpt_incr(sp); |
d43f81cb TB |
329 | } |
330 | ||
331 | static int tegra_syncpt_wait(struct drm_device *drm, void *data, | |
332 | struct drm_file *file) | |
333 | { | |
776dc384 | 334 | struct host1x *host1x = dev_get_drvdata(drm->dev->parent); |
d43f81cb | 335 | struct drm_tegra_syncpt_wait *args = data; |
776dc384 | 336 | struct host1x_syncpt *sp; |
d43f81cb | 337 | |
776dc384 | 338 | sp = host1x_syncpt_get(host1x, args->id); |
d43f81cb TB |
339 | if (!sp) |
340 | return -EINVAL; | |
341 | ||
342 | return host1x_syncpt_wait(sp, args->thresh, args->timeout, | |
343 | &args->value); | |
344 | } | |
345 | ||
346 | static int tegra_open_channel(struct drm_device *drm, void *data, | |
347 | struct drm_file *file) | |
348 | { | |
08943e6c | 349 | struct tegra_drm_file *fpriv = file->driver_priv; |
386a2a71 | 350 | struct tegra_drm *tegra = drm->dev_private; |
d43f81cb | 351 | struct drm_tegra_open_channel *args = data; |
c88c3630 | 352 | struct tegra_drm_context *context; |
53fa7f72 | 353 | struct tegra_drm_client *client; |
d43f81cb TB |
354 | int err = -ENODEV; |
355 | ||
356 | context = kzalloc(sizeof(*context), GFP_KERNEL); | |
357 | if (!context) | |
358 | return -ENOMEM; | |
359 | ||
776dc384 | 360 | list_for_each_entry(client, &tegra->clients, list) |
53fa7f72 | 361 | if (client->base.class == args->client) { |
d43f81cb TB |
362 | err = client->ops->open_channel(client, context); |
363 | if (err) | |
364 | break; | |
365 | ||
d43f81cb TB |
366 | list_add(&context->list, &fpriv->contexts); |
367 | args->context = (uintptr_t)context; | |
53fa7f72 | 368 | context->client = client; |
d43f81cb TB |
369 | return 0; |
370 | } | |
371 | ||
372 | kfree(context); | |
373 | return err; | |
374 | } | |
375 | ||
376 | static int tegra_close_channel(struct drm_device *drm, void *data, | |
377 | struct drm_file *file) | |
378 | { | |
08943e6c | 379 | struct tegra_drm_file *fpriv = file->driver_priv; |
776dc384 | 380 | struct drm_tegra_close_channel *args = data; |
c88c3630 TR |
381 | struct tegra_drm_context *context; |
382 | ||
383 | context = tegra_drm_get_context(args->context); | |
d43f81cb | 384 | |
08943e6c | 385 | if (!tegra_drm_file_owns_context(fpriv, context)) |
d43f81cb TB |
386 | return -EINVAL; |
387 | ||
388 | list_del(&context->list); | |
c88c3630 | 389 | tegra_drm_context_free(context); |
d43f81cb TB |
390 | |
391 | return 0; | |
392 | } | |
393 | ||
394 | static int tegra_get_syncpt(struct drm_device *drm, void *data, | |
395 | struct drm_file *file) | |
396 | { | |
08943e6c | 397 | struct tegra_drm_file *fpriv = file->driver_priv; |
d43f81cb | 398 | struct drm_tegra_get_syncpt *args = data; |
c88c3630 | 399 | struct tegra_drm_context *context; |
d43f81cb TB |
400 | struct host1x_syncpt *syncpt; |
401 | ||
c88c3630 TR |
402 | context = tegra_drm_get_context(args->context); |
403 | ||
08943e6c | 404 | if (!tegra_drm_file_owns_context(fpriv, context)) |
d43f81cb TB |
405 | return -ENODEV; |
406 | ||
53fa7f72 | 407 | if (args->index >= context->client->base.num_syncpts) |
d43f81cb TB |
408 | return -EINVAL; |
409 | ||
53fa7f72 | 410 | syncpt = context->client->base.syncpts[args->index]; |
d43f81cb TB |
411 | args->id = host1x_syncpt_id(syncpt); |
412 | ||
413 | return 0; | |
414 | } | |
415 | ||
416 | static int tegra_submit(struct drm_device *drm, void *data, | |
417 | struct drm_file *file) | |
418 | { | |
08943e6c | 419 | struct tegra_drm_file *fpriv = file->driver_priv; |
d43f81cb | 420 | struct drm_tegra_submit *args = data; |
c88c3630 TR |
421 | struct tegra_drm_context *context; |
422 | ||
423 | context = tegra_drm_get_context(args->context); | |
d43f81cb | 424 | |
08943e6c | 425 | if (!tegra_drm_file_owns_context(fpriv, context)) |
d43f81cb TB |
426 | return -ENODEV; |
427 | ||
428 | return context->client->ops->submit(context, args, drm, file); | |
429 | } | |
c54a169b AM |
430 | |
431 | static int tegra_get_syncpt_base(struct drm_device *drm, void *data, | |
432 | struct drm_file *file) | |
433 | { | |
434 | struct tegra_drm_file *fpriv = file->driver_priv; | |
435 | struct drm_tegra_get_syncpt_base *args = data; | |
436 | struct tegra_drm_context *context; | |
437 | struct host1x_syncpt_base *base; | |
438 | struct host1x_syncpt *syncpt; | |
439 | ||
440 | context = tegra_drm_get_context(args->context); | |
441 | ||
442 | if (!tegra_drm_file_owns_context(fpriv, context)) | |
443 | return -ENODEV; | |
444 | ||
445 | if (args->syncpt >= context->client->base.num_syncpts) | |
446 | return -EINVAL; | |
447 | ||
448 | syncpt = context->client->base.syncpts[args->syncpt]; | |
449 | ||
450 | base = host1x_syncpt_get_base(syncpt); | |
451 | if (!base) | |
452 | return -ENXIO; | |
453 | ||
454 | args->id = host1x_syncpt_base_id(base); | |
455 | ||
456 | return 0; | |
457 | } | |
7678d71f TR |
458 | |
459 | static int tegra_gem_set_tiling(struct drm_device *drm, void *data, | |
460 | struct drm_file *file) | |
461 | { | |
462 | struct drm_tegra_gem_set_tiling *args = data; | |
463 | enum tegra_bo_tiling_mode mode; | |
464 | struct drm_gem_object *gem; | |
465 | unsigned long value = 0; | |
466 | struct tegra_bo *bo; | |
467 | ||
468 | switch (args->mode) { | |
469 | case DRM_TEGRA_GEM_TILING_MODE_PITCH: | |
470 | mode = TEGRA_BO_TILING_MODE_PITCH; | |
471 | ||
472 | if (args->value != 0) | |
473 | return -EINVAL; | |
474 | ||
475 | break; | |
476 | ||
477 | case DRM_TEGRA_GEM_TILING_MODE_TILED: | |
478 | mode = TEGRA_BO_TILING_MODE_TILED; | |
479 | ||
480 | if (args->value != 0) | |
481 | return -EINVAL; | |
482 | ||
483 | break; | |
484 | ||
485 | case DRM_TEGRA_GEM_TILING_MODE_BLOCK: | |
486 | mode = TEGRA_BO_TILING_MODE_BLOCK; | |
487 | ||
488 | if (args->value > 5) | |
489 | return -EINVAL; | |
490 | ||
491 | value = args->value; | |
492 | break; | |
493 | ||
494 | default: | |
495 | return -EINVAL; | |
496 | } | |
497 | ||
498 | gem = drm_gem_object_lookup(drm, file, args->handle); | |
499 | if (!gem) | |
500 | return -ENOENT; | |
501 | ||
502 | bo = to_tegra_bo(gem); | |
503 | ||
504 | bo->tiling.mode = mode; | |
505 | bo->tiling.value = value; | |
506 | ||
507 | drm_gem_object_unreference(gem); | |
508 | ||
509 | return 0; | |
510 | } | |
511 | ||
512 | static int tegra_gem_get_tiling(struct drm_device *drm, void *data, | |
513 | struct drm_file *file) | |
514 | { | |
515 | struct drm_tegra_gem_get_tiling *args = data; | |
516 | struct drm_gem_object *gem; | |
517 | struct tegra_bo *bo; | |
518 | int err = 0; | |
519 | ||
520 | gem = drm_gem_object_lookup(drm, file, args->handle); | |
521 | if (!gem) | |
522 | return -ENOENT; | |
523 | ||
524 | bo = to_tegra_bo(gem); | |
525 | ||
526 | switch (bo->tiling.mode) { | |
527 | case TEGRA_BO_TILING_MODE_PITCH: | |
528 | args->mode = DRM_TEGRA_GEM_TILING_MODE_PITCH; | |
529 | args->value = 0; | |
530 | break; | |
531 | ||
532 | case TEGRA_BO_TILING_MODE_TILED: | |
533 | args->mode = DRM_TEGRA_GEM_TILING_MODE_TILED; | |
534 | args->value = 0; | |
535 | break; | |
536 | ||
537 | case TEGRA_BO_TILING_MODE_BLOCK: | |
538 | args->mode = DRM_TEGRA_GEM_TILING_MODE_BLOCK; | |
539 | args->value = bo->tiling.value; | |
540 | break; | |
541 | ||
542 | default: | |
543 | err = -EINVAL; | |
544 | break; | |
545 | } | |
546 | ||
547 | drm_gem_object_unreference(gem); | |
548 | ||
549 | return err; | |
550 | } | |
7b129087 TR |
551 | |
552 | static int tegra_gem_set_flags(struct drm_device *drm, void *data, | |
553 | struct drm_file *file) | |
554 | { | |
555 | struct drm_tegra_gem_set_flags *args = data; | |
556 | struct drm_gem_object *gem; | |
557 | struct tegra_bo *bo; | |
558 | ||
559 | if (args->flags & ~DRM_TEGRA_GEM_FLAGS) | |
560 | return -EINVAL; | |
561 | ||
562 | gem = drm_gem_object_lookup(drm, file, args->handle); | |
563 | if (!gem) | |
564 | return -ENOENT; | |
565 | ||
566 | bo = to_tegra_bo(gem); | |
567 | bo->flags = 0; | |
568 | ||
569 | if (args->flags & DRM_TEGRA_GEM_BOTTOM_UP) | |
570 | bo->flags |= TEGRA_BO_BOTTOM_UP; | |
571 | ||
572 | drm_gem_object_unreference(gem); | |
573 | ||
574 | return 0; | |
575 | } | |
576 | ||
577 | static int tegra_gem_get_flags(struct drm_device *drm, void *data, | |
578 | struct drm_file *file) | |
579 | { | |
580 | struct drm_tegra_gem_get_flags *args = data; | |
581 | struct drm_gem_object *gem; | |
582 | struct tegra_bo *bo; | |
583 | ||
584 | gem = drm_gem_object_lookup(drm, file, args->handle); | |
585 | if (!gem) | |
586 | return -ENOENT; | |
587 | ||
588 | bo = to_tegra_bo(gem); | |
589 | args->flags = 0; | |
590 | ||
591 | if (bo->flags & TEGRA_BO_BOTTOM_UP) | |
592 | args->flags |= DRM_TEGRA_GEM_BOTTOM_UP; | |
593 | ||
594 | drm_gem_object_unreference(gem); | |
595 | ||
596 | return 0; | |
597 | } | |
d43f81cb TB |
598 | #endif |
599 | ||
baa70943 | 600 | static const struct drm_ioctl_desc tegra_drm_ioctls[] = { |
d43f81cb | 601 | #ifdef CONFIG_DRM_TEGRA_STAGING |
bd4f2360 | 602 | DRM_IOCTL_DEF_DRV(TEGRA_GEM_CREATE, tegra_gem_create, DRM_UNLOCKED), |
d43f81cb TB |
603 | DRM_IOCTL_DEF_DRV(TEGRA_GEM_MMAP, tegra_gem_mmap, DRM_UNLOCKED), |
604 | DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_READ, tegra_syncpt_read, DRM_UNLOCKED), | |
605 | DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_INCR, tegra_syncpt_incr, DRM_UNLOCKED), | |
606 | DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_WAIT, tegra_syncpt_wait, DRM_UNLOCKED), | |
607 | DRM_IOCTL_DEF_DRV(TEGRA_OPEN_CHANNEL, tegra_open_channel, DRM_UNLOCKED), | |
608 | DRM_IOCTL_DEF_DRV(TEGRA_CLOSE_CHANNEL, tegra_close_channel, DRM_UNLOCKED), | |
609 | DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT, tegra_get_syncpt, DRM_UNLOCKED), | |
610 | DRM_IOCTL_DEF_DRV(TEGRA_SUBMIT, tegra_submit, DRM_UNLOCKED), | |
c54a169b | 611 | DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT_BASE, tegra_get_syncpt_base, DRM_UNLOCKED), |
7678d71f TR |
612 | DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_TILING, tegra_gem_set_tiling, DRM_UNLOCKED), |
613 | DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_TILING, tegra_gem_get_tiling, DRM_UNLOCKED), | |
7b129087 TR |
614 | DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_FLAGS, tegra_gem_set_flags, DRM_UNLOCKED), |
615 | DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_FLAGS, tegra_gem_get_flags, DRM_UNLOCKED), | |
d43f81cb | 616 | #endif |
d8f4a9ed TR |
617 | }; |
618 | ||
619 | static const struct file_operations tegra_drm_fops = { | |
620 | .owner = THIS_MODULE, | |
621 | .open = drm_open, | |
622 | .release = drm_release, | |
623 | .unlocked_ioctl = drm_ioctl, | |
de2ba664 | 624 | .mmap = tegra_drm_mmap, |
d8f4a9ed | 625 | .poll = drm_poll, |
d8f4a9ed TR |
626 | .read = drm_read, |
627 | #ifdef CONFIG_COMPAT | |
628 | .compat_ioctl = drm_compat_ioctl, | |
629 | #endif | |
630 | .llseek = noop_llseek, | |
631 | }; | |
632 | ||
6e5ff998 TR |
633 | static struct drm_crtc *tegra_crtc_from_pipe(struct drm_device *drm, int pipe) |
634 | { | |
635 | struct drm_crtc *crtc; | |
636 | ||
637 | list_for_each_entry(crtc, &drm->mode_config.crtc_list, head) { | |
638 | struct tegra_dc *dc = to_tegra_dc(crtc); | |
639 | ||
640 | if (dc->pipe == pipe) | |
641 | return crtc; | |
642 | } | |
643 | ||
644 | return NULL; | |
645 | } | |
646 | ||
647 | static u32 tegra_drm_get_vblank_counter(struct drm_device *dev, int crtc) | |
648 | { | |
649 | /* TODO: implement real hardware counter using syncpoints */ | |
650 | return drm_vblank_count(dev, crtc); | |
651 | } | |
652 | ||
653 | static int tegra_drm_enable_vblank(struct drm_device *drm, int pipe) | |
654 | { | |
655 | struct drm_crtc *crtc = tegra_crtc_from_pipe(drm, pipe); | |
656 | struct tegra_dc *dc = to_tegra_dc(crtc); | |
657 | ||
658 | if (!crtc) | |
659 | return -ENODEV; | |
660 | ||
661 | tegra_dc_enable_vblank(dc); | |
662 | ||
663 | return 0; | |
664 | } | |
665 | ||
666 | static void tegra_drm_disable_vblank(struct drm_device *drm, int pipe) | |
667 | { | |
668 | struct drm_crtc *crtc = tegra_crtc_from_pipe(drm, pipe); | |
669 | struct tegra_dc *dc = to_tegra_dc(crtc); | |
670 | ||
671 | if (crtc) | |
672 | tegra_dc_disable_vblank(dc); | |
673 | } | |
674 | ||
3c03c46a TR |
675 | static void tegra_drm_preclose(struct drm_device *drm, struct drm_file *file) |
676 | { | |
08943e6c | 677 | struct tegra_drm_file *fpriv = file->driver_priv; |
c88c3630 | 678 | struct tegra_drm_context *context, *tmp; |
3c03c46a TR |
679 | struct drm_crtc *crtc; |
680 | ||
681 | list_for_each_entry(crtc, &drm->mode_config.crtc_list, head) | |
682 | tegra_dc_cancel_page_flip(crtc, file); | |
d43f81cb TB |
683 | |
684 | list_for_each_entry_safe(context, tmp, &fpriv->contexts, list) | |
c88c3630 | 685 | tegra_drm_context_free(context); |
d43f81cb TB |
686 | |
687 | kfree(fpriv); | |
3c03c46a TR |
688 | } |
689 | ||
e450fcc6 TR |
690 | #ifdef CONFIG_DEBUG_FS |
691 | static int tegra_debugfs_framebuffers(struct seq_file *s, void *data) | |
692 | { | |
693 | struct drm_info_node *node = (struct drm_info_node *)s->private; | |
694 | struct drm_device *drm = node->minor->dev; | |
695 | struct drm_framebuffer *fb; | |
696 | ||
697 | mutex_lock(&drm->mode_config.fb_lock); | |
698 | ||
699 | list_for_each_entry(fb, &drm->mode_config.fb_list, head) { | |
700 | seq_printf(s, "%3d: user size: %d x %d, depth %d, %d bpp, refcount %d\n", | |
701 | fb->base.id, fb->width, fb->height, fb->depth, | |
702 | fb->bits_per_pixel, | |
703 | atomic_read(&fb->refcount.refcount)); | |
704 | } | |
705 | ||
706 | mutex_unlock(&drm->mode_config.fb_lock); | |
707 | ||
708 | return 0; | |
709 | } | |
710 | ||
711 | static struct drm_info_list tegra_debugfs_list[] = { | |
712 | { "framebuffers", tegra_debugfs_framebuffers, 0 }, | |
713 | }; | |
714 | ||
715 | static int tegra_debugfs_init(struct drm_minor *minor) | |
716 | { | |
717 | return drm_debugfs_create_files(tegra_debugfs_list, | |
718 | ARRAY_SIZE(tegra_debugfs_list), | |
719 | minor->debugfs_root, minor); | |
720 | } | |
721 | ||
722 | static void tegra_debugfs_cleanup(struct drm_minor *minor) | |
723 | { | |
724 | drm_debugfs_remove_files(tegra_debugfs_list, | |
725 | ARRAY_SIZE(tegra_debugfs_list), minor); | |
726 | } | |
727 | #endif | |
728 | ||
9b57f5f2 | 729 | static struct drm_driver tegra_drm_driver = { |
3800391d | 730 | .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME, |
d8f4a9ed TR |
731 | .load = tegra_drm_load, |
732 | .unload = tegra_drm_unload, | |
733 | .open = tegra_drm_open, | |
3c03c46a | 734 | .preclose = tegra_drm_preclose, |
d8f4a9ed TR |
735 | .lastclose = tegra_drm_lastclose, |
736 | ||
6e5ff998 TR |
737 | .get_vblank_counter = tegra_drm_get_vblank_counter, |
738 | .enable_vblank = tegra_drm_enable_vblank, | |
739 | .disable_vblank = tegra_drm_disable_vblank, | |
740 | ||
e450fcc6 TR |
741 | #if defined(CONFIG_DEBUG_FS) |
742 | .debugfs_init = tegra_debugfs_init, | |
743 | .debugfs_cleanup = tegra_debugfs_cleanup, | |
744 | #endif | |
745 | ||
de2ba664 AM |
746 | .gem_free_object = tegra_bo_free_object, |
747 | .gem_vm_ops = &tegra_bo_vm_ops, | |
3800391d TR |
748 | |
749 | .prime_handle_to_fd = drm_gem_prime_handle_to_fd, | |
750 | .prime_fd_to_handle = drm_gem_prime_fd_to_handle, | |
751 | .gem_prime_export = tegra_gem_prime_export, | |
752 | .gem_prime_import = tegra_gem_prime_import, | |
753 | ||
de2ba664 AM |
754 | .dumb_create = tegra_bo_dumb_create, |
755 | .dumb_map_offset = tegra_bo_dumb_map_offset, | |
43387b37 | 756 | .dumb_destroy = drm_gem_dumb_destroy, |
d8f4a9ed TR |
757 | |
758 | .ioctls = tegra_drm_ioctls, | |
759 | .num_ioctls = ARRAY_SIZE(tegra_drm_ioctls), | |
760 | .fops = &tegra_drm_fops, | |
761 | ||
762 | .name = DRIVER_NAME, | |
763 | .desc = DRIVER_DESC, | |
764 | .date = DRIVER_DATE, | |
765 | .major = DRIVER_MAJOR, | |
766 | .minor = DRIVER_MINOR, | |
767 | .patchlevel = DRIVER_PATCHLEVEL, | |
768 | }; | |
776dc384 TR |
769 | |
770 | int tegra_drm_register_client(struct tegra_drm *tegra, | |
771 | struct tegra_drm_client *client) | |
772 | { | |
773 | mutex_lock(&tegra->clients_lock); | |
774 | list_add_tail(&client->list, &tegra->clients); | |
775 | mutex_unlock(&tegra->clients_lock); | |
776 | ||
777 | return 0; | |
778 | } | |
779 | ||
780 | int tegra_drm_unregister_client(struct tegra_drm *tegra, | |
781 | struct tegra_drm_client *client) | |
782 | { | |
783 | mutex_lock(&tegra->clients_lock); | |
784 | list_del_init(&client->list); | |
785 | mutex_unlock(&tegra->clients_lock); | |
786 | ||
787 | return 0; | |
788 | } | |
789 | ||
9910f5c4 | 790 | static int host1x_drm_probe(struct host1x_device *dev) |
776dc384 | 791 | { |
9910f5c4 TR |
792 | struct drm_driver *driver = &tegra_drm_driver; |
793 | struct drm_device *drm; | |
794 | int err; | |
795 | ||
796 | drm = drm_dev_alloc(driver, &dev->dev); | |
797 | if (!drm) | |
798 | return -ENOMEM; | |
799 | ||
800 | drm_dev_set_unique(drm, dev_name(&dev->dev)); | |
801 | dev_set_drvdata(&dev->dev, drm); | |
802 | ||
803 | err = drm_dev_register(drm, 0); | |
804 | if (err < 0) | |
805 | goto unref; | |
806 | ||
807 | DRM_INFO("Initialized %s %d.%d.%d %s on minor %d\n", driver->name, | |
808 | driver->major, driver->minor, driver->patchlevel, | |
809 | driver->date, drm->primary->index); | |
810 | ||
811 | return 0; | |
812 | ||
813 | unref: | |
814 | drm_dev_unref(drm); | |
815 | return err; | |
776dc384 TR |
816 | } |
817 | ||
9910f5c4 | 818 | static int host1x_drm_remove(struct host1x_device *dev) |
776dc384 | 819 | { |
9910f5c4 TR |
820 | struct drm_device *drm = dev_get_drvdata(&dev->dev); |
821 | ||
822 | drm_dev_unregister(drm); | |
823 | drm_dev_unref(drm); | |
776dc384 TR |
824 | |
825 | return 0; | |
826 | } | |
827 | ||
828 | static const struct of_device_id host1x_drm_subdevs[] = { | |
829 | { .compatible = "nvidia,tegra20-dc", }, | |
830 | { .compatible = "nvidia,tegra20-hdmi", }, | |
831 | { .compatible = "nvidia,tegra20-gr2d", }, | |
5f60ed0d | 832 | { .compatible = "nvidia,tegra20-gr3d", }, |
776dc384 TR |
833 | { .compatible = "nvidia,tegra30-dc", }, |
834 | { .compatible = "nvidia,tegra30-hdmi", }, | |
835 | { .compatible = "nvidia,tegra30-gr2d", }, | |
5f60ed0d | 836 | { .compatible = "nvidia,tegra30-gr3d", }, |
dec72739 | 837 | { .compatible = "nvidia,tegra114-dsi", }, |
7d1d28ac | 838 | { .compatible = "nvidia,tegra114-hdmi", }, |
5f60ed0d | 839 | { .compatible = "nvidia,tegra114-gr3d", }, |
8620fc62 | 840 | { .compatible = "nvidia,tegra124-dc", }, |
6b6b6042 | 841 | { .compatible = "nvidia,tegra124-sor", }, |
fb7be70e | 842 | { .compatible = "nvidia,tegra124-hdmi", }, |
776dc384 TR |
843 | { /* sentinel */ } |
844 | }; | |
845 | ||
846 | static struct host1x_driver host1x_drm_driver = { | |
847 | .name = "drm", | |
848 | .probe = host1x_drm_probe, | |
849 | .remove = host1x_drm_remove, | |
850 | .subdevs = host1x_drm_subdevs, | |
851 | }; | |
852 | ||
853 | static int __init host1x_drm_init(void) | |
854 | { | |
855 | int err; | |
856 | ||
857 | err = host1x_driver_register(&host1x_drm_driver); | |
858 | if (err < 0) | |
859 | return err; | |
860 | ||
861 | err = platform_driver_register(&tegra_dc_driver); | |
862 | if (err < 0) | |
863 | goto unregister_host1x; | |
864 | ||
dec72739 | 865 | err = platform_driver_register(&tegra_dsi_driver); |
776dc384 TR |
866 | if (err < 0) |
867 | goto unregister_dc; | |
868 | ||
6b6b6042 | 869 | err = platform_driver_register(&tegra_sor_driver); |
dec72739 TR |
870 | if (err < 0) |
871 | goto unregister_dsi; | |
872 | ||
6b6b6042 TR |
873 | err = platform_driver_register(&tegra_hdmi_driver); |
874 | if (err < 0) | |
875 | goto unregister_sor; | |
876 | ||
877 | err = platform_driver_register(&tegra_dpaux_driver); | |
776dc384 TR |
878 | if (err < 0) |
879 | goto unregister_hdmi; | |
880 | ||
6b6b6042 TR |
881 | err = platform_driver_register(&tegra_gr2d_driver); |
882 | if (err < 0) | |
883 | goto unregister_dpaux; | |
884 | ||
5f60ed0d TR |
885 | err = platform_driver_register(&tegra_gr3d_driver); |
886 | if (err < 0) | |
887 | goto unregister_gr2d; | |
888 | ||
776dc384 TR |
889 | return 0; |
890 | ||
5f60ed0d TR |
891 | unregister_gr2d: |
892 | platform_driver_unregister(&tegra_gr2d_driver); | |
6b6b6042 TR |
893 | unregister_dpaux: |
894 | platform_driver_unregister(&tegra_dpaux_driver); | |
776dc384 TR |
895 | unregister_hdmi: |
896 | platform_driver_unregister(&tegra_hdmi_driver); | |
6b6b6042 TR |
897 | unregister_sor: |
898 | platform_driver_unregister(&tegra_sor_driver); | |
dec72739 TR |
899 | unregister_dsi: |
900 | platform_driver_unregister(&tegra_dsi_driver); | |
776dc384 TR |
901 | unregister_dc: |
902 | platform_driver_unregister(&tegra_dc_driver); | |
903 | unregister_host1x: | |
904 | host1x_driver_unregister(&host1x_drm_driver); | |
905 | return err; | |
906 | } | |
907 | module_init(host1x_drm_init); | |
908 | ||
909 | static void __exit host1x_drm_exit(void) | |
910 | { | |
5f60ed0d | 911 | platform_driver_unregister(&tegra_gr3d_driver); |
776dc384 | 912 | platform_driver_unregister(&tegra_gr2d_driver); |
6b6b6042 | 913 | platform_driver_unregister(&tegra_dpaux_driver); |
776dc384 | 914 | platform_driver_unregister(&tegra_hdmi_driver); |
6b6b6042 | 915 | platform_driver_unregister(&tegra_sor_driver); |
dec72739 | 916 | platform_driver_unregister(&tegra_dsi_driver); |
776dc384 TR |
917 | platform_driver_unregister(&tegra_dc_driver); |
918 | host1x_driver_unregister(&host1x_drm_driver); | |
919 | } | |
920 | module_exit(host1x_drm_exit); | |
921 | ||
922 | MODULE_AUTHOR("Thierry Reding <thierry.reding@avionic-design.de>"); | |
923 | MODULE_DESCRIPTION("NVIDIA Tegra DRM driver"); | |
924 | MODULE_LICENSE("GPL v2"); |