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dc5698e8 DA |
1 | /* |
2 | * Copyright (C) 2015 Red Hat, Inc. | |
3 | * All Rights Reserved. | |
4 | * | |
5 | * Permission is hereby granted, free of charge, to any person obtaining | |
6 | * a copy of this software and associated documentation files (the | |
7 | * "Software"), to deal in the Software without restriction, including | |
8 | * without limitation the rights to use, copy, modify, merge, publish, | |
9 | * distribute, sublicense, and/or sell copies of the Software, and to | |
10 | * permit persons to whom the Software is furnished to do so, subject to | |
11 | * the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice (including the | |
14 | * next paragraph) shall be included in all copies or substantial | |
15 | * portions of the Software. | |
16 | * | |
17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
18 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
19 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. | |
20 | * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE | |
21 | * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION | |
22 | * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION | |
23 | * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. | |
24 | */ | |
25 | ||
26 | #include <linux/virtio.h> | |
27 | #include <linux/virtio_config.h> | |
5038a567 | 28 | #include <linux/virtio_ring.h> |
a3d63977 SR |
29 | |
30 | #include <drm/drm_file.h> | |
31 | ||
dc5698e8 DA |
32 | #include "virtgpu_drv.h" |
33 | ||
dc5698e8 DA |
34 | static void virtio_gpu_config_changed_work_func(struct work_struct *work) |
35 | { | |
36 | struct virtio_gpu_device *vgdev = | |
37 | container_of(work, struct virtio_gpu_device, | |
38 | config_changed_work); | |
39 | u32 events_read, events_clear = 0; | |
40 | ||
41 | /* read the config space */ | |
115a71d8 MT |
42 | virtio_cread_le(vgdev->vdev, struct virtio_gpu_config, |
43 | events_read, &events_read); | |
dc5698e8 | 44 | if (events_read & VIRTIO_GPU_EVENT_DISPLAY) { |
b4b01b49 GH |
45 | if (vgdev->has_edid) |
46 | virtio_gpu_cmd_get_edids(vgdev); | |
dc5698e8 | 47 | virtio_gpu_cmd_get_display_info(vgdev); |
234489ea | 48 | virtio_gpu_notify(vgdev); |
dc5698e8 DA |
49 | drm_helper_hpd_irq_event(vgdev->ddev); |
50 | events_clear |= VIRTIO_GPU_EVENT_DISPLAY; | |
51 | } | |
115a71d8 MT |
52 | virtio_cwrite_le(vgdev->vdev, struct virtio_gpu_config, |
53 | events_clear, &events_clear); | |
dc5698e8 DA |
54 | } |
55 | ||
56 | static void virtio_gpu_init_vq(struct virtio_gpu_queue *vgvq, | |
57 | void (*work_func)(struct work_struct *work)) | |
58 | { | |
59 | spin_lock_init(&vgvq->qlock); | |
60 | init_waitqueue_head(&vgvq->ack_queue); | |
61 | INIT_WORK(&vgvq->dequeue_work, work_func); | |
62 | } | |
63 | ||
62fb7a5e GH |
64 | static void virtio_gpu_get_capsets(struct virtio_gpu_device *vgdev, |
65 | int num_capsets) | |
66 | { | |
67 | int i, ret; | |
68 | ||
69 | vgdev->capsets = kcalloc(num_capsets, | |
70 | sizeof(struct virtio_gpu_drv_capset), | |
71 | GFP_KERNEL); | |
72 | if (!vgdev->capsets) { | |
73 | DRM_ERROR("failed to allocate cap sets\n"); | |
74 | return; | |
75 | } | |
76 | for (i = 0; i < num_capsets; i++) { | |
77 | virtio_gpu_cmd_get_capset_info(vgdev, i); | |
97452907 | 78 | virtio_gpu_notify(vgdev); |
62fb7a5e GH |
79 | ret = wait_event_timeout(vgdev->resp_wq, |
80 | vgdev->capsets[i].id > 0, 5 * HZ); | |
81 | if (ret == 0) { | |
82 | DRM_ERROR("timed out waiting for cap set %d\n", i); | |
e219688f | 83 | spin_lock(&vgdev->display_info_lock); |
62fb7a5e GH |
84 | kfree(vgdev->capsets); |
85 | vgdev->capsets = NULL; | |
e219688f | 86 | spin_unlock(&vgdev->display_info_lock); |
62fb7a5e GH |
87 | return; |
88 | } | |
89 | DRM_INFO("cap set %d: id %d, max-version %d, max-size %d\n", | |
90 | i, vgdev->capsets[i].id, | |
91 | vgdev->capsets[i].max_version, | |
92 | vgdev->capsets[i].max_size); | |
93 | } | |
94 | vgdev->num_capsets = num_capsets; | |
95 | } | |
96 | ||
d516e75c | 97 | int virtio_gpu_init(struct drm_device *dev) |
dc5698e8 DA |
98 | { |
99 | static vq_callback_t *callbacks[] = { | |
100 | virtio_gpu_ctrl_ack, virtio_gpu_cursor_ack | |
101 | }; | |
f7ad26ff | 102 | static const char * const names[] = { "control", "cursor" }; |
dc5698e8 DA |
103 | |
104 | struct virtio_gpu_device *vgdev; | |
105 | /* this will expand later */ | |
106 | struct virtqueue *vqs[2]; | |
62fb7a5e | 107 | u32 num_scanouts, num_capsets; |
1fb97413 | 108 | int ret = 0; |
dc5698e8 | 109 | |
18e51064 | 110 | if (!virtio_has_feature(dev_to_virtio(dev->dev), VIRTIO_F_VERSION_1)) |
dc5698e8 DA |
111 | return -ENODEV; |
112 | ||
113 | vgdev = kzalloc(sizeof(struct virtio_gpu_device), GFP_KERNEL); | |
114 | if (!vgdev) | |
115 | return -ENOMEM; | |
116 | ||
117 | vgdev->ddev = dev; | |
118 | dev->dev_private = vgdev; | |
18e51064 | 119 | vgdev->vdev = dev_to_virtio(dev->dev); |
dc5698e8 DA |
120 | vgdev->dev = dev->dev; |
121 | ||
122 | spin_lock_init(&vgdev->display_info_lock); | |
c84adb30 | 123 | spin_lock_init(&vgdev->resource_export_lock); |
1938d1ae MW |
124 | ida_init(&vgdev->ctx_id_ida); |
125 | ida_init(&vgdev->resource_ida); | |
dc5698e8 DA |
126 | init_waitqueue_head(&vgdev->resp_wq); |
127 | virtio_gpu_init_vq(&vgdev->ctrlq, virtio_gpu_dequeue_ctrl_func); | |
128 | virtio_gpu_init_vq(&vgdev->cursorq, virtio_gpu_dequeue_cursor_func); | |
129 | ||
f54d1867 | 130 | vgdev->fence_drv.context = dma_fence_context_alloc(1); |
dc5698e8 DA |
131 | spin_lock_init(&vgdev->fence_drv.lock); |
132 | INIT_LIST_HEAD(&vgdev->fence_drv.fences); | |
62fb7a5e | 133 | INIT_LIST_HEAD(&vgdev->cap_cache); |
dc5698e8 DA |
134 | INIT_WORK(&vgdev->config_changed_work, |
135 | virtio_gpu_config_changed_work_func); | |
136 | ||
f0c6cef7 GH |
137 | INIT_WORK(&vgdev->obj_free_work, |
138 | virtio_gpu_array_put_free_work); | |
139 | INIT_LIST_HEAD(&vgdev->obj_free_list); | |
140 | spin_lock_init(&vgdev->obj_free_lock); | |
141 | ||
ff2ac58a | 142 | #ifdef __LITTLE_ENDIAN |
62fb7a5e GH |
143 | if (virtio_has_feature(vgdev->vdev, VIRTIO_GPU_F_VIRGL)) |
144 | vgdev->has_virgl_3d = true; | |
ff2ac58a | 145 | #endif |
b4b01b49 GH |
146 | if (virtio_has_feature(vgdev->vdev, VIRTIO_GPU_F_EDID)) { |
147 | vgdev->has_edid = true; | |
b4b01b49 | 148 | } |
5edbb560 GH |
149 | if (virtio_has_feature(vgdev->vdev, VIRTIO_RING_F_INDIRECT_DESC)) { |
150 | vgdev->has_indirect = true; | |
151 | } | |
c84adb30 DS |
152 | if (virtio_has_feature(vgdev->vdev, VIRTIO_GPU_F_RESOURCE_UUID)) { |
153 | vgdev->has_resource_assign_uuid = true; | |
154 | } | |
62fb7a5e | 155 | |
9e370dfe GH |
156 | DRM_INFO("features: %cvirgl %cedid\n", |
157 | vgdev->has_virgl_3d ? '+' : '-', | |
158 | vgdev->has_edid ? '+' : '-'); | |
159 | ||
9b2bbdb2 | 160 | ret = virtio_find_vqs(vgdev->vdev, 2, vqs, callbacks, names, NULL); |
dc5698e8 DA |
161 | if (ret) { |
162 | DRM_ERROR("failed to find virt queues\n"); | |
163 | goto err_vqs; | |
164 | } | |
165 | vgdev->ctrlq.vq = vqs[0]; | |
166 | vgdev->cursorq.vq = vqs[1]; | |
167 | ret = virtio_gpu_alloc_vbufs(vgdev); | |
168 | if (ret) { | |
169 | DRM_ERROR("failed to alloc vbufs\n"); | |
170 | goto err_vbufs; | |
171 | } | |
172 | ||
dc5698e8 | 173 | /* get display info */ |
115a71d8 MT |
174 | virtio_cread_le(vgdev->vdev, struct virtio_gpu_config, |
175 | num_scanouts, &num_scanouts); | |
dc5698e8 DA |
176 | vgdev->num_scanouts = min_t(uint32_t, num_scanouts, |
177 | VIRTIO_GPU_MAX_SCANOUTS); | |
178 | if (!vgdev->num_scanouts) { | |
179 | DRM_ERROR("num_scanouts is zero\n"); | |
180 | ret = -EINVAL; | |
181 | goto err_scanouts; | |
182 | } | |
62fb7a5e GH |
183 | DRM_INFO("number of scanouts: %d\n", num_scanouts); |
184 | ||
115a71d8 MT |
185 | virtio_cread_le(vgdev->vdev, struct virtio_gpu_config, |
186 | num_capsets, &num_capsets); | |
62fb7a5e | 187 | DRM_INFO("number of cap sets: %d\n", num_capsets); |
dc5698e8 | 188 | |
d516e75c | 189 | virtio_gpu_modeset_init(vgdev); |
dc5698e8 DA |
190 | |
191 | virtio_device_ready(vgdev->vdev); | |
dc5698e8 | 192 | |
62fb7a5e GH |
193 | if (num_capsets) |
194 | virtio_gpu_get_capsets(vgdev, num_capsets); | |
b4b01b49 GH |
195 | if (vgdev->has_edid) |
196 | virtio_gpu_cmd_get_edids(vgdev); | |
441012af | 197 | virtio_gpu_cmd_get_display_info(vgdev); |
234489ea | 198 | virtio_gpu_notify(vgdev); |
441012af DA |
199 | wait_event_timeout(vgdev->resp_wq, !vgdev->display_info_pending, |
200 | 5 * HZ); | |
dc5698e8 DA |
201 | return 0; |
202 | ||
dc5698e8 | 203 | err_scanouts: |
dc5698e8 DA |
204 | virtio_gpu_free_vbufs(vgdev); |
205 | err_vbufs: | |
206 | vgdev->vdev->config->del_vqs(vgdev->vdev); | |
207 | err_vqs: | |
208 | kfree(vgdev); | |
209 | return ret; | |
210 | } | |
211 | ||
62fb7a5e GH |
212 | static void virtio_gpu_cleanup_cap_cache(struct virtio_gpu_device *vgdev) |
213 | { | |
214 | struct virtio_gpu_drv_cap_cache *cache_ent, *tmp; | |
215 | ||
216 | list_for_each_entry_safe(cache_ent, tmp, &vgdev->cap_cache, head) { | |
217 | kfree(cache_ent->caps_cache); | |
218 | kfree(cache_ent); | |
219 | } | |
220 | } | |
221 | ||
d516e75c | 222 | void virtio_gpu_deinit(struct drm_device *dev) |
dc5698e8 DA |
223 | { |
224 | struct virtio_gpu_device *vgdev = dev->dev_private; | |
225 | ||
f0c6cef7 | 226 | flush_work(&vgdev->obj_free_work); |
dc5698e8 DA |
227 | flush_work(&vgdev->ctrlq.dequeue_work); |
228 | flush_work(&vgdev->cursorq.dequeue_work); | |
229 | flush_work(&vgdev->config_changed_work); | |
edde9fc5 | 230 | vgdev->vdev->config->reset(vgdev->vdev); |
dc5698e8 | 231 | vgdev->vdev->config->del_vqs(vgdev->vdev); |
b1df3a2b GH |
232 | } |
233 | ||
234 | void virtio_gpu_release(struct drm_device *dev) | |
235 | { | |
236 | struct virtio_gpu_device *vgdev = dev->dev_private; | |
dc5698e8 DA |
237 | |
238 | virtio_gpu_modeset_fini(vgdev); | |
dc5698e8 | 239 | virtio_gpu_free_vbufs(vgdev); |
62fb7a5e GH |
240 | virtio_gpu_cleanup_cap_cache(vgdev); |
241 | kfree(vgdev->capsets); | |
dc5698e8 | 242 | kfree(vgdev); |
dc5698e8 | 243 | } |
62fb7a5e GH |
244 | |
245 | int virtio_gpu_driver_open(struct drm_device *dev, struct drm_file *file) | |
246 | { | |
247 | struct virtio_gpu_device *vgdev = dev->dev_private; | |
248 | struct virtio_gpu_fpriv *vfpriv; | |
40cadedd | 249 | int handle; |
62fb7a5e GH |
250 | |
251 | /* can't create contexts without 3d renderer */ | |
252 | if (!vgdev->has_virgl_3d) | |
253 | return 0; | |
254 | ||
62fb7a5e GH |
255 | /* allocate a virt GPU context for this opener */ |
256 | vfpriv = kzalloc(sizeof(*vfpriv), GFP_KERNEL); | |
257 | if (!vfpriv) | |
258 | return -ENOMEM; | |
259 | ||
d2a983b2 GS |
260 | mutex_init(&vfpriv->context_lock); |
261 | ||
40cadedd GS |
262 | handle = ida_alloc(&vgdev->ctx_id_ida, GFP_KERNEL); |
263 | if (handle < 0) { | |
040b595a | 264 | kfree(vfpriv); |
40cadedd | 265 | return handle; |
040b595a | 266 | } |
62fb7a5e | 267 | |
40cadedd | 268 | vfpriv->ctx_id = handle + 1; |
62fb7a5e GH |
269 | file->driver_priv = vfpriv; |
270 | return 0; | |
271 | } | |
272 | ||
273 | void virtio_gpu_driver_postclose(struct drm_device *dev, struct drm_file *file) | |
274 | { | |
275 | struct virtio_gpu_device *vgdev = dev->dev_private; | |
45c5d2a4 | 276 | struct virtio_gpu_fpriv *vfpriv = file->driver_priv; |
62fb7a5e GH |
277 | |
278 | if (!vgdev->has_virgl_3d) | |
279 | return; | |
280 | ||
45c5d2a4 GS |
281 | if (vfpriv->context_created) { |
282 | virtio_gpu_cmd_context_destroy(vgdev, vfpriv->ctx_id); | |
283 | virtio_gpu_notify(vgdev); | |
284 | } | |
62fb7a5e | 285 | |
45c5d2a4 | 286 | ida_free(&vgdev->ctx_id_ida, vfpriv->ctx_id - 1); |
d2a983b2 | 287 | mutex_destroy(&vfpriv->context_lock); |
62fb7a5e GH |
288 | kfree(vfpriv); |
289 | file->driver_priv = NULL; | |
290 | } |