[mirror_ubuntu-hirsute-kernel.git] / drivers / gpu / drm / virtio / virtgpu_kms.c

/*
 * Copyright (C) 2015 Red Hat, Inc.
 * All Rights Reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining
 * a copy of this software and associated documentation files (the
 * "Software"), to deal in the Software without restriction, including
 * without limitation the rights to use, copy, modify, merge, publish,
 * distribute, sublicense, and/or sell copies of the Software, and to
 * permit persons to whom the Software is furnished to do so, subject to
 * the following conditions:
 *
 * The above copyright notice and this permission notice (including the
 * next paragraph) shall be included in all copies or substantial
 * portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 */

#include <linux/virtio.h>
#include <linux/virtio_config.h>
#include <linux/virtio_ring.h>

#include <drm/drm_file.h>

#include "virtgpu_drv.h"

static void virtio_gpu_config_changed_work_func(struct work_struct *work)
{
	struct virtio_gpu_device *vgdev =
		container_of(work, struct virtio_gpu_device,
			     config_changed_work);
	u32 events_read, events_clear = 0;

	/* read the config space */
	virtio_cread(vgdev->vdev, struct virtio_gpu_config,
		     events_read, &events_read);
	if (events_read & VIRTIO_GPU_EVENT_DISPLAY) {
		if (vgdev->has_edid)
			virtio_gpu_cmd_get_edids(vgdev);
		virtio_gpu_cmd_get_display_info(vgdev);
		virtio_gpu_notify(vgdev);
		drm_helper_hpd_irq_event(vgdev->ddev);
		events_clear |= VIRTIO_GPU_EVENT_DISPLAY;
	}
	virtio_cwrite(vgdev->vdev, struct virtio_gpu_config,
		      events_clear, &events_clear);
}

static void virtio_gpu_init_vq(struct virtio_gpu_queue *vgvq,
			       void (*work_func)(struct work_struct *work))
{
	spin_lock_init(&vgvq->qlock);
	init_waitqueue_head(&vgvq->ack_queue);
	INIT_WORK(&vgvq->dequeue_work, work_func);
}

static void virtio_gpu_get_capsets(struct virtio_gpu_device *vgdev,
				   int num_capsets)
{
	int i, ret;

	vgdev->capsets = kcalloc(num_capsets,
				 sizeof(struct virtio_gpu_drv_capset),
				 GFP_KERNEL);
	if (!vgdev->capsets) {
		DRM_ERROR("failed to allocate cap sets\n");
		return;
	}
	for (i = 0; i < num_capsets; i++) {
		virtio_gpu_cmd_get_capset_info(vgdev, i);
		virtio_gpu_notify(vgdev);
		ret = wait_event_timeout(vgdev->resp_wq,
					 vgdev->capsets[i].id > 0, 5 * HZ);
		if (ret == 0) {
			DRM_ERROR("timed out waiting for cap set %d\n", i);
			kfree(vgdev->capsets);
			vgdev->capsets = NULL;
			return;
		}
		DRM_INFO("cap set %d: id %d, max-version %d, max-size %d\n",
			 i, vgdev->capsets[i].id,
			 vgdev->capsets[i].max_version,
			 vgdev->capsets[i].max_size);
	}
	vgdev->num_capsets = num_capsets;
}

int virtio_gpu_init(struct drm_device *dev)
{
	static vq_callback_t *callbacks[] = {
		virtio_gpu_ctrl_ack, virtio_gpu_cursor_ack
	};
	static const char * const names[] = { "control", "cursor" };

	struct virtio_gpu_device *vgdev;
	/* this will expand later */
	struct virtqueue *vqs[2];
	u32 num_scanouts, num_capsets;
	int ret;

	if (!virtio_has_feature(dev_to_virtio(dev->dev), VIRTIO_F_VERSION_1))
		return -ENODEV;

	vgdev = kzalloc(sizeof(struct virtio_gpu_device), GFP_KERNEL);
	if (!vgdev)
		return -ENOMEM;

	vgdev->ddev = dev;
	dev->dev_private = vgdev;
	vgdev->vdev = dev_to_virtio(dev->dev);
	vgdev->dev = dev->dev;

	spin_lock_init(&vgdev->display_info_lock);
	ida_init(&vgdev->ctx_id_ida);
	ida_init(&vgdev->resource_ida);
	init_waitqueue_head(&vgdev->resp_wq);
	virtio_gpu_init_vq(&vgdev->ctrlq, virtio_gpu_dequeue_ctrl_func);
	virtio_gpu_init_vq(&vgdev->cursorq, virtio_gpu_dequeue_cursor_func);

	vgdev->fence_drv.context = dma_fence_context_alloc(1);
	spin_lock_init(&vgdev->fence_drv.lock);
	INIT_LIST_HEAD(&vgdev->fence_drv.fences);
	INIT_LIST_HEAD(&vgdev->cap_cache);
	INIT_WORK(&vgdev->config_changed_work,
		  virtio_gpu_config_changed_work_func);

	INIT_WORK(&vgdev->obj_free_work,
		  virtio_gpu_array_put_free_work);
	INIT_LIST_HEAD(&vgdev->obj_free_list);
	spin_lock_init(&vgdev->obj_free_lock);

#ifdef __LITTLE_ENDIAN
	if (virtio_has_feature(vgdev->vdev, VIRTIO_GPU_F_VIRGL))
		vgdev->has_virgl_3d = true;
#endif
	if (virtio_has_feature(vgdev->vdev, VIRTIO_GPU_F_EDID)) {
		vgdev->has_edid = true;
	}
	if (virtio_has_feature(vgdev->vdev, VIRTIO_RING_F_INDIRECT_DESC)) {
		vgdev->has_indirect = true;
	}

	DRM_INFO("features: %cvirgl %cedid\n",
		 vgdev->has_virgl_3d ? '+' : '-',
		 vgdev->has_edid     ? '+' : '-');

	ret = virtio_find_vqs(vgdev->vdev, 2, vqs, callbacks, names, NULL);
	if (ret) {
		DRM_ERROR("failed to find virt queues\n");
		goto err_vqs;
	}
	vgdev->ctrlq.vq = vqs[0];
	vgdev->cursorq.vq = vqs[1];
	ret = virtio_gpu_alloc_vbufs(vgdev);
	if (ret) {
		DRM_ERROR("failed to alloc vbufs\n");
		goto err_vbufs;
	}

	/* get display info */
	virtio_cread(vgdev->vdev, struct virtio_gpu_config,
		     num_scanouts, &num_scanouts);
	vgdev->num_scanouts = min_t(uint32_t, num_scanouts,
				    VIRTIO_GPU_MAX_SCANOUTS);
	if (!vgdev->num_scanouts) {
		DRM_ERROR("num_scanouts is zero\n");
		ret = -EINVAL;
		goto err_scanouts;
	}
	DRM_INFO("number of scanouts: %d\n", num_scanouts);

	virtio_cread(vgdev->vdev, struct virtio_gpu_config,
		     num_capsets, &num_capsets);
	DRM_INFO("number of cap sets: %d\n", num_capsets);

	virtio_gpu_modeset_init(vgdev);

	virtio_device_ready(vgdev->vdev);

	if (num_capsets)
		virtio_gpu_get_capsets(vgdev, num_capsets);
	if (vgdev->has_edid)
		virtio_gpu_cmd_get_edids(vgdev);
	virtio_gpu_cmd_get_display_info(vgdev);
	virtio_gpu_notify(vgdev);
	wait_event_timeout(vgdev->resp_wq, !vgdev->display_info_pending,
			   5 * HZ);
	return 0;

err_scanouts:
	virtio_gpu_free_vbufs(vgdev);
err_vbufs:
	vgdev->vdev->config->del_vqs(vgdev->vdev);
err_vqs:
	kfree(vgdev);
	return ret;
}

static void virtio_gpu_cleanup_cap_cache(struct virtio_gpu_device *vgdev)
{
	struct virtio_gpu_drv_cap_cache *cache_ent, *tmp;

	list_for_each_entry_safe(cache_ent, tmp, &vgdev->cap_cache, head) {
		kfree(cache_ent->caps_cache);
		kfree(cache_ent);
	}
}

void virtio_gpu_deinit(struct drm_device *dev)
{
	struct virtio_gpu_device *vgdev = dev->dev_private;

	flush_work(&vgdev->obj_free_work);
	flush_work(&vgdev->ctrlq.dequeue_work);
	flush_work(&vgdev->cursorq.dequeue_work);
	flush_work(&vgdev->config_changed_work);
	vgdev->vdev->config->reset(vgdev->vdev);
	vgdev->vdev->config->del_vqs(vgdev->vdev);
}

void virtio_gpu_release(struct drm_device *dev)
{
	struct virtio_gpu_device *vgdev = dev->dev_private;

	virtio_gpu_modeset_fini(vgdev);
	virtio_gpu_free_vbufs(vgdev);
	virtio_gpu_cleanup_cap_cache(vgdev);
	kfree(vgdev->capsets);
	kfree(vgdev);
}

int virtio_gpu_driver_open(struct drm_device *dev, struct drm_file *file)
{
	struct virtio_gpu_device *vgdev = dev->dev_private;
	struct virtio_gpu_fpriv *vfpriv;
	int handle;

	/* can't create contexts without 3d renderer */
	if (!vgdev->has_virgl_3d)
		return 0;

	/* allocate a virt GPU context for this opener */
	vfpriv = kzalloc(sizeof(*vfpriv), GFP_KERNEL);
	if (!vfpriv)
		return -ENOMEM;

	mutex_init(&vfpriv->context_lock);

	handle = ida_alloc(&vgdev->ctx_id_ida, GFP_KERNEL);
	if (handle < 0) {
		kfree(vfpriv);
		return handle;
	}

	vfpriv->ctx_id = handle + 1;
	file->driver_priv = vfpriv;
	return 0;
}

void virtio_gpu_driver_postclose(struct drm_device *dev, struct drm_file *file)
{
	struct virtio_gpu_device *vgdev = dev->dev_private;
	struct virtio_gpu_fpriv *vfpriv = file->driver_priv;

	if (!vgdev->has_virgl_3d)
		return;

	if (vfpriv->context_created) {
		virtio_gpu_cmd_context_destroy(vgdev, vfpriv->ctx_id);
		virtio_gpu_notify(vgdev);
	}

	ida_free(&vgdev->ctx_id_ida, vfpriv->ctx_id - 1);
	mutex_destroy(&vfpriv->context_lock);
	kfree(vfpriv);
	file->driver_priv = NULL;
}
Commit	Line	Data
dc5698e8 DA	1	/*
	2	* Copyright (C) 2015 Red Hat, Inc.
	3	* All Rights Reserved.
	4	*
	5	* Permission is hereby granted, free of charge, to any person obtaining
	6	* a copy of this software and associated documentation files (the
	7	* "Software"), to deal in the Software without restriction, including
	8	* without limitation the rights to use, copy, modify, merge, publish,
	9	* distribute, sublicense, and/or sell copies of the Software, and to
	10	* permit persons to whom the Software is furnished to do so, subject to
	11	* the following conditions:
	12	*
	13	* The above copyright notice and this permission notice (including the
	14	* next paragraph) shall be included in all copies or substantial
	15	* portions of the Software.
	16	*
	17	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	18	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
	19	* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
	20	* IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
	21	* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
	22	* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
	23	* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
	24	*/
	25
	26	#include <linux/virtio.h>
	27	#include <linux/virtio_config.h>
5038a567	28	#include <linux/virtio_ring.h>
a3d63977 SR	29
	30	#include <drm/drm_file.h>
	31
dc5698e8 DA	32	#include "virtgpu_drv.h"
dc5698e8 DA	33
dc5698e8 DA	34	static void virtio_gpu_config_changed_work_func(struct work_struct *work)
	35	{
	36	struct virtio_gpu_device *vgdev =
	37	container_of(work, struct virtio_gpu_device,
	38	config_changed_work);
	39	u32 events_read, events_clear = 0;
	40
	41	/* read the config space */
	42	virtio_cread(vgdev->vdev, struct virtio_gpu_config,
	43	events_read, &events_read);
	44	if (events_read & VIRTIO_GPU_EVENT_DISPLAY) {
b4b01b49 GH	45	if (vgdev->has_edid)
b4b01b49 GH	46	virtio_gpu_cmd_get_edids(vgdev);
dc5698e8	47	virtio_gpu_cmd_get_display_info(vgdev);
234489ea	48	virtio_gpu_notify(vgdev);
dc5698e8 DA	49	drm_helper_hpd_irq_event(vgdev->ddev);
	50	events_clear \|= VIRTIO_GPU_EVENT_DISPLAY;
	51	}
	52	virtio_cwrite(vgdev->vdev, struct virtio_gpu_config,
	53	events_clear, &events_clear);
	54	}
	55
	56	static void virtio_gpu_init_vq(struct virtio_gpu_queue *vgvq,
	57	void (work_func)(struct work_struct work))
	58	{
	59	spin_lock_init(&vgvq->qlock);
	60	init_waitqueue_head(&vgvq->ack_queue);
	61	INIT_WORK(&vgvq->dequeue_work, work_func);
	62	}
	63
62fb7a5e GH	64	static void virtio_gpu_get_capsets(struct virtio_gpu_device *vgdev,
	65	int num_capsets)
	66	{
	67	int i, ret;
	68
	69	vgdev->capsets = kcalloc(num_capsets,
	70	sizeof(struct virtio_gpu_drv_capset),
	71	GFP_KERNEL);
	72	if (!vgdev->capsets) {
	73	DRM_ERROR("failed to allocate cap sets\n");
	74	return;
	75	}
	76	for (i = 0; i < num_capsets; i++) {
	77	virtio_gpu_cmd_get_capset_info(vgdev, i);
97452907	78	virtio_gpu_notify(vgdev);
62fb7a5e GH	79	ret = wait_event_timeout(vgdev->resp_wq,
	80	vgdev->capsets[i].id > 0, 5 * HZ);
	81	if (ret == 0) {
	82	DRM_ERROR("timed out waiting for cap set %d\n", i);
	83	kfree(vgdev->capsets);
	84	vgdev->capsets = NULL;
	85	return;
	86	}
	87	DRM_INFO("cap set %d: id %d, max-version %d, max-size %d\n",
	88	i, vgdev->capsets[i].id,
	89	vgdev->capsets[i].max_version,
	90	vgdev->capsets[i].max_size);
	91	}
	92	vgdev->num_capsets = num_capsets;
	93	}
	94
d516e75c	95	int virtio_gpu_init(struct drm_device *dev)
dc5698e8 DA	96	{
	97	static vq_callback_t *callbacks[] = {
	98	virtio_gpu_ctrl_ack, virtio_gpu_cursor_ack
	99	};
f7ad26ff	100	static const char * const names[] = { "control", "cursor" };
dc5698e8 DA	101
	102	struct virtio_gpu_device *vgdev;
	103	/* this will expand later */
	104	struct virtqueue *vqs[2];
62fb7a5e	105	u32 num_scanouts, num_capsets;
dc5698e8 DA	106	int ret;
dc5698e8 DA	107
18e51064	108	if (!virtio_has_feature(dev_to_virtio(dev->dev), VIRTIO_F_VERSION_1))
dc5698e8 DA	109	return -ENODEV;
	110
	111	vgdev = kzalloc(sizeof(struct virtio_gpu_device), GFP_KERNEL);
	112	if (!vgdev)
	113	return -ENOMEM;
	114
	115	vgdev->ddev = dev;
	116	dev->dev_private = vgdev;
18e51064	117	vgdev->vdev = dev_to_virtio(dev->dev);
dc5698e8 DA	118	vgdev->dev = dev->dev;
	119
	120	spin_lock_init(&vgdev->display_info_lock);
1938d1ae MW	121	ida_init(&vgdev->ctx_id_ida);
1938d1ae MW	122	ida_init(&vgdev->resource_ida);
dc5698e8 DA	123	init_waitqueue_head(&vgdev->resp_wq);
	124	virtio_gpu_init_vq(&vgdev->ctrlq, virtio_gpu_dequeue_ctrl_func);
	125	virtio_gpu_init_vq(&vgdev->cursorq, virtio_gpu_dequeue_cursor_func);
	126
f54d1867	127	vgdev->fence_drv.context = dma_fence_context_alloc(1);
dc5698e8 DA	128	spin_lock_init(&vgdev->fence_drv.lock);
dc5698e8 DA	129	INIT_LIST_HEAD(&vgdev->fence_drv.fences);
62fb7a5e	130	INIT_LIST_HEAD(&vgdev->cap_cache);
dc5698e8 DA	131	INIT_WORK(&vgdev->config_changed_work,
	132	virtio_gpu_config_changed_work_func);
	133
f0c6cef7 GH	134	INIT_WORK(&vgdev->obj_free_work,
	135	virtio_gpu_array_put_free_work);
	136	INIT_LIST_HEAD(&vgdev->obj_free_list);
	137	spin_lock_init(&vgdev->obj_free_lock);
	138
ff2ac58a	139	#ifdef __LITTLE_ENDIAN
62fb7a5e GH	140	if (virtio_has_feature(vgdev->vdev, VIRTIO_GPU_F_VIRGL))
62fb7a5e GH	141	vgdev->has_virgl_3d = true;
ff2ac58a	142	#endif
b4b01b49 GH	143	if (virtio_has_feature(vgdev->vdev, VIRTIO_GPU_F_EDID)) {
b4b01b49 GH	144	vgdev->has_edid = true;
b4b01b49	145	}
5edbb560 GH	146	if (virtio_has_feature(vgdev->vdev, VIRTIO_RING_F_INDIRECT_DESC)) {
	147	vgdev->has_indirect = true;
	148	}
62fb7a5e	149
9e370dfe GH	150	DRM_INFO("features: %cvirgl %cedid\n",
	151	vgdev->has_virgl_3d ? '+' : '-',
	152	vgdev->has_edid ? '+' : '-');
	153
9b2bbdb2	154	ret = virtio_find_vqs(vgdev->vdev, 2, vqs, callbacks, names, NULL);
dc5698e8 DA	155	if (ret) {
	156	DRM_ERROR("failed to find virt queues\n");
	157	goto err_vqs;
	158	}
	159	vgdev->ctrlq.vq = vqs[0];
	160	vgdev->cursorq.vq = vqs[1];
	161	ret = virtio_gpu_alloc_vbufs(vgdev);
	162	if (ret) {
	163	DRM_ERROR("failed to alloc vbufs\n");
	164	goto err_vbufs;
	165	}
	166
dc5698e8 DA	167	/* get display info */
	168	virtio_cread(vgdev->vdev, struct virtio_gpu_config,
	169	num_scanouts, &num_scanouts);
	170	vgdev->num_scanouts = min_t(uint32_t, num_scanouts,
	171	VIRTIO_GPU_MAX_SCANOUTS);
	172	if (!vgdev->num_scanouts) {
	173	DRM_ERROR("num_scanouts is zero\n");
	174	ret = -EINVAL;
	175	goto err_scanouts;
	176	}
62fb7a5e GH	177	DRM_INFO("number of scanouts: %d\n", num_scanouts);
	178
	179	virtio_cread(vgdev->vdev, struct virtio_gpu_config,
	180	num_capsets, &num_capsets);
	181	DRM_INFO("number of cap sets: %d\n", num_capsets);
dc5698e8	182
d516e75c	183	virtio_gpu_modeset_init(vgdev);
dc5698e8 DA	184
dc5698e8 DA	185	virtio_device_ready(vgdev->vdev);
dc5698e8	186
62fb7a5e GH	187	if (num_capsets)
62fb7a5e GH	188	virtio_gpu_get_capsets(vgdev, num_capsets);
b4b01b49 GH	189	if (vgdev->has_edid)
b4b01b49 GH	190	virtio_gpu_cmd_get_edids(vgdev);
441012af	191	virtio_gpu_cmd_get_display_info(vgdev);
234489ea	192	virtio_gpu_notify(vgdev);
441012af DA	193	wait_event_timeout(vgdev->resp_wq, !vgdev->display_info_pending,
441012af DA	194	5 * HZ);
dc5698e8 DA	195	return 0;
dc5698e8 DA	196
dc5698e8	197	err_scanouts:
dc5698e8 DA	198	virtio_gpu_free_vbufs(vgdev);
	199	err_vbufs:
	200	vgdev->vdev->config->del_vqs(vgdev->vdev);
	201	err_vqs:
	202	kfree(vgdev);
	203	return ret;
	204	}
	205
62fb7a5e GH	206	static void virtio_gpu_cleanup_cap_cache(struct virtio_gpu_device *vgdev)
	207	{
	208	struct virtio_gpu_drv_cap_cache cache_ent, tmp;
	209
	210	list_for_each_entry_safe(cache_ent, tmp, &vgdev->cap_cache, head) {
	211	kfree(cache_ent->caps_cache);
	212	kfree(cache_ent);
	213	}
	214	}
	215
d516e75c	216	void virtio_gpu_deinit(struct drm_device *dev)
dc5698e8 DA	217	{
	218	struct virtio_gpu_device *vgdev = dev->dev_private;
	219
f0c6cef7	220	flush_work(&vgdev->obj_free_work);
dc5698e8 DA	221	flush_work(&vgdev->ctrlq.dequeue_work);
	222	flush_work(&vgdev->cursorq.dequeue_work);
	223	flush_work(&vgdev->config_changed_work);
edde9fc5	224	vgdev->vdev->config->reset(vgdev->vdev);
dc5698e8	225	vgdev->vdev->config->del_vqs(vgdev->vdev);
b1df3a2b GH	226	}
	227
	228	void virtio_gpu_release(struct drm_device *dev)
	229	{
	230	struct virtio_gpu_device *vgdev = dev->dev_private;
dc5698e8 DA	231
dc5698e8 DA	232	virtio_gpu_modeset_fini(vgdev);
dc5698e8	233	virtio_gpu_free_vbufs(vgdev);
62fb7a5e GH	234	virtio_gpu_cleanup_cap_cache(vgdev);
62fb7a5e GH	235	kfree(vgdev->capsets);
dc5698e8	236	kfree(vgdev);
dc5698e8	237	}
62fb7a5e GH	238
	239	int virtio_gpu_driver_open(struct drm_device dev, struct drm_file file)
	240	{
	241	struct virtio_gpu_device *vgdev = dev->dev_private;
	242	struct virtio_gpu_fpriv *vfpriv;
40cadedd	243	int handle;
62fb7a5e GH	244
	245	/* can't create contexts without 3d renderer */
	246	if (!vgdev->has_virgl_3d)
	247	return 0;
	248
62fb7a5e GH	249	/* allocate a virt GPU context for this opener */
	250	vfpriv = kzalloc(sizeof(*vfpriv), GFP_KERNEL);
	251	if (!vfpriv)
	252	return -ENOMEM;
	253
d2a983b2 GS	254	mutex_init(&vfpriv->context_lock);
d2a983b2 GS	255
40cadedd GS	256	handle = ida_alloc(&vgdev->ctx_id_ida, GFP_KERNEL);
40cadedd GS	257	if (handle < 0) {
040b595a	258	kfree(vfpriv);
40cadedd	259	return handle;
040b595a	260	}
62fb7a5e	261
40cadedd	262	vfpriv->ctx_id = handle + 1;
62fb7a5e GH	263	file->driver_priv = vfpriv;
	264	return 0;
	265	}
	266
	267	void virtio_gpu_driver_postclose(struct drm_device dev, struct drm_file file)
	268	{
	269	struct virtio_gpu_device *vgdev = dev->dev_private;
45c5d2a4	270	struct virtio_gpu_fpriv *vfpriv = file->driver_priv;
62fb7a5e GH	271
	272	if (!vgdev->has_virgl_3d)
	273	return;
	274
45c5d2a4 GS	275	if (vfpriv->context_created) {
	276	virtio_gpu_cmd_context_destroy(vgdev, vfpriv->ctx_id);
	277	virtio_gpu_notify(vgdev);
	278	}
62fb7a5e	279
45c5d2a4	280	ida_free(&vgdev->ctx_id_ida, vfpriv->ctx_id - 1);
d2a983b2	281	mutex_destroy(&vfpriv->context_lock);
62fb7a5e GH	282	kfree(vfpriv);
	283	file->driver_priv = NULL;
	284	}