[mirror_ubuntu-zesty-kernel.git] / drivers / gpu / drm / vmwgfx / vmwgfx_ioctl.c

/**************************************************************************
 *
 * Copyright © 2009-2015 VMware, Inc., Palo Alto, CA., USA
 * All Rights Reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the
 * "Software"), to deal in the Software without restriction, including
 * without limitation the rights to use, copy, modify, merge, publish,
 * distribute, sub license, and/or sell copies of the Software, and to
 * permit persons to whom the Software is furnished to do so, subject to
 * the following conditions:
 *
 * The above copyright notice and this permission notice (including the
 * next paragraph) shall be included in all copies or substantial portions
 * of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 * USE OR OTHER DEALINGS IN THE SOFTWARE.
 *
 **************************************************************************/

#include "vmwgfx_drv.h"
#include <drm/vmwgfx_drm.h>
#include "vmwgfx_kms.h"
#include "device_include/svga3d_caps.h"

struct svga_3d_compat_cap {
	SVGA3dCapsRecordHeader header;
	SVGA3dCapPair pairs[SVGA3D_DEVCAP_MAX];
};

int vmw_getparam_ioctl(struct drm_device *dev, void *data,
		       struct drm_file *file_priv)
{
	struct vmw_private *dev_priv = vmw_priv(dev);
	struct drm_vmw_getparam_arg *param =
	    (struct drm_vmw_getparam_arg *)data;
	struct vmw_fpriv *vmw_fp = vmw_fpriv(file_priv);

	switch (param->param) {
	case DRM_VMW_PARAM_NUM_STREAMS:
		param->value = vmw_overlay_num_overlays(dev_priv);
		break;
	case DRM_VMW_PARAM_NUM_FREE_STREAMS:
		param->value = vmw_overlay_num_free_overlays(dev_priv);
		break;
	case DRM_VMW_PARAM_3D:
		param->value = vmw_fifo_have_3d(dev_priv) ? 1 : 0;
		break;
	case DRM_VMW_PARAM_HW_CAPS:
		param->value = dev_priv->capabilities;
		break;
	case DRM_VMW_PARAM_FIFO_CAPS:
		param->value = dev_priv->fifo.capabilities;
		break;
	case DRM_VMW_PARAM_MAX_FB_SIZE:
		param->value = dev_priv->prim_bb_mem;
		break;
	case DRM_VMW_PARAM_FIFO_HW_VERSION:
	{
		u32 *fifo_mem = dev_priv->mmio_virt;
		const struct vmw_fifo_state *fifo = &dev_priv->fifo;

		if ((dev_priv->capabilities & SVGA_CAP_GBOBJECTS)) {
			param->value = SVGA3D_HWVERSION_WS8_B1;
			break;
		}

		param->value =
			vmw_mmio_read(fifo_mem +
				      ((fifo->capabilities &
					SVGA_FIFO_CAP_3D_HWVERSION_REVISED) ?
				       SVGA_FIFO_3D_HWVERSION_REVISED :
				       SVGA_FIFO_3D_HWVERSION));
		break;
	}
	case DRM_VMW_PARAM_MAX_SURF_MEMORY:
		if ((dev_priv->capabilities & SVGA_CAP_GBOBJECTS) &&
		    !vmw_fp->gb_aware)
			param->value = dev_priv->max_mob_pages * PAGE_SIZE / 2;
		else
			param->value = dev_priv->memory_size;
		break;
	case DRM_VMW_PARAM_3D_CAPS_SIZE:
		if ((dev_priv->capabilities & SVGA_CAP_GBOBJECTS) &&
		    vmw_fp->gb_aware)
			param->value = SVGA3D_DEVCAP_MAX * sizeof(uint32_t);
		else if (dev_priv->capabilities & SVGA_CAP_GBOBJECTS)
			param->value = sizeof(struct svga_3d_compat_cap) +
				sizeof(uint32_t);
		else
			param->value = (SVGA_FIFO_3D_CAPS_LAST -
					SVGA_FIFO_3D_CAPS + 1) *
				sizeof(uint32_t);
		break;
	case DRM_VMW_PARAM_MAX_MOB_MEMORY:
		vmw_fp->gb_aware = true;
		param->value = dev_priv->max_mob_pages * PAGE_SIZE;
		break;
	case DRM_VMW_PARAM_MAX_MOB_SIZE:
		param->value = dev_priv->max_mob_size;
		break;
	case DRM_VMW_PARAM_SCREEN_TARGET:
		param->value =
			(dev_priv->active_display_unit == vmw_du_screen_target);
		break;
	case DRM_VMW_PARAM_DX:
		param->value = dev_priv->has_dx;
		break;
	default:
		return -EINVAL;
	}

	return 0;
}

static u32 vmw_mask_multisample(unsigned int cap, u32 fmt_value)
{
	/* If the header is updated, update the format test as well! */
	BUILD_BUG_ON(SVGA3D_DEVCAP_DXFMT_BC5_UNORM + 1 != SVGA3D_DEVCAP_MAX);

	if (cap >= SVGA3D_DEVCAP_DXFMT_X8R8G8B8 &&
	    cap <= SVGA3D_DEVCAP_DXFMT_BC5_UNORM)
		fmt_value &= ~(SVGADX_DXFMT_MULTISAMPLE_2 |
			       SVGADX_DXFMT_MULTISAMPLE_4 |
			       SVGADX_DXFMT_MULTISAMPLE_8);
	else if (cap == SVGA3D_DEVCAP_MULTISAMPLE_MASKABLESAMPLES)
		return 0;

	return fmt_value;
}

static int vmw_fill_compat_cap(struct vmw_private *dev_priv, void *bounce,
			       size_t size)
{
	struct svga_3d_compat_cap *compat_cap =
		(struct svga_3d_compat_cap *) bounce;
	unsigned int i;
	size_t pair_offset = offsetof(struct svga_3d_compat_cap, pairs);
	unsigned int max_size;

	if (size < pair_offset)
		return -EINVAL;

	max_size = (size - pair_offset) / sizeof(SVGA3dCapPair);

	if (max_size > SVGA3D_DEVCAP_MAX)
		max_size = SVGA3D_DEVCAP_MAX;

	compat_cap->header.length =
		(pair_offset + max_size * sizeof(SVGA3dCapPair)) / sizeof(u32);
	compat_cap->header.type = SVGA3DCAPS_RECORD_DEVCAPS;

	spin_lock(&dev_priv->cap_lock);
	for (i = 0; i < max_size; ++i) {
		vmw_write(dev_priv, SVGA_REG_DEV_CAP, i);
		compat_cap->pairs[i][0] = i;
		compat_cap->pairs[i][1] = vmw_mask_multisample
			(i, vmw_read(dev_priv, SVGA_REG_DEV_CAP));
	}
	spin_unlock(&dev_priv->cap_lock);

	return 0;
}


int vmw_get_cap_3d_ioctl(struct drm_device *dev, void *data,
			 struct drm_file *file_priv)
{
	struct drm_vmw_get_3d_cap_arg *arg =
		(struct drm_vmw_get_3d_cap_arg *) data;
	struct vmw_private *dev_priv = vmw_priv(dev);
	uint32_t size;
	u32 *fifo_mem;
	void __user *buffer = (void __user *)((unsigned long)(arg->buffer));
	void *bounce;
	int ret;
	bool gb_objects = !!(dev_priv->capabilities & SVGA_CAP_GBOBJECTS);
	struct vmw_fpriv *vmw_fp = vmw_fpriv(file_priv);

	if (unlikely(arg->pad64 != 0 || arg->max_size == 0)) {
		DRM_ERROR("Illegal GET_3D_CAP argument.\n");
		return -EINVAL;
	}

	if (gb_objects && vmw_fp->gb_aware)
		size = SVGA3D_DEVCAP_MAX * sizeof(uint32_t);
	else if (gb_objects)
		size = sizeof(struct svga_3d_compat_cap) + sizeof(uint32_t);
	else
		size = (SVGA_FIFO_3D_CAPS_LAST - SVGA_FIFO_3D_CAPS + 1) *
			sizeof(uint32_t);

	if (arg->max_size < size)
		size = arg->max_size;

	bounce = vzalloc(size);
	if (unlikely(bounce == NULL)) {
		DRM_ERROR("Failed to allocate bounce buffer for 3D caps.\n");
		return -ENOMEM;
	}

	if (gb_objects && vmw_fp->gb_aware) {
		int i, num;
		uint32_t *bounce32 = (uint32_t *) bounce;

		num = size / sizeof(uint32_t);
		if (num > SVGA3D_DEVCAP_MAX)
			num = SVGA3D_DEVCAP_MAX;

		spin_lock(&dev_priv->cap_lock);
		for (i = 0; i < num; ++i) {
			vmw_write(dev_priv, SVGA_REG_DEV_CAP, i);
			*bounce32++ = vmw_mask_multisample
				(i, vmw_read(dev_priv, SVGA_REG_DEV_CAP));
		}
		spin_unlock(&dev_priv->cap_lock);
	} else if (gb_objects) {
		ret = vmw_fill_compat_cap(dev_priv, bounce, size);
		if (unlikely(ret != 0))
			goto out_err;
	} else {
		fifo_mem = dev_priv->mmio_virt;
		memcpy(bounce, &fifo_mem[SVGA_FIFO_3D_CAPS], size);
	}

	ret = copy_to_user(buffer, bounce, size);
	if (ret)
		ret = -EFAULT;
out_err:
	vfree(bounce);

	if (unlikely(ret != 0))
		DRM_ERROR("Failed to report 3D caps info.\n");

	return ret;
}

int vmw_present_ioctl(struct drm_device *dev, void *data,
		      struct drm_file *file_priv)
{
	struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
	struct vmw_private *dev_priv = vmw_priv(dev);
	struct drm_vmw_present_arg *arg =
		(struct drm_vmw_present_arg *)data;
	struct vmw_surface *surface;
	struct drm_vmw_rect __user *clips_ptr;
	struct drm_vmw_rect *clips = NULL;
	struct drm_framebuffer *fb;
	struct vmw_framebuffer *vfb;
	struct vmw_resource *res;
	uint32_t num_clips;
	int ret;

	num_clips = arg->num_clips;
	clips_ptr = (struct drm_vmw_rect __user *)(unsigned long)arg->clips_ptr;

	if (unlikely(num_clips == 0))
		return 0;

	if (clips_ptr == NULL) {
		DRM_ERROR("Variable clips_ptr must be specified.\n");
		ret = -EINVAL;
		goto out_clips;
	}

	clips = kcalloc(num_clips, sizeof(*clips), GFP_KERNEL);
	if (clips == NULL) {
		DRM_ERROR("Failed to allocate clip rect list.\n");
		ret = -ENOMEM;
		goto out_clips;
	}

	ret = copy_from_user(clips, clips_ptr, num_clips * sizeof(*clips));
	if (ret) {
		DRM_ERROR("Failed to copy clip rects from userspace.\n");
		ret = -EFAULT;
		goto out_no_copy;
	}

	drm_modeset_lock_all(dev);

	fb = drm_framebuffer_lookup(dev, arg->fb_id);
	if (!fb) {
		DRM_ERROR("Invalid framebuffer id.\n");
		ret = -ENOENT;
		goto out_no_fb;
	}
	vfb = vmw_framebuffer_to_vfb(fb);

	ret = ttm_read_lock(&dev_priv->reservation_sem, true);
	if (unlikely(ret != 0))
		goto out_no_ttm_lock;

	ret = vmw_user_resource_lookup_handle(dev_priv, tfile, arg->sid,
					      user_surface_converter,
					      &res);
	if (ret)
		goto out_no_surface;

	surface = vmw_res_to_srf(res);
	ret = vmw_kms_present(dev_priv, file_priv,
			      vfb, surface, arg->sid,
			      arg->dest_x, arg->dest_y,
			      clips, num_clips);

	/* vmw_user_surface_lookup takes one ref so does new_fb */
	vmw_surface_unreference(&surface);

out_no_surface:
	ttm_read_unlock(&dev_priv->reservation_sem);
out_no_ttm_lock:
	drm_framebuffer_unreference(fb);
out_no_fb:
	drm_modeset_unlock_all(dev);
out_no_copy:
	kfree(clips);
out_clips:
	return ret;
}

int vmw_present_readback_ioctl(struct drm_device *dev, void *data,
			       struct drm_file *file_priv)
{
	struct vmw_private *dev_priv = vmw_priv(dev);
	struct drm_vmw_present_readback_arg *arg =
		(struct drm_vmw_present_readback_arg *)data;
	struct drm_vmw_fence_rep __user *user_fence_rep =
		(struct drm_vmw_fence_rep __user *)
		(unsigned long)arg->fence_rep;
	struct drm_vmw_rect __user *clips_ptr;
	struct drm_vmw_rect *clips = NULL;
	struct drm_framebuffer *fb;
	struct vmw_framebuffer *vfb;
	uint32_t num_clips;
	int ret;

	num_clips = arg->num_clips;
	clips_ptr = (struct drm_vmw_rect __user *)(unsigned long)arg->clips_ptr;

	if (unlikely(num_clips == 0))
		return 0;

	if (clips_ptr == NULL) {
		DRM_ERROR("Argument clips_ptr must be specified.\n");
		ret = -EINVAL;
		goto out_clips;
	}

	clips = kcalloc(num_clips, sizeof(*clips), GFP_KERNEL);
	if (clips == NULL) {
		DRM_ERROR("Failed to allocate clip rect list.\n");
		ret = -ENOMEM;
		goto out_clips;
	}

	ret = copy_from_user(clips, clips_ptr, num_clips * sizeof(*clips));
	if (ret) {
		DRM_ERROR("Failed to copy clip rects from userspace.\n");
		ret = -EFAULT;
		goto out_no_copy;
	}

	drm_modeset_lock_all(dev);

	fb = drm_framebuffer_lookup(dev, arg->fb_id);
	if (!fb) {
		DRM_ERROR("Invalid framebuffer id.\n");
		ret = -ENOENT;
		goto out_no_fb;
	}

	vfb = vmw_framebuffer_to_vfb(fb);
	if (!vfb->dmabuf) {
		DRM_ERROR("Framebuffer not dmabuf backed.\n");
		ret = -EINVAL;
		goto out_no_ttm_lock;
	}

	ret = ttm_read_lock(&dev_priv->reservation_sem, true);
	if (unlikely(ret != 0))
		goto out_no_ttm_lock;

	ret = vmw_kms_readback(dev_priv, file_priv,
			       vfb, user_fence_rep,
			       clips, num_clips);

	ttm_read_unlock(&dev_priv->reservation_sem);
out_no_ttm_lock:
	drm_framebuffer_unreference(fb);
out_no_fb:
	drm_modeset_unlock_all(dev);
out_no_copy:
	kfree(clips);
out_clips:
	return ret;
}


/**
 * vmw_fops_poll - wrapper around the drm_poll function
 *
 * @filp: See the linux fops poll documentation.
 * @wait: See the linux fops poll documentation.
 *
 * Wrapper around the drm_poll function that makes sure the device is
 * processing the fifo if drm_poll decides to wait.
 */
unsigned int vmw_fops_poll(struct file *filp, struct poll_table_struct *wait)
{
	struct drm_file *file_priv = filp->private_data;
	struct vmw_private *dev_priv =
		vmw_priv(file_priv->minor->dev);

	vmw_fifo_ping_host(dev_priv, SVGA_SYNC_GENERIC);
	return drm_poll(filp, wait);
}


/**
 * vmw_fops_read - wrapper around the drm_read function
 *
 * @filp: See the linux fops read documentation.
 * @buffer: See the linux fops read documentation.
 * @count: See the linux fops read documentation.
 * offset: See the linux fops read documentation.
 *
 * Wrapper around the drm_read function that makes sure the device is
 * processing the fifo if drm_read decides to wait.
 */
ssize_t vmw_fops_read(struct file *filp, char __user *buffer,
		      size_t count, loff_t *offset)
{
	struct drm_file *file_priv = filp->private_data;
	struct vmw_private *dev_priv =
		vmw_priv(file_priv->minor->dev);

	vmw_fifo_ping_host(dev_priv, SVGA_SYNC_GENERIC);
	return drm_read(filp, buffer, count, offset);
}
Commit	Line	Data
fb1d9738 JB	1	/**************************************************************************
fb1d9738 JB	2	*
54fbde8a	3	* Copyright © 2009-2015 VMware, Inc., Palo Alto, CA., USA
fb1d9738 JB	4	* All Rights Reserved.
	5	*
	6	* Permission is hereby granted, free of charge, to any person obtaining a
	7	* copy of this software and associated documentation files (the
	8	* "Software"), to deal in the Software without restriction, including
	9	* without limitation the rights to use, copy, modify, merge, publish,
	10	* distribute, sub license, and/or sell copies of the Software, and to
	11	* permit persons to whom the Software is furnished to do so, subject to
	12	* the following conditions:
	13	*
	14	* The above copyright notice and this permission notice (including the
	15	* next paragraph) shall be included in all copies or substantial portions
	16	* of the Software.
	17	*
	18	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	19	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	20	* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
	21	* THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
	22	* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
	23	* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
	24	* USE OR OTHER DEALINGS IN THE SOFTWARE.
	25	*
	26	**************************************************************************/
	27
	28	#include "vmwgfx_drv.h"
760285e7	29	#include <drm/vmwgfx_drm.h>
2fcd5a73	30	#include "vmwgfx_kms.h"
8ce75f8a	31	#include "device_include/svga3d_caps.h"
fb1d9738	32
a6fc955f TH	33	struct svga_3d_compat_cap {
	34	SVGA3dCapsRecordHeader header;
	35	SVGA3dCapPair pairs[SVGA3D_DEVCAP_MAX];
	36	};
	37
fb1d9738 JB	38	int vmw_getparam_ioctl(struct drm_device dev, void data,
	39	struct drm_file *file_priv)
	40	{
	41	struct vmw_private *dev_priv = vmw_priv(dev);
	42	struct drm_vmw_getparam_arg *param =
	43	(struct drm_vmw_getparam_arg *)data;
a6fc955f	44	struct vmw_fpriv *vmw_fp = vmw_fpriv(file_priv);
fb1d9738 JB	45
	46	switch (param->param) {
	47	case DRM_VMW_PARAM_NUM_STREAMS:
	48	param->value = vmw_overlay_num_overlays(dev_priv);
	49	break;
	50	case DRM_VMW_PARAM_NUM_FREE_STREAMS:
	51	param->value = vmw_overlay_num_free_overlays(dev_priv);
	52	break;
	53	case DRM_VMW_PARAM_3D:
8e19a951	54	param->value = vmw_fifo_have_3d(dev_priv) ? 1 : 0;
fb1d9738	55	break;
f77cef3d TH	56	case DRM_VMW_PARAM_HW_CAPS:
	57	param->value = dev_priv->capabilities;
	58	break;
	59	case DRM_VMW_PARAM_FIFO_CAPS:
	60	param->value = dev_priv->fifo.capabilities;
	61	break;
30f47fc8	62	case DRM_VMW_PARAM_MAX_FB_SIZE:
bc2d6508	63	param->value = dev_priv->prim_bb_mem;
30f47fc8	64	break;
f63f6a59 TH	65	case DRM_VMW_PARAM_FIFO_HW_VERSION:
f63f6a59 TH	66	{
b76ff5ea	67	u32 *fifo_mem = dev_priv->mmio_virt;
ebd4c6f6	68	const struct vmw_fifo_state *fifo = &dev_priv->fifo;
f63f6a59	69
a6fc955f TH	70	if ((dev_priv->capabilities & SVGA_CAP_GBOBJECTS)) {
	71	param->value = SVGA3D_HWVERSION_WS8_B1;
	72	break;
	73	}
	74
ebd4c6f6	75	param->value =
b76ff5ea TH	76	vmw_mmio_read(fifo_mem +
	77	((fifo->capabilities &
	78	SVGA_FIFO_CAP_3D_HWVERSION_REVISED) ?
	79	SVGA_FIFO_3D_HWVERSION_REVISED :
	80	SVGA_FIFO_3D_HWVERSION));
f63f6a59 TH	81	break;
f63f6a59 TH	82	}
716a2fd6	83	case DRM_VMW_PARAM_MAX_SURF_MEMORY:
a6fc955f TH	84	if ((dev_priv->capabilities & SVGA_CAP_GBOBJECTS) &&
	85	!vmw_fp->gb_aware)
	86	param->value = dev_priv->max_mob_pages * PAGE_SIZE / 2;
	87	else
	88	param->value = dev_priv->memory_size;
716a2fd6 TH	89	break;
716a2fd6 TH	90	case DRM_VMW_PARAM_3D_CAPS_SIZE:
a6fc955f TH	91	if ((dev_priv->capabilities & SVGA_CAP_GBOBJECTS) &&
	92	vmw_fp->gb_aware)
	93	param->value = SVGA3D_DEVCAP_MAX * sizeof(uint32_t);
	94	else if (dev_priv->capabilities & SVGA_CAP_GBOBJECTS)
	95	param->value = sizeof(struct svga_3d_compat_cap) +
	96	sizeof(uint32_t);
716a2fd6 TH	97	else
716a2fd6 TH	98	param->value = (SVGA_FIFO_3D_CAPS_LAST -
a6fc955f TH	99	SVGA_FIFO_3D_CAPS + 1) *
a6fc955f TH	100	sizeof(uint32_t);
716a2fd6	101	break;
311474db	102	case DRM_VMW_PARAM_MAX_MOB_MEMORY:
a6fc955f	103	vmw_fp->gb_aware = true;
311474db TH	104	param->value = dev_priv->max_mob_pages * PAGE_SIZE;
311474db TH	105	break;
857aea1c CL	106	case DRM_VMW_PARAM_MAX_MOB_SIZE:
	107	param->value = dev_priv->max_mob_size;
	108	break;
35c05125 SY	109	case DRM_VMW_PARAM_SCREEN_TARGET:
	110	param->value =
	111	(dev_priv->active_display_unit == vmw_du_screen_target);
	112	break;
d80efd5c TH	113	case DRM_VMW_PARAM_DX:
	114	param->value = dev_priv->has_dx;
	115	break;
fb1d9738	116	default:
fb1d9738 JB	117	return -EINVAL;
	118	}
	119
	120	return 0;
	121	}
f63f6a59	122
53c1e535 TH	123	static u32 vmw_mask_multisample(unsigned int cap, u32 fmt_value)
	124	{
	125	/* If the header is updated, update the format test as well! */
	126	BUILD_BUG_ON(SVGA3D_DEVCAP_DXFMT_BC5_UNORM + 1 != SVGA3D_DEVCAP_MAX);
	127
	128	if (cap >= SVGA3D_DEVCAP_DXFMT_X8R8G8B8 &&
	129	cap <= SVGA3D_DEVCAP_DXFMT_BC5_UNORM)
	130	fmt_value &= ~(SVGADX_DXFMT_MULTISAMPLE_2 \|
	131	SVGADX_DXFMT_MULTISAMPLE_4 \|
	132	SVGADX_DXFMT_MULTISAMPLE_8);
	133	else if (cap == SVGA3D_DEVCAP_MULTISAMPLE_MASKABLESAMPLES)
	134	return 0;
	135
	136	return fmt_value;
	137	}
	138
a6fc955f TH	139	static int vmw_fill_compat_cap(struct vmw_private dev_priv, void bounce,
	140	size_t size)
	141	{
	142	struct svga_3d_compat_cap *compat_cap =
	143	(struct svga_3d_compat_cap *) bounce;
	144	unsigned int i;
	145	size_t pair_offset = offsetof(struct svga_3d_compat_cap, pairs);
	146	unsigned int max_size;
	147
	148	if (size < pair_offset)
	149	return -EINVAL;
	150
	151	max_size = (size - pair_offset) / sizeof(SVGA3dCapPair);
	152
	153	if (max_size > SVGA3D_DEVCAP_MAX)
	154	max_size = SVGA3D_DEVCAP_MAX;
	155
	156	compat_cap->header.length =
	157	(pair_offset + max_size * sizeof(SVGA3dCapPair)) / sizeof(u32);
	158	compat_cap->header.type = SVGA3DCAPS_RECORD_DEVCAPS;
	159
496eb6fd	160	spin_lock(&dev_priv->cap_lock);
a6fc955f TH	161	for (i = 0; i < max_size; ++i) {
	162	vmw_write(dev_priv, SVGA_REG_DEV_CAP, i);
	163	compat_cap->pairs[i][0] = i;
53c1e535 TH	164	compat_cap->pairs[i][1] = vmw_mask_multisample
53c1e535 TH	165	(i, vmw_read(dev_priv, SVGA_REG_DEV_CAP));
a6fc955f	166	}
496eb6fd	167	spin_unlock(&dev_priv->cap_lock);
a6fc955f TH	168
	169	return 0;
	170	}
	171
f63f6a59 TH	172
	173	int vmw_get_cap_3d_ioctl(struct drm_device dev, void data,
	174	struct drm_file *file_priv)
	175	{
	176	struct drm_vmw_get_3d_cap_arg *arg =
	177	(struct drm_vmw_get_3d_cap_arg *) data;
	178	struct vmw_private *dev_priv = vmw_priv(dev);
	179	uint32_t size;
b76ff5ea	180	u32 *fifo_mem;
f63f6a59 TH	181	void __user buffer = (void __user )((unsigned long)(arg->buffer));
	182	void *bounce;
	183	int ret;
716a2fd6	184	bool gb_objects = !!(dev_priv->capabilities & SVGA_CAP_GBOBJECTS);
a6fc955f	185	struct vmw_fpriv *vmw_fp = vmw_fpriv(file_priv);
f63f6a59	186
7dac4774	187	if (unlikely(arg->pad64 != 0 \|\| arg->max_size == 0)) {
f63f6a59 TH	188	DRM_ERROR("Illegal GET_3D_CAP argument.\n");
	189	return -EINVAL;
	190	}
	191
a6fc955f TH	192	if (gb_objects && vmw_fp->gb_aware)
	193	size = SVGA3D_DEVCAP_MAX * sizeof(uint32_t);
	194	else if (gb_objects)
	195	size = sizeof(struct svga_3d_compat_cap) + sizeof(uint32_t);
716a2fd6	196	else
a6fc955f TH	197	size = (SVGA_FIFO_3D_CAPS_LAST - SVGA_FIFO_3D_CAPS + 1) *
a6fc955f TH	198	sizeof(uint32_t);
f63f6a59 TH	199
	200	if (arg->max_size < size)
	201	size = arg->max_size;
	202
a6fc955f	203	bounce = vzalloc(size);
f63f6a59 TH	204	if (unlikely(bounce == NULL)) {
	205	DRM_ERROR("Failed to allocate bounce buffer for 3D caps.\n");
	206	return -ENOMEM;
	207	}
	208
a6fc955f TH	209	if (gb_objects && vmw_fp->gb_aware) {
a6fc955f TH	210	int i, num;
716a2fd6 TH	211	uint32_t bounce32 = (uint32_t ) bounce;
716a2fd6 TH	212
a6fc955f	213	num = size / sizeof(uint32_t);
2f633e5e CL	214	if (num > SVGA3D_DEVCAP_MAX)
2f633e5e CL	215	num = SVGA3D_DEVCAP_MAX;
a6fc955f	216
496eb6fd	217	spin_lock(&dev_priv->cap_lock);
a6fc955f	218	for (i = 0; i < num; ++i) {
716a2fd6	219	vmw_write(dev_priv, SVGA_REG_DEV_CAP, i);
53c1e535 TH	220	*bounce32++ = vmw_mask_multisample
53c1e535 TH	221	(i, vmw_read(dev_priv, SVGA_REG_DEV_CAP));
716a2fd6	222	}
496eb6fd	223	spin_unlock(&dev_priv->cap_lock);
a6fc955f TH	224	} else if (gb_objects) {
	225	ret = vmw_fill_compat_cap(dev_priv, bounce, size);
	226	if (unlikely(ret != 0))
	227	goto out_err;
716a2fd6	228	} else {
716a2fd6	229	fifo_mem = dev_priv->mmio_virt;
b76ff5ea	230	memcpy(bounce, &fifo_mem[SVGA_FIFO_3D_CAPS], size);
716a2fd6	231	}
f63f6a59 TH	232
f63f6a59 TH	233	ret = copy_to_user(buffer, bounce, size);
888155bb DC	234	if (ret)
888155bb DC	235	ret = -EFAULT;
a6fc955f	236	out_err:
f63f6a59 TH	237	vfree(bounce);
	238
	239	if (unlikely(ret != 0))
	240	DRM_ERROR("Failed to report 3D caps info.\n");
	241
	242	return ret;
	243	}
2fcd5a73 JB	244
	245	int vmw_present_ioctl(struct drm_device dev, void data,
	246	struct drm_file *file_priv)
	247	{
	248	struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
	249	struct vmw_private *dev_priv = vmw_priv(dev);
	250	struct drm_vmw_present_arg *arg =
	251	(struct drm_vmw_present_arg *)data;
	252	struct vmw_surface *surface;
2fcd5a73 JB	253	struct drm_vmw_rect __user *clips_ptr;
2fcd5a73 JB	254	struct drm_vmw_rect *clips = NULL;
786b99ed	255	struct drm_framebuffer *fb;
2fcd5a73	256	struct vmw_framebuffer *vfb;
c0951b79	257	struct vmw_resource *res;
2fcd5a73 JB	258	uint32_t num_clips;
	259	int ret;
	260
	261	num_clips = arg->num_clips;
b9eb1a61	262	clips_ptr = (struct drm_vmw_rect __user *)(unsigned long)arg->clips_ptr;
2fcd5a73 JB	263
	264	if (unlikely(num_clips == 0))
	265	return 0;
	266
	267	if (clips_ptr == NULL) {
	268	DRM_ERROR("Variable clips_ptr must be specified.\n");
	269	ret = -EINVAL;
	270	goto out_clips;
	271	}
	272
24bb5a0c	273	clips = kcalloc(num_clips, sizeof(*clips), GFP_KERNEL);
2fcd5a73 JB	274	if (clips == NULL) {
	275	DRM_ERROR("Failed to allocate clip rect list.\n");
	276	ret = -ENOMEM;
	277	goto out_clips;
	278	}
	279
	280	ret = copy_from_user(clips, clips_ptr, num_clips * sizeof(*clips));
	281	if (ret) {
	282	DRM_ERROR("Failed to copy clip rects from userspace.\n");
d2c184fb	283	ret = -EFAULT;
2fcd5a73 JB	284	goto out_no_copy;
	285	}
	286
bbe4b99f	287	drm_modeset_lock_all(dev);
2fcd5a73	288
786b99ed DV	289	fb = drm_framebuffer_lookup(dev, arg->fb_id);
786b99ed DV	290	if (!fb) {
2fcd5a73	291	DRM_ERROR("Invalid framebuffer id.\n");
43789b9e	292	ret = -ENOENT;
2fcd5a73 JB	293	goto out_no_fb;
2fcd5a73 JB	294	}
786b99ed	295	vfb = vmw_framebuffer_to_vfb(fb);
2fcd5a73	296
294adf7d	297	ret = ttm_read_lock(&dev_priv->reservation_sem, true);
2fcd5a73 JB	298	if (unlikely(ret != 0))
	299	goto out_no_ttm_lock;
	300
c0951b79 TH	301	ret = vmw_user_resource_lookup_handle(dev_priv, tfile, arg->sid,
	302	user_surface_converter,
	303	&res);
2fcd5a73 JB	304	if (ret)
	305	goto out_no_surface;
	306
c0951b79	307	surface = vmw_res_to_srf(res);
2fcd5a73 JB	308	ret = vmw_kms_present(dev_priv, file_priv,
	309	vfb, surface, arg->sid,
	310	arg->dest_x, arg->dest_y,
	311	clips, num_clips);
	312
	313	/* vmw_user_surface_lookup takes one ref so does new_fb */
	314	vmw_surface_unreference(&surface);
	315
	316	out_no_surface:
294adf7d	317	ttm_read_unlock(&dev_priv->reservation_sem);
2fcd5a73	318	out_no_ttm_lock:
2fd5eaba	319	drm_framebuffer_unreference(fb);
2fcd5a73	320	out_no_fb:
bbe4b99f	321	drm_modeset_unlock_all(dev);
2fcd5a73 JB	322	out_no_copy:
	323	kfree(clips);
	324	out_clips:
	325	return ret;
	326	}
	327
	328	int vmw_present_readback_ioctl(struct drm_device dev, void data,
	329	struct drm_file *file_priv)
	330	{
	331	struct vmw_private *dev_priv = vmw_priv(dev);
	332	struct drm_vmw_present_readback_arg *arg =
	333	(struct drm_vmw_present_readback_arg *)data;
	334	struct drm_vmw_fence_rep __user *user_fence_rep =
	335	(struct drm_vmw_fence_rep __user *)
	336	(unsigned long)arg->fence_rep;
2fcd5a73 JB	337	struct drm_vmw_rect __user *clips_ptr;
2fcd5a73 JB	338	struct drm_vmw_rect *clips = NULL;
786b99ed	339	struct drm_framebuffer *fb;
2fcd5a73 JB	340	struct vmw_framebuffer *vfb;
	341	uint32_t num_clips;
	342	int ret;
	343
	344	num_clips = arg->num_clips;
b9eb1a61	345	clips_ptr = (struct drm_vmw_rect __user *)(unsigned long)arg->clips_ptr;
2fcd5a73 JB	346
	347	if (unlikely(num_clips == 0))
	348	return 0;
	349
	350	if (clips_ptr == NULL) {
	351	DRM_ERROR("Argument clips_ptr must be specified.\n");
	352	ret = -EINVAL;
	353	goto out_clips;
	354	}
	355
24bb5a0c	356	clips = kcalloc(num_clips, sizeof(*clips), GFP_KERNEL);
2fcd5a73 JB	357	if (clips == NULL) {
	358	DRM_ERROR("Failed to allocate clip rect list.\n");
	359	ret = -ENOMEM;
	360	goto out_clips;
	361	}
	362
	363	ret = copy_from_user(clips, clips_ptr, num_clips * sizeof(*clips));
	364	if (ret) {
	365	DRM_ERROR("Failed to copy clip rects from userspace.\n");
d2c184fb	366	ret = -EFAULT;
2fcd5a73 JB	367	goto out_no_copy;
	368	}
	369
bbe4b99f	370	drm_modeset_lock_all(dev);
2fcd5a73	371
786b99ed DV	372	fb = drm_framebuffer_lookup(dev, arg->fb_id);
786b99ed DV	373	if (!fb) {
2fcd5a73	374	DRM_ERROR("Invalid framebuffer id.\n");
43789b9e	375	ret = -ENOENT;
2fcd5a73 JB	376	goto out_no_fb;
	377	}
	378
786b99ed	379	vfb = vmw_framebuffer_to_vfb(fb);
2fcd5a73 JB	380	if (!vfb->dmabuf) {
	381	DRM_ERROR("Framebuffer not dmabuf backed.\n");
	382	ret = -EINVAL;
2fd5eaba	383	goto out_no_ttm_lock;
2fcd5a73 JB	384	}
2fcd5a73 JB	385
294adf7d	386	ret = ttm_read_lock(&dev_priv->reservation_sem, true);
2fcd5a73 JB	387	if (unlikely(ret != 0))
	388	goto out_no_ttm_lock;
	389
	390	ret = vmw_kms_readback(dev_priv, file_priv,
	391	vfb, user_fence_rep,
	392	clips, num_clips);
	393
294adf7d	394	ttm_read_unlock(&dev_priv->reservation_sem);
2fcd5a73	395	out_no_ttm_lock:
2fd5eaba	396	drm_framebuffer_unreference(fb);
2fcd5a73	397	out_no_fb:
bbe4b99f	398	drm_modeset_unlock_all(dev);
2fcd5a73 JB	399	out_no_copy:
	400	kfree(clips);
	401	out_clips:
	402	return ret;
	403	}
5438ae88 TH	404
	405
	406	/**
	407	* vmw_fops_poll - wrapper around the drm_poll function
	408	*
	409	* @filp: See the linux fops poll documentation.
	410	* @wait: See the linux fops poll documentation.
	411	*
	412	* Wrapper around the drm_poll function that makes sure the device is
	413	* processing the fifo if drm_poll decides to wait.
	414	*/
	415	unsigned int vmw_fops_poll(struct file filp, struct poll_table_struct wait)
	416	{
	417	struct drm_file *file_priv = filp->private_data;
	418	struct vmw_private *dev_priv =
	419	vmw_priv(file_priv->minor->dev);
	420
	421	vmw_fifo_ping_host(dev_priv, SVGA_SYNC_GENERIC);
	422	return drm_poll(filp, wait);
	423	}
	424
	425
	426	/**
	427	* vmw_fops_read - wrapper around the drm_read function
	428	*
	429	* @filp: See the linux fops read documentation.
	430	* @buffer: See the linux fops read documentation.
	431	* @count: See the linux fops read documentation.
	432	* offset: See the linux fops read documentation.
	433	*
	434	* Wrapper around the drm_read function that makes sure the device is
	435	* processing the fifo if drm_read decides to wait.
	436	*/
	437	ssize_t vmw_fops_read(struct file filp, char __user buffer,
	438	size_t count, loff_t *offset)
	439	{
	440	struct drm_file *file_priv = filp->private_data;
	441	struct vmw_private *dev_priv =
	442	vmw_priv(file_priv->minor->dev);
	443
	444	vmw_fifo_ping_host(dev_priv, SVGA_SYNC_GENERIC);
	445	return drm_read(filp, buffer, count, offset);
	446	}