]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blame - drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
drm/bridge: analogix_dp: set the DPCD600 during disabling PSR
[mirror_ubuntu-artful-kernel.git] / drivers / gpu / drm / vmwgfx / vmwgfx_kms.c
CommitLineData
fb1d9738
JB
1/**************************************************************************
2 *
54fbde8a 3 * Copyright © 2009-2015 VMware, Inc., Palo Alto, CA., USA
fb1d9738
JB
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28#include "vmwgfx_kms.h"
29
56d1c78d 30
fb1d9738
JB
31/* Might need a hrtimer here? */
32#define VMWGFX_PRESENT_RATE ((HZ / 60 > 0) ? HZ / 60 : 1)
33
c8261a96 34void vmw_du_cleanup(struct vmw_display_unit *du)
fb1d9738
JB
35{
36 if (du->cursor_surface)
37 vmw_surface_unreference(&du->cursor_surface);
38 if (du->cursor_dmabuf)
39 vmw_dmabuf_unreference(&du->cursor_dmabuf);
34ea3d38 40 drm_connector_unregister(&du->connector);
fb1d9738
JB
41 drm_crtc_cleanup(&du->crtc);
42 drm_encoder_cleanup(&du->encoder);
43 drm_connector_cleanup(&du->connector);
44}
45
46/*
47 * Display Unit Cursor functions
48 */
49
50int vmw_cursor_update_image(struct vmw_private *dev_priv,
51 u32 *image, u32 width, u32 height,
52 u32 hotspotX, u32 hotspotY)
53{
54 struct {
55 u32 cmd;
56 SVGAFifoCmdDefineAlphaCursor cursor;
57 } *cmd;
58 u32 image_size = width * height * 4;
59 u32 cmd_size = sizeof(*cmd) + image_size;
60
61 if (!image)
62 return -EINVAL;
63
64 cmd = vmw_fifo_reserve(dev_priv, cmd_size);
65 if (unlikely(cmd == NULL)) {
66 DRM_ERROR("Fifo reserve failed.\n");
67 return -ENOMEM;
68 }
69
70 memset(cmd, 0, sizeof(*cmd));
71
72 memcpy(&cmd[1], image, image_size);
73
b9eb1a61
TH
74 cmd->cmd = SVGA_CMD_DEFINE_ALPHA_CURSOR;
75 cmd->cursor.id = 0;
76 cmd->cursor.width = width;
77 cmd->cursor.height = height;
78 cmd->cursor.hotspotX = hotspotX;
79 cmd->cursor.hotspotY = hotspotY;
fb1d9738 80
4e0858a6 81 vmw_fifo_commit_flush(dev_priv, cmd_size);
fb1d9738
JB
82
83 return 0;
84}
85
6a91d97e
JB
86int vmw_cursor_update_dmabuf(struct vmw_private *dev_priv,
87 struct vmw_dma_buffer *dmabuf,
88 u32 width, u32 height,
89 u32 hotspotX, u32 hotspotY)
90{
91 struct ttm_bo_kmap_obj map;
92 unsigned long kmap_offset;
93 unsigned long kmap_num;
94 void *virtual;
95 bool dummy;
96 int ret;
97
98 kmap_offset = 0;
99 kmap_num = (width*height*4 + PAGE_SIZE - 1) >> PAGE_SHIFT;
100
dfd5e50e 101 ret = ttm_bo_reserve(&dmabuf->base, true, false, NULL);
6a91d97e
JB
102 if (unlikely(ret != 0)) {
103 DRM_ERROR("reserve failed\n");
104 return -EINVAL;
105 }
106
107 ret = ttm_bo_kmap(&dmabuf->base, kmap_offset, kmap_num, &map);
108 if (unlikely(ret != 0))
109 goto err_unreserve;
110
111 virtual = ttm_kmap_obj_virtual(&map, &dummy);
112 ret = vmw_cursor_update_image(dev_priv, virtual, width, height,
113 hotspotX, hotspotY);
114
115 ttm_bo_kunmap(&map);
116err_unreserve:
117 ttm_bo_unreserve(&dmabuf->base);
118
119 return ret;
120}
121
122
fb1d9738
JB
123void vmw_cursor_update_position(struct vmw_private *dev_priv,
124 bool show, int x, int y)
125{
b76ff5ea 126 u32 *fifo_mem = dev_priv->mmio_virt;
fb1d9738
JB
127 uint32_t count;
128
b76ff5ea
TH
129 vmw_mmio_write(show ? 1 : 0, fifo_mem + SVGA_FIFO_CURSOR_ON);
130 vmw_mmio_write(x, fifo_mem + SVGA_FIFO_CURSOR_X);
131 vmw_mmio_write(y, fifo_mem + SVGA_FIFO_CURSOR_Y);
132 count = vmw_mmio_read(fifo_mem + SVGA_FIFO_CURSOR_COUNT);
133 vmw_mmio_write(++count, fifo_mem + SVGA_FIFO_CURSOR_COUNT);
fb1d9738
JB
134}
135
8fbf9d92
TH
136
137/*
138 * vmw_du_crtc_cursor_set2 - Driver cursor_set2 callback.
139 */
140int vmw_du_crtc_cursor_set2(struct drm_crtc *crtc, struct drm_file *file_priv,
141 uint32_t handle, uint32_t width, uint32_t height,
142 int32_t hot_x, int32_t hot_y)
fb1d9738
JB
143{
144 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
fb1d9738
JB
145 struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
146 struct vmw_surface *surface = NULL;
147 struct vmw_dma_buffer *dmabuf = NULL;
8fbf9d92 148 s32 hotspot_x, hotspot_y;
fb1d9738
JB
149 int ret;
150
bfb89928
DV
151 /*
152 * FIXME: Unclear whether there's any global state touched by the
153 * cursor_set function, especially vmw_cursor_update_position looks
154 * suspicious. For now take the easy route and reacquire all locks. We
155 * can do this since the caller in the drm core doesn't check anything
156 * which is protected by any looks.
157 */
21e88620 158 drm_modeset_unlock_crtc(crtc);
bfb89928 159 drm_modeset_lock_all(dev_priv->dev);
8fbf9d92
TH
160 hotspot_x = hot_x + du->hotspot_x;
161 hotspot_y = hot_y + du->hotspot_y;
bfb89928 162
baa91d64 163 /* A lot of the code assumes this */
bfb89928
DV
164 if (handle && (width != 64 || height != 64)) {
165 ret = -EINVAL;
166 goto out;
167 }
baa91d64 168
fb1d9738 169 if (handle) {
a5d0f576
VS
170 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
171
e7ac9211
JB
172 ret = vmw_user_lookup_handle(dev_priv, tfile,
173 handle, &surface, &dmabuf);
174 if (ret) {
175 DRM_ERROR("failed to find surface or dmabuf: %i\n", ret);
bfb89928
DV
176 ret = -EINVAL;
177 goto out;
fb1d9738
JB
178 }
179 }
180
e7ac9211
JB
181 /* need to do this before taking down old image */
182 if (surface && !surface->snooper.image) {
183 DRM_ERROR("surface not suitable for cursor\n");
184 vmw_surface_unreference(&surface);
bfb89928
DV
185 ret = -EINVAL;
186 goto out;
e7ac9211
JB
187 }
188
fb1d9738
JB
189 /* takedown old cursor */
190 if (du->cursor_surface) {
191 du->cursor_surface->snooper.crtc = NULL;
192 vmw_surface_unreference(&du->cursor_surface);
193 }
194 if (du->cursor_dmabuf)
195 vmw_dmabuf_unreference(&du->cursor_dmabuf);
196
197 /* setup new image */
8fbf9d92 198 ret = 0;
fb1d9738
JB
199 if (surface) {
200 /* vmw_user_surface_lookup takes one reference */
201 du->cursor_surface = surface;
202
203 du->cursor_surface->snooper.crtc = crtc;
204 du->cursor_age = du->cursor_surface->snooper.age;
8fbf9d92
TH
205 ret = vmw_cursor_update_image(dev_priv, surface->snooper.image,
206 64, 64, hotspot_x, hotspot_y);
fb1d9738 207 } else if (dmabuf) {
fb1d9738
JB
208 /* vmw_user_surface_lookup takes one reference */
209 du->cursor_dmabuf = dmabuf;
210
6a91d97e 211 ret = vmw_cursor_update_dmabuf(dev_priv, dmabuf, width, height,
8fbf9d92 212 hotspot_x, hotspot_y);
fb1d9738
JB
213 } else {
214 vmw_cursor_update_position(dev_priv, false, 0, 0);
bfb89928 215 goto out;
fb1d9738
JB
216 }
217
8fbf9d92
TH
218 if (!ret) {
219 vmw_cursor_update_position(dev_priv, true,
220 du->cursor_x + hotspot_x,
221 du->cursor_y + hotspot_y);
222 du->core_hotspot_x = hot_x;
223 du->core_hotspot_y = hot_y;
224 }
fb1d9738 225
bfb89928
DV
226out:
227 drm_modeset_unlock_all(dev_priv->dev);
4d02e2de 228 drm_modeset_lock_crtc(crtc, crtc->cursor);
bfb89928
DV
229
230 return ret;
fb1d9738
JB
231}
232
233int vmw_du_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
234{
235 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
236 struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
237 bool shown = du->cursor_surface || du->cursor_dmabuf ? true : false;
238
6dd687b4
TH
239 du->cursor_x = x + du->set_gui_x;
240 du->cursor_y = y + du->set_gui_y;
fb1d9738 241
dac35663
DV
242 /*
243 * FIXME: Unclear whether there's any global state touched by the
244 * cursor_set function, especially vmw_cursor_update_position looks
245 * suspicious. For now take the easy route and reacquire all locks. We
246 * can do this since the caller in the drm core doesn't check anything
247 * which is protected by any looks.
248 */
21e88620 249 drm_modeset_unlock_crtc(crtc);
dac35663
DV
250 drm_modeset_lock_all(dev_priv->dev);
251
fb1d9738 252 vmw_cursor_update_position(dev_priv, shown,
8fbf9d92
TH
253 du->cursor_x + du->hotspot_x +
254 du->core_hotspot_x,
255 du->cursor_y + du->hotspot_y +
256 du->core_hotspot_y);
fb1d9738 257
dac35663 258 drm_modeset_unlock_all(dev_priv->dev);
4d02e2de 259 drm_modeset_lock_crtc(crtc, crtc->cursor);
dac35663 260
fb1d9738
JB
261 return 0;
262}
263
264void vmw_kms_cursor_snoop(struct vmw_surface *srf,
265 struct ttm_object_file *tfile,
266 struct ttm_buffer_object *bo,
267 SVGA3dCmdHeader *header)
268{
269 struct ttm_bo_kmap_obj map;
270 unsigned long kmap_offset;
271 unsigned long kmap_num;
272 SVGA3dCopyBox *box;
273 unsigned box_count;
274 void *virtual;
275 bool dummy;
276 struct vmw_dma_cmd {
277 SVGA3dCmdHeader header;
278 SVGA3dCmdSurfaceDMA dma;
279 } *cmd;
2ac86371 280 int i, ret;
fb1d9738
JB
281
282 cmd = container_of(header, struct vmw_dma_cmd, header);
283
284 /* No snooper installed */
285 if (!srf->snooper.image)
286 return;
287
288 if (cmd->dma.host.face != 0 || cmd->dma.host.mipmap != 0) {
289 DRM_ERROR("face and mipmap for cursors should never != 0\n");
290 return;
291 }
292
293 if (cmd->header.size < 64) {
294 DRM_ERROR("at least one full copy box must be given\n");
295 return;
296 }
297
298 box = (SVGA3dCopyBox *)&cmd[1];
299 box_count = (cmd->header.size - sizeof(SVGA3dCmdSurfaceDMA)) /
300 sizeof(SVGA3dCopyBox);
301
2ac86371 302 if (cmd->dma.guest.ptr.offset % PAGE_SIZE ||
fb1d9738
JB
303 box->x != 0 || box->y != 0 || box->z != 0 ||
304 box->srcx != 0 || box->srcy != 0 || box->srcz != 0 ||
2ac86371 305 box->d != 1 || box_count != 1) {
fb1d9738 306 /* TODO handle none page aligned offsets */
2ac86371
JB
307 /* TODO handle more dst & src != 0 */
308 /* TODO handle more then one copy */
309 DRM_ERROR("Cant snoop dma request for cursor!\n");
310 DRM_ERROR("(%u, %u, %u) (%u, %u, %u) (%ux%ux%u) %u %u\n",
311 box->srcx, box->srcy, box->srcz,
312 box->x, box->y, box->z,
313 box->w, box->h, box->d, box_count,
314 cmd->dma.guest.ptr.offset);
fb1d9738
JB
315 return;
316 }
317
318 kmap_offset = cmd->dma.guest.ptr.offset >> PAGE_SHIFT;
319 kmap_num = (64*64*4) >> PAGE_SHIFT;
320
dfd5e50e 321 ret = ttm_bo_reserve(bo, true, false, NULL);
fb1d9738
JB
322 if (unlikely(ret != 0)) {
323 DRM_ERROR("reserve failed\n");
324 return;
325 }
326
327 ret = ttm_bo_kmap(bo, kmap_offset, kmap_num, &map);
328 if (unlikely(ret != 0))
329 goto err_unreserve;
330
331 virtual = ttm_kmap_obj_virtual(&map, &dummy);
332
2ac86371
JB
333 if (box->w == 64 && cmd->dma.guest.pitch == 64*4) {
334 memcpy(srf->snooper.image, virtual, 64*64*4);
335 } else {
336 /* Image is unsigned pointer. */
337 for (i = 0; i < box->h; i++)
338 memcpy(srf->snooper.image + i * 64,
339 virtual + i * cmd->dma.guest.pitch,
340 box->w * 4);
341 }
342
fb1d9738
JB
343 srf->snooper.age++;
344
fb1d9738
JB
345 ttm_bo_kunmap(&map);
346err_unreserve:
347 ttm_bo_unreserve(bo);
348}
349
8fbf9d92
TH
350/**
351 * vmw_kms_legacy_hotspot_clear - Clear legacy hotspots
352 *
353 * @dev_priv: Pointer to the device private struct.
354 *
355 * Clears all legacy hotspots.
356 */
357void vmw_kms_legacy_hotspot_clear(struct vmw_private *dev_priv)
358{
359 struct drm_device *dev = dev_priv->dev;
360 struct vmw_display_unit *du;
361 struct drm_crtc *crtc;
362
363 drm_modeset_lock_all(dev);
364 drm_for_each_crtc(crtc, dev) {
365 du = vmw_crtc_to_du(crtc);
366
367 du->hotspot_x = 0;
368 du->hotspot_y = 0;
369 }
370 drm_modeset_unlock_all(dev);
371}
372
fb1d9738
JB
373void vmw_kms_cursor_post_execbuf(struct vmw_private *dev_priv)
374{
375 struct drm_device *dev = dev_priv->dev;
376 struct vmw_display_unit *du;
377 struct drm_crtc *crtc;
378
379 mutex_lock(&dev->mode_config.mutex);
380
381 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
382 du = vmw_crtc_to_du(crtc);
383 if (!du->cursor_surface ||
384 du->cursor_age == du->cursor_surface->snooper.age)
385 continue;
386
387 du->cursor_age = du->cursor_surface->snooper.age;
388 vmw_cursor_update_image(dev_priv,
389 du->cursor_surface->snooper.image,
8fbf9d92
TH
390 64, 64,
391 du->hotspot_x + du->core_hotspot_x,
392 du->hotspot_y + du->core_hotspot_y);
fb1d9738
JB
393 }
394
395 mutex_unlock(&dev->mode_config.mutex);
396}
397
398/*
399 * Generic framebuffer code
400 */
401
fb1d9738
JB
402/*
403 * Surface framebuffer code
404 */
405
847c5964 406static void vmw_framebuffer_surface_destroy(struct drm_framebuffer *framebuffer)
fb1d9738 407{
3a939a5e 408 struct vmw_framebuffer_surface *vfbs =
fb1d9738 409 vmw_framebuffer_to_vfbs(framebuffer);
3a939a5e 410
fb1d9738 411 drm_framebuffer_cleanup(framebuffer);
3a939a5e 412 vmw_surface_unreference(&vfbs->surface);
a278724a
TH
413 if (vfbs->base.user_obj)
414 ttm_base_object_unref(&vfbs->base.user_obj);
fb1d9738 415
3a939a5e 416 kfree(vfbs);
fb1d9738
JB
417}
418
847c5964 419static int vmw_framebuffer_surface_dirty(struct drm_framebuffer *framebuffer,
02b00162 420 struct drm_file *file_priv,
fb1d9738
JB
421 unsigned flags, unsigned color,
422 struct drm_clip_rect *clips,
423 unsigned num_clips)
424{
425 struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
426 struct vmw_framebuffer_surface *vfbs =
427 vmw_framebuffer_to_vfbs(framebuffer);
fb1d9738 428 struct drm_clip_rect norect;
5deb65cf 429 int ret, inc = 1;
fb1d9738 430
c8261a96
SY
431 /* Legacy Display Unit does not support 3D */
432 if (dev_priv->active_display_unit == vmw_du_legacy)
01e81419
JB
433 return -EINVAL;
434
73e9efd4
VS
435 drm_modeset_lock_all(dev_priv->dev);
436
294adf7d 437 ret = ttm_read_lock(&dev_priv->reservation_sem, true);
73e9efd4
VS
438 if (unlikely(ret != 0)) {
439 drm_modeset_unlock_all(dev_priv->dev);
3a939a5e 440 return ret;
73e9efd4 441 }
3a939a5e 442
fb1d9738
JB
443 if (!num_clips) {
444 num_clips = 1;
445 clips = &norect;
446 norect.x1 = norect.y1 = 0;
447 norect.x2 = framebuffer->width;
448 norect.y2 = framebuffer->height;
449 } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
450 num_clips /= 2;
451 inc = 2; /* skip source rects */
452 }
453
c8261a96 454 if (dev_priv->active_display_unit == vmw_du_screen_object)
10b1e0ca
TH
455 ret = vmw_kms_sou_do_surface_dirty(dev_priv, &vfbs->base,
456 clips, NULL, NULL, 0, 0,
457 num_clips, inc, NULL);
35c05125 458 else
6bf6bf03
TH
459 ret = vmw_kms_stdu_surface_dirty(dev_priv, &vfbs->base,
460 clips, NULL, NULL, 0, 0,
461 num_clips, inc, NULL);
fb1d9738 462
3eab3d9e 463 vmw_fifo_flush(dev_priv, false);
294adf7d 464 ttm_read_unlock(&dev_priv->reservation_sem);
73e9efd4
VS
465
466 drm_modeset_unlock_all(dev_priv->dev);
467
fb1d9738
JB
468 return 0;
469}
470
10b1e0ca
TH
471/**
472 * vmw_kms_readback - Perform a readback from the screen system to
473 * a dma-buffer backed framebuffer.
474 *
475 * @dev_priv: Pointer to the device private structure.
476 * @file_priv: Pointer to a struct drm_file identifying the caller.
477 * Must be set to NULL if @user_fence_rep is NULL.
478 * @vfb: Pointer to the dma-buffer backed framebuffer.
479 * @user_fence_rep: User-space provided structure for fence information.
480 * Must be set to non-NULL if @file_priv is non-NULL.
481 * @vclips: Array of clip rects.
482 * @num_clips: Number of clip rects in @vclips.
483 *
484 * Returns 0 on success, negative error code on failure. -ERESTARTSYS if
485 * interrupted.
486 */
487int vmw_kms_readback(struct vmw_private *dev_priv,
488 struct drm_file *file_priv,
489 struct vmw_framebuffer *vfb,
490 struct drm_vmw_fence_rep __user *user_fence_rep,
491 struct drm_vmw_rect *vclips,
492 uint32_t num_clips)
493{
494 switch (dev_priv->active_display_unit) {
495 case vmw_du_screen_object:
496 return vmw_kms_sou_readback(dev_priv, file_priv, vfb,
497 user_fence_rep, vclips, num_clips);
6bf6bf03
TH
498 case vmw_du_screen_target:
499 return vmw_kms_stdu_dma(dev_priv, file_priv, vfb,
500 user_fence_rep, NULL, vclips, num_clips,
501 1, false, true);
10b1e0ca
TH
502 default:
503 WARN_ONCE(true,
504 "Readback called with invalid display system.\n");
6bf6bf03 505}
10b1e0ca
TH
506
507 return -ENOSYS;
508}
509
510
d7955fcf 511static const struct drm_framebuffer_funcs vmw_framebuffer_surface_funcs = {
fb1d9738
JB
512 .destroy = vmw_framebuffer_surface_destroy,
513 .dirty = vmw_framebuffer_surface_dirty,
fb1d9738
JB
514};
515
d3216a0c
TH
516static int vmw_kms_new_framebuffer_surface(struct vmw_private *dev_priv,
517 struct vmw_surface *surface,
518 struct vmw_framebuffer **out,
dabdcdc9 519 const struct drm_mode_fb_cmd2
f89c6c32
SY
520 *mode_cmd,
521 bool is_dmabuf_proxy)
fb1d9738
JB
522
523{
524 struct drm_device *dev = dev_priv->dev;
525 struct vmw_framebuffer_surface *vfbs;
d3216a0c 526 enum SVGA3dSurfaceFormat format;
fb1d9738 527 int ret;
dabdcdc9 528 struct drm_format_name_buf format_name;
fb1d9738 529
c8261a96
SY
530 /* 3D is only supported on HWv8 and newer hosts */
531 if (dev_priv->active_display_unit == vmw_du_legacy)
01e81419
JB
532 return -ENOSYS;
533
d3216a0c
TH
534 /*
535 * Sanity checks.
536 */
537
e7ac9211
JB
538 /* Surface must be marked as a scanout. */
539 if (unlikely(!surface->scanout))
540 return -EINVAL;
541
d3216a0c
TH
542 if (unlikely(surface->mip_levels[0] != 1 ||
543 surface->num_sizes != 1 ||
b360a3ce
TH
544 surface->base_size.width < mode_cmd->width ||
545 surface->base_size.height < mode_cmd->height ||
546 surface->base_size.depth != 1)) {
d3216a0c
TH
547 DRM_ERROR("Incompatible surface dimensions "
548 "for requested mode.\n");
549 return -EINVAL;
550 }
551
dabdcdc9
DV
552 switch (mode_cmd->pixel_format) {
553 case DRM_FORMAT_ARGB8888:
d3216a0c
TH
554 format = SVGA3D_A8R8G8B8;
555 break;
dabdcdc9 556 case DRM_FORMAT_XRGB8888:
d3216a0c
TH
557 format = SVGA3D_X8R8G8B8;
558 break;
dabdcdc9 559 case DRM_FORMAT_RGB565:
d3216a0c
TH
560 format = SVGA3D_R5G6B5;
561 break;
dabdcdc9 562 case DRM_FORMAT_XRGB1555:
d3216a0c
TH
563 format = SVGA3D_A1R5G5B5;
564 break;
565 default:
dabdcdc9
DV
566 DRM_ERROR("Invalid pixel format: %s\n",
567 drm_get_format_name(mode_cmd->pixel_format, &format_name));
d3216a0c
TH
568 return -EINVAL;
569 }
570
d80efd5c
TH
571 /*
572 * For DX, surface format validation is done when surface->scanout
573 * is set.
574 */
575 if (!dev_priv->has_dx && format != surface->format) {
d3216a0c
TH
576 DRM_ERROR("Invalid surface format for requested mode.\n");
577 return -EINVAL;
578 }
579
fb1d9738
JB
580 vfbs = kzalloc(sizeof(*vfbs), GFP_KERNEL);
581 if (!vfbs) {
582 ret = -ENOMEM;
583 goto out_err1;
584 }
585
dabdcdc9 586 drm_helper_mode_fill_fb_struct(&vfbs->base.base, mode_cmd);
05c95018 587 vfbs->surface = vmw_surface_reference(surface);
dabdcdc9 588 vfbs->base.user_handle = mode_cmd->handles[0];
f89c6c32 589 vfbs->is_dmabuf_proxy = is_dmabuf_proxy;
3a939a5e 590
fb1d9738
JB
591 *out = &vfbs->base;
592
80f0b5af
DV
593 ret = drm_framebuffer_init(dev, &vfbs->base.base,
594 &vmw_framebuffer_surface_funcs);
595 if (ret)
05c95018 596 goto out_err2;
80f0b5af 597
fb1d9738
JB
598 return 0;
599
fb1d9738 600out_err2:
05c95018 601 vmw_surface_unreference(&surface);
fb1d9738
JB
602 kfree(vfbs);
603out_err1:
604 return ret;
605}
606
607/*
608 * Dmabuf framebuffer code
609 */
610
847c5964 611static void vmw_framebuffer_dmabuf_destroy(struct drm_framebuffer *framebuffer)
fb1d9738
JB
612{
613 struct vmw_framebuffer_dmabuf *vfbd =
614 vmw_framebuffer_to_vfbd(framebuffer);
615
616 drm_framebuffer_cleanup(framebuffer);
617 vmw_dmabuf_unreference(&vfbd->buffer);
a278724a
TH
618 if (vfbd->base.user_obj)
619 ttm_base_object_unref(&vfbd->base.user_obj);
fb1d9738
JB
620
621 kfree(vfbd);
622}
623
847c5964 624static int vmw_framebuffer_dmabuf_dirty(struct drm_framebuffer *framebuffer,
02b00162 625 struct drm_file *file_priv,
fb1d9738
JB
626 unsigned flags, unsigned color,
627 struct drm_clip_rect *clips,
628 unsigned num_clips)
629{
630 struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
5deb65cf
JB
631 struct vmw_framebuffer_dmabuf *vfbd =
632 vmw_framebuffer_to_vfbd(framebuffer);
fb1d9738 633 struct drm_clip_rect norect;
5deb65cf 634 int ret, increment = 1;
fb1d9738 635
73e9efd4
VS
636 drm_modeset_lock_all(dev_priv->dev);
637
294adf7d 638 ret = ttm_read_lock(&dev_priv->reservation_sem, true);
73e9efd4
VS
639 if (unlikely(ret != 0)) {
640 drm_modeset_unlock_all(dev_priv->dev);
3a939a5e 641 return ret;
73e9efd4 642 }
3a939a5e 643
df1c93ba 644 if (!num_clips) {
fb1d9738
JB
645 num_clips = 1;
646 clips = &norect;
647 norect.x1 = norect.y1 = 0;
648 norect.x2 = framebuffer->width;
649 norect.y2 = framebuffer->height;
650 } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
651 num_clips /= 2;
652 increment = 2;
653 }
654
6bf6bf03
TH
655 switch (dev_priv->active_display_unit) {
656 case vmw_du_screen_target:
657 ret = vmw_kms_stdu_dma(dev_priv, NULL, &vfbd->base, NULL,
658 clips, NULL, num_clips, increment,
659 true, true);
660 break;
661 case vmw_du_screen_object:
10b1e0ca 662 ret = vmw_kms_sou_do_dmabuf_dirty(dev_priv, &vfbd->base,
897b8180
TH
663 clips, NULL, num_clips,
664 increment, true, NULL);
6bf6bf03 665 break;
352b20dc
TH
666 case vmw_du_legacy:
667 ret = vmw_kms_ldu_do_dmabuf_dirty(dev_priv, &vfbd->base, 0, 0,
668 clips, num_clips, increment);
669 break;
6bf6bf03 670 default:
352b20dc
TH
671 ret = -EINVAL;
672 WARN_ONCE(true, "Dirty called with invalid display system.\n");
6bf6bf03 673 break;
56d1c78d 674 }
fb1d9738 675
3eab3d9e 676 vmw_fifo_flush(dev_priv, false);
294adf7d 677 ttm_read_unlock(&dev_priv->reservation_sem);
73e9efd4
VS
678
679 drm_modeset_unlock_all(dev_priv->dev);
680
5deb65cf 681 return ret;
fb1d9738
JB
682}
683
d7955fcf 684static const struct drm_framebuffer_funcs vmw_framebuffer_dmabuf_funcs = {
fb1d9738
JB
685 .destroy = vmw_framebuffer_dmabuf_destroy,
686 .dirty = vmw_framebuffer_dmabuf_dirty,
fb1d9738
JB
687};
688
497a3ff9
JB
689/**
690 * Pin the dmabuffer to the start of vram.
691 */
fd006a43 692static int vmw_framebuffer_pin(struct vmw_framebuffer *vfb)
fb1d9738
JB
693{
694 struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
fd006a43 695 struct vmw_dma_buffer *buf;
fb1d9738
JB
696 int ret;
697
fd006a43
TH
698 buf = vfb->dmabuf ? vmw_framebuffer_to_vfbd(&vfb->base)->buffer :
699 vmw_framebuffer_to_vfbs(&vfb->base)->surface->res.backup;
fb1d9738 700
fd006a43
TH
701 if (!buf)
702 return 0;
fb1d9738 703
fd006a43
TH
704 switch (dev_priv->active_display_unit) {
705 case vmw_du_legacy:
706 vmw_overlay_pause_all(dev_priv);
707 ret = vmw_dmabuf_pin_in_start_of_vram(dev_priv, buf, false);
708 vmw_overlay_resume_all(dev_priv);
709 break;
710 case vmw_du_screen_object:
711 case vmw_du_screen_target:
712 if (vfb->dmabuf)
713 return vmw_dmabuf_pin_in_vram_or_gmr(dev_priv, buf,
714 false);
fb1d9738 715
fd006a43
TH
716 return vmw_dmabuf_pin_in_placement(dev_priv, buf,
717 &vmw_mob_placement, false);
718 default:
719 return -EINVAL;
720 }
316ab13a 721
fd006a43 722 return ret;
fb1d9738
JB
723}
724
fd006a43 725static int vmw_framebuffer_unpin(struct vmw_framebuffer *vfb)
fb1d9738
JB
726{
727 struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
fd006a43 728 struct vmw_dma_buffer *buf;
fb1d9738 729
fd006a43
TH
730 buf = vfb->dmabuf ? vmw_framebuffer_to_vfbd(&vfb->base)->buffer :
731 vmw_framebuffer_to_vfbs(&vfb->base)->surface->res.backup;
fb1d9738 732
fd006a43 733 if (WARN_ON(!buf))
fb1d9738 734 return 0;
fb1d9738 735
fd006a43 736 return vmw_dmabuf_unpin(dev_priv, buf, false);
fb1d9738
JB
737}
738
f89c6c32
SY
739/**
740 * vmw_create_dmabuf_proxy - create a proxy surface for the DMA buf
741 *
742 * @dev: DRM device
743 * @mode_cmd: parameters for the new surface
744 * @dmabuf_mob: MOB backing the DMA buf
745 * @srf_out: newly created surface
746 *
747 * When the content FB is a DMA buf, we create a surface as a proxy to the
748 * same buffer. This way we can do a surface copy rather than a surface DMA.
749 * This is a more efficient approach
750 *
751 * RETURNS:
752 * 0 on success, error code otherwise
753 */
754static int vmw_create_dmabuf_proxy(struct drm_device *dev,
dabdcdc9 755 const struct drm_mode_fb_cmd2 *mode_cmd,
f89c6c32
SY
756 struct vmw_dma_buffer *dmabuf_mob,
757 struct vmw_surface **srf_out)
758{
759 uint32_t format;
760 struct drm_vmw_size content_base_size;
6bf6bf03 761 struct vmw_resource *res;
a50e2bf5 762 unsigned int bytes_pp;
dabdcdc9 763 struct drm_format_name_buf format_name;
f89c6c32
SY
764 int ret;
765
dabdcdc9
DV
766 switch (mode_cmd->pixel_format) {
767 case DRM_FORMAT_ARGB8888:
768 case DRM_FORMAT_XRGB8888:
f89c6c32 769 format = SVGA3D_X8R8G8B8;
a50e2bf5 770 bytes_pp = 4;
f89c6c32
SY
771 break;
772
dabdcdc9
DV
773 case DRM_FORMAT_RGB565:
774 case DRM_FORMAT_XRGB1555:
f89c6c32 775 format = SVGA3D_R5G6B5;
a50e2bf5 776 bytes_pp = 2;
f89c6c32
SY
777 break;
778
779 case 8:
780 format = SVGA3D_P8;
a50e2bf5 781 bytes_pp = 1;
f89c6c32
SY
782 break;
783
784 default:
dabdcdc9
DV
785 DRM_ERROR("Invalid framebuffer format %s\n",
786 drm_get_format_name(mode_cmd->pixel_format, &format_name));
f89c6c32
SY
787 return -EINVAL;
788 }
789
dabdcdc9 790 content_base_size.width = mode_cmd->pitches[0] / bytes_pp;
f89c6c32
SY
791 content_base_size.height = mode_cmd->height;
792 content_base_size.depth = 1;
793
794 ret = vmw_surface_gb_priv_define(dev,
795 0, /* kernel visible only */
796 0, /* flags */
797 format,
798 true, /* can be a scanout buffer */
799 1, /* num of mip levels */
800 0,
d80efd5c 801 0,
f89c6c32
SY
802 content_base_size,
803 srf_out);
804 if (ret) {
805 DRM_ERROR("Failed to allocate proxy content buffer\n");
806 return ret;
fb1d9738
JB
807 }
808
6bf6bf03 809 res = &(*srf_out)->res;
f89c6c32 810
6bf6bf03
TH
811 /* Reserve and switch the backing mob. */
812 mutex_lock(&res->dev_priv->cmdbuf_mutex);
813 (void) vmw_resource_reserve(res, false, true);
814 vmw_dmabuf_unreference(&res->backup);
815 res->backup = vmw_dmabuf_reference(dmabuf_mob);
816 res->backup_offset = 0;
d80efd5c 817 vmw_resource_unreserve(res, false, NULL, 0);
6bf6bf03 818 mutex_unlock(&res->dev_priv->cmdbuf_mutex);
f89c6c32 819
6bf6bf03 820 return 0;
fb1d9738
JB
821}
822
f89c6c32
SY
823
824
d3216a0c
TH
825static int vmw_kms_new_framebuffer_dmabuf(struct vmw_private *dev_priv,
826 struct vmw_dma_buffer *dmabuf,
827 struct vmw_framebuffer **out,
dabdcdc9 828 const struct drm_mode_fb_cmd2
d3216a0c 829 *mode_cmd)
fb1d9738
JB
830
831{
832 struct drm_device *dev = dev_priv->dev;
833 struct vmw_framebuffer_dmabuf *vfbd;
d3216a0c 834 unsigned int requested_size;
dabdcdc9 835 struct drm_format_name_buf format_name;
fb1d9738
JB
836 int ret;
837
dabdcdc9 838 requested_size = mode_cmd->height * mode_cmd->pitches[0];
d3216a0c
TH
839 if (unlikely(requested_size > dmabuf->base.num_pages * PAGE_SIZE)) {
840 DRM_ERROR("Screen buffer object size is too small "
841 "for requested mode.\n");
842 return -EINVAL;
843 }
844
c337ada7 845 /* Limited framebuffer color depth support for screen objects */
c8261a96 846 if (dev_priv->active_display_unit == vmw_du_screen_object) {
dabdcdc9
DV
847 switch (mode_cmd->pixel_format) {
848 case DRM_FORMAT_XRGB8888:
849 case DRM_FORMAT_ARGB8888:
850 break;
851 case DRM_FORMAT_XRGB1555:
852 case DRM_FORMAT_RGB565:
853 break;
c337ada7 854 default:
dabdcdc9
DV
855 DRM_ERROR("Invalid pixel format: %s\n",
856 drm_get_format_name(mode_cmd->pixel_format, &format_name));
c337ada7
JB
857 return -EINVAL;
858 }
859 }
860
fb1d9738
JB
861 vfbd = kzalloc(sizeof(*vfbd), GFP_KERNEL);
862 if (!vfbd) {
863 ret = -ENOMEM;
864 goto out_err1;
865 }
866
dabdcdc9 867 drm_helper_mode_fill_fb_struct(&vfbd->base.base, mode_cmd);
2fcd5a73 868 vfbd->base.dmabuf = true;
05c95018 869 vfbd->buffer = vmw_dmabuf_reference(dmabuf);
dabdcdc9 870 vfbd->base.user_handle = mode_cmd->handles[0];
fb1d9738
JB
871 *out = &vfbd->base;
872
80f0b5af
DV
873 ret = drm_framebuffer_init(dev, &vfbd->base.base,
874 &vmw_framebuffer_dmabuf_funcs);
875 if (ret)
05c95018 876 goto out_err2;
80f0b5af 877
fb1d9738
JB
878 return 0;
879
fb1d9738 880out_err2:
05c95018 881 vmw_dmabuf_unreference(&dmabuf);
fb1d9738
JB
882 kfree(vfbd);
883out_err1:
884 return ret;
885}
886
fd006a43
TH
887/**
888 * vmw_kms_new_framebuffer - Create a new framebuffer.
889 *
890 * @dev_priv: Pointer to device private struct.
891 * @dmabuf: Pointer to dma buffer to wrap the kms framebuffer around.
892 * Either @dmabuf or @surface must be NULL.
893 * @surface: Pointer to a surface to wrap the kms framebuffer around.
894 * Either @dmabuf or @surface must be NULL.
895 * @only_2d: No presents will occur to this dma buffer based framebuffer. This
896 * Helps the code to do some important optimizations.
897 * @mode_cmd: Frame-buffer metadata.
fb1d9738 898 */
fd006a43
TH
899struct vmw_framebuffer *
900vmw_kms_new_framebuffer(struct vmw_private *dev_priv,
901 struct vmw_dma_buffer *dmabuf,
902 struct vmw_surface *surface,
903 bool only_2d,
dabdcdc9 904 const struct drm_mode_fb_cmd2 *mode_cmd)
fb1d9738 905{
fb1d9738 906 struct vmw_framebuffer *vfb = NULL;
fd006a43 907 bool is_dmabuf_proxy = false;
fb1d9738
JB
908 int ret;
909
fd006a43
TH
910 /*
911 * We cannot use the SurfaceDMA command in an non-accelerated VM,
912 * therefore, wrap the DMA buf in a surface so we can use the
913 * SurfaceCopy command.
914 */
915 if (dmabuf && only_2d &&
916 dev_priv->active_display_unit == vmw_du_screen_target) {
917 ret = vmw_create_dmabuf_proxy(dev_priv->dev, mode_cmd,
918 dmabuf, &surface);
919 if (ret)
920 return ERR_PTR(ret);
921
922 is_dmabuf_proxy = true;
923 }
924
925 /* Create the new framebuffer depending one what we have */
05c95018 926 if (surface) {
fd006a43
TH
927 ret = vmw_kms_new_framebuffer_surface(dev_priv, surface, &vfb,
928 mode_cmd,
929 is_dmabuf_proxy);
05c95018
SY
930
931 /*
932 * vmw_create_dmabuf_proxy() adds a reference that is no longer
933 * needed
934 */
935 if (is_dmabuf_proxy)
936 vmw_surface_unreference(&surface);
937 } else if (dmabuf) {
fd006a43
TH
938 ret = vmw_kms_new_framebuffer_dmabuf(dev_priv, dmabuf, &vfb,
939 mode_cmd);
05c95018 940 } else {
fd006a43 941 BUG();
05c95018 942 }
fd006a43
TH
943
944 if (ret)
945 return ERR_PTR(ret);
946
947 vfb->pin = vmw_framebuffer_pin;
948 vfb->unpin = vmw_framebuffer_unpin;
949
950 return vfb;
951}
952
fb1d9738
JB
953/*
954 * Generic Kernel modesetting functions
955 */
956
957static struct drm_framebuffer *vmw_kms_fb_create(struct drm_device *dev,
958 struct drm_file *file_priv,
dabdcdc9 959 const struct drm_mode_fb_cmd2 *mode_cmd)
fb1d9738
JB
960{
961 struct vmw_private *dev_priv = vmw_priv(dev);
962 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
963 struct vmw_framebuffer *vfb = NULL;
964 struct vmw_surface *surface = NULL;
965 struct vmw_dma_buffer *bo = NULL;
90ff18bc 966 struct ttm_base_object *user_obj;
fb1d9738
JB
967 int ret;
968
d3216a0c
TH
969 /**
970 * This code should be conditioned on Screen Objects not being used.
971 * If screen objects are used, we can allocate a GMR to hold the
972 * requested framebuffer.
973 */
974
8a783896 975 if (!vmw_kms_validate_mode_vram(dev_priv,
dabdcdc9
DV
976 mode_cmd->pitches[0],
977 mode_cmd->height)) {
c8261a96 978 DRM_ERROR("Requested mode exceed bounding box limit.\n");
d9826409 979 return ERR_PTR(-ENOMEM);
d3216a0c
TH
980 }
981
90ff18bc
TH
982 /*
983 * Take a reference on the user object of the resource
984 * backing the kms fb. This ensures that user-space handle
985 * lookups on that resource will always work as long as
986 * it's registered with a kms framebuffer. This is important,
987 * since vmw_execbuf_process identifies resources in the
988 * command stream using user-space handles.
989 */
990
dabdcdc9 991 user_obj = ttm_base_object_lookup(tfile, mode_cmd->handles[0]);
90ff18bc
TH
992 if (unlikely(user_obj == NULL)) {
993 DRM_ERROR("Could not locate requested kms frame buffer.\n");
994 return ERR_PTR(-ENOENT);
995 }
996
d3216a0c
TH
997 /**
998 * End conditioned code.
999 */
1000
e7ac9211
JB
1001 /* returns either a dmabuf or surface */
1002 ret = vmw_user_lookup_handle(dev_priv, tfile,
dabdcdc9 1003 mode_cmd->handles[0],
e7ac9211 1004 &surface, &bo);
fb1d9738 1005 if (ret)
e7ac9211
JB
1006 goto err_out;
1007
fd006a43
TH
1008 vfb = vmw_kms_new_framebuffer(dev_priv, bo, surface,
1009 !(dev_priv->capabilities & SVGA_CAP_3D),
dabdcdc9 1010 mode_cmd);
fd006a43
TH
1011 if (IS_ERR(vfb)) {
1012 ret = PTR_ERR(vfb);
1013 goto err_out;
1014 }
e7ac9211
JB
1015
1016err_out:
1017 /* vmw_user_lookup_handle takes one ref so does new_fb */
1018 if (bo)
1019 vmw_dmabuf_unreference(&bo);
1020 if (surface)
1021 vmw_surface_unreference(&surface);
fb1d9738
JB
1022
1023 if (ret) {
1024 DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret);
90ff18bc 1025 ttm_base_object_unref(&user_obj);
cce13ff7 1026 return ERR_PTR(ret);
90ff18bc
TH
1027 } else
1028 vfb->user_obj = user_obj;
fb1d9738
JB
1029
1030 return &vfb->base;
1031}
1032
e6ecefaa 1033static const struct drm_mode_config_funcs vmw_kms_funcs = {
fb1d9738 1034 .fb_create = vmw_kms_fb_create,
fb1d9738
JB
1035};
1036
b9eb1a61
TH
1037static int vmw_kms_generic_present(struct vmw_private *dev_priv,
1038 struct drm_file *file_priv,
1039 struct vmw_framebuffer *vfb,
1040 struct vmw_surface *surface,
1041 uint32_t sid,
1042 int32_t destX, int32_t destY,
1043 struct drm_vmw_rect *clips,
1044 uint32_t num_clips)
2fcd5a73 1045{
10b1e0ca
TH
1046 return vmw_kms_sou_do_surface_dirty(dev_priv, vfb, NULL, clips,
1047 &surface->res, destX, destY,
1048 num_clips, 1, NULL);
2fcd5a73
JB
1049}
1050
6bf6bf03 1051
2fcd5a73
JB
1052int vmw_kms_present(struct vmw_private *dev_priv,
1053 struct drm_file *file_priv,
1054 struct vmw_framebuffer *vfb,
1055 struct vmw_surface *surface,
1056 uint32_t sid,
1057 int32_t destX, int32_t destY,
1058 struct drm_vmw_rect *clips,
1059 uint32_t num_clips)
1060{
35c05125 1061 int ret;
2fcd5a73 1062
6bf6bf03
TH
1063 switch (dev_priv->active_display_unit) {
1064 case vmw_du_screen_target:
1065 ret = vmw_kms_stdu_surface_dirty(dev_priv, vfb, NULL, clips,
1066 &surface->res, destX, destY,
1067 num_clips, 1, NULL);
1068 break;
1069 case vmw_du_screen_object:
1070 ret = vmw_kms_generic_present(dev_priv, file_priv, vfb, surface,
1071 sid, destX, destY, clips,
1072 num_clips);
1073 break;
1074 default:
1075 WARN_ONCE(true,
1076 "Present called with invalid display system.\n");
1077 ret = -ENOSYS;
1078 break;
2fcd5a73 1079 }
35c05125
SY
1080 if (ret)
1081 return ret;
2fcd5a73 1082
35c05125 1083 vmw_fifo_flush(dev_priv, false);
2fcd5a73 1084
35c05125 1085 return 0;
2fcd5a73
JB
1086}
1087
578e609a
TH
1088static void
1089vmw_kms_create_hotplug_mode_update_property(struct vmw_private *dev_priv)
1090{
1091 if (dev_priv->hotplug_mode_update_property)
1092 return;
1093
1094 dev_priv->hotplug_mode_update_property =
1095 drm_property_create_range(dev_priv->dev,
1096 DRM_MODE_PROP_IMMUTABLE,
1097 "hotplug_mode_update", 0, 1);
1098
1099 if (!dev_priv->hotplug_mode_update_property)
1100 return;
1101
1102}
1103
fb1d9738
JB
1104int vmw_kms_init(struct vmw_private *dev_priv)
1105{
1106 struct drm_device *dev = dev_priv->dev;
1107 int ret;
1108
1109 drm_mode_config_init(dev);
1110 dev->mode_config.funcs = &vmw_kms_funcs;
3bef3572
JB
1111 dev->mode_config.min_width = 1;
1112 dev->mode_config.min_height = 1;
65ade7d3
SY
1113 dev->mode_config.max_width = dev_priv->texture_max_width;
1114 dev->mode_config.max_height = dev_priv->texture_max_height;
fb1d9738 1115
578e609a
TH
1116 drm_mode_create_suggested_offset_properties(dev);
1117 vmw_kms_create_hotplug_mode_update_property(dev_priv);
1118
35c05125
SY
1119 ret = vmw_kms_stdu_init_display(dev_priv);
1120 if (ret) {
1121 ret = vmw_kms_sou_init_display(dev_priv);
1122 if (ret) /* Fallback */
1123 ret = vmw_kms_ldu_init_display(dev_priv);
1124 }
fb1d9738 1125
c8261a96 1126 return ret;
fb1d9738
JB
1127}
1128
1129int vmw_kms_close(struct vmw_private *dev_priv)
1130{
c8261a96
SY
1131 int ret;
1132
fb1d9738
JB
1133 /*
1134 * Docs says we should take the lock before calling this function
1135 * but since it destroys encoders and our destructor calls
1136 * drm_encoder_cleanup which takes the lock we deadlock.
1137 */
1138 drm_mode_config_cleanup(dev_priv->dev);
c8261a96
SY
1139 if (dev_priv->active_display_unit == vmw_du_screen_object)
1140 ret = vmw_kms_sou_close_display(dev_priv);
35c05125
SY
1141 else if (dev_priv->active_display_unit == vmw_du_screen_target)
1142 ret = vmw_kms_stdu_close_display(dev_priv);
c0d18316 1143 else
c8261a96
SY
1144 ret = vmw_kms_ldu_close_display(dev_priv);
1145
1146 return ret;
fb1d9738
JB
1147}
1148
1149int vmw_kms_cursor_bypass_ioctl(struct drm_device *dev, void *data,
1150 struct drm_file *file_priv)
1151{
1152 struct drm_vmw_cursor_bypass_arg *arg = data;
1153 struct vmw_display_unit *du;
fb1d9738
JB
1154 struct drm_crtc *crtc;
1155 int ret = 0;
1156
1157
1158 mutex_lock(&dev->mode_config.mutex);
1159 if (arg->flags & DRM_VMW_CURSOR_BYPASS_ALL) {
1160
1161 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
1162 du = vmw_crtc_to_du(crtc);
1163 du->hotspot_x = arg->xhot;
1164 du->hotspot_y = arg->yhot;
1165 }
1166
1167 mutex_unlock(&dev->mode_config.mutex);
1168 return 0;
1169 }
1170
a4cd5d68
RC
1171 crtc = drm_crtc_find(dev, arg->crtc_id);
1172 if (!crtc) {
4ae87ff0 1173 ret = -ENOENT;
fb1d9738
JB
1174 goto out;
1175 }
1176
fb1d9738
JB
1177 du = vmw_crtc_to_du(crtc);
1178
1179 du->hotspot_x = arg->xhot;
1180 du->hotspot_y = arg->yhot;
1181
1182out:
1183 mutex_unlock(&dev->mode_config.mutex);
1184
1185 return ret;
1186}
1187
0bef23f9 1188int vmw_kms_write_svga(struct vmw_private *vmw_priv,
d7e1958d 1189 unsigned width, unsigned height, unsigned pitch,
6558429b 1190 unsigned bpp, unsigned depth)
fb1d9738 1191{
d7e1958d
JB
1192 if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1193 vmw_write(vmw_priv, SVGA_REG_PITCHLOCK, pitch);
1194 else if (vmw_fifo_have_pitchlock(vmw_priv))
b76ff5ea
TH
1195 vmw_mmio_write(pitch, vmw_priv->mmio_virt +
1196 SVGA_FIFO_PITCHLOCK);
d7e1958d
JB
1197 vmw_write(vmw_priv, SVGA_REG_WIDTH, width);
1198 vmw_write(vmw_priv, SVGA_REG_HEIGHT, height);
6558429b 1199 vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, bpp);
0bef23f9
MD
1200
1201 if (vmw_read(vmw_priv, SVGA_REG_DEPTH) != depth) {
1202 DRM_ERROR("Invalid depth %u for %u bpp, host expects %u\n",
1203 depth, bpp, vmw_read(vmw_priv, SVGA_REG_DEPTH));
1204 return -EINVAL;
1205 }
1206
1207 return 0;
d7e1958d 1208}
fb1d9738 1209
d7e1958d
JB
1210int vmw_kms_save_vga(struct vmw_private *vmw_priv)
1211{
7c4f7780
TH
1212 struct vmw_vga_topology_state *save;
1213 uint32_t i;
1214
fb1d9738
JB
1215 vmw_priv->vga_width = vmw_read(vmw_priv, SVGA_REG_WIDTH);
1216 vmw_priv->vga_height = vmw_read(vmw_priv, SVGA_REG_HEIGHT);
7c4f7780 1217 vmw_priv->vga_bpp = vmw_read(vmw_priv, SVGA_REG_BITS_PER_PIXEL);
d7e1958d
JB
1218 if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1219 vmw_priv->vga_pitchlock =
7c4f7780 1220 vmw_read(vmw_priv, SVGA_REG_PITCHLOCK);
d7e1958d 1221 else if (vmw_fifo_have_pitchlock(vmw_priv))
b76ff5ea
TH
1222 vmw_priv->vga_pitchlock = vmw_mmio_read(vmw_priv->mmio_virt +
1223 SVGA_FIFO_PITCHLOCK);
7c4f7780
TH
1224
1225 if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
1226 return 0;
fb1d9738 1227
7c4f7780
TH
1228 vmw_priv->num_displays = vmw_read(vmw_priv,
1229 SVGA_REG_NUM_GUEST_DISPLAYS);
1230
029e50bf
TH
1231 if (vmw_priv->num_displays == 0)
1232 vmw_priv->num_displays = 1;
1233
7c4f7780
TH
1234 for (i = 0; i < vmw_priv->num_displays; ++i) {
1235 save = &vmw_priv->vga_save[i];
1236 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
1237 save->primary = vmw_read(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY);
1238 save->pos_x = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_X);
1239 save->pos_y = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y);
1240 save->width = vmw_read(vmw_priv, SVGA_REG_DISPLAY_WIDTH);
1241 save->height = vmw_read(vmw_priv, SVGA_REG_DISPLAY_HEIGHT);
1242 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
30c78bb8
TH
1243 if (i == 0 && vmw_priv->num_displays == 1 &&
1244 save->width == 0 && save->height == 0) {
1245
1246 /*
1247 * It should be fairly safe to assume that these
1248 * values are uninitialized.
1249 */
1250
1251 save->width = vmw_priv->vga_width - save->pos_x;
1252 save->height = vmw_priv->vga_height - save->pos_y;
1253 }
7c4f7780 1254 }
30c78bb8 1255
fb1d9738
JB
1256 return 0;
1257}
1258
1259int vmw_kms_restore_vga(struct vmw_private *vmw_priv)
1260{
7c4f7780
TH
1261 struct vmw_vga_topology_state *save;
1262 uint32_t i;
1263
fb1d9738
JB
1264 vmw_write(vmw_priv, SVGA_REG_WIDTH, vmw_priv->vga_width);
1265 vmw_write(vmw_priv, SVGA_REG_HEIGHT, vmw_priv->vga_height);
7c4f7780 1266 vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, vmw_priv->vga_bpp);
d7e1958d
JB
1267 if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1268 vmw_write(vmw_priv, SVGA_REG_PITCHLOCK,
1269 vmw_priv->vga_pitchlock);
1270 else if (vmw_fifo_have_pitchlock(vmw_priv))
b76ff5ea
TH
1271 vmw_mmio_write(vmw_priv->vga_pitchlock,
1272 vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK);
fb1d9738 1273
7c4f7780
TH
1274 if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
1275 return 0;
1276
1277 for (i = 0; i < vmw_priv->num_displays; ++i) {
1278 save = &vmw_priv->vga_save[i];
1279 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
1280 vmw_write(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY, save->primary);
1281 vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_X, save->pos_x);
1282 vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y, save->pos_y);
1283 vmw_write(vmw_priv, SVGA_REG_DISPLAY_WIDTH, save->width);
1284 vmw_write(vmw_priv, SVGA_REG_DISPLAY_HEIGHT, save->height);
1285 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
1286 }
1287
fb1d9738
JB
1288 return 0;
1289}
d8bd19d2 1290
e133e737
TH
1291bool vmw_kms_validate_mode_vram(struct vmw_private *dev_priv,
1292 uint32_t pitch,
1293 uint32_t height)
1294{
35c05125
SY
1295 return ((u64) pitch * (u64) height) < (u64)
1296 ((dev_priv->active_display_unit == vmw_du_screen_target) ?
1297 dev_priv->prim_bb_mem : dev_priv->vram_size);
e133e737
TH
1298}
1299
1c482ab3
JB
1300
1301/**
1302 * Function called by DRM code called with vbl_lock held.
1303 */
88e72717 1304u32 vmw_get_vblank_counter(struct drm_device *dev, unsigned int pipe)
7a1c2f6c
TH
1305{
1306 return 0;
1307}
626ab771 1308
1c482ab3
JB
1309/**
1310 * Function called by DRM code called with vbl_lock held.
1311 */
88e72717 1312int vmw_enable_vblank(struct drm_device *dev, unsigned int pipe)
1c482ab3
JB
1313{
1314 return -ENOSYS;
1315}
1316
1317/**
1318 * Function called by DRM code called with vbl_lock held.
1319 */
88e72717 1320void vmw_disable_vblank(struct drm_device *dev, unsigned int pipe)
1c482ab3
JB
1321{
1322}
1323
626ab771
JB
1324
1325/*
1326 * Small shared kms functions.
1327 */
1328
847c5964 1329static int vmw_du_update_layout(struct vmw_private *dev_priv, unsigned num,
626ab771
JB
1330 struct drm_vmw_rect *rects)
1331{
1332 struct drm_device *dev = dev_priv->dev;
1333 struct vmw_display_unit *du;
1334 struct drm_connector *con;
626ab771
JB
1335
1336 mutex_lock(&dev->mode_config.mutex);
1337
1338#if 0
6ea77d13
TH
1339 {
1340 unsigned int i;
1341
1342 DRM_INFO("%s: new layout ", __func__);
1343 for (i = 0; i < num; i++)
1344 DRM_INFO("(%i, %i %ux%u) ", rects[i].x, rects[i].y,
1345 rects[i].w, rects[i].h);
1346 DRM_INFO("\n");
1347 }
626ab771
JB
1348#endif
1349
1350 list_for_each_entry(con, &dev->mode_config.connector_list, head) {
1351 du = vmw_connector_to_du(con);
1352 if (num > du->unit) {
1353 du->pref_width = rects[du->unit].w;
1354 du->pref_height = rects[du->unit].h;
1355 du->pref_active = true;
cd2b89e7
TH
1356 du->gui_x = rects[du->unit].x;
1357 du->gui_y = rects[du->unit].y;
578e609a
TH
1358 drm_object_property_set_value
1359 (&con->base, dev->mode_config.suggested_x_property,
1360 du->gui_x);
1361 drm_object_property_set_value
1362 (&con->base, dev->mode_config.suggested_y_property,
1363 du->gui_y);
626ab771
JB
1364 } else {
1365 du->pref_width = 800;
1366 du->pref_height = 600;
1367 du->pref_active = false;
578e609a
TH
1368 drm_object_property_set_value
1369 (&con->base, dev->mode_config.suggested_x_property,
1370 0);
1371 drm_object_property_set_value
1372 (&con->base, dev->mode_config.suggested_y_property,
1373 0);
626ab771
JB
1374 }
1375 con->status = vmw_du_connector_detect(con, true);
1376 }
1377
1378 mutex_unlock(&dev->mode_config.mutex);
578e609a 1379 drm_sysfs_hotplug_event(dev);
626ab771
JB
1380
1381 return 0;
1382}
1383
7ea77283
ML
1384int vmw_du_crtc_gamma_set(struct drm_crtc *crtc,
1385 u16 *r, u16 *g, u16 *b,
1386 uint32_t size)
626ab771
JB
1387{
1388 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
1389 int i;
1390
1391 for (i = 0; i < size; i++) {
1392 DRM_DEBUG("%d r/g/b = 0x%04x / 0x%04x / 0x%04x\n", i,
1393 r[i], g[i], b[i]);
1394 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 0, r[i] >> 8);
1395 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 1, g[i] >> 8);
1396 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 2, b[i] >> 8);
1397 }
7ea77283
ML
1398
1399 return 0;
626ab771
JB
1400}
1401
9a69a9ac 1402int vmw_du_connector_dpms(struct drm_connector *connector, int mode)
626ab771 1403{
9a69a9ac 1404 return 0;
626ab771
JB
1405}
1406
626ab771
JB
1407enum drm_connector_status
1408vmw_du_connector_detect(struct drm_connector *connector, bool force)
1409{
1410 uint32_t num_displays;
1411 struct drm_device *dev = connector->dev;
1412 struct vmw_private *dev_priv = vmw_priv(dev);
cd2b89e7 1413 struct vmw_display_unit *du = vmw_connector_to_du(connector);
626ab771 1414
626ab771 1415 num_displays = vmw_read(dev_priv, SVGA_REG_NUM_DISPLAYS);
626ab771 1416
cd2b89e7
TH
1417 return ((vmw_connector_to_du(connector)->unit < num_displays &&
1418 du->pref_active) ?
626ab771
JB
1419 connector_status_connected : connector_status_disconnected);
1420}
1421
1422static struct drm_display_mode vmw_kms_connector_builtin[] = {
1423 /* 640x480@60Hz */
1424 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
1425 752, 800, 0, 480, 489, 492, 525, 0,
1426 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
1427 /* 800x600@60Hz */
1428 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
1429 968, 1056, 0, 600, 601, 605, 628, 0,
1430 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1431 /* 1024x768@60Hz */
1432 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
1433 1184, 1344, 0, 768, 771, 777, 806, 0,
1434 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
1435 /* 1152x864@75Hz */
1436 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
1437 1344, 1600, 0, 864, 865, 868, 900, 0,
1438 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1439 /* 1280x768@60Hz */
1440 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
1441 1472, 1664, 0, 768, 771, 778, 798, 0,
1442 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1443 /* 1280x800@60Hz */
1444 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
1445 1480, 1680, 0, 800, 803, 809, 831, 0,
1446 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
1447 /* 1280x960@60Hz */
1448 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
1449 1488, 1800, 0, 960, 961, 964, 1000, 0,
1450 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1451 /* 1280x1024@60Hz */
1452 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
1453 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
1454 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1455 /* 1360x768@60Hz */
1456 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
1457 1536, 1792, 0, 768, 771, 777, 795, 0,
1458 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1459 /* 1440x1050@60Hz */
1460 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
1461 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
1462 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1463 /* 1440x900@60Hz */
1464 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
1465 1672, 1904, 0, 900, 903, 909, 934, 0,
1466 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1467 /* 1600x1200@60Hz */
1468 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
1469 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
1470 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1471 /* 1680x1050@60Hz */
1472 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
1473 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
1474 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1475 /* 1792x1344@60Hz */
1476 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
1477 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
1478 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1479 /* 1853x1392@60Hz */
1480 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
1481 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
1482 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1483 /* 1920x1200@60Hz */
1484 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
1485 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
1486 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1487 /* 1920x1440@60Hz */
1488 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
1489 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
1490 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1491 /* 2560x1600@60Hz */
1492 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
1493 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
1494 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1495 /* Terminate */
1496 { DRM_MODE("", 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) },
1497};
1498
1543b4dd
TH
1499/**
1500 * vmw_guess_mode_timing - Provide fake timings for a
1501 * 60Hz vrefresh mode.
1502 *
1503 * @mode - Pointer to a struct drm_display_mode with hdisplay and vdisplay
1504 * members filled in.
1505 */
a278724a 1506void vmw_guess_mode_timing(struct drm_display_mode *mode)
1543b4dd
TH
1507{
1508 mode->hsync_start = mode->hdisplay + 50;
1509 mode->hsync_end = mode->hsync_start + 50;
1510 mode->htotal = mode->hsync_end + 50;
1511
1512 mode->vsync_start = mode->vdisplay + 50;
1513 mode->vsync_end = mode->vsync_start + 50;
1514 mode->vtotal = mode->vsync_end + 50;
1515
1516 mode->clock = (u32)mode->htotal * (u32)mode->vtotal / 100 * 6;
1517 mode->vrefresh = drm_mode_vrefresh(mode);
1518}
1519
1520
626ab771
JB
1521int vmw_du_connector_fill_modes(struct drm_connector *connector,
1522 uint32_t max_width, uint32_t max_height)
1523{
1524 struct vmw_display_unit *du = vmw_connector_to_du(connector);
1525 struct drm_device *dev = connector->dev;
1526 struct vmw_private *dev_priv = vmw_priv(dev);
1527 struct drm_display_mode *mode = NULL;
1528 struct drm_display_mode *bmode;
1529 struct drm_display_mode prefmode = { DRM_MODE("preferred",
1530 DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
1531 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1532 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC)
1533 };
1534 int i;
7c20d213 1535 u32 assumed_bpp = 4;
9a72384d 1536
04319d89
SY
1537 if (dev_priv->assume_16bpp)
1538 assumed_bpp = 2;
626ab771 1539
35c05125
SY
1540 if (dev_priv->active_display_unit == vmw_du_screen_target) {
1541 max_width = min(max_width, dev_priv->stdu_max_width);
1542 max_height = min(max_height, dev_priv->stdu_max_height);
1543 }
1544
626ab771 1545 /* Add preferred mode */
c8261a96
SY
1546 mode = drm_mode_duplicate(dev, &prefmode);
1547 if (!mode)
1548 return 0;
1549 mode->hdisplay = du->pref_width;
1550 mode->vdisplay = du->pref_height;
1551 vmw_guess_mode_timing(mode);
626ab771 1552
c8261a96
SY
1553 if (vmw_kms_validate_mode_vram(dev_priv,
1554 mode->hdisplay * assumed_bpp,
1555 mode->vdisplay)) {
1556 drm_mode_probed_add(connector, mode);
1557 } else {
1558 drm_mode_destroy(dev, mode);
1559 mode = NULL;
1560 }
55bde5b2 1561
c8261a96
SY
1562 if (du->pref_mode) {
1563 list_del_init(&du->pref_mode->head);
1564 drm_mode_destroy(dev, du->pref_mode);
626ab771
JB
1565 }
1566
c8261a96
SY
1567 /* mode might be null here, this is intended */
1568 du->pref_mode = mode;
1569
626ab771
JB
1570 for (i = 0; vmw_kms_connector_builtin[i].type != 0; i++) {
1571 bmode = &vmw_kms_connector_builtin[i];
1572 if (bmode->hdisplay > max_width ||
1573 bmode->vdisplay > max_height)
1574 continue;
1575
9a72384d
SY
1576 if (!vmw_kms_validate_mode_vram(dev_priv,
1577 bmode->hdisplay * assumed_bpp,
626ab771
JB
1578 bmode->vdisplay))
1579 continue;
1580
1581 mode = drm_mode_duplicate(dev, bmode);
1582 if (!mode)
1583 return 0;
1584 mode->vrefresh = drm_mode_vrefresh(mode);
1585
1586 drm_mode_probed_add(connector, mode);
1587 }
1588
6af3e656 1589 drm_mode_connector_list_update(connector);
f6b05004
TH
1590 /* Move the prefered mode first, help apps pick the right mode. */
1591 drm_mode_sort(&connector->modes);
626ab771
JB
1592
1593 return 1;
1594}
1595
1596int vmw_du_connector_set_property(struct drm_connector *connector,
1597 struct drm_property *property,
1598 uint64_t val)
1599{
76404ac0
TH
1600 struct vmw_display_unit *du = vmw_connector_to_du(connector);
1601 struct vmw_private *dev_priv = vmw_priv(connector->dev);
1602
1603 if (property == dev_priv->implicit_placement_property)
1604 du->is_implicit = val;
1605
626ab771
JB
1606 return 0;
1607}
cd2b89e7
TH
1608
1609
1610int vmw_kms_update_layout_ioctl(struct drm_device *dev, void *data,
1611 struct drm_file *file_priv)
1612{
1613 struct vmw_private *dev_priv = vmw_priv(dev);
1614 struct drm_vmw_update_layout_arg *arg =
1615 (struct drm_vmw_update_layout_arg *)data;
cd2b89e7
TH
1616 void __user *user_rects;
1617 struct drm_vmw_rect *rects;
1618 unsigned rects_size;
1619 int ret;
1620 int i;
65ade7d3 1621 u64 total_pixels = 0;
cd2b89e7 1622 struct drm_mode_config *mode_config = &dev->mode_config;
c8261a96 1623 struct drm_vmw_rect bounding_box = {0};
cd2b89e7 1624
cd2b89e7
TH
1625 if (!arg->num_outputs) {
1626 struct drm_vmw_rect def_rect = {0, 0, 800, 600};
1627 vmw_du_update_layout(dev_priv, 1, &def_rect);
5151adb3 1628 return 0;
cd2b89e7
TH
1629 }
1630
1631 rects_size = arg->num_outputs * sizeof(struct drm_vmw_rect);
bab9efc2
XW
1632 rects = kcalloc(arg->num_outputs, sizeof(struct drm_vmw_rect),
1633 GFP_KERNEL);
5151adb3
TH
1634 if (unlikely(!rects))
1635 return -ENOMEM;
cd2b89e7
TH
1636
1637 user_rects = (void __user *)(unsigned long)arg->rects;
1638 ret = copy_from_user(rects, user_rects, rects_size);
1639 if (unlikely(ret != 0)) {
1640 DRM_ERROR("Failed to get rects.\n");
1641 ret = -EFAULT;
1642 goto out_free;
1643 }
1644
1645 for (i = 0; i < arg->num_outputs; ++i) {
bab9efc2
XW
1646 if (rects[i].x < 0 ||
1647 rects[i].y < 0 ||
1648 rects[i].x + rects[i].w > mode_config->max_width ||
1649 rects[i].y + rects[i].h > mode_config->max_height) {
cd2b89e7
TH
1650 DRM_ERROR("Invalid GUI layout.\n");
1651 ret = -EINVAL;
1652 goto out_free;
1653 }
c8261a96
SY
1654
1655 /*
1656 * bounding_box.w and bunding_box.h are used as
1657 * lower-right coordinates
1658 */
1659 if (rects[i].x + rects[i].w > bounding_box.w)
1660 bounding_box.w = rects[i].x + rects[i].w;
1661
1662 if (rects[i].y + rects[i].h > bounding_box.h)
1663 bounding_box.h = rects[i].y + rects[i].h;
65ade7d3
SY
1664
1665 total_pixels += (u64) rects[i].w * (u64) rects[i].h;
cd2b89e7
TH
1666 }
1667
65ade7d3
SY
1668 if (dev_priv->active_display_unit == vmw_du_screen_target) {
1669 /*
1670 * For Screen Targets, the limits for a toplogy are:
1671 * 1. Bounding box (assuming 32bpp) must be < prim_bb_mem
1672 * 2. Total pixels (assuming 32bpp) must be < prim_bb_mem
1673 */
1674 u64 bb_mem = bounding_box.w * bounding_box.h * 4;
1675 u64 pixel_mem = total_pixels * 4;
1676
1677 if (bb_mem > dev_priv->prim_bb_mem) {
1678 DRM_ERROR("Topology is beyond supported limits.\n");
35c05125
SY
1679 ret = -EINVAL;
1680 goto out_free;
1681 }
1682
65ade7d3
SY
1683 if (pixel_mem > dev_priv->prim_bb_mem) {
1684 DRM_ERROR("Combined output size too large\n");
1685 ret = -EINVAL;
1686 goto out_free;
1687 }
cd2b89e7
TH
1688 }
1689
1690 vmw_du_update_layout(dev_priv, arg->num_outputs, rects);
1691
1692out_free:
1693 kfree(rects);
cd2b89e7
TH
1694 return ret;
1695}
1a4b172a
TH
1696
1697/**
1698 * vmw_kms_helper_dirty - Helper to build commands and perform actions based
1699 * on a set of cliprects and a set of display units.
1700 *
1701 * @dev_priv: Pointer to a device private structure.
1702 * @framebuffer: Pointer to the framebuffer on which to perform the actions.
1703 * @clips: A set of struct drm_clip_rect. Either this os @vclips must be NULL.
1704 * Cliprects are given in framebuffer coordinates.
1705 * @vclips: A set of struct drm_vmw_rect cliprects. Either this or @clips must
1706 * be NULL. Cliprects are given in source coordinates.
1707 * @dest_x: X coordinate offset for the crtc / destination clip rects.
1708 * @dest_y: Y coordinate offset for the crtc / destination clip rects.
1709 * @num_clips: Number of cliprects in the @clips or @vclips array.
1710 * @increment: Integer with which to increment the clip counter when looping.
1711 * Used to skip a predetermined number of clip rects.
1712 * @dirty: Closure structure. See the description of struct vmw_kms_dirty.
1713 */
1714int vmw_kms_helper_dirty(struct vmw_private *dev_priv,
1715 struct vmw_framebuffer *framebuffer,
1716 const struct drm_clip_rect *clips,
1717 const struct drm_vmw_rect *vclips,
1718 s32 dest_x, s32 dest_y,
1719 int num_clips,
1720 int increment,
1721 struct vmw_kms_dirty *dirty)
1722{
1723 struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
1724 struct drm_crtc *crtc;
1725 u32 num_units = 0;
1726 u32 i, k;
1a4b172a
TH
1727
1728 dirty->dev_priv = dev_priv;
1729
1730 list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
1731 if (crtc->primary->fb != &framebuffer->base)
1732 continue;
1733 units[num_units++] = vmw_crtc_to_du(crtc);
1734 }
1735
1736 for (k = 0; k < num_units; k++) {
1737 struct vmw_display_unit *unit = units[k];
1738 s32 crtc_x = unit->crtc.x;
1739 s32 crtc_y = unit->crtc.y;
1740 s32 crtc_width = unit->crtc.mode.hdisplay;
1741 s32 crtc_height = unit->crtc.mode.vdisplay;
1742 const struct drm_clip_rect *clips_ptr = clips;
1743 const struct drm_vmw_rect *vclips_ptr = vclips;
1744
1745 dirty->unit = unit;
1746 if (dirty->fifo_reserve_size > 0) {
1747 dirty->cmd = vmw_fifo_reserve(dev_priv,
1748 dirty->fifo_reserve_size);
1749 if (!dirty->cmd) {
1750 DRM_ERROR("Couldn't reserve fifo space "
1751 "for dirty blits.\n");
f3b8c0ca 1752 return -ENOMEM;
1a4b172a
TH
1753 }
1754 memset(dirty->cmd, 0, dirty->fifo_reserve_size);
1755 }
1756 dirty->num_hits = 0;
1757 for (i = 0; i < num_clips; i++, clips_ptr += increment,
1758 vclips_ptr += increment) {
1759 s32 clip_left;
1760 s32 clip_top;
1761
1762 /*
1763 * Select clip array type. Note that integer type
1764 * in @clips is unsigned short, whereas in @vclips
1765 * it's 32-bit.
1766 */
1767 if (clips) {
1768 dirty->fb_x = (s32) clips_ptr->x1;
1769 dirty->fb_y = (s32) clips_ptr->y1;
1770 dirty->unit_x2 = (s32) clips_ptr->x2 + dest_x -
1771 crtc_x;
1772 dirty->unit_y2 = (s32) clips_ptr->y2 + dest_y -
1773 crtc_y;
1774 } else {
1775 dirty->fb_x = vclips_ptr->x;
1776 dirty->fb_y = vclips_ptr->y;
1777 dirty->unit_x2 = dirty->fb_x + vclips_ptr->w +
1778 dest_x - crtc_x;
1779 dirty->unit_y2 = dirty->fb_y + vclips_ptr->h +
1780 dest_y - crtc_y;
1781 }
1782
1783 dirty->unit_x1 = dirty->fb_x + dest_x - crtc_x;
1784 dirty->unit_y1 = dirty->fb_y + dest_y - crtc_y;
1785
1786 /* Skip this clip if it's outside the crtc region */
1787 if (dirty->unit_x1 >= crtc_width ||
1788 dirty->unit_y1 >= crtc_height ||
1789 dirty->unit_x2 <= 0 || dirty->unit_y2 <= 0)
1790 continue;
1791
1792 /* Clip right and bottom to crtc limits */
1793 dirty->unit_x2 = min_t(s32, dirty->unit_x2,
1794 crtc_width);
1795 dirty->unit_y2 = min_t(s32, dirty->unit_y2,
1796 crtc_height);
1797
1798 /* Clip left and top to crtc limits */
1799 clip_left = min_t(s32, dirty->unit_x1, 0);
1800 clip_top = min_t(s32, dirty->unit_y1, 0);
1801 dirty->unit_x1 -= clip_left;
1802 dirty->unit_y1 -= clip_top;
1803 dirty->fb_x -= clip_left;
1804 dirty->fb_y -= clip_top;
1805
1806 dirty->clip(dirty);
1807 }
1808
1809 dirty->fifo_commit(dirty);
1810 }
1811
1812 return 0;
1813}
1814
1815/**
1816 * vmw_kms_helper_buffer_prepare - Reserve and validate a buffer object before
1817 * command submission.
1818 *
1819 * @dev_priv. Pointer to a device private structure.
1820 * @buf: The buffer object
1821 * @interruptible: Whether to perform waits as interruptible.
1822 * @validate_as_mob: Whether the buffer should be validated as a MOB. If false,
1823 * The buffer will be validated as a GMR. Already pinned buffers will not be
1824 * validated.
1825 *
1826 * Returns 0 on success, negative error code on failure, -ERESTARTSYS if
1827 * interrupted by a signal.
1828 */
1829int vmw_kms_helper_buffer_prepare(struct vmw_private *dev_priv,
1830 struct vmw_dma_buffer *buf,
1831 bool interruptible,
1832 bool validate_as_mob)
1833{
1834 struct ttm_buffer_object *bo = &buf->base;
1835 int ret;
1836
dfd5e50e 1837 ttm_bo_reserve(bo, false, false, NULL);
1a4b172a
TH
1838 ret = vmw_validate_single_buffer(dev_priv, bo, interruptible,
1839 validate_as_mob);
1840 if (ret)
1841 ttm_bo_unreserve(bo);
1842
1843 return ret;
1844}
1845
1846/**
1847 * vmw_kms_helper_buffer_revert - Undo the actions of
1848 * vmw_kms_helper_buffer_prepare.
1849 *
1850 * @res: Pointer to the buffer object.
1851 *
1852 * Helper to be used if an error forces the caller to undo the actions of
1853 * vmw_kms_helper_buffer_prepare.
1854 */
1855void vmw_kms_helper_buffer_revert(struct vmw_dma_buffer *buf)
1856{
1857 if (buf)
1858 ttm_bo_unreserve(&buf->base);
1859}
1860
1861/**
1862 * vmw_kms_helper_buffer_finish - Unreserve and fence a buffer object after
1863 * kms command submission.
1864 *
1865 * @dev_priv: Pointer to a device private structure.
1866 * @file_priv: Pointer to a struct drm_file representing the caller's
1867 * connection. Must be set to NULL if @user_fence_rep is NULL, and conversely
1868 * if non-NULL, @user_fence_rep must be non-NULL.
1869 * @buf: The buffer object.
1870 * @out_fence: Optional pointer to a fence pointer. If non-NULL, a
1871 * ref-counted fence pointer is returned here.
1872 * @user_fence_rep: Optional pointer to a user-space provided struct
1873 * drm_vmw_fence_rep. If provided, @file_priv must also be provided and the
1874 * function copies fence data to user-space in a fail-safe manner.
1875 */
1876void vmw_kms_helper_buffer_finish(struct vmw_private *dev_priv,
1877 struct drm_file *file_priv,
1878 struct vmw_dma_buffer *buf,
1879 struct vmw_fence_obj **out_fence,
1880 struct drm_vmw_fence_rep __user *
1881 user_fence_rep)
1882{
1883 struct vmw_fence_obj *fence;
1884 uint32_t handle;
1885 int ret;
1886
1887 ret = vmw_execbuf_fence_commands(file_priv, dev_priv, &fence,
1888 file_priv ? &handle : NULL);
1889 if (buf)
1890 vmw_fence_single_bo(&buf->base, fence);
1891 if (file_priv)
1892 vmw_execbuf_copy_fence_user(dev_priv, vmw_fpriv(file_priv),
1893 ret, user_fence_rep, fence,
1894 handle);
1895 if (out_fence)
1896 *out_fence = fence;
1897 else
1898 vmw_fence_obj_unreference(&fence);
1899
1900 vmw_kms_helper_buffer_revert(buf);
1901}
1902
1903
1904/**
1905 * vmw_kms_helper_resource_revert - Undo the actions of
1906 * vmw_kms_helper_resource_prepare.
1907 *
1908 * @res: Pointer to the resource. Typically a surface.
1909 *
1910 * Helper to be used if an error forces the caller to undo the actions of
1911 * vmw_kms_helper_resource_prepare.
1912 */
1913void vmw_kms_helper_resource_revert(struct vmw_resource *res)
1914{
1915 vmw_kms_helper_buffer_revert(res->backup);
d80efd5c 1916 vmw_resource_unreserve(res, false, NULL, 0);
1a4b172a
TH
1917 mutex_unlock(&res->dev_priv->cmdbuf_mutex);
1918}
1919
1920/**
1921 * vmw_kms_helper_resource_prepare - Reserve and validate a resource before
1922 * command submission.
1923 *
1924 * @res: Pointer to the resource. Typically a surface.
1925 * @interruptible: Whether to perform waits as interruptible.
1926 *
1927 * Reserves and validates also the backup buffer if a guest-backed resource.
1928 * Returns 0 on success, negative error code on failure. -ERESTARTSYS if
1929 * interrupted by a signal.
1930 */
1931int vmw_kms_helper_resource_prepare(struct vmw_resource *res,
1932 bool interruptible)
1933{
1934 int ret = 0;
1935
1936 if (interruptible)
1937 ret = mutex_lock_interruptible(&res->dev_priv->cmdbuf_mutex);
1938 else
1939 mutex_lock(&res->dev_priv->cmdbuf_mutex);
1940
1941 if (unlikely(ret != 0))
1942 return -ERESTARTSYS;
1943
1944 ret = vmw_resource_reserve(res, interruptible, false);
1945 if (ret)
1946 goto out_unlock;
1947
1948 if (res->backup) {
1949 ret = vmw_kms_helper_buffer_prepare(res->dev_priv, res->backup,
1950 interruptible,
1951 res->dev_priv->has_mob);
1952 if (ret)
1953 goto out_unreserve;
1954 }
1955 ret = vmw_resource_validate(res);
1956 if (ret)
1957 goto out_revert;
1958 return 0;
1959
1960out_revert:
1961 vmw_kms_helper_buffer_revert(res->backup);
1962out_unreserve:
d80efd5c 1963 vmw_resource_unreserve(res, false, NULL, 0);
1a4b172a
TH
1964out_unlock:
1965 mutex_unlock(&res->dev_priv->cmdbuf_mutex);
1966 return ret;
1967}
1968
1969/**
1970 * vmw_kms_helper_resource_finish - Unreserve and fence a resource after
1971 * kms command submission.
1972 *
1973 * @res: Pointer to the resource. Typically a surface.
1974 * @out_fence: Optional pointer to a fence pointer. If non-NULL, a
1975 * ref-counted fence pointer is returned here.
1976 */
1977void vmw_kms_helper_resource_finish(struct vmw_resource *res,
1978 struct vmw_fence_obj **out_fence)
1979{
1980 if (res->backup || out_fence)
1981 vmw_kms_helper_buffer_finish(res->dev_priv, NULL, res->backup,
1982 out_fence, NULL);
1983
d80efd5c 1984 vmw_resource_unreserve(res, false, NULL, 0);
1a4b172a
TH
1985 mutex_unlock(&res->dev_priv->cmdbuf_mutex);
1986}
6bf6bf03
TH
1987
1988/**
1989 * vmw_kms_update_proxy - Helper function to update a proxy surface from
1990 * its backing MOB.
1991 *
1992 * @res: Pointer to the surface resource
1993 * @clips: Clip rects in framebuffer (surface) space.
1994 * @num_clips: Number of clips in @clips.
1995 * @increment: Integer with which to increment the clip counter when looping.
1996 * Used to skip a predetermined number of clip rects.
1997 *
1998 * This function makes sure the proxy surface is updated from its backing MOB
1999 * using the region given by @clips. The surface resource @res and its backing
2000 * MOB needs to be reserved and validated on call.
2001 */
2002int vmw_kms_update_proxy(struct vmw_resource *res,
2003 const struct drm_clip_rect *clips,
2004 unsigned num_clips,
2005 int increment)
2006{
2007 struct vmw_private *dev_priv = res->dev_priv;
2008 struct drm_vmw_size *size = &vmw_res_to_srf(res)->base_size;
2009 struct {
2010 SVGA3dCmdHeader header;
2011 SVGA3dCmdUpdateGBImage body;
2012 } *cmd;
2013 SVGA3dBox *box;
2014 size_t copy_size = 0;
2015 int i;
2016
2017 if (!clips)
2018 return 0;
2019
2020 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd) * num_clips);
2021 if (!cmd) {
2022 DRM_ERROR("Couldn't reserve fifo space for proxy surface "
2023 "update.\n");
2024 return -ENOMEM;
2025 }
2026
2027 for (i = 0; i < num_clips; ++i, clips += increment, ++cmd) {
2028 box = &cmd->body.box;
2029
2030 cmd->header.id = SVGA_3D_CMD_UPDATE_GB_IMAGE;
2031 cmd->header.size = sizeof(cmd->body);
2032 cmd->body.image.sid = res->id;
2033 cmd->body.image.face = 0;
2034 cmd->body.image.mipmap = 0;
2035
2036 if (clips->x1 > size->width || clips->x2 > size->width ||
2037 clips->y1 > size->height || clips->y2 > size->height) {
2038 DRM_ERROR("Invalid clips outsize of framebuffer.\n");
2039 return -EINVAL;
2040 }
2041
2042 box->x = clips->x1;
2043 box->y = clips->y1;
2044 box->z = 0;
2045 box->w = clips->x2 - clips->x1;
2046 box->h = clips->y2 - clips->y1;
2047 box->d = 1;
2048
2049 copy_size += sizeof(*cmd);
2050 }
2051
2052 vmw_fifo_commit(dev_priv, copy_size);
2053
2054 return 0;
2055}
a278724a
TH
2056
2057int vmw_kms_fbdev_init_data(struct vmw_private *dev_priv,
2058 unsigned unit,
2059 u32 max_width,
2060 u32 max_height,
2061 struct drm_connector **p_con,
2062 struct drm_crtc **p_crtc,
2063 struct drm_display_mode **p_mode)
2064{
2065 struct drm_connector *con;
2066 struct vmw_display_unit *du;
2067 struct drm_display_mode *mode;
2068 int i = 0;
2069
2070 list_for_each_entry(con, &dev_priv->dev->mode_config.connector_list,
2071 head) {
2072 if (i == unit)
2073 break;
2074
2075 ++i;
2076 }
2077
2078 if (i != unit) {
2079 DRM_ERROR("Could not find initial display unit.\n");
2080 return -EINVAL;
2081 }
2082
2083 if (list_empty(&con->modes))
2084 (void) vmw_du_connector_fill_modes(con, max_width, max_height);
2085
2086 if (list_empty(&con->modes)) {
2087 DRM_ERROR("Could not find initial display mode.\n");
2088 return -EINVAL;
2089 }
2090
2091 du = vmw_connector_to_du(con);
2092 *p_con = con;
2093 *p_crtc = &du->crtc;
2094
2095 list_for_each_entry(mode, &con->modes, head) {
2096 if (mode->type & DRM_MODE_TYPE_PREFERRED)
2097 break;
2098 }
2099
2100 if (mode->type & DRM_MODE_TYPE_PREFERRED)
2101 *p_mode = mode;
2102 else {
2103 WARN_ONCE(true, "Could not find initial preferred mode.\n");
2104 *p_mode = list_first_entry(&con->modes,
2105 struct drm_display_mode,
2106 head);
2107 }
2108
2109 return 0;
2110}
75c06855
TH
2111
2112/**
2113 * vmw_kms_del_active - unregister a crtc binding to the implicit framebuffer
2114 *
2115 * @dev_priv: Pointer to a device private struct.
2116 * @du: The display unit of the crtc.
2117 */
2118void vmw_kms_del_active(struct vmw_private *dev_priv,
2119 struct vmw_display_unit *du)
2120{
93cd1681 2121 mutex_lock(&dev_priv->global_kms_state_mutex);
75c06855
TH
2122 if (du->active_implicit) {
2123 if (--(dev_priv->num_implicit) == 0)
2124 dev_priv->implicit_fb = NULL;
2125 du->active_implicit = false;
2126 }
93cd1681 2127 mutex_unlock(&dev_priv->global_kms_state_mutex);
75c06855
TH
2128}
2129
2130/**
2131 * vmw_kms_add_active - register a crtc binding to an implicit framebuffer
2132 *
2133 * @vmw_priv: Pointer to a device private struct.
2134 * @du: The display unit of the crtc.
2135 * @vfb: The implicit framebuffer
2136 *
2137 * Registers a binding to an implicit framebuffer.
2138 */
2139void vmw_kms_add_active(struct vmw_private *dev_priv,
2140 struct vmw_display_unit *du,
2141 struct vmw_framebuffer *vfb)
2142{
93cd1681 2143 mutex_lock(&dev_priv->global_kms_state_mutex);
75c06855
TH
2144 WARN_ON_ONCE(!dev_priv->num_implicit && dev_priv->implicit_fb);
2145
2146 if (!du->active_implicit && du->is_implicit) {
2147 dev_priv->implicit_fb = vfb;
2148 du->active_implicit = true;
2149 dev_priv->num_implicit++;
2150 }
93cd1681 2151 mutex_unlock(&dev_priv->global_kms_state_mutex);
75c06855
TH
2152}
2153
2154/**
2155 * vmw_kms_screen_object_flippable - Check whether we can page-flip a crtc.
2156 *
2157 * @dev_priv: Pointer to device-private struct.
2158 * @crtc: The crtc we want to flip.
2159 *
2160 * Returns true or false depending whether it's OK to flip this crtc
2161 * based on the criterion that we must not have more than one implicit
2162 * frame-buffer at any one time.
2163 */
2164bool vmw_kms_crtc_flippable(struct vmw_private *dev_priv,
2165 struct drm_crtc *crtc)
2166{
2167 struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
93cd1681 2168 bool ret;
75c06855 2169
93cd1681
TH
2170 mutex_lock(&dev_priv->global_kms_state_mutex);
2171 ret = !du->is_implicit || dev_priv->num_implicit == 1;
2172 mutex_unlock(&dev_priv->global_kms_state_mutex);
75c06855 2173
93cd1681 2174 return ret;
75c06855
TH
2175}
2176
2177/**
2178 * vmw_kms_update_implicit_fb - Update the implicit fb.
2179 *
2180 * @dev_priv: Pointer to device-private struct.
2181 * @crtc: The crtc the new implicit frame-buffer is bound to.
2182 */
2183void vmw_kms_update_implicit_fb(struct vmw_private *dev_priv,
2184 struct drm_crtc *crtc)
2185{
2186 struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
2187 struct vmw_framebuffer *vfb;
2188
93cd1681 2189 mutex_lock(&dev_priv->global_kms_state_mutex);
75c06855
TH
2190
2191 if (!du->is_implicit)
93cd1681 2192 goto out_unlock;
75c06855
TH
2193
2194 vfb = vmw_framebuffer_to_vfb(crtc->primary->fb);
2195 WARN_ON_ONCE(dev_priv->num_implicit != 1 &&
2196 dev_priv->implicit_fb != vfb);
2197
2198 dev_priv->implicit_fb = vfb;
93cd1681
TH
2199out_unlock:
2200 mutex_unlock(&dev_priv->global_kms_state_mutex);
75c06855 2201}
76404ac0
TH
2202
2203/**
2204 * vmw_kms_create_implicit_placement_proparty - Set up the implicit placement
2205 * property.
2206 *
2207 * @dev_priv: Pointer to a device private struct.
2208 * @immutable: Whether the property is immutable.
2209 *
2210 * Sets up the implicit placement property unless it's already set up.
2211 */
2212void
2213vmw_kms_create_implicit_placement_property(struct vmw_private *dev_priv,
2214 bool immutable)
2215{
2216 if (dev_priv->implicit_placement_property)
2217 return;
2218
2219 dev_priv->implicit_placement_property =
2220 drm_property_create_range(dev_priv->dev,
2221 immutable ?
2222 DRM_MODE_PROP_IMMUTABLE : 0,
2223 "implicit_placement", 0, 1);
2224
2225}