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drm: add per-crtc locks
[mirror_ubuntu-zesty-kernel.git] / drivers / gpu / drm / vmwgfx / vmwgfx_kms.c
CommitLineData
fb1d9738
JB
1/**************************************************************************
2 *
3 * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28#include "vmwgfx_kms.h"
29
56d1c78d 30
fb1d9738
JB
31/* Might need a hrtimer here? */
32#define VMWGFX_PRESENT_RATE ((HZ / 60 > 0) ? HZ / 60 : 1)
33
6abff3c7
JB
34
35struct vmw_clip_rect {
36 int x1, x2, y1, y2;
37};
38
39/**
40 * Clip @num_rects number of @rects against @clip storing the
41 * results in @out_rects and the number of passed rects in @out_num.
42 */
43void vmw_clip_cliprects(struct drm_clip_rect *rects,
44 int num_rects,
45 struct vmw_clip_rect clip,
46 SVGASignedRect *out_rects,
47 int *out_num)
48{
49 int i, k;
50
51 for (i = 0, k = 0; i < num_rects; i++) {
52 int x1 = max_t(int, clip.x1, rects[i].x1);
53 int y1 = max_t(int, clip.y1, rects[i].y1);
54 int x2 = min_t(int, clip.x2, rects[i].x2);
55 int y2 = min_t(int, clip.y2, rects[i].y2);
56
57 if (x1 >= x2)
58 continue;
59 if (y1 >= y2)
60 continue;
61
62 out_rects[k].left = x1;
63 out_rects[k].top = y1;
64 out_rects[k].right = x2;
65 out_rects[k].bottom = y2;
66 k++;
67 }
68
69 *out_num = k;
70}
71
fb1d9738
JB
72void vmw_display_unit_cleanup(struct vmw_display_unit *du)
73{
74 if (du->cursor_surface)
75 vmw_surface_unreference(&du->cursor_surface);
76 if (du->cursor_dmabuf)
77 vmw_dmabuf_unreference(&du->cursor_dmabuf);
78 drm_crtc_cleanup(&du->crtc);
79 drm_encoder_cleanup(&du->encoder);
80 drm_connector_cleanup(&du->connector);
81}
82
83/*
84 * Display Unit Cursor functions
85 */
86
87int vmw_cursor_update_image(struct vmw_private *dev_priv,
88 u32 *image, u32 width, u32 height,
89 u32 hotspotX, u32 hotspotY)
90{
91 struct {
92 u32 cmd;
93 SVGAFifoCmdDefineAlphaCursor cursor;
94 } *cmd;
95 u32 image_size = width * height * 4;
96 u32 cmd_size = sizeof(*cmd) + image_size;
97
98 if (!image)
99 return -EINVAL;
100
101 cmd = vmw_fifo_reserve(dev_priv, cmd_size);
102 if (unlikely(cmd == NULL)) {
103 DRM_ERROR("Fifo reserve failed.\n");
104 return -ENOMEM;
105 }
106
107 memset(cmd, 0, sizeof(*cmd));
108
109 memcpy(&cmd[1], image, image_size);
110
111 cmd->cmd = cpu_to_le32(SVGA_CMD_DEFINE_ALPHA_CURSOR);
112 cmd->cursor.id = cpu_to_le32(0);
113 cmd->cursor.width = cpu_to_le32(width);
114 cmd->cursor.height = cpu_to_le32(height);
115 cmd->cursor.hotspotX = cpu_to_le32(hotspotX);
116 cmd->cursor.hotspotY = cpu_to_le32(hotspotY);
117
118 vmw_fifo_commit(dev_priv, cmd_size);
119
120 return 0;
121}
122
6a91d97e
JB
123int vmw_cursor_update_dmabuf(struct vmw_private *dev_priv,
124 struct vmw_dma_buffer *dmabuf,
125 u32 width, u32 height,
126 u32 hotspotX, u32 hotspotY)
127{
128 struct ttm_bo_kmap_obj map;
129 unsigned long kmap_offset;
130 unsigned long kmap_num;
131 void *virtual;
132 bool dummy;
133 int ret;
134
135 kmap_offset = 0;
136 kmap_num = (width*height*4 + PAGE_SIZE - 1) >> PAGE_SHIFT;
137
138 ret = ttm_bo_reserve(&dmabuf->base, true, false, false, 0);
139 if (unlikely(ret != 0)) {
140 DRM_ERROR("reserve failed\n");
141 return -EINVAL;
142 }
143
144 ret = ttm_bo_kmap(&dmabuf->base, kmap_offset, kmap_num, &map);
145 if (unlikely(ret != 0))
146 goto err_unreserve;
147
148 virtual = ttm_kmap_obj_virtual(&map, &dummy);
149 ret = vmw_cursor_update_image(dev_priv, virtual, width, height,
150 hotspotX, hotspotY);
151
152 ttm_bo_kunmap(&map);
153err_unreserve:
154 ttm_bo_unreserve(&dmabuf->base);
155
156 return ret;
157}
158
159
fb1d9738
JB
160void vmw_cursor_update_position(struct vmw_private *dev_priv,
161 bool show, int x, int y)
162{
163 __le32 __iomem *fifo_mem = dev_priv->mmio_virt;
164 uint32_t count;
165
166 iowrite32(show ? 1 : 0, fifo_mem + SVGA_FIFO_CURSOR_ON);
167 iowrite32(x, fifo_mem + SVGA_FIFO_CURSOR_X);
168 iowrite32(y, fifo_mem + SVGA_FIFO_CURSOR_Y);
169 count = ioread32(fifo_mem + SVGA_FIFO_CURSOR_COUNT);
170 iowrite32(++count, fifo_mem + SVGA_FIFO_CURSOR_COUNT);
171}
172
173int vmw_du_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv,
174 uint32_t handle, uint32_t width, uint32_t height)
175{
176 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
177 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
178 struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
179 struct vmw_surface *surface = NULL;
180 struct vmw_dma_buffer *dmabuf = NULL;
181 int ret;
182
baa91d64
JB
183 /* A lot of the code assumes this */
184 if (handle && (width != 64 || height != 64))
185 return -EINVAL;
186
fb1d9738 187 if (handle) {
e7ac9211
JB
188 ret = vmw_user_lookup_handle(dev_priv, tfile,
189 handle, &surface, &dmabuf);
190 if (ret) {
191 DRM_ERROR("failed to find surface or dmabuf: %i\n", ret);
192 return -EINVAL;
fb1d9738
JB
193 }
194 }
195
e7ac9211
JB
196 /* need to do this before taking down old image */
197 if (surface && !surface->snooper.image) {
198 DRM_ERROR("surface not suitable for cursor\n");
199 vmw_surface_unreference(&surface);
200 return -EINVAL;
201 }
202
fb1d9738
JB
203 /* takedown old cursor */
204 if (du->cursor_surface) {
205 du->cursor_surface->snooper.crtc = NULL;
206 vmw_surface_unreference(&du->cursor_surface);
207 }
208 if (du->cursor_dmabuf)
209 vmw_dmabuf_unreference(&du->cursor_dmabuf);
210
211 /* setup new image */
212 if (surface) {
213 /* vmw_user_surface_lookup takes one reference */
214 du->cursor_surface = surface;
215
216 du->cursor_surface->snooper.crtc = crtc;
217 du->cursor_age = du->cursor_surface->snooper.age;
218 vmw_cursor_update_image(dev_priv, surface->snooper.image,
219 64, 64, du->hotspot_x, du->hotspot_y);
220 } else if (dmabuf) {
fb1d9738
JB
221 /* vmw_user_surface_lookup takes one reference */
222 du->cursor_dmabuf = dmabuf;
223
6a91d97e
JB
224 ret = vmw_cursor_update_dmabuf(dev_priv, dmabuf, width, height,
225 du->hotspot_x, du->hotspot_y);
fb1d9738
JB
226 } else {
227 vmw_cursor_update_position(dev_priv, false, 0, 0);
228 return 0;
229 }
230
da7653d6
TH
231 vmw_cursor_update_position(dev_priv, true,
232 du->cursor_x + du->hotspot_x,
233 du->cursor_y + du->hotspot_y);
fb1d9738
JB
234
235 return 0;
236}
237
238int vmw_du_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
239{
240 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
241 struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
242 bool shown = du->cursor_surface || du->cursor_dmabuf ? true : false;
243
244 du->cursor_x = x + crtc->x;
245 du->cursor_y = y + crtc->y;
246
247 vmw_cursor_update_position(dev_priv, shown,
da7653d6
TH
248 du->cursor_x + du->hotspot_x,
249 du->cursor_y + du->hotspot_y);
fb1d9738
JB
250
251 return 0;
252}
253
254void vmw_kms_cursor_snoop(struct vmw_surface *srf,
255 struct ttm_object_file *tfile,
256 struct ttm_buffer_object *bo,
257 SVGA3dCmdHeader *header)
258{
259 struct ttm_bo_kmap_obj map;
260 unsigned long kmap_offset;
261 unsigned long kmap_num;
262 SVGA3dCopyBox *box;
263 unsigned box_count;
264 void *virtual;
265 bool dummy;
266 struct vmw_dma_cmd {
267 SVGA3dCmdHeader header;
268 SVGA3dCmdSurfaceDMA dma;
269 } *cmd;
2ac86371 270 int i, ret;
fb1d9738
JB
271
272 cmd = container_of(header, struct vmw_dma_cmd, header);
273
274 /* No snooper installed */
275 if (!srf->snooper.image)
276 return;
277
278 if (cmd->dma.host.face != 0 || cmd->dma.host.mipmap != 0) {
279 DRM_ERROR("face and mipmap for cursors should never != 0\n");
280 return;
281 }
282
283 if (cmd->header.size < 64) {
284 DRM_ERROR("at least one full copy box must be given\n");
285 return;
286 }
287
288 box = (SVGA3dCopyBox *)&cmd[1];
289 box_count = (cmd->header.size - sizeof(SVGA3dCmdSurfaceDMA)) /
290 sizeof(SVGA3dCopyBox);
291
2ac86371 292 if (cmd->dma.guest.ptr.offset % PAGE_SIZE ||
fb1d9738
JB
293 box->x != 0 || box->y != 0 || box->z != 0 ||
294 box->srcx != 0 || box->srcy != 0 || box->srcz != 0 ||
2ac86371 295 box->d != 1 || box_count != 1) {
fb1d9738 296 /* TODO handle none page aligned offsets */
2ac86371
JB
297 /* TODO handle more dst & src != 0 */
298 /* TODO handle more then one copy */
299 DRM_ERROR("Cant snoop dma request for cursor!\n");
300 DRM_ERROR("(%u, %u, %u) (%u, %u, %u) (%ux%ux%u) %u %u\n",
301 box->srcx, box->srcy, box->srcz,
302 box->x, box->y, box->z,
303 box->w, box->h, box->d, box_count,
304 cmd->dma.guest.ptr.offset);
fb1d9738
JB
305 return;
306 }
307
308 kmap_offset = cmd->dma.guest.ptr.offset >> PAGE_SHIFT;
309 kmap_num = (64*64*4) >> PAGE_SHIFT;
310
311 ret = ttm_bo_reserve(bo, true, false, false, 0);
312 if (unlikely(ret != 0)) {
313 DRM_ERROR("reserve failed\n");
314 return;
315 }
316
317 ret = ttm_bo_kmap(bo, kmap_offset, kmap_num, &map);
318 if (unlikely(ret != 0))
319 goto err_unreserve;
320
321 virtual = ttm_kmap_obj_virtual(&map, &dummy);
322
2ac86371
JB
323 if (box->w == 64 && cmd->dma.guest.pitch == 64*4) {
324 memcpy(srf->snooper.image, virtual, 64*64*4);
325 } else {
326 /* Image is unsigned pointer. */
327 for (i = 0; i < box->h; i++)
328 memcpy(srf->snooper.image + i * 64,
329 virtual + i * cmd->dma.guest.pitch,
330 box->w * 4);
331 }
332
fb1d9738
JB
333 srf->snooper.age++;
334
335 /* we can't call this function from this function since execbuf has
336 * reserved fifo space.
337 *
338 * if (srf->snooper.crtc)
339 * vmw_ldu_crtc_cursor_update_image(dev_priv,
340 * srf->snooper.image, 64, 64,
341 * du->hotspot_x, du->hotspot_y);
342 */
343
344 ttm_bo_kunmap(&map);
345err_unreserve:
346 ttm_bo_unreserve(bo);
347}
348
349void vmw_kms_cursor_post_execbuf(struct vmw_private *dev_priv)
350{
351 struct drm_device *dev = dev_priv->dev;
352 struct vmw_display_unit *du;
353 struct drm_crtc *crtc;
354
355 mutex_lock(&dev->mode_config.mutex);
356
357 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
358 du = vmw_crtc_to_du(crtc);
359 if (!du->cursor_surface ||
360 du->cursor_age == du->cursor_surface->snooper.age)
361 continue;
362
363 du->cursor_age = du->cursor_surface->snooper.age;
364 vmw_cursor_update_image(dev_priv,
365 du->cursor_surface->snooper.image,
366 64, 64, du->hotspot_x, du->hotspot_y);
367 }
368
369 mutex_unlock(&dev->mode_config.mutex);
370}
371
372/*
373 * Generic framebuffer code
374 */
375
fb1d9738
JB
376/*
377 * Surface framebuffer code
378 */
379
380#define vmw_framebuffer_to_vfbs(x) \
381 container_of(x, struct vmw_framebuffer_surface, base.base)
382
383struct vmw_framebuffer_surface {
384 struct vmw_framebuffer base;
385 struct vmw_surface *surface;
22ee861c 386 struct vmw_dma_buffer *buffer;
3a939a5e
TH
387 struct list_head head;
388 struct drm_master *master;
fb1d9738
JB
389};
390
391void vmw_framebuffer_surface_destroy(struct drm_framebuffer *framebuffer)
392{
3a939a5e 393 struct vmw_framebuffer_surface *vfbs =
fb1d9738 394 vmw_framebuffer_to_vfbs(framebuffer);
3a939a5e
TH
395 struct vmw_master *vmaster = vmw_master(vfbs->master);
396
397
398 mutex_lock(&vmaster->fb_surf_mutex);
399 list_del(&vfbs->head);
400 mutex_unlock(&vmaster->fb_surf_mutex);
fb1d9738 401
3a939a5e 402 drm_master_put(&vfbs->master);
fb1d9738 403 drm_framebuffer_cleanup(framebuffer);
3a939a5e 404 vmw_surface_unreference(&vfbs->surface);
90ff18bc 405 ttm_base_object_unref(&vfbs->base.user_obj);
fb1d9738 406
3a939a5e 407 kfree(vfbs);
fb1d9738
JB
408}
409
56d1c78d 410static int do_surface_dirty_sou(struct vmw_private *dev_priv,
90ff18bc 411 struct drm_file *file_priv,
56d1c78d 412 struct vmw_framebuffer *framebuffer,
56d1c78d
JB
413 unsigned flags, unsigned color,
414 struct drm_clip_rect *clips,
bd49ae46
JB
415 unsigned num_clips, int inc,
416 struct vmw_fence_obj **out_fence)
56d1c78d 417{
c6ca8391 418 struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
6abff3c7
JB
419 struct drm_clip_rect *clips_ptr;
420 struct drm_clip_rect *tmp;
c6ca8391 421 struct drm_crtc *crtc;
56d1c78d 422 size_t fifo_size;
c6ca8391
JB
423 int i, num_units;
424 int ret = 0; /* silence warning */
425 int left, right, top, bottom;
56d1c78d
JB
426
427 struct {
428 SVGA3dCmdHeader header;
429 SVGA3dCmdBlitSurfaceToScreen body;
430 } *cmd;
c6ca8391 431 SVGASignedRect *blits;
56d1c78d 432
c6ca8391
JB
433 num_units = 0;
434 list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list,
435 head) {
436 if (crtc->fb != &framebuffer->base)
437 continue;
438 units[num_units++] = vmw_crtc_to_du(crtc);
439 }
440
c6ca8391
JB
441 BUG_ON(!clips || !num_clips);
442
6abff3c7
JB
443 tmp = kzalloc(sizeof(*tmp) * num_clips, GFP_KERNEL);
444 if (unlikely(tmp == NULL)) {
445 DRM_ERROR("Temporary cliprect memory alloc failed.\n");
446 return -ENOMEM;
447 }
448
c6ca8391 449 fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num_clips;
90ff18bc 450 cmd = kzalloc(fifo_size, GFP_KERNEL);
56d1c78d 451 if (unlikely(cmd == NULL)) {
90ff18bc 452 DRM_ERROR("Temporary fifo memory alloc failed.\n");
6abff3c7
JB
453 ret = -ENOMEM;
454 goto out_free_tmp;
56d1c78d
JB
455 }
456
6abff3c7
JB
457 /* setup blits pointer */
458 blits = (SVGASignedRect *)&cmd[1];
459
460 /* initial clip region */
c6ca8391
JB
461 left = clips->x1;
462 right = clips->x2;
463 top = clips->y1;
464 bottom = clips->y2;
465
f0c8a652
JB
466 /* skip the first clip rect */
467 for (i = 1, clips_ptr = clips + inc;
468 i < num_clips; i++, clips_ptr += inc) {
c6ca8391
JB
469 left = min_t(int, left, (int)clips_ptr->x1);
470 right = max_t(int, right, (int)clips_ptr->x2);
471 top = min_t(int, top, (int)clips_ptr->y1);
472 bottom = max_t(int, bottom, (int)clips_ptr->y2);
56d1c78d
JB
473 }
474
c6ca8391 475 /* only need to do this once */
c6ca8391
JB
476 cmd->header.id = cpu_to_le32(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN);
477 cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header));
478
56d1c78d
JB
479 cmd->body.srcRect.left = left;
480 cmd->body.srcRect.right = right;
481 cmd->body.srcRect.top = top;
482 cmd->body.srcRect.bottom = bottom;
483
c6ca8391 484 clips_ptr = clips;
c6ca8391 485 for (i = 0; i < num_clips; i++, clips_ptr += inc) {
6abff3c7
JB
486 tmp[i].x1 = clips_ptr->x1 - left;
487 tmp[i].x2 = clips_ptr->x2 - left;
488 tmp[i].y1 = clips_ptr->y1 - top;
489 tmp[i].y2 = clips_ptr->y2 - top;
c6ca8391
JB
490 }
491
492 /* do per unit writing, reuse fifo for each */
493 for (i = 0; i < num_units; i++) {
494 struct vmw_display_unit *unit = units[i];
6abff3c7
JB
495 struct vmw_clip_rect clip;
496 int num;
497
498 clip.x1 = left - unit->crtc.x;
499 clip.y1 = top - unit->crtc.y;
500 clip.x2 = right - unit->crtc.x;
501 clip.y2 = bottom - unit->crtc.y;
c6ca8391
JB
502
503 /* skip any crtcs that misses the clip region */
6abff3c7
JB
504 if (clip.x1 >= unit->crtc.mode.hdisplay ||
505 clip.y1 >= unit->crtc.mode.vdisplay ||
506 clip.x2 <= 0 || clip.y2 <= 0)
c6ca8391
JB
507 continue;
508
6abff3c7
JB
509 /*
510 * In order for the clip rects to be correctly scaled
511 * the src and dest rects needs to be the same size.
512 */
513 cmd->body.destRect.left = clip.x1;
514 cmd->body.destRect.right = clip.x2;
515 cmd->body.destRect.top = clip.y1;
516 cmd->body.destRect.bottom = clip.y2;
517
518 /* create a clip rect of the crtc in dest coords */
519 clip.x2 = unit->crtc.mode.hdisplay - clip.x1;
520 clip.y2 = unit->crtc.mode.vdisplay - clip.y1;
521 clip.x1 = 0 - clip.x1;
522 clip.y1 = 0 - clip.y1;
523
c6ca8391
JB
524 /* need to reset sid as it is changed by execbuf */
525 cmd->body.srcImage.sid = cpu_to_le32(framebuffer->user_handle);
c6ca8391
JB
526 cmd->body.destScreenId = unit->unit;
527
6abff3c7
JB
528 /* clip and write blits to cmd stream */
529 vmw_clip_cliprects(tmp, num_clips, clip, blits, &num);
c6ca8391 530
6abff3c7
JB
531 /* if no cliprects hit skip this */
532 if (num == 0)
533 continue;
c6ca8391 534
bd49ae46
JB
535 /* only return the last fence */
536 if (out_fence && *out_fence)
537 vmw_fence_obj_unreference(out_fence);
c6ca8391 538
6abff3c7
JB
539 /* recalculate package length */
540 fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num;
541 cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header));
c6ca8391 542 ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd,
bd49ae46 543 fifo_size, 0, NULL, out_fence);
c6ca8391
JB
544
545 if (unlikely(ret != 0))
546 break;
547 }
56d1c78d 548
6abff3c7 549
90ff18bc 550 kfree(cmd);
6abff3c7
JB
551out_free_tmp:
552 kfree(tmp);
56d1c78d 553
90ff18bc 554 return ret;
5deb65cf 555}
fb1d9738
JB
556
557int vmw_framebuffer_surface_dirty(struct drm_framebuffer *framebuffer,
02b00162 558 struct drm_file *file_priv,
fb1d9738
JB
559 unsigned flags, unsigned color,
560 struct drm_clip_rect *clips,
561 unsigned num_clips)
562{
563 struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
3a939a5e 564 struct vmw_master *vmaster = vmw_master(file_priv->master);
fb1d9738
JB
565 struct vmw_framebuffer_surface *vfbs =
566 vmw_framebuffer_to_vfbs(framebuffer);
fb1d9738 567 struct drm_clip_rect norect;
5deb65cf 568 int ret, inc = 1;
fb1d9738 569
3a939a5e
TH
570 if (unlikely(vfbs->master != file_priv->master))
571 return -EINVAL;
572
01e81419
JB
573 /* Require ScreenObject support for 3D */
574 if (!dev_priv->sou_priv)
575 return -EINVAL;
576
3a939a5e
TH
577 ret = ttm_read_lock(&vmaster->lock, true);
578 if (unlikely(ret != 0))
579 return ret;
580
fb1d9738
JB
581 if (!num_clips) {
582 num_clips = 1;
583 clips = &norect;
584 norect.x1 = norect.y1 = 0;
585 norect.x2 = framebuffer->width;
586 norect.y2 = framebuffer->height;
587 } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
588 num_clips /= 2;
589 inc = 2; /* skip source rects */
590 }
591
c5c42360 592 ret = do_surface_dirty_sou(dev_priv, file_priv, &vfbs->base,
01e81419 593 flags, color,
bd49ae46 594 clips, num_clips, inc, NULL);
fb1d9738 595
3a939a5e 596 ttm_read_unlock(&vmaster->lock);
fb1d9738
JB
597 return 0;
598}
599
600static struct drm_framebuffer_funcs vmw_framebuffer_surface_funcs = {
601 .destroy = vmw_framebuffer_surface_destroy,
602 .dirty = vmw_framebuffer_surface_dirty,
fb1d9738
JB
603};
604
d3216a0c 605static int vmw_kms_new_framebuffer_surface(struct vmw_private *dev_priv,
3a939a5e 606 struct drm_file *file_priv,
d3216a0c
TH
607 struct vmw_surface *surface,
608 struct vmw_framebuffer **out,
609 const struct drm_mode_fb_cmd
610 *mode_cmd)
fb1d9738
JB
611
612{
613 struct drm_device *dev = dev_priv->dev;
614 struct vmw_framebuffer_surface *vfbs;
d3216a0c 615 enum SVGA3dSurfaceFormat format;
3a939a5e 616 struct vmw_master *vmaster = vmw_master(file_priv->master);
fb1d9738
JB
617 int ret;
618
01e81419
JB
619 /* 3D is only supported on HWv8 hosts which supports screen objects */
620 if (!dev_priv->sou_priv)
621 return -ENOSYS;
622
d3216a0c
TH
623 /*
624 * Sanity checks.
625 */
626
e7ac9211
JB
627 /* Surface must be marked as a scanout. */
628 if (unlikely(!surface->scanout))
629 return -EINVAL;
630
d3216a0c
TH
631 if (unlikely(surface->mip_levels[0] != 1 ||
632 surface->num_sizes != 1 ||
633 surface->sizes[0].width < mode_cmd->width ||
634 surface->sizes[0].height < mode_cmd->height ||
635 surface->sizes[0].depth != 1)) {
636 DRM_ERROR("Incompatible surface dimensions "
637 "for requested mode.\n");
638 return -EINVAL;
639 }
640
641 switch (mode_cmd->depth) {
642 case 32:
643 format = SVGA3D_A8R8G8B8;
644 break;
645 case 24:
646 format = SVGA3D_X8R8G8B8;
647 break;
648 case 16:
649 format = SVGA3D_R5G6B5;
650 break;
651 case 15:
652 format = SVGA3D_A1R5G5B5;
653 break;
f01b7ba0
MD
654 case 8:
655 format = SVGA3D_LUMINANCE8;
656 break;
d3216a0c
TH
657 default:
658 DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth);
659 return -EINVAL;
660 }
661
662 if (unlikely(format != surface->format)) {
663 DRM_ERROR("Invalid surface format for requested mode.\n");
664 return -EINVAL;
665 }
666
fb1d9738
JB
667 vfbs = kzalloc(sizeof(*vfbs), GFP_KERNEL);
668 if (!vfbs) {
669 ret = -ENOMEM;
670 goto out_err1;
671 }
672
fb1d9738
JB
673 if (!vmw_surface_reference(surface)) {
674 DRM_ERROR("failed to reference surface %p\n", surface);
80f0b5af
DV
675 ret = -EINVAL;
676 goto out_err2;
fb1d9738
JB
677 }
678
679 /* XXX get the first 3 from the surface info */
d3216a0c 680 vfbs->base.base.bits_per_pixel = mode_cmd->bpp;
01f2c773 681 vfbs->base.base.pitches[0] = mode_cmd->pitch;
d3216a0c
TH
682 vfbs->base.base.depth = mode_cmd->depth;
683 vfbs->base.base.width = mode_cmd->width;
684 vfbs->base.base.height = mode_cmd->height;
fb1d9738 685 vfbs->surface = surface;
90ff18bc 686 vfbs->base.user_handle = mode_cmd->handle;
3a939a5e 687 vfbs->master = drm_master_get(file_priv->master);
3a939a5e
TH
688
689 mutex_lock(&vmaster->fb_surf_mutex);
3a939a5e
TH
690 list_add_tail(&vfbs->head, &vmaster->fb_surf);
691 mutex_unlock(&vmaster->fb_surf_mutex);
692
fb1d9738
JB
693 *out = &vfbs->base;
694
80f0b5af
DV
695 ret = drm_framebuffer_init(dev, &vfbs->base.base,
696 &vmw_framebuffer_surface_funcs);
697 if (ret)
698 goto out_err3;
699
fb1d9738
JB
700 return 0;
701
702out_err3:
80f0b5af 703 vmw_surface_unreference(&surface);
fb1d9738
JB
704out_err2:
705 kfree(vfbs);
706out_err1:
707 return ret;
708}
709
710/*
711 * Dmabuf framebuffer code
712 */
713
714#define vmw_framebuffer_to_vfbd(x) \
715 container_of(x, struct vmw_framebuffer_dmabuf, base.base)
716
717struct vmw_framebuffer_dmabuf {
718 struct vmw_framebuffer base;
719 struct vmw_dma_buffer *buffer;
720};
721
722void vmw_framebuffer_dmabuf_destroy(struct drm_framebuffer *framebuffer)
723{
724 struct vmw_framebuffer_dmabuf *vfbd =
725 vmw_framebuffer_to_vfbd(framebuffer);
726
727 drm_framebuffer_cleanup(framebuffer);
728 vmw_dmabuf_unreference(&vfbd->buffer);
90ff18bc 729 ttm_base_object_unref(&vfbd->base.user_obj);
fb1d9738
JB
730
731 kfree(vfbd);
732}
733
5deb65cf
JB
734static int do_dmabuf_dirty_ldu(struct vmw_private *dev_priv,
735 struct vmw_framebuffer *framebuffer,
5deb65cf
JB
736 unsigned flags, unsigned color,
737 struct drm_clip_rect *clips,
738 unsigned num_clips, int increment)
739{
740 size_t fifo_size;
741 int i;
742
743 struct {
744 uint32_t header;
745 SVGAFifoCmdUpdate body;
746 } *cmd;
747
748 fifo_size = sizeof(*cmd) * num_clips;
749 cmd = vmw_fifo_reserve(dev_priv, fifo_size);
750 if (unlikely(cmd == NULL)) {
751 DRM_ERROR("Fifo reserve failed.\n");
752 return -ENOMEM;
753 }
754
755 memset(cmd, 0, fifo_size);
756 for (i = 0; i < num_clips; i++, clips += increment) {
757 cmd[i].header = cpu_to_le32(SVGA_CMD_UPDATE);
758 cmd[i].body.x = cpu_to_le32(clips->x1);
759 cmd[i].body.y = cpu_to_le32(clips->y1);
760 cmd[i].body.width = cpu_to_le32(clips->x2 - clips->x1);
761 cmd[i].body.height = cpu_to_le32(clips->y2 - clips->y1);
762 }
763
764 vmw_fifo_commit(dev_priv, fifo_size);
765 return 0;
766}
767
c6ca8391
JB
768static int do_dmabuf_define_gmrfb(struct drm_file *file_priv,
769 struct vmw_private *dev_priv,
770 struct vmw_framebuffer *framebuffer)
56d1c78d 771{
64fc9944 772 int depth = framebuffer->base.depth;
56d1c78d 773 size_t fifo_size;
c6ca8391 774 int ret;
56d1c78d
JB
775
776 struct {
777 uint32_t header;
778 SVGAFifoCmdDefineGMRFB body;
779 } *cmd;
56d1c78d 780
64fc9944
JB
781 /* Emulate RGBA support, contrary to svga_reg.h this is not
782 * supported by hosts. This is only a problem if we are reading
783 * this value later and expecting what we uploaded back.
784 */
785 if (depth == 32)
786 depth = 24;
787
c6ca8391 788 fifo_size = sizeof(*cmd);
56d1c78d
JB
789 cmd = kmalloc(fifo_size, GFP_KERNEL);
790 if (unlikely(cmd == NULL)) {
791 DRM_ERROR("Failed to allocate temporary cmd buffer.\n");
792 return -ENOMEM;
793 }
794
795 memset(cmd, 0, fifo_size);
796 cmd->header = SVGA_CMD_DEFINE_GMRFB;
797 cmd->body.format.bitsPerPixel = framebuffer->base.bits_per_pixel;
64fc9944 798 cmd->body.format.colorDepth = depth;
56d1c78d 799 cmd->body.format.reserved = 0;
01f2c773 800 cmd->body.bytesPerLine = framebuffer->base.pitches[0];
90ff18bc 801 cmd->body.ptr.gmrId = framebuffer->user_handle;
56d1c78d
JB
802 cmd->body.ptr.offset = 0;
803
56d1c78d 804 ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd,
bb1bd2f4 805 fifo_size, 0, NULL, NULL);
56d1c78d
JB
806
807 kfree(cmd);
808
809 return ret;
810}
811
c6ca8391
JB
812static int do_dmabuf_dirty_sou(struct drm_file *file_priv,
813 struct vmw_private *dev_priv,
814 struct vmw_framebuffer *framebuffer,
c6ca8391
JB
815 unsigned flags, unsigned color,
816 struct drm_clip_rect *clips,
bd49ae46
JB
817 unsigned num_clips, int increment,
818 struct vmw_fence_obj **out_fence)
c6ca8391
JB
819{
820 struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
821 struct drm_clip_rect *clips_ptr;
822 int i, k, num_units, ret;
823 struct drm_crtc *crtc;
824 size_t fifo_size;
825
826 struct {
827 uint32_t header;
828 SVGAFifoCmdBlitGMRFBToScreen body;
829 } *blits;
830
831 ret = do_dmabuf_define_gmrfb(file_priv, dev_priv, framebuffer);
832 if (unlikely(ret != 0))
833 return ret; /* define_gmrfb prints warnings */
834
835 fifo_size = sizeof(*blits) * num_clips;
836 blits = kmalloc(fifo_size, GFP_KERNEL);
837 if (unlikely(blits == NULL)) {
838 DRM_ERROR("Failed to allocate temporary cmd buffer.\n");
839 return -ENOMEM;
840 }
841
842 num_units = 0;
843 list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
844 if (crtc->fb != &framebuffer->base)
845 continue;
846 units[num_units++] = vmw_crtc_to_du(crtc);
847 }
848
849 for (k = 0; k < num_units; k++) {
850 struct vmw_display_unit *unit = units[k];
851 int hit_num = 0;
852
853 clips_ptr = clips;
854 for (i = 0; i < num_clips; i++, clips_ptr += increment) {
855 int clip_x1 = clips_ptr->x1 - unit->crtc.x;
856 int clip_y1 = clips_ptr->y1 - unit->crtc.y;
857 int clip_x2 = clips_ptr->x2 - unit->crtc.x;
858 int clip_y2 = clips_ptr->y2 - unit->crtc.y;
6abff3c7 859 int move_x, move_y;
c6ca8391
JB
860
861 /* skip any crtcs that misses the clip region */
862 if (clip_x1 >= unit->crtc.mode.hdisplay ||
863 clip_y1 >= unit->crtc.mode.vdisplay ||
864 clip_x2 <= 0 || clip_y2 <= 0)
865 continue;
866
6abff3c7
JB
867 /* clip size to crtc size */
868 clip_x2 = min_t(int, clip_x2, unit->crtc.mode.hdisplay);
869 clip_y2 = min_t(int, clip_y2, unit->crtc.mode.vdisplay);
870
871 /* translate both src and dest to bring clip into screen */
872 move_x = min_t(int, clip_x1, 0);
873 move_y = min_t(int, clip_y1, 0);
874
875 /* actual translate done here */
c6ca8391
JB
876 blits[hit_num].header = SVGA_CMD_BLIT_GMRFB_TO_SCREEN;
877 blits[hit_num].body.destScreenId = unit->unit;
6abff3c7
JB
878 blits[hit_num].body.srcOrigin.x = clips_ptr->x1 - move_x;
879 blits[hit_num].body.srcOrigin.y = clips_ptr->y1 - move_y;
880 blits[hit_num].body.destRect.left = clip_x1 - move_x;
881 blits[hit_num].body.destRect.top = clip_y1 - move_y;
c6ca8391
JB
882 blits[hit_num].body.destRect.right = clip_x2;
883 blits[hit_num].body.destRect.bottom = clip_y2;
884 hit_num++;
885 }
886
887 /* no clips hit the crtc */
888 if (hit_num == 0)
889 continue;
890
bd49ae46
JB
891 /* only return the last fence */
892 if (out_fence && *out_fence)
893 vmw_fence_obj_unreference(out_fence);
894
c6ca8391
JB
895 fifo_size = sizeof(*blits) * hit_num;
896 ret = vmw_execbuf_process(file_priv, dev_priv, NULL, blits,
bd49ae46 897 fifo_size, 0, NULL, out_fence);
c6ca8391
JB
898
899 if (unlikely(ret != 0))
900 break;
901 }
902
903 kfree(blits);
904
905 return ret;
906}
907
fb1d9738 908int vmw_framebuffer_dmabuf_dirty(struct drm_framebuffer *framebuffer,
02b00162 909 struct drm_file *file_priv,
fb1d9738
JB
910 unsigned flags, unsigned color,
911 struct drm_clip_rect *clips,
912 unsigned num_clips)
913{
914 struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
3a939a5e 915 struct vmw_master *vmaster = vmw_master(file_priv->master);
5deb65cf
JB
916 struct vmw_framebuffer_dmabuf *vfbd =
917 vmw_framebuffer_to_vfbd(framebuffer);
fb1d9738 918 struct drm_clip_rect norect;
5deb65cf 919 int ret, increment = 1;
fb1d9738 920
3a939a5e
TH
921 ret = ttm_read_lock(&vmaster->lock, true);
922 if (unlikely(ret != 0))
923 return ret;
924
df1c93ba 925 if (!num_clips) {
fb1d9738
JB
926 num_clips = 1;
927 clips = &norect;
928 norect.x1 = norect.y1 = 0;
929 norect.x2 = framebuffer->width;
930 norect.y2 = framebuffer->height;
931 } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
932 num_clips /= 2;
933 increment = 2;
934 }
935
56d1c78d 936 if (dev_priv->ldu_priv) {
c5c42360 937 ret = do_dmabuf_dirty_ldu(dev_priv, &vfbd->base,
56d1c78d
JB
938 flags, color,
939 clips, num_clips, increment);
940 } else {
941 ret = do_dmabuf_dirty_sou(file_priv, dev_priv, &vfbd->base,
c5c42360 942 flags, color,
bd49ae46 943 clips, num_clips, increment, NULL);
56d1c78d 944 }
fb1d9738 945
3a939a5e 946 ttm_read_unlock(&vmaster->lock);
5deb65cf 947 return ret;
fb1d9738
JB
948}
949
950static struct drm_framebuffer_funcs vmw_framebuffer_dmabuf_funcs = {
951 .destroy = vmw_framebuffer_dmabuf_destroy,
952 .dirty = vmw_framebuffer_dmabuf_dirty,
fb1d9738
JB
953};
954
497a3ff9
JB
955/**
956 * Pin the dmabuffer to the start of vram.
957 */
fb1d9738
JB
958static int vmw_framebuffer_dmabuf_pin(struct vmw_framebuffer *vfb)
959{
960 struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
961 struct vmw_framebuffer_dmabuf *vfbd =
962 vmw_framebuffer_to_vfbd(&vfb->base);
963 int ret;
964
56d1c78d
JB
965 /* This code should not be used with screen objects */
966 BUG_ON(dev_priv->sou_priv);
d7e1958d 967
fb1d9738
JB
968 vmw_overlay_pause_all(dev_priv);
969
d991ef03 970 ret = vmw_dmabuf_to_start_of_vram(dev_priv, vfbd->buffer, true, false);
fb1d9738 971
fb1d9738
JB
972 vmw_overlay_resume_all(dev_priv);
973
316ab13a
JB
974 WARN_ON(ret != 0);
975
fb1d9738
JB
976 return 0;
977}
978
979static int vmw_framebuffer_dmabuf_unpin(struct vmw_framebuffer *vfb)
980{
981 struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
982 struct vmw_framebuffer_dmabuf *vfbd =
983 vmw_framebuffer_to_vfbd(&vfb->base);
984
985 if (!vfbd->buffer) {
986 WARN_ON(!vfbd->buffer);
987 return 0;
988 }
989
d991ef03 990 return vmw_dmabuf_unpin(dev_priv, vfbd->buffer, false);
fb1d9738
JB
991}
992
d3216a0c
TH
993static int vmw_kms_new_framebuffer_dmabuf(struct vmw_private *dev_priv,
994 struct vmw_dma_buffer *dmabuf,
995 struct vmw_framebuffer **out,
996 const struct drm_mode_fb_cmd
997 *mode_cmd)
fb1d9738
JB
998
999{
1000 struct drm_device *dev = dev_priv->dev;
1001 struct vmw_framebuffer_dmabuf *vfbd;
d3216a0c 1002 unsigned int requested_size;
fb1d9738
JB
1003 int ret;
1004
d3216a0c
TH
1005 requested_size = mode_cmd->height * mode_cmd->pitch;
1006 if (unlikely(requested_size > dmabuf->base.num_pages * PAGE_SIZE)) {
1007 DRM_ERROR("Screen buffer object size is too small "
1008 "for requested mode.\n");
1009 return -EINVAL;
1010 }
1011
c337ada7
JB
1012 /* Limited framebuffer color depth support for screen objects */
1013 if (dev_priv->sou_priv) {
1014 switch (mode_cmd->depth) {
1015 case 32:
1016 case 24:
1017 /* Only support 32 bpp for 32 and 24 depth fbs */
1018 if (mode_cmd->bpp == 32)
1019 break;
1020
1021 DRM_ERROR("Invalid color depth/bbp: %d %d\n",
1022 mode_cmd->depth, mode_cmd->bpp);
1023 return -EINVAL;
1024 case 16:
1025 case 15:
1026 /* Only support 16 bpp for 16 and 15 depth fbs */
1027 if (mode_cmd->bpp == 16)
1028 break;
1029
1030 DRM_ERROR("Invalid color depth/bbp: %d %d\n",
1031 mode_cmd->depth, mode_cmd->bpp);
1032 return -EINVAL;
1033 default:
1034 DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth);
1035 return -EINVAL;
1036 }
1037 }
1038
fb1d9738
JB
1039 vfbd = kzalloc(sizeof(*vfbd), GFP_KERNEL);
1040 if (!vfbd) {
1041 ret = -ENOMEM;
1042 goto out_err1;
1043 }
1044
fb1d9738
JB
1045 if (!vmw_dmabuf_reference(dmabuf)) {
1046 DRM_ERROR("failed to reference dmabuf %p\n", dmabuf);
80f0b5af
DV
1047 ret = -EINVAL;
1048 goto out_err2;
fb1d9738
JB
1049 }
1050
d3216a0c 1051 vfbd->base.base.bits_per_pixel = mode_cmd->bpp;
01f2c773 1052 vfbd->base.base.pitches[0] = mode_cmd->pitch;
d3216a0c
TH
1053 vfbd->base.base.depth = mode_cmd->depth;
1054 vfbd->base.base.width = mode_cmd->width;
1055 vfbd->base.base.height = mode_cmd->height;
56d1c78d
JB
1056 if (!dev_priv->sou_priv) {
1057 vfbd->base.pin = vmw_framebuffer_dmabuf_pin;
1058 vfbd->base.unpin = vmw_framebuffer_dmabuf_unpin;
1059 }
2fcd5a73 1060 vfbd->base.dmabuf = true;
fb1d9738 1061 vfbd->buffer = dmabuf;
90ff18bc 1062 vfbd->base.user_handle = mode_cmd->handle;
fb1d9738
JB
1063 *out = &vfbd->base;
1064
80f0b5af
DV
1065 ret = drm_framebuffer_init(dev, &vfbd->base.base,
1066 &vmw_framebuffer_dmabuf_funcs);
1067 if (ret)
1068 goto out_err3;
1069
fb1d9738
JB
1070 return 0;
1071
1072out_err3:
80f0b5af 1073 vmw_dmabuf_unreference(&dmabuf);
fb1d9738
JB
1074out_err2:
1075 kfree(vfbd);
1076out_err1:
1077 return ret;
1078}
1079
1080/*
1081 * Generic Kernel modesetting functions
1082 */
1083
1084static struct drm_framebuffer *vmw_kms_fb_create(struct drm_device *dev,
1085 struct drm_file *file_priv,
308e5bcb 1086 struct drm_mode_fb_cmd2 *mode_cmd2)
fb1d9738
JB
1087{
1088 struct vmw_private *dev_priv = vmw_priv(dev);
1089 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
1090 struct vmw_framebuffer *vfb = NULL;
1091 struct vmw_surface *surface = NULL;
1092 struct vmw_dma_buffer *bo = NULL;
90ff18bc 1093 struct ttm_base_object *user_obj;
308e5bcb 1094 struct drm_mode_fb_cmd mode_cmd;
fb1d9738
JB
1095 int ret;
1096
308e5bcb
JB
1097 mode_cmd.width = mode_cmd2->width;
1098 mode_cmd.height = mode_cmd2->height;
1099 mode_cmd.pitch = mode_cmd2->pitches[0];
1100 mode_cmd.handle = mode_cmd2->handles[0];
248dbc23 1101 drm_fb_get_bpp_depth(mode_cmd2->pixel_format, &mode_cmd.depth,
308e5bcb
JB
1102 &mode_cmd.bpp);
1103
d3216a0c
TH
1104 /**
1105 * This code should be conditioned on Screen Objects not being used.
1106 * If screen objects are used, we can allocate a GMR to hold the
1107 * requested framebuffer.
1108 */
1109
8a783896 1110 if (!vmw_kms_validate_mode_vram(dev_priv,
1a464cbb
LT
1111 mode_cmd.pitch,
1112 mode_cmd.height)) {
d3216a0c 1113 DRM_ERROR("VRAM size is too small for requested mode.\n");
d9826409 1114 return ERR_PTR(-ENOMEM);
d3216a0c
TH
1115 }
1116
90ff18bc
TH
1117 /*
1118 * Take a reference on the user object of the resource
1119 * backing the kms fb. This ensures that user-space handle
1120 * lookups on that resource will always work as long as
1121 * it's registered with a kms framebuffer. This is important,
1122 * since vmw_execbuf_process identifies resources in the
1123 * command stream using user-space handles.
1124 */
1125
308e5bcb 1126 user_obj = ttm_base_object_lookup(tfile, mode_cmd.handle);
90ff18bc
TH
1127 if (unlikely(user_obj == NULL)) {
1128 DRM_ERROR("Could not locate requested kms frame buffer.\n");
1129 return ERR_PTR(-ENOENT);
1130 }
1131
d3216a0c
TH
1132 /**
1133 * End conditioned code.
1134 */
1135
e7ac9211
JB
1136 /* returns either a dmabuf or surface */
1137 ret = vmw_user_lookup_handle(dev_priv, tfile,
4cf73129 1138 mode_cmd.handle,
e7ac9211 1139 &surface, &bo);
fb1d9738 1140 if (ret)
e7ac9211
JB
1141 goto err_out;
1142
1143 /* Create the new framebuffer depending one what we got back */
1144 if (bo)
1145 ret = vmw_kms_new_framebuffer_dmabuf(dev_priv, bo, &vfb,
4cf73129 1146 &mode_cmd);
e7ac9211
JB
1147 else if (surface)
1148 ret = vmw_kms_new_framebuffer_surface(dev_priv, file_priv,
4cf73129 1149 surface, &vfb, &mode_cmd);
e7ac9211
JB
1150 else
1151 BUG();
1152
1153err_out:
1154 /* vmw_user_lookup_handle takes one ref so does new_fb */
1155 if (bo)
1156 vmw_dmabuf_unreference(&bo);
1157 if (surface)
1158 vmw_surface_unreference(&surface);
fb1d9738
JB
1159
1160 if (ret) {
1161 DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret);
90ff18bc 1162 ttm_base_object_unref(&user_obj);
cce13ff7 1163 return ERR_PTR(ret);
90ff18bc
TH
1164 } else
1165 vfb->user_obj = user_obj;
fb1d9738
JB
1166
1167 return &vfb->base;
1168}
1169
e6ecefaa 1170static const struct drm_mode_config_funcs vmw_kms_funcs = {
fb1d9738 1171 .fb_create = vmw_kms_fb_create,
fb1d9738
JB
1172};
1173
2fcd5a73
JB
1174int vmw_kms_present(struct vmw_private *dev_priv,
1175 struct drm_file *file_priv,
1176 struct vmw_framebuffer *vfb,
1177 struct vmw_surface *surface,
1178 uint32_t sid,
1179 int32_t destX, int32_t destY,
1180 struct drm_vmw_rect *clips,
1181 uint32_t num_clips)
1182{
c6ca8391 1183 struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
6abff3c7 1184 struct drm_clip_rect *tmp;
c6ca8391 1185 struct drm_crtc *crtc;
2fcd5a73 1186 size_t fifo_size;
c6ca8391
JB
1187 int i, k, num_units;
1188 int ret = 0; /* silence warning */
203dc220 1189 int left, right, top, bottom;
2fcd5a73
JB
1190
1191 struct {
1192 SVGA3dCmdHeader header;
1193 SVGA3dCmdBlitSurfaceToScreen body;
1194 } *cmd;
1195 SVGASignedRect *blits;
1196
c6ca8391
JB
1197 num_units = 0;
1198 list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
1199 if (crtc->fb != &vfb->base)
1200 continue;
1201 units[num_units++] = vmw_crtc_to_du(crtc);
1202 }
1203
2fcd5a73
JB
1204 BUG_ON(surface == NULL);
1205 BUG_ON(!clips || !num_clips);
1206
6abff3c7
JB
1207 tmp = kzalloc(sizeof(*tmp) * num_clips, GFP_KERNEL);
1208 if (unlikely(tmp == NULL)) {
1209 DRM_ERROR("Temporary cliprect memory alloc failed.\n");
1210 return -ENOMEM;
1211 }
1212
2fcd5a73
JB
1213 fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num_clips;
1214 cmd = kmalloc(fifo_size, GFP_KERNEL);
1215 if (unlikely(cmd == NULL)) {
1216 DRM_ERROR("Failed to allocate temporary fifo memory.\n");
6abff3c7
JB
1217 ret = -ENOMEM;
1218 goto out_free_tmp;
2fcd5a73
JB
1219 }
1220
203dc220
JB
1221 left = clips->x;
1222 right = clips->x + clips->w;
1223 top = clips->y;
1224 bottom = clips->y + clips->h;
1225
1226 for (i = 1; i < num_clips; i++) {
1227 left = min_t(int, left, (int)clips[i].x);
1228 right = max_t(int, right, (int)clips[i].x + clips[i].w);
1229 top = min_t(int, top, (int)clips[i].y);
1230 bottom = max_t(int, bottom, (int)clips[i].y + clips[i].h);
1231 }
1232
c6ca8391 1233 /* only need to do this once */
2fcd5a73 1234 memset(cmd, 0, fifo_size);
2fcd5a73 1235 cmd->header.id = cpu_to_le32(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN);
6abff3c7
JB
1236
1237 blits = (SVGASignedRect *)&cmd[1];
2fcd5a73 1238
203dc220
JB
1239 cmd->body.srcRect.left = left;
1240 cmd->body.srcRect.right = right;
1241 cmd->body.srcRect.top = top;
1242 cmd->body.srcRect.bottom = bottom;
2fcd5a73 1243
2fcd5a73 1244 for (i = 0; i < num_clips; i++) {
6abff3c7
JB
1245 tmp[i].x1 = clips[i].x - left;
1246 tmp[i].x2 = clips[i].x + clips[i].w - left;
1247 tmp[i].y1 = clips[i].y - top;
1248 tmp[i].y2 = clips[i].y + clips[i].h - top;
2fcd5a73
JB
1249 }
1250
c6ca8391
JB
1251 for (k = 0; k < num_units; k++) {
1252 struct vmw_display_unit *unit = units[k];
6abff3c7
JB
1253 struct vmw_clip_rect clip;
1254 int num;
1255
1256 clip.x1 = left + destX - unit->crtc.x;
1257 clip.y1 = top + destY - unit->crtc.y;
1258 clip.x2 = right + destX - unit->crtc.x;
1259 clip.y2 = bottom + destY - unit->crtc.y;
c6ca8391
JB
1260
1261 /* skip any crtcs that misses the clip region */
6abff3c7
JB
1262 if (clip.x1 >= unit->crtc.mode.hdisplay ||
1263 clip.y1 >= unit->crtc.mode.vdisplay ||
1264 clip.x2 <= 0 || clip.y2 <= 0)
c6ca8391
JB
1265 continue;
1266
6abff3c7
JB
1267 /*
1268 * In order for the clip rects to be correctly scaled
1269 * the src and dest rects needs to be the same size.
1270 */
1271 cmd->body.destRect.left = clip.x1;
1272 cmd->body.destRect.right = clip.x2;
1273 cmd->body.destRect.top = clip.y1;
1274 cmd->body.destRect.bottom = clip.y2;
1275
1276 /* create a clip rect of the crtc in dest coords */
1277 clip.x2 = unit->crtc.mode.hdisplay - clip.x1;
1278 clip.y2 = unit->crtc.mode.vdisplay - clip.y1;
1279 clip.x1 = 0 - clip.x1;
1280 clip.y1 = 0 - clip.y1;
1281
c6ca8391
JB
1282 /* need to reset sid as it is changed by execbuf */
1283 cmd->body.srcImage.sid = sid;
c6ca8391
JB
1284 cmd->body.destScreenId = unit->unit;
1285
6abff3c7
JB
1286 /* clip and write blits to cmd stream */
1287 vmw_clip_cliprects(tmp, num_clips, clip, blits, &num);
c6ca8391 1288
6abff3c7
JB
1289 /* if no cliprects hit skip this */
1290 if (num == 0)
1291 continue;
c6ca8391 1292
6abff3c7
JB
1293 /* recalculate package length */
1294 fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num;
1295 cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header));
c6ca8391 1296 ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd,
bb1bd2f4 1297 fifo_size, 0, NULL, NULL);
c6ca8391
JB
1298
1299 if (unlikely(ret != 0))
1300 break;
1301 }
2fcd5a73
JB
1302
1303 kfree(cmd);
6abff3c7
JB
1304out_free_tmp:
1305 kfree(tmp);
2fcd5a73
JB
1306
1307 return ret;
1308}
1309
1310int vmw_kms_readback(struct vmw_private *dev_priv,
1311 struct drm_file *file_priv,
1312 struct vmw_framebuffer *vfb,
1313 struct drm_vmw_fence_rep __user *user_fence_rep,
1314 struct drm_vmw_rect *clips,
1315 uint32_t num_clips)
1316{
1317 struct vmw_framebuffer_dmabuf *vfbd =
1318 vmw_framebuffer_to_vfbd(&vfb->base);
1319 struct vmw_dma_buffer *dmabuf = vfbd->buffer;
1320 struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
1321 struct drm_crtc *crtc;
1322 size_t fifo_size;
1323 int i, k, ret, num_units, blits_pos;
1324
1325 struct {
1326 uint32_t header;
1327 SVGAFifoCmdDefineGMRFB body;
1328 } *cmd;
1329 struct {
1330 uint32_t header;
1331 SVGAFifoCmdBlitScreenToGMRFB body;
1332 } *blits;
1333
1334 num_units = 0;
1335 list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
1336 if (crtc->fb != &vfb->base)
1337 continue;
1338 units[num_units++] = vmw_crtc_to_du(crtc);
1339 }
1340
1341 BUG_ON(dmabuf == NULL);
1342 BUG_ON(!clips || !num_clips);
1343
1344 /* take a safe guess at fifo size */
1345 fifo_size = sizeof(*cmd) + sizeof(*blits) * num_clips * num_units;
1346 cmd = kmalloc(fifo_size, GFP_KERNEL);
1347 if (unlikely(cmd == NULL)) {
1348 DRM_ERROR("Failed to allocate temporary fifo memory.\n");
1349 return -ENOMEM;
1350 }
1351
1352 memset(cmd, 0, fifo_size);
1353 cmd->header = SVGA_CMD_DEFINE_GMRFB;
1354 cmd->body.format.bitsPerPixel = vfb->base.bits_per_pixel;
1355 cmd->body.format.colorDepth = vfb->base.depth;
1356 cmd->body.format.reserved = 0;
01f2c773 1357 cmd->body.bytesPerLine = vfb->base.pitches[0];
90ff18bc 1358 cmd->body.ptr.gmrId = vfb->user_handle;
2fcd5a73
JB
1359 cmd->body.ptr.offset = 0;
1360
1361 blits = (void *)&cmd[1];
1362 blits_pos = 0;
1363 for (i = 0; i < num_units; i++) {
1364 struct drm_vmw_rect *c = clips;
1365 for (k = 0; k < num_clips; k++, c++) {
1366 /* transform clip coords to crtc origin based coords */
1367 int clip_x1 = c->x - units[i]->crtc.x;
1368 int clip_x2 = c->x - units[i]->crtc.x + c->w;
1369 int clip_y1 = c->y - units[i]->crtc.y;
1370 int clip_y2 = c->y - units[i]->crtc.y + c->h;
1371 int dest_x = c->x;
1372 int dest_y = c->y;
1373
1374 /* compensate for clipping, we negate
1375 * a negative number and add that.
1376 */
1377 if (clip_x1 < 0)
1378 dest_x += -clip_x1;
1379 if (clip_y1 < 0)
1380 dest_y += -clip_y1;
1381
1382 /* clip */
1383 clip_x1 = max(clip_x1, 0);
1384 clip_y1 = max(clip_y1, 0);
1385 clip_x2 = min(clip_x2, units[i]->crtc.mode.hdisplay);
1386 clip_y2 = min(clip_y2, units[i]->crtc.mode.vdisplay);
1387
1388 /* and cull any rects that misses the crtc */
1389 if (clip_x1 >= units[i]->crtc.mode.hdisplay ||
1390 clip_y1 >= units[i]->crtc.mode.vdisplay ||
1391 clip_x2 <= 0 || clip_y2 <= 0)
1392 continue;
1393
1394 blits[blits_pos].header = SVGA_CMD_BLIT_SCREEN_TO_GMRFB;
1395 blits[blits_pos].body.srcScreenId = units[i]->unit;
1396 blits[blits_pos].body.destOrigin.x = dest_x;
1397 blits[blits_pos].body.destOrigin.y = dest_y;
1398
1399 blits[blits_pos].body.srcRect.left = clip_x1;
1400 blits[blits_pos].body.srcRect.top = clip_y1;
1401 blits[blits_pos].body.srcRect.right = clip_x2;
1402 blits[blits_pos].body.srcRect.bottom = clip_y2;
1403 blits_pos++;
1404 }
1405 }
1406 /* reset size here and use calculated exact size from loops */
1407 fifo_size = sizeof(*cmd) + sizeof(*blits) * blits_pos;
1408
1409 ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd, fifo_size,
bb1bd2f4 1410 0, user_fence_rep, NULL);
2fcd5a73
JB
1411
1412 kfree(cmd);
1413
1414 return ret;
1415}
1416
fb1d9738
JB
1417int vmw_kms_init(struct vmw_private *dev_priv)
1418{
1419 struct drm_device *dev = dev_priv->dev;
1420 int ret;
1421
1422 drm_mode_config_init(dev);
1423 dev->mode_config.funcs = &vmw_kms_funcs;
3bef3572
JB
1424 dev->mode_config.min_width = 1;
1425 dev->mode_config.min_height = 1;
7e71f8a5
JB
1426 /* assumed largest fb size */
1427 dev->mode_config.max_width = 8192;
1428 dev->mode_config.max_height = 8192;
fb1d9738 1429
56d1c78d
JB
1430 ret = vmw_kms_init_screen_object_display(dev_priv);
1431 if (ret) /* Fallback */
1432 (void)vmw_kms_init_legacy_display_system(dev_priv);
fb1d9738
JB
1433
1434 return 0;
1435}
1436
1437int vmw_kms_close(struct vmw_private *dev_priv)
1438{
1439 /*
1440 * Docs says we should take the lock before calling this function
1441 * but since it destroys encoders and our destructor calls
1442 * drm_encoder_cleanup which takes the lock we deadlock.
1443 */
1444 drm_mode_config_cleanup(dev_priv->dev);
c0d18316
JB
1445 if (dev_priv->sou_priv)
1446 vmw_kms_close_screen_object_display(dev_priv);
1447 else
1448 vmw_kms_close_legacy_display_system(dev_priv);
fb1d9738
JB
1449 return 0;
1450}
1451
1452int vmw_kms_cursor_bypass_ioctl(struct drm_device *dev, void *data,
1453 struct drm_file *file_priv)
1454{
1455 struct drm_vmw_cursor_bypass_arg *arg = data;
1456 struct vmw_display_unit *du;
1457 struct drm_mode_object *obj;
1458 struct drm_crtc *crtc;
1459 int ret = 0;
1460
1461
1462 mutex_lock(&dev->mode_config.mutex);
1463 if (arg->flags & DRM_VMW_CURSOR_BYPASS_ALL) {
1464
1465 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
1466 du = vmw_crtc_to_du(crtc);
1467 du->hotspot_x = arg->xhot;
1468 du->hotspot_y = arg->yhot;
1469 }
1470
1471 mutex_unlock(&dev->mode_config.mutex);
1472 return 0;
1473 }
1474
1475 obj = drm_mode_object_find(dev, arg->crtc_id, DRM_MODE_OBJECT_CRTC);
1476 if (!obj) {
1477 ret = -EINVAL;
1478 goto out;
1479 }
1480
1481 crtc = obj_to_crtc(obj);
1482 du = vmw_crtc_to_du(crtc);
1483
1484 du->hotspot_x = arg->xhot;
1485 du->hotspot_y = arg->yhot;
1486
1487out:
1488 mutex_unlock(&dev->mode_config.mutex);
1489
1490 return ret;
1491}
1492
0bef23f9 1493int vmw_kms_write_svga(struct vmw_private *vmw_priv,
d7e1958d 1494 unsigned width, unsigned height, unsigned pitch,
6558429b 1495 unsigned bpp, unsigned depth)
fb1d9738 1496{
d7e1958d
JB
1497 if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1498 vmw_write(vmw_priv, SVGA_REG_PITCHLOCK, pitch);
1499 else if (vmw_fifo_have_pitchlock(vmw_priv))
1500 iowrite32(pitch, vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK);
1501 vmw_write(vmw_priv, SVGA_REG_WIDTH, width);
1502 vmw_write(vmw_priv, SVGA_REG_HEIGHT, height);
6558429b 1503 vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, bpp);
0bef23f9
MD
1504
1505 if (vmw_read(vmw_priv, SVGA_REG_DEPTH) != depth) {
1506 DRM_ERROR("Invalid depth %u for %u bpp, host expects %u\n",
1507 depth, bpp, vmw_read(vmw_priv, SVGA_REG_DEPTH));
1508 return -EINVAL;
1509 }
1510
1511 return 0;
d7e1958d 1512}
fb1d9738 1513
d7e1958d
JB
1514int vmw_kms_save_vga(struct vmw_private *vmw_priv)
1515{
7c4f7780
TH
1516 struct vmw_vga_topology_state *save;
1517 uint32_t i;
1518
fb1d9738
JB
1519 vmw_priv->vga_width = vmw_read(vmw_priv, SVGA_REG_WIDTH);
1520 vmw_priv->vga_height = vmw_read(vmw_priv, SVGA_REG_HEIGHT);
7c4f7780 1521 vmw_priv->vga_bpp = vmw_read(vmw_priv, SVGA_REG_BITS_PER_PIXEL);
d7e1958d
JB
1522 if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1523 vmw_priv->vga_pitchlock =
7c4f7780 1524 vmw_read(vmw_priv, SVGA_REG_PITCHLOCK);
d7e1958d 1525 else if (vmw_fifo_have_pitchlock(vmw_priv))
7c4f7780
TH
1526 vmw_priv->vga_pitchlock = ioread32(vmw_priv->mmio_virt +
1527 SVGA_FIFO_PITCHLOCK);
1528
1529 if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
1530 return 0;
fb1d9738 1531
7c4f7780
TH
1532 vmw_priv->num_displays = vmw_read(vmw_priv,
1533 SVGA_REG_NUM_GUEST_DISPLAYS);
1534
029e50bf
TH
1535 if (vmw_priv->num_displays == 0)
1536 vmw_priv->num_displays = 1;
1537
7c4f7780
TH
1538 for (i = 0; i < vmw_priv->num_displays; ++i) {
1539 save = &vmw_priv->vga_save[i];
1540 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
1541 save->primary = vmw_read(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY);
1542 save->pos_x = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_X);
1543 save->pos_y = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y);
1544 save->width = vmw_read(vmw_priv, SVGA_REG_DISPLAY_WIDTH);
1545 save->height = vmw_read(vmw_priv, SVGA_REG_DISPLAY_HEIGHT);
1546 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
30c78bb8
TH
1547 if (i == 0 && vmw_priv->num_displays == 1 &&
1548 save->width == 0 && save->height == 0) {
1549
1550 /*
1551 * It should be fairly safe to assume that these
1552 * values are uninitialized.
1553 */
1554
1555 save->width = vmw_priv->vga_width - save->pos_x;
1556 save->height = vmw_priv->vga_height - save->pos_y;
1557 }
7c4f7780 1558 }
30c78bb8 1559
fb1d9738
JB
1560 return 0;
1561}
1562
1563int vmw_kms_restore_vga(struct vmw_private *vmw_priv)
1564{
7c4f7780
TH
1565 struct vmw_vga_topology_state *save;
1566 uint32_t i;
1567
fb1d9738
JB
1568 vmw_write(vmw_priv, SVGA_REG_WIDTH, vmw_priv->vga_width);
1569 vmw_write(vmw_priv, SVGA_REG_HEIGHT, vmw_priv->vga_height);
7c4f7780 1570 vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, vmw_priv->vga_bpp);
d7e1958d
JB
1571 if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1572 vmw_write(vmw_priv, SVGA_REG_PITCHLOCK,
1573 vmw_priv->vga_pitchlock);
1574 else if (vmw_fifo_have_pitchlock(vmw_priv))
1575 iowrite32(vmw_priv->vga_pitchlock,
1576 vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK);
fb1d9738 1577
7c4f7780
TH
1578 if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
1579 return 0;
1580
1581 for (i = 0; i < vmw_priv->num_displays; ++i) {
1582 save = &vmw_priv->vga_save[i];
1583 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
1584 vmw_write(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY, save->primary);
1585 vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_X, save->pos_x);
1586 vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y, save->pos_y);
1587 vmw_write(vmw_priv, SVGA_REG_DISPLAY_WIDTH, save->width);
1588 vmw_write(vmw_priv, SVGA_REG_DISPLAY_HEIGHT, save->height);
1589 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
1590 }
1591
fb1d9738
JB
1592 return 0;
1593}
d8bd19d2 1594
e133e737
TH
1595bool vmw_kms_validate_mode_vram(struct vmw_private *dev_priv,
1596 uint32_t pitch,
1597 uint32_t height)
1598{
1599 return ((u64) pitch * (u64) height) < (u64) dev_priv->vram_size;
1600}
1601
1c482ab3
JB
1602
1603/**
1604 * Function called by DRM code called with vbl_lock held.
1605 */
7a1c2f6c
TH
1606u32 vmw_get_vblank_counter(struct drm_device *dev, int crtc)
1607{
1608 return 0;
1609}
626ab771 1610
1c482ab3
JB
1611/**
1612 * Function called by DRM code called with vbl_lock held.
1613 */
1614int vmw_enable_vblank(struct drm_device *dev, int crtc)
1615{
1616 return -ENOSYS;
1617}
1618
1619/**
1620 * Function called by DRM code called with vbl_lock held.
1621 */
1622void vmw_disable_vblank(struct drm_device *dev, int crtc)
1623{
1624}
1625
626ab771
JB
1626
1627/*
1628 * Small shared kms functions.
1629 */
1630
1631int vmw_du_update_layout(struct vmw_private *dev_priv, unsigned num,
1632 struct drm_vmw_rect *rects)
1633{
1634 struct drm_device *dev = dev_priv->dev;
1635 struct vmw_display_unit *du;
1636 struct drm_connector *con;
626ab771
JB
1637
1638 mutex_lock(&dev->mode_config.mutex);
1639
1640#if 0
6ea77d13
TH
1641 {
1642 unsigned int i;
1643
1644 DRM_INFO("%s: new layout ", __func__);
1645 for (i = 0; i < num; i++)
1646 DRM_INFO("(%i, %i %ux%u) ", rects[i].x, rects[i].y,
1647 rects[i].w, rects[i].h);
1648 DRM_INFO("\n");
1649 }
626ab771
JB
1650#endif
1651
1652 list_for_each_entry(con, &dev->mode_config.connector_list, head) {
1653 du = vmw_connector_to_du(con);
1654 if (num > du->unit) {
1655 du->pref_width = rects[du->unit].w;
1656 du->pref_height = rects[du->unit].h;
1657 du->pref_active = true;
cd2b89e7
TH
1658 du->gui_x = rects[du->unit].x;
1659 du->gui_y = rects[du->unit].y;
626ab771
JB
1660 } else {
1661 du->pref_width = 800;
1662 du->pref_height = 600;
1663 du->pref_active = false;
1664 }
1665 con->status = vmw_du_connector_detect(con, true);
1666 }
1667
1668 mutex_unlock(&dev->mode_config.mutex);
1669
1670 return 0;
1671}
1672
b5ec427e
JB
1673int vmw_du_page_flip(struct drm_crtc *crtc,
1674 struct drm_framebuffer *fb,
1675 struct drm_pending_vblank_event *event)
1676{
1677 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
1678 struct drm_framebuffer *old_fb = crtc->fb;
1679 struct vmw_framebuffer *vfb = vmw_framebuffer_to_vfb(fb);
f5869a83 1680 struct drm_file *file_priv ;
b5ec427e
JB
1681 struct vmw_fence_obj *fence = NULL;
1682 struct drm_clip_rect clips;
1683 int ret;
1684
f5869a83
AC
1685 if (event == NULL)
1686 return -EINVAL;
1687
b5ec427e
JB
1688 /* require ScreenObject support for page flipping */
1689 if (!dev_priv->sou_priv)
1690 return -ENOSYS;
1691
f5869a83 1692 file_priv = event->base.file_priv;
b5ec427e
JB
1693 if (!vmw_kms_screen_object_flippable(dev_priv, crtc))
1694 return -EINVAL;
1695
1696 crtc->fb = fb;
1697
1698 /* do a full screen dirty update */
1699 clips.x1 = clips.y1 = 0;
1700 clips.x2 = fb->width;
1701 clips.y2 = fb->height;
1702
1703 if (vfb->dmabuf)
1704 ret = do_dmabuf_dirty_sou(file_priv, dev_priv, vfb,
1705 0, 0, &clips, 1, 1, &fence);
1706 else
1707 ret = do_surface_dirty_sou(dev_priv, file_priv, vfb,
1708 0, 0, &clips, 1, 1, &fence);
1709
1710
1711 if (ret != 0)
1712 goto out_no_fence;
1713 if (!fence) {
1714 ret = -EINVAL;
1715 goto out_no_fence;
1716 }
1717
1718 ret = vmw_event_fence_action_queue(file_priv, fence,
1719 &event->base,
1720 &event->event.tv_sec,
1721 &event->event.tv_usec,
1722 true);
1723
1724 /*
1725 * No need to hold on to this now. The only cleanup
1726 * we need to do if we fail is unref the fence.
1727 */
1728 vmw_fence_obj_unreference(&fence);
1729
1730 if (vmw_crtc_to_du(crtc)->is_implicit)
1731 vmw_kms_screen_object_update_implicit_fb(dev_priv, crtc);
1732
1733 return ret;
1734
1735out_no_fence:
1736 crtc->fb = old_fb;
1737 return ret;
1738}
1739
1740
626ab771
JB
1741void vmw_du_crtc_save(struct drm_crtc *crtc)
1742{
1743}
1744
1745void vmw_du_crtc_restore(struct drm_crtc *crtc)
1746{
1747}
1748
1749void vmw_du_crtc_gamma_set(struct drm_crtc *crtc,
1750 u16 *r, u16 *g, u16 *b,
1751 uint32_t start, uint32_t size)
1752{
1753 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
1754 int i;
1755
1756 for (i = 0; i < size; i++) {
1757 DRM_DEBUG("%d r/g/b = 0x%04x / 0x%04x / 0x%04x\n", i,
1758 r[i], g[i], b[i]);
1759 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 0, r[i] >> 8);
1760 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 1, g[i] >> 8);
1761 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 2, b[i] >> 8);
1762 }
1763}
1764
1765void vmw_du_connector_dpms(struct drm_connector *connector, int mode)
1766{
1767}
1768
1769void vmw_du_connector_save(struct drm_connector *connector)
1770{
1771}
1772
1773void vmw_du_connector_restore(struct drm_connector *connector)
1774{
1775}
1776
1777enum drm_connector_status
1778vmw_du_connector_detect(struct drm_connector *connector, bool force)
1779{
1780 uint32_t num_displays;
1781 struct drm_device *dev = connector->dev;
1782 struct vmw_private *dev_priv = vmw_priv(dev);
cd2b89e7 1783 struct vmw_display_unit *du = vmw_connector_to_du(connector);
626ab771
JB
1784
1785 mutex_lock(&dev_priv->hw_mutex);
1786 num_displays = vmw_read(dev_priv, SVGA_REG_NUM_DISPLAYS);
1787 mutex_unlock(&dev_priv->hw_mutex);
1788
cd2b89e7
TH
1789 return ((vmw_connector_to_du(connector)->unit < num_displays &&
1790 du->pref_active) ?
626ab771
JB
1791 connector_status_connected : connector_status_disconnected);
1792}
1793
1794static struct drm_display_mode vmw_kms_connector_builtin[] = {
1795 /* 640x480@60Hz */
1796 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
1797 752, 800, 0, 480, 489, 492, 525, 0,
1798 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
1799 /* 800x600@60Hz */
1800 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
1801 968, 1056, 0, 600, 601, 605, 628, 0,
1802 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1803 /* 1024x768@60Hz */
1804 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
1805 1184, 1344, 0, 768, 771, 777, 806, 0,
1806 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
1807 /* 1152x864@75Hz */
1808 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
1809 1344, 1600, 0, 864, 865, 868, 900, 0,
1810 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1811 /* 1280x768@60Hz */
1812 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
1813 1472, 1664, 0, 768, 771, 778, 798, 0,
1814 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1815 /* 1280x800@60Hz */
1816 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
1817 1480, 1680, 0, 800, 803, 809, 831, 0,
1818 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
1819 /* 1280x960@60Hz */
1820 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
1821 1488, 1800, 0, 960, 961, 964, 1000, 0,
1822 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1823 /* 1280x1024@60Hz */
1824 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
1825 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
1826 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1827 /* 1360x768@60Hz */
1828 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
1829 1536, 1792, 0, 768, 771, 777, 795, 0,
1830 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1831 /* 1440x1050@60Hz */
1832 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
1833 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
1834 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1835 /* 1440x900@60Hz */
1836 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
1837 1672, 1904, 0, 900, 903, 909, 934, 0,
1838 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1839 /* 1600x1200@60Hz */
1840 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
1841 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
1842 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1843 /* 1680x1050@60Hz */
1844 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
1845 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
1846 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1847 /* 1792x1344@60Hz */
1848 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
1849 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
1850 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1851 /* 1853x1392@60Hz */
1852 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
1853 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
1854 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1855 /* 1920x1200@60Hz */
1856 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
1857 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
1858 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1859 /* 1920x1440@60Hz */
1860 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
1861 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
1862 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1863 /* 2560x1600@60Hz */
1864 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
1865 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
1866 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1867 /* Terminate */
1868 { DRM_MODE("", 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) },
1869};
1870
1543b4dd
TH
1871/**
1872 * vmw_guess_mode_timing - Provide fake timings for a
1873 * 60Hz vrefresh mode.
1874 *
1875 * @mode - Pointer to a struct drm_display_mode with hdisplay and vdisplay
1876 * members filled in.
1877 */
1878static void vmw_guess_mode_timing(struct drm_display_mode *mode)
1879{
1880 mode->hsync_start = mode->hdisplay + 50;
1881 mode->hsync_end = mode->hsync_start + 50;
1882 mode->htotal = mode->hsync_end + 50;
1883
1884 mode->vsync_start = mode->vdisplay + 50;
1885 mode->vsync_end = mode->vsync_start + 50;
1886 mode->vtotal = mode->vsync_end + 50;
1887
1888 mode->clock = (u32)mode->htotal * (u32)mode->vtotal / 100 * 6;
1889 mode->vrefresh = drm_mode_vrefresh(mode);
1890}
1891
1892
626ab771
JB
1893int vmw_du_connector_fill_modes(struct drm_connector *connector,
1894 uint32_t max_width, uint32_t max_height)
1895{
1896 struct vmw_display_unit *du = vmw_connector_to_du(connector);
1897 struct drm_device *dev = connector->dev;
1898 struct vmw_private *dev_priv = vmw_priv(dev);
1899 struct drm_display_mode *mode = NULL;
1900 struct drm_display_mode *bmode;
1901 struct drm_display_mode prefmode = { DRM_MODE("preferred",
1902 DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
1903 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1904 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC)
1905 };
1906 int i;
1907
1908 /* Add preferred mode */
1909 {
1910 mode = drm_mode_duplicate(dev, &prefmode);
1911 if (!mode)
1912 return 0;
1913 mode->hdisplay = du->pref_width;
1914 mode->vdisplay = du->pref_height;
1543b4dd 1915 vmw_guess_mode_timing(mode);
55bde5b2 1916
626ab771
JB
1917 if (vmw_kms_validate_mode_vram(dev_priv, mode->hdisplay * 2,
1918 mode->vdisplay)) {
1919 drm_mode_probed_add(connector, mode);
55bde5b2
JB
1920 } else {
1921 drm_mode_destroy(dev, mode);
1922 mode = NULL;
1923 }
626ab771 1924
55bde5b2
JB
1925 if (du->pref_mode) {
1926 list_del_init(&du->pref_mode->head);
1927 drm_mode_destroy(dev, du->pref_mode);
626ab771 1928 }
55bde5b2
JB
1929
1930 /* mode might be null here, this is intended */
1931 du->pref_mode = mode;
626ab771
JB
1932 }
1933
1934 for (i = 0; vmw_kms_connector_builtin[i].type != 0; i++) {
1935 bmode = &vmw_kms_connector_builtin[i];
1936 if (bmode->hdisplay > max_width ||
1937 bmode->vdisplay > max_height)
1938 continue;
1939
1940 if (!vmw_kms_validate_mode_vram(dev_priv, bmode->hdisplay * 2,
1941 bmode->vdisplay))
1942 continue;
1943
1944 mode = drm_mode_duplicate(dev, bmode);
1945 if (!mode)
1946 return 0;
1947 mode->vrefresh = drm_mode_vrefresh(mode);
1948
1949 drm_mode_probed_add(connector, mode);
1950 }
1951
d41025c0
JB
1952 /* Move the prefered mode first, help apps pick the right mode. */
1953 if (du->pref_mode)
1954 list_move(&du->pref_mode->head, &connector->probed_modes);
1955
626ab771
JB
1956 drm_mode_connector_list_update(connector);
1957
1958 return 1;
1959}
1960
1961int vmw_du_connector_set_property(struct drm_connector *connector,
1962 struct drm_property *property,
1963 uint64_t val)
1964{
1965 return 0;
1966}
cd2b89e7
TH
1967
1968
1969int vmw_kms_update_layout_ioctl(struct drm_device *dev, void *data,
1970 struct drm_file *file_priv)
1971{
1972 struct vmw_private *dev_priv = vmw_priv(dev);
1973 struct drm_vmw_update_layout_arg *arg =
1974 (struct drm_vmw_update_layout_arg *)data;
1975 struct vmw_master *vmaster = vmw_master(file_priv->master);
1976 void __user *user_rects;
1977 struct drm_vmw_rect *rects;
1978 unsigned rects_size;
1979 int ret;
1980 int i;
1981 struct drm_mode_config *mode_config = &dev->mode_config;
1982
1983 ret = ttm_read_lock(&vmaster->lock, true);
1984 if (unlikely(ret != 0))
1985 return ret;
1986
1987 if (!arg->num_outputs) {
1988 struct drm_vmw_rect def_rect = {0, 0, 800, 600};
1989 vmw_du_update_layout(dev_priv, 1, &def_rect);
1990 goto out_unlock;
1991 }
1992
1993 rects_size = arg->num_outputs * sizeof(struct drm_vmw_rect);
bab9efc2
XW
1994 rects = kcalloc(arg->num_outputs, sizeof(struct drm_vmw_rect),
1995 GFP_KERNEL);
cd2b89e7
TH
1996 if (unlikely(!rects)) {
1997 ret = -ENOMEM;
1998 goto out_unlock;
1999 }
2000
2001 user_rects = (void __user *)(unsigned long)arg->rects;
2002 ret = copy_from_user(rects, user_rects, rects_size);
2003 if (unlikely(ret != 0)) {
2004 DRM_ERROR("Failed to get rects.\n");
2005 ret = -EFAULT;
2006 goto out_free;
2007 }
2008
2009 for (i = 0; i < arg->num_outputs; ++i) {
bab9efc2
XW
2010 if (rects[i].x < 0 ||
2011 rects[i].y < 0 ||
2012 rects[i].x + rects[i].w > mode_config->max_width ||
2013 rects[i].y + rects[i].h > mode_config->max_height) {
cd2b89e7
TH
2014 DRM_ERROR("Invalid GUI layout.\n");
2015 ret = -EINVAL;
2016 goto out_free;
2017 }
2018 }
2019
2020 vmw_du_update_layout(dev_priv, arg->num_outputs, rects);
2021
2022out_free:
2023 kfree(rects);
2024out_unlock:
2025 ttm_read_unlock(&vmaster->lock);
2026 return ret;
2027}