]> git.proxmox.com Git - mirror_ubuntu-zesty-kernel.git/blame - drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
drm/vmwgfx: Add "quirk" to handling command verification exceptions
[mirror_ubuntu-zesty-kernel.git] / drivers / gpu / drm / vmwgfx / vmwgfx_kms.c
CommitLineData
fb1d9738
JB
1/**************************************************************************
2 *
c8261a96 3 * Copyright © 2009-2014 VMware, Inc., Palo Alto, CA., USA
fb1d9738
JB
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28#include "vmwgfx_kms.h"
29
56d1c78d 30
fb1d9738
JB
31/* Might need a hrtimer here? */
32#define VMWGFX_PRESENT_RATE ((HZ / 60 > 0) ? HZ / 60 : 1)
33
6abff3c7 34
6abff3c7
JB
35
36/**
37 * Clip @num_rects number of @rects against @clip storing the
38 * results in @out_rects and the number of passed rects in @out_num.
39 */
c8261a96 40void vmw_clip_cliprects(struct drm_clip_rect *rects,
6abff3c7
JB
41 int num_rects,
42 struct vmw_clip_rect clip,
43 SVGASignedRect *out_rects,
44 int *out_num)
45{
46 int i, k;
47
48 for (i = 0, k = 0; i < num_rects; i++) {
49 int x1 = max_t(int, clip.x1, rects[i].x1);
50 int y1 = max_t(int, clip.y1, rects[i].y1);
51 int x2 = min_t(int, clip.x2, rects[i].x2);
52 int y2 = min_t(int, clip.y2, rects[i].y2);
53
54 if (x1 >= x2)
55 continue;
56 if (y1 >= y2)
57 continue;
58
59 out_rects[k].left = x1;
60 out_rects[k].top = y1;
61 out_rects[k].right = x2;
62 out_rects[k].bottom = y2;
63 k++;
64 }
65
66 *out_num = k;
67}
68
c8261a96 69void vmw_du_cleanup(struct vmw_display_unit *du)
fb1d9738
JB
70{
71 if (du->cursor_surface)
72 vmw_surface_unreference(&du->cursor_surface);
73 if (du->cursor_dmabuf)
74 vmw_dmabuf_unreference(&du->cursor_dmabuf);
34ea3d38 75 drm_connector_unregister(&du->connector);
fb1d9738
JB
76 drm_crtc_cleanup(&du->crtc);
77 drm_encoder_cleanup(&du->encoder);
78 drm_connector_cleanup(&du->connector);
79}
80
81/*
82 * Display Unit Cursor functions
83 */
84
85int vmw_cursor_update_image(struct vmw_private *dev_priv,
86 u32 *image, u32 width, u32 height,
87 u32 hotspotX, u32 hotspotY)
88{
89 struct {
90 u32 cmd;
91 SVGAFifoCmdDefineAlphaCursor cursor;
92 } *cmd;
93 u32 image_size = width * height * 4;
94 u32 cmd_size = sizeof(*cmd) + image_size;
95
96 if (!image)
97 return -EINVAL;
98
99 cmd = vmw_fifo_reserve(dev_priv, cmd_size);
100 if (unlikely(cmd == NULL)) {
101 DRM_ERROR("Fifo reserve failed.\n");
102 return -ENOMEM;
103 }
104
105 memset(cmd, 0, sizeof(*cmd));
106
107 memcpy(&cmd[1], image, image_size);
108
109 cmd->cmd = cpu_to_le32(SVGA_CMD_DEFINE_ALPHA_CURSOR);
110 cmd->cursor.id = cpu_to_le32(0);
111 cmd->cursor.width = cpu_to_le32(width);
112 cmd->cursor.height = cpu_to_le32(height);
113 cmd->cursor.hotspotX = cpu_to_le32(hotspotX);
114 cmd->cursor.hotspotY = cpu_to_le32(hotspotY);
115
116 vmw_fifo_commit(dev_priv, cmd_size);
117
118 return 0;
119}
120
6a91d97e
JB
121int vmw_cursor_update_dmabuf(struct vmw_private *dev_priv,
122 struct vmw_dma_buffer *dmabuf,
123 u32 width, u32 height,
124 u32 hotspotX, u32 hotspotY)
125{
126 struct ttm_bo_kmap_obj map;
127 unsigned long kmap_offset;
128 unsigned long kmap_num;
129 void *virtual;
130 bool dummy;
131 int ret;
132
133 kmap_offset = 0;
134 kmap_num = (width*height*4 + PAGE_SIZE - 1) >> PAGE_SHIFT;
135
ee3939e0 136 ret = ttm_bo_reserve(&dmabuf->base, true, false, false, NULL);
6a91d97e
JB
137 if (unlikely(ret != 0)) {
138 DRM_ERROR("reserve failed\n");
139 return -EINVAL;
140 }
141
142 ret = ttm_bo_kmap(&dmabuf->base, kmap_offset, kmap_num, &map);
143 if (unlikely(ret != 0))
144 goto err_unreserve;
145
146 virtual = ttm_kmap_obj_virtual(&map, &dummy);
147 ret = vmw_cursor_update_image(dev_priv, virtual, width, height,
148 hotspotX, hotspotY);
149
150 ttm_bo_kunmap(&map);
151err_unreserve:
152 ttm_bo_unreserve(&dmabuf->base);
153
154 return ret;
155}
156
157
fb1d9738
JB
158void vmw_cursor_update_position(struct vmw_private *dev_priv,
159 bool show, int x, int y)
160{
161 __le32 __iomem *fifo_mem = dev_priv->mmio_virt;
162 uint32_t count;
163
164 iowrite32(show ? 1 : 0, fifo_mem + SVGA_FIFO_CURSOR_ON);
165 iowrite32(x, fifo_mem + SVGA_FIFO_CURSOR_X);
166 iowrite32(y, fifo_mem + SVGA_FIFO_CURSOR_Y);
167 count = ioread32(fifo_mem + SVGA_FIFO_CURSOR_COUNT);
168 iowrite32(++count, fifo_mem + SVGA_FIFO_CURSOR_COUNT);
169}
170
171int vmw_du_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv,
172 uint32_t handle, uint32_t width, uint32_t height)
173{
174 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
fb1d9738
JB
175 struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
176 struct vmw_surface *surface = NULL;
177 struct vmw_dma_buffer *dmabuf = NULL;
178 int ret;
179
bfb89928
DV
180 /*
181 * FIXME: Unclear whether there's any global state touched by the
182 * cursor_set function, especially vmw_cursor_update_position looks
183 * suspicious. For now take the easy route and reacquire all locks. We
184 * can do this since the caller in the drm core doesn't check anything
185 * which is protected by any looks.
186 */
21e88620 187 drm_modeset_unlock_crtc(crtc);
bfb89928
DV
188 drm_modeset_lock_all(dev_priv->dev);
189
baa91d64 190 /* A lot of the code assumes this */
bfb89928
DV
191 if (handle && (width != 64 || height != 64)) {
192 ret = -EINVAL;
193 goto out;
194 }
baa91d64 195
fb1d9738 196 if (handle) {
a5d0f576
VS
197 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
198
e7ac9211
JB
199 ret = vmw_user_lookup_handle(dev_priv, tfile,
200 handle, &surface, &dmabuf);
201 if (ret) {
202 DRM_ERROR("failed to find surface or dmabuf: %i\n", ret);
bfb89928
DV
203 ret = -EINVAL;
204 goto out;
fb1d9738
JB
205 }
206 }
207
e7ac9211
JB
208 /* need to do this before taking down old image */
209 if (surface && !surface->snooper.image) {
210 DRM_ERROR("surface not suitable for cursor\n");
211 vmw_surface_unreference(&surface);
bfb89928
DV
212 ret = -EINVAL;
213 goto out;
e7ac9211
JB
214 }
215
fb1d9738
JB
216 /* takedown old cursor */
217 if (du->cursor_surface) {
218 du->cursor_surface->snooper.crtc = NULL;
219 vmw_surface_unreference(&du->cursor_surface);
220 }
221 if (du->cursor_dmabuf)
222 vmw_dmabuf_unreference(&du->cursor_dmabuf);
223
224 /* setup new image */
225 if (surface) {
226 /* vmw_user_surface_lookup takes one reference */
227 du->cursor_surface = surface;
228
229 du->cursor_surface->snooper.crtc = crtc;
230 du->cursor_age = du->cursor_surface->snooper.age;
231 vmw_cursor_update_image(dev_priv, surface->snooper.image,
232 64, 64, du->hotspot_x, du->hotspot_y);
233 } else if (dmabuf) {
fb1d9738
JB
234 /* vmw_user_surface_lookup takes one reference */
235 du->cursor_dmabuf = dmabuf;
236
6a91d97e
JB
237 ret = vmw_cursor_update_dmabuf(dev_priv, dmabuf, width, height,
238 du->hotspot_x, du->hotspot_y);
fb1d9738
JB
239 } else {
240 vmw_cursor_update_position(dev_priv, false, 0, 0);
bfb89928
DV
241 ret = 0;
242 goto out;
fb1d9738
JB
243 }
244
da7653d6
TH
245 vmw_cursor_update_position(dev_priv, true,
246 du->cursor_x + du->hotspot_x,
247 du->cursor_y + du->hotspot_y);
fb1d9738 248
bfb89928
DV
249 ret = 0;
250out:
251 drm_modeset_unlock_all(dev_priv->dev);
4d02e2de 252 drm_modeset_lock_crtc(crtc, crtc->cursor);
bfb89928
DV
253
254 return ret;
fb1d9738
JB
255}
256
257int vmw_du_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
258{
259 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
260 struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
261 bool shown = du->cursor_surface || du->cursor_dmabuf ? true : false;
262
263 du->cursor_x = x + crtc->x;
264 du->cursor_y = y + crtc->y;
265
dac35663
DV
266 /*
267 * FIXME: Unclear whether there's any global state touched by the
268 * cursor_set function, especially vmw_cursor_update_position looks
269 * suspicious. For now take the easy route and reacquire all locks. We
270 * can do this since the caller in the drm core doesn't check anything
271 * which is protected by any looks.
272 */
21e88620 273 drm_modeset_unlock_crtc(crtc);
dac35663
DV
274 drm_modeset_lock_all(dev_priv->dev);
275
fb1d9738 276 vmw_cursor_update_position(dev_priv, shown,
da7653d6
TH
277 du->cursor_x + du->hotspot_x,
278 du->cursor_y + du->hotspot_y);
fb1d9738 279
dac35663 280 drm_modeset_unlock_all(dev_priv->dev);
4d02e2de 281 drm_modeset_lock_crtc(crtc, crtc->cursor);
dac35663 282
fb1d9738
JB
283 return 0;
284}
285
286void vmw_kms_cursor_snoop(struct vmw_surface *srf,
287 struct ttm_object_file *tfile,
288 struct ttm_buffer_object *bo,
289 SVGA3dCmdHeader *header)
290{
291 struct ttm_bo_kmap_obj map;
292 unsigned long kmap_offset;
293 unsigned long kmap_num;
294 SVGA3dCopyBox *box;
295 unsigned box_count;
296 void *virtual;
297 bool dummy;
298 struct vmw_dma_cmd {
299 SVGA3dCmdHeader header;
300 SVGA3dCmdSurfaceDMA dma;
301 } *cmd;
2ac86371 302 int i, ret;
fb1d9738
JB
303
304 cmd = container_of(header, struct vmw_dma_cmd, header);
305
306 /* No snooper installed */
307 if (!srf->snooper.image)
308 return;
309
310 if (cmd->dma.host.face != 0 || cmd->dma.host.mipmap != 0) {
311 DRM_ERROR("face and mipmap for cursors should never != 0\n");
312 return;
313 }
314
315 if (cmd->header.size < 64) {
316 DRM_ERROR("at least one full copy box must be given\n");
317 return;
318 }
319
320 box = (SVGA3dCopyBox *)&cmd[1];
321 box_count = (cmd->header.size - sizeof(SVGA3dCmdSurfaceDMA)) /
322 sizeof(SVGA3dCopyBox);
323
2ac86371 324 if (cmd->dma.guest.ptr.offset % PAGE_SIZE ||
fb1d9738
JB
325 box->x != 0 || box->y != 0 || box->z != 0 ||
326 box->srcx != 0 || box->srcy != 0 || box->srcz != 0 ||
2ac86371 327 box->d != 1 || box_count != 1) {
fb1d9738 328 /* TODO handle none page aligned offsets */
2ac86371
JB
329 /* TODO handle more dst & src != 0 */
330 /* TODO handle more then one copy */
331 DRM_ERROR("Cant snoop dma request for cursor!\n");
332 DRM_ERROR("(%u, %u, %u) (%u, %u, %u) (%ux%ux%u) %u %u\n",
333 box->srcx, box->srcy, box->srcz,
334 box->x, box->y, box->z,
335 box->w, box->h, box->d, box_count,
336 cmd->dma.guest.ptr.offset);
fb1d9738
JB
337 return;
338 }
339
340 kmap_offset = cmd->dma.guest.ptr.offset >> PAGE_SHIFT;
341 kmap_num = (64*64*4) >> PAGE_SHIFT;
342
ee3939e0 343 ret = ttm_bo_reserve(bo, true, false, false, NULL);
fb1d9738
JB
344 if (unlikely(ret != 0)) {
345 DRM_ERROR("reserve failed\n");
346 return;
347 }
348
349 ret = ttm_bo_kmap(bo, kmap_offset, kmap_num, &map);
350 if (unlikely(ret != 0))
351 goto err_unreserve;
352
353 virtual = ttm_kmap_obj_virtual(&map, &dummy);
354
2ac86371
JB
355 if (box->w == 64 && cmd->dma.guest.pitch == 64*4) {
356 memcpy(srf->snooper.image, virtual, 64*64*4);
357 } else {
358 /* Image is unsigned pointer. */
359 for (i = 0; i < box->h; i++)
360 memcpy(srf->snooper.image + i * 64,
361 virtual + i * cmd->dma.guest.pitch,
362 box->w * 4);
363 }
364
fb1d9738
JB
365 srf->snooper.age++;
366
fb1d9738
JB
367 ttm_bo_kunmap(&map);
368err_unreserve:
369 ttm_bo_unreserve(bo);
370}
371
372void vmw_kms_cursor_post_execbuf(struct vmw_private *dev_priv)
373{
374 struct drm_device *dev = dev_priv->dev;
375 struct vmw_display_unit *du;
376 struct drm_crtc *crtc;
377
378 mutex_lock(&dev->mode_config.mutex);
379
380 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
381 du = vmw_crtc_to_du(crtc);
382 if (!du->cursor_surface ||
383 du->cursor_age == du->cursor_surface->snooper.age)
384 continue;
385
386 du->cursor_age = du->cursor_surface->snooper.age;
387 vmw_cursor_update_image(dev_priv,
388 du->cursor_surface->snooper.image,
389 64, 64, du->hotspot_x, du->hotspot_y);
390 }
391
392 mutex_unlock(&dev->mode_config.mutex);
393}
394
395/*
396 * Generic framebuffer code
397 */
398
fb1d9738
JB
399/*
400 * Surface framebuffer code
401 */
402
847c5964 403static void vmw_framebuffer_surface_destroy(struct drm_framebuffer *framebuffer)
fb1d9738 404{
3a939a5e 405 struct vmw_framebuffer_surface *vfbs =
fb1d9738 406 vmw_framebuffer_to_vfbs(framebuffer);
3a939a5e
TH
407 struct vmw_master *vmaster = vmw_master(vfbs->master);
408
409
410 mutex_lock(&vmaster->fb_surf_mutex);
411 list_del(&vfbs->head);
412 mutex_unlock(&vmaster->fb_surf_mutex);
fb1d9738 413
3a939a5e 414 drm_master_put(&vfbs->master);
fb1d9738 415 drm_framebuffer_cleanup(framebuffer);
3a939a5e 416 vmw_surface_unreference(&vfbs->surface);
90ff18bc 417 ttm_base_object_unref(&vfbs->base.user_obj);
fb1d9738 418
3a939a5e 419 kfree(vfbs);
fb1d9738
JB
420}
421
847c5964 422static int vmw_framebuffer_surface_dirty(struct drm_framebuffer *framebuffer,
02b00162 423 struct drm_file *file_priv,
fb1d9738
JB
424 unsigned flags, unsigned color,
425 struct drm_clip_rect *clips,
426 unsigned num_clips)
427{
428 struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
429 struct vmw_framebuffer_surface *vfbs =
430 vmw_framebuffer_to_vfbs(framebuffer);
fb1d9738 431 struct drm_clip_rect norect;
5deb65cf 432 int ret, inc = 1;
fb1d9738 433
3a939a5e
TH
434 if (unlikely(vfbs->master != file_priv->master))
435 return -EINVAL;
436
c8261a96
SY
437 /* Legacy Display Unit does not support 3D */
438 if (dev_priv->active_display_unit == vmw_du_legacy)
01e81419
JB
439 return -EINVAL;
440
73e9efd4
VS
441 drm_modeset_lock_all(dev_priv->dev);
442
294adf7d 443 ret = ttm_read_lock(&dev_priv->reservation_sem, true);
73e9efd4
VS
444 if (unlikely(ret != 0)) {
445 drm_modeset_unlock_all(dev_priv->dev);
3a939a5e 446 return ret;
73e9efd4 447 }
3a939a5e 448
fb1d9738
JB
449 if (!num_clips) {
450 num_clips = 1;
451 clips = &norect;
452 norect.x1 = norect.y1 = 0;
453 norect.x2 = framebuffer->width;
454 norect.y2 = framebuffer->height;
455 } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
456 num_clips /= 2;
457 inc = 2; /* skip source rects */
458 }
459
c8261a96
SY
460 if (dev_priv->active_display_unit == vmw_du_screen_object)
461 ret = vmw_kms_sou_do_surface_dirty(dev_priv, file_priv,
462 &vfbs->base,
463 flags, color,
464 clips, num_clips,
465 inc, NULL);
fb1d9738 466
3eab3d9e 467 vmw_fifo_flush(dev_priv, false);
294adf7d 468 ttm_read_unlock(&dev_priv->reservation_sem);
73e9efd4
VS
469
470 drm_modeset_unlock_all(dev_priv->dev);
471
fb1d9738
JB
472 return 0;
473}
474
475static struct drm_framebuffer_funcs vmw_framebuffer_surface_funcs = {
476 .destroy = vmw_framebuffer_surface_destroy,
477 .dirty = vmw_framebuffer_surface_dirty,
fb1d9738
JB
478};
479
d3216a0c 480static int vmw_kms_new_framebuffer_surface(struct vmw_private *dev_priv,
3a939a5e 481 struct drm_file *file_priv,
d3216a0c
TH
482 struct vmw_surface *surface,
483 struct vmw_framebuffer **out,
484 const struct drm_mode_fb_cmd
485 *mode_cmd)
fb1d9738
JB
486
487{
488 struct drm_device *dev = dev_priv->dev;
489 struct vmw_framebuffer_surface *vfbs;
d3216a0c 490 enum SVGA3dSurfaceFormat format;
3a939a5e 491 struct vmw_master *vmaster = vmw_master(file_priv->master);
fb1d9738
JB
492 int ret;
493
c8261a96
SY
494 /* 3D is only supported on HWv8 and newer hosts */
495 if (dev_priv->active_display_unit == vmw_du_legacy)
01e81419
JB
496 return -ENOSYS;
497
d3216a0c
TH
498 /*
499 * Sanity checks.
500 */
501
e7ac9211
JB
502 /* Surface must be marked as a scanout. */
503 if (unlikely(!surface->scanout))
504 return -EINVAL;
505
d3216a0c
TH
506 if (unlikely(surface->mip_levels[0] != 1 ||
507 surface->num_sizes != 1 ||
b360a3ce
TH
508 surface->base_size.width < mode_cmd->width ||
509 surface->base_size.height < mode_cmd->height ||
510 surface->base_size.depth != 1)) {
d3216a0c
TH
511 DRM_ERROR("Incompatible surface dimensions "
512 "for requested mode.\n");
513 return -EINVAL;
514 }
515
516 switch (mode_cmd->depth) {
517 case 32:
518 format = SVGA3D_A8R8G8B8;
519 break;
520 case 24:
521 format = SVGA3D_X8R8G8B8;
522 break;
523 case 16:
524 format = SVGA3D_R5G6B5;
525 break;
526 case 15:
527 format = SVGA3D_A1R5G5B5;
528 break;
529 default:
530 DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth);
531 return -EINVAL;
532 }
533
534 if (unlikely(format != surface->format)) {
535 DRM_ERROR("Invalid surface format for requested mode.\n");
536 return -EINVAL;
537 }
538
fb1d9738
JB
539 vfbs = kzalloc(sizeof(*vfbs), GFP_KERNEL);
540 if (!vfbs) {
541 ret = -ENOMEM;
542 goto out_err1;
543 }
544
fb1d9738
JB
545 if (!vmw_surface_reference(surface)) {
546 DRM_ERROR("failed to reference surface %p\n", surface);
80f0b5af
DV
547 ret = -EINVAL;
548 goto out_err2;
fb1d9738
JB
549 }
550
551 /* XXX get the first 3 from the surface info */
d3216a0c 552 vfbs->base.base.bits_per_pixel = mode_cmd->bpp;
01f2c773 553 vfbs->base.base.pitches[0] = mode_cmd->pitch;
d3216a0c
TH
554 vfbs->base.base.depth = mode_cmd->depth;
555 vfbs->base.base.width = mode_cmd->width;
556 vfbs->base.base.height = mode_cmd->height;
fb1d9738 557 vfbs->surface = surface;
90ff18bc 558 vfbs->base.user_handle = mode_cmd->handle;
3a939a5e 559 vfbs->master = drm_master_get(file_priv->master);
3a939a5e
TH
560
561 mutex_lock(&vmaster->fb_surf_mutex);
3a939a5e
TH
562 list_add_tail(&vfbs->head, &vmaster->fb_surf);
563 mutex_unlock(&vmaster->fb_surf_mutex);
564
fb1d9738
JB
565 *out = &vfbs->base;
566
80f0b5af
DV
567 ret = drm_framebuffer_init(dev, &vfbs->base.base,
568 &vmw_framebuffer_surface_funcs);
569 if (ret)
570 goto out_err3;
571
fb1d9738
JB
572 return 0;
573
574out_err3:
80f0b5af 575 vmw_surface_unreference(&surface);
fb1d9738
JB
576out_err2:
577 kfree(vfbs);
578out_err1:
579 return ret;
580}
581
582/*
583 * Dmabuf framebuffer code
584 */
585
847c5964 586static void vmw_framebuffer_dmabuf_destroy(struct drm_framebuffer *framebuffer)
fb1d9738
JB
587{
588 struct vmw_framebuffer_dmabuf *vfbd =
589 vmw_framebuffer_to_vfbd(framebuffer);
590
591 drm_framebuffer_cleanup(framebuffer);
592 vmw_dmabuf_unreference(&vfbd->buffer);
90ff18bc 593 ttm_base_object_unref(&vfbd->base.user_obj);
fb1d9738
JB
594
595 kfree(vfbd);
596}
597
847c5964 598static int vmw_framebuffer_dmabuf_dirty(struct drm_framebuffer *framebuffer,
02b00162 599 struct drm_file *file_priv,
fb1d9738
JB
600 unsigned flags, unsigned color,
601 struct drm_clip_rect *clips,
602 unsigned num_clips)
603{
604 struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
5deb65cf
JB
605 struct vmw_framebuffer_dmabuf *vfbd =
606 vmw_framebuffer_to_vfbd(framebuffer);
fb1d9738 607 struct drm_clip_rect norect;
5deb65cf 608 int ret, increment = 1;
fb1d9738 609
73e9efd4
VS
610 drm_modeset_lock_all(dev_priv->dev);
611
294adf7d 612 ret = ttm_read_lock(&dev_priv->reservation_sem, true);
73e9efd4
VS
613 if (unlikely(ret != 0)) {
614 drm_modeset_unlock_all(dev_priv->dev);
3a939a5e 615 return ret;
73e9efd4 616 }
3a939a5e 617
df1c93ba 618 if (!num_clips) {
fb1d9738
JB
619 num_clips = 1;
620 clips = &norect;
621 norect.x1 = norect.y1 = 0;
622 norect.x2 = framebuffer->width;
623 norect.y2 = framebuffer->height;
624 } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
625 num_clips /= 2;
626 increment = 2;
627 }
628
56d1c78d 629 if (dev_priv->ldu_priv) {
c8261a96
SY
630 ret = vmw_kms_ldu_do_dmabuf_dirty(dev_priv, &vfbd->base,
631 flags, color,
632 clips, num_clips, increment);
633 } else if (dev_priv->active_display_unit == vmw_du_screen_object) {
634 ret = vmw_kms_sou_do_dmabuf_dirty(file_priv, dev_priv,
635 &vfbd->base,
636 flags, color,
637 clips, num_clips, increment,
638 NULL);
56d1c78d 639 }
fb1d9738 640
3eab3d9e 641 vmw_fifo_flush(dev_priv, false);
294adf7d 642 ttm_read_unlock(&dev_priv->reservation_sem);
73e9efd4
VS
643
644 drm_modeset_unlock_all(dev_priv->dev);
645
5deb65cf 646 return ret;
fb1d9738
JB
647}
648
649static struct drm_framebuffer_funcs vmw_framebuffer_dmabuf_funcs = {
650 .destroy = vmw_framebuffer_dmabuf_destroy,
651 .dirty = vmw_framebuffer_dmabuf_dirty,
fb1d9738
JB
652};
653
497a3ff9
JB
654/**
655 * Pin the dmabuffer to the start of vram.
656 */
fb1d9738
JB
657static int vmw_framebuffer_dmabuf_pin(struct vmw_framebuffer *vfb)
658{
659 struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
660 struct vmw_framebuffer_dmabuf *vfbd =
661 vmw_framebuffer_to_vfbd(&vfb->base);
662 int ret;
663
c8261a96
SY
664 /* This code should only be used with Legacy Display Unit */
665 BUG_ON(dev_priv->active_display_unit != vmw_du_legacy);
d7e1958d 666
fb1d9738
JB
667 vmw_overlay_pause_all(dev_priv);
668
d991ef03 669 ret = vmw_dmabuf_to_start_of_vram(dev_priv, vfbd->buffer, true, false);
fb1d9738 670
fb1d9738
JB
671 vmw_overlay_resume_all(dev_priv);
672
316ab13a
JB
673 WARN_ON(ret != 0);
674
fb1d9738
JB
675 return 0;
676}
677
678static int vmw_framebuffer_dmabuf_unpin(struct vmw_framebuffer *vfb)
679{
680 struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
681 struct vmw_framebuffer_dmabuf *vfbd =
682 vmw_framebuffer_to_vfbd(&vfb->base);
683
684 if (!vfbd->buffer) {
685 WARN_ON(!vfbd->buffer);
686 return 0;
687 }
688
d991ef03 689 return vmw_dmabuf_unpin(dev_priv, vfbd->buffer, false);
fb1d9738
JB
690}
691
d3216a0c
TH
692static int vmw_kms_new_framebuffer_dmabuf(struct vmw_private *dev_priv,
693 struct vmw_dma_buffer *dmabuf,
694 struct vmw_framebuffer **out,
695 const struct drm_mode_fb_cmd
696 *mode_cmd)
fb1d9738
JB
697
698{
699 struct drm_device *dev = dev_priv->dev;
700 struct vmw_framebuffer_dmabuf *vfbd;
d3216a0c 701 unsigned int requested_size;
fb1d9738
JB
702 int ret;
703
d3216a0c
TH
704 requested_size = mode_cmd->height * mode_cmd->pitch;
705 if (unlikely(requested_size > dmabuf->base.num_pages * PAGE_SIZE)) {
706 DRM_ERROR("Screen buffer object size is too small "
707 "for requested mode.\n");
708 return -EINVAL;
709 }
710
c337ada7 711 /* Limited framebuffer color depth support for screen objects */
c8261a96 712 if (dev_priv->active_display_unit == vmw_du_screen_object) {
c337ada7
JB
713 switch (mode_cmd->depth) {
714 case 32:
715 case 24:
716 /* Only support 32 bpp for 32 and 24 depth fbs */
717 if (mode_cmd->bpp == 32)
718 break;
719
720 DRM_ERROR("Invalid color depth/bbp: %d %d\n",
721 mode_cmd->depth, mode_cmd->bpp);
722 return -EINVAL;
723 case 16:
724 case 15:
725 /* Only support 16 bpp for 16 and 15 depth fbs */
726 if (mode_cmd->bpp == 16)
727 break;
728
729 DRM_ERROR("Invalid color depth/bbp: %d %d\n",
730 mode_cmd->depth, mode_cmd->bpp);
731 return -EINVAL;
732 default:
733 DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth);
734 return -EINVAL;
735 }
736 }
737
fb1d9738
JB
738 vfbd = kzalloc(sizeof(*vfbd), GFP_KERNEL);
739 if (!vfbd) {
740 ret = -ENOMEM;
741 goto out_err1;
742 }
743
fb1d9738
JB
744 if (!vmw_dmabuf_reference(dmabuf)) {
745 DRM_ERROR("failed to reference dmabuf %p\n", dmabuf);
80f0b5af
DV
746 ret = -EINVAL;
747 goto out_err2;
fb1d9738
JB
748 }
749
d3216a0c 750 vfbd->base.base.bits_per_pixel = mode_cmd->bpp;
01f2c773 751 vfbd->base.base.pitches[0] = mode_cmd->pitch;
d3216a0c
TH
752 vfbd->base.base.depth = mode_cmd->depth;
753 vfbd->base.base.width = mode_cmd->width;
754 vfbd->base.base.height = mode_cmd->height;
c8261a96 755 if (dev_priv->active_display_unit == vmw_du_legacy) {
56d1c78d
JB
756 vfbd->base.pin = vmw_framebuffer_dmabuf_pin;
757 vfbd->base.unpin = vmw_framebuffer_dmabuf_unpin;
758 }
2fcd5a73 759 vfbd->base.dmabuf = true;
fb1d9738 760 vfbd->buffer = dmabuf;
90ff18bc 761 vfbd->base.user_handle = mode_cmd->handle;
fb1d9738
JB
762 *out = &vfbd->base;
763
80f0b5af
DV
764 ret = drm_framebuffer_init(dev, &vfbd->base.base,
765 &vmw_framebuffer_dmabuf_funcs);
766 if (ret)
767 goto out_err3;
768
fb1d9738
JB
769 return 0;
770
771out_err3:
80f0b5af 772 vmw_dmabuf_unreference(&dmabuf);
fb1d9738
JB
773out_err2:
774 kfree(vfbd);
775out_err1:
776 return ret;
777}
778
779/*
780 * Generic Kernel modesetting functions
781 */
782
783static struct drm_framebuffer *vmw_kms_fb_create(struct drm_device *dev,
784 struct drm_file *file_priv,
308e5bcb 785 struct drm_mode_fb_cmd2 *mode_cmd2)
fb1d9738
JB
786{
787 struct vmw_private *dev_priv = vmw_priv(dev);
788 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
789 struct vmw_framebuffer *vfb = NULL;
790 struct vmw_surface *surface = NULL;
791 struct vmw_dma_buffer *bo = NULL;
90ff18bc 792 struct ttm_base_object *user_obj;
308e5bcb 793 struct drm_mode_fb_cmd mode_cmd;
fb1d9738
JB
794 int ret;
795
308e5bcb
JB
796 mode_cmd.width = mode_cmd2->width;
797 mode_cmd.height = mode_cmd2->height;
798 mode_cmd.pitch = mode_cmd2->pitches[0];
799 mode_cmd.handle = mode_cmd2->handles[0];
248dbc23 800 drm_fb_get_bpp_depth(mode_cmd2->pixel_format, &mode_cmd.depth,
308e5bcb
JB
801 &mode_cmd.bpp);
802
d3216a0c
TH
803 /**
804 * This code should be conditioned on Screen Objects not being used.
805 * If screen objects are used, we can allocate a GMR to hold the
806 * requested framebuffer.
807 */
808
8a783896 809 if (!vmw_kms_validate_mode_vram(dev_priv,
1a464cbb
LT
810 mode_cmd.pitch,
811 mode_cmd.height)) {
c8261a96 812 DRM_ERROR("Requested mode exceed bounding box limit.\n");
d9826409 813 return ERR_PTR(-ENOMEM);
d3216a0c
TH
814 }
815
90ff18bc
TH
816 /*
817 * Take a reference on the user object of the resource
818 * backing the kms fb. This ensures that user-space handle
819 * lookups on that resource will always work as long as
820 * it's registered with a kms framebuffer. This is important,
821 * since vmw_execbuf_process identifies resources in the
822 * command stream using user-space handles.
823 */
824
308e5bcb 825 user_obj = ttm_base_object_lookup(tfile, mode_cmd.handle);
90ff18bc
TH
826 if (unlikely(user_obj == NULL)) {
827 DRM_ERROR("Could not locate requested kms frame buffer.\n");
828 return ERR_PTR(-ENOENT);
829 }
830
d3216a0c
TH
831 /**
832 * End conditioned code.
833 */
834
e7ac9211
JB
835 /* returns either a dmabuf or surface */
836 ret = vmw_user_lookup_handle(dev_priv, tfile,
4cf73129 837 mode_cmd.handle,
e7ac9211 838 &surface, &bo);
fb1d9738 839 if (ret)
e7ac9211
JB
840 goto err_out;
841
842 /* Create the new framebuffer depending one what we got back */
843 if (bo)
844 ret = vmw_kms_new_framebuffer_dmabuf(dev_priv, bo, &vfb,
4cf73129 845 &mode_cmd);
e7ac9211
JB
846 else if (surface)
847 ret = vmw_kms_new_framebuffer_surface(dev_priv, file_priv,
4cf73129 848 surface, &vfb, &mode_cmd);
e7ac9211
JB
849 else
850 BUG();
851
852err_out:
853 /* vmw_user_lookup_handle takes one ref so does new_fb */
854 if (bo)
855 vmw_dmabuf_unreference(&bo);
856 if (surface)
857 vmw_surface_unreference(&surface);
fb1d9738
JB
858
859 if (ret) {
860 DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret);
90ff18bc 861 ttm_base_object_unref(&user_obj);
cce13ff7 862 return ERR_PTR(ret);
90ff18bc
TH
863 } else
864 vfb->user_obj = user_obj;
fb1d9738
JB
865
866 return &vfb->base;
867}
868
e6ecefaa 869static const struct drm_mode_config_funcs vmw_kms_funcs = {
fb1d9738 870 .fb_create = vmw_kms_fb_create,
fb1d9738
JB
871};
872
c8261a96 873int vmw_kms_generic_present(struct vmw_private *dev_priv,
2fcd5a73
JB
874 struct drm_file *file_priv,
875 struct vmw_framebuffer *vfb,
876 struct vmw_surface *surface,
877 uint32_t sid,
878 int32_t destX, int32_t destY,
879 struct drm_vmw_rect *clips,
880 uint32_t num_clips)
881{
c6ca8391 882 struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
6abff3c7 883 struct drm_clip_rect *tmp;
c6ca8391 884 struct drm_crtc *crtc;
2fcd5a73 885 size_t fifo_size;
c6ca8391
JB
886 int i, k, num_units;
887 int ret = 0; /* silence warning */
203dc220 888 int left, right, top, bottom;
2fcd5a73
JB
889
890 struct {
891 SVGA3dCmdHeader header;
892 SVGA3dCmdBlitSurfaceToScreen body;
893 } *cmd;
894 SVGASignedRect *blits;
895
c6ca8391
JB
896 num_units = 0;
897 list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
f4510a27 898 if (crtc->primary->fb != &vfb->base)
c6ca8391
JB
899 continue;
900 units[num_units++] = vmw_crtc_to_du(crtc);
901 }
902
2fcd5a73
JB
903 BUG_ON(surface == NULL);
904 BUG_ON(!clips || !num_clips);
905
6abff3c7
JB
906 tmp = kzalloc(sizeof(*tmp) * num_clips, GFP_KERNEL);
907 if (unlikely(tmp == NULL)) {
908 DRM_ERROR("Temporary cliprect memory alloc failed.\n");
909 return -ENOMEM;
910 }
911
2fcd5a73
JB
912 fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num_clips;
913 cmd = kmalloc(fifo_size, GFP_KERNEL);
914 if (unlikely(cmd == NULL)) {
915 DRM_ERROR("Failed to allocate temporary fifo memory.\n");
6abff3c7
JB
916 ret = -ENOMEM;
917 goto out_free_tmp;
2fcd5a73
JB
918 }
919
203dc220
JB
920 left = clips->x;
921 right = clips->x + clips->w;
922 top = clips->y;
923 bottom = clips->y + clips->h;
924
925 for (i = 1; i < num_clips; i++) {
926 left = min_t(int, left, (int)clips[i].x);
927 right = max_t(int, right, (int)clips[i].x + clips[i].w);
928 top = min_t(int, top, (int)clips[i].y);
929 bottom = max_t(int, bottom, (int)clips[i].y + clips[i].h);
930 }
931
c6ca8391 932 /* only need to do this once */
2fcd5a73 933 memset(cmd, 0, fifo_size);
2fcd5a73 934 cmd->header.id = cpu_to_le32(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN);
6abff3c7
JB
935
936 blits = (SVGASignedRect *)&cmd[1];
2fcd5a73 937
203dc220
JB
938 cmd->body.srcRect.left = left;
939 cmd->body.srcRect.right = right;
940 cmd->body.srcRect.top = top;
941 cmd->body.srcRect.bottom = bottom;
2fcd5a73 942
2fcd5a73 943 for (i = 0; i < num_clips; i++) {
6abff3c7
JB
944 tmp[i].x1 = clips[i].x - left;
945 tmp[i].x2 = clips[i].x + clips[i].w - left;
946 tmp[i].y1 = clips[i].y - top;
947 tmp[i].y2 = clips[i].y + clips[i].h - top;
2fcd5a73
JB
948 }
949
c6ca8391
JB
950 for (k = 0; k < num_units; k++) {
951 struct vmw_display_unit *unit = units[k];
6abff3c7
JB
952 struct vmw_clip_rect clip;
953 int num;
954
955 clip.x1 = left + destX - unit->crtc.x;
956 clip.y1 = top + destY - unit->crtc.y;
957 clip.x2 = right + destX - unit->crtc.x;
958 clip.y2 = bottom + destY - unit->crtc.y;
c6ca8391
JB
959
960 /* skip any crtcs that misses the clip region */
6abff3c7
JB
961 if (clip.x1 >= unit->crtc.mode.hdisplay ||
962 clip.y1 >= unit->crtc.mode.vdisplay ||
963 clip.x2 <= 0 || clip.y2 <= 0)
c6ca8391
JB
964 continue;
965
6abff3c7
JB
966 /*
967 * In order for the clip rects to be correctly scaled
968 * the src and dest rects needs to be the same size.
969 */
970 cmd->body.destRect.left = clip.x1;
971 cmd->body.destRect.right = clip.x2;
972 cmd->body.destRect.top = clip.y1;
973 cmd->body.destRect.bottom = clip.y2;
974
975 /* create a clip rect of the crtc in dest coords */
976 clip.x2 = unit->crtc.mode.hdisplay - clip.x1;
977 clip.y2 = unit->crtc.mode.vdisplay - clip.y1;
978 clip.x1 = 0 - clip.x1;
979 clip.y1 = 0 - clip.y1;
980
c6ca8391
JB
981 /* need to reset sid as it is changed by execbuf */
982 cmd->body.srcImage.sid = sid;
c6ca8391
JB
983 cmd->body.destScreenId = unit->unit;
984
6abff3c7
JB
985 /* clip and write blits to cmd stream */
986 vmw_clip_cliprects(tmp, num_clips, clip, blits, &num);
c6ca8391 987
6abff3c7
JB
988 /* if no cliprects hit skip this */
989 if (num == 0)
990 continue;
c6ca8391 991
6abff3c7
JB
992 /* recalculate package length */
993 fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num;
994 cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header));
c6ca8391 995 ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd,
c9146cd9 996 fifo_size, 0, 0, NULL, NULL);
c6ca8391
JB
997
998 if (unlikely(ret != 0))
999 break;
1000 }
2fcd5a73 1001
3eab3d9e
TH
1002 vmw_fifo_flush(dev_priv, false);
1003
2fcd5a73 1004 kfree(cmd);
6abff3c7
JB
1005out_free_tmp:
1006 kfree(tmp);
2fcd5a73
JB
1007
1008 return ret;
1009}
1010
c8261a96
SY
1011int vmw_kms_present(struct vmw_private *dev_priv,
1012 struct drm_file *file_priv,
1013 struct vmw_framebuffer *vfb,
1014 struct vmw_surface *surface,
1015 uint32_t sid,
1016 int32_t destX, int32_t destY,
1017 struct drm_vmw_rect *clips,
1018 uint32_t num_clips)
1019{
1020 return vmw_kms_generic_present(dev_priv, file_priv, vfb, surface, sid,
1021 destX, destY, clips, num_clips);
1022}
1023
2fcd5a73
JB
1024int vmw_kms_readback(struct vmw_private *dev_priv,
1025 struct drm_file *file_priv,
1026 struct vmw_framebuffer *vfb,
1027 struct drm_vmw_fence_rep __user *user_fence_rep,
1028 struct drm_vmw_rect *clips,
1029 uint32_t num_clips)
1030{
1031 struct vmw_framebuffer_dmabuf *vfbd =
1032 vmw_framebuffer_to_vfbd(&vfb->base);
1033 struct vmw_dma_buffer *dmabuf = vfbd->buffer;
1034 struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
1035 struct drm_crtc *crtc;
1036 size_t fifo_size;
1037 int i, k, ret, num_units, blits_pos;
1038
1039 struct {
1040 uint32_t header;
1041 SVGAFifoCmdDefineGMRFB body;
1042 } *cmd;
1043 struct {
1044 uint32_t header;
1045 SVGAFifoCmdBlitScreenToGMRFB body;
1046 } *blits;
1047
1048 num_units = 0;
1049 list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
f4510a27 1050 if (crtc->primary->fb != &vfb->base)
2fcd5a73
JB
1051 continue;
1052 units[num_units++] = vmw_crtc_to_du(crtc);
1053 }
1054
1055 BUG_ON(dmabuf == NULL);
1056 BUG_ON(!clips || !num_clips);
1057
1058 /* take a safe guess at fifo size */
1059 fifo_size = sizeof(*cmd) + sizeof(*blits) * num_clips * num_units;
1060 cmd = kmalloc(fifo_size, GFP_KERNEL);
1061 if (unlikely(cmd == NULL)) {
1062 DRM_ERROR("Failed to allocate temporary fifo memory.\n");
1063 return -ENOMEM;
1064 }
1065
1066 memset(cmd, 0, fifo_size);
1067 cmd->header = SVGA_CMD_DEFINE_GMRFB;
1068 cmd->body.format.bitsPerPixel = vfb->base.bits_per_pixel;
1069 cmd->body.format.colorDepth = vfb->base.depth;
1070 cmd->body.format.reserved = 0;
01f2c773 1071 cmd->body.bytesPerLine = vfb->base.pitches[0];
90ff18bc 1072 cmd->body.ptr.gmrId = vfb->user_handle;
2fcd5a73
JB
1073 cmd->body.ptr.offset = 0;
1074
1075 blits = (void *)&cmd[1];
1076 blits_pos = 0;
1077 for (i = 0; i < num_units; i++) {
1078 struct drm_vmw_rect *c = clips;
1079 for (k = 0; k < num_clips; k++, c++) {
1080 /* transform clip coords to crtc origin based coords */
1081 int clip_x1 = c->x - units[i]->crtc.x;
1082 int clip_x2 = c->x - units[i]->crtc.x + c->w;
1083 int clip_y1 = c->y - units[i]->crtc.y;
1084 int clip_y2 = c->y - units[i]->crtc.y + c->h;
1085 int dest_x = c->x;
1086 int dest_y = c->y;
1087
1088 /* compensate for clipping, we negate
1089 * a negative number and add that.
1090 */
1091 if (clip_x1 < 0)
1092 dest_x += -clip_x1;
1093 if (clip_y1 < 0)
1094 dest_y += -clip_y1;
1095
1096 /* clip */
1097 clip_x1 = max(clip_x1, 0);
1098 clip_y1 = max(clip_y1, 0);
1099 clip_x2 = min(clip_x2, units[i]->crtc.mode.hdisplay);
1100 clip_y2 = min(clip_y2, units[i]->crtc.mode.vdisplay);
1101
1102 /* and cull any rects that misses the crtc */
1103 if (clip_x1 >= units[i]->crtc.mode.hdisplay ||
1104 clip_y1 >= units[i]->crtc.mode.vdisplay ||
1105 clip_x2 <= 0 || clip_y2 <= 0)
1106 continue;
1107
1108 blits[blits_pos].header = SVGA_CMD_BLIT_SCREEN_TO_GMRFB;
1109 blits[blits_pos].body.srcScreenId = units[i]->unit;
1110 blits[blits_pos].body.destOrigin.x = dest_x;
1111 blits[blits_pos].body.destOrigin.y = dest_y;
1112
1113 blits[blits_pos].body.srcRect.left = clip_x1;
1114 blits[blits_pos].body.srcRect.top = clip_y1;
1115 blits[blits_pos].body.srcRect.right = clip_x2;
1116 blits[blits_pos].body.srcRect.bottom = clip_y2;
1117 blits_pos++;
1118 }
1119 }
1120 /* reset size here and use calculated exact size from loops */
1121 fifo_size = sizeof(*cmd) + sizeof(*blits) * blits_pos;
1122
1123 ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd, fifo_size,
c9146cd9 1124 0, 0, user_fence_rep, NULL);
2fcd5a73
JB
1125
1126 kfree(cmd);
1127
1128 return ret;
1129}
1130
fb1d9738
JB
1131int vmw_kms_init(struct vmw_private *dev_priv)
1132{
1133 struct drm_device *dev = dev_priv->dev;
1134 int ret;
1135
1136 drm_mode_config_init(dev);
1137 dev->mode_config.funcs = &vmw_kms_funcs;
3bef3572
JB
1138 dev->mode_config.min_width = 1;
1139 dev->mode_config.min_height = 1;
7e71f8a5
JB
1140 /* assumed largest fb size */
1141 dev->mode_config.max_width = 8192;
1142 dev->mode_config.max_height = 8192;
fb1d9738 1143
c8261a96 1144 ret = vmw_kms_sou_init_display(dev_priv);
56d1c78d 1145 if (ret) /* Fallback */
c8261a96 1146 ret = vmw_kms_ldu_init_display(dev_priv);
fb1d9738 1147
c8261a96 1148 return ret;
fb1d9738
JB
1149}
1150
1151int vmw_kms_close(struct vmw_private *dev_priv)
1152{
c8261a96
SY
1153 int ret;
1154
fb1d9738
JB
1155 /*
1156 * Docs says we should take the lock before calling this function
1157 * but since it destroys encoders and our destructor calls
1158 * drm_encoder_cleanup which takes the lock we deadlock.
1159 */
1160 drm_mode_config_cleanup(dev_priv->dev);
c8261a96
SY
1161 if (dev_priv->active_display_unit == vmw_du_screen_object)
1162 ret = vmw_kms_sou_close_display(dev_priv);
c0d18316 1163 else
c8261a96
SY
1164 ret = vmw_kms_ldu_close_display(dev_priv);
1165
1166 return ret;
fb1d9738
JB
1167}
1168
1169int vmw_kms_cursor_bypass_ioctl(struct drm_device *dev, void *data,
1170 struct drm_file *file_priv)
1171{
1172 struct drm_vmw_cursor_bypass_arg *arg = data;
1173 struct vmw_display_unit *du;
fb1d9738
JB
1174 struct drm_crtc *crtc;
1175 int ret = 0;
1176
1177
1178 mutex_lock(&dev->mode_config.mutex);
1179 if (arg->flags & DRM_VMW_CURSOR_BYPASS_ALL) {
1180
1181 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
1182 du = vmw_crtc_to_du(crtc);
1183 du->hotspot_x = arg->xhot;
1184 du->hotspot_y = arg->yhot;
1185 }
1186
1187 mutex_unlock(&dev->mode_config.mutex);
1188 return 0;
1189 }
1190
a4cd5d68
RC
1191 crtc = drm_crtc_find(dev, arg->crtc_id);
1192 if (!crtc) {
4ae87ff0 1193 ret = -ENOENT;
fb1d9738
JB
1194 goto out;
1195 }
1196
fb1d9738
JB
1197 du = vmw_crtc_to_du(crtc);
1198
1199 du->hotspot_x = arg->xhot;
1200 du->hotspot_y = arg->yhot;
1201
1202out:
1203 mutex_unlock(&dev->mode_config.mutex);
1204
1205 return ret;
1206}
1207
0bef23f9 1208int vmw_kms_write_svga(struct vmw_private *vmw_priv,
d7e1958d 1209 unsigned width, unsigned height, unsigned pitch,
6558429b 1210 unsigned bpp, unsigned depth)
fb1d9738 1211{
d7e1958d
JB
1212 if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1213 vmw_write(vmw_priv, SVGA_REG_PITCHLOCK, pitch);
1214 else if (vmw_fifo_have_pitchlock(vmw_priv))
1215 iowrite32(pitch, vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK);
1216 vmw_write(vmw_priv, SVGA_REG_WIDTH, width);
1217 vmw_write(vmw_priv, SVGA_REG_HEIGHT, height);
6558429b 1218 vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, bpp);
0bef23f9
MD
1219
1220 if (vmw_read(vmw_priv, SVGA_REG_DEPTH) != depth) {
1221 DRM_ERROR("Invalid depth %u for %u bpp, host expects %u\n",
1222 depth, bpp, vmw_read(vmw_priv, SVGA_REG_DEPTH));
1223 return -EINVAL;
1224 }
1225
1226 return 0;
d7e1958d 1227}
fb1d9738 1228
d7e1958d
JB
1229int vmw_kms_save_vga(struct vmw_private *vmw_priv)
1230{
7c4f7780
TH
1231 struct vmw_vga_topology_state *save;
1232 uint32_t i;
1233
fb1d9738
JB
1234 vmw_priv->vga_width = vmw_read(vmw_priv, SVGA_REG_WIDTH);
1235 vmw_priv->vga_height = vmw_read(vmw_priv, SVGA_REG_HEIGHT);
7c4f7780 1236 vmw_priv->vga_bpp = vmw_read(vmw_priv, SVGA_REG_BITS_PER_PIXEL);
d7e1958d
JB
1237 if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1238 vmw_priv->vga_pitchlock =
7c4f7780 1239 vmw_read(vmw_priv, SVGA_REG_PITCHLOCK);
d7e1958d 1240 else if (vmw_fifo_have_pitchlock(vmw_priv))
7c4f7780 1241 vmw_priv->vga_pitchlock = ioread32(vmw_priv->mmio_virt +
c8261a96 1242 SVGA_FIFO_PITCHLOCK);
7c4f7780
TH
1243
1244 if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
1245 return 0;
fb1d9738 1246
7c4f7780
TH
1247 vmw_priv->num_displays = vmw_read(vmw_priv,
1248 SVGA_REG_NUM_GUEST_DISPLAYS);
1249
029e50bf
TH
1250 if (vmw_priv->num_displays == 0)
1251 vmw_priv->num_displays = 1;
1252
7c4f7780
TH
1253 for (i = 0; i < vmw_priv->num_displays; ++i) {
1254 save = &vmw_priv->vga_save[i];
1255 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
1256 save->primary = vmw_read(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY);
1257 save->pos_x = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_X);
1258 save->pos_y = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y);
1259 save->width = vmw_read(vmw_priv, SVGA_REG_DISPLAY_WIDTH);
1260 save->height = vmw_read(vmw_priv, SVGA_REG_DISPLAY_HEIGHT);
1261 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
30c78bb8
TH
1262 if (i == 0 && vmw_priv->num_displays == 1 &&
1263 save->width == 0 && save->height == 0) {
1264
1265 /*
1266 * It should be fairly safe to assume that these
1267 * values are uninitialized.
1268 */
1269
1270 save->width = vmw_priv->vga_width - save->pos_x;
1271 save->height = vmw_priv->vga_height - save->pos_y;
1272 }
7c4f7780 1273 }
30c78bb8 1274
fb1d9738
JB
1275 return 0;
1276}
1277
1278int vmw_kms_restore_vga(struct vmw_private *vmw_priv)
1279{
7c4f7780
TH
1280 struct vmw_vga_topology_state *save;
1281 uint32_t i;
1282
fb1d9738
JB
1283 vmw_write(vmw_priv, SVGA_REG_WIDTH, vmw_priv->vga_width);
1284 vmw_write(vmw_priv, SVGA_REG_HEIGHT, vmw_priv->vga_height);
7c4f7780 1285 vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, vmw_priv->vga_bpp);
d7e1958d
JB
1286 if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1287 vmw_write(vmw_priv, SVGA_REG_PITCHLOCK,
1288 vmw_priv->vga_pitchlock);
1289 else if (vmw_fifo_have_pitchlock(vmw_priv))
1290 iowrite32(vmw_priv->vga_pitchlock,
1291 vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK);
fb1d9738 1292
7c4f7780
TH
1293 if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
1294 return 0;
1295
1296 for (i = 0; i < vmw_priv->num_displays; ++i) {
1297 save = &vmw_priv->vga_save[i];
1298 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
1299 vmw_write(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY, save->primary);
1300 vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_X, save->pos_x);
1301 vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y, save->pos_y);
1302 vmw_write(vmw_priv, SVGA_REG_DISPLAY_WIDTH, save->width);
1303 vmw_write(vmw_priv, SVGA_REG_DISPLAY_HEIGHT, save->height);
1304 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
1305 }
1306
fb1d9738
JB
1307 return 0;
1308}
d8bd19d2 1309
e133e737
TH
1310bool vmw_kms_validate_mode_vram(struct vmw_private *dev_priv,
1311 uint32_t pitch,
1312 uint32_t height)
1313{
bc2d6508 1314 return ((u64) pitch * (u64) height) < (u64) dev_priv->prim_bb_mem;
e133e737
TH
1315}
1316
1c482ab3
JB
1317
1318/**
1319 * Function called by DRM code called with vbl_lock held.
1320 */
7a1c2f6c
TH
1321u32 vmw_get_vblank_counter(struct drm_device *dev, int crtc)
1322{
1323 return 0;
1324}
626ab771 1325
1c482ab3
JB
1326/**
1327 * Function called by DRM code called with vbl_lock held.
1328 */
1329int vmw_enable_vblank(struct drm_device *dev, int crtc)
1330{
1331 return -ENOSYS;
1332}
1333
1334/**
1335 * Function called by DRM code called with vbl_lock held.
1336 */
1337void vmw_disable_vblank(struct drm_device *dev, int crtc)
1338{
1339}
1340
626ab771
JB
1341
1342/*
1343 * Small shared kms functions.
1344 */
1345
847c5964 1346static int vmw_du_update_layout(struct vmw_private *dev_priv, unsigned num,
626ab771
JB
1347 struct drm_vmw_rect *rects)
1348{
1349 struct drm_device *dev = dev_priv->dev;
1350 struct vmw_display_unit *du;
1351 struct drm_connector *con;
626ab771
JB
1352
1353 mutex_lock(&dev->mode_config.mutex);
1354
1355#if 0
6ea77d13
TH
1356 {
1357 unsigned int i;
1358
1359 DRM_INFO("%s: new layout ", __func__);
1360 for (i = 0; i < num; i++)
1361 DRM_INFO("(%i, %i %ux%u) ", rects[i].x, rects[i].y,
1362 rects[i].w, rects[i].h);
1363 DRM_INFO("\n");
1364 }
626ab771
JB
1365#endif
1366
1367 list_for_each_entry(con, &dev->mode_config.connector_list, head) {
1368 du = vmw_connector_to_du(con);
1369 if (num > du->unit) {
1370 du->pref_width = rects[du->unit].w;
1371 du->pref_height = rects[du->unit].h;
1372 du->pref_active = true;
cd2b89e7
TH
1373 du->gui_x = rects[du->unit].x;
1374 du->gui_y = rects[du->unit].y;
626ab771
JB
1375 } else {
1376 du->pref_width = 800;
1377 du->pref_height = 600;
1378 du->pref_active = false;
1379 }
1380 con->status = vmw_du_connector_detect(con, true);
1381 }
1382
1383 mutex_unlock(&dev->mode_config.mutex);
1384
1385 return 0;
1386}
1387
1388void vmw_du_crtc_save(struct drm_crtc *crtc)
1389{
1390}
1391
1392void vmw_du_crtc_restore(struct drm_crtc *crtc)
1393{
1394}
1395
1396void vmw_du_crtc_gamma_set(struct drm_crtc *crtc,
1397 u16 *r, u16 *g, u16 *b,
1398 uint32_t start, uint32_t size)
1399{
1400 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
1401 int i;
1402
1403 for (i = 0; i < size; i++) {
1404 DRM_DEBUG("%d r/g/b = 0x%04x / 0x%04x / 0x%04x\n", i,
1405 r[i], g[i], b[i]);
1406 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 0, r[i] >> 8);
1407 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 1, g[i] >> 8);
1408 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 2, b[i] >> 8);
1409 }
1410}
1411
1412void vmw_du_connector_dpms(struct drm_connector *connector, int mode)
1413{
1414}
1415
1416void vmw_du_connector_save(struct drm_connector *connector)
1417{
1418}
1419
1420void vmw_du_connector_restore(struct drm_connector *connector)
1421{
1422}
1423
1424enum drm_connector_status
1425vmw_du_connector_detect(struct drm_connector *connector, bool force)
1426{
1427 uint32_t num_displays;
1428 struct drm_device *dev = connector->dev;
1429 struct vmw_private *dev_priv = vmw_priv(dev);
cd2b89e7 1430 struct vmw_display_unit *du = vmw_connector_to_du(connector);
626ab771 1431
626ab771 1432 num_displays = vmw_read(dev_priv, SVGA_REG_NUM_DISPLAYS);
626ab771 1433
cd2b89e7
TH
1434 return ((vmw_connector_to_du(connector)->unit < num_displays &&
1435 du->pref_active) ?
626ab771
JB
1436 connector_status_connected : connector_status_disconnected);
1437}
1438
1439static struct drm_display_mode vmw_kms_connector_builtin[] = {
1440 /* 640x480@60Hz */
1441 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
1442 752, 800, 0, 480, 489, 492, 525, 0,
1443 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
1444 /* 800x600@60Hz */
1445 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
1446 968, 1056, 0, 600, 601, 605, 628, 0,
1447 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1448 /* 1024x768@60Hz */
1449 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
1450 1184, 1344, 0, 768, 771, 777, 806, 0,
1451 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
1452 /* 1152x864@75Hz */
1453 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
1454 1344, 1600, 0, 864, 865, 868, 900, 0,
1455 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1456 /* 1280x768@60Hz */
1457 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
1458 1472, 1664, 0, 768, 771, 778, 798, 0,
1459 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1460 /* 1280x800@60Hz */
1461 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
1462 1480, 1680, 0, 800, 803, 809, 831, 0,
1463 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
1464 /* 1280x960@60Hz */
1465 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
1466 1488, 1800, 0, 960, 961, 964, 1000, 0,
1467 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1468 /* 1280x1024@60Hz */
1469 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
1470 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
1471 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1472 /* 1360x768@60Hz */
1473 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
1474 1536, 1792, 0, 768, 771, 777, 795, 0,
1475 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1476 /* 1440x1050@60Hz */
1477 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
1478 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
1479 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1480 /* 1440x900@60Hz */
1481 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
1482 1672, 1904, 0, 900, 903, 909, 934, 0,
1483 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1484 /* 1600x1200@60Hz */
1485 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
1486 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
1487 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1488 /* 1680x1050@60Hz */
1489 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
1490 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
1491 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1492 /* 1792x1344@60Hz */
1493 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
1494 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
1495 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1496 /* 1853x1392@60Hz */
1497 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
1498 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
1499 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1500 /* 1920x1200@60Hz */
1501 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
1502 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
1503 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1504 /* 1920x1440@60Hz */
1505 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
1506 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
1507 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1508 /* 2560x1600@60Hz */
1509 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
1510 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
1511 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1512 /* Terminate */
1513 { DRM_MODE("", 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) },
1514};
1515
1543b4dd
TH
1516/**
1517 * vmw_guess_mode_timing - Provide fake timings for a
1518 * 60Hz vrefresh mode.
1519 *
1520 * @mode - Pointer to a struct drm_display_mode with hdisplay and vdisplay
1521 * members filled in.
1522 */
1523static void vmw_guess_mode_timing(struct drm_display_mode *mode)
1524{
1525 mode->hsync_start = mode->hdisplay + 50;
1526 mode->hsync_end = mode->hsync_start + 50;
1527 mode->htotal = mode->hsync_end + 50;
1528
1529 mode->vsync_start = mode->vdisplay + 50;
1530 mode->vsync_end = mode->vsync_start + 50;
1531 mode->vtotal = mode->vsync_end + 50;
1532
1533 mode->clock = (u32)mode->htotal * (u32)mode->vtotal / 100 * 6;
1534 mode->vrefresh = drm_mode_vrefresh(mode);
1535}
1536
1537
626ab771
JB
1538int vmw_du_connector_fill_modes(struct drm_connector *connector,
1539 uint32_t max_width, uint32_t max_height)
1540{
1541 struct vmw_display_unit *du = vmw_connector_to_du(connector);
1542 struct drm_device *dev = connector->dev;
1543 struct vmw_private *dev_priv = vmw_priv(dev);
1544 struct drm_display_mode *mode = NULL;
1545 struct drm_display_mode *bmode;
1546 struct drm_display_mode prefmode = { DRM_MODE("preferred",
1547 DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
1548 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1549 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC)
1550 };
1551 int i;
9a72384d
SY
1552 u32 assumed_bpp = 2;
1553
1554 /*
1555 * If using screen objects, then assume 32-bpp because that's what the
1556 * SVGA device is assuming
1557 */
c8261a96 1558 if (dev_priv->active_display_unit == vmw_du_screen_object)
9a72384d 1559 assumed_bpp = 4;
626ab771
JB
1560
1561 /* Add preferred mode */
c8261a96
SY
1562 mode = drm_mode_duplicate(dev, &prefmode);
1563 if (!mode)
1564 return 0;
1565 mode->hdisplay = du->pref_width;
1566 mode->vdisplay = du->pref_height;
1567 vmw_guess_mode_timing(mode);
626ab771 1568
c8261a96
SY
1569 if (vmw_kms_validate_mode_vram(dev_priv,
1570 mode->hdisplay * assumed_bpp,
1571 mode->vdisplay)) {
1572 drm_mode_probed_add(connector, mode);
1573 } else {
1574 drm_mode_destroy(dev, mode);
1575 mode = NULL;
1576 }
55bde5b2 1577
c8261a96
SY
1578 if (du->pref_mode) {
1579 list_del_init(&du->pref_mode->head);
1580 drm_mode_destroy(dev, du->pref_mode);
626ab771
JB
1581 }
1582
c8261a96
SY
1583 /* mode might be null here, this is intended */
1584 du->pref_mode = mode;
1585
626ab771
JB
1586 for (i = 0; vmw_kms_connector_builtin[i].type != 0; i++) {
1587 bmode = &vmw_kms_connector_builtin[i];
1588 if (bmode->hdisplay > max_width ||
1589 bmode->vdisplay > max_height)
1590 continue;
1591
9a72384d
SY
1592 if (!vmw_kms_validate_mode_vram(dev_priv,
1593 bmode->hdisplay * assumed_bpp,
626ab771
JB
1594 bmode->vdisplay))
1595 continue;
1596
1597 mode = drm_mode_duplicate(dev, bmode);
1598 if (!mode)
1599 return 0;
1600 mode->vrefresh = drm_mode_vrefresh(mode);
1601
1602 drm_mode_probed_add(connector, mode);
1603 }
1604
d41025c0
JB
1605 /* Move the prefered mode first, help apps pick the right mode. */
1606 if (du->pref_mode)
1607 list_move(&du->pref_mode->head, &connector->probed_modes);
1608
b87577b7 1609 drm_mode_connector_list_update(connector, true);
626ab771
JB
1610
1611 return 1;
1612}
1613
1614int vmw_du_connector_set_property(struct drm_connector *connector,
1615 struct drm_property *property,
1616 uint64_t val)
1617{
1618 return 0;
1619}
cd2b89e7
TH
1620
1621
1622int vmw_kms_update_layout_ioctl(struct drm_device *dev, void *data,
1623 struct drm_file *file_priv)
1624{
1625 struct vmw_private *dev_priv = vmw_priv(dev);
1626 struct drm_vmw_update_layout_arg *arg =
1627 (struct drm_vmw_update_layout_arg *)data;
cd2b89e7
TH
1628 void __user *user_rects;
1629 struct drm_vmw_rect *rects;
1630 unsigned rects_size;
1631 int ret;
1632 int i;
1633 struct drm_mode_config *mode_config = &dev->mode_config;
c8261a96 1634 struct drm_vmw_rect bounding_box = {0};
cd2b89e7 1635
cd2b89e7
TH
1636 if (!arg->num_outputs) {
1637 struct drm_vmw_rect def_rect = {0, 0, 800, 600};
1638 vmw_du_update_layout(dev_priv, 1, &def_rect);
5151adb3 1639 return 0;
cd2b89e7
TH
1640 }
1641
1642 rects_size = arg->num_outputs * sizeof(struct drm_vmw_rect);
bab9efc2
XW
1643 rects = kcalloc(arg->num_outputs, sizeof(struct drm_vmw_rect),
1644 GFP_KERNEL);
5151adb3
TH
1645 if (unlikely(!rects))
1646 return -ENOMEM;
cd2b89e7
TH
1647
1648 user_rects = (void __user *)(unsigned long)arg->rects;
1649 ret = copy_from_user(rects, user_rects, rects_size);
1650 if (unlikely(ret != 0)) {
1651 DRM_ERROR("Failed to get rects.\n");
1652 ret = -EFAULT;
1653 goto out_free;
1654 }
1655
1656 for (i = 0; i < arg->num_outputs; ++i) {
bab9efc2
XW
1657 if (rects[i].x < 0 ||
1658 rects[i].y < 0 ||
1659 rects[i].x + rects[i].w > mode_config->max_width ||
1660 rects[i].y + rects[i].h > mode_config->max_height) {
cd2b89e7
TH
1661 DRM_ERROR("Invalid GUI layout.\n");
1662 ret = -EINVAL;
1663 goto out_free;
1664 }
c8261a96
SY
1665
1666 /*
1667 * bounding_box.w and bunding_box.h are used as
1668 * lower-right coordinates
1669 */
1670 if (rects[i].x + rects[i].w > bounding_box.w)
1671 bounding_box.w = rects[i].x + rects[i].w;
1672
1673 if (rects[i].y + rects[i].h > bounding_box.h)
1674 bounding_box.h = rects[i].y + rects[i].h;
cd2b89e7
TH
1675 }
1676
1677 vmw_du_update_layout(dev_priv, arg->num_outputs, rects);
1678
1679out_free:
1680 kfree(rects);
cd2b89e7
TH
1681 return ret;
1682}