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fb1d9738 JB |
1 | /************************************************************************** |
2 | * | |
3 | * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA | |
4 | * All Rights Reserved. | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a | |
7 | * copy of this software and associated documentation files (the | |
8 | * "Software"), to deal in the Software without restriction, including | |
9 | * without limitation the rights to use, copy, modify, merge, publish, | |
10 | * distribute, sub license, and/or sell copies of the Software, and to | |
11 | * permit persons to whom the Software is furnished to do so, subject to | |
12 | * the following conditions: | |
13 | * | |
14 | * The above copyright notice and this permission notice (including the | |
15 | * next paragraph) shall be included in all copies or substantial portions | |
16 | * of the Software. | |
17 | * | |
18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
19 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
20 | * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL | |
21 | * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, | |
22 | * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR | |
23 | * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE | |
24 | * USE OR OTHER DEALINGS IN THE SOFTWARE. | |
25 | * | |
26 | **************************************************************************/ | |
27 | ||
28 | #include "vmwgfx_kms.h" | |
29 | ||
56d1c78d | 30 | |
fb1d9738 JB |
31 | /* Might need a hrtimer here? */ |
32 | #define VMWGFX_PRESENT_RATE ((HZ / 60 > 0) ? HZ / 60 : 1) | |
33 | ||
6abff3c7 JB |
34 | |
35 | struct vmw_clip_rect { | |
36 | int x1, x2, y1, y2; | |
37 | }; | |
38 | ||
39 | /** | |
40 | * Clip @num_rects number of @rects against @clip storing the | |
41 | * results in @out_rects and the number of passed rects in @out_num. | |
42 | */ | |
847c5964 | 43 | static void vmw_clip_cliprects(struct drm_clip_rect *rects, |
6abff3c7 JB |
44 | int num_rects, |
45 | struct vmw_clip_rect clip, | |
46 | SVGASignedRect *out_rects, | |
47 | int *out_num) | |
48 | { | |
49 | int i, k; | |
50 | ||
51 | for (i = 0, k = 0; i < num_rects; i++) { | |
52 | int x1 = max_t(int, clip.x1, rects[i].x1); | |
53 | int y1 = max_t(int, clip.y1, rects[i].y1); | |
54 | int x2 = min_t(int, clip.x2, rects[i].x2); | |
55 | int y2 = min_t(int, clip.y2, rects[i].y2); | |
56 | ||
57 | if (x1 >= x2) | |
58 | continue; | |
59 | if (y1 >= y2) | |
60 | continue; | |
61 | ||
62 | out_rects[k].left = x1; | |
63 | out_rects[k].top = y1; | |
64 | out_rects[k].right = x2; | |
65 | out_rects[k].bottom = y2; | |
66 | k++; | |
67 | } | |
68 | ||
69 | *out_num = k; | |
70 | } | |
71 | ||
fb1d9738 JB |
72 | void vmw_display_unit_cleanup(struct vmw_display_unit *du) |
73 | { | |
74 | if (du->cursor_surface) | |
75 | vmw_surface_unreference(&du->cursor_surface); | |
76 | if (du->cursor_dmabuf) | |
77 | vmw_dmabuf_unreference(&du->cursor_dmabuf); | |
34ea3d38 | 78 | drm_connector_unregister(&du->connector); |
fb1d9738 JB |
79 | drm_crtc_cleanup(&du->crtc); |
80 | drm_encoder_cleanup(&du->encoder); | |
81 | drm_connector_cleanup(&du->connector); | |
82 | } | |
83 | ||
84 | /* | |
85 | * Display Unit Cursor functions | |
86 | */ | |
87 | ||
88 | int vmw_cursor_update_image(struct vmw_private *dev_priv, | |
89 | u32 *image, u32 width, u32 height, | |
90 | u32 hotspotX, u32 hotspotY) | |
91 | { | |
92 | struct { | |
93 | u32 cmd; | |
94 | SVGAFifoCmdDefineAlphaCursor cursor; | |
95 | } *cmd; | |
96 | u32 image_size = width * height * 4; | |
97 | u32 cmd_size = sizeof(*cmd) + image_size; | |
98 | ||
99 | if (!image) | |
100 | return -EINVAL; | |
101 | ||
102 | cmd = vmw_fifo_reserve(dev_priv, cmd_size); | |
103 | if (unlikely(cmd == NULL)) { | |
104 | DRM_ERROR("Fifo reserve failed.\n"); | |
105 | return -ENOMEM; | |
106 | } | |
107 | ||
108 | memset(cmd, 0, sizeof(*cmd)); | |
109 | ||
110 | memcpy(&cmd[1], image, image_size); | |
111 | ||
112 | cmd->cmd = cpu_to_le32(SVGA_CMD_DEFINE_ALPHA_CURSOR); | |
113 | cmd->cursor.id = cpu_to_le32(0); | |
114 | cmd->cursor.width = cpu_to_le32(width); | |
115 | cmd->cursor.height = cpu_to_le32(height); | |
116 | cmd->cursor.hotspotX = cpu_to_le32(hotspotX); | |
117 | cmd->cursor.hotspotY = cpu_to_le32(hotspotY); | |
118 | ||
119 | vmw_fifo_commit(dev_priv, cmd_size); | |
120 | ||
121 | return 0; | |
122 | } | |
123 | ||
6a91d97e JB |
124 | int vmw_cursor_update_dmabuf(struct vmw_private *dev_priv, |
125 | struct vmw_dma_buffer *dmabuf, | |
126 | u32 width, u32 height, | |
127 | u32 hotspotX, u32 hotspotY) | |
128 | { | |
129 | struct ttm_bo_kmap_obj map; | |
130 | unsigned long kmap_offset; | |
131 | unsigned long kmap_num; | |
132 | void *virtual; | |
133 | bool dummy; | |
134 | int ret; | |
135 | ||
136 | kmap_offset = 0; | |
137 | kmap_num = (width*height*4 + PAGE_SIZE - 1) >> PAGE_SHIFT; | |
138 | ||
ee3939e0 | 139 | ret = ttm_bo_reserve(&dmabuf->base, true, false, false, NULL); |
6a91d97e JB |
140 | if (unlikely(ret != 0)) { |
141 | DRM_ERROR("reserve failed\n"); | |
142 | return -EINVAL; | |
143 | } | |
144 | ||
145 | ret = ttm_bo_kmap(&dmabuf->base, kmap_offset, kmap_num, &map); | |
146 | if (unlikely(ret != 0)) | |
147 | goto err_unreserve; | |
148 | ||
149 | virtual = ttm_kmap_obj_virtual(&map, &dummy); | |
150 | ret = vmw_cursor_update_image(dev_priv, virtual, width, height, | |
151 | hotspotX, hotspotY); | |
152 | ||
153 | ttm_bo_kunmap(&map); | |
154 | err_unreserve: | |
155 | ttm_bo_unreserve(&dmabuf->base); | |
156 | ||
157 | return ret; | |
158 | } | |
159 | ||
160 | ||
fb1d9738 JB |
161 | void vmw_cursor_update_position(struct vmw_private *dev_priv, |
162 | bool show, int x, int y) | |
163 | { | |
164 | __le32 __iomem *fifo_mem = dev_priv->mmio_virt; | |
165 | uint32_t count; | |
166 | ||
167 | iowrite32(show ? 1 : 0, fifo_mem + SVGA_FIFO_CURSOR_ON); | |
168 | iowrite32(x, fifo_mem + SVGA_FIFO_CURSOR_X); | |
169 | iowrite32(y, fifo_mem + SVGA_FIFO_CURSOR_Y); | |
170 | count = ioread32(fifo_mem + SVGA_FIFO_CURSOR_COUNT); | |
171 | iowrite32(++count, fifo_mem + SVGA_FIFO_CURSOR_COUNT); | |
172 | } | |
173 | ||
174 | int vmw_du_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv, | |
175 | uint32_t handle, uint32_t width, uint32_t height) | |
176 | { | |
177 | struct vmw_private *dev_priv = vmw_priv(crtc->dev); | |
fb1d9738 JB |
178 | struct vmw_display_unit *du = vmw_crtc_to_du(crtc); |
179 | struct vmw_surface *surface = NULL; | |
180 | struct vmw_dma_buffer *dmabuf = NULL; | |
181 | int ret; | |
182 | ||
bfb89928 DV |
183 | /* |
184 | * FIXME: Unclear whether there's any global state touched by the | |
185 | * cursor_set function, especially vmw_cursor_update_position looks | |
186 | * suspicious. For now take the easy route and reacquire all locks. We | |
187 | * can do this since the caller in the drm core doesn't check anything | |
188 | * which is protected by any looks. | |
189 | */ | |
51fd371b | 190 | drm_modeset_unlock(&crtc->mutex); |
bfb89928 DV |
191 | drm_modeset_lock_all(dev_priv->dev); |
192 | ||
baa91d64 | 193 | /* A lot of the code assumes this */ |
bfb89928 DV |
194 | if (handle && (width != 64 || height != 64)) { |
195 | ret = -EINVAL; | |
196 | goto out; | |
197 | } | |
baa91d64 | 198 | |
fb1d9738 | 199 | if (handle) { |
a5d0f576 VS |
200 | struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile; |
201 | ||
e7ac9211 JB |
202 | ret = vmw_user_lookup_handle(dev_priv, tfile, |
203 | handle, &surface, &dmabuf); | |
204 | if (ret) { | |
205 | DRM_ERROR("failed to find surface or dmabuf: %i\n", ret); | |
bfb89928 DV |
206 | ret = -EINVAL; |
207 | goto out; | |
fb1d9738 JB |
208 | } |
209 | } | |
210 | ||
e7ac9211 JB |
211 | /* need to do this before taking down old image */ |
212 | if (surface && !surface->snooper.image) { | |
213 | DRM_ERROR("surface not suitable for cursor\n"); | |
214 | vmw_surface_unreference(&surface); | |
bfb89928 DV |
215 | ret = -EINVAL; |
216 | goto out; | |
e7ac9211 JB |
217 | } |
218 | ||
fb1d9738 JB |
219 | /* takedown old cursor */ |
220 | if (du->cursor_surface) { | |
221 | du->cursor_surface->snooper.crtc = NULL; | |
222 | vmw_surface_unreference(&du->cursor_surface); | |
223 | } | |
224 | if (du->cursor_dmabuf) | |
225 | vmw_dmabuf_unreference(&du->cursor_dmabuf); | |
226 | ||
227 | /* setup new image */ | |
228 | if (surface) { | |
229 | /* vmw_user_surface_lookup takes one reference */ | |
230 | du->cursor_surface = surface; | |
231 | ||
232 | du->cursor_surface->snooper.crtc = crtc; | |
233 | du->cursor_age = du->cursor_surface->snooper.age; | |
234 | vmw_cursor_update_image(dev_priv, surface->snooper.image, | |
235 | 64, 64, du->hotspot_x, du->hotspot_y); | |
236 | } else if (dmabuf) { | |
fb1d9738 JB |
237 | /* vmw_user_surface_lookup takes one reference */ |
238 | du->cursor_dmabuf = dmabuf; | |
239 | ||
6a91d97e JB |
240 | ret = vmw_cursor_update_dmabuf(dev_priv, dmabuf, width, height, |
241 | du->hotspot_x, du->hotspot_y); | |
fb1d9738 JB |
242 | } else { |
243 | vmw_cursor_update_position(dev_priv, false, 0, 0); | |
bfb89928 DV |
244 | ret = 0; |
245 | goto out; | |
fb1d9738 JB |
246 | } |
247 | ||
da7653d6 TH |
248 | vmw_cursor_update_position(dev_priv, true, |
249 | du->cursor_x + du->hotspot_x, | |
250 | du->cursor_y + du->hotspot_y); | |
fb1d9738 | 251 | |
bfb89928 DV |
252 | ret = 0; |
253 | out: | |
254 | drm_modeset_unlock_all(dev_priv->dev); | |
51fd371b | 255 | drm_modeset_lock(&crtc->mutex, NULL); |
bfb89928 DV |
256 | |
257 | return ret; | |
fb1d9738 JB |
258 | } |
259 | ||
260 | int vmw_du_crtc_cursor_move(struct drm_crtc *crtc, int x, int y) | |
261 | { | |
262 | struct vmw_private *dev_priv = vmw_priv(crtc->dev); | |
263 | struct vmw_display_unit *du = vmw_crtc_to_du(crtc); | |
264 | bool shown = du->cursor_surface || du->cursor_dmabuf ? true : false; | |
265 | ||
266 | du->cursor_x = x + crtc->x; | |
267 | du->cursor_y = y + crtc->y; | |
268 | ||
dac35663 DV |
269 | /* |
270 | * FIXME: Unclear whether there's any global state touched by the | |
271 | * cursor_set function, especially vmw_cursor_update_position looks | |
272 | * suspicious. For now take the easy route and reacquire all locks. We | |
273 | * can do this since the caller in the drm core doesn't check anything | |
274 | * which is protected by any looks. | |
275 | */ | |
51fd371b | 276 | drm_modeset_unlock(&crtc->mutex); |
dac35663 DV |
277 | drm_modeset_lock_all(dev_priv->dev); |
278 | ||
fb1d9738 | 279 | vmw_cursor_update_position(dev_priv, shown, |
da7653d6 TH |
280 | du->cursor_x + du->hotspot_x, |
281 | du->cursor_y + du->hotspot_y); | |
fb1d9738 | 282 | |
dac35663 | 283 | drm_modeset_unlock_all(dev_priv->dev); |
51fd371b | 284 | drm_modeset_lock(&crtc->mutex, NULL); |
dac35663 | 285 | |
fb1d9738 JB |
286 | return 0; |
287 | } | |
288 | ||
289 | void vmw_kms_cursor_snoop(struct vmw_surface *srf, | |
290 | struct ttm_object_file *tfile, | |
291 | struct ttm_buffer_object *bo, | |
292 | SVGA3dCmdHeader *header) | |
293 | { | |
294 | struct ttm_bo_kmap_obj map; | |
295 | unsigned long kmap_offset; | |
296 | unsigned long kmap_num; | |
297 | SVGA3dCopyBox *box; | |
298 | unsigned box_count; | |
299 | void *virtual; | |
300 | bool dummy; | |
301 | struct vmw_dma_cmd { | |
302 | SVGA3dCmdHeader header; | |
303 | SVGA3dCmdSurfaceDMA dma; | |
304 | } *cmd; | |
2ac86371 | 305 | int i, ret; |
fb1d9738 JB |
306 | |
307 | cmd = container_of(header, struct vmw_dma_cmd, header); | |
308 | ||
309 | /* No snooper installed */ | |
310 | if (!srf->snooper.image) | |
311 | return; | |
312 | ||
313 | if (cmd->dma.host.face != 0 || cmd->dma.host.mipmap != 0) { | |
314 | DRM_ERROR("face and mipmap for cursors should never != 0\n"); | |
315 | return; | |
316 | } | |
317 | ||
318 | if (cmd->header.size < 64) { | |
319 | DRM_ERROR("at least one full copy box must be given\n"); | |
320 | return; | |
321 | } | |
322 | ||
323 | box = (SVGA3dCopyBox *)&cmd[1]; | |
324 | box_count = (cmd->header.size - sizeof(SVGA3dCmdSurfaceDMA)) / | |
325 | sizeof(SVGA3dCopyBox); | |
326 | ||
2ac86371 | 327 | if (cmd->dma.guest.ptr.offset % PAGE_SIZE || |
fb1d9738 JB |
328 | box->x != 0 || box->y != 0 || box->z != 0 || |
329 | box->srcx != 0 || box->srcy != 0 || box->srcz != 0 || | |
2ac86371 | 330 | box->d != 1 || box_count != 1) { |
fb1d9738 | 331 | /* TODO handle none page aligned offsets */ |
2ac86371 JB |
332 | /* TODO handle more dst & src != 0 */ |
333 | /* TODO handle more then one copy */ | |
334 | DRM_ERROR("Cant snoop dma request for cursor!\n"); | |
335 | DRM_ERROR("(%u, %u, %u) (%u, %u, %u) (%ux%ux%u) %u %u\n", | |
336 | box->srcx, box->srcy, box->srcz, | |
337 | box->x, box->y, box->z, | |
338 | box->w, box->h, box->d, box_count, | |
339 | cmd->dma.guest.ptr.offset); | |
fb1d9738 JB |
340 | return; |
341 | } | |
342 | ||
343 | kmap_offset = cmd->dma.guest.ptr.offset >> PAGE_SHIFT; | |
344 | kmap_num = (64*64*4) >> PAGE_SHIFT; | |
345 | ||
ee3939e0 | 346 | ret = ttm_bo_reserve(bo, true, false, false, NULL); |
fb1d9738 JB |
347 | if (unlikely(ret != 0)) { |
348 | DRM_ERROR("reserve failed\n"); | |
349 | return; | |
350 | } | |
351 | ||
352 | ret = ttm_bo_kmap(bo, kmap_offset, kmap_num, &map); | |
353 | if (unlikely(ret != 0)) | |
354 | goto err_unreserve; | |
355 | ||
356 | virtual = ttm_kmap_obj_virtual(&map, &dummy); | |
357 | ||
2ac86371 JB |
358 | if (box->w == 64 && cmd->dma.guest.pitch == 64*4) { |
359 | memcpy(srf->snooper.image, virtual, 64*64*4); | |
360 | } else { | |
361 | /* Image is unsigned pointer. */ | |
362 | for (i = 0; i < box->h; i++) | |
363 | memcpy(srf->snooper.image + i * 64, | |
364 | virtual + i * cmd->dma.guest.pitch, | |
365 | box->w * 4); | |
366 | } | |
367 | ||
fb1d9738 JB |
368 | srf->snooper.age++; |
369 | ||
370 | /* we can't call this function from this function since execbuf has | |
371 | * reserved fifo space. | |
372 | * | |
373 | * if (srf->snooper.crtc) | |
374 | * vmw_ldu_crtc_cursor_update_image(dev_priv, | |
375 | * srf->snooper.image, 64, 64, | |
376 | * du->hotspot_x, du->hotspot_y); | |
377 | */ | |
378 | ||
379 | ttm_bo_kunmap(&map); | |
380 | err_unreserve: | |
381 | ttm_bo_unreserve(bo); | |
382 | } | |
383 | ||
384 | void vmw_kms_cursor_post_execbuf(struct vmw_private *dev_priv) | |
385 | { | |
386 | struct drm_device *dev = dev_priv->dev; | |
387 | struct vmw_display_unit *du; | |
388 | struct drm_crtc *crtc; | |
389 | ||
390 | mutex_lock(&dev->mode_config.mutex); | |
391 | ||
392 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | |
393 | du = vmw_crtc_to_du(crtc); | |
394 | if (!du->cursor_surface || | |
395 | du->cursor_age == du->cursor_surface->snooper.age) | |
396 | continue; | |
397 | ||
398 | du->cursor_age = du->cursor_surface->snooper.age; | |
399 | vmw_cursor_update_image(dev_priv, | |
400 | du->cursor_surface->snooper.image, | |
401 | 64, 64, du->hotspot_x, du->hotspot_y); | |
402 | } | |
403 | ||
404 | mutex_unlock(&dev->mode_config.mutex); | |
405 | } | |
406 | ||
407 | /* | |
408 | * Generic framebuffer code | |
409 | */ | |
410 | ||
fb1d9738 JB |
411 | /* |
412 | * Surface framebuffer code | |
413 | */ | |
414 | ||
415 | #define vmw_framebuffer_to_vfbs(x) \ | |
416 | container_of(x, struct vmw_framebuffer_surface, base.base) | |
417 | ||
418 | struct vmw_framebuffer_surface { | |
419 | struct vmw_framebuffer base; | |
420 | struct vmw_surface *surface; | |
22ee861c | 421 | struct vmw_dma_buffer *buffer; |
3a939a5e TH |
422 | struct list_head head; |
423 | struct drm_master *master; | |
fb1d9738 JB |
424 | }; |
425 | ||
847c5964 | 426 | static void vmw_framebuffer_surface_destroy(struct drm_framebuffer *framebuffer) |
fb1d9738 | 427 | { |
3a939a5e | 428 | struct vmw_framebuffer_surface *vfbs = |
fb1d9738 | 429 | vmw_framebuffer_to_vfbs(framebuffer); |
3a939a5e TH |
430 | struct vmw_master *vmaster = vmw_master(vfbs->master); |
431 | ||
432 | ||
433 | mutex_lock(&vmaster->fb_surf_mutex); | |
434 | list_del(&vfbs->head); | |
435 | mutex_unlock(&vmaster->fb_surf_mutex); | |
fb1d9738 | 436 | |
3a939a5e | 437 | drm_master_put(&vfbs->master); |
fb1d9738 | 438 | drm_framebuffer_cleanup(framebuffer); |
3a939a5e | 439 | vmw_surface_unreference(&vfbs->surface); |
90ff18bc | 440 | ttm_base_object_unref(&vfbs->base.user_obj); |
fb1d9738 | 441 | |
3a939a5e | 442 | kfree(vfbs); |
fb1d9738 JB |
443 | } |
444 | ||
56d1c78d | 445 | static int do_surface_dirty_sou(struct vmw_private *dev_priv, |
90ff18bc | 446 | struct drm_file *file_priv, |
56d1c78d | 447 | struct vmw_framebuffer *framebuffer, |
56d1c78d JB |
448 | unsigned flags, unsigned color, |
449 | struct drm_clip_rect *clips, | |
bd49ae46 JB |
450 | unsigned num_clips, int inc, |
451 | struct vmw_fence_obj **out_fence) | |
56d1c78d | 452 | { |
c6ca8391 | 453 | struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS]; |
6abff3c7 JB |
454 | struct drm_clip_rect *clips_ptr; |
455 | struct drm_clip_rect *tmp; | |
c6ca8391 | 456 | struct drm_crtc *crtc; |
56d1c78d | 457 | size_t fifo_size; |
c6ca8391 JB |
458 | int i, num_units; |
459 | int ret = 0; /* silence warning */ | |
460 | int left, right, top, bottom; | |
56d1c78d JB |
461 | |
462 | struct { | |
463 | SVGA3dCmdHeader header; | |
464 | SVGA3dCmdBlitSurfaceToScreen body; | |
465 | } *cmd; | |
c6ca8391 | 466 | SVGASignedRect *blits; |
56d1c78d | 467 | |
c6ca8391 JB |
468 | num_units = 0; |
469 | list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, | |
470 | head) { | |
f4510a27 | 471 | if (crtc->primary->fb != &framebuffer->base) |
c6ca8391 JB |
472 | continue; |
473 | units[num_units++] = vmw_crtc_to_du(crtc); | |
474 | } | |
475 | ||
c6ca8391 JB |
476 | BUG_ON(!clips || !num_clips); |
477 | ||
6abff3c7 JB |
478 | tmp = kzalloc(sizeof(*tmp) * num_clips, GFP_KERNEL); |
479 | if (unlikely(tmp == NULL)) { | |
480 | DRM_ERROR("Temporary cliprect memory alloc failed.\n"); | |
481 | return -ENOMEM; | |
482 | } | |
483 | ||
c6ca8391 | 484 | fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num_clips; |
90ff18bc | 485 | cmd = kzalloc(fifo_size, GFP_KERNEL); |
56d1c78d | 486 | if (unlikely(cmd == NULL)) { |
90ff18bc | 487 | DRM_ERROR("Temporary fifo memory alloc failed.\n"); |
6abff3c7 JB |
488 | ret = -ENOMEM; |
489 | goto out_free_tmp; | |
56d1c78d JB |
490 | } |
491 | ||
6abff3c7 JB |
492 | /* setup blits pointer */ |
493 | blits = (SVGASignedRect *)&cmd[1]; | |
494 | ||
495 | /* initial clip region */ | |
c6ca8391 JB |
496 | left = clips->x1; |
497 | right = clips->x2; | |
498 | top = clips->y1; | |
499 | bottom = clips->y2; | |
500 | ||
f0c8a652 JB |
501 | /* skip the first clip rect */ |
502 | for (i = 1, clips_ptr = clips + inc; | |
503 | i < num_clips; i++, clips_ptr += inc) { | |
c6ca8391 JB |
504 | left = min_t(int, left, (int)clips_ptr->x1); |
505 | right = max_t(int, right, (int)clips_ptr->x2); | |
506 | top = min_t(int, top, (int)clips_ptr->y1); | |
507 | bottom = max_t(int, bottom, (int)clips_ptr->y2); | |
56d1c78d JB |
508 | } |
509 | ||
c6ca8391 | 510 | /* only need to do this once */ |
c6ca8391 JB |
511 | cmd->header.id = cpu_to_le32(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN); |
512 | cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header)); | |
513 | ||
56d1c78d JB |
514 | cmd->body.srcRect.left = left; |
515 | cmd->body.srcRect.right = right; | |
516 | cmd->body.srcRect.top = top; | |
517 | cmd->body.srcRect.bottom = bottom; | |
518 | ||
c6ca8391 | 519 | clips_ptr = clips; |
c6ca8391 | 520 | for (i = 0; i < num_clips; i++, clips_ptr += inc) { |
6abff3c7 JB |
521 | tmp[i].x1 = clips_ptr->x1 - left; |
522 | tmp[i].x2 = clips_ptr->x2 - left; | |
523 | tmp[i].y1 = clips_ptr->y1 - top; | |
524 | tmp[i].y2 = clips_ptr->y2 - top; | |
c6ca8391 JB |
525 | } |
526 | ||
527 | /* do per unit writing, reuse fifo for each */ | |
528 | for (i = 0; i < num_units; i++) { | |
529 | struct vmw_display_unit *unit = units[i]; | |
6abff3c7 JB |
530 | struct vmw_clip_rect clip; |
531 | int num; | |
532 | ||
533 | clip.x1 = left - unit->crtc.x; | |
534 | clip.y1 = top - unit->crtc.y; | |
535 | clip.x2 = right - unit->crtc.x; | |
536 | clip.y2 = bottom - unit->crtc.y; | |
c6ca8391 JB |
537 | |
538 | /* skip any crtcs that misses the clip region */ | |
6abff3c7 JB |
539 | if (clip.x1 >= unit->crtc.mode.hdisplay || |
540 | clip.y1 >= unit->crtc.mode.vdisplay || | |
541 | clip.x2 <= 0 || clip.y2 <= 0) | |
c6ca8391 JB |
542 | continue; |
543 | ||
6abff3c7 JB |
544 | /* |
545 | * In order for the clip rects to be correctly scaled | |
546 | * the src and dest rects needs to be the same size. | |
547 | */ | |
548 | cmd->body.destRect.left = clip.x1; | |
549 | cmd->body.destRect.right = clip.x2; | |
550 | cmd->body.destRect.top = clip.y1; | |
551 | cmd->body.destRect.bottom = clip.y2; | |
552 | ||
553 | /* create a clip rect of the crtc in dest coords */ | |
554 | clip.x2 = unit->crtc.mode.hdisplay - clip.x1; | |
555 | clip.y2 = unit->crtc.mode.vdisplay - clip.y1; | |
556 | clip.x1 = 0 - clip.x1; | |
557 | clip.y1 = 0 - clip.y1; | |
558 | ||
c6ca8391 JB |
559 | /* need to reset sid as it is changed by execbuf */ |
560 | cmd->body.srcImage.sid = cpu_to_le32(framebuffer->user_handle); | |
c6ca8391 JB |
561 | cmd->body.destScreenId = unit->unit; |
562 | ||
6abff3c7 JB |
563 | /* clip and write blits to cmd stream */ |
564 | vmw_clip_cliprects(tmp, num_clips, clip, blits, &num); | |
c6ca8391 | 565 | |
6abff3c7 JB |
566 | /* if no cliprects hit skip this */ |
567 | if (num == 0) | |
568 | continue; | |
c6ca8391 | 569 | |
bd49ae46 JB |
570 | /* only return the last fence */ |
571 | if (out_fence && *out_fence) | |
572 | vmw_fence_obj_unreference(out_fence); | |
c6ca8391 | 573 | |
6abff3c7 JB |
574 | /* recalculate package length */ |
575 | fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num; | |
576 | cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header)); | |
c6ca8391 | 577 | ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd, |
bd49ae46 | 578 | fifo_size, 0, NULL, out_fence); |
c6ca8391 JB |
579 | |
580 | if (unlikely(ret != 0)) | |
581 | break; | |
582 | } | |
56d1c78d | 583 | |
6abff3c7 | 584 | |
90ff18bc | 585 | kfree(cmd); |
6abff3c7 JB |
586 | out_free_tmp: |
587 | kfree(tmp); | |
56d1c78d | 588 | |
90ff18bc | 589 | return ret; |
5deb65cf | 590 | } |
fb1d9738 | 591 | |
847c5964 | 592 | static int vmw_framebuffer_surface_dirty(struct drm_framebuffer *framebuffer, |
02b00162 | 593 | struct drm_file *file_priv, |
fb1d9738 JB |
594 | unsigned flags, unsigned color, |
595 | struct drm_clip_rect *clips, | |
596 | unsigned num_clips) | |
597 | { | |
598 | struct vmw_private *dev_priv = vmw_priv(framebuffer->dev); | |
599 | struct vmw_framebuffer_surface *vfbs = | |
600 | vmw_framebuffer_to_vfbs(framebuffer); | |
fb1d9738 | 601 | struct drm_clip_rect norect; |
5deb65cf | 602 | int ret, inc = 1; |
fb1d9738 | 603 | |
3a939a5e TH |
604 | if (unlikely(vfbs->master != file_priv->master)) |
605 | return -EINVAL; | |
606 | ||
01e81419 JB |
607 | /* Require ScreenObject support for 3D */ |
608 | if (!dev_priv->sou_priv) | |
609 | return -EINVAL; | |
610 | ||
73e9efd4 VS |
611 | drm_modeset_lock_all(dev_priv->dev); |
612 | ||
294adf7d | 613 | ret = ttm_read_lock(&dev_priv->reservation_sem, true); |
73e9efd4 VS |
614 | if (unlikely(ret != 0)) { |
615 | drm_modeset_unlock_all(dev_priv->dev); | |
3a939a5e | 616 | return ret; |
73e9efd4 | 617 | } |
3a939a5e | 618 | |
fb1d9738 JB |
619 | if (!num_clips) { |
620 | num_clips = 1; | |
621 | clips = &norect; | |
622 | norect.x1 = norect.y1 = 0; | |
623 | norect.x2 = framebuffer->width; | |
624 | norect.y2 = framebuffer->height; | |
625 | } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) { | |
626 | num_clips /= 2; | |
627 | inc = 2; /* skip source rects */ | |
628 | } | |
629 | ||
c5c42360 | 630 | ret = do_surface_dirty_sou(dev_priv, file_priv, &vfbs->base, |
01e81419 | 631 | flags, color, |
bd49ae46 | 632 | clips, num_clips, inc, NULL); |
fb1d9738 | 633 | |
294adf7d | 634 | ttm_read_unlock(&dev_priv->reservation_sem); |
73e9efd4 VS |
635 | |
636 | drm_modeset_unlock_all(dev_priv->dev); | |
637 | ||
fb1d9738 JB |
638 | return 0; |
639 | } | |
640 | ||
641 | static struct drm_framebuffer_funcs vmw_framebuffer_surface_funcs = { | |
642 | .destroy = vmw_framebuffer_surface_destroy, | |
643 | .dirty = vmw_framebuffer_surface_dirty, | |
fb1d9738 JB |
644 | }; |
645 | ||
d3216a0c | 646 | static int vmw_kms_new_framebuffer_surface(struct vmw_private *dev_priv, |
3a939a5e | 647 | struct drm_file *file_priv, |
d3216a0c TH |
648 | struct vmw_surface *surface, |
649 | struct vmw_framebuffer **out, | |
650 | const struct drm_mode_fb_cmd | |
651 | *mode_cmd) | |
fb1d9738 JB |
652 | |
653 | { | |
654 | struct drm_device *dev = dev_priv->dev; | |
655 | struct vmw_framebuffer_surface *vfbs; | |
d3216a0c | 656 | enum SVGA3dSurfaceFormat format; |
3a939a5e | 657 | struct vmw_master *vmaster = vmw_master(file_priv->master); |
fb1d9738 JB |
658 | int ret; |
659 | ||
01e81419 JB |
660 | /* 3D is only supported on HWv8 hosts which supports screen objects */ |
661 | if (!dev_priv->sou_priv) | |
662 | return -ENOSYS; | |
663 | ||
d3216a0c TH |
664 | /* |
665 | * Sanity checks. | |
666 | */ | |
667 | ||
e7ac9211 JB |
668 | /* Surface must be marked as a scanout. */ |
669 | if (unlikely(!surface->scanout)) | |
670 | return -EINVAL; | |
671 | ||
d3216a0c TH |
672 | if (unlikely(surface->mip_levels[0] != 1 || |
673 | surface->num_sizes != 1 || | |
b360a3ce TH |
674 | surface->base_size.width < mode_cmd->width || |
675 | surface->base_size.height < mode_cmd->height || | |
676 | surface->base_size.depth != 1)) { | |
d3216a0c TH |
677 | DRM_ERROR("Incompatible surface dimensions " |
678 | "for requested mode.\n"); | |
679 | return -EINVAL; | |
680 | } | |
681 | ||
682 | switch (mode_cmd->depth) { | |
683 | case 32: | |
684 | format = SVGA3D_A8R8G8B8; | |
685 | break; | |
686 | case 24: | |
687 | format = SVGA3D_X8R8G8B8; | |
688 | break; | |
689 | case 16: | |
690 | format = SVGA3D_R5G6B5; | |
691 | break; | |
692 | case 15: | |
693 | format = SVGA3D_A1R5G5B5; | |
694 | break; | |
f01b7ba0 MD |
695 | case 8: |
696 | format = SVGA3D_LUMINANCE8; | |
697 | break; | |
d3216a0c TH |
698 | default: |
699 | DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth); | |
700 | return -EINVAL; | |
701 | } | |
702 | ||
703 | if (unlikely(format != surface->format)) { | |
704 | DRM_ERROR("Invalid surface format for requested mode.\n"); | |
705 | return -EINVAL; | |
706 | } | |
707 | ||
fb1d9738 JB |
708 | vfbs = kzalloc(sizeof(*vfbs), GFP_KERNEL); |
709 | if (!vfbs) { | |
710 | ret = -ENOMEM; | |
711 | goto out_err1; | |
712 | } | |
713 | ||
fb1d9738 JB |
714 | if (!vmw_surface_reference(surface)) { |
715 | DRM_ERROR("failed to reference surface %p\n", surface); | |
80f0b5af DV |
716 | ret = -EINVAL; |
717 | goto out_err2; | |
fb1d9738 JB |
718 | } |
719 | ||
720 | /* XXX get the first 3 from the surface info */ | |
d3216a0c | 721 | vfbs->base.base.bits_per_pixel = mode_cmd->bpp; |
01f2c773 | 722 | vfbs->base.base.pitches[0] = mode_cmd->pitch; |
d3216a0c TH |
723 | vfbs->base.base.depth = mode_cmd->depth; |
724 | vfbs->base.base.width = mode_cmd->width; | |
725 | vfbs->base.base.height = mode_cmd->height; | |
fb1d9738 | 726 | vfbs->surface = surface; |
90ff18bc | 727 | vfbs->base.user_handle = mode_cmd->handle; |
3a939a5e | 728 | vfbs->master = drm_master_get(file_priv->master); |
3a939a5e TH |
729 | |
730 | mutex_lock(&vmaster->fb_surf_mutex); | |
3a939a5e TH |
731 | list_add_tail(&vfbs->head, &vmaster->fb_surf); |
732 | mutex_unlock(&vmaster->fb_surf_mutex); | |
733 | ||
fb1d9738 JB |
734 | *out = &vfbs->base; |
735 | ||
80f0b5af DV |
736 | ret = drm_framebuffer_init(dev, &vfbs->base.base, |
737 | &vmw_framebuffer_surface_funcs); | |
738 | if (ret) | |
739 | goto out_err3; | |
740 | ||
fb1d9738 JB |
741 | return 0; |
742 | ||
743 | out_err3: | |
80f0b5af | 744 | vmw_surface_unreference(&surface); |
fb1d9738 JB |
745 | out_err2: |
746 | kfree(vfbs); | |
747 | out_err1: | |
748 | return ret; | |
749 | } | |
750 | ||
751 | /* | |
752 | * Dmabuf framebuffer code | |
753 | */ | |
754 | ||
755 | #define vmw_framebuffer_to_vfbd(x) \ | |
756 | container_of(x, struct vmw_framebuffer_dmabuf, base.base) | |
757 | ||
758 | struct vmw_framebuffer_dmabuf { | |
759 | struct vmw_framebuffer base; | |
760 | struct vmw_dma_buffer *buffer; | |
761 | }; | |
762 | ||
847c5964 | 763 | static void vmw_framebuffer_dmabuf_destroy(struct drm_framebuffer *framebuffer) |
fb1d9738 JB |
764 | { |
765 | struct vmw_framebuffer_dmabuf *vfbd = | |
766 | vmw_framebuffer_to_vfbd(framebuffer); | |
767 | ||
768 | drm_framebuffer_cleanup(framebuffer); | |
769 | vmw_dmabuf_unreference(&vfbd->buffer); | |
90ff18bc | 770 | ttm_base_object_unref(&vfbd->base.user_obj); |
fb1d9738 JB |
771 | |
772 | kfree(vfbd); | |
773 | } | |
774 | ||
5deb65cf JB |
775 | static int do_dmabuf_dirty_ldu(struct vmw_private *dev_priv, |
776 | struct vmw_framebuffer *framebuffer, | |
5deb65cf JB |
777 | unsigned flags, unsigned color, |
778 | struct drm_clip_rect *clips, | |
779 | unsigned num_clips, int increment) | |
780 | { | |
781 | size_t fifo_size; | |
782 | int i; | |
783 | ||
784 | struct { | |
785 | uint32_t header; | |
786 | SVGAFifoCmdUpdate body; | |
787 | } *cmd; | |
788 | ||
789 | fifo_size = sizeof(*cmd) * num_clips; | |
790 | cmd = vmw_fifo_reserve(dev_priv, fifo_size); | |
791 | if (unlikely(cmd == NULL)) { | |
792 | DRM_ERROR("Fifo reserve failed.\n"); | |
793 | return -ENOMEM; | |
794 | } | |
795 | ||
796 | memset(cmd, 0, fifo_size); | |
797 | for (i = 0; i < num_clips; i++, clips += increment) { | |
798 | cmd[i].header = cpu_to_le32(SVGA_CMD_UPDATE); | |
799 | cmd[i].body.x = cpu_to_le32(clips->x1); | |
800 | cmd[i].body.y = cpu_to_le32(clips->y1); | |
801 | cmd[i].body.width = cpu_to_le32(clips->x2 - clips->x1); | |
802 | cmd[i].body.height = cpu_to_le32(clips->y2 - clips->y1); | |
803 | } | |
804 | ||
805 | vmw_fifo_commit(dev_priv, fifo_size); | |
806 | return 0; | |
807 | } | |
808 | ||
c6ca8391 JB |
809 | static int do_dmabuf_define_gmrfb(struct drm_file *file_priv, |
810 | struct vmw_private *dev_priv, | |
811 | struct vmw_framebuffer *framebuffer) | |
56d1c78d | 812 | { |
64fc9944 | 813 | int depth = framebuffer->base.depth; |
56d1c78d | 814 | size_t fifo_size; |
c6ca8391 | 815 | int ret; |
56d1c78d JB |
816 | |
817 | struct { | |
818 | uint32_t header; | |
819 | SVGAFifoCmdDefineGMRFB body; | |
820 | } *cmd; | |
56d1c78d | 821 | |
64fc9944 JB |
822 | /* Emulate RGBA support, contrary to svga_reg.h this is not |
823 | * supported by hosts. This is only a problem if we are reading | |
824 | * this value later and expecting what we uploaded back. | |
825 | */ | |
826 | if (depth == 32) | |
827 | depth = 24; | |
828 | ||
c6ca8391 | 829 | fifo_size = sizeof(*cmd); |
56d1c78d JB |
830 | cmd = kmalloc(fifo_size, GFP_KERNEL); |
831 | if (unlikely(cmd == NULL)) { | |
832 | DRM_ERROR("Failed to allocate temporary cmd buffer.\n"); | |
833 | return -ENOMEM; | |
834 | } | |
835 | ||
836 | memset(cmd, 0, fifo_size); | |
837 | cmd->header = SVGA_CMD_DEFINE_GMRFB; | |
838 | cmd->body.format.bitsPerPixel = framebuffer->base.bits_per_pixel; | |
64fc9944 | 839 | cmd->body.format.colorDepth = depth; |
56d1c78d | 840 | cmd->body.format.reserved = 0; |
01f2c773 | 841 | cmd->body.bytesPerLine = framebuffer->base.pitches[0]; |
90ff18bc | 842 | cmd->body.ptr.gmrId = framebuffer->user_handle; |
56d1c78d JB |
843 | cmd->body.ptr.offset = 0; |
844 | ||
56d1c78d | 845 | ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd, |
bb1bd2f4 | 846 | fifo_size, 0, NULL, NULL); |
56d1c78d JB |
847 | |
848 | kfree(cmd); | |
849 | ||
850 | return ret; | |
851 | } | |
852 | ||
c6ca8391 JB |
853 | static int do_dmabuf_dirty_sou(struct drm_file *file_priv, |
854 | struct vmw_private *dev_priv, | |
855 | struct vmw_framebuffer *framebuffer, | |
c6ca8391 JB |
856 | unsigned flags, unsigned color, |
857 | struct drm_clip_rect *clips, | |
bd49ae46 JB |
858 | unsigned num_clips, int increment, |
859 | struct vmw_fence_obj **out_fence) | |
c6ca8391 JB |
860 | { |
861 | struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS]; | |
862 | struct drm_clip_rect *clips_ptr; | |
863 | int i, k, num_units, ret; | |
864 | struct drm_crtc *crtc; | |
865 | size_t fifo_size; | |
866 | ||
867 | struct { | |
868 | uint32_t header; | |
869 | SVGAFifoCmdBlitGMRFBToScreen body; | |
870 | } *blits; | |
871 | ||
872 | ret = do_dmabuf_define_gmrfb(file_priv, dev_priv, framebuffer); | |
873 | if (unlikely(ret != 0)) | |
874 | return ret; /* define_gmrfb prints warnings */ | |
875 | ||
876 | fifo_size = sizeof(*blits) * num_clips; | |
877 | blits = kmalloc(fifo_size, GFP_KERNEL); | |
878 | if (unlikely(blits == NULL)) { | |
879 | DRM_ERROR("Failed to allocate temporary cmd buffer.\n"); | |
880 | return -ENOMEM; | |
881 | } | |
882 | ||
883 | num_units = 0; | |
884 | list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) { | |
f4510a27 | 885 | if (crtc->primary->fb != &framebuffer->base) |
c6ca8391 JB |
886 | continue; |
887 | units[num_units++] = vmw_crtc_to_du(crtc); | |
888 | } | |
889 | ||
890 | for (k = 0; k < num_units; k++) { | |
891 | struct vmw_display_unit *unit = units[k]; | |
892 | int hit_num = 0; | |
893 | ||
894 | clips_ptr = clips; | |
895 | for (i = 0; i < num_clips; i++, clips_ptr += increment) { | |
896 | int clip_x1 = clips_ptr->x1 - unit->crtc.x; | |
897 | int clip_y1 = clips_ptr->y1 - unit->crtc.y; | |
898 | int clip_x2 = clips_ptr->x2 - unit->crtc.x; | |
899 | int clip_y2 = clips_ptr->y2 - unit->crtc.y; | |
6abff3c7 | 900 | int move_x, move_y; |
c6ca8391 JB |
901 | |
902 | /* skip any crtcs that misses the clip region */ | |
903 | if (clip_x1 >= unit->crtc.mode.hdisplay || | |
904 | clip_y1 >= unit->crtc.mode.vdisplay || | |
905 | clip_x2 <= 0 || clip_y2 <= 0) | |
906 | continue; | |
907 | ||
6abff3c7 JB |
908 | /* clip size to crtc size */ |
909 | clip_x2 = min_t(int, clip_x2, unit->crtc.mode.hdisplay); | |
910 | clip_y2 = min_t(int, clip_y2, unit->crtc.mode.vdisplay); | |
911 | ||
912 | /* translate both src and dest to bring clip into screen */ | |
913 | move_x = min_t(int, clip_x1, 0); | |
914 | move_y = min_t(int, clip_y1, 0); | |
915 | ||
916 | /* actual translate done here */ | |
c6ca8391 JB |
917 | blits[hit_num].header = SVGA_CMD_BLIT_GMRFB_TO_SCREEN; |
918 | blits[hit_num].body.destScreenId = unit->unit; | |
6abff3c7 JB |
919 | blits[hit_num].body.srcOrigin.x = clips_ptr->x1 - move_x; |
920 | blits[hit_num].body.srcOrigin.y = clips_ptr->y1 - move_y; | |
921 | blits[hit_num].body.destRect.left = clip_x1 - move_x; | |
922 | blits[hit_num].body.destRect.top = clip_y1 - move_y; | |
c6ca8391 JB |
923 | blits[hit_num].body.destRect.right = clip_x2; |
924 | blits[hit_num].body.destRect.bottom = clip_y2; | |
925 | hit_num++; | |
926 | } | |
927 | ||
928 | /* no clips hit the crtc */ | |
929 | if (hit_num == 0) | |
930 | continue; | |
931 | ||
bd49ae46 JB |
932 | /* only return the last fence */ |
933 | if (out_fence && *out_fence) | |
934 | vmw_fence_obj_unreference(out_fence); | |
935 | ||
c6ca8391 JB |
936 | fifo_size = sizeof(*blits) * hit_num; |
937 | ret = vmw_execbuf_process(file_priv, dev_priv, NULL, blits, | |
bd49ae46 | 938 | fifo_size, 0, NULL, out_fence); |
c6ca8391 JB |
939 | |
940 | if (unlikely(ret != 0)) | |
941 | break; | |
942 | } | |
943 | ||
944 | kfree(blits); | |
945 | ||
946 | return ret; | |
947 | } | |
948 | ||
847c5964 | 949 | static int vmw_framebuffer_dmabuf_dirty(struct drm_framebuffer *framebuffer, |
02b00162 | 950 | struct drm_file *file_priv, |
fb1d9738 JB |
951 | unsigned flags, unsigned color, |
952 | struct drm_clip_rect *clips, | |
953 | unsigned num_clips) | |
954 | { | |
955 | struct vmw_private *dev_priv = vmw_priv(framebuffer->dev); | |
5deb65cf JB |
956 | struct vmw_framebuffer_dmabuf *vfbd = |
957 | vmw_framebuffer_to_vfbd(framebuffer); | |
fb1d9738 | 958 | struct drm_clip_rect norect; |
5deb65cf | 959 | int ret, increment = 1; |
fb1d9738 | 960 | |
73e9efd4 VS |
961 | drm_modeset_lock_all(dev_priv->dev); |
962 | ||
294adf7d | 963 | ret = ttm_read_lock(&dev_priv->reservation_sem, true); |
73e9efd4 VS |
964 | if (unlikely(ret != 0)) { |
965 | drm_modeset_unlock_all(dev_priv->dev); | |
3a939a5e | 966 | return ret; |
73e9efd4 | 967 | } |
3a939a5e | 968 | |
df1c93ba | 969 | if (!num_clips) { |
fb1d9738 JB |
970 | num_clips = 1; |
971 | clips = &norect; | |
972 | norect.x1 = norect.y1 = 0; | |
973 | norect.x2 = framebuffer->width; | |
974 | norect.y2 = framebuffer->height; | |
975 | } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) { | |
976 | num_clips /= 2; | |
977 | increment = 2; | |
978 | } | |
979 | ||
56d1c78d | 980 | if (dev_priv->ldu_priv) { |
c5c42360 | 981 | ret = do_dmabuf_dirty_ldu(dev_priv, &vfbd->base, |
56d1c78d JB |
982 | flags, color, |
983 | clips, num_clips, increment); | |
984 | } else { | |
985 | ret = do_dmabuf_dirty_sou(file_priv, dev_priv, &vfbd->base, | |
c5c42360 | 986 | flags, color, |
bd49ae46 | 987 | clips, num_clips, increment, NULL); |
56d1c78d | 988 | } |
fb1d9738 | 989 | |
294adf7d | 990 | ttm_read_unlock(&dev_priv->reservation_sem); |
73e9efd4 VS |
991 | |
992 | drm_modeset_unlock_all(dev_priv->dev); | |
993 | ||
5deb65cf | 994 | return ret; |
fb1d9738 JB |
995 | } |
996 | ||
997 | static struct drm_framebuffer_funcs vmw_framebuffer_dmabuf_funcs = { | |
998 | .destroy = vmw_framebuffer_dmabuf_destroy, | |
999 | .dirty = vmw_framebuffer_dmabuf_dirty, | |
fb1d9738 JB |
1000 | }; |
1001 | ||
497a3ff9 JB |
1002 | /** |
1003 | * Pin the dmabuffer to the start of vram. | |
1004 | */ | |
fb1d9738 JB |
1005 | static int vmw_framebuffer_dmabuf_pin(struct vmw_framebuffer *vfb) |
1006 | { | |
1007 | struct vmw_private *dev_priv = vmw_priv(vfb->base.dev); | |
1008 | struct vmw_framebuffer_dmabuf *vfbd = | |
1009 | vmw_framebuffer_to_vfbd(&vfb->base); | |
1010 | int ret; | |
1011 | ||
56d1c78d JB |
1012 | /* This code should not be used with screen objects */ |
1013 | BUG_ON(dev_priv->sou_priv); | |
d7e1958d | 1014 | |
fb1d9738 JB |
1015 | vmw_overlay_pause_all(dev_priv); |
1016 | ||
d991ef03 | 1017 | ret = vmw_dmabuf_to_start_of_vram(dev_priv, vfbd->buffer, true, false); |
fb1d9738 | 1018 | |
fb1d9738 JB |
1019 | vmw_overlay_resume_all(dev_priv); |
1020 | ||
316ab13a JB |
1021 | WARN_ON(ret != 0); |
1022 | ||
fb1d9738 JB |
1023 | return 0; |
1024 | } | |
1025 | ||
1026 | static int vmw_framebuffer_dmabuf_unpin(struct vmw_framebuffer *vfb) | |
1027 | { | |
1028 | struct vmw_private *dev_priv = vmw_priv(vfb->base.dev); | |
1029 | struct vmw_framebuffer_dmabuf *vfbd = | |
1030 | vmw_framebuffer_to_vfbd(&vfb->base); | |
1031 | ||
1032 | if (!vfbd->buffer) { | |
1033 | WARN_ON(!vfbd->buffer); | |
1034 | return 0; | |
1035 | } | |
1036 | ||
d991ef03 | 1037 | return vmw_dmabuf_unpin(dev_priv, vfbd->buffer, false); |
fb1d9738 JB |
1038 | } |
1039 | ||
d3216a0c TH |
1040 | static int vmw_kms_new_framebuffer_dmabuf(struct vmw_private *dev_priv, |
1041 | struct vmw_dma_buffer *dmabuf, | |
1042 | struct vmw_framebuffer **out, | |
1043 | const struct drm_mode_fb_cmd | |
1044 | *mode_cmd) | |
fb1d9738 JB |
1045 | |
1046 | { | |
1047 | struct drm_device *dev = dev_priv->dev; | |
1048 | struct vmw_framebuffer_dmabuf *vfbd; | |
d3216a0c | 1049 | unsigned int requested_size; |
fb1d9738 JB |
1050 | int ret; |
1051 | ||
d3216a0c TH |
1052 | requested_size = mode_cmd->height * mode_cmd->pitch; |
1053 | if (unlikely(requested_size > dmabuf->base.num_pages * PAGE_SIZE)) { | |
1054 | DRM_ERROR("Screen buffer object size is too small " | |
1055 | "for requested mode.\n"); | |
1056 | return -EINVAL; | |
1057 | } | |
1058 | ||
c337ada7 JB |
1059 | /* Limited framebuffer color depth support for screen objects */ |
1060 | if (dev_priv->sou_priv) { | |
1061 | switch (mode_cmd->depth) { | |
1062 | case 32: | |
1063 | case 24: | |
1064 | /* Only support 32 bpp for 32 and 24 depth fbs */ | |
1065 | if (mode_cmd->bpp == 32) | |
1066 | break; | |
1067 | ||
1068 | DRM_ERROR("Invalid color depth/bbp: %d %d\n", | |
1069 | mode_cmd->depth, mode_cmd->bpp); | |
1070 | return -EINVAL; | |
1071 | case 16: | |
1072 | case 15: | |
1073 | /* Only support 16 bpp for 16 and 15 depth fbs */ | |
1074 | if (mode_cmd->bpp == 16) | |
1075 | break; | |
1076 | ||
1077 | DRM_ERROR("Invalid color depth/bbp: %d %d\n", | |
1078 | mode_cmd->depth, mode_cmd->bpp); | |
1079 | return -EINVAL; | |
1080 | default: | |
1081 | DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth); | |
1082 | return -EINVAL; | |
1083 | } | |
1084 | } | |
1085 | ||
fb1d9738 JB |
1086 | vfbd = kzalloc(sizeof(*vfbd), GFP_KERNEL); |
1087 | if (!vfbd) { | |
1088 | ret = -ENOMEM; | |
1089 | goto out_err1; | |
1090 | } | |
1091 | ||
fb1d9738 JB |
1092 | if (!vmw_dmabuf_reference(dmabuf)) { |
1093 | DRM_ERROR("failed to reference dmabuf %p\n", dmabuf); | |
80f0b5af DV |
1094 | ret = -EINVAL; |
1095 | goto out_err2; | |
fb1d9738 JB |
1096 | } |
1097 | ||
d3216a0c | 1098 | vfbd->base.base.bits_per_pixel = mode_cmd->bpp; |
01f2c773 | 1099 | vfbd->base.base.pitches[0] = mode_cmd->pitch; |
d3216a0c TH |
1100 | vfbd->base.base.depth = mode_cmd->depth; |
1101 | vfbd->base.base.width = mode_cmd->width; | |
1102 | vfbd->base.base.height = mode_cmd->height; | |
56d1c78d JB |
1103 | if (!dev_priv->sou_priv) { |
1104 | vfbd->base.pin = vmw_framebuffer_dmabuf_pin; | |
1105 | vfbd->base.unpin = vmw_framebuffer_dmabuf_unpin; | |
1106 | } | |
2fcd5a73 | 1107 | vfbd->base.dmabuf = true; |
fb1d9738 | 1108 | vfbd->buffer = dmabuf; |
90ff18bc | 1109 | vfbd->base.user_handle = mode_cmd->handle; |
fb1d9738 JB |
1110 | *out = &vfbd->base; |
1111 | ||
80f0b5af DV |
1112 | ret = drm_framebuffer_init(dev, &vfbd->base.base, |
1113 | &vmw_framebuffer_dmabuf_funcs); | |
1114 | if (ret) | |
1115 | goto out_err3; | |
1116 | ||
fb1d9738 JB |
1117 | return 0; |
1118 | ||
1119 | out_err3: | |
80f0b5af | 1120 | vmw_dmabuf_unreference(&dmabuf); |
fb1d9738 JB |
1121 | out_err2: |
1122 | kfree(vfbd); | |
1123 | out_err1: | |
1124 | return ret; | |
1125 | } | |
1126 | ||
1127 | /* | |
1128 | * Generic Kernel modesetting functions | |
1129 | */ | |
1130 | ||
1131 | static struct drm_framebuffer *vmw_kms_fb_create(struct drm_device *dev, | |
1132 | struct drm_file *file_priv, | |
308e5bcb | 1133 | struct drm_mode_fb_cmd2 *mode_cmd2) |
fb1d9738 JB |
1134 | { |
1135 | struct vmw_private *dev_priv = vmw_priv(dev); | |
1136 | struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile; | |
1137 | struct vmw_framebuffer *vfb = NULL; | |
1138 | struct vmw_surface *surface = NULL; | |
1139 | struct vmw_dma_buffer *bo = NULL; | |
90ff18bc | 1140 | struct ttm_base_object *user_obj; |
308e5bcb | 1141 | struct drm_mode_fb_cmd mode_cmd; |
fb1d9738 JB |
1142 | int ret; |
1143 | ||
308e5bcb JB |
1144 | mode_cmd.width = mode_cmd2->width; |
1145 | mode_cmd.height = mode_cmd2->height; | |
1146 | mode_cmd.pitch = mode_cmd2->pitches[0]; | |
1147 | mode_cmd.handle = mode_cmd2->handles[0]; | |
248dbc23 | 1148 | drm_fb_get_bpp_depth(mode_cmd2->pixel_format, &mode_cmd.depth, |
308e5bcb JB |
1149 | &mode_cmd.bpp); |
1150 | ||
d3216a0c TH |
1151 | /** |
1152 | * This code should be conditioned on Screen Objects not being used. | |
1153 | * If screen objects are used, we can allocate a GMR to hold the | |
1154 | * requested framebuffer. | |
1155 | */ | |
1156 | ||
8a783896 | 1157 | if (!vmw_kms_validate_mode_vram(dev_priv, |
1a464cbb LT |
1158 | mode_cmd.pitch, |
1159 | mode_cmd.height)) { | |
d3216a0c | 1160 | DRM_ERROR("VRAM size is too small for requested mode.\n"); |
d9826409 | 1161 | return ERR_PTR(-ENOMEM); |
d3216a0c TH |
1162 | } |
1163 | ||
90ff18bc TH |
1164 | /* |
1165 | * Take a reference on the user object of the resource | |
1166 | * backing the kms fb. This ensures that user-space handle | |
1167 | * lookups on that resource will always work as long as | |
1168 | * it's registered with a kms framebuffer. This is important, | |
1169 | * since vmw_execbuf_process identifies resources in the | |
1170 | * command stream using user-space handles. | |
1171 | */ | |
1172 | ||
308e5bcb | 1173 | user_obj = ttm_base_object_lookup(tfile, mode_cmd.handle); |
90ff18bc TH |
1174 | if (unlikely(user_obj == NULL)) { |
1175 | DRM_ERROR("Could not locate requested kms frame buffer.\n"); | |
1176 | return ERR_PTR(-ENOENT); | |
1177 | } | |
1178 | ||
d3216a0c TH |
1179 | /** |
1180 | * End conditioned code. | |
1181 | */ | |
1182 | ||
e7ac9211 JB |
1183 | /* returns either a dmabuf or surface */ |
1184 | ret = vmw_user_lookup_handle(dev_priv, tfile, | |
4cf73129 | 1185 | mode_cmd.handle, |
e7ac9211 | 1186 | &surface, &bo); |
fb1d9738 | 1187 | if (ret) |
e7ac9211 JB |
1188 | goto err_out; |
1189 | ||
1190 | /* Create the new framebuffer depending one what we got back */ | |
1191 | if (bo) | |
1192 | ret = vmw_kms_new_framebuffer_dmabuf(dev_priv, bo, &vfb, | |
4cf73129 | 1193 | &mode_cmd); |
e7ac9211 JB |
1194 | else if (surface) |
1195 | ret = vmw_kms_new_framebuffer_surface(dev_priv, file_priv, | |
4cf73129 | 1196 | surface, &vfb, &mode_cmd); |
e7ac9211 JB |
1197 | else |
1198 | BUG(); | |
1199 | ||
1200 | err_out: | |
1201 | /* vmw_user_lookup_handle takes one ref so does new_fb */ | |
1202 | if (bo) | |
1203 | vmw_dmabuf_unreference(&bo); | |
1204 | if (surface) | |
1205 | vmw_surface_unreference(&surface); | |
fb1d9738 JB |
1206 | |
1207 | if (ret) { | |
1208 | DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret); | |
90ff18bc | 1209 | ttm_base_object_unref(&user_obj); |
cce13ff7 | 1210 | return ERR_PTR(ret); |
90ff18bc TH |
1211 | } else |
1212 | vfb->user_obj = user_obj; | |
fb1d9738 JB |
1213 | |
1214 | return &vfb->base; | |
1215 | } | |
1216 | ||
e6ecefaa | 1217 | static const struct drm_mode_config_funcs vmw_kms_funcs = { |
fb1d9738 | 1218 | .fb_create = vmw_kms_fb_create, |
fb1d9738 JB |
1219 | }; |
1220 | ||
2fcd5a73 JB |
1221 | int vmw_kms_present(struct vmw_private *dev_priv, |
1222 | struct drm_file *file_priv, | |
1223 | struct vmw_framebuffer *vfb, | |
1224 | struct vmw_surface *surface, | |
1225 | uint32_t sid, | |
1226 | int32_t destX, int32_t destY, | |
1227 | struct drm_vmw_rect *clips, | |
1228 | uint32_t num_clips) | |
1229 | { | |
c6ca8391 | 1230 | struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS]; |
6abff3c7 | 1231 | struct drm_clip_rect *tmp; |
c6ca8391 | 1232 | struct drm_crtc *crtc; |
2fcd5a73 | 1233 | size_t fifo_size; |
c6ca8391 JB |
1234 | int i, k, num_units; |
1235 | int ret = 0; /* silence warning */ | |
203dc220 | 1236 | int left, right, top, bottom; |
2fcd5a73 JB |
1237 | |
1238 | struct { | |
1239 | SVGA3dCmdHeader header; | |
1240 | SVGA3dCmdBlitSurfaceToScreen body; | |
1241 | } *cmd; | |
1242 | SVGASignedRect *blits; | |
1243 | ||
c6ca8391 JB |
1244 | num_units = 0; |
1245 | list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) { | |
f4510a27 | 1246 | if (crtc->primary->fb != &vfb->base) |
c6ca8391 JB |
1247 | continue; |
1248 | units[num_units++] = vmw_crtc_to_du(crtc); | |
1249 | } | |
1250 | ||
2fcd5a73 JB |
1251 | BUG_ON(surface == NULL); |
1252 | BUG_ON(!clips || !num_clips); | |
1253 | ||
6abff3c7 JB |
1254 | tmp = kzalloc(sizeof(*tmp) * num_clips, GFP_KERNEL); |
1255 | if (unlikely(tmp == NULL)) { | |
1256 | DRM_ERROR("Temporary cliprect memory alloc failed.\n"); | |
1257 | return -ENOMEM; | |
1258 | } | |
1259 | ||
2fcd5a73 JB |
1260 | fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num_clips; |
1261 | cmd = kmalloc(fifo_size, GFP_KERNEL); | |
1262 | if (unlikely(cmd == NULL)) { | |
1263 | DRM_ERROR("Failed to allocate temporary fifo memory.\n"); | |
6abff3c7 JB |
1264 | ret = -ENOMEM; |
1265 | goto out_free_tmp; | |
2fcd5a73 JB |
1266 | } |
1267 | ||
203dc220 JB |
1268 | left = clips->x; |
1269 | right = clips->x + clips->w; | |
1270 | top = clips->y; | |
1271 | bottom = clips->y + clips->h; | |
1272 | ||
1273 | for (i = 1; i < num_clips; i++) { | |
1274 | left = min_t(int, left, (int)clips[i].x); | |
1275 | right = max_t(int, right, (int)clips[i].x + clips[i].w); | |
1276 | top = min_t(int, top, (int)clips[i].y); | |
1277 | bottom = max_t(int, bottom, (int)clips[i].y + clips[i].h); | |
1278 | } | |
1279 | ||
c6ca8391 | 1280 | /* only need to do this once */ |
2fcd5a73 | 1281 | memset(cmd, 0, fifo_size); |
2fcd5a73 | 1282 | cmd->header.id = cpu_to_le32(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN); |
6abff3c7 JB |
1283 | |
1284 | blits = (SVGASignedRect *)&cmd[1]; | |
2fcd5a73 | 1285 | |
203dc220 JB |
1286 | cmd->body.srcRect.left = left; |
1287 | cmd->body.srcRect.right = right; | |
1288 | cmd->body.srcRect.top = top; | |
1289 | cmd->body.srcRect.bottom = bottom; | |
2fcd5a73 | 1290 | |
2fcd5a73 | 1291 | for (i = 0; i < num_clips; i++) { |
6abff3c7 JB |
1292 | tmp[i].x1 = clips[i].x - left; |
1293 | tmp[i].x2 = clips[i].x + clips[i].w - left; | |
1294 | tmp[i].y1 = clips[i].y - top; | |
1295 | tmp[i].y2 = clips[i].y + clips[i].h - top; | |
2fcd5a73 JB |
1296 | } |
1297 | ||
c6ca8391 JB |
1298 | for (k = 0; k < num_units; k++) { |
1299 | struct vmw_display_unit *unit = units[k]; | |
6abff3c7 JB |
1300 | struct vmw_clip_rect clip; |
1301 | int num; | |
1302 | ||
1303 | clip.x1 = left + destX - unit->crtc.x; | |
1304 | clip.y1 = top + destY - unit->crtc.y; | |
1305 | clip.x2 = right + destX - unit->crtc.x; | |
1306 | clip.y2 = bottom + destY - unit->crtc.y; | |
c6ca8391 JB |
1307 | |
1308 | /* skip any crtcs that misses the clip region */ | |
6abff3c7 JB |
1309 | if (clip.x1 >= unit->crtc.mode.hdisplay || |
1310 | clip.y1 >= unit->crtc.mode.vdisplay || | |
1311 | clip.x2 <= 0 || clip.y2 <= 0) | |
c6ca8391 JB |
1312 | continue; |
1313 | ||
6abff3c7 JB |
1314 | /* |
1315 | * In order for the clip rects to be correctly scaled | |
1316 | * the src and dest rects needs to be the same size. | |
1317 | */ | |
1318 | cmd->body.destRect.left = clip.x1; | |
1319 | cmd->body.destRect.right = clip.x2; | |
1320 | cmd->body.destRect.top = clip.y1; | |
1321 | cmd->body.destRect.bottom = clip.y2; | |
1322 | ||
1323 | /* create a clip rect of the crtc in dest coords */ | |
1324 | clip.x2 = unit->crtc.mode.hdisplay - clip.x1; | |
1325 | clip.y2 = unit->crtc.mode.vdisplay - clip.y1; | |
1326 | clip.x1 = 0 - clip.x1; | |
1327 | clip.y1 = 0 - clip.y1; | |
1328 | ||
c6ca8391 JB |
1329 | /* need to reset sid as it is changed by execbuf */ |
1330 | cmd->body.srcImage.sid = sid; | |
c6ca8391 JB |
1331 | cmd->body.destScreenId = unit->unit; |
1332 | ||
6abff3c7 JB |
1333 | /* clip and write blits to cmd stream */ |
1334 | vmw_clip_cliprects(tmp, num_clips, clip, blits, &num); | |
c6ca8391 | 1335 | |
6abff3c7 JB |
1336 | /* if no cliprects hit skip this */ |
1337 | if (num == 0) | |
1338 | continue; | |
c6ca8391 | 1339 | |
6abff3c7 JB |
1340 | /* recalculate package length */ |
1341 | fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num; | |
1342 | cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header)); | |
c6ca8391 | 1343 | ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd, |
bb1bd2f4 | 1344 | fifo_size, 0, NULL, NULL); |
c6ca8391 JB |
1345 | |
1346 | if (unlikely(ret != 0)) | |
1347 | break; | |
1348 | } | |
2fcd5a73 JB |
1349 | |
1350 | kfree(cmd); | |
6abff3c7 JB |
1351 | out_free_tmp: |
1352 | kfree(tmp); | |
2fcd5a73 JB |
1353 | |
1354 | return ret; | |
1355 | } | |
1356 | ||
1357 | int vmw_kms_readback(struct vmw_private *dev_priv, | |
1358 | struct drm_file *file_priv, | |
1359 | struct vmw_framebuffer *vfb, | |
1360 | struct drm_vmw_fence_rep __user *user_fence_rep, | |
1361 | struct drm_vmw_rect *clips, | |
1362 | uint32_t num_clips) | |
1363 | { | |
1364 | struct vmw_framebuffer_dmabuf *vfbd = | |
1365 | vmw_framebuffer_to_vfbd(&vfb->base); | |
1366 | struct vmw_dma_buffer *dmabuf = vfbd->buffer; | |
1367 | struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS]; | |
1368 | struct drm_crtc *crtc; | |
1369 | size_t fifo_size; | |
1370 | int i, k, ret, num_units, blits_pos; | |
1371 | ||
1372 | struct { | |
1373 | uint32_t header; | |
1374 | SVGAFifoCmdDefineGMRFB body; | |
1375 | } *cmd; | |
1376 | struct { | |
1377 | uint32_t header; | |
1378 | SVGAFifoCmdBlitScreenToGMRFB body; | |
1379 | } *blits; | |
1380 | ||
1381 | num_units = 0; | |
1382 | list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) { | |
f4510a27 | 1383 | if (crtc->primary->fb != &vfb->base) |
2fcd5a73 JB |
1384 | continue; |
1385 | units[num_units++] = vmw_crtc_to_du(crtc); | |
1386 | } | |
1387 | ||
1388 | BUG_ON(dmabuf == NULL); | |
1389 | BUG_ON(!clips || !num_clips); | |
1390 | ||
1391 | /* take a safe guess at fifo size */ | |
1392 | fifo_size = sizeof(*cmd) + sizeof(*blits) * num_clips * num_units; | |
1393 | cmd = kmalloc(fifo_size, GFP_KERNEL); | |
1394 | if (unlikely(cmd == NULL)) { | |
1395 | DRM_ERROR("Failed to allocate temporary fifo memory.\n"); | |
1396 | return -ENOMEM; | |
1397 | } | |
1398 | ||
1399 | memset(cmd, 0, fifo_size); | |
1400 | cmd->header = SVGA_CMD_DEFINE_GMRFB; | |
1401 | cmd->body.format.bitsPerPixel = vfb->base.bits_per_pixel; | |
1402 | cmd->body.format.colorDepth = vfb->base.depth; | |
1403 | cmd->body.format.reserved = 0; | |
01f2c773 | 1404 | cmd->body.bytesPerLine = vfb->base.pitches[0]; |
90ff18bc | 1405 | cmd->body.ptr.gmrId = vfb->user_handle; |
2fcd5a73 JB |
1406 | cmd->body.ptr.offset = 0; |
1407 | ||
1408 | blits = (void *)&cmd[1]; | |
1409 | blits_pos = 0; | |
1410 | for (i = 0; i < num_units; i++) { | |
1411 | struct drm_vmw_rect *c = clips; | |
1412 | for (k = 0; k < num_clips; k++, c++) { | |
1413 | /* transform clip coords to crtc origin based coords */ | |
1414 | int clip_x1 = c->x - units[i]->crtc.x; | |
1415 | int clip_x2 = c->x - units[i]->crtc.x + c->w; | |
1416 | int clip_y1 = c->y - units[i]->crtc.y; | |
1417 | int clip_y2 = c->y - units[i]->crtc.y + c->h; | |
1418 | int dest_x = c->x; | |
1419 | int dest_y = c->y; | |
1420 | ||
1421 | /* compensate for clipping, we negate | |
1422 | * a negative number and add that. | |
1423 | */ | |
1424 | if (clip_x1 < 0) | |
1425 | dest_x += -clip_x1; | |
1426 | if (clip_y1 < 0) | |
1427 | dest_y += -clip_y1; | |
1428 | ||
1429 | /* clip */ | |
1430 | clip_x1 = max(clip_x1, 0); | |
1431 | clip_y1 = max(clip_y1, 0); | |
1432 | clip_x2 = min(clip_x2, units[i]->crtc.mode.hdisplay); | |
1433 | clip_y2 = min(clip_y2, units[i]->crtc.mode.vdisplay); | |
1434 | ||
1435 | /* and cull any rects that misses the crtc */ | |
1436 | if (clip_x1 >= units[i]->crtc.mode.hdisplay || | |
1437 | clip_y1 >= units[i]->crtc.mode.vdisplay || | |
1438 | clip_x2 <= 0 || clip_y2 <= 0) | |
1439 | continue; | |
1440 | ||
1441 | blits[blits_pos].header = SVGA_CMD_BLIT_SCREEN_TO_GMRFB; | |
1442 | blits[blits_pos].body.srcScreenId = units[i]->unit; | |
1443 | blits[blits_pos].body.destOrigin.x = dest_x; | |
1444 | blits[blits_pos].body.destOrigin.y = dest_y; | |
1445 | ||
1446 | blits[blits_pos].body.srcRect.left = clip_x1; | |
1447 | blits[blits_pos].body.srcRect.top = clip_y1; | |
1448 | blits[blits_pos].body.srcRect.right = clip_x2; | |
1449 | blits[blits_pos].body.srcRect.bottom = clip_y2; | |
1450 | blits_pos++; | |
1451 | } | |
1452 | } | |
1453 | /* reset size here and use calculated exact size from loops */ | |
1454 | fifo_size = sizeof(*cmd) + sizeof(*blits) * blits_pos; | |
1455 | ||
1456 | ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd, fifo_size, | |
bb1bd2f4 | 1457 | 0, user_fence_rep, NULL); |
2fcd5a73 JB |
1458 | |
1459 | kfree(cmd); | |
1460 | ||
1461 | return ret; | |
1462 | } | |
1463 | ||
fb1d9738 JB |
1464 | int vmw_kms_init(struct vmw_private *dev_priv) |
1465 | { | |
1466 | struct drm_device *dev = dev_priv->dev; | |
1467 | int ret; | |
1468 | ||
1469 | drm_mode_config_init(dev); | |
1470 | dev->mode_config.funcs = &vmw_kms_funcs; | |
3bef3572 JB |
1471 | dev->mode_config.min_width = 1; |
1472 | dev->mode_config.min_height = 1; | |
7e71f8a5 JB |
1473 | /* assumed largest fb size */ |
1474 | dev->mode_config.max_width = 8192; | |
1475 | dev->mode_config.max_height = 8192; | |
fb1d9738 | 1476 | |
56d1c78d JB |
1477 | ret = vmw_kms_init_screen_object_display(dev_priv); |
1478 | if (ret) /* Fallback */ | |
1479 | (void)vmw_kms_init_legacy_display_system(dev_priv); | |
fb1d9738 JB |
1480 | |
1481 | return 0; | |
1482 | } | |
1483 | ||
1484 | int vmw_kms_close(struct vmw_private *dev_priv) | |
1485 | { | |
1486 | /* | |
1487 | * Docs says we should take the lock before calling this function | |
1488 | * but since it destroys encoders and our destructor calls | |
1489 | * drm_encoder_cleanup which takes the lock we deadlock. | |
1490 | */ | |
1491 | drm_mode_config_cleanup(dev_priv->dev); | |
c0d18316 JB |
1492 | if (dev_priv->sou_priv) |
1493 | vmw_kms_close_screen_object_display(dev_priv); | |
1494 | else | |
1495 | vmw_kms_close_legacy_display_system(dev_priv); | |
fb1d9738 JB |
1496 | return 0; |
1497 | } | |
1498 | ||
1499 | int vmw_kms_cursor_bypass_ioctl(struct drm_device *dev, void *data, | |
1500 | struct drm_file *file_priv) | |
1501 | { | |
1502 | struct drm_vmw_cursor_bypass_arg *arg = data; | |
1503 | struct vmw_display_unit *du; | |
fb1d9738 JB |
1504 | struct drm_crtc *crtc; |
1505 | int ret = 0; | |
1506 | ||
1507 | ||
1508 | mutex_lock(&dev->mode_config.mutex); | |
1509 | if (arg->flags & DRM_VMW_CURSOR_BYPASS_ALL) { | |
1510 | ||
1511 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | |
1512 | du = vmw_crtc_to_du(crtc); | |
1513 | du->hotspot_x = arg->xhot; | |
1514 | du->hotspot_y = arg->yhot; | |
1515 | } | |
1516 | ||
1517 | mutex_unlock(&dev->mode_config.mutex); | |
1518 | return 0; | |
1519 | } | |
1520 | ||
a4cd5d68 RC |
1521 | crtc = drm_crtc_find(dev, arg->crtc_id); |
1522 | if (!crtc) { | |
4ae87ff0 | 1523 | ret = -ENOENT; |
fb1d9738 JB |
1524 | goto out; |
1525 | } | |
1526 | ||
fb1d9738 JB |
1527 | du = vmw_crtc_to_du(crtc); |
1528 | ||
1529 | du->hotspot_x = arg->xhot; | |
1530 | du->hotspot_y = arg->yhot; | |
1531 | ||
1532 | out: | |
1533 | mutex_unlock(&dev->mode_config.mutex); | |
1534 | ||
1535 | return ret; | |
1536 | } | |
1537 | ||
0bef23f9 | 1538 | int vmw_kms_write_svga(struct vmw_private *vmw_priv, |
d7e1958d | 1539 | unsigned width, unsigned height, unsigned pitch, |
6558429b | 1540 | unsigned bpp, unsigned depth) |
fb1d9738 | 1541 | { |
d7e1958d JB |
1542 | if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK) |
1543 | vmw_write(vmw_priv, SVGA_REG_PITCHLOCK, pitch); | |
1544 | else if (vmw_fifo_have_pitchlock(vmw_priv)) | |
1545 | iowrite32(pitch, vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK); | |
1546 | vmw_write(vmw_priv, SVGA_REG_WIDTH, width); | |
1547 | vmw_write(vmw_priv, SVGA_REG_HEIGHT, height); | |
6558429b | 1548 | vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, bpp); |
0bef23f9 MD |
1549 | |
1550 | if (vmw_read(vmw_priv, SVGA_REG_DEPTH) != depth) { | |
1551 | DRM_ERROR("Invalid depth %u for %u bpp, host expects %u\n", | |
1552 | depth, bpp, vmw_read(vmw_priv, SVGA_REG_DEPTH)); | |
1553 | return -EINVAL; | |
1554 | } | |
1555 | ||
1556 | return 0; | |
d7e1958d | 1557 | } |
fb1d9738 | 1558 | |
d7e1958d JB |
1559 | int vmw_kms_save_vga(struct vmw_private *vmw_priv) |
1560 | { | |
7c4f7780 TH |
1561 | struct vmw_vga_topology_state *save; |
1562 | uint32_t i; | |
1563 | ||
fb1d9738 JB |
1564 | vmw_priv->vga_width = vmw_read(vmw_priv, SVGA_REG_WIDTH); |
1565 | vmw_priv->vga_height = vmw_read(vmw_priv, SVGA_REG_HEIGHT); | |
7c4f7780 | 1566 | vmw_priv->vga_bpp = vmw_read(vmw_priv, SVGA_REG_BITS_PER_PIXEL); |
d7e1958d JB |
1567 | if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK) |
1568 | vmw_priv->vga_pitchlock = | |
7c4f7780 | 1569 | vmw_read(vmw_priv, SVGA_REG_PITCHLOCK); |
d7e1958d | 1570 | else if (vmw_fifo_have_pitchlock(vmw_priv)) |
7c4f7780 TH |
1571 | vmw_priv->vga_pitchlock = ioread32(vmw_priv->mmio_virt + |
1572 | SVGA_FIFO_PITCHLOCK); | |
1573 | ||
1574 | if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY)) | |
1575 | return 0; | |
fb1d9738 | 1576 | |
7c4f7780 TH |
1577 | vmw_priv->num_displays = vmw_read(vmw_priv, |
1578 | SVGA_REG_NUM_GUEST_DISPLAYS); | |
1579 | ||
029e50bf TH |
1580 | if (vmw_priv->num_displays == 0) |
1581 | vmw_priv->num_displays = 1; | |
1582 | ||
7c4f7780 TH |
1583 | for (i = 0; i < vmw_priv->num_displays; ++i) { |
1584 | save = &vmw_priv->vga_save[i]; | |
1585 | vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i); | |
1586 | save->primary = vmw_read(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY); | |
1587 | save->pos_x = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_X); | |
1588 | save->pos_y = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y); | |
1589 | save->width = vmw_read(vmw_priv, SVGA_REG_DISPLAY_WIDTH); | |
1590 | save->height = vmw_read(vmw_priv, SVGA_REG_DISPLAY_HEIGHT); | |
1591 | vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID); | |
30c78bb8 TH |
1592 | if (i == 0 && vmw_priv->num_displays == 1 && |
1593 | save->width == 0 && save->height == 0) { | |
1594 | ||
1595 | /* | |
1596 | * It should be fairly safe to assume that these | |
1597 | * values are uninitialized. | |
1598 | */ | |
1599 | ||
1600 | save->width = vmw_priv->vga_width - save->pos_x; | |
1601 | save->height = vmw_priv->vga_height - save->pos_y; | |
1602 | } | |
7c4f7780 | 1603 | } |
30c78bb8 | 1604 | |
fb1d9738 JB |
1605 | return 0; |
1606 | } | |
1607 | ||
1608 | int vmw_kms_restore_vga(struct vmw_private *vmw_priv) | |
1609 | { | |
7c4f7780 TH |
1610 | struct vmw_vga_topology_state *save; |
1611 | uint32_t i; | |
1612 | ||
fb1d9738 JB |
1613 | vmw_write(vmw_priv, SVGA_REG_WIDTH, vmw_priv->vga_width); |
1614 | vmw_write(vmw_priv, SVGA_REG_HEIGHT, vmw_priv->vga_height); | |
7c4f7780 | 1615 | vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, vmw_priv->vga_bpp); |
d7e1958d JB |
1616 | if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK) |
1617 | vmw_write(vmw_priv, SVGA_REG_PITCHLOCK, | |
1618 | vmw_priv->vga_pitchlock); | |
1619 | else if (vmw_fifo_have_pitchlock(vmw_priv)) | |
1620 | iowrite32(vmw_priv->vga_pitchlock, | |
1621 | vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK); | |
fb1d9738 | 1622 | |
7c4f7780 TH |
1623 | if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY)) |
1624 | return 0; | |
1625 | ||
1626 | for (i = 0; i < vmw_priv->num_displays; ++i) { | |
1627 | save = &vmw_priv->vga_save[i]; | |
1628 | vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i); | |
1629 | vmw_write(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY, save->primary); | |
1630 | vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_X, save->pos_x); | |
1631 | vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y, save->pos_y); | |
1632 | vmw_write(vmw_priv, SVGA_REG_DISPLAY_WIDTH, save->width); | |
1633 | vmw_write(vmw_priv, SVGA_REG_DISPLAY_HEIGHT, save->height); | |
1634 | vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID); | |
1635 | } | |
1636 | ||
fb1d9738 JB |
1637 | return 0; |
1638 | } | |
d8bd19d2 | 1639 | |
e133e737 TH |
1640 | bool vmw_kms_validate_mode_vram(struct vmw_private *dev_priv, |
1641 | uint32_t pitch, | |
1642 | uint32_t height) | |
1643 | { | |
bc2d6508 | 1644 | return ((u64) pitch * (u64) height) < (u64) dev_priv->prim_bb_mem; |
e133e737 TH |
1645 | } |
1646 | ||
1c482ab3 JB |
1647 | |
1648 | /** | |
1649 | * Function called by DRM code called with vbl_lock held. | |
1650 | */ | |
7a1c2f6c TH |
1651 | u32 vmw_get_vblank_counter(struct drm_device *dev, int crtc) |
1652 | { | |
1653 | return 0; | |
1654 | } | |
626ab771 | 1655 | |
1c482ab3 JB |
1656 | /** |
1657 | * Function called by DRM code called with vbl_lock held. | |
1658 | */ | |
1659 | int vmw_enable_vblank(struct drm_device *dev, int crtc) | |
1660 | { | |
1661 | return -ENOSYS; | |
1662 | } | |
1663 | ||
1664 | /** | |
1665 | * Function called by DRM code called with vbl_lock held. | |
1666 | */ | |
1667 | void vmw_disable_vblank(struct drm_device *dev, int crtc) | |
1668 | { | |
1669 | } | |
1670 | ||
626ab771 JB |
1671 | |
1672 | /* | |
1673 | * Small shared kms functions. | |
1674 | */ | |
1675 | ||
847c5964 | 1676 | static int vmw_du_update_layout(struct vmw_private *dev_priv, unsigned num, |
626ab771 JB |
1677 | struct drm_vmw_rect *rects) |
1678 | { | |
1679 | struct drm_device *dev = dev_priv->dev; | |
1680 | struct vmw_display_unit *du; | |
1681 | struct drm_connector *con; | |
626ab771 JB |
1682 | |
1683 | mutex_lock(&dev->mode_config.mutex); | |
1684 | ||
1685 | #if 0 | |
6ea77d13 TH |
1686 | { |
1687 | unsigned int i; | |
1688 | ||
1689 | DRM_INFO("%s: new layout ", __func__); | |
1690 | for (i = 0; i < num; i++) | |
1691 | DRM_INFO("(%i, %i %ux%u) ", rects[i].x, rects[i].y, | |
1692 | rects[i].w, rects[i].h); | |
1693 | DRM_INFO("\n"); | |
1694 | } | |
626ab771 JB |
1695 | #endif |
1696 | ||
1697 | list_for_each_entry(con, &dev->mode_config.connector_list, head) { | |
1698 | du = vmw_connector_to_du(con); | |
1699 | if (num > du->unit) { | |
1700 | du->pref_width = rects[du->unit].w; | |
1701 | du->pref_height = rects[du->unit].h; | |
1702 | du->pref_active = true; | |
cd2b89e7 TH |
1703 | du->gui_x = rects[du->unit].x; |
1704 | du->gui_y = rects[du->unit].y; | |
626ab771 JB |
1705 | } else { |
1706 | du->pref_width = 800; | |
1707 | du->pref_height = 600; | |
1708 | du->pref_active = false; | |
1709 | } | |
1710 | con->status = vmw_du_connector_detect(con, true); | |
1711 | } | |
1712 | ||
1713 | mutex_unlock(&dev->mode_config.mutex); | |
1714 | ||
1715 | return 0; | |
1716 | } | |
1717 | ||
b5ec427e JB |
1718 | int vmw_du_page_flip(struct drm_crtc *crtc, |
1719 | struct drm_framebuffer *fb, | |
ed8d1975 KP |
1720 | struct drm_pending_vblank_event *event, |
1721 | uint32_t page_flip_flags) | |
b5ec427e JB |
1722 | { |
1723 | struct vmw_private *dev_priv = vmw_priv(crtc->dev); | |
f4510a27 | 1724 | struct drm_framebuffer *old_fb = crtc->primary->fb; |
b5ec427e | 1725 | struct vmw_framebuffer *vfb = vmw_framebuffer_to_vfb(fb); |
f5869a83 | 1726 | struct drm_file *file_priv ; |
b5ec427e JB |
1727 | struct vmw_fence_obj *fence = NULL; |
1728 | struct drm_clip_rect clips; | |
1729 | int ret; | |
1730 | ||
f5869a83 AC |
1731 | if (event == NULL) |
1732 | return -EINVAL; | |
1733 | ||
b5ec427e JB |
1734 | /* require ScreenObject support for page flipping */ |
1735 | if (!dev_priv->sou_priv) | |
1736 | return -ENOSYS; | |
1737 | ||
f5869a83 | 1738 | file_priv = event->base.file_priv; |
b5ec427e JB |
1739 | if (!vmw_kms_screen_object_flippable(dev_priv, crtc)) |
1740 | return -EINVAL; | |
1741 | ||
f4510a27 | 1742 | crtc->primary->fb = fb; |
b5ec427e JB |
1743 | |
1744 | /* do a full screen dirty update */ | |
1745 | clips.x1 = clips.y1 = 0; | |
1746 | clips.x2 = fb->width; | |
1747 | clips.y2 = fb->height; | |
1748 | ||
1749 | if (vfb->dmabuf) | |
1750 | ret = do_dmabuf_dirty_sou(file_priv, dev_priv, vfb, | |
1751 | 0, 0, &clips, 1, 1, &fence); | |
1752 | else | |
1753 | ret = do_surface_dirty_sou(dev_priv, file_priv, vfb, | |
1754 | 0, 0, &clips, 1, 1, &fence); | |
1755 | ||
1756 | ||
1757 | if (ret != 0) | |
1758 | goto out_no_fence; | |
1759 | if (!fence) { | |
1760 | ret = -EINVAL; | |
1761 | goto out_no_fence; | |
1762 | } | |
1763 | ||
1764 | ret = vmw_event_fence_action_queue(file_priv, fence, | |
1765 | &event->base, | |
1766 | &event->event.tv_sec, | |
1767 | &event->event.tv_usec, | |
1768 | true); | |
1769 | ||
1770 | /* | |
1771 | * No need to hold on to this now. The only cleanup | |
1772 | * we need to do if we fail is unref the fence. | |
1773 | */ | |
1774 | vmw_fence_obj_unreference(&fence); | |
1775 | ||
1776 | if (vmw_crtc_to_du(crtc)->is_implicit) | |
1777 | vmw_kms_screen_object_update_implicit_fb(dev_priv, crtc); | |
1778 | ||
1779 | return ret; | |
1780 | ||
1781 | out_no_fence: | |
f4510a27 | 1782 | crtc->primary->fb = old_fb; |
b5ec427e JB |
1783 | return ret; |
1784 | } | |
1785 | ||
1786 | ||
626ab771 JB |
1787 | void vmw_du_crtc_save(struct drm_crtc *crtc) |
1788 | { | |
1789 | } | |
1790 | ||
1791 | void vmw_du_crtc_restore(struct drm_crtc *crtc) | |
1792 | { | |
1793 | } | |
1794 | ||
1795 | void vmw_du_crtc_gamma_set(struct drm_crtc *crtc, | |
1796 | u16 *r, u16 *g, u16 *b, | |
1797 | uint32_t start, uint32_t size) | |
1798 | { | |
1799 | struct vmw_private *dev_priv = vmw_priv(crtc->dev); | |
1800 | int i; | |
1801 | ||
1802 | for (i = 0; i < size; i++) { | |
1803 | DRM_DEBUG("%d r/g/b = 0x%04x / 0x%04x / 0x%04x\n", i, | |
1804 | r[i], g[i], b[i]); | |
1805 | vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 0, r[i] >> 8); | |
1806 | vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 1, g[i] >> 8); | |
1807 | vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 2, b[i] >> 8); | |
1808 | } | |
1809 | } | |
1810 | ||
1811 | void vmw_du_connector_dpms(struct drm_connector *connector, int mode) | |
1812 | { | |
1813 | } | |
1814 | ||
1815 | void vmw_du_connector_save(struct drm_connector *connector) | |
1816 | { | |
1817 | } | |
1818 | ||
1819 | void vmw_du_connector_restore(struct drm_connector *connector) | |
1820 | { | |
1821 | } | |
1822 | ||
1823 | enum drm_connector_status | |
1824 | vmw_du_connector_detect(struct drm_connector *connector, bool force) | |
1825 | { | |
1826 | uint32_t num_displays; | |
1827 | struct drm_device *dev = connector->dev; | |
1828 | struct vmw_private *dev_priv = vmw_priv(dev); | |
cd2b89e7 | 1829 | struct vmw_display_unit *du = vmw_connector_to_du(connector); |
626ab771 JB |
1830 | |
1831 | mutex_lock(&dev_priv->hw_mutex); | |
1832 | num_displays = vmw_read(dev_priv, SVGA_REG_NUM_DISPLAYS); | |
1833 | mutex_unlock(&dev_priv->hw_mutex); | |
1834 | ||
cd2b89e7 TH |
1835 | return ((vmw_connector_to_du(connector)->unit < num_displays && |
1836 | du->pref_active) ? | |
626ab771 JB |
1837 | connector_status_connected : connector_status_disconnected); |
1838 | } | |
1839 | ||
1840 | static struct drm_display_mode vmw_kms_connector_builtin[] = { | |
1841 | /* 640x480@60Hz */ | |
1842 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656, | |
1843 | 752, 800, 0, 480, 489, 492, 525, 0, | |
1844 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, | |
1845 | /* 800x600@60Hz */ | |
1846 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840, | |
1847 | 968, 1056, 0, 600, 601, 605, 628, 0, | |
1848 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, | |
1849 | /* 1024x768@60Hz */ | |
1850 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048, | |
1851 | 1184, 1344, 0, 768, 771, 777, 806, 0, | |
1852 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, | |
1853 | /* 1152x864@75Hz */ | |
1854 | { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216, | |
1855 | 1344, 1600, 0, 864, 865, 868, 900, 0, | |
1856 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, | |
1857 | /* 1280x768@60Hz */ | |
1858 | { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344, | |
1859 | 1472, 1664, 0, 768, 771, 778, 798, 0, | |
1860 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, | |
1861 | /* 1280x800@60Hz */ | |
1862 | { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352, | |
1863 | 1480, 1680, 0, 800, 803, 809, 831, 0, | |
1864 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, | |
1865 | /* 1280x960@60Hz */ | |
1866 | { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376, | |
1867 | 1488, 1800, 0, 960, 961, 964, 1000, 0, | |
1868 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, | |
1869 | /* 1280x1024@60Hz */ | |
1870 | { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328, | |
1871 | 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, | |
1872 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, | |
1873 | /* 1360x768@60Hz */ | |
1874 | { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424, | |
1875 | 1536, 1792, 0, 768, 771, 777, 795, 0, | |
1876 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, | |
1877 | /* 1440x1050@60Hz */ | |
1878 | { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488, | |
1879 | 1632, 1864, 0, 1050, 1053, 1057, 1089, 0, | |
1880 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, | |
1881 | /* 1440x900@60Hz */ | |
1882 | { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520, | |
1883 | 1672, 1904, 0, 900, 903, 909, 934, 0, | |
1884 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, | |
1885 | /* 1600x1200@60Hz */ | |
1886 | { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664, | |
1887 | 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, | |
1888 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, | |
1889 | /* 1680x1050@60Hz */ | |
1890 | { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784, | |
1891 | 1960, 2240, 0, 1050, 1053, 1059, 1089, 0, | |
1892 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, | |
1893 | /* 1792x1344@60Hz */ | |
1894 | { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920, | |
1895 | 2120, 2448, 0, 1344, 1345, 1348, 1394, 0, | |
1896 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, | |
1897 | /* 1853x1392@60Hz */ | |
1898 | { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952, | |
1899 | 2176, 2528, 0, 1392, 1393, 1396, 1439, 0, | |
1900 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, | |
1901 | /* 1920x1200@60Hz */ | |
1902 | { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056, | |
1903 | 2256, 2592, 0, 1200, 1203, 1209, 1245, 0, | |
1904 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, | |
1905 | /* 1920x1440@60Hz */ | |
1906 | { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048, | |
1907 | 2256, 2600, 0, 1440, 1441, 1444, 1500, 0, | |
1908 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, | |
1909 | /* 2560x1600@60Hz */ | |
1910 | { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752, | |
1911 | 3032, 3504, 0, 1600, 1603, 1609, 1658, 0, | |
1912 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, | |
1913 | /* Terminate */ | |
1914 | { DRM_MODE("", 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) }, | |
1915 | }; | |
1916 | ||
1543b4dd TH |
1917 | /** |
1918 | * vmw_guess_mode_timing - Provide fake timings for a | |
1919 | * 60Hz vrefresh mode. | |
1920 | * | |
1921 | * @mode - Pointer to a struct drm_display_mode with hdisplay and vdisplay | |
1922 | * members filled in. | |
1923 | */ | |
1924 | static void vmw_guess_mode_timing(struct drm_display_mode *mode) | |
1925 | { | |
1926 | mode->hsync_start = mode->hdisplay + 50; | |
1927 | mode->hsync_end = mode->hsync_start + 50; | |
1928 | mode->htotal = mode->hsync_end + 50; | |
1929 | ||
1930 | mode->vsync_start = mode->vdisplay + 50; | |
1931 | mode->vsync_end = mode->vsync_start + 50; | |
1932 | mode->vtotal = mode->vsync_end + 50; | |
1933 | ||
1934 | mode->clock = (u32)mode->htotal * (u32)mode->vtotal / 100 * 6; | |
1935 | mode->vrefresh = drm_mode_vrefresh(mode); | |
1936 | } | |
1937 | ||
1938 | ||
626ab771 JB |
1939 | int vmw_du_connector_fill_modes(struct drm_connector *connector, |
1940 | uint32_t max_width, uint32_t max_height) | |
1941 | { | |
1942 | struct vmw_display_unit *du = vmw_connector_to_du(connector); | |
1943 | struct drm_device *dev = connector->dev; | |
1944 | struct vmw_private *dev_priv = vmw_priv(dev); | |
1945 | struct drm_display_mode *mode = NULL; | |
1946 | struct drm_display_mode *bmode; | |
1947 | struct drm_display_mode prefmode = { DRM_MODE("preferred", | |
1948 | DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, | |
1949 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, | |
1950 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) | |
1951 | }; | |
1952 | int i; | |
1953 | ||
1954 | /* Add preferred mode */ | |
1955 | { | |
1956 | mode = drm_mode_duplicate(dev, &prefmode); | |
1957 | if (!mode) | |
1958 | return 0; | |
1959 | mode->hdisplay = du->pref_width; | |
1960 | mode->vdisplay = du->pref_height; | |
1543b4dd | 1961 | vmw_guess_mode_timing(mode); |
55bde5b2 | 1962 | |
626ab771 JB |
1963 | if (vmw_kms_validate_mode_vram(dev_priv, mode->hdisplay * 2, |
1964 | mode->vdisplay)) { | |
1965 | drm_mode_probed_add(connector, mode); | |
55bde5b2 JB |
1966 | } else { |
1967 | drm_mode_destroy(dev, mode); | |
1968 | mode = NULL; | |
1969 | } | |
626ab771 | 1970 | |
55bde5b2 JB |
1971 | if (du->pref_mode) { |
1972 | list_del_init(&du->pref_mode->head); | |
1973 | drm_mode_destroy(dev, du->pref_mode); | |
626ab771 | 1974 | } |
55bde5b2 JB |
1975 | |
1976 | /* mode might be null here, this is intended */ | |
1977 | du->pref_mode = mode; | |
626ab771 JB |
1978 | } |
1979 | ||
1980 | for (i = 0; vmw_kms_connector_builtin[i].type != 0; i++) { | |
1981 | bmode = &vmw_kms_connector_builtin[i]; | |
1982 | if (bmode->hdisplay > max_width || | |
1983 | bmode->vdisplay > max_height) | |
1984 | continue; | |
1985 | ||
1986 | if (!vmw_kms_validate_mode_vram(dev_priv, bmode->hdisplay * 2, | |
1987 | bmode->vdisplay)) | |
1988 | continue; | |
1989 | ||
1990 | mode = drm_mode_duplicate(dev, bmode); | |
1991 | if (!mode) | |
1992 | return 0; | |
1993 | mode->vrefresh = drm_mode_vrefresh(mode); | |
1994 | ||
1995 | drm_mode_probed_add(connector, mode); | |
1996 | } | |
1997 | ||
d41025c0 JB |
1998 | /* Move the prefered mode first, help apps pick the right mode. */ |
1999 | if (du->pref_mode) | |
2000 | list_move(&du->pref_mode->head, &connector->probed_modes); | |
2001 | ||
b87577b7 | 2002 | drm_mode_connector_list_update(connector, true); |
626ab771 JB |
2003 | |
2004 | return 1; | |
2005 | } | |
2006 | ||
2007 | int vmw_du_connector_set_property(struct drm_connector *connector, | |
2008 | struct drm_property *property, | |
2009 | uint64_t val) | |
2010 | { | |
2011 | return 0; | |
2012 | } | |
cd2b89e7 TH |
2013 | |
2014 | ||
2015 | int vmw_kms_update_layout_ioctl(struct drm_device *dev, void *data, | |
2016 | struct drm_file *file_priv) | |
2017 | { | |
2018 | struct vmw_private *dev_priv = vmw_priv(dev); | |
2019 | struct drm_vmw_update_layout_arg *arg = | |
2020 | (struct drm_vmw_update_layout_arg *)data; | |
cd2b89e7 TH |
2021 | void __user *user_rects; |
2022 | struct drm_vmw_rect *rects; | |
2023 | unsigned rects_size; | |
2024 | int ret; | |
2025 | int i; | |
2026 | struct drm_mode_config *mode_config = &dev->mode_config; | |
2027 | ||
294adf7d | 2028 | ret = ttm_read_lock(&dev_priv->reservation_sem, true); |
cd2b89e7 TH |
2029 | if (unlikely(ret != 0)) |
2030 | return ret; | |
2031 | ||
2032 | if (!arg->num_outputs) { | |
2033 | struct drm_vmw_rect def_rect = {0, 0, 800, 600}; | |
2034 | vmw_du_update_layout(dev_priv, 1, &def_rect); | |
2035 | goto out_unlock; | |
2036 | } | |
2037 | ||
2038 | rects_size = arg->num_outputs * sizeof(struct drm_vmw_rect); | |
bab9efc2 XW |
2039 | rects = kcalloc(arg->num_outputs, sizeof(struct drm_vmw_rect), |
2040 | GFP_KERNEL); | |
cd2b89e7 TH |
2041 | if (unlikely(!rects)) { |
2042 | ret = -ENOMEM; | |
2043 | goto out_unlock; | |
2044 | } | |
2045 | ||
2046 | user_rects = (void __user *)(unsigned long)arg->rects; | |
2047 | ret = copy_from_user(rects, user_rects, rects_size); | |
2048 | if (unlikely(ret != 0)) { | |
2049 | DRM_ERROR("Failed to get rects.\n"); | |
2050 | ret = -EFAULT; | |
2051 | goto out_free; | |
2052 | } | |
2053 | ||
2054 | for (i = 0; i < arg->num_outputs; ++i) { | |
bab9efc2 XW |
2055 | if (rects[i].x < 0 || |
2056 | rects[i].y < 0 || | |
2057 | rects[i].x + rects[i].w > mode_config->max_width || | |
2058 | rects[i].y + rects[i].h > mode_config->max_height) { | |
cd2b89e7 TH |
2059 | DRM_ERROR("Invalid GUI layout.\n"); |
2060 | ret = -EINVAL; | |
2061 | goto out_free; | |
2062 | } | |
2063 | } | |
2064 | ||
2065 | vmw_du_update_layout(dev_priv, arg->num_outputs, rects); | |
2066 | ||
2067 | out_free: | |
2068 | kfree(rects); | |
2069 | out_unlock: | |
294adf7d | 2070 | ttm_read_unlock(&dev_priv->reservation_sem); |
cd2b89e7 TH |
2071 | return ret; |
2072 | } |