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56d1c78d JB |
1 | /************************************************************************** |
2 | * | |
54fbde8a | 3 | * Copyright © 2011-2015 VMware, Inc., Palo Alto, CA., USA |
56d1c78d JB |
4 | * All Rights Reserved. |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a | |
7 | * copy of this software and associated documentation files (the | |
8 | * "Software"), to deal in the Software without restriction, including | |
9 | * without limitation the rights to use, copy, modify, merge, publish, | |
10 | * distribute, sub license, and/or sell copies of the Software, and to | |
11 | * permit persons to whom the Software is furnished to do so, subject to | |
12 | * the following conditions: | |
13 | * | |
14 | * The above copyright notice and this permission notice (including the | |
15 | * next paragraph) shall be included in all copies or substantial portions | |
16 | * of the Software. | |
17 | * | |
18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
19 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
20 | * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL | |
21 | * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, | |
22 | * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR | |
23 | * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE | |
24 | * USE OR OTHER DEALINGS IN THE SOFTWARE. | |
25 | * | |
26 | **************************************************************************/ | |
27 | ||
28 | #include "vmwgfx_kms.h" | |
3cb9ae4f | 29 | #include <drm/drm_plane_helper.h> |
56d1c78d JB |
30 | |
31 | ||
32 | #define vmw_crtc_to_sou(x) \ | |
33 | container_of(x, struct vmw_screen_object_unit, base.crtc) | |
34 | #define vmw_encoder_to_sou(x) \ | |
35 | container_of(x, struct vmw_screen_object_unit, base.encoder) | |
36 | #define vmw_connector_to_sou(x) \ | |
37 | container_of(x, struct vmw_screen_object_unit, base.connector) | |
38 | ||
10b1e0ca TH |
39 | /** |
40 | * struct vmw_kms_sou_surface_dirty - Closure structure for | |
41 | * blit surface to screen command. | |
42 | * @base: The base type we derive from. Used by vmw_kms_helper_dirty(). | |
43 | * @left: Left side of bounding box. | |
44 | * @right: Right side of bounding box. | |
45 | * @top: Top side of bounding box. | |
46 | * @bottom: Bottom side of bounding box. | |
47 | * @dst_x: Difference between source clip rects and framebuffer coordinates. | |
48 | * @dst_y: Difference between source clip rects and framebuffer coordinates. | |
49 | * @sid: Surface id of surface to copy from. | |
50 | */ | |
51 | struct vmw_kms_sou_surface_dirty { | |
52 | struct vmw_kms_dirty base; | |
53 | s32 left, right, top, bottom; | |
54 | s32 dst_x, dst_y; | |
55 | u32 sid; | |
56 | }; | |
57 | ||
58 | /* | |
59 | * SVGA commands that are used by this code. Please see the device headers | |
60 | * for explanation. | |
61 | */ | |
62 | struct vmw_kms_sou_readback_blit { | |
63 | uint32 header; | |
64 | SVGAFifoCmdBlitScreenToGMRFB body; | |
65 | }; | |
66 | ||
67 | struct vmw_kms_sou_dmabuf_blit { | |
68 | uint32 header; | |
69 | SVGAFifoCmdBlitGMRFBToScreen body; | |
70 | }; | |
71 | ||
72 | struct vmw_kms_sou_dirty_cmd { | |
73 | SVGA3dCmdHeader header; | |
74 | SVGA3dCmdBlitSurfaceToScreen body; | |
75 | }; | |
76 | ||
56d1c78d JB |
77 | /** |
78 | * Display unit using screen objects. | |
79 | */ | |
80 | struct vmw_screen_object_unit { | |
81 | struct vmw_display_unit base; | |
82 | ||
83 | unsigned long buffer_size; /**< Size of allocated buffer */ | |
84 | struct vmw_dma_buffer *buffer; /**< Backing store buffer */ | |
85 | ||
86 | bool defined; | |
56d1c78d JB |
87 | }; |
88 | ||
89 | static void vmw_sou_destroy(struct vmw_screen_object_unit *sou) | |
90 | { | |
c8261a96 | 91 | vmw_du_cleanup(&sou->base); |
56d1c78d JB |
92 | kfree(sou); |
93 | } | |
94 | ||
95 | ||
96 | /* | |
97 | * Screen Object Display Unit CRTC functions | |
98 | */ | |
99 | ||
100 | static void vmw_sou_crtc_destroy(struct drm_crtc *crtc) | |
101 | { | |
102 | vmw_sou_destroy(vmw_crtc_to_sou(crtc)); | |
103 | } | |
104 | ||
56d1c78d JB |
105 | /** |
106 | * Send the fifo command to create a screen. | |
107 | */ | |
108 | static int vmw_sou_fifo_create(struct vmw_private *dev_priv, | |
109 | struct vmw_screen_object_unit *sou, | |
110 | uint32_t x, uint32_t y, | |
111 | struct drm_display_mode *mode) | |
112 | { | |
113 | size_t fifo_size; | |
114 | ||
115 | struct { | |
116 | struct { | |
117 | uint32_t cmdType; | |
118 | } header; | |
119 | SVGAScreenObject obj; | |
120 | } *cmd; | |
121 | ||
122 | BUG_ON(!sou->buffer); | |
123 | ||
124 | fifo_size = sizeof(*cmd); | |
125 | cmd = vmw_fifo_reserve(dev_priv, fifo_size); | |
126 | /* The hardware has hung, nothing we can do about it here. */ | |
127 | if (unlikely(cmd == NULL)) { | |
128 | DRM_ERROR("Fifo reserve failed.\n"); | |
129 | return -ENOMEM; | |
130 | } | |
131 | ||
132 | memset(cmd, 0, fifo_size); | |
133 | cmd->header.cmdType = SVGA_CMD_DEFINE_SCREEN; | |
134 | cmd->obj.structSize = sizeof(SVGAScreenObject); | |
135 | cmd->obj.id = sou->base.unit; | |
136 | cmd->obj.flags = SVGA_SCREEN_HAS_ROOT | | |
137 | (sou->base.unit == 0 ? SVGA_SCREEN_IS_PRIMARY : 0); | |
138 | cmd->obj.size.width = mode->hdisplay; | |
139 | cmd->obj.size.height = mode->vdisplay; | |
6987427a TH |
140 | if (sou->base.is_implicit) { |
141 | cmd->obj.root.x = x; | |
142 | cmd->obj.root.y = y; | |
143 | } else { | |
144 | cmd->obj.root.x = sou->base.gui_x; | |
145 | cmd->obj.root.y = sou->base.gui_y; | |
146 | } | |
56d1c78d JB |
147 | |
148 | /* Ok to assume that buffer is pinned in vram */ | |
b37a6b9a | 149 | vmw_bo_get_guest_ptr(&sou->buffer->base, &cmd->obj.backingStore.ptr); |
56d1c78d JB |
150 | cmd->obj.backingStore.pitch = mode->hdisplay * 4; |
151 | ||
152 | vmw_fifo_commit(dev_priv, fifo_size); | |
153 | ||
154 | sou->defined = true; | |
155 | ||
156 | return 0; | |
157 | } | |
158 | ||
159 | /** | |
160 | * Send the fifo command to destroy a screen. | |
161 | */ | |
162 | static int vmw_sou_fifo_destroy(struct vmw_private *dev_priv, | |
163 | struct vmw_screen_object_unit *sou) | |
164 | { | |
165 | size_t fifo_size; | |
166 | int ret; | |
167 | ||
168 | struct { | |
169 | struct { | |
170 | uint32_t cmdType; | |
171 | } header; | |
172 | SVGAFifoCmdDestroyScreen body; | |
173 | } *cmd; | |
174 | ||
175 | /* no need to do anything */ | |
176 | if (unlikely(!sou->defined)) | |
177 | return 0; | |
178 | ||
179 | fifo_size = sizeof(*cmd); | |
180 | cmd = vmw_fifo_reserve(dev_priv, fifo_size); | |
181 | /* the hardware has hung, nothing we can do about it here */ | |
182 | if (unlikely(cmd == NULL)) { | |
183 | DRM_ERROR("Fifo reserve failed.\n"); | |
184 | return -ENOMEM; | |
185 | } | |
186 | ||
187 | memset(cmd, 0, fifo_size); | |
188 | cmd->header.cmdType = SVGA_CMD_DESTROY_SCREEN; | |
189 | cmd->body.screenId = sou->base.unit; | |
190 | ||
191 | vmw_fifo_commit(dev_priv, fifo_size); | |
192 | ||
193 | /* Force sync */ | |
194 | ret = vmw_fallback_wait(dev_priv, false, true, 0, false, 3*HZ); | |
195 | if (unlikely(ret != 0)) | |
196 | DRM_ERROR("Failed to sync with HW"); | |
197 | else | |
198 | sou->defined = false; | |
199 | ||
200 | return ret; | |
201 | } | |
202 | ||
203 | /** | |
204 | * Free the backing store. | |
205 | */ | |
206 | static void vmw_sou_backing_free(struct vmw_private *dev_priv, | |
207 | struct vmw_screen_object_unit *sou) | |
208 | { | |
10b1e0ca | 209 | vmw_dmabuf_unreference(&sou->buffer); |
56d1c78d JB |
210 | sou->buffer_size = 0; |
211 | } | |
212 | ||
213 | /** | |
214 | * Allocate the backing store for the buffer. | |
215 | */ | |
216 | static int vmw_sou_backing_alloc(struct vmw_private *dev_priv, | |
217 | struct vmw_screen_object_unit *sou, | |
218 | unsigned long size) | |
219 | { | |
220 | int ret; | |
221 | ||
222 | if (sou->buffer_size == size) | |
223 | return 0; | |
224 | ||
225 | if (sou->buffer) | |
226 | vmw_sou_backing_free(dev_priv, sou); | |
227 | ||
228 | sou->buffer = kzalloc(sizeof(*sou->buffer), GFP_KERNEL); | |
229 | if (unlikely(sou->buffer == NULL)) | |
230 | return -ENOMEM; | |
231 | ||
232 | /* After we have alloced the backing store might not be able to | |
233 | * resume the overlays, this is preferred to failing to alloc. | |
234 | */ | |
235 | vmw_overlay_pause_all(dev_priv); | |
236 | ret = vmw_dmabuf_init(dev_priv, sou->buffer, size, | |
237 | &vmw_vram_ne_placement, | |
238 | false, &vmw_dmabuf_bo_free); | |
239 | vmw_overlay_resume_all(dev_priv); | |
240 | ||
241 | if (unlikely(ret != 0)) | |
242 | sou->buffer = NULL; /* vmw_dmabuf_init frees on error */ | |
243 | else | |
244 | sou->buffer_size = size; | |
245 | ||
246 | return ret; | |
247 | } | |
248 | ||
249 | static int vmw_sou_crtc_set_config(struct drm_mode_set *set) | |
250 | { | |
251 | struct vmw_private *dev_priv; | |
252 | struct vmw_screen_object_unit *sou; | |
253 | struct drm_connector *connector; | |
254 | struct drm_display_mode *mode; | |
255 | struct drm_encoder *encoder; | |
256 | struct vmw_framebuffer *vfb; | |
257 | struct drm_framebuffer *fb; | |
258 | struct drm_crtc *crtc; | |
259 | int ret = 0; | |
260 | ||
261 | if (!set) | |
262 | return -EINVAL; | |
263 | ||
264 | if (!set->crtc) | |
265 | return -EINVAL; | |
266 | ||
267 | /* get the sou */ | |
268 | crtc = set->crtc; | |
269 | sou = vmw_crtc_to_sou(crtc); | |
270 | vfb = set->fb ? vmw_framebuffer_to_vfb(set->fb) : NULL; | |
271 | dev_priv = vmw_priv(crtc->dev); | |
272 | ||
273 | if (set->num_connectors > 1) { | |
c8261a96 | 274 | DRM_ERROR("Too many connectors\n"); |
56d1c78d JB |
275 | return -EINVAL; |
276 | } | |
277 | ||
278 | if (set->num_connectors == 1 && | |
279 | set->connectors[0] != &sou->base.connector) { | |
c8261a96 | 280 | DRM_ERROR("Connector doesn't match %p %p\n", |
56d1c78d JB |
281 | set->connectors[0], &sou->base.connector); |
282 | return -EINVAL; | |
283 | } | |
284 | ||
75c06855 | 285 | /* Only one active implicit frame-buffer at a time. */ |
6987427a | 286 | if (sou->base.is_implicit && |
75c06855 TH |
287 | dev_priv->implicit_fb && vfb && |
288 | !(dev_priv->num_implicit == 1 && | |
289 | sou->base.active_implicit) && | |
290 | dev_priv->implicit_fb != vfb) { | |
291 | DRM_ERROR("Multiple implicit framebuffers not supported.\n"); | |
56d1c78d JB |
292 | return -EINVAL; |
293 | } | |
294 | ||
295 | /* since they always map one to one these are safe */ | |
296 | connector = &sou->base.connector; | |
297 | encoder = &sou->base.encoder; | |
298 | ||
299 | /* should we turn the crtc off */ | |
300 | if (set->num_connectors == 0 || !set->mode || !set->fb) { | |
301 | ret = vmw_sou_fifo_destroy(dev_priv, sou); | |
302 | /* the hardware has hung don't do anything more */ | |
303 | if (unlikely(ret != 0)) | |
304 | return ret; | |
305 | ||
306 | connector->encoder = NULL; | |
307 | encoder->crtc = NULL; | |
f4510a27 | 308 | crtc->primary->fb = NULL; |
56d1c78d JB |
309 | crtc->x = 0; |
310 | crtc->y = 0; | |
c6c1f325 | 311 | crtc->enabled = false; |
56d1c78d | 312 | |
75c06855 | 313 | vmw_kms_del_active(dev_priv, &sou->base); |
56d1c78d JB |
314 | |
315 | vmw_sou_backing_free(dev_priv, sou); | |
316 | ||
317 | return 0; | |
318 | } | |
319 | ||
320 | ||
321 | /* we now know we want to set a mode */ | |
322 | mode = set->mode; | |
323 | fb = set->fb; | |
324 | ||
325 | if (set->x + mode->hdisplay > fb->width || | |
326 | set->y + mode->vdisplay > fb->height) { | |
327 | DRM_ERROR("set outside of framebuffer\n"); | |
328 | return -EINVAL; | |
329 | } | |
330 | ||
153b3d5b | 331 | vmw_svga_enable(dev_priv); |
56d1c78d JB |
332 | |
333 | if (mode->hdisplay != crtc->mode.hdisplay || | |
334 | mode->vdisplay != crtc->mode.vdisplay) { | |
335 | /* no need to check if depth is different, because backing | |
336 | * store depth is forced to 4 by the device. | |
337 | */ | |
338 | ||
339 | ret = vmw_sou_fifo_destroy(dev_priv, sou); | |
340 | /* the hardware has hung don't do anything more */ | |
341 | if (unlikely(ret != 0)) | |
342 | return ret; | |
343 | ||
344 | vmw_sou_backing_free(dev_priv, sou); | |
345 | } | |
346 | ||
347 | if (!sou->buffer) { | |
348 | /* forced to depth 4 by the device */ | |
349 | size_t size = mode->hdisplay * mode->vdisplay * 4; | |
350 | ret = vmw_sou_backing_alloc(dev_priv, sou, size); | |
351 | if (unlikely(ret != 0)) | |
352 | return ret; | |
353 | } | |
354 | ||
355 | ret = vmw_sou_fifo_create(dev_priv, sou, set->x, set->y, mode); | |
356 | if (unlikely(ret != 0)) { | |
357 | /* | |
358 | * We are in a bit of a situation here, the hardware has | |
359 | * hung and we may or may not have a buffer hanging of | |
360 | * the screen object, best thing to do is not do anything | |
361 | * if we where defined, if not just turn the crtc of. | |
362 | * Not what userspace wants but it needs to htfu. | |
363 | */ | |
364 | if (sou->defined) | |
365 | return ret; | |
366 | ||
367 | connector->encoder = NULL; | |
368 | encoder->crtc = NULL; | |
f4510a27 | 369 | crtc->primary->fb = NULL; |
56d1c78d JB |
370 | crtc->x = 0; |
371 | crtc->y = 0; | |
c6c1f325 | 372 | crtc->enabled = false; |
56d1c78d JB |
373 | |
374 | return ret; | |
375 | } | |
376 | ||
75c06855 | 377 | vmw_kms_add_active(dev_priv, &sou->base, vfb); |
56d1c78d JB |
378 | |
379 | connector->encoder = encoder; | |
380 | encoder->crtc = crtc; | |
381 | crtc->mode = *mode; | |
f4510a27 | 382 | crtc->primary->fb = fb; |
56d1c78d JB |
383 | crtc->x = set->x; |
384 | crtc->y = set->y; | |
c6c1f325 | 385 | crtc->enabled = true; |
56d1c78d JB |
386 | |
387 | return 0; | |
388 | } | |
389 | ||
c8261a96 SY |
390 | static int vmw_sou_crtc_page_flip(struct drm_crtc *crtc, |
391 | struct drm_framebuffer *fb, | |
392 | struct drm_pending_vblank_event *event, | |
393 | uint32_t flags) | |
394 | { | |
395 | struct vmw_private *dev_priv = vmw_priv(crtc->dev); | |
396 | struct drm_framebuffer *old_fb = crtc->primary->fb; | |
397 | struct vmw_framebuffer *vfb = vmw_framebuffer_to_vfb(fb); | |
c8261a96 | 398 | struct vmw_fence_obj *fence = NULL; |
897b8180 | 399 | struct drm_vmw_rect vclips; |
c8261a96 SY |
400 | int ret; |
401 | ||
75c06855 | 402 | if (!vmw_kms_crtc_flippable(dev_priv, crtc)) |
c8261a96 SY |
403 | return -EINVAL; |
404 | ||
405 | crtc->primary->fb = fb; | |
406 | ||
407 | /* do a full screen dirty update */ | |
897b8180 TH |
408 | vclips.x = crtc->x; |
409 | vclips.y = crtc->y; | |
410 | vclips.w = crtc->mode.hdisplay; | |
411 | vclips.h = crtc->mode.vdisplay; | |
c8261a96 SY |
412 | |
413 | if (vfb->dmabuf) | |
10b1e0ca | 414 | ret = vmw_kms_sou_do_dmabuf_dirty(dev_priv, vfb, |
897b8180 | 415 | NULL, &vclips, 1, 1, |
10b1e0ca | 416 | true, &fence); |
c8261a96 | 417 | else |
10b1e0ca | 418 | ret = vmw_kms_sou_do_surface_dirty(dev_priv, vfb, |
897b8180 | 419 | NULL, &vclips, NULL, |
10b1e0ca | 420 | 0, 0, 1, 1, &fence); |
c8261a96 SY |
421 | |
422 | ||
423 | if (ret != 0) | |
424 | goto out_no_fence; | |
425 | if (!fence) { | |
426 | ret = -EINVAL; | |
427 | goto out_no_fence; | |
428 | } | |
429 | ||
10b1e0ca TH |
430 | if (event) { |
431 | struct drm_file *file_priv = event->base.file_priv; | |
432 | ||
433 | ret = vmw_event_fence_action_queue(file_priv, fence, | |
434 | &event->base, | |
435 | &event->event.tv_sec, | |
436 | &event->event.tv_usec, | |
437 | true); | |
438 | } | |
c8261a96 SY |
439 | |
440 | /* | |
441 | * No need to hold on to this now. The only cleanup | |
442 | * we need to do if we fail is unref the fence. | |
443 | */ | |
444 | vmw_fence_obj_unreference(&fence); | |
445 | ||
446 | if (vmw_crtc_to_du(crtc)->is_implicit) | |
75c06855 | 447 | vmw_kms_update_implicit_fb(dev_priv, crtc); |
c8261a96 SY |
448 | |
449 | return ret; | |
450 | ||
451 | out_no_fence: | |
452 | crtc->primary->fb = old_fb; | |
453 | return ret; | |
454 | } | |
455 | ||
d7955fcf | 456 | static const struct drm_crtc_funcs vmw_screen_object_crtc_funcs = { |
8fbf9d92 | 457 | .cursor_set2 = vmw_du_crtc_cursor_set2, |
56d1c78d JB |
458 | .cursor_move = vmw_du_crtc_cursor_move, |
459 | .gamma_set = vmw_du_crtc_gamma_set, | |
460 | .destroy = vmw_sou_crtc_destroy, | |
461 | .set_config = vmw_sou_crtc_set_config, | |
c8261a96 | 462 | .page_flip = vmw_sou_crtc_page_flip, |
56d1c78d JB |
463 | }; |
464 | ||
465 | /* | |
466 | * Screen Object Display Unit encoder functions | |
467 | */ | |
468 | ||
469 | static void vmw_sou_encoder_destroy(struct drm_encoder *encoder) | |
470 | { | |
471 | vmw_sou_destroy(vmw_encoder_to_sou(encoder)); | |
472 | } | |
473 | ||
d7955fcf | 474 | static const struct drm_encoder_funcs vmw_screen_object_encoder_funcs = { |
56d1c78d JB |
475 | .destroy = vmw_sou_encoder_destroy, |
476 | }; | |
477 | ||
478 | /* | |
479 | * Screen Object Display Unit connector functions | |
480 | */ | |
481 | ||
482 | static void vmw_sou_connector_destroy(struct drm_connector *connector) | |
483 | { | |
484 | vmw_sou_destroy(vmw_connector_to_sou(connector)); | |
485 | } | |
486 | ||
d7955fcf | 487 | static const struct drm_connector_funcs vmw_sou_connector_funcs = { |
56d1c78d | 488 | .dpms = vmw_du_connector_dpms, |
d17e67de TR |
489 | .detect = vmw_du_connector_detect, |
490 | .fill_modes = vmw_du_connector_fill_modes, | |
56d1c78d JB |
491 | .set_property = vmw_du_connector_set_property, |
492 | .destroy = vmw_sou_connector_destroy, | |
493 | }; | |
494 | ||
495 | static int vmw_sou_init(struct vmw_private *dev_priv, unsigned unit) | |
496 | { | |
497 | struct vmw_screen_object_unit *sou; | |
498 | struct drm_device *dev = dev_priv->dev; | |
499 | struct drm_connector *connector; | |
500 | struct drm_encoder *encoder; | |
501 | struct drm_crtc *crtc; | |
502 | ||
503 | sou = kzalloc(sizeof(*sou), GFP_KERNEL); | |
504 | if (!sou) | |
505 | return -ENOMEM; | |
506 | ||
507 | sou->base.unit = unit; | |
508 | crtc = &sou->base.crtc; | |
509 | encoder = &sou->base.encoder; | |
510 | connector = &sou->base.connector; | |
511 | ||
75c06855 | 512 | sou->base.active_implicit = false; |
56d1c78d | 513 | sou->base.pref_active = (unit == 0); |
eb4f923b JB |
514 | sou->base.pref_width = dev_priv->initial_width; |
515 | sou->base.pref_height = dev_priv->initial_height; | |
56d1c78d | 516 | sou->base.pref_mode = NULL; |
6987427a | 517 | sou->base.is_implicit = true; |
56d1c78d | 518 | |
c8261a96 | 519 | drm_connector_init(dev, connector, &vmw_sou_connector_funcs, |
305151e3 | 520 | DRM_MODE_CONNECTOR_VIRTUAL); |
56d1c78d JB |
521 | connector->status = vmw_du_connector_detect(connector, true); |
522 | ||
523 | drm_encoder_init(dev, encoder, &vmw_screen_object_encoder_funcs, | |
13a3d91f | 524 | DRM_MODE_ENCODER_VIRTUAL, NULL); |
56d1c78d JB |
525 | drm_mode_connector_attach_encoder(connector, encoder); |
526 | encoder->possible_crtcs = (1 << unit); | |
527 | encoder->possible_clones = 0; | |
528 | ||
34ea3d38 | 529 | (void) drm_connector_register(connector); |
6a0a7a9e | 530 | |
56d1c78d JB |
531 | drm_crtc_init(dev, crtc, &vmw_screen_object_crtc_funcs); |
532 | ||
533 | drm_mode_crtc_set_gamma_size(crtc, 256); | |
534 | ||
b8b163ba | 535 | drm_object_attach_property(&connector->base, |
578e609a TH |
536 | dev->mode_config.dirty_info_property, |
537 | 1); | |
538 | drm_object_attach_property(&connector->base, | |
539 | dev_priv->hotplug_mode_update_property, 1); | |
540 | drm_object_attach_property(&connector->base, | |
541 | dev->mode_config.suggested_x_property, 0); | |
542 | drm_object_attach_property(&connector->base, | |
543 | dev->mode_config.suggested_y_property, 0); | |
56d1c78d JB |
544 | |
545 | return 0; | |
546 | } | |
547 | ||
c8261a96 | 548 | int vmw_kms_sou_init_display(struct vmw_private *dev_priv) |
56d1c78d JB |
549 | { |
550 | struct drm_device *dev = dev_priv->dev; | |
74b5ea30 | 551 | int i, ret; |
56d1c78d | 552 | |
29a16e95 | 553 | if (!(dev_priv->capabilities & SVGA_CAP_SCREEN_OBJECT_2)) { |
56d1c78d JB |
554 | DRM_INFO("Not using screen objects," |
555 | " missing cap SCREEN_OBJECT_2\n"); | |
556 | return -ENOSYS; | |
557 | } | |
558 | ||
559 | ret = -ENOMEM; | |
75c06855 TH |
560 | dev_priv->num_implicit = 0; |
561 | dev_priv->implicit_fb = NULL; | |
56d1c78d JB |
562 | |
563 | ret = drm_vblank_init(dev, VMWGFX_NUM_DISPLAY_UNITS); | |
564 | if (unlikely(ret != 0)) | |
75c06855 | 565 | return ret; |
56d1c78d | 566 | |
74b5ea30 | 567 | ret = drm_mode_create_dirty_info_property(dev); |
56d1c78d JB |
568 | if (unlikely(ret != 0)) |
569 | goto err_vblank_cleanup; | |
570 | ||
571 | for (i = 0; i < VMWGFX_NUM_DISPLAY_UNITS; ++i) | |
572 | vmw_sou_init(dev_priv, i); | |
573 | ||
c8261a96 SY |
574 | dev_priv->active_display_unit = vmw_du_screen_object; |
575 | ||
576 | DRM_INFO("Screen Objects Display Unit initialized\n"); | |
56d1c78d JB |
577 | |
578 | return 0; | |
579 | ||
580 | err_vblank_cleanup: | |
581 | drm_vblank_cleanup(dev); | |
56d1c78d JB |
582 | return ret; |
583 | } | |
584 | ||
c8261a96 | 585 | int vmw_kms_sou_close_display(struct vmw_private *dev_priv) |
56d1c78d JB |
586 | { |
587 | struct drm_device *dev = dev_priv->dev; | |
588 | ||
60a16a30 JB |
589 | drm_vblank_cleanup(dev); |
590 | ||
56d1c78d JB |
591 | return 0; |
592 | } | |
b5ec427e | 593 | |
10b1e0ca | 594 | static int do_dmabuf_define_gmrfb(struct vmw_private *dev_priv, |
c8261a96 | 595 | struct vmw_framebuffer *framebuffer) |
b5ec427e | 596 | { |
10b1e0ca TH |
597 | struct vmw_dma_buffer *buf = |
598 | container_of(framebuffer, struct vmw_framebuffer_dmabuf, | |
599 | base)->buffer; | |
c8261a96 | 600 | int depth = framebuffer->base.depth; |
c8261a96 SY |
601 | struct { |
602 | uint32_t header; | |
603 | SVGAFifoCmdDefineGMRFB body; | |
604 | } *cmd; | |
b5ec427e | 605 | |
c8261a96 SY |
606 | /* Emulate RGBA support, contrary to svga_reg.h this is not |
607 | * supported by hosts. This is only a problem if we are reading | |
608 | * this value later and expecting what we uploaded back. | |
609 | */ | |
610 | if (depth == 32) | |
611 | depth = 24; | |
b5ec427e | 612 | |
10b1e0ca TH |
613 | cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd)); |
614 | if (!cmd) { | |
615 | DRM_ERROR("Out of fifo space for dirty framebuffer command.\n"); | |
c8261a96 SY |
616 | return -ENOMEM; |
617 | } | |
618 | ||
c8261a96 SY |
619 | cmd->header = SVGA_CMD_DEFINE_GMRFB; |
620 | cmd->body.format.bitsPerPixel = framebuffer->base.bits_per_pixel; | |
621 | cmd->body.format.colorDepth = depth; | |
622 | cmd->body.format.reserved = 0; | |
623 | cmd->body.bytesPerLine = framebuffer->base.pitches[0]; | |
10b1e0ca TH |
624 | /* Buffer is reserved in vram or GMR */ |
625 | vmw_bo_get_guest_ptr(&buf->base, &cmd->body.ptr); | |
626 | vmw_fifo_commit(dev_priv, sizeof(*cmd)); | |
627 | ||
628 | return 0; | |
629 | } | |
630 | ||
631 | /** | |
632 | * vmw_sou_surface_fifo_commit - Callback to fill in and submit a | |
633 | * blit surface to screen command. | |
634 | * | |
635 | * @dirty: The closure structure. | |
636 | * | |
637 | * Fills in the missing fields in the command, and translates the cliprects | |
638 | * to match the destination bounding box encoded. | |
639 | */ | |
640 | static void vmw_sou_surface_fifo_commit(struct vmw_kms_dirty *dirty) | |
641 | { | |
642 | struct vmw_kms_sou_surface_dirty *sdirty = | |
643 | container_of(dirty, typeof(*sdirty), base); | |
644 | struct vmw_kms_sou_dirty_cmd *cmd = dirty->cmd; | |
645 | s32 trans_x = dirty->unit->crtc.x - sdirty->dst_x; | |
646 | s32 trans_y = dirty->unit->crtc.y - sdirty->dst_y; | |
647 | size_t region_size = dirty->num_hits * sizeof(SVGASignedRect); | |
648 | SVGASignedRect *blit = (SVGASignedRect *) &cmd[1]; | |
649 | int i; | |
650 | ||
fea7dd54 TH |
651 | if (!dirty->num_hits) { |
652 | vmw_fifo_commit(dirty->dev_priv, 0); | |
653 | return; | |
654 | } | |
655 | ||
10b1e0ca TH |
656 | cmd->header.id = SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN; |
657 | cmd->header.size = sizeof(cmd->body) + region_size; | |
658 | ||
659 | /* | |
660 | * Use the destination bounding box to specify destination - and | |
661 | * source bounding regions. | |
662 | */ | |
663 | cmd->body.destRect.left = sdirty->left; | |
664 | cmd->body.destRect.right = sdirty->right; | |
665 | cmd->body.destRect.top = sdirty->top; | |
666 | cmd->body.destRect.bottom = sdirty->bottom; | |
667 | ||
668 | cmd->body.srcRect.left = sdirty->left + trans_x; | |
669 | cmd->body.srcRect.right = sdirty->right + trans_x; | |
670 | cmd->body.srcRect.top = sdirty->top + trans_y; | |
671 | cmd->body.srcRect.bottom = sdirty->bottom + trans_y; | |
672 | ||
673 | cmd->body.srcImage.sid = sdirty->sid; | |
674 | cmd->body.destScreenId = dirty->unit->unit; | |
675 | ||
676 | /* Blits are relative to the destination rect. Translate. */ | |
677 | for (i = 0; i < dirty->num_hits; ++i, ++blit) { | |
678 | blit->left -= sdirty->left; | |
679 | blit->right -= sdirty->left; | |
680 | blit->top -= sdirty->top; | |
681 | blit->bottom -= sdirty->top; | |
682 | } | |
683 | ||
684 | vmw_fifo_commit(dirty->dev_priv, region_size + sizeof(*cmd)); | |
685 | ||
686 | sdirty->left = sdirty->top = S32_MAX; | |
687 | sdirty->right = sdirty->bottom = S32_MIN; | |
688 | } | |
689 | ||
690 | /** | |
691 | * vmw_sou_surface_clip - Callback to encode a blit surface to screen cliprect. | |
692 | * | |
693 | * @dirty: The closure structure | |
694 | * | |
695 | * Encodes a SVGASignedRect cliprect and updates the bounding box of the | |
696 | * BLIT_SURFACE_TO_SCREEN command. | |
697 | */ | |
698 | static void vmw_sou_surface_clip(struct vmw_kms_dirty *dirty) | |
699 | { | |
700 | struct vmw_kms_sou_surface_dirty *sdirty = | |
701 | container_of(dirty, typeof(*sdirty), base); | |
702 | struct vmw_kms_sou_dirty_cmd *cmd = dirty->cmd; | |
703 | SVGASignedRect *blit = (SVGASignedRect *) &cmd[1]; | |
704 | ||
705 | /* Destination rect. */ | |
706 | blit += dirty->num_hits; | |
707 | blit->left = dirty->unit_x1; | |
708 | blit->top = dirty->unit_y1; | |
709 | blit->right = dirty->unit_x2; | |
710 | blit->bottom = dirty->unit_y2; | |
711 | ||
712 | /* Destination bounding box */ | |
713 | sdirty->left = min_t(s32, sdirty->left, dirty->unit_x1); | |
714 | sdirty->top = min_t(s32, sdirty->top, dirty->unit_y1); | |
715 | sdirty->right = max_t(s32, sdirty->right, dirty->unit_x2); | |
716 | sdirty->bottom = max_t(s32, sdirty->bottom, dirty->unit_y2); | |
717 | ||
718 | dirty->num_hits++; | |
719 | } | |
720 | ||
721 | /** | |
722 | * vmw_kms_sou_do_surface_dirty - Dirty part of a surface backed framebuffer | |
723 | * | |
724 | * @dev_priv: Pointer to the device private structure. | |
725 | * @framebuffer: Pointer to the surface-buffer backed framebuffer. | |
726 | * @clips: Array of clip rects. Either @clips or @vclips must be NULL. | |
727 | * @vclips: Alternate array of clip rects. Either @clips or @vclips must | |
728 | * be NULL. | |
729 | * @srf: Pointer to surface to blit from. If NULL, the surface attached | |
730 | * to @framebuffer will be used. | |
731 | * @dest_x: X coordinate offset to align @srf with framebuffer coordinates. | |
732 | * @dest_y: Y coordinate offset to align @srf with framebuffer coordinates. | |
733 | * @num_clips: Number of clip rects in @clips. | |
734 | * @inc: Increment to use when looping over @clips. | |
735 | * @out_fence: If non-NULL, will return a ref-counted pointer to a | |
736 | * struct vmw_fence_obj. The returned fence pointer may be NULL in which | |
737 | * case the device has already synchronized. | |
738 | * | |
739 | * Returns 0 on success, negative error code on failure. -ERESTARTSYS if | |
740 | * interrupted. | |
741 | */ | |
742 | int vmw_kms_sou_do_surface_dirty(struct vmw_private *dev_priv, | |
743 | struct vmw_framebuffer *framebuffer, | |
744 | struct drm_clip_rect *clips, | |
745 | struct drm_vmw_rect *vclips, | |
746 | struct vmw_resource *srf, | |
747 | s32 dest_x, | |
748 | s32 dest_y, | |
749 | unsigned num_clips, int inc, | |
750 | struct vmw_fence_obj **out_fence) | |
751 | { | |
752 | struct vmw_framebuffer_surface *vfbs = | |
753 | container_of(framebuffer, typeof(*vfbs), base); | |
754 | struct vmw_kms_sou_surface_dirty sdirty; | |
755 | int ret; | |
756 | ||
757 | if (!srf) | |
758 | srf = &vfbs->surface->res; | |
759 | ||
760 | ret = vmw_kms_helper_resource_prepare(srf, true); | |
761 | if (ret) | |
762 | return ret; | |
763 | ||
764 | sdirty.base.fifo_commit = vmw_sou_surface_fifo_commit; | |
765 | sdirty.base.clip = vmw_sou_surface_clip; | |
766 | sdirty.base.dev_priv = dev_priv; | |
767 | sdirty.base.fifo_reserve_size = sizeof(struct vmw_kms_sou_dirty_cmd) + | |
768 | sizeof(SVGASignedRect) * num_clips; | |
c8261a96 | 769 | |
10b1e0ca TH |
770 | sdirty.sid = srf->id; |
771 | sdirty.left = sdirty.top = S32_MAX; | |
772 | sdirty.right = sdirty.bottom = S32_MIN; | |
773 | sdirty.dst_x = dest_x; | |
774 | sdirty.dst_y = dest_y; | |
c8261a96 | 775 | |
10b1e0ca TH |
776 | ret = vmw_kms_helper_dirty(dev_priv, framebuffer, clips, vclips, |
777 | dest_x, dest_y, num_clips, inc, | |
778 | &sdirty.base); | |
779 | vmw_kms_helper_resource_finish(srf, out_fence); | |
c8261a96 SY |
780 | |
781 | return ret; | |
b5ec427e JB |
782 | } |
783 | ||
10b1e0ca TH |
784 | /** |
785 | * vmw_sou_dmabuf_fifo_commit - Callback to submit a set of readback clips. | |
786 | * | |
787 | * @dirty: The closure structure. | |
788 | * | |
789 | * Commits a previously built command buffer of readback clips. | |
790 | */ | |
791 | static void vmw_sou_dmabuf_fifo_commit(struct vmw_kms_dirty *dirty) | |
792 | { | |
fea7dd54 TH |
793 | if (!dirty->num_hits) { |
794 | vmw_fifo_commit(dirty->dev_priv, 0); | |
795 | return; | |
796 | } | |
797 | ||
10b1e0ca TH |
798 | vmw_fifo_commit(dirty->dev_priv, |
799 | sizeof(struct vmw_kms_sou_dmabuf_blit) * | |
800 | dirty->num_hits); | |
801 | } | |
802 | ||
803 | /** | |
804 | * vmw_sou_dmabuf_clip - Callback to encode a readback cliprect. | |
805 | * | |
806 | * @dirty: The closure structure | |
807 | * | |
808 | * Encodes a BLIT_GMRFB_TO_SCREEN cliprect. | |
809 | */ | |
810 | static void vmw_sou_dmabuf_clip(struct vmw_kms_dirty *dirty) | |
811 | { | |
812 | struct vmw_kms_sou_dmabuf_blit *blit = dirty->cmd; | |
813 | ||
814 | blit += dirty->num_hits; | |
815 | blit->header = SVGA_CMD_BLIT_GMRFB_TO_SCREEN; | |
816 | blit->body.destScreenId = dirty->unit->unit; | |
817 | blit->body.srcOrigin.x = dirty->fb_x; | |
818 | blit->body.srcOrigin.y = dirty->fb_y; | |
819 | blit->body.destRect.left = dirty->unit_x1; | |
820 | blit->body.destRect.top = dirty->unit_y1; | |
821 | blit->body.destRect.right = dirty->unit_x2; | |
822 | blit->body.destRect.bottom = dirty->unit_y2; | |
823 | dirty->num_hits++; | |
824 | } | |
825 | ||
826 | /** | |
827 | * vmw_kms_do_dmabuf_dirty - Dirty part of a dma-buffer backed framebuffer | |
828 | * | |
829 | * @dev_priv: Pointer to the device private structure. | |
830 | * @framebuffer: Pointer to the dma-buffer backed framebuffer. | |
831 | * @clips: Array of clip rects. | |
897b8180 TH |
832 | * @vclips: Alternate array of clip rects. Either @clips or @vclips must |
833 | * be NULL. | |
10b1e0ca TH |
834 | * @num_clips: Number of clip rects in @clips. |
835 | * @increment: Increment to use when looping over @clips. | |
836 | * @interruptible: Whether to perform waits interruptible if possible. | |
837 | * @out_fence: If non-NULL, will return a ref-counted pointer to a | |
838 | * struct vmw_fence_obj. The returned fence pointer may be NULL in which | |
839 | * case the device has already synchronized. | |
840 | * | |
841 | * Returns 0 on success, negative error code on failure. -ERESTARTSYS if | |
842 | * interrupted. | |
843 | */ | |
844 | int vmw_kms_sou_do_dmabuf_dirty(struct vmw_private *dev_priv, | |
c8261a96 | 845 | struct vmw_framebuffer *framebuffer, |
c8261a96 | 846 | struct drm_clip_rect *clips, |
897b8180 | 847 | struct drm_vmw_rect *vclips, |
c8261a96 | 848 | unsigned num_clips, int increment, |
10b1e0ca | 849 | bool interruptible, |
c8261a96 | 850 | struct vmw_fence_obj **out_fence) |
b5ec427e | 851 | { |
10b1e0ca TH |
852 | struct vmw_dma_buffer *buf = |
853 | container_of(framebuffer, struct vmw_framebuffer_dmabuf, | |
854 | base)->buffer; | |
855 | struct vmw_kms_dirty dirty; | |
856 | int ret; | |
b5ec427e | 857 | |
10b1e0ca TH |
858 | ret = vmw_kms_helper_buffer_prepare(dev_priv, buf, interruptible, |
859 | false); | |
860 | if (ret) | |
861 | return ret; | |
b5ec427e | 862 | |
10b1e0ca | 863 | ret = do_dmabuf_define_gmrfb(dev_priv, framebuffer); |
c8261a96 | 864 | if (unlikely(ret != 0)) |
10b1e0ca | 865 | goto out_revert; |
c8261a96 | 866 | |
10b1e0ca TH |
867 | dirty.fifo_commit = vmw_sou_dmabuf_fifo_commit; |
868 | dirty.clip = vmw_sou_dmabuf_clip; | |
869 | dirty.fifo_reserve_size = sizeof(struct vmw_kms_sou_dmabuf_blit) * | |
870 | num_clips; | |
897b8180 | 871 | ret = vmw_kms_helper_dirty(dev_priv, framebuffer, clips, vclips, |
10b1e0ca TH |
872 | 0, 0, num_clips, increment, &dirty); |
873 | vmw_kms_helper_buffer_finish(dev_priv, NULL, buf, out_fence, NULL); | |
c8261a96 | 874 | |
10b1e0ca | 875 | return ret; |
c8261a96 | 876 | |
10b1e0ca TH |
877 | out_revert: |
878 | vmw_kms_helper_buffer_revert(buf); | |
c8261a96 | 879 | |
10b1e0ca TH |
880 | return ret; |
881 | } | |
c8261a96 | 882 | |
c8261a96 | 883 | |
10b1e0ca TH |
884 | /** |
885 | * vmw_sou_readback_fifo_commit - Callback to submit a set of readback clips. | |
886 | * | |
887 | * @dirty: The closure structure. | |
888 | * | |
889 | * Commits a previously built command buffer of readback clips. | |
890 | */ | |
891 | static void vmw_sou_readback_fifo_commit(struct vmw_kms_dirty *dirty) | |
892 | { | |
fea7dd54 TH |
893 | if (!dirty->num_hits) { |
894 | vmw_fifo_commit(dirty->dev_priv, 0); | |
895 | return; | |
896 | } | |
897 | ||
10b1e0ca TH |
898 | vmw_fifo_commit(dirty->dev_priv, |
899 | sizeof(struct vmw_kms_sou_readback_blit) * | |
900 | dirty->num_hits); | |
b5ec427e | 901 | } |
c8261a96 | 902 | |
10b1e0ca TH |
903 | /** |
904 | * vmw_sou_readback_clip - Callback to encode a readback cliprect. | |
905 | * | |
906 | * @dirty: The closure structure | |
907 | * | |
908 | * Encodes a BLIT_SCREEN_TO_GMRFB cliprect. | |
909 | */ | |
910 | static void vmw_sou_readback_clip(struct vmw_kms_dirty *dirty) | |
911 | { | |
912 | struct vmw_kms_sou_readback_blit *blit = dirty->cmd; | |
913 | ||
914 | blit += dirty->num_hits; | |
915 | blit->header = SVGA_CMD_BLIT_SCREEN_TO_GMRFB; | |
916 | blit->body.srcScreenId = dirty->unit->unit; | |
917 | blit->body.destOrigin.x = dirty->fb_x; | |
918 | blit->body.destOrigin.y = dirty->fb_y; | |
919 | blit->body.srcRect.left = dirty->unit_x1; | |
920 | blit->body.srcRect.top = dirty->unit_y1; | |
921 | blit->body.srcRect.right = dirty->unit_x2; | |
922 | blit->body.srcRect.bottom = dirty->unit_y2; | |
923 | dirty->num_hits++; | |
924 | } | |
925 | ||
926 | /** | |
927 | * vmw_kms_sou_readback - Perform a readback from the screen object system to | |
928 | * a dma-buffer backed framebuffer. | |
929 | * | |
930 | * @dev_priv: Pointer to the device private structure. | |
931 | * @file_priv: Pointer to a struct drm_file identifying the caller. | |
932 | * Must be set to NULL if @user_fence_rep is NULL. | |
933 | * @vfb: Pointer to the dma-buffer backed framebuffer. | |
934 | * @user_fence_rep: User-space provided structure for fence information. | |
935 | * Must be set to non-NULL if @file_priv is non-NULL. | |
936 | * @vclips: Array of clip rects. | |
937 | * @num_clips: Number of clip rects in @vclips. | |
938 | * | |
939 | * Returns 0 on success, negative error code on failure. -ERESTARTSYS if | |
940 | * interrupted. | |
941 | */ | |
942 | int vmw_kms_sou_readback(struct vmw_private *dev_priv, | |
943 | struct drm_file *file_priv, | |
944 | struct vmw_framebuffer *vfb, | |
945 | struct drm_vmw_fence_rep __user *user_fence_rep, | |
946 | struct drm_vmw_rect *vclips, | |
947 | uint32_t num_clips) | |
948 | { | |
949 | struct vmw_dma_buffer *buf = | |
950 | container_of(vfb, struct vmw_framebuffer_dmabuf, base)->buffer; | |
951 | struct vmw_kms_dirty dirty; | |
952 | int ret; | |
953 | ||
954 | ret = vmw_kms_helper_buffer_prepare(dev_priv, buf, true, false); | |
955 | if (ret) | |
956 | return ret; | |
957 | ||
958 | ret = do_dmabuf_define_gmrfb(dev_priv, vfb); | |
959 | if (unlikely(ret != 0)) | |
960 | goto out_revert; | |
961 | ||
962 | dirty.fifo_commit = vmw_sou_readback_fifo_commit; | |
963 | dirty.clip = vmw_sou_readback_clip; | |
964 | dirty.fifo_reserve_size = sizeof(struct vmw_kms_sou_readback_blit) * | |
965 | num_clips; | |
966 | ret = vmw_kms_helper_dirty(dev_priv, vfb, NULL, vclips, | |
967 | 0, 0, num_clips, 1, &dirty); | |
968 | vmw_kms_helper_buffer_finish(dev_priv, file_priv, buf, NULL, | |
969 | user_fence_rep); | |
970 | ||
971 | return ret; | |
972 | ||
973 | out_revert: | |
974 | vmw_kms_helper_buffer_revert(buf); | |
975 | ||
976 | return ret; | |
977 | } |