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[mirror_ubuntu-artful-kernel.git] / drivers / gpu / drm / vmwgfx / vmwgfx_shader.c
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1/**************************************************************************
2 *
54fbde8a 3 * Copyright © 2009-2015 VMware, Inc., Palo Alto, CA., USA
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4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
008be682
MY
28#include <drm/ttm/ttm_placement.h>
29
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30#include "vmwgfx_drv.h"
31#include "vmwgfx_resource_priv.h"
d80efd5c 32#include "vmwgfx_binding.h"
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33
34struct vmw_shader {
35 struct vmw_resource res;
36 SVGA3dShaderType type;
37 uint32_t size;
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38 uint8_t num_input_sig;
39 uint8_t num_output_sig;
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40};
41
42struct vmw_user_shader {
43 struct ttm_base_object base;
44 struct vmw_shader shader;
45};
46
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47struct vmw_dx_shader {
48 struct vmw_resource res;
49 struct vmw_resource *ctx;
50 struct vmw_resource *cotable;
51 u32 id;
52 bool committed;
53 struct list_head cotable_head;
54};
55
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56static uint64_t vmw_user_shader_size;
57static uint64_t vmw_shader_size;
d80efd5c 58static size_t vmw_shader_dx_size;
d5bde956 59
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60static void vmw_user_shader_free(struct vmw_resource *res);
61static struct vmw_resource *
62vmw_user_shader_base_to_res(struct ttm_base_object *base);
63
64static int vmw_gb_shader_create(struct vmw_resource *res);
65static int vmw_gb_shader_bind(struct vmw_resource *res,
66 struct ttm_validate_buffer *val_buf);
67static int vmw_gb_shader_unbind(struct vmw_resource *res,
68 bool readback,
69 struct ttm_validate_buffer *val_buf);
70static int vmw_gb_shader_destroy(struct vmw_resource *res);
71
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72static int vmw_dx_shader_create(struct vmw_resource *res);
73static int vmw_dx_shader_bind(struct vmw_resource *res,
74 struct ttm_validate_buffer *val_buf);
75static int vmw_dx_shader_unbind(struct vmw_resource *res,
76 bool readback,
77 struct ttm_validate_buffer *val_buf);
78static void vmw_dx_shader_commit_notify(struct vmw_resource *res,
79 enum vmw_cmdbuf_res_state state);
80static bool vmw_shader_id_ok(u32 user_key, SVGA3dShaderType shader_type);
81static u32 vmw_shader_key(u32 user_key, SVGA3dShaderType shader_type);
82static uint64_t vmw_user_shader_size;
83
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84static const struct vmw_user_resource_conv user_shader_conv = {
85 .object_type = VMW_RES_SHADER,
86 .base_obj_to_res = vmw_user_shader_base_to_res,
87 .res_free = vmw_user_shader_free
88};
89
90const struct vmw_user_resource_conv *user_shader_converter =
91 &user_shader_conv;
92
93
94static const struct vmw_res_func vmw_gb_shader_func = {
95 .res_type = vmw_res_shader,
96 .needs_backup = true,
97 .may_evict = true,
98 .type_name = "guest backed shaders",
99 .backup_placement = &vmw_mob_placement,
100 .create = vmw_gb_shader_create,
101 .destroy = vmw_gb_shader_destroy,
102 .bind = vmw_gb_shader_bind,
103 .unbind = vmw_gb_shader_unbind
104};
105
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106static const struct vmw_res_func vmw_dx_shader_func = {
107 .res_type = vmw_res_shader,
108 .needs_backup = true,
109 .may_evict = false,
110 .type_name = "dx shaders",
111 .backup_placement = &vmw_mob_placement,
112 .create = vmw_dx_shader_create,
113 /*
114 * The destroy callback is only called with a committed resource on
115 * context destroy, in which case we destroy the cotable anyway,
116 * so there's no need to destroy DX shaders separately.
117 */
118 .destroy = NULL,
119 .bind = vmw_dx_shader_bind,
120 .unbind = vmw_dx_shader_unbind,
121 .commit_notify = vmw_dx_shader_commit_notify,
122};
123
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124/**
125 * Shader management:
126 */
127
128static inline struct vmw_shader *
129vmw_res_to_shader(struct vmw_resource *res)
130{
131 return container_of(res, struct vmw_shader, res);
132}
133
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134/**
135 * vmw_res_to_dx_shader - typecast a struct vmw_resource to a
136 * struct vmw_dx_shader
137 *
138 * @res: Pointer to the struct vmw_resource.
139 */
140static inline struct vmw_dx_shader *
141vmw_res_to_dx_shader(struct vmw_resource *res)
142{
143 return container_of(res, struct vmw_dx_shader, res);
144}
145
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146static void vmw_hw_shader_destroy(struct vmw_resource *res)
147{
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148 if (likely(res->func->destroy))
149 (void) res->func->destroy(res);
150 else
151 res->id = -1;
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152}
153
d80efd5c 154
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155static int vmw_gb_shader_init(struct vmw_private *dev_priv,
156 struct vmw_resource *res,
157 uint32_t size,
158 uint64_t offset,
159 SVGA3dShaderType type,
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160 uint8_t num_input_sig,
161 uint8_t num_output_sig,
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162 struct vmw_dma_buffer *byte_code,
163 void (*res_free) (struct vmw_resource *res))
164{
165 struct vmw_shader *shader = vmw_res_to_shader(res);
166 int ret;
167
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168 ret = vmw_resource_init(dev_priv, res, true, res_free,
169 &vmw_gb_shader_func);
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170
171 if (unlikely(ret != 0)) {
172 if (res_free)
173 res_free(res);
174 else
175 kfree(res);
176 return ret;
177 }
178
179 res->backup_size = size;
180 if (byte_code) {
181 res->backup = vmw_dmabuf_reference(byte_code);
182 res->backup_offset = offset;
183 }
184 shader->size = size;
185 shader->type = type;
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186 shader->num_input_sig = num_input_sig;
187 shader->num_output_sig = num_output_sig;
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188
189 vmw_resource_activate(res, vmw_hw_shader_destroy);
190 return 0;
191}
192
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193/*
194 * GB shader code:
195 */
196
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197static int vmw_gb_shader_create(struct vmw_resource *res)
198{
199 struct vmw_private *dev_priv = res->dev_priv;
200 struct vmw_shader *shader = vmw_res_to_shader(res);
201 int ret;
202 struct {
203 SVGA3dCmdHeader header;
204 SVGA3dCmdDefineGBShader body;
205 } *cmd;
206
207 if (likely(res->id != -1))
208 return 0;
209
210 ret = vmw_resource_alloc_id(res);
211 if (unlikely(ret != 0)) {
212 DRM_ERROR("Failed to allocate a shader id.\n");
213 goto out_no_id;
214 }
215
216 if (unlikely(res->id >= VMWGFX_NUM_GB_SHADER)) {
217 ret = -EBUSY;
218 goto out_no_fifo;
219 }
220
221 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
222 if (unlikely(cmd == NULL)) {
223 DRM_ERROR("Failed reserving FIFO space for shader "
224 "creation.\n");
225 ret = -ENOMEM;
226 goto out_no_fifo;
227 }
228
229 cmd->header.id = SVGA_3D_CMD_DEFINE_GB_SHADER;
230 cmd->header.size = sizeof(cmd->body);
231 cmd->body.shid = res->id;
232 cmd->body.type = shader->type;
233 cmd->body.sizeInBytes = shader->size;
234 vmw_fifo_commit(dev_priv, sizeof(*cmd));
153b3d5b 235 vmw_fifo_resource_inc(dev_priv);
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236
237 return 0;
238
239out_no_fifo:
240 vmw_resource_release_id(res);
241out_no_id:
242 return ret;
243}
244
245static int vmw_gb_shader_bind(struct vmw_resource *res,
246 struct ttm_validate_buffer *val_buf)
247{
248 struct vmw_private *dev_priv = res->dev_priv;
249 struct {
250 SVGA3dCmdHeader header;
251 SVGA3dCmdBindGBShader body;
252 } *cmd;
253 struct ttm_buffer_object *bo = val_buf->bo;
254
255 BUG_ON(bo->mem.mem_type != VMW_PL_MOB);
256
257 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
258 if (unlikely(cmd == NULL)) {
259 DRM_ERROR("Failed reserving FIFO space for shader "
260 "binding.\n");
261 return -ENOMEM;
262 }
263
264 cmd->header.id = SVGA_3D_CMD_BIND_GB_SHADER;
265 cmd->header.size = sizeof(cmd->body);
266 cmd->body.shid = res->id;
267 cmd->body.mobid = bo->mem.start;
b8ccd1e4 268 cmd->body.offsetInBytes = res->backup_offset;
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269 res->backup_dirty = false;
270 vmw_fifo_commit(dev_priv, sizeof(*cmd));
271
272 return 0;
273}
274
275static int vmw_gb_shader_unbind(struct vmw_resource *res,
276 bool readback,
277 struct ttm_validate_buffer *val_buf)
278{
279 struct vmw_private *dev_priv = res->dev_priv;
280 struct {
281 SVGA3dCmdHeader header;
282 SVGA3dCmdBindGBShader body;
283 } *cmd;
284 struct vmw_fence_obj *fence;
285
286 BUG_ON(res->backup->base.mem.mem_type != VMW_PL_MOB);
287
288 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
289 if (unlikely(cmd == NULL)) {
290 DRM_ERROR("Failed reserving FIFO space for shader "
291 "unbinding.\n");
292 return -ENOMEM;
293 }
294
295 cmd->header.id = SVGA_3D_CMD_BIND_GB_SHADER;
296 cmd->header.size = sizeof(cmd->body);
297 cmd->body.shid = res->id;
298 cmd->body.mobid = SVGA3D_INVALID_ID;
299 cmd->body.offsetInBytes = 0;
300 vmw_fifo_commit(dev_priv, sizeof(*cmd));
301
302 /*
303 * Create a fence object and fence the backup buffer.
304 */
305
306 (void) vmw_execbuf_fence_commands(NULL, dev_priv,
307 &fence, NULL);
308
309 vmw_fence_single_bo(val_buf->bo, fence);
310
311 if (likely(fence != NULL))
312 vmw_fence_obj_unreference(&fence);
313
314 return 0;
315}
316
317static int vmw_gb_shader_destroy(struct vmw_resource *res)
318{
319 struct vmw_private *dev_priv = res->dev_priv;
320 struct {
321 SVGA3dCmdHeader header;
322 SVGA3dCmdDestroyGBShader body;
323 } *cmd;
324
325 if (likely(res->id == -1))
326 return 0;
327
173fb7d4 328 mutex_lock(&dev_priv->binding_mutex);
d80efd5c 329 vmw_binding_res_list_scrub(&res->binding_head);
173fb7d4 330
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331 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
332 if (unlikely(cmd == NULL)) {
333 DRM_ERROR("Failed reserving FIFO space for shader "
334 "destruction.\n");
3e894a62 335 mutex_unlock(&dev_priv->binding_mutex);
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336 return -ENOMEM;
337 }
338
339 cmd->header.id = SVGA_3D_CMD_DESTROY_GB_SHADER;
340 cmd->header.size = sizeof(cmd->body);
341 cmd->body.shid = res->id;
342 vmw_fifo_commit(dev_priv, sizeof(*cmd));
173fb7d4 343 mutex_unlock(&dev_priv->binding_mutex);
c74c162f 344 vmw_resource_release_id(res);
153b3d5b 345 vmw_fifo_resource_dec(dev_priv);
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346
347 return 0;
348}
349
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350/*
351 * DX shader code:
352 */
353
354/**
355 * vmw_dx_shader_commit_notify - Notify that a shader operation has been
356 * committed to hardware from a user-supplied command stream.
357 *
358 * @res: Pointer to the shader resource.
359 * @state: Indicating whether a creation or removal has been committed.
360 *
361 */
362static void vmw_dx_shader_commit_notify(struct vmw_resource *res,
363 enum vmw_cmdbuf_res_state state)
364{
365 struct vmw_dx_shader *shader = vmw_res_to_dx_shader(res);
366 struct vmw_private *dev_priv = res->dev_priv;
367
368 if (state == VMW_CMDBUF_RES_ADD) {
369 mutex_lock(&dev_priv->binding_mutex);
370 vmw_cotable_add_resource(shader->cotable,
371 &shader->cotable_head);
372 shader->committed = true;
373 res->id = shader->id;
374 mutex_unlock(&dev_priv->binding_mutex);
375 } else {
376 mutex_lock(&dev_priv->binding_mutex);
377 list_del_init(&shader->cotable_head);
378 shader->committed = false;
379 res->id = -1;
380 mutex_unlock(&dev_priv->binding_mutex);
381 }
382}
383
384/**
385 * vmw_dx_shader_unscrub - Have the device reattach a MOB to a DX shader.
386 *
387 * @res: The shader resource
388 *
389 * This function reverts a scrub operation.
390 */
391static int vmw_dx_shader_unscrub(struct vmw_resource *res)
392{
393 struct vmw_dx_shader *shader = vmw_res_to_dx_shader(res);
394 struct vmw_private *dev_priv = res->dev_priv;
395 struct {
396 SVGA3dCmdHeader header;
397 SVGA3dCmdDXBindShader body;
398 } *cmd;
399
400 if (!list_empty(&shader->cotable_head) || !shader->committed)
401 return 0;
402
403 cmd = vmw_fifo_reserve_dx(dev_priv, sizeof(*cmd),
404 shader->ctx->id);
405 if (unlikely(cmd == NULL)) {
406 DRM_ERROR("Failed reserving FIFO space for shader "
407 "scrubbing.\n");
408 return -ENOMEM;
409 }
410
411 cmd->header.id = SVGA_3D_CMD_DX_BIND_SHADER;
412 cmd->header.size = sizeof(cmd->body);
413 cmd->body.cid = shader->ctx->id;
414 cmd->body.shid = shader->id;
415 cmd->body.mobid = res->backup->base.mem.start;
416 cmd->body.offsetInBytes = res->backup_offset;
417 vmw_fifo_commit(dev_priv, sizeof(*cmd));
418
419 vmw_cotable_add_resource(shader->cotable, &shader->cotable_head);
420
421 return 0;
422}
423
424/**
425 * vmw_dx_shader_create - The DX shader create callback
426 *
427 * @res: The DX shader resource
428 *
429 * The create callback is called as part of resource validation and
430 * makes sure that we unscrub the shader if it's previously been scrubbed.
431 */
432static int vmw_dx_shader_create(struct vmw_resource *res)
433{
434 struct vmw_private *dev_priv = res->dev_priv;
435 struct vmw_dx_shader *shader = vmw_res_to_dx_shader(res);
436 int ret = 0;
437
438 WARN_ON_ONCE(!shader->committed);
439
440 if (!list_empty(&res->mob_head)) {
441 mutex_lock(&dev_priv->binding_mutex);
442 ret = vmw_dx_shader_unscrub(res);
443 mutex_unlock(&dev_priv->binding_mutex);
444 }
445
446 res->id = shader->id;
447 return ret;
448}
449
450/**
451 * vmw_dx_shader_bind - The DX shader bind callback
452 *
453 * @res: The DX shader resource
454 * @val_buf: Pointer to the validate buffer.
455 *
456 */
457static int vmw_dx_shader_bind(struct vmw_resource *res,
458 struct ttm_validate_buffer *val_buf)
459{
460 struct vmw_private *dev_priv = res->dev_priv;
461 struct ttm_buffer_object *bo = val_buf->bo;
462
463 BUG_ON(bo->mem.mem_type != VMW_PL_MOB);
464 mutex_lock(&dev_priv->binding_mutex);
465 vmw_dx_shader_unscrub(res);
466 mutex_unlock(&dev_priv->binding_mutex);
467
468 return 0;
469}
470
471/**
472 * vmw_dx_shader_scrub - Have the device unbind a MOB from a DX shader.
473 *
474 * @res: The shader resource
475 *
476 * This function unbinds a MOB from the DX shader without requiring the
477 * MOB dma_buffer to be reserved. The driver still considers the MOB bound.
478 * However, once the driver eventually decides to unbind the MOB, it doesn't
479 * need to access the context.
480 */
481static int vmw_dx_shader_scrub(struct vmw_resource *res)
482{
483 struct vmw_dx_shader *shader = vmw_res_to_dx_shader(res);
484 struct vmw_private *dev_priv = res->dev_priv;
485 struct {
486 SVGA3dCmdHeader header;
487 SVGA3dCmdDXBindShader body;
488 } *cmd;
489
490 if (list_empty(&shader->cotable_head))
491 return 0;
492
493 WARN_ON_ONCE(!shader->committed);
494 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
495 if (unlikely(cmd == NULL)) {
496 DRM_ERROR("Failed reserving FIFO space for shader "
497 "scrubbing.\n");
498 return -ENOMEM;
499 }
500
501 cmd->header.id = SVGA_3D_CMD_DX_BIND_SHADER;
502 cmd->header.size = sizeof(cmd->body);
503 cmd->body.cid = shader->ctx->id;
504 cmd->body.shid = res->id;
505 cmd->body.mobid = SVGA3D_INVALID_ID;
506 cmd->body.offsetInBytes = 0;
507 vmw_fifo_commit(dev_priv, sizeof(*cmd));
508 res->id = -1;
509 list_del_init(&shader->cotable_head);
510
511 return 0;
512}
513
514/**
515 * vmw_dx_shader_unbind - The dx shader unbind callback.
516 *
517 * @res: The shader resource
518 * @readback: Whether this is a readback unbind. Currently unused.
519 * @val_buf: MOB buffer information.
520 */
521static int vmw_dx_shader_unbind(struct vmw_resource *res,
522 bool readback,
523 struct ttm_validate_buffer *val_buf)
524{
525 struct vmw_private *dev_priv = res->dev_priv;
526 struct vmw_fence_obj *fence;
527 int ret;
528
529 BUG_ON(res->backup->base.mem.mem_type != VMW_PL_MOB);
530
531 mutex_lock(&dev_priv->binding_mutex);
532 ret = vmw_dx_shader_scrub(res);
533 mutex_unlock(&dev_priv->binding_mutex);
534
535 if (ret)
536 return ret;
537
538 (void) vmw_execbuf_fence_commands(NULL, dev_priv,
539 &fence, NULL);
540 vmw_fence_single_bo(val_buf->bo, fence);
541
542 if (likely(fence != NULL))
543 vmw_fence_obj_unreference(&fence);
544
545 return 0;
546}
547
548/**
549 * vmw_dx_shader_cotable_list_scrub - The cotable unbind_func callback for
550 * DX shaders.
551 *
552 * @dev_priv: Pointer to device private structure.
553 * @list: The list of cotable resources.
554 * @readback: Whether the call was part of a readback unbind.
555 *
556 * Scrubs all shader MOBs so that any subsequent shader unbind or shader
557 * destroy operation won't need to swap in the context.
558 */
559void vmw_dx_shader_cotable_list_scrub(struct vmw_private *dev_priv,
560 struct list_head *list,
561 bool readback)
562{
563 struct vmw_dx_shader *entry, *next;
564
565 WARN_ON_ONCE(!mutex_is_locked(&dev_priv->binding_mutex));
566
567 list_for_each_entry_safe(entry, next, list, cotable_head) {
568 WARN_ON(vmw_dx_shader_scrub(&entry->res));
569 if (!readback)
570 entry->committed = false;
571 }
572}
573
574/**
575 * vmw_dx_shader_res_free - The DX shader free callback
576 *
577 * @res: The shader resource
578 *
579 * Frees the DX shader resource and updates memory accounting.
580 */
581static void vmw_dx_shader_res_free(struct vmw_resource *res)
582{
583 struct vmw_private *dev_priv = res->dev_priv;
584 struct vmw_dx_shader *shader = vmw_res_to_dx_shader(res);
585
586 vmw_resource_unreference(&shader->cotable);
587 kfree(shader);
588 ttm_mem_global_free(vmw_mem_glob(dev_priv), vmw_shader_dx_size);
589}
590
591/**
592 * vmw_dx_shader_add - Add a shader resource as a command buffer managed
593 * resource.
594 *
595 * @man: The command buffer resource manager.
596 * @ctx: Pointer to the context resource.
597 * @user_key: The id used for this shader.
598 * @shader_type: The shader type.
599 * @list: The list of staged command buffer managed resources.
600 */
601int vmw_dx_shader_add(struct vmw_cmdbuf_res_manager *man,
602 struct vmw_resource *ctx,
603 u32 user_key,
604 SVGA3dShaderType shader_type,
605 struct list_head *list)
606{
607 struct vmw_dx_shader *shader;
608 struct vmw_resource *res;
609 struct vmw_private *dev_priv = ctx->dev_priv;
610 int ret;
611
612 if (!vmw_shader_dx_size)
613 vmw_shader_dx_size = ttm_round_pot(sizeof(*shader));
614
615 if (!vmw_shader_id_ok(user_key, shader_type))
616 return -EINVAL;
617
618 ret = ttm_mem_global_alloc(vmw_mem_glob(dev_priv), vmw_shader_dx_size,
619 false, true);
620 if (ret) {
621 if (ret != -ERESTARTSYS)
622 DRM_ERROR("Out of graphics memory for shader "
623 "creation.\n");
624 return ret;
625 }
626
627 shader = kmalloc(sizeof(*shader), GFP_KERNEL);
628 if (!shader) {
629 ttm_mem_global_free(vmw_mem_glob(dev_priv), vmw_shader_dx_size);
630 return -ENOMEM;
631 }
632
633 res = &shader->res;
634 shader->ctx = ctx;
635 shader->cotable = vmw_context_cotable(ctx, SVGA_COTABLE_DXSHADER);
636 shader->id = user_key;
637 shader->committed = false;
638 INIT_LIST_HEAD(&shader->cotable_head);
639 ret = vmw_resource_init(dev_priv, res, true,
640 vmw_dx_shader_res_free, &vmw_dx_shader_func);
641 if (ret)
642 goto out_resource_init;
643
644 /*
645 * The user_key name-space is not per shader type for DX shaders,
646 * so when hashing, use a single zero shader type.
647 */
648 ret = vmw_cmdbuf_res_add(man, vmw_cmdbuf_res_shader,
649 vmw_shader_key(user_key, 0),
650 res, list);
651 if (ret)
652 goto out_resource_init;
653
654 res->id = shader->id;
655 vmw_resource_activate(res, vmw_hw_shader_destroy);
656
657out_resource_init:
658 vmw_resource_unreference(&res);
659
660 return ret;
661}
662
663
664
c74c162f
TH
665/**
666 * User-space shader management:
667 */
668
669static struct vmw_resource *
670vmw_user_shader_base_to_res(struct ttm_base_object *base)
671{
672 return &(container_of(base, struct vmw_user_shader, base)->
673 shader.res);
674}
675
676static void vmw_user_shader_free(struct vmw_resource *res)
677{
678 struct vmw_user_shader *ushader =
679 container_of(res, struct vmw_user_shader, shader.res);
680 struct vmw_private *dev_priv = res->dev_priv;
681
682 ttm_base_object_kfree(ushader, base);
683 ttm_mem_global_free(vmw_mem_glob(dev_priv),
684 vmw_user_shader_size);
685}
686
18e4a466
TH
687static void vmw_shader_free(struct vmw_resource *res)
688{
689 struct vmw_shader *shader = vmw_res_to_shader(res);
690 struct vmw_private *dev_priv = res->dev_priv;
691
692 kfree(shader);
693 ttm_mem_global_free(vmw_mem_glob(dev_priv),
694 vmw_shader_size);
695}
696
c74c162f
TH
697/**
698 * This function is called when user space has no more references on the
699 * base object. It releases the base-object's reference on the resource object.
700 */
701
702static void vmw_user_shader_base_release(struct ttm_base_object **p_base)
703{
704 struct ttm_base_object *base = *p_base;
705 struct vmw_resource *res = vmw_user_shader_base_to_res(base);
706
707 *p_base = NULL;
708 vmw_resource_unreference(&res);
709}
710
711int vmw_shader_destroy_ioctl(struct drm_device *dev, void *data,
712 struct drm_file *file_priv)
713{
714 struct drm_vmw_shader_arg *arg = (struct drm_vmw_shader_arg *)data;
715 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
716
717 return ttm_ref_object_base_unref(tfile, arg->handle,
718 TTM_REF_USAGE);
719}
720
18e4a466
TH
721static int vmw_user_shader_alloc(struct vmw_private *dev_priv,
722 struct vmw_dma_buffer *buffer,
723 size_t shader_size,
724 size_t offset,
725 SVGA3dShaderType shader_type,
d80efd5c
TH
726 uint8_t num_input_sig,
727 uint8_t num_output_sig,
18e4a466
TH
728 struct ttm_object_file *tfile,
729 u32 *handle)
d5bde956
TH
730{
731 struct vmw_user_shader *ushader;
732 struct vmw_resource *res, *tmp;
733 int ret;
734
735 /*
736 * Approximate idr memory usage with 128 bytes. It will be limited
737 * by maximum number_of shaders anyway.
738 */
739 if (unlikely(vmw_user_shader_size == 0))
740 vmw_user_shader_size =
741 ttm_round_pot(sizeof(struct vmw_user_shader)) + 128;
742
743 ret = ttm_mem_global_alloc(vmw_mem_glob(dev_priv),
744 vmw_user_shader_size,
745 false, true);
746 if (unlikely(ret != 0)) {
747 if (ret != -ERESTARTSYS)
748 DRM_ERROR("Out of graphics memory for shader "
749 "creation.\n");
750 goto out;
751 }
752
753 ushader = kzalloc(sizeof(*ushader), GFP_KERNEL);
1a4adb05 754 if (unlikely(!ushader)) {
d5bde956
TH
755 ttm_mem_global_free(vmw_mem_glob(dev_priv),
756 vmw_user_shader_size);
757 ret = -ENOMEM;
758 goto out;
759 }
760
761 res = &ushader->shader.res;
762 ushader->base.shareable = false;
763 ushader->base.tfile = NULL;
764
765 /*
766 * From here on, the destructor takes over resource freeing.
767 */
768
769 ret = vmw_gb_shader_init(dev_priv, res, shader_size,
d80efd5c
TH
770 offset, shader_type, num_input_sig,
771 num_output_sig, buffer,
d5bde956
TH
772 vmw_user_shader_free);
773 if (unlikely(ret != 0))
774 goto out;
775
776 tmp = vmw_resource_reference(res);
777 ret = ttm_base_object_init(tfile, &ushader->base, false,
778 VMW_RES_SHADER,
779 &vmw_user_shader_base_release, NULL);
780
781 if (unlikely(ret != 0)) {
782 vmw_resource_unreference(&tmp);
783 goto out_err;
784 }
785
786 if (handle)
787 *handle = ushader->base.hash.key;
788out_err:
789 vmw_resource_unreference(&res);
790out:
791 return ret;
792}
793
794
b9eb1a61
TH
795static struct vmw_resource *vmw_shader_alloc(struct vmw_private *dev_priv,
796 struct vmw_dma_buffer *buffer,
797 size_t shader_size,
798 size_t offset,
799 SVGA3dShaderType shader_type)
18e4a466
TH
800{
801 struct vmw_shader *shader;
802 struct vmw_resource *res;
803 int ret;
804
805 /*
806 * Approximate idr memory usage with 128 bytes. It will be limited
807 * by maximum number_of shaders anyway.
808 */
809 if (unlikely(vmw_shader_size == 0))
810 vmw_shader_size =
811 ttm_round_pot(sizeof(struct vmw_shader)) + 128;
812
813 ret = ttm_mem_global_alloc(vmw_mem_glob(dev_priv),
814 vmw_shader_size,
815 false, true);
816 if (unlikely(ret != 0)) {
817 if (ret != -ERESTARTSYS)
818 DRM_ERROR("Out of graphics memory for shader "
819 "creation.\n");
820 goto out_err;
821 }
822
823 shader = kzalloc(sizeof(*shader), GFP_KERNEL);
1a4adb05 824 if (unlikely(!shader)) {
18e4a466
TH
825 ttm_mem_global_free(vmw_mem_glob(dev_priv),
826 vmw_shader_size);
827 ret = -ENOMEM;
828 goto out_err;
829 }
830
831 res = &shader->res;
832
833 /*
834 * From here on, the destructor takes over resource freeing.
835 */
836 ret = vmw_gb_shader_init(dev_priv, res, shader_size,
d80efd5c 837 offset, shader_type, 0, 0, buffer,
18e4a466
TH
838 vmw_shader_free);
839
840out_err:
841 return ret ? ERR_PTR(ret) : res;
842}
843
844
d80efd5c
TH
845static int vmw_shader_define(struct drm_device *dev, struct drm_file *file_priv,
846 enum drm_vmw_shader_type shader_type_drm,
847 u32 buffer_handle, size_t size, size_t offset,
848 uint8_t num_input_sig, uint8_t num_output_sig,
849 uint32_t *shader_handle)
c74c162f
TH
850{
851 struct vmw_private *dev_priv = vmw_priv(dev);
c74c162f 852 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
c74c162f
TH
853 struct vmw_dma_buffer *buffer = NULL;
854 SVGA3dShaderType shader_type;
855 int ret;
856
d80efd5c
TH
857 if (buffer_handle != SVGA3D_INVALID_ID) {
858 ret = vmw_user_dmabuf_lookup(tfile, buffer_handle,
54c12bc3 859 &buffer, NULL);
c74c162f
TH
860 if (unlikely(ret != 0)) {
861 DRM_ERROR("Could not find buffer for shader "
862 "creation.\n");
863 return ret;
864 }
865
866 if ((u64)buffer->base.num_pages * PAGE_SIZE <
d80efd5c 867 (u64)size + (u64)offset) {
c74c162f
TH
868 DRM_ERROR("Illegal buffer- or shader size.\n");
869 ret = -EINVAL;
870 goto out_bad_arg;
871 }
872 }
873
d80efd5c 874 switch (shader_type_drm) {
c74c162f
TH
875 case drm_vmw_shader_type_vs:
876 shader_type = SVGA3D_SHADERTYPE_VS;
877 break;
878 case drm_vmw_shader_type_ps:
879 shader_type = SVGA3D_SHADERTYPE_PS;
880 break;
c74c162f
TH
881 default:
882 DRM_ERROR("Illegal shader type.\n");
883 ret = -EINVAL;
884 goto out_bad_arg;
885 }
886
294adf7d 887 ret = ttm_read_lock(&dev_priv->reservation_sem, true);
d5bde956
TH
888 if (unlikely(ret != 0))
889 goto out_bad_arg;
c74c162f 890
d80efd5c
TH
891 ret = vmw_user_shader_alloc(dev_priv, buffer, size, offset,
892 shader_type, num_input_sig,
893 num_output_sig, tfile, shader_handle);
c74c162f 894
294adf7d 895 ttm_read_unlock(&dev_priv->reservation_sem);
d5bde956
TH
896out_bad_arg:
897 vmw_dmabuf_unreference(&buffer);
898 return ret;
899}
900
901/**
d80efd5c 902 * vmw_shader_id_ok - Check whether a compat shader user key and
18e4a466 903 * shader type are within valid bounds.
d5bde956 904 *
18e4a466
TH
905 * @user_key: User space id of the shader.
906 * @shader_type: Shader type.
d5bde956 907 *
18e4a466 908 * Returns true if valid false if not.
d5bde956 909 */
d80efd5c 910static bool vmw_shader_id_ok(u32 user_key, SVGA3dShaderType shader_type)
d5bde956 911{
18e4a466 912 return user_key <= ((1 << 20) - 1) && (unsigned) shader_type < 16;
d5bde956 913}
c74c162f 914
d5bde956 915/**
d80efd5c 916 * vmw_shader_key - Compute a hash key suitable for a compat shader.
d5bde956 917 *
18e4a466
TH
918 * @user_key: User space id of the shader.
919 * @shader_type: Shader type.
d5bde956 920 *
18e4a466
TH
921 * Returns a hash key suitable for a command buffer managed resource
922 * manager hash table.
d5bde956 923 */
d80efd5c 924static u32 vmw_shader_key(u32 user_key, SVGA3dShaderType shader_type)
d5bde956 925{
18e4a466 926 return user_key | (shader_type << 20);
d5bde956 927}
c74c162f 928
d5bde956 929/**
d80efd5c 930 * vmw_shader_remove - Stage a compat shader for removal.
d5bde956 931 *
18e4a466 932 * @man: Pointer to the compat shader manager identifying the shader namespace.
d5bde956
TH
933 * @user_key: The key that is used to identify the shader. The key is
934 * unique to the shader type.
935 * @shader_type: Shader type.
18e4a466 936 * @list: Caller's list of staged command buffer resource actions.
d5bde956 937 */
d80efd5c
TH
938int vmw_shader_remove(struct vmw_cmdbuf_res_manager *man,
939 u32 user_key, SVGA3dShaderType shader_type,
940 struct list_head *list)
d5bde956 941{
d80efd5c
TH
942 struct vmw_resource *dummy;
943
944 if (!vmw_shader_id_ok(user_key, shader_type))
d5bde956 945 return -EINVAL;
c74c162f 946
d80efd5c
TH
947 return vmw_cmdbuf_res_remove(man, vmw_cmdbuf_res_shader,
948 vmw_shader_key(user_key, shader_type),
949 list, &dummy);
d5bde956
TH
950}
951
952/**
18e4a466
TH
953 * vmw_compat_shader_add - Create a compat shader and stage it for addition
954 * as a command buffer managed resource.
d5bde956 955 *
18e4a466 956 * @man: Pointer to the compat shader manager identifying the shader namespace.
d5bde956
TH
957 * @user_key: The key that is used to identify the shader. The key is
958 * unique to the shader type.
959 * @bytecode: Pointer to the bytecode of the shader.
960 * @shader_type: Shader type.
961 * @tfile: Pointer to a struct ttm_object_file that the guest-backed shader is
962 * to be created with.
18e4a466 963 * @list: Caller's list of staged command buffer resource actions.
d5bde956 964 *
d5bde956 965 */
18e4a466
TH
966int vmw_compat_shader_add(struct vmw_private *dev_priv,
967 struct vmw_cmdbuf_res_manager *man,
d5bde956
TH
968 u32 user_key, const void *bytecode,
969 SVGA3dShaderType shader_type,
970 size_t size,
d5bde956
TH
971 struct list_head *list)
972{
973 struct vmw_dma_buffer *buf;
974 struct ttm_bo_kmap_obj map;
975 bool is_iomem;
d5bde956 976 int ret;
18e4a466 977 struct vmw_resource *res;
d5bde956 978
d80efd5c 979 if (!vmw_shader_id_ok(user_key, shader_type))
d5bde956
TH
980 return -EINVAL;
981
982 /* Allocate and pin a DMA buffer */
983 buf = kzalloc(sizeof(*buf), GFP_KERNEL);
1a4adb05 984 if (unlikely(!buf))
d5bde956
TH
985 return -ENOMEM;
986
18e4a466 987 ret = vmw_dmabuf_init(dev_priv, buf, size, &vmw_sys_ne_placement,
d5bde956 988 true, vmw_dmabuf_bo_free);
c74c162f 989 if (unlikely(ret != 0))
d5bde956 990 goto out;
c74c162f 991
dfd5e50e 992 ret = ttm_bo_reserve(&buf->base, false, true, NULL);
d5bde956
TH
993 if (unlikely(ret != 0))
994 goto no_reserve;
c74c162f 995
d5bde956
TH
996 /* Map and copy shader bytecode. */
997 ret = ttm_bo_kmap(&buf->base, 0, PAGE_ALIGN(size) >> PAGE_SHIFT,
998 &map);
c74c162f 999 if (unlikely(ret != 0)) {
d5bde956
TH
1000 ttm_bo_unreserve(&buf->base);
1001 goto no_reserve;
c74c162f
TH
1002 }
1003
d5bde956
TH
1004 memcpy(ttm_kmap_obj_virtual(&map, &is_iomem), bytecode, size);
1005 WARN_ON(is_iomem);
1006
1007 ttm_bo_kunmap(&map);
1008 ret = ttm_bo_validate(&buf->base, &vmw_sys_placement, false, true);
1009 WARN_ON(ret != 0);
1010 ttm_bo_unreserve(&buf->base);
1011
18e4a466 1012 res = vmw_shader_alloc(dev_priv, buf, size, 0, shader_type);
d5bde956
TH
1013 if (unlikely(ret != 0))
1014 goto no_reserve;
d5bde956 1015
d80efd5c
TH
1016 ret = vmw_cmdbuf_res_add(man, vmw_cmdbuf_res_shader,
1017 vmw_shader_key(user_key, shader_type),
18e4a466
TH
1018 res, list);
1019 vmw_resource_unreference(&res);
d5bde956 1020no_reserve:
18e4a466 1021 vmw_dmabuf_unreference(&buf);
d5bde956 1022out:
c74c162f 1023 return ret;
d5bde956
TH
1024}
1025
1026/**
d80efd5c 1027 * vmw_shader_lookup - Look up a compat shader
d5bde956 1028 *
18e4a466
TH
1029 * @man: Pointer to the command buffer managed resource manager identifying
1030 * the shader namespace.
1031 * @user_key: The user space id of the shader.
1032 * @shader_type: The shader type.
d5bde956 1033 *
18e4a466
TH
1034 * Returns a refcounted pointer to a struct vmw_resource if the shader was
1035 * found. An error pointer otherwise.
d5bde956 1036 */
18e4a466 1037struct vmw_resource *
d80efd5c
TH
1038vmw_shader_lookup(struct vmw_cmdbuf_res_manager *man,
1039 u32 user_key,
1040 SVGA3dShaderType shader_type)
d5bde956 1041{
d80efd5c 1042 if (!vmw_shader_id_ok(user_key, shader_type))
18e4a466 1043 return ERR_PTR(-EINVAL);
c74c162f 1044
d80efd5c
TH
1045 return vmw_cmdbuf_res_lookup(man, vmw_cmdbuf_res_shader,
1046 vmw_shader_key(user_key, shader_type));
1047}
1048
1049int vmw_shader_define_ioctl(struct drm_device *dev, void *data,
1050 struct drm_file *file_priv)
1051{
1052 struct drm_vmw_shader_create_arg *arg =
1053 (struct drm_vmw_shader_create_arg *)data;
1054
1055 return vmw_shader_define(dev, file_priv, arg->shader_type,
1056 arg->buffer_handle,
1057 arg->size, arg->offset,
1058 0, 0,
1059 &arg->shader_handle);
c74c162f 1060}