]> git.proxmox.com Git - mirror_ubuntu-focal-kernel.git/blame - drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c
drm: Add old state pointer to CRTC .enable() helper function
[mirror_ubuntu-focal-kernel.git] / drivers / gpu / drm / vmwgfx / vmwgfx_stdu.c
CommitLineData
35c05125
SY
1/******************************************************************************
2 *
54fbde8a 3 * COPYRIGHT © 2014-2015 VMware, Inc., Palo Alto, CA., USA
35c05125
SY
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 ******************************************************************************/
27
28#include "vmwgfx_kms.h"
8ce75f8a 29#include "device_include/svga3d_surfacedefs.h"
35c05125 30#include <drm/drm_plane_helper.h>
d7721ca7
SY
31#include <drm/drm_atomic.h>
32#include <drm/drm_atomic_helper.h>
33
35c05125
SY
34
35#define vmw_crtc_to_stdu(x) \
36 container_of(x, struct vmw_screen_target_display_unit, base.crtc)
37#define vmw_encoder_to_stdu(x) \
38 container_of(x, struct vmw_screen_target_display_unit, base.encoder)
39#define vmw_connector_to_stdu(x) \
40 container_of(x, struct vmw_screen_target_display_unit, base.connector)
41
42
43
44enum stdu_content_type {
45 SAME_AS_DISPLAY = 0,
46 SEPARATE_SURFACE,
47 SEPARATE_DMA
48};
49
6bf6bf03
TH
50/**
51 * struct vmw_stdu_dirty - closure structure for the update functions
52 *
53 * @base: The base type we derive from. Used by vmw_kms_helper_dirty().
54 * @transfer: Transfer direction for DMA command.
55 * @left: Left side of bounding box.
56 * @right: Right side of bounding box.
57 * @top: Top side of bounding box.
58 * @bottom: Bottom side of bounding box.
a1ac6339
SY
59 * @fb_left: Left side of the framebuffer/content bounding box
60 * @fb_top: Top of the framebuffer/content bounding box
6bf6bf03
TH
61 * @buf: DMA buffer when DMA-ing between buffer and screen targets.
62 * @sid: Surface ID when copying between surface and screen targets.
63 */
64struct vmw_stdu_dirty {
65 struct vmw_kms_dirty base;
66 SVGA3dTransferType transfer;
67 s32 left, right, top, bottom;
a1ac6339 68 s32 fb_left, fb_top;
6bf6bf03
TH
69 u32 pitch;
70 union {
71 struct vmw_dma_buffer *buf;
72 u32 sid;
73 };
74};
75
76/*
77 * SVGA commands that are used by this code. Please see the device headers
78 * for explanation.
79 */
80struct vmw_stdu_update {
81 SVGA3dCmdHeader header;
82 SVGA3dCmdUpdateGBScreenTarget body;
83};
84
85struct vmw_stdu_dma {
86 SVGA3dCmdHeader header;
87 SVGA3dCmdSurfaceDMA body;
88};
89
90struct vmw_stdu_surface_copy {
91 SVGA3dCmdHeader header;
92 SVGA3dCmdSurfaceCopy body;
93};
35c05125
SY
94
95
96/**
97 * struct vmw_screen_target_display_unit
98 *
99 * @base: VMW specific DU structure
100 * @display_srf: surface to be displayed. The dimension of this will always
101 * match the display mode. If the display mode matches
102 * content_vfbs dimensions, then this is a pointer into the
103 * corresponding field in content_vfbs. If not, then this
104 * is a separate buffer to which content_vfbs will blit to.
35c05125
SY
105 * @content_type: content_fb type
106 * @defined: true if the current display unit has been initialized
107 */
108struct vmw_screen_target_display_unit {
109 struct vmw_display_unit base;
904bb5e5 110 const struct vmw_surface *display_srf;
35c05125 111 enum stdu_content_type content_fb_type;
9aa8dcab 112 s32 display_width, display_height;
35c05125
SY
113
114 bool defined;
810b3e16
SY
115
116 /* For CPU Blit */
117 struct ttm_bo_kmap_obj host_map, guest_map;
118 unsigned int cpp;
35c05125
SY
119};
120
121
122
123static void vmw_stdu_destroy(struct vmw_screen_target_display_unit *stdu);
124
125
126
35c05125
SY
127/******************************************************************************
128 * Screen Target Display Unit CRTC Functions
129 *****************************************************************************/
130
131
132/**
133 * vmw_stdu_crtc_destroy - cleans up the STDU
134 *
135 * @crtc: used to get a reference to the containing STDU
136 */
137static void vmw_stdu_crtc_destroy(struct drm_crtc *crtc)
138{
139 vmw_stdu_destroy(vmw_crtc_to_stdu(crtc));
140}
141
35c05125
SY
142/**
143 * vmw_stdu_define_st - Defines a Screen Target
144 *
145 * @dev_priv: VMW DRM device
146 * @stdu: display unit to create a Screen Target for
b1097aeb
TH
147 * @mode: The mode to set.
148 * @crtc_x: X coordinate of screen target relative to framebuffer origin.
149 * @crtc_y: Y coordinate of screen target relative to framebuffer origin.
35c05125
SY
150 *
151 * Creates a STDU that we can used later. This function is called whenever the
152 * framebuffer size changes.
153 *
154 * RETURNs:
155 * 0 on success, error code on failure
156 */
157static int vmw_stdu_define_st(struct vmw_private *dev_priv,
b1097aeb
TH
158 struct vmw_screen_target_display_unit *stdu,
159 struct drm_display_mode *mode,
160 int crtc_x, int crtc_y)
35c05125
SY
161{
162 struct {
163 SVGA3dCmdHeader header;
164 SVGA3dCmdDefineGBScreenTarget body;
165 } *cmd;
166
167 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
168
169 if (unlikely(cmd == NULL)) {
170 DRM_ERROR("Out of FIFO space defining Screen Target\n");
171 return -ENOMEM;
172 }
173
174 cmd->header.id = SVGA_3D_CMD_DEFINE_GB_SCREENTARGET;
175 cmd->header.size = sizeof(cmd->body);
176
177 cmd->body.stid = stdu->base.unit;
b1097aeb
TH
178 cmd->body.width = mode->hdisplay;
179 cmd->body.height = mode->vdisplay;
35c05125
SY
180 cmd->body.flags = (0 == cmd->body.stid) ? SVGA_STFLAG_PRIMARY : 0;
181 cmd->body.dpi = 0;
b1097aeb
TH
182 if (stdu->base.is_implicit) {
183 cmd->body.xRoot = crtc_x;
184 cmd->body.yRoot = crtc_y;
185 } else {
35c05125
SY
186 cmd->body.xRoot = stdu->base.gui_x;
187 cmd->body.yRoot = stdu->base.gui_y;
188 }
6dd687b4
TH
189 stdu->base.set_gui_x = cmd->body.xRoot;
190 stdu->base.set_gui_y = cmd->body.yRoot;
35c05125
SY
191
192 vmw_fifo_commit(dev_priv, sizeof(*cmd));
193
194 stdu->defined = true;
9aa8dcab
SY
195 stdu->display_width = mode->hdisplay;
196 stdu->display_height = mode->vdisplay;
35c05125
SY
197
198 return 0;
199}
200
201
202
203/**
204 * vmw_stdu_bind_st - Binds a surface to a Screen Target
205 *
206 * @dev_priv: VMW DRM device
207 * @stdu: display unit affected
208 * @res: Buffer to bind to the screen target. Set to NULL to blank screen.
209 *
210 * Binding a surface to a Screen Target the same as flipping
211 */
212static int vmw_stdu_bind_st(struct vmw_private *dev_priv,
213 struct vmw_screen_target_display_unit *stdu,
904bb5e5 214 const struct vmw_resource *res)
35c05125
SY
215{
216 SVGA3dSurfaceImageId image;
217
218 struct {
219 SVGA3dCmdHeader header;
220 SVGA3dCmdBindGBScreenTarget body;
221 } *cmd;
222
223
224 if (!stdu->defined) {
225 DRM_ERROR("No screen target defined\n");
226 return -EINVAL;
227 }
228
229 /* Set up image using information in vfb */
230 memset(&image, 0, sizeof(image));
231 image.sid = res ? res->id : SVGA3D_INVALID_ID;
232
233 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
234
235 if (unlikely(cmd == NULL)) {
236 DRM_ERROR("Out of FIFO space binding a screen target\n");
237 return -ENOMEM;
238 }
239
240 cmd->header.id = SVGA_3D_CMD_BIND_GB_SCREENTARGET;
241 cmd->header.size = sizeof(cmd->body);
242
243 cmd->body.stid = stdu->base.unit;
244 cmd->body.image = image;
245
246 vmw_fifo_commit(dev_priv, sizeof(*cmd));
247
248 return 0;
249}
250
6bf6bf03
TH
251/**
252 * vmw_stdu_populate_update - populate an UPDATE_GB_SCREENTARGET command with a
253 * bounding box.
254 *
255 * @cmd: Pointer to command stream.
256 * @unit: Screen target unit.
257 * @left: Left side of bounding box.
258 * @right: Right side of bounding box.
259 * @top: Top side of bounding box.
260 * @bottom: Bottom side of bounding box.
261 */
262static void vmw_stdu_populate_update(void *cmd, int unit,
263 s32 left, s32 right, s32 top, s32 bottom)
264{
265 struct vmw_stdu_update *update = cmd;
266
267 update->header.id = SVGA_3D_CMD_UPDATE_GB_SCREENTARGET;
268 update->header.size = sizeof(update->body);
35c05125 269
6bf6bf03
TH
270 update->body.stid = unit;
271 update->body.rect.x = left;
272 update->body.rect.y = top;
273 update->body.rect.w = right - left;
274 update->body.rect.h = bottom - top;
275}
35c05125
SY
276
277/**
6bf6bf03 278 * vmw_stdu_update_st - Full update of a Screen Target
35c05125
SY
279 *
280 * @dev_priv: VMW DRM device
35c05125 281 * @stdu: display unit affected
35c05125
SY
282 *
283 * This function needs to be called whenever the content of a screen
6bf6bf03
TH
284 * target has changed completely. Typically as a result of a backing
285 * surface change.
35c05125
SY
286 *
287 * RETURNS:
288 * 0 on success, error code on failure
289 */
290static int vmw_stdu_update_st(struct vmw_private *dev_priv,
6bf6bf03 291 struct vmw_screen_target_display_unit *stdu)
35c05125 292{
6bf6bf03 293 struct vmw_stdu_update *cmd;
35c05125
SY
294
295 if (!stdu->defined) {
296 DRM_ERROR("No screen target defined");
297 return -EINVAL;
298 }
299
35c05125
SY
300 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
301
302 if (unlikely(cmd == NULL)) {
303 DRM_ERROR("Out of FIFO space updating a Screen Target\n");
304 return -ENOMEM;
305 }
306
9aa8dcab
SY
307 vmw_stdu_populate_update(cmd, stdu->base.unit,
308 0, stdu->display_width,
309 0, stdu->display_height);
35c05125
SY
310
311 vmw_fifo_commit(dev_priv, sizeof(*cmd));
312
313 return 0;
314}
315
316
317
318/**
319 * vmw_stdu_destroy_st - Destroy a Screen Target
320 *
321 * @dev_priv: VMW DRM device
322 * @stdu: display unit to destroy
323 */
324static int vmw_stdu_destroy_st(struct vmw_private *dev_priv,
325 struct vmw_screen_target_display_unit *stdu)
326{
327 int ret;
328
329 struct {
330 SVGA3dCmdHeader header;
331 SVGA3dCmdDestroyGBScreenTarget body;
332 } *cmd;
333
334
335 /* Nothing to do if not successfully defined */
336 if (unlikely(!stdu->defined))
337 return 0;
338
339 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
340
341 if (unlikely(cmd == NULL)) {
342 DRM_ERROR("Out of FIFO space, screen target not destroyed\n");
343 return -ENOMEM;
344 }
345
346 cmd->header.id = SVGA_3D_CMD_DESTROY_GB_SCREENTARGET;
347 cmd->header.size = sizeof(cmd->body);
348
349 cmd->body.stid = stdu->base.unit;
350
351 vmw_fifo_commit(dev_priv, sizeof(*cmd));
352
353 /* Force sync */
354 ret = vmw_fallback_wait(dev_priv, false, true, 0, false, 3*HZ);
355 if (unlikely(ret != 0))
356 DRM_ERROR("Failed to sync with HW");
357
358 stdu->defined = false;
9aa8dcab
SY
359 stdu->display_width = 0;
360 stdu->display_height = 0;
35c05125
SY
361
362 return ret;
363}
364
06ec4190
SY
365
366/**
367 * vmw_stdu_crtc_mode_set_nofb - Updates screen target size
368 *
369 * @crtc: CRTC associated with the screen target
370 *
371 * This function defines/destroys a screen target
372 *
373 */
374static void vmw_stdu_crtc_mode_set_nofb(struct drm_crtc *crtc)
375{
376 struct vmw_private *dev_priv;
377 struct vmw_screen_target_display_unit *stdu;
378 int ret;
379
380
381 stdu = vmw_crtc_to_stdu(crtc);
382 dev_priv = vmw_priv(crtc->dev);
383
384 if (stdu->defined) {
385 ret = vmw_stdu_bind_st(dev_priv, stdu, NULL);
386 if (ret)
387 DRM_ERROR("Failed to blank CRTC\n");
388
389 (void) vmw_stdu_update_st(dev_priv, stdu);
390
391 ret = vmw_stdu_destroy_st(dev_priv, stdu);
392 if (ret)
393 DRM_ERROR("Failed to destroy Screen Target\n");
394
395 stdu->content_fb_type = SAME_AS_DISPLAY;
396 }
397
398 if (!crtc->state->enable)
399 return;
400
401 vmw_svga_enable(dev_priv);
402 ret = vmw_stdu_define_st(dev_priv, stdu, &crtc->mode, crtc->x, crtc->y);
403
404 if (ret)
405 DRM_ERROR("Failed to define Screen Target of size %dx%d\n",
406 crtc->x, crtc->y);
407}
408
409
410static void vmw_stdu_crtc_helper_prepare(struct drm_crtc *crtc)
411{
412}
413
414
0b20a0f8
LP
415static void vmw_stdu_crtc_atomic_enable(struct drm_crtc *crtc,
416 struct drm_crtc_state *old_state)
06ec4190
SY
417{
418 struct vmw_private *dev_priv;
419 struct vmw_screen_target_display_unit *stdu;
420 struct vmw_framebuffer *vfb;
421 struct drm_framebuffer *fb;
422
423
424 stdu = vmw_crtc_to_stdu(crtc);
425 dev_priv = vmw_priv(crtc->dev);
426 fb = crtc->primary->fb;
427
428 vfb = (fb) ? vmw_framebuffer_to_vfb(fb) : NULL;
429
430 if (vfb)
431 vmw_kms_add_active(dev_priv, &stdu->base, vfb);
432 else
433 vmw_kms_del_active(dev_priv, &stdu->base);
434}
435
436static void vmw_stdu_crtc_helper_disable(struct drm_crtc *crtc)
437{
438 struct vmw_private *dev_priv;
439 struct vmw_screen_target_display_unit *stdu;
440 int ret;
441
442
443 if (!crtc) {
444 DRM_ERROR("CRTC is NULL\n");
445 return;
446 }
447
448 stdu = vmw_crtc_to_stdu(crtc);
449 dev_priv = vmw_priv(crtc->dev);
450
451 if (stdu->defined) {
452 ret = vmw_stdu_bind_st(dev_priv, stdu, NULL);
453 if (ret)
454 DRM_ERROR("Failed to blank CRTC\n");
455
456 (void) vmw_stdu_update_st(dev_priv, stdu);
457
458 ret = vmw_stdu_destroy_st(dev_priv, stdu);
459 if (ret)
460 DRM_ERROR("Failed to destroy Screen Target\n");
461
462 stdu->content_fb_type = SAME_AS_DISPLAY;
463 }
464}
465
35c05125
SY
466/**
467 * vmw_stdu_crtc_page_flip - Binds a buffer to a screen target
468 *
469 * @crtc: CRTC to attach FB to
470 * @fb: FB to attach
471 * @event: Event to be posted. This event should've been alloced
472 * using k[mz]alloc, and should've been completely initialized.
473 * @page_flip_flags: Input flags.
474 *
475 * If the STDU uses the same display and content buffers, i.e. a true flip,
476 * this function will replace the existing display buffer with the new content
477 * buffer.
478 *
479 * If the STDU uses different display and content buffers, i.e. a blit, then
480 * only the content buffer will be updated.
481 *
482 * RETURNS:
483 * 0 on success, error code on failure
484 */
485static int vmw_stdu_crtc_page_flip(struct drm_crtc *crtc,
486 struct drm_framebuffer *new_fb,
487 struct drm_pending_vblank_event *event,
41292b1f
DV
488 uint32_t flags,
489 struct drm_modeset_acquire_ctx *ctx)
35c05125
SY
490
491{
492 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
904bb5e5 493 struct vmw_screen_target_display_unit *stdu = vmw_crtc_to_stdu(crtc);
b1097aeb 494 struct vmw_framebuffer *vfb = vmw_framebuffer_to_vfb(new_fb);
904bb5e5 495 struct drm_vmw_rect vclips;
35c05125
SY
496 int ret;
497
35c05125
SY
498 dev_priv = vmw_priv(crtc->dev);
499 stdu = vmw_crtc_to_stdu(crtc);
35c05125 500
4d492a07 501 if (!stdu->defined || !vmw_kms_crtc_flippable(dev_priv, crtc))
b1097aeb 502 return -EINVAL;
35c05125 503
904bb5e5
SY
504 /*
505 * We're always async, but the helper doesn't know how to set async
506 * so lie to the helper. Also, the helper expects someone
507 * to pick the event up from the crtc state, and if nobody does,
508 * it will free it. Since we handle the event in this function,
509 * don't hand it to the helper.
510 */
511 flags &= ~DRM_MODE_PAGE_FLIP_ASYNC;
320d8c3d 512 ret = drm_atomic_helper_page_flip(crtc, new_fb, NULL, flags, ctx);
904bb5e5
SY
513 if (ret) {
514 DRM_ERROR("Page flip error %d.\n", ret);
b1097aeb 515 return ret;
904bb5e5 516 }
35c05125 517
4d492a07
TH
518 if (stdu->base.is_implicit)
519 vmw_kms_update_implicit_fb(dev_priv, crtc);
520
904bb5e5
SY
521 /*
522 * Now that we've bound a new surface to the screen target,
523 * update the contents.
524 */
b1097aeb
TH
525 vclips.x = crtc->x;
526 vclips.y = crtc->y;
527 vclips.w = crtc->mode.hdisplay;
528 vclips.h = crtc->mode.vdisplay;
904bb5e5 529
b1097aeb
TH
530 if (vfb->dmabuf)
531 ret = vmw_kms_stdu_dma(dev_priv, NULL, vfb, NULL, NULL, &vclips,
532 1, 1, true, false);
533 else
534 ret = vmw_kms_stdu_surface_dirty(dev_priv, vfb, NULL, &vclips,
535 NULL, 0, 0, 1, 1, NULL);
904bb5e5
SY
536 if (ret) {
537 DRM_ERROR("Page flip update error %d.\n", ret);
35c05125 538 return ret;
904bb5e5 539 }
35c05125
SY
540
541 if (event) {
542 struct vmw_fence_obj *fence = NULL;
6bf6bf03 543 struct drm_file *file_priv = event->base.file_priv;
35c05125
SY
544
545 vmw_execbuf_fence_commands(NULL, dev_priv, &fence, NULL);
546 if (!fence)
547 return -ENOMEM;
548
549 ret = vmw_event_fence_action_queue(file_priv, fence,
550 &event->base,
551 &event->event.tv_sec,
552 &event->event.tv_usec,
553 true);
554 vmw_fence_obj_unreference(&fence);
4e0858a6 555 } else {
904bb5e5 556 (void) vmw_fifo_flush(dev_priv, false);
35c05125
SY
557 }
558
b1097aeb 559 return 0;
35c05125
SY
560}
561
562
6bf6bf03
TH
563/**
564 * vmw_stdu_dmabuf_clip - Callback to encode a suface DMA command cliprect
565 *
566 * @dirty: The closure structure.
567 *
568 * Encodes a surface DMA command cliprect and updates the bounding box
569 * for the DMA.
570 */
571static void vmw_stdu_dmabuf_clip(struct vmw_kms_dirty *dirty)
572{
573 struct vmw_stdu_dirty *ddirty =
574 container_of(dirty, struct vmw_stdu_dirty, base);
575 struct vmw_stdu_dma *cmd = dirty->cmd;
576 struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1];
577
578 blit += dirty->num_hits;
579 blit->srcx = dirty->fb_x;
580 blit->srcy = dirty->fb_y;
581 blit->x = dirty->unit_x1;
582 blit->y = dirty->unit_y1;
583 blit->d = 1;
584 blit->w = dirty->unit_x2 - dirty->unit_x1;
585 blit->h = dirty->unit_y2 - dirty->unit_y1;
586 dirty->num_hits++;
587
588 if (ddirty->transfer != SVGA3D_WRITE_HOST_VRAM)
589 return;
590
591 /* Destination bounding box */
592 ddirty->left = min_t(s32, ddirty->left, dirty->unit_x1);
593 ddirty->top = min_t(s32, ddirty->top, dirty->unit_y1);
594 ddirty->right = max_t(s32, ddirty->right, dirty->unit_x2);
595 ddirty->bottom = max_t(s32, ddirty->bottom, dirty->unit_y2);
596}
597
598/**
599 * vmw_stdu_dmabuf_fifo_commit - Callback to fill in and submit a DMA command.
600 *
601 * @dirty: The closure structure.
602 *
603 * Fills in the missing fields in a DMA command, and optionally encodes
604 * a screen target update command, depending on transfer direction.
605 */
606static void vmw_stdu_dmabuf_fifo_commit(struct vmw_kms_dirty *dirty)
607{
608 struct vmw_stdu_dirty *ddirty =
609 container_of(dirty, struct vmw_stdu_dirty, base);
610 struct vmw_screen_target_display_unit *stdu =
611 container_of(dirty->unit, typeof(*stdu), base);
612 struct vmw_stdu_dma *cmd = dirty->cmd;
613 struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1];
614 SVGA3dCmdSurfaceDMASuffix *suffix =
615 (SVGA3dCmdSurfaceDMASuffix *) &blit[dirty->num_hits];
616 size_t blit_size = sizeof(*blit) * dirty->num_hits + sizeof(*suffix);
617
618 if (!dirty->num_hits) {
619 vmw_fifo_commit(dirty->dev_priv, 0);
620 return;
621 }
622
623 cmd->header.id = SVGA_3D_CMD_SURFACE_DMA;
624 cmd->header.size = sizeof(cmd->body) + blit_size;
625 vmw_bo_get_guest_ptr(&ddirty->buf->base, &cmd->body.guest.ptr);
626 cmd->body.guest.pitch = ddirty->pitch;
627 cmd->body.host.sid = stdu->display_srf->res.id;
628 cmd->body.host.face = 0;
629 cmd->body.host.mipmap = 0;
630 cmd->body.transfer = ddirty->transfer;
631 suffix->suffixSize = sizeof(*suffix);
632 suffix->maximumOffset = ddirty->buf->base.num_pages * PAGE_SIZE;
633
634 if (ddirty->transfer == SVGA3D_WRITE_HOST_VRAM) {
635 blit_size += sizeof(struct vmw_stdu_update);
636
637 vmw_stdu_populate_update(&suffix[1], stdu->base.unit,
638 ddirty->left, ddirty->right,
639 ddirty->top, ddirty->bottom);
640 }
641
642 vmw_fifo_commit(dirty->dev_priv, sizeof(*cmd) + blit_size);
643
644 ddirty->left = ddirty->top = S32_MAX;
645 ddirty->right = ddirty->bottom = S32_MIN;
646}
647
810b3e16
SY
648
649/**
650 * vmw_stdu_dmabuf_cpu_clip - Callback to encode a CPU blit
651 *
652 * @dirty: The closure structure.
653 *
a1ac6339 654 * This function calculates the bounding box for all the incoming clips.
810b3e16
SY
655 */
656static void vmw_stdu_dmabuf_cpu_clip(struct vmw_kms_dirty *dirty)
657{
658 struct vmw_stdu_dirty *ddirty =
659 container_of(dirty, struct vmw_stdu_dirty, base);
660
661 dirty->num_hits = 1;
662
a1ac6339 663 /* Calculate destination bounding box */
810b3e16
SY
664 ddirty->left = min_t(s32, ddirty->left, dirty->unit_x1);
665 ddirty->top = min_t(s32, ddirty->top, dirty->unit_y1);
666 ddirty->right = max_t(s32, ddirty->right, dirty->unit_x2);
667 ddirty->bottom = max_t(s32, ddirty->bottom, dirty->unit_y2);
a1ac6339
SY
668
669 /*
670 * Calculate content bounding box. We only need the top-left
671 * coordinate because width and height will be the same as the
672 * destination bounding box above
673 */
674 ddirty->fb_left = min_t(s32, ddirty->fb_left, dirty->fb_x);
675 ddirty->fb_top = min_t(s32, ddirty->fb_top, dirty->fb_y);
810b3e16
SY
676}
677
678
679/**
680 * vmw_stdu_dmabuf_cpu_commit - Callback to do a CPU blit from DMAbuf
681 *
682 * @dirty: The closure structure.
683 *
684 * For the special case when we cannot create a proxy surface in a
685 * 2D VM, we have to do a CPU blit ourselves.
686 */
687static void vmw_stdu_dmabuf_cpu_commit(struct vmw_kms_dirty *dirty)
688{
689 struct vmw_stdu_dirty *ddirty =
690 container_of(dirty, struct vmw_stdu_dirty, base);
691 struct vmw_screen_target_display_unit *stdu =
692 container_of(dirty->unit, typeof(*stdu), base);
693 s32 width, height;
694 s32 src_pitch, dst_pitch;
695 u8 *src, *dst;
696 bool not_used;
697
698
699 if (!dirty->num_hits)
700 return;
701
702 width = ddirty->right - ddirty->left;
703 height = ddirty->bottom - ddirty->top;
704
705 if (width == 0 || height == 0)
706 return;
707
708
709 /* Assume we are blitting from Host (display_srf) to Guest (dmabuf) */
710 src_pitch = stdu->display_srf->base_size.width * stdu->cpp;
711 src = ttm_kmap_obj_virtual(&stdu->host_map, &not_used);
a1ac6339 712 src += ddirty->top * src_pitch + ddirty->left * stdu->cpp;
810b3e16
SY
713
714 dst_pitch = ddirty->pitch;
715 dst = ttm_kmap_obj_virtual(&stdu->guest_map, &not_used);
a1ac6339 716 dst += ddirty->fb_top * dst_pitch + ddirty->fb_left * stdu->cpp;
810b3e16
SY
717
718
719 /* Figure out the real direction */
720 if (ddirty->transfer == SVGA3D_WRITE_HOST_VRAM) {
721 u8 *tmp;
722 s32 tmp_pitch;
723
724 tmp = src;
725 tmp_pitch = src_pitch;
726
727 src = dst;
728 src_pitch = dst_pitch;
729
730 dst = tmp;
731 dst_pitch = tmp_pitch;
732 }
733
734 /* CPU Blit */
735 while (height-- > 0) {
736 memcpy(dst, src, width * stdu->cpp);
737 dst += dst_pitch;
738 src += src_pitch;
739 }
740
741 if (ddirty->transfer == SVGA3D_WRITE_HOST_VRAM) {
742 struct vmw_private *dev_priv;
743 struct vmw_stdu_update *cmd;
744 struct drm_clip_rect region;
745 int ret;
746
747 /* We are updating the actual surface, not a proxy */
748 region.x1 = ddirty->left;
749 region.x2 = ddirty->right;
750 region.y1 = ddirty->top;
751 region.y2 = ddirty->bottom;
752 ret = vmw_kms_update_proxy(
753 (struct vmw_resource *) &stdu->display_srf->res,
754 (const struct drm_clip_rect *) &region, 1, 1);
755 if (ret)
756 goto out_cleanup;
757
758
759 dev_priv = vmw_priv(stdu->base.crtc.dev);
760 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
761
762 if (!cmd) {
763 DRM_ERROR("Cannot reserve FIFO space to update STDU");
764 goto out_cleanup;
765 }
766
767 vmw_stdu_populate_update(cmd, stdu->base.unit,
768 ddirty->left, ddirty->right,
769 ddirty->top, ddirty->bottom);
770
771 vmw_fifo_commit(dev_priv, sizeof(*cmd));
772 }
773
774out_cleanup:
a1ac6339 775 ddirty->left = ddirty->top = ddirty->fb_left = ddirty->fb_top = S32_MAX;
810b3e16
SY
776 ddirty->right = ddirty->bottom = S32_MIN;
777}
778
6bf6bf03
TH
779/**
780 * vmw_kms_stdu_dma - Perform a DMA transfer between a dma-buffer backed
781 * framebuffer and the screen target system.
782 *
783 * @dev_priv: Pointer to the device private structure.
784 * @file_priv: Pointer to a struct drm-file identifying the caller. May be
785 * set to NULL, but then @user_fence_rep must also be set to NULL.
786 * @vfb: Pointer to the dma-buffer backed framebuffer.
787 * @clips: Array of clip rects. Either @clips or @vclips must be NULL.
788 * @vclips: Alternate array of clip rects. Either @clips or @vclips must
789 * be NULL.
790 * @num_clips: Number of clip rects in @clips or @vclips.
791 * @increment: Increment to use when looping over @clips or @vclips.
792 * @to_surface: Whether to DMA to the screen target system as opposed to
793 * from the screen target system.
794 * @interruptible: Whether to perform waits interruptible if possible.
795 *
796 * If DMA-ing till the screen target system, the function will also notify
797 * the screen target system that a bounding box of the cliprects has been
798 * updated.
799 * Returns 0 on success, negative error code on failure. -ERESTARTSYS if
800 * interrupted.
801 */
802int vmw_kms_stdu_dma(struct vmw_private *dev_priv,
803 struct drm_file *file_priv,
804 struct vmw_framebuffer *vfb,
805 struct drm_vmw_fence_rep __user *user_fence_rep,
806 struct drm_clip_rect *clips,
807 struct drm_vmw_rect *vclips,
808 uint32_t num_clips,
809 int increment,
810 bool to_surface,
811 bool interruptible)
812{
813 struct vmw_dma_buffer *buf =
814 container_of(vfb, struct vmw_framebuffer_dmabuf, base)->buffer;
815 struct vmw_stdu_dirty ddirty;
816 int ret;
817
818 ret = vmw_kms_helper_buffer_prepare(dev_priv, buf, interruptible,
819 false);
820 if (ret)
821 return ret;
822
823 ddirty.transfer = (to_surface) ? SVGA3D_WRITE_HOST_VRAM :
824 SVGA3D_READ_HOST_VRAM;
825 ddirty.left = ddirty.top = S32_MAX;
826 ddirty.right = ddirty.bottom = S32_MIN;
a1ac6339 827 ddirty.fb_left = ddirty.fb_top = S32_MAX;
6bf6bf03
TH
828 ddirty.pitch = vfb->base.pitches[0];
829 ddirty.buf = buf;
830 ddirty.base.fifo_commit = vmw_stdu_dmabuf_fifo_commit;
831 ddirty.base.clip = vmw_stdu_dmabuf_clip;
832 ddirty.base.fifo_reserve_size = sizeof(struct vmw_stdu_dma) +
833 num_clips * sizeof(SVGA3dCopyBox) +
834 sizeof(SVGA3dCmdSurfaceDMASuffix);
835 if (to_surface)
836 ddirty.base.fifo_reserve_size += sizeof(struct vmw_stdu_update);
837
810b3e16
SY
838 /* 2D VMs cannot use SVGA_3D_CMD_SURFACE_DMA so do CPU blit instead */
839 if (!(dev_priv->capabilities & SVGA_CAP_3D)) {
840 ddirty.base.fifo_commit = vmw_stdu_dmabuf_cpu_commit;
841 ddirty.base.clip = vmw_stdu_dmabuf_cpu_clip;
842 ddirty.base.fifo_reserve_size = 0;
843 }
844
6bf6bf03
TH
845 ret = vmw_kms_helper_dirty(dev_priv, vfb, clips, vclips,
846 0, 0, num_clips, increment, &ddirty.base);
847 vmw_kms_helper_buffer_finish(dev_priv, file_priv, buf, NULL,
848 user_fence_rep);
849
850 return ret;
851}
852
853/**
854 * vmw_stdu_surface_clip - Callback to encode a surface copy command cliprect
855 *
856 * @dirty: The closure structure.
857 *
858 * Encodes a surface copy command cliprect and updates the bounding box
859 * for the copy.
860 */
861static void vmw_kms_stdu_surface_clip(struct vmw_kms_dirty *dirty)
862{
863 struct vmw_stdu_dirty *sdirty =
864 container_of(dirty, struct vmw_stdu_dirty, base);
865 struct vmw_stdu_surface_copy *cmd = dirty->cmd;
866 struct vmw_screen_target_display_unit *stdu =
867 container_of(dirty->unit, typeof(*stdu), base);
868
869 if (sdirty->sid != stdu->display_srf->res.id) {
870 struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1];
871
872 blit += dirty->num_hits;
873 blit->srcx = dirty->fb_x;
874 blit->srcy = dirty->fb_y;
875 blit->x = dirty->unit_x1;
876 blit->y = dirty->unit_y1;
877 blit->d = 1;
878 blit->w = dirty->unit_x2 - dirty->unit_x1;
879 blit->h = dirty->unit_y2 - dirty->unit_y1;
880 }
881
882 dirty->num_hits++;
883
884 /* Destination bounding box */
885 sdirty->left = min_t(s32, sdirty->left, dirty->unit_x1);
886 sdirty->top = min_t(s32, sdirty->top, dirty->unit_y1);
887 sdirty->right = max_t(s32, sdirty->right, dirty->unit_x2);
888 sdirty->bottom = max_t(s32, sdirty->bottom, dirty->unit_y2);
889}
890
891/**
892 * vmw_stdu_surface_fifo_commit - Callback to fill in and submit a surface
893 * copy command.
894 *
895 * @dirty: The closure structure.
896 *
897 * Fills in the missing fields in a surface copy command, and encodes a screen
898 * target update command.
899 */
900static void vmw_kms_stdu_surface_fifo_commit(struct vmw_kms_dirty *dirty)
901{
902 struct vmw_stdu_dirty *sdirty =
903 container_of(dirty, struct vmw_stdu_dirty, base);
904 struct vmw_screen_target_display_unit *stdu =
905 container_of(dirty->unit, typeof(*stdu), base);
906 struct vmw_stdu_surface_copy *cmd = dirty->cmd;
907 struct vmw_stdu_update *update;
908 size_t blit_size = sizeof(SVGA3dCopyBox) * dirty->num_hits;
909 size_t commit_size;
910
911 if (!dirty->num_hits) {
912 vmw_fifo_commit(dirty->dev_priv, 0);
913 return;
914 }
915
916 if (sdirty->sid != stdu->display_srf->res.id) {
917 struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1];
918
919 cmd->header.id = SVGA_3D_CMD_SURFACE_COPY;
920 cmd->header.size = sizeof(cmd->body) + blit_size;
921 cmd->body.src.sid = sdirty->sid;
922 cmd->body.dest.sid = stdu->display_srf->res.id;
923 update = (struct vmw_stdu_update *) &blit[dirty->num_hits];
924 commit_size = sizeof(*cmd) + blit_size + sizeof(*update);
925 } else {
926 update = dirty->cmd;
927 commit_size = sizeof(*update);
928 }
929
930 vmw_stdu_populate_update(update, stdu->base.unit, sdirty->left,
931 sdirty->right, sdirty->top, sdirty->bottom);
932
933 vmw_fifo_commit(dirty->dev_priv, commit_size);
934
935 sdirty->left = sdirty->top = S32_MAX;
936 sdirty->right = sdirty->bottom = S32_MIN;
937}
938
939/**
940 * vmw_kms_stdu_surface_dirty - Dirty part of a surface backed framebuffer
941 *
942 * @dev_priv: Pointer to the device private structure.
943 * @framebuffer: Pointer to the surface-buffer backed framebuffer.
944 * @clips: Array of clip rects. Either @clips or @vclips must be NULL.
945 * @vclips: Alternate array of clip rects. Either @clips or @vclips must
946 * be NULL.
947 * @srf: Pointer to surface to blit from. If NULL, the surface attached
948 * to @framebuffer will be used.
949 * @dest_x: X coordinate offset to align @srf with framebuffer coordinates.
950 * @dest_y: Y coordinate offset to align @srf with framebuffer coordinates.
951 * @num_clips: Number of clip rects in @clips.
952 * @inc: Increment to use when looping over @clips.
953 * @out_fence: If non-NULL, will return a ref-counted pointer to a
954 * struct vmw_fence_obj. The returned fence pointer may be NULL in which
955 * case the device has already synchronized.
956 *
957 * Returns 0 on success, negative error code on failure. -ERESTARTSYS if
958 * interrupted.
959 */
960int vmw_kms_stdu_surface_dirty(struct vmw_private *dev_priv,
961 struct vmw_framebuffer *framebuffer,
962 struct drm_clip_rect *clips,
963 struct drm_vmw_rect *vclips,
964 struct vmw_resource *srf,
965 s32 dest_x,
966 s32 dest_y,
967 unsigned num_clips, int inc,
968 struct vmw_fence_obj **out_fence)
969{
970 struct vmw_framebuffer_surface *vfbs =
971 container_of(framebuffer, typeof(*vfbs), base);
972 struct vmw_stdu_dirty sdirty;
973 int ret;
974
975 if (!srf)
976 srf = &vfbs->surface->res;
977
978 ret = vmw_kms_helper_resource_prepare(srf, true);
979 if (ret)
980 return ret;
981
982 if (vfbs->is_dmabuf_proxy) {
983 ret = vmw_kms_update_proxy(srf, clips, num_clips, inc);
984 if (ret)
985 goto out_finish;
986 }
987
988 sdirty.base.fifo_commit = vmw_kms_stdu_surface_fifo_commit;
989 sdirty.base.clip = vmw_kms_stdu_surface_clip;
990 sdirty.base.fifo_reserve_size = sizeof(struct vmw_stdu_surface_copy) +
991 sizeof(SVGA3dCopyBox) * num_clips +
992 sizeof(struct vmw_stdu_update);
993 sdirty.sid = srf->id;
994 sdirty.left = sdirty.top = S32_MAX;
995 sdirty.right = sdirty.bottom = S32_MIN;
996
997 ret = vmw_kms_helper_dirty(dev_priv, framebuffer, clips, vclips,
998 dest_x, dest_y, num_clips, inc,
999 &sdirty.base);
1000out_finish:
1001 vmw_kms_helper_resource_finish(srf, out_fence);
1002
1003 return ret;
1004}
1005
35c05125
SY
1006
1007/*
1008 * Screen Target CRTC dispatch table
1009 */
d7955fcf 1010static const struct drm_crtc_funcs vmw_stdu_crtc_funcs = {
35c05125
SY
1011 .gamma_set = vmw_du_crtc_gamma_set,
1012 .destroy = vmw_stdu_crtc_destroy,
9c2542a4
SY
1013 .reset = vmw_du_crtc_reset,
1014 .atomic_duplicate_state = vmw_du_crtc_duplicate_state,
1015 .atomic_destroy_state = vmw_du_crtc_destroy_state,
904bb5e5 1016 .set_config = vmw_kms_set_config,
35c05125
SY
1017 .page_flip = vmw_stdu_crtc_page_flip,
1018};
1019
1020
1021
1022/******************************************************************************
1023 * Screen Target Display Unit Encoder Functions
1024 *****************************************************************************/
1025
1026/**
1027 * vmw_stdu_encoder_destroy - cleans up the STDU
1028 *
1029 * @encoder: used the get the containing STDU
1030 *
1031 * vmwgfx cleans up crtc/encoder/connector all at the same time so technically
1032 * this can be a no-op. Nevertheless, it doesn't hurt of have this in case
1033 * the common KMS code changes and somehow vmw_stdu_crtc_destroy() doesn't
1034 * get called.
1035 */
1036static void vmw_stdu_encoder_destroy(struct drm_encoder *encoder)
1037{
1038 vmw_stdu_destroy(vmw_encoder_to_stdu(encoder));
1039}
1040
d7955fcf 1041static const struct drm_encoder_funcs vmw_stdu_encoder_funcs = {
35c05125
SY
1042 .destroy = vmw_stdu_encoder_destroy,
1043};
1044
1045
1046
1047/******************************************************************************
1048 * Screen Target Display Unit Connector Functions
1049 *****************************************************************************/
1050
1051/**
1052 * vmw_stdu_connector_destroy - cleans up the STDU
1053 *
1054 * @connector: used to get the containing STDU
1055 *
1056 * vmwgfx cleans up crtc/encoder/connector all at the same time so technically
1057 * this can be a no-op. Nevertheless, it doesn't hurt of have this in case
1058 * the common KMS code changes and somehow vmw_stdu_crtc_destroy() doesn't
1059 * get called.
1060 */
1061static void vmw_stdu_connector_destroy(struct drm_connector *connector)
1062{
1063 vmw_stdu_destroy(vmw_connector_to_stdu(connector));
1064}
1065
1066
1067
d7955fcf 1068static const struct drm_connector_funcs vmw_stdu_connector_funcs = {
35c05125 1069 .dpms = vmw_du_connector_dpms,
35c05125
SY
1070 .detect = vmw_du_connector_detect,
1071 .fill_modes = vmw_du_connector_fill_modes,
1072 .set_property = vmw_du_connector_set_property,
1073 .destroy = vmw_stdu_connector_destroy,
d7721ca7
SY
1074 .reset = vmw_du_connector_reset,
1075 .atomic_duplicate_state = vmw_du_connector_duplicate_state,
1076 .atomic_destroy_state = vmw_du_connector_destroy_state,
1077 .atomic_set_property = vmw_du_connector_atomic_set_property,
1078 .atomic_get_property = vmw_du_connector_atomic_get_property,
35c05125
SY
1079};
1080
1081
d947d1b7
SY
1082static const struct
1083drm_connector_helper_funcs vmw_stdu_connector_helper_funcs = {
1084 .best_encoder = drm_atomic_helper_best_encoder,
1085};
1086
1087
35c05125 1088
36cc79bc
SY
1089/******************************************************************************
1090 * Screen Target Display Plane Functions
1091 *****************************************************************************/
1092
060e2ad5
SY
1093
1094
1095/**
1096 * vmw_stdu_primary_plane_cleanup_fb - Unpins the display surface
1097 *
1098 * @plane: display plane
1099 * @old_state: Contains the FB to clean up
1100 *
1101 * Unpins the display surface
1102 *
1103 * Returns 0 on success
1104 */
1105static void
1106vmw_stdu_primary_plane_cleanup_fb(struct drm_plane *plane,
1107 struct drm_plane_state *old_state)
1108{
1109 struct vmw_plane_state *vps = vmw_plane_state_to_vps(old_state);
1110
810b3e16
SY
1111 if (vps->guest_map.virtual)
1112 ttm_bo_kunmap(&vps->guest_map);
1113
1114 if (vps->host_map.virtual)
1115 ttm_bo_kunmap(&vps->host_map);
1116
060e2ad5
SY
1117 if (vps->surf)
1118 WARN_ON(!vps->pinned);
1119
1120 vmw_du_plane_cleanup_fb(plane, old_state);
1121
1122 vps->content_fb_type = SAME_AS_DISPLAY;
810b3e16 1123 vps->cpp = 0;
060e2ad5
SY
1124}
1125
1126
1127
1128/**
1129 * vmw_stdu_primary_plane_prepare_fb - Readies the display surface
1130 *
1131 * @plane: display plane
1132 * @new_state: info on the new plane state, including the FB
1133 *
1134 * This function allocates a new display surface if the content is
1135 * backed by a DMA. The display surface is pinned here, and it'll
1136 * be unpinned in .cleanup_fb()
1137 *
1138 * Returns 0 on success
1139 */
1140static int
1141vmw_stdu_primary_plane_prepare_fb(struct drm_plane *plane,
1142 struct drm_plane_state *new_state)
1143{
810b3e16 1144 struct vmw_private *dev_priv = vmw_priv(plane->dev);
060e2ad5
SY
1145 struct drm_framebuffer *new_fb = new_state->fb;
1146 struct vmw_framebuffer *vfb;
1147 struct vmw_plane_state *vps = vmw_plane_state_to_vps(new_state);
1148 enum stdu_content_type new_content_type;
1149 struct vmw_framebuffer_surface *new_vfbs;
1150 struct drm_crtc *crtc = new_state->crtc;
1151 uint32_t hdisplay = new_state->crtc_w, vdisplay = new_state->crtc_h;
1152 int ret;
1153
1154 /* No FB to prepare */
1155 if (!new_fb) {
1156 if (vps->surf) {
1157 WARN_ON(vps->pinned != 0);
1158 vmw_surface_unreference(&vps->surf);
1159 }
1160
1161 return 0;
1162 }
1163
1164 vfb = vmw_framebuffer_to_vfb(new_fb);
1165 new_vfbs = (vfb->dmabuf) ? NULL : vmw_framebuffer_to_vfbs(new_fb);
1166
1167 if (new_vfbs && new_vfbs->surface->base_size.width == hdisplay &&
1168 new_vfbs->surface->base_size.height == vdisplay)
1169 new_content_type = SAME_AS_DISPLAY;
1170 else if (vfb->dmabuf)
1171 new_content_type = SEPARATE_DMA;
1172 else
1173 new_content_type = SEPARATE_SURFACE;
1174
1175 if (new_content_type != SAME_AS_DISPLAY) {
1176 struct vmw_surface content_srf;
1177 struct drm_vmw_size display_base_size = {0};
1178
1179 display_base_size.width = hdisplay;
1180 display_base_size.height = vdisplay;
1181 display_base_size.depth = 1;
1182
1183 /*
1184 * If content buffer is a DMA buf, then we have to construct
1185 * surface info
1186 */
1187 if (new_content_type == SEPARATE_DMA) {
1188
1189 switch (new_fb->format->cpp[0]*8) {
1190 case 32:
1191 content_srf.format = SVGA3D_X8R8G8B8;
1192 break;
1193
1194 case 16:
1195 content_srf.format = SVGA3D_R5G6B5;
1196 break;
1197
1198 case 8:
1199 content_srf.format = SVGA3D_P8;
1200 break;
1201
1202 default:
1203 DRM_ERROR("Invalid format\n");
1204 return -EINVAL;
1205 }
1206
1207 content_srf.flags = 0;
1208 content_srf.mip_levels[0] = 1;
1209 content_srf.multisample_count = 0;
1210 } else {
1211 content_srf = *new_vfbs->surface;
1212 }
1213
1214 if (vps->surf) {
1215 struct drm_vmw_size cur_base_size = vps->surf->base_size;
1216
1217 if (cur_base_size.width != display_base_size.width ||
1218 cur_base_size.height != display_base_size.height ||
1219 vps->surf->format != content_srf.format) {
1220 WARN_ON(vps->pinned != 0);
1221 vmw_surface_unreference(&vps->surf);
1222 }
1223
1224 }
1225
1226 if (!vps->surf) {
1227 ret = vmw_surface_gb_priv_define
1228 (crtc->dev,
1229 /* Kernel visible only */
1230 0,
1231 content_srf.flags,
1232 content_srf.format,
1233 true, /* a scanout buffer */
1234 content_srf.mip_levels[0],
1235 content_srf.multisample_count,
1236 0,
1237 display_base_size,
1238 &vps->surf);
1239 if (ret != 0) {
1240 DRM_ERROR("Couldn't allocate STDU surface.\n");
1241 return ret;
1242 }
1243 }
1244 } else {
1245 /*
1246 * prepare_fb and clean_fb should only take care of pinning
1247 * and unpinning. References are tracked by state objects.
1248 * The only time we add a reference in prepare_fb is if the
1249 * state object doesn't have a reference to begin with
1250 */
1251 if (vps->surf) {
1252 WARN_ON(vps->pinned != 0);
1253 vmw_surface_unreference(&vps->surf);
1254 }
1255
1256 vps->surf = vmw_surface_reference(new_vfbs->surface);
1257 }
1258
1259 if (vps->surf) {
1260
1261 /* Pin new surface before flipping */
1262 ret = vmw_resource_pin(&vps->surf->res, false);
1263 if (ret)
1264 goto out_srf_unref;
1265
1266 vps->pinned++;
1267 }
1268
1269 vps->content_fb_type = new_content_type;
810b3e16
SY
1270
1271 /*
1272 * This should only happen if the DMA buf is too large to create a
1273 * proxy surface for.
1274 * If we are a 2D VM with a DMA buffer then we have to use CPU blit
1275 * so cache these mappings
1276 */
1277 if (vps->content_fb_type == SEPARATE_DMA &&
1278 !(dev_priv->capabilities & SVGA_CAP_3D)) {
1279
1280 struct vmw_framebuffer_dmabuf *new_vfbd;
1281
1282 new_vfbd = vmw_framebuffer_to_vfbd(new_fb);
1283
1284 ret = ttm_bo_reserve(&new_vfbd->buffer->base, false, false,
1285 NULL);
1286 if (ret)
1287 goto out_srf_unpin;
1288
1289 ret = ttm_bo_kmap(&new_vfbd->buffer->base, 0,
1290 new_vfbd->buffer->base.num_pages,
1291 &vps->guest_map);
1292
1293 ttm_bo_unreserve(&new_vfbd->buffer->base);
1294
1295 if (ret) {
1296 DRM_ERROR("Failed to map content buffer to CPU\n");
1297 goto out_srf_unpin;
1298 }
1299
1300 ret = ttm_bo_kmap(&vps->surf->res.backup->base, 0,
1301 vps->surf->res.backup->base.num_pages,
1302 &vps->host_map);
1303 if (ret) {
1304 DRM_ERROR("Failed to map display buffer to CPU\n");
1305 ttm_bo_kunmap(&vps->guest_map);
1306 goto out_srf_unpin;
1307 }
1308
1309 vps->cpp = new_fb->pitches[0] / new_fb->width;
1310 }
1311
060e2ad5
SY
1312 return 0;
1313
810b3e16
SY
1314out_srf_unpin:
1315 vmw_resource_unpin(&vps->surf->res);
1316 vps->pinned--;
1317
060e2ad5
SY
1318out_srf_unref:
1319 vmw_surface_unreference(&vps->surf);
1320 return ret;
1321}
1322
1323
1324
1325/**
1326 * vmw_stdu_primary_plane_atomic_update - formally switches STDU to new plane
1327 *
1328 * @plane: display plane
1329 * @old_state: Only used to get crtc info
1330 *
1331 * Formally update stdu->display_srf to the new plane, and bind the new
1332 * plane STDU. This function is called during the commit phase when
1333 * all the preparation have been done and all the configurations have
1334 * been checked.
1335 */
1336static void
1337vmw_stdu_primary_plane_atomic_update(struct drm_plane *plane,
1338 struct drm_plane_state *old_state)
1339{
1340 struct vmw_private *dev_priv;
1341 struct vmw_screen_target_display_unit *stdu;
1342 struct vmw_plane_state *vps = vmw_plane_state_to_vps(plane->state);
1343 struct drm_crtc *crtc = plane->state->crtc ?: old_state->crtc;
1344 int ret;
1345
1346 stdu = vmw_crtc_to_stdu(crtc);
1347 dev_priv = vmw_priv(crtc->dev);
1348
1349 stdu->display_srf = vps->surf;
1350 stdu->content_fb_type = vps->content_fb_type;
810b3e16
SY
1351 stdu->cpp = vps->cpp;
1352 memcpy(&stdu->guest_map, &vps->guest_map, sizeof(vps->guest_map));
1353 memcpy(&stdu->host_map, &vps->host_map, sizeof(vps->host_map));
060e2ad5
SY
1354
1355 if (!stdu->defined)
1356 return;
1357
1358 if (plane->state->fb)
1359 ret = vmw_stdu_bind_st(dev_priv, stdu, &stdu->display_srf->res);
1360 else
1361 ret = vmw_stdu_bind_st(dev_priv, stdu, NULL);
1362
1363 /*
1364 * We cannot really fail this function, so if we do, then output an
1365 * error and quit
1366 */
1367 if (ret)
1368 DRM_ERROR("Failed to bind surface to STDU.\n");
1369 else
1370 crtc->primary->fb = plane->state->fb;
8a309c8a
SY
1371
1372 ret = vmw_stdu_update_st(dev_priv, stdu);
1373
1374 if (ret)
1375 DRM_ERROR("Failed to update STDU.\n");
060e2ad5
SY
1376}
1377
1378
36cc79bc 1379static const struct drm_plane_funcs vmw_stdu_plane_funcs = {
904bb5e5
SY
1380 .update_plane = drm_atomic_helper_update_plane,
1381 .disable_plane = drm_atomic_helper_disable_plane,
36cc79bc 1382 .destroy = vmw_du_primary_plane_destroy,
cc5ec459
SY
1383 .reset = vmw_du_plane_reset,
1384 .atomic_duplicate_state = vmw_du_plane_duplicate_state,
1385 .atomic_destroy_state = vmw_du_plane_destroy_state,
36cc79bc
SY
1386};
1387
1388static const struct drm_plane_funcs vmw_stdu_cursor_funcs = {
904bb5e5
SY
1389 .update_plane = drm_atomic_helper_update_plane,
1390 .disable_plane = drm_atomic_helper_disable_plane,
36cc79bc 1391 .destroy = vmw_du_cursor_plane_destroy,
cc5ec459
SY
1392 .reset = vmw_du_plane_reset,
1393 .atomic_duplicate_state = vmw_du_plane_duplicate_state,
1394 .atomic_destroy_state = vmw_du_plane_destroy_state,
36cc79bc
SY
1395};
1396
1397
06ec4190
SY
1398/*
1399 * Atomic Helpers
1400 */
060e2ad5
SY
1401static const struct
1402drm_plane_helper_funcs vmw_stdu_cursor_plane_helper_funcs = {
1403 .atomic_check = vmw_du_cursor_plane_atomic_check,
1404 .atomic_update = vmw_du_cursor_plane_atomic_update,
1405 .prepare_fb = vmw_du_cursor_plane_prepare_fb,
1406 .cleanup_fb = vmw_du_plane_cleanup_fb,
1407};
1408
1409static const struct
1410drm_plane_helper_funcs vmw_stdu_primary_plane_helper_funcs = {
1411 .atomic_check = vmw_du_primary_plane_atomic_check,
1412 .atomic_update = vmw_stdu_primary_plane_atomic_update,
1413 .prepare_fb = vmw_stdu_primary_plane_prepare_fb,
1414 .cleanup_fb = vmw_stdu_primary_plane_cleanup_fb,
1415};
1416
06ec4190
SY
1417static const struct drm_crtc_helper_funcs vmw_stdu_crtc_helper_funcs = {
1418 .prepare = vmw_stdu_crtc_helper_prepare,
06ec4190 1419 .disable = vmw_stdu_crtc_helper_disable,
06ec4190
SY
1420 .mode_set_nofb = vmw_stdu_crtc_mode_set_nofb,
1421 .atomic_check = vmw_du_crtc_atomic_check,
1422 .atomic_begin = vmw_du_crtc_atomic_begin,
1423 .atomic_flush = vmw_du_crtc_atomic_flush,
0b20a0f8 1424 .atomic_enable = vmw_stdu_crtc_atomic_enable,
06ec4190
SY
1425};
1426
1427
35c05125
SY
1428/**
1429 * vmw_stdu_init - Sets up a Screen Target Display Unit
1430 *
1431 * @dev_priv: VMW DRM device
1432 * @unit: unit number range from 0 to VMWGFX_NUM_DISPLAY_UNITS
1433 *
1434 * This function is called once per CRTC, and allocates one Screen Target
1435 * display unit to represent that CRTC. Since the SVGA device does not separate
1436 * out encoder and connector, they are represented as part of the STDU as well.
1437 */
1438static int vmw_stdu_init(struct vmw_private *dev_priv, unsigned unit)
1439{
1440 struct vmw_screen_target_display_unit *stdu;
1441 struct drm_device *dev = dev_priv->dev;
1442 struct drm_connector *connector;
1443 struct drm_encoder *encoder;
36cc79bc 1444 struct drm_plane *primary, *cursor;
35c05125 1445 struct drm_crtc *crtc;
36cc79bc 1446 int ret;
35c05125
SY
1447
1448
1449 stdu = kzalloc(sizeof(*stdu), GFP_KERNEL);
1450 if (!stdu)
1451 return -ENOMEM;
1452
1453 stdu->base.unit = unit;
1454 crtc = &stdu->base.crtc;
1455 encoder = &stdu->base.encoder;
1456 connector = &stdu->base.connector;
36cc79bc
SY
1457 primary = &stdu->base.primary;
1458 cursor = &stdu->base.cursor;
35c05125
SY
1459
1460 stdu->base.pref_active = (unit == 0);
1461 stdu->base.pref_width = dev_priv->initial_width;
1462 stdu->base.pref_height = dev_priv->initial_height;
9c2542a4
SY
1463
1464 /*
1465 * Remove this after enabling atomic because property values can
1466 * only exist in a state object
1467 */
2e69b25b 1468 stdu->base.is_implicit = false;
35c05125 1469
36cc79bc 1470 /* Initialize primary plane */
cc5ec459
SY
1471 vmw_du_plane_reset(primary);
1472
36cc79bc
SY
1473 ret = drm_universal_plane_init(dev, primary,
1474 0, &vmw_stdu_plane_funcs,
1475 vmw_primary_plane_formats,
1476 ARRAY_SIZE(vmw_primary_plane_formats),
1477 DRM_PLANE_TYPE_PRIMARY, NULL);
1478 if (ret) {
1479 DRM_ERROR("Failed to initialize primary plane");
1480 goto err_free;
1481 }
1482
060e2ad5
SY
1483 drm_plane_helper_add(primary, &vmw_stdu_primary_plane_helper_funcs);
1484
36cc79bc 1485 /* Initialize cursor plane */
cc5ec459
SY
1486 vmw_du_plane_reset(cursor);
1487
36cc79bc
SY
1488 ret = drm_universal_plane_init(dev, cursor,
1489 0, &vmw_stdu_cursor_funcs,
1490 vmw_cursor_plane_formats,
1491 ARRAY_SIZE(vmw_cursor_plane_formats),
1492 DRM_PLANE_TYPE_CURSOR, NULL);
1493 if (ret) {
1494 DRM_ERROR("Failed to initialize cursor plane");
1495 drm_plane_cleanup(&stdu->base.primary);
1496 goto err_free;
1497 }
1498
060e2ad5
SY
1499 drm_plane_helper_add(cursor, &vmw_stdu_cursor_plane_helper_funcs);
1500
d7721ca7
SY
1501 vmw_du_connector_reset(connector);
1502
36cc79bc
SY
1503 ret = drm_connector_init(dev, connector, &vmw_stdu_connector_funcs,
1504 DRM_MODE_CONNECTOR_VIRTUAL);
1505 if (ret) {
1506 DRM_ERROR("Failed to initialize connector\n");
1507 goto err_free;
1508 }
d947d1b7
SY
1509
1510 drm_connector_helper_add(connector, &vmw_stdu_connector_helper_funcs);
35c05125 1511 connector->status = vmw_du_connector_detect(connector, false);
d7721ca7 1512 vmw_connector_state_to_vcs(connector->state)->is_implicit = false;
35c05125 1513
36cc79bc
SY
1514 ret = drm_encoder_init(dev, encoder, &vmw_stdu_encoder_funcs,
1515 DRM_MODE_ENCODER_VIRTUAL, NULL);
1516 if (ret) {
1517 DRM_ERROR("Failed to initialize encoder\n");
1518 goto err_free_connector;
1519 }
1520
1521 (void) drm_mode_connector_attach_encoder(connector, encoder);
35c05125
SY
1522 encoder->possible_crtcs = (1 << unit);
1523 encoder->possible_clones = 0;
1524
36cc79bc
SY
1525 ret = drm_connector_register(connector);
1526 if (ret) {
1527 DRM_ERROR("Failed to register connector\n");
1528 goto err_free_encoder;
1529 }
35c05125 1530
d7721ca7 1531 vmw_du_crtc_reset(crtc);
36cc79bc
SY
1532 ret = drm_crtc_init_with_planes(dev, crtc, &stdu->base.primary,
1533 &stdu->base.cursor,
1534 &vmw_stdu_crtc_funcs, NULL);
1535 if (ret) {
1536 DRM_ERROR("Failed to initialize CRTC\n");
1537 goto err_free_unregister;
1538 }
35c05125 1539
06ec4190
SY
1540 drm_crtc_helper_add(crtc, &vmw_stdu_crtc_helper_funcs);
1541
35c05125
SY
1542 drm_mode_crtc_set_gamma_size(crtc, 256);
1543
578e609a
TH
1544 drm_object_attach_property(&connector->base,
1545 dev_priv->hotplug_mode_update_property, 1);
1546 drm_object_attach_property(&connector->base,
1547 dev->mode_config.suggested_x_property, 0);
1548 drm_object_attach_property(&connector->base,
1549 dev->mode_config.suggested_y_property, 0);
76404ac0
TH
1550 if (dev_priv->implicit_placement_property)
1551 drm_object_attach_property
1552 (&connector->base,
1553 dev_priv->implicit_placement_property,
1554 stdu->base.is_implicit);
35c05125 1555 return 0;
36cc79bc
SY
1556
1557err_free_unregister:
1558 drm_connector_unregister(connector);
1559err_free_encoder:
1560 drm_encoder_cleanup(encoder);
1561err_free_connector:
1562 drm_connector_cleanup(connector);
1563err_free:
1564 kfree(stdu);
1565 return ret;
35c05125
SY
1566}
1567
1568
1569
1570/**
1571 * vmw_stdu_destroy - Cleans up a vmw_screen_target_display_unit
1572 *
1573 * @stdu: Screen Target Display Unit to be destroyed
1574 *
1575 * Clean up after vmw_stdu_init
1576 */
1577static void vmw_stdu_destroy(struct vmw_screen_target_display_unit *stdu)
1578{
35c05125
SY
1579 vmw_du_cleanup(&stdu->base);
1580 kfree(stdu);
1581}
1582
1583
1584
1585/******************************************************************************
1586 * Screen Target Display KMS Functions
1587 *
1588 * These functions are called by the common KMS code in vmwgfx_kms.c
1589 *****************************************************************************/
1590
1591/**
1592 * vmw_kms_stdu_init_display - Initializes a Screen Target based display
1593 *
1594 * @dev_priv: VMW DRM device
1595 *
1596 * This function initialize a Screen Target based display device. It checks
1597 * the capability bits to make sure the underlying hardware can support
1598 * screen targets, and then creates the maximum number of CRTCs, a.k.a Display
1599 * Units, as supported by the display hardware.
1600 *
1601 * RETURNS:
1602 * 0 on success, error code otherwise
1603 */
1604int vmw_kms_stdu_init_display(struct vmw_private *dev_priv)
1605{
1606 struct drm_device *dev = dev_priv->dev;
1607 int i, ret;
1608
1609
1610 /* Do nothing if Screen Target support is turned off */
1611 if (!VMWGFX_ENABLE_SCREEN_TARGET_OTABLE)
1612 return -ENOSYS;
1613
f89c6c32 1614 if (!(dev_priv->capabilities & SVGA_CAP_GBOBJECTS))
35c05125
SY
1615 return -ENOSYS;
1616
1617 ret = drm_vblank_init(dev, VMWGFX_NUM_DISPLAY_UNITS);
1618 if (unlikely(ret != 0))
1619 return ret;
1620
6bf6bf03
TH
1621 dev_priv->active_display_unit = vmw_du_screen_target;
1622
28c95429
SY
1623 if (dev_priv->capabilities & SVGA_CAP_3D) {
1624 /*
1625 * For 3D VMs, display (scanout) buffer size is the smaller of
1626 * max texture and max STDU
1627 */
1628 uint32_t max_width, max_height;
1629
1630 max_width = min(dev_priv->texture_max_width,
1631 dev_priv->stdu_max_width);
1632 max_height = min(dev_priv->texture_max_height,
1633 dev_priv->stdu_max_height);
1634
1635 dev->mode_config.max_width = max_width;
1636 dev->mode_config.max_height = max_height;
1637 } else {
810b3e16
SY
1638 /*
1639 * Given various display aspect ratios, there's no way to
1640 * estimate these using prim_bb_mem. So just set these to
1641 * something arbitrarily large and we will reject any layout
1642 * that doesn't fit prim_bb_mem later
1643 */
1644 dev->mode_config.max_width = 16384;
1645 dev->mode_config.max_height = 16384;
1646 }
1647
76404ac0
TH
1648 vmw_kms_create_implicit_placement_property(dev_priv, false);
1649
35c05125
SY
1650 for (i = 0; i < VMWGFX_NUM_DISPLAY_UNITS; ++i) {
1651 ret = vmw_stdu_init(dev_priv, i);
1652
1653 if (unlikely(ret != 0)) {
1654 DRM_ERROR("Failed to initialize STDU %d", i);
5f58e974 1655 return ret;
35c05125
SY
1656 }
1657 }
1658
35c05125
SY
1659 DRM_INFO("Screen Target Display device initialized\n");
1660
35c05125
SY
1661 return 0;
1662}