[mirror_ubuntu-hirsute-kernel.git] / drivers / gpu / drm / zte / zx_hdmi.c

/*
 * Copyright 2016 Linaro Ltd.
 * Copyright 2016 ZTE Corporation.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 */

#include <linux/clk.h>
#include <linux/component.h>
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/hdmi.h>
#include <linux/irq.h>
#include <linux/mfd/syscon.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/of_device.h>

#include <drm/drm_atomic_helper.h>
#include <drm/drm_crtc_helper.h>
#include <drm/drm_edid.h>
#include <drm/drm_of.h>
#include <drm/drmP.h>

#include <sound/hdmi-codec.h>

#include "zx_hdmi_regs.h"
#include "zx_vou.h"

#define ZX_HDMI_INFOFRAME_SIZE		31
#define DDC_SEGMENT_ADDR		0x30

struct zx_hdmi_i2c {
	struct i2c_adapter adap;
	struct mutex lock;
};

struct zx_hdmi {
	struct drm_connector connector;
	struct drm_encoder encoder;
	struct zx_hdmi_i2c *ddc;
	struct device *dev;
	struct drm_device *drm;
	void __iomem *mmio;
	struct clk *cec_clk;
	struct clk *osc_clk;
	struct clk *xclk;
	bool sink_is_hdmi;
	bool sink_has_audio;
	struct platform_device *audio_pdev;
};

#define to_zx_hdmi(x) container_of(x, struct zx_hdmi, x)

static inline u8 hdmi_readb(struct zx_hdmi *hdmi, u16 offset)
{
	return readl_relaxed(hdmi->mmio + offset * 4);
}

static inline void hdmi_writeb(struct zx_hdmi *hdmi, u16 offset, u8 val)
{
	writel_relaxed(val, hdmi->mmio + offset * 4);
}

static inline void hdmi_writeb_mask(struct zx_hdmi *hdmi, u16 offset,
				    u8 mask, u8 val)
{
	u8 tmp;

	tmp = hdmi_readb(hdmi, offset);
	tmp = (tmp & ~mask) | (val & mask);
	hdmi_writeb(hdmi, offset, tmp);
}

static int zx_hdmi_infoframe_trans(struct zx_hdmi *hdmi,
				   union hdmi_infoframe *frame, u8 fsel)
{
	u8 buffer[ZX_HDMI_INFOFRAME_SIZE];
	int num;
	int i;

	hdmi_writeb(hdmi, TPI_INFO_FSEL, fsel);

	num = hdmi_infoframe_pack(frame, buffer, ZX_HDMI_INFOFRAME_SIZE);
	if (num < 0) {
		DRM_DEV_ERROR(hdmi->dev, "failed to pack infoframe: %d\n", num);
		return num;
	}

	for (i = 0; i < num; i++)
		hdmi_writeb(hdmi, TPI_INFO_B0 + i, buffer[i]);

	hdmi_writeb_mask(hdmi, TPI_INFO_EN, TPI_INFO_TRANS_RPT,
			 TPI_INFO_TRANS_RPT);
	hdmi_writeb_mask(hdmi, TPI_INFO_EN, TPI_INFO_TRANS_EN,
			 TPI_INFO_TRANS_EN);

	return num;
}

static int zx_hdmi_config_video_vsi(struct zx_hdmi *hdmi,
				    struct drm_display_mode *mode)
{
	union hdmi_infoframe frame;
	int ret;

	ret = drm_hdmi_vendor_infoframe_from_display_mode(&frame.vendor.hdmi,
							  &hdmi->connector,
							  mode);
	if (ret) {
		DRM_DEV_ERROR(hdmi->dev, "failed to get vendor infoframe: %d\n",
			      ret);
		return ret;
	}

	return zx_hdmi_infoframe_trans(hdmi, &frame, FSEL_VSIF);
}

static int zx_hdmi_config_video_avi(struct zx_hdmi *hdmi,
				    struct drm_display_mode *mode)
{
	union hdmi_infoframe frame;
	int ret;

	ret = drm_hdmi_avi_infoframe_from_display_mode(&frame.avi,
						       &hdmi->connector,
						       mode);
	if (ret) {
		DRM_DEV_ERROR(hdmi->dev, "failed to get avi infoframe: %d\n",
			      ret);
		return ret;
	}

	/* We always use YUV444 for HDMI output. */
	frame.avi.colorspace = HDMI_COLORSPACE_YUV444;

	return zx_hdmi_infoframe_trans(hdmi, &frame, FSEL_AVI);
}

static void zx_hdmi_encoder_mode_set(struct drm_encoder *encoder,
				     struct drm_display_mode *mode,
				     struct drm_display_mode *adj_mode)
{
	struct zx_hdmi *hdmi = to_zx_hdmi(encoder);

	if (hdmi->sink_is_hdmi) {
		zx_hdmi_config_video_avi(hdmi, mode);
		zx_hdmi_config_video_vsi(hdmi, mode);
	}
}

static void zx_hdmi_phy_start(struct zx_hdmi *hdmi)
{
	/* Copy from ZTE BSP code */
	hdmi_writeb(hdmi, 0x222, 0x0);
	hdmi_writeb(hdmi, 0x224, 0x4);
	hdmi_writeb(hdmi, 0x909, 0x0);
	hdmi_writeb(hdmi, 0x7b0, 0x90);
	hdmi_writeb(hdmi, 0x7b1, 0x00);
	hdmi_writeb(hdmi, 0x7b2, 0xa7);
	hdmi_writeb(hdmi, 0x7b8, 0xaa);
	hdmi_writeb(hdmi, 0x7b2, 0xa7);
	hdmi_writeb(hdmi, 0x7b3, 0x0f);
	hdmi_writeb(hdmi, 0x7b4, 0x0f);
	hdmi_writeb(hdmi, 0x7b5, 0x55);
	hdmi_writeb(hdmi, 0x7b7, 0x03);
	hdmi_writeb(hdmi, 0x7b9, 0x12);
	hdmi_writeb(hdmi, 0x7ba, 0x32);
	hdmi_writeb(hdmi, 0x7bc, 0x68);
	hdmi_writeb(hdmi, 0x7be, 0x40);
	hdmi_writeb(hdmi, 0x7bf, 0x84);
	hdmi_writeb(hdmi, 0x7c1, 0x0f);
	hdmi_writeb(hdmi, 0x7c8, 0x02);
	hdmi_writeb(hdmi, 0x7c9, 0x03);
	hdmi_writeb(hdmi, 0x7ca, 0x40);
	hdmi_writeb(hdmi, 0x7dc, 0x31);
	hdmi_writeb(hdmi, 0x7e2, 0x04);
	hdmi_writeb(hdmi, 0x7e0, 0x06);
	hdmi_writeb(hdmi, 0x7cb, 0x68);
	hdmi_writeb(hdmi, 0x7f9, 0x02);
	hdmi_writeb(hdmi, 0x7b6, 0x02);
	hdmi_writeb(hdmi, 0x7f3, 0x0);
}

static void zx_hdmi_hw_enable(struct zx_hdmi *hdmi)
{
	/* Enable pclk */
	hdmi_writeb_mask(hdmi, CLKPWD, CLKPWD_PDIDCK, CLKPWD_PDIDCK);

	/* Enable HDMI for TX */
	hdmi_writeb_mask(hdmi, FUNC_SEL, FUNC_HDMI_EN, FUNC_HDMI_EN);

	/* Enable deep color packet */
	hdmi_writeb_mask(hdmi, P2T_CTRL, P2T_DC_PKT_EN, P2T_DC_PKT_EN);

	/* Enable HDMI/MHL mode for output */
	hdmi_writeb_mask(hdmi, TEST_TXCTRL, TEST_TXCTRL_HDMI_MODE,
			 TEST_TXCTRL_HDMI_MODE);

	/* Configure reg_qc_sel */
	hdmi_writeb(hdmi, HDMICTL4, 0x3);

	/* Enable interrupt */
	hdmi_writeb_mask(hdmi, INTR1_MASK, INTR1_MONITOR_DETECT,
			 INTR1_MONITOR_DETECT);

	/* Start up phy */
	zx_hdmi_phy_start(hdmi);
}

static void zx_hdmi_hw_disable(struct zx_hdmi *hdmi)
{
	/* Disable interrupt */
	hdmi_writeb_mask(hdmi, INTR1_MASK, INTR1_MONITOR_DETECT, 0);

	/* Disable deep color packet */
	hdmi_writeb_mask(hdmi, P2T_CTRL, P2T_DC_PKT_EN, P2T_DC_PKT_EN);

	/* Disable HDMI for TX */
	hdmi_writeb_mask(hdmi, FUNC_SEL, FUNC_HDMI_EN, 0);

	/* Disable pclk */
	hdmi_writeb_mask(hdmi, CLKPWD, CLKPWD_PDIDCK, 0);
}

static void zx_hdmi_encoder_enable(struct drm_encoder *encoder)
{
	struct zx_hdmi *hdmi = to_zx_hdmi(encoder);

	clk_prepare_enable(hdmi->cec_clk);
	clk_prepare_enable(hdmi->osc_clk);
	clk_prepare_enable(hdmi->xclk);

	zx_hdmi_hw_enable(hdmi);

	vou_inf_enable(VOU_HDMI, encoder->crtc);
}

static void zx_hdmi_encoder_disable(struct drm_encoder *encoder)
{
	struct zx_hdmi *hdmi = to_zx_hdmi(encoder);

	vou_inf_disable(VOU_HDMI, encoder->crtc);

	zx_hdmi_hw_disable(hdmi);

	clk_disable_unprepare(hdmi->xclk);
	clk_disable_unprepare(hdmi->osc_clk);
	clk_disable_unprepare(hdmi->cec_clk);
}

static const struct drm_encoder_helper_funcs zx_hdmi_encoder_helper_funcs = {
	.enable	= zx_hdmi_encoder_enable,
	.disable = zx_hdmi_encoder_disable,
	.mode_set = zx_hdmi_encoder_mode_set,
};

static const struct drm_encoder_funcs zx_hdmi_encoder_funcs = {
	.destroy = drm_encoder_cleanup,
};

static int zx_hdmi_connector_get_modes(struct drm_connector *connector)
{
	struct zx_hdmi *hdmi = to_zx_hdmi(connector);
	struct edid *edid;
	int ret;

	edid = drm_get_edid(connector, &hdmi->ddc->adap);
	if (!edid)
		return 0;

	hdmi->sink_is_hdmi = drm_detect_hdmi_monitor(edid);
	hdmi->sink_has_audio = drm_detect_monitor_audio(edid);
	drm_connector_update_edid_property(connector, edid);
	ret = drm_add_edid_modes(connector, edid);
	kfree(edid);

	return ret;
}

static enum drm_mode_status
zx_hdmi_connector_mode_valid(struct drm_connector *connector,
			     struct drm_display_mode *mode)
{
	return MODE_OK;
}

static struct drm_connector_helper_funcs zx_hdmi_connector_helper_funcs = {
	.get_modes = zx_hdmi_connector_get_modes,
	.mode_valid = zx_hdmi_connector_mode_valid,
};

static enum drm_connector_status
zx_hdmi_connector_detect(struct drm_connector *connector, bool force)
{
	struct zx_hdmi *hdmi = to_zx_hdmi(connector);

	return (hdmi_readb(hdmi, TPI_HPD_RSEN) & TPI_HPD_CONNECTION) ?
		connector_status_connected : connector_status_disconnected;
}

static const struct drm_connector_funcs zx_hdmi_connector_funcs = {
	.fill_modes = drm_helper_probe_single_connector_modes,
	.detect = zx_hdmi_connector_detect,
	.destroy = drm_connector_cleanup,
	.reset = drm_atomic_helper_connector_reset,
	.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
	.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
};

static int zx_hdmi_register(struct drm_device *drm, struct zx_hdmi *hdmi)
{
	struct drm_encoder *encoder = &hdmi->encoder;

	encoder->possible_crtcs = VOU_CRTC_MASK;

	drm_encoder_init(drm, encoder, &zx_hdmi_encoder_funcs,
			 DRM_MODE_ENCODER_TMDS, NULL);
	drm_encoder_helper_add(encoder, &zx_hdmi_encoder_helper_funcs);

	hdmi->connector.polled = DRM_CONNECTOR_POLL_HPD;

	drm_connector_init(drm, &hdmi->connector, &zx_hdmi_connector_funcs,
			   DRM_MODE_CONNECTOR_HDMIA);
	drm_connector_helper_add(&hdmi->connector,
				 &zx_hdmi_connector_helper_funcs);

	drm_connector_attach_encoder(&hdmi->connector, encoder);

	return 0;
}

static irqreturn_t zx_hdmi_irq_thread(int irq, void *dev_id)
{
	struct zx_hdmi *hdmi = dev_id;

	drm_helper_hpd_irq_event(hdmi->connector.dev);

	return IRQ_HANDLED;
}

static irqreturn_t zx_hdmi_irq_handler(int irq, void *dev_id)
{
	struct zx_hdmi *hdmi = dev_id;
	u8 lstat;

	lstat = hdmi_readb(hdmi, L1_INTR_STAT);

	/* Monitor detect/HPD interrupt */
	if (lstat & L1_INTR_STAT_INTR1) {
		u8 stat;

		stat = hdmi_readb(hdmi, INTR1_STAT);
		hdmi_writeb(hdmi, INTR1_STAT, stat);

		if (stat & INTR1_MONITOR_DETECT)
			return IRQ_WAKE_THREAD;
	}

	return IRQ_NONE;
}

static int zx_hdmi_audio_startup(struct device *dev, void *data)
{
	struct zx_hdmi *hdmi = dev_get_drvdata(dev);
	struct drm_encoder *encoder = &hdmi->encoder;

	vou_inf_hdmi_audio_sel(encoder->crtc, VOU_HDMI_AUD_SPDIF);

	return 0;
}

static void zx_hdmi_audio_shutdown(struct device *dev, void *data)
{
	struct zx_hdmi *hdmi = dev_get_drvdata(dev);

	/* Disable audio input */
	hdmi_writeb_mask(hdmi, AUD_EN, AUD_IN_EN, 0);
}

static inline int zx_hdmi_audio_get_n(unsigned int fs)
{
	unsigned int n;

	if (fs && (fs % 44100) == 0)
		n = 6272 * (fs / 44100);
	else
		n = fs * 128 / 1000;

	return n;
}

static int zx_hdmi_audio_hw_params(struct device *dev,
				   void *data,
				   struct hdmi_codec_daifmt *daifmt,
				   struct hdmi_codec_params *params)
{
	struct zx_hdmi *hdmi = dev_get_drvdata(dev);
	struct hdmi_audio_infoframe *cea = &params->cea;
	union hdmi_infoframe frame;
	int n;

	/* We only support spdif for now */
	if (daifmt->fmt != HDMI_SPDIF) {
		DRM_DEV_ERROR(hdmi->dev, "invalid daifmt %d\n", daifmt->fmt);
		return -EINVAL;
	}

	switch (params->sample_width) {
	case 16:
		hdmi_writeb_mask(hdmi, TPI_AUD_CONFIG, SPDIF_SAMPLE_SIZE_MASK,
				 SPDIF_SAMPLE_SIZE_16BIT);
		break;
	case 20:
		hdmi_writeb_mask(hdmi, TPI_AUD_CONFIG, SPDIF_SAMPLE_SIZE_MASK,
				 SPDIF_SAMPLE_SIZE_20BIT);
		break;
	case 24:
		hdmi_writeb_mask(hdmi, TPI_AUD_CONFIG, SPDIF_SAMPLE_SIZE_MASK,
				 SPDIF_SAMPLE_SIZE_24BIT);
		break;
	default:
		DRM_DEV_ERROR(hdmi->dev, "invalid sample width %d\n",
			      params->sample_width);
		return -EINVAL;
	}

	/* CTS is calculated by hardware, and we only need to take care of N */
	n = zx_hdmi_audio_get_n(params->sample_rate);
	hdmi_writeb(hdmi, N_SVAL1, n & 0xff);
	hdmi_writeb(hdmi, N_SVAL2, (n >> 8) & 0xff);
	hdmi_writeb(hdmi, N_SVAL3, (n >> 16) & 0xf);

	/* Enable spdif mode */
	hdmi_writeb_mask(hdmi, AUD_MODE, SPDIF_EN, SPDIF_EN);

	/* Enable audio input */
	hdmi_writeb_mask(hdmi, AUD_EN, AUD_IN_EN, AUD_IN_EN);

	memcpy(&frame.audio, cea, sizeof(*cea));

	return zx_hdmi_infoframe_trans(hdmi, &frame, FSEL_AUDIO);
}

static int zx_hdmi_audio_digital_mute(struct device *dev, void *data,
				      bool enable)
{
	struct zx_hdmi *hdmi = dev_get_drvdata(dev);

	if (enable)
		hdmi_writeb_mask(hdmi, TPI_AUD_CONFIG, TPI_AUD_MUTE,
				 TPI_AUD_MUTE);
	else
		hdmi_writeb_mask(hdmi, TPI_AUD_CONFIG, TPI_AUD_MUTE, 0);

	return 0;
}

static int zx_hdmi_audio_get_eld(struct device *dev, void *data,
				 uint8_t *buf, size_t len)
{
	struct zx_hdmi *hdmi = dev_get_drvdata(dev);
	struct drm_connector *connector = &hdmi->connector;

	memcpy(buf, connector->eld, min(sizeof(connector->eld), len));

	return 0;
}

static const struct hdmi_codec_ops zx_hdmi_codec_ops = {
	.audio_startup = zx_hdmi_audio_startup,
	.hw_params = zx_hdmi_audio_hw_params,
	.audio_shutdown = zx_hdmi_audio_shutdown,
	.digital_mute = zx_hdmi_audio_digital_mute,
	.get_eld = zx_hdmi_audio_get_eld,
};

static struct hdmi_codec_pdata zx_hdmi_codec_pdata = {
	.ops = &zx_hdmi_codec_ops,
	.spdif = 1,
};

static int zx_hdmi_audio_register(struct zx_hdmi *hdmi)
{
	struct platform_device *pdev;

	pdev = platform_device_register_data(hdmi->dev, HDMI_CODEC_DRV_NAME,
					     PLATFORM_DEVID_AUTO,
					     &zx_hdmi_codec_pdata,
					     sizeof(zx_hdmi_codec_pdata));
	if (IS_ERR(pdev))
		return PTR_ERR(pdev);

	hdmi->audio_pdev = pdev;

	return 0;
}

static int zx_hdmi_i2c_read(struct zx_hdmi *hdmi, struct i2c_msg *msg)
{
	int len = msg->len;
	u8 *buf = msg->buf;
	int retry = 0;
	int ret = 0;

	/* Bits [9:8] of bytes */
	hdmi_writeb(hdmi, ZX_DDC_DIN_CNT2, (len >> 8) & 0xff);
	/* Bits [7:0] of bytes */
	hdmi_writeb(hdmi, ZX_DDC_DIN_CNT1, len & 0xff);

	/* Clear FIFO */
	hdmi_writeb_mask(hdmi, ZX_DDC_CMD, DDC_CMD_MASK, DDC_CMD_CLEAR_FIFO);

	/* Kick off the read */
	hdmi_writeb_mask(hdmi, ZX_DDC_CMD, DDC_CMD_MASK,
			 DDC_CMD_SEQUENTIAL_READ);

	while (len > 0) {
		int cnt, i;

		/* FIFO needs some time to get ready */
		usleep_range(500, 1000);

		cnt = hdmi_readb(hdmi, ZX_DDC_DOUT_CNT) & DDC_DOUT_CNT_MASK;
		if (cnt == 0) {
			if (++retry > 5) {
				DRM_DEV_ERROR(hdmi->dev,
					      "DDC FIFO read timed out!");
				return -ETIMEDOUT;
			}
			continue;
		}

		for (i = 0; i < cnt; i++)
			*buf++ = hdmi_readb(hdmi, ZX_DDC_DATA);
		len -= cnt;
	}

	return ret;
}

static int zx_hdmi_i2c_write(struct zx_hdmi *hdmi, struct i2c_msg *msg)
{
	/*
	 * The DDC I2C adapter is only for reading EDID data, so we assume
	 * that the write to this adapter must be the EDID data offset.
	 */
	if ((msg->len != 1) ||
	    ((msg->addr != DDC_ADDR) && (msg->addr != DDC_SEGMENT_ADDR)))
		return -EINVAL;

	if (msg->addr == DDC_SEGMENT_ADDR)
		hdmi_writeb(hdmi, ZX_DDC_SEGM, msg->addr << 1);
	else if (msg->addr == DDC_ADDR)
		hdmi_writeb(hdmi, ZX_DDC_ADDR, msg->addr << 1);

	hdmi_writeb(hdmi, ZX_DDC_OFFSET, msg->buf[0]);

	return 0;
}

static int zx_hdmi_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
			    int num)
{
	struct zx_hdmi *hdmi = i2c_get_adapdata(adap);
	struct zx_hdmi_i2c *ddc = hdmi->ddc;
	int i, ret = 0;

	mutex_lock(&ddc->lock);

	/* Enable DDC master access */
	hdmi_writeb_mask(hdmi, TPI_DDC_MASTER_EN, HW_DDC_MASTER, HW_DDC_MASTER);

	for (i = 0; i < num; i++) {
		DRM_DEV_DEBUG(hdmi->dev,
			      "xfer: num: %d/%d, len: %d, flags: %#x\n",
			      i + 1, num, msgs[i].len, msgs[i].flags);

		if (msgs[i].flags & I2C_M_RD)
			ret = zx_hdmi_i2c_read(hdmi, &msgs[i]);
		else
			ret = zx_hdmi_i2c_write(hdmi, &msgs[i]);

		if (ret < 0)
			break;
	}

	if (!ret)
		ret = num;

	/* Disable DDC master access */
	hdmi_writeb_mask(hdmi, TPI_DDC_MASTER_EN, HW_DDC_MASTER, 0);

	mutex_unlock(&ddc->lock);

	return ret;
}

static u32 zx_hdmi_i2c_func(struct i2c_adapter *adapter)
{
	return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
}

static const struct i2c_algorithm zx_hdmi_algorithm = {
	.master_xfer	= zx_hdmi_i2c_xfer,
	.functionality	= zx_hdmi_i2c_func,
};

static int zx_hdmi_ddc_register(struct zx_hdmi *hdmi)
{
	struct i2c_adapter *adap;
	struct zx_hdmi_i2c *ddc;
	int ret;

	ddc = devm_kzalloc(hdmi->dev, sizeof(*ddc), GFP_KERNEL);
	if (!ddc)
		return -ENOMEM;

	hdmi->ddc = ddc;
	mutex_init(&ddc->lock);

	adap = &ddc->adap;
	adap->owner = THIS_MODULE;
	adap->class = I2C_CLASS_DDC;
	adap->dev.parent = hdmi->dev;
	adap->algo = &zx_hdmi_algorithm;
	snprintf(adap->name, sizeof(adap->name), "zx hdmi i2c");

	ret = i2c_add_adapter(adap);
	if (ret) {
		DRM_DEV_ERROR(hdmi->dev, "failed to add I2C adapter: %d\n",
			      ret);
		return ret;
	}

	i2c_set_adapdata(adap, hdmi);

	return 0;
}

static int zx_hdmi_bind(struct device *dev, struct device *master, void *data)
{
	struct platform_device *pdev = to_platform_device(dev);
	struct drm_device *drm = data;
	struct resource *res;
	struct zx_hdmi *hdmi;
	int irq;
	int ret;

	hdmi = devm_kzalloc(dev, sizeof(*hdmi), GFP_KERNEL);
	if (!hdmi)
		return -ENOMEM;

	hdmi->dev = dev;
	hdmi->drm = drm;

	dev_set_drvdata(dev, hdmi);

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	hdmi->mmio = devm_ioremap_resource(dev, res);
	if (IS_ERR(hdmi->mmio)) {
		ret = PTR_ERR(hdmi->mmio);
		DRM_DEV_ERROR(dev, "failed to remap hdmi region: %d\n", ret);
		return ret;
	}

	irq = platform_get_irq(pdev, 0);
	if (irq < 0)
		return irq;

	hdmi->cec_clk = devm_clk_get(hdmi->dev, "osc_cec");
	if (IS_ERR(hdmi->cec_clk)) {
		ret = PTR_ERR(hdmi->cec_clk);
		DRM_DEV_ERROR(dev, "failed to get cec_clk: %d\n", ret);
		return ret;
	}

	hdmi->osc_clk = devm_clk_get(hdmi->dev, "osc_clk");
	if (IS_ERR(hdmi->osc_clk)) {
		ret = PTR_ERR(hdmi->osc_clk);
		DRM_DEV_ERROR(dev, "failed to get osc_clk: %d\n", ret);
		return ret;
	}

	hdmi->xclk = devm_clk_get(hdmi->dev, "xclk");
	if (IS_ERR(hdmi->xclk)) {
		ret = PTR_ERR(hdmi->xclk);
		DRM_DEV_ERROR(dev, "failed to get xclk: %d\n", ret);
		return ret;
	}

	ret = zx_hdmi_ddc_register(hdmi);
	if (ret) {
		DRM_DEV_ERROR(dev, "failed to register ddc: %d\n", ret);
		return ret;
	}

	ret = zx_hdmi_audio_register(hdmi);
	if (ret) {
		DRM_DEV_ERROR(dev, "failed to register audio: %d\n", ret);
		return ret;
	}

	ret = zx_hdmi_register(drm, hdmi);
	if (ret) {
		DRM_DEV_ERROR(dev, "failed to register hdmi: %d\n", ret);
		return ret;
	}

	ret = devm_request_threaded_irq(dev, irq, zx_hdmi_irq_handler,
					zx_hdmi_irq_thread, IRQF_SHARED,
					dev_name(dev), hdmi);
	if (ret) {
		DRM_DEV_ERROR(dev, "failed to request threaded irq: %d\n", ret);
		return ret;
	}

	return 0;
}

static void zx_hdmi_unbind(struct device *dev, struct device *master,
			   void *data)
{
	struct zx_hdmi *hdmi = dev_get_drvdata(dev);

	hdmi->connector.funcs->destroy(&hdmi->connector);
	hdmi->encoder.funcs->destroy(&hdmi->encoder);

	if (hdmi->audio_pdev)
		platform_device_unregister(hdmi->audio_pdev);
}

static const struct component_ops zx_hdmi_component_ops = {
	.bind = zx_hdmi_bind,
	.unbind = zx_hdmi_unbind,
};

static int zx_hdmi_probe(struct platform_device *pdev)
{
	return component_add(&pdev->dev, &zx_hdmi_component_ops);
}

static int zx_hdmi_remove(struct platform_device *pdev)
{
	component_del(&pdev->dev, &zx_hdmi_component_ops);
	return 0;
}

static const struct of_device_id zx_hdmi_of_match[] = {
	{ .compatible = "zte,zx296718-hdmi", },
	{ /* end */ },
};
MODULE_DEVICE_TABLE(of, zx_hdmi_of_match);

struct platform_driver zx_hdmi_driver = {
	.probe = zx_hdmi_probe,
	.remove = zx_hdmi_remove,
	.driver	= {
		.name = "zx-hdmi",
		.of_match_table	= zx_hdmi_of_match,
	},
};
Commit	Line	Data
0a886f59 SG	1	/*
	2	* Copyright 2016 Linaro Ltd.
	3	* Copyright 2016 ZTE Corporation.
	4	*
	5	* This program is free software; you can redistribute it and/or modify
	6	* it under the terms of the GNU General Public License version 2 as
	7	* published by the Free Software Foundation.
	8	*
	9	*/
	10
	11	#include <linux/clk.h>
	12	#include <linux/component.h>
	13	#include <linux/delay.h>
	14	#include <linux/err.h>
	15	#include <linux/hdmi.h>
	16	#include <linux/irq.h>
	17	#include <linux/mfd/syscon.h>
	18	#include <linux/module.h>
	19	#include <linux/mutex.h>
	20	#include <linux/of_device.h>
	21
	22	#include <drm/drm_atomic_helper.h>
	23	#include <drm/drm_crtc_helper.h>
	24	#include <drm/drm_edid.h>
	25	#include <drm/drm_of.h>
	26	#include <drm/drmP.h>
	27
83d71152 SG	28	#include <sound/hdmi-codec.h>
83d71152 SG	29
0a886f59 SG	30	#include "zx_hdmi_regs.h"
	31	#include "zx_vou.h"
	32
	33	#define ZX_HDMI_INFOFRAME_SIZE 31
	34	#define DDC_SEGMENT_ADDR 0x30
	35
	36	struct zx_hdmi_i2c {
	37	struct i2c_adapter adap;
	38	struct mutex lock;
	39	};
	40
	41	struct zx_hdmi {
	42	struct drm_connector connector;
	43	struct drm_encoder encoder;
	44	struct zx_hdmi_i2c *ddc;
	45	struct device *dev;
	46	struct drm_device *drm;
	47	void __iomem *mmio;
	48	struct clk *cec_clk;
	49	struct clk *osc_clk;
	50	struct clk *xclk;
	51	bool sink_is_hdmi;
	52	bool sink_has_audio;
83d71152	53	struct platform_device *audio_pdev;
0a886f59 SG	54	};
	55
	56	#define to_zx_hdmi(x) container_of(x, struct zx_hdmi, x)
	57
0a886f59 SG	58	static inline u8 hdmi_readb(struct zx_hdmi *hdmi, u16 offset)
	59	{
	60	return readl_relaxed(hdmi->mmio + offset * 4);
	61	}
	62
	63	static inline void hdmi_writeb(struct zx_hdmi *hdmi, u16 offset, u8 val)
	64	{
	65	writel_relaxed(val, hdmi->mmio + offset * 4);
	66	}
	67
	68	static inline void hdmi_writeb_mask(struct zx_hdmi *hdmi, u16 offset,
	69	u8 mask, u8 val)
	70	{
	71	u8 tmp;
	72
	73	tmp = hdmi_readb(hdmi, offset);
	74	tmp = (tmp & ~mask) \| (val & mask);
	75	hdmi_writeb(hdmi, offset, tmp);
	76	}
	77
	78	static int zx_hdmi_infoframe_trans(struct zx_hdmi *hdmi,
	79	union hdmi_infoframe *frame, u8 fsel)
	80	{
	81	u8 buffer[ZX_HDMI_INFOFRAME_SIZE];
	82	int num;
	83	int i;
	84
	85	hdmi_writeb(hdmi, TPI_INFO_FSEL, fsel);
	86
	87	num = hdmi_infoframe_pack(frame, buffer, ZX_HDMI_INFOFRAME_SIZE);
	88	if (num < 0) {
	89	DRM_DEV_ERROR(hdmi->dev, "failed to pack infoframe: %d\n", num);
	90	return num;
	91	}
	92
	93	for (i = 0; i < num; i++)
	94	hdmi_writeb(hdmi, TPI_INFO_B0 + i, buffer[i]);
	95
	96	hdmi_writeb_mask(hdmi, TPI_INFO_EN, TPI_INFO_TRANS_RPT,
	97	TPI_INFO_TRANS_RPT);
	98	hdmi_writeb_mask(hdmi, TPI_INFO_EN, TPI_INFO_TRANS_EN,
	99	TPI_INFO_TRANS_EN);
	100
	101	return num;
	102	}
	103
	104	static int zx_hdmi_config_video_vsi(struct zx_hdmi *hdmi,
	105	struct drm_display_mode *mode)
	106	{
	107	union hdmi_infoframe frame;
	108	int ret;
	109
	110	ret = drm_hdmi_vendor_infoframe_from_display_mode(&frame.vendor.hdmi,
f1781e9b	111	&hdmi->connector,
0a886f59 SG	112	mode);
	113	if (ret) {
	114	DRM_DEV_ERROR(hdmi->dev, "failed to get vendor infoframe: %d\n",
	115	ret);
	116	return ret;
	117	}
	118
	119	return zx_hdmi_infoframe_trans(hdmi, &frame, FSEL_VSIF);
	120	}
	121
	122	static int zx_hdmi_config_video_avi(struct zx_hdmi *hdmi,
	123	struct drm_display_mode *mode)
	124	{
	125	union hdmi_infoframe frame;
	126	int ret;
	127
13d0add3 VS	128	ret = drm_hdmi_avi_infoframe_from_display_mode(&frame.avi,
	129	&hdmi->connector,
	130	mode);
0a886f59 SG	131	if (ret) {
	132	DRM_DEV_ERROR(hdmi->dev, "failed to get avi infoframe: %d\n",
	133	ret);
	134	return ret;
	135	}
	136
	137	/* We always use YUV444 for HDMI output. */
	138	frame.avi.colorspace = HDMI_COLORSPACE_YUV444;
	139
	140	return zx_hdmi_infoframe_trans(hdmi, &frame, FSEL_AVI);
	141	}
	142
	143	static void zx_hdmi_encoder_mode_set(struct drm_encoder *encoder,
	144	struct drm_display_mode *mode,
	145	struct drm_display_mode *adj_mode)
	146	{
	147	struct zx_hdmi *hdmi = to_zx_hdmi(encoder);
	148
	149	if (hdmi->sink_is_hdmi) {
	150	zx_hdmi_config_video_avi(hdmi, mode);
	151	zx_hdmi_config_video_vsi(hdmi, mode);
	152	}
	153	}
	154
	155	static void zx_hdmi_phy_start(struct zx_hdmi *hdmi)
	156	{
	157	/* Copy from ZTE BSP code */
	158	hdmi_writeb(hdmi, 0x222, 0x0);
	159	hdmi_writeb(hdmi, 0x224, 0x4);
	160	hdmi_writeb(hdmi, 0x909, 0x0);
	161	hdmi_writeb(hdmi, 0x7b0, 0x90);
	162	hdmi_writeb(hdmi, 0x7b1, 0x00);
	163	hdmi_writeb(hdmi, 0x7b2, 0xa7);
	164	hdmi_writeb(hdmi, 0x7b8, 0xaa);
	165	hdmi_writeb(hdmi, 0x7b2, 0xa7);
	166	hdmi_writeb(hdmi, 0x7b3, 0x0f);
	167	hdmi_writeb(hdmi, 0x7b4, 0x0f);
	168	hdmi_writeb(hdmi, 0x7b5, 0x55);
	169	hdmi_writeb(hdmi, 0x7b7, 0x03);
	170	hdmi_writeb(hdmi, 0x7b9, 0x12);
	171	hdmi_writeb(hdmi, 0x7ba, 0x32);
	172	hdmi_writeb(hdmi, 0x7bc, 0x68);
	173	hdmi_writeb(hdmi, 0x7be, 0x40);
	174	hdmi_writeb(hdmi, 0x7bf, 0x84);
	175	hdmi_writeb(hdmi, 0x7c1, 0x0f);
	176	hdmi_writeb(hdmi, 0x7c8, 0x02);
	177	hdmi_writeb(hdmi, 0x7c9, 0x03);
	178	hdmi_writeb(hdmi, 0x7ca, 0x40);
	179	hdmi_writeb(hdmi, 0x7dc, 0x31);
	180	hdmi_writeb(hdmi, 0x7e2, 0x04);
	181	hdmi_writeb(hdmi, 0x7e0, 0x06);
	182	hdmi_writeb(hdmi, 0x7cb, 0x68);
	183	hdmi_writeb(hdmi, 0x7f9, 0x02);
	184	hdmi_writeb(hdmi, 0x7b6, 0x02);
	185	hdmi_writeb(hdmi, 0x7f3, 0x0);
	186	}
	187
	188	static void zx_hdmi_hw_enable(struct zx_hdmi *hdmi)
	189	{
	190	/* Enable pclk */
	191	hdmi_writeb_mask(hdmi, CLKPWD, CLKPWD_PDIDCK, CLKPWD_PDIDCK);
	192
	193	/* Enable HDMI for TX */
	194	hdmi_writeb_mask(hdmi, FUNC_SEL, FUNC_HDMI_EN, FUNC_HDMI_EN);
195
196	/* Enable deep color packet */
197	hdmi_writeb_mask(hdmi, P2T_CTRL, P2T_DC_PKT_EN, P2T_DC_PKT_EN);
198
199	/* Enable HDMI/MHL mode for output */
200	hdmi_writeb_mask(hdmi, TEST_TXCTRL, TEST_TXCTRL_HDMI_MODE,
201	TEST_TXCTRL_HDMI_MODE);
202
203	/* Configure reg_qc_sel */
204	hdmi_writeb(hdmi, HDMICTL4, 0x3);
205
206	/* Enable interrupt */
207	hdmi_writeb_mask(hdmi, INTR1_MASK, INTR1_MONITOR_DETECT,
208	INTR1_MONITOR_DETECT);
209
210	/* Start up phy */
211	zx_hdmi_phy_start(hdmi);
212	}
213
214	static void zx_hdmi_hw_disable(struct zx_hdmi *hdmi)
215	{
216	/* Disable interrupt */
217	hdmi_writeb_mask(hdmi, INTR1_MASK, INTR1_MONITOR_DETECT, 0);
218
219	/* Disable deep color packet */
220	hdmi_writeb_mask(hdmi, P2T_CTRL, P2T_DC_PKT_EN, P2T_DC_PKT_EN);
221
222	/* Disable HDMI for TX */
223	hdmi_writeb_mask(hdmi, FUNC_SEL, FUNC_HDMI_EN, 0);
224
225	/* Disable pclk */
226	hdmi_writeb_mask(hdmi, CLKPWD, CLKPWD_PDIDCK, 0);
227	}
228
229	static void zx_hdmi_encoder_enable(struct drm_encoder *encoder)
230	{
231	struct zx_hdmi *hdmi = to_zx_hdmi(encoder);
232
233	clk_prepare_enable(hdmi->cec_clk);
234	clk_prepare_enable(hdmi->osc_clk);
235	clk_prepare_enable(hdmi->xclk);
236
237	zx_hdmi_hw_enable(hdmi);
238
831a8d5e	239	vou_inf_enable(VOU_HDMI, encoder->crtc);
0a886f59 SG	240	}
	241
	242	static void zx_hdmi_encoder_disable(struct drm_encoder *encoder)
	243	{
	244	struct zx_hdmi *hdmi = to_zx_hdmi(encoder);
	245
831a8d5e	246	vou_inf_disable(VOU_HDMI, encoder->crtc);
0a886f59 SG	247
	248	zx_hdmi_hw_disable(hdmi);
	249
	250	clk_disable_unprepare(hdmi->xclk);
	251	clk_disable_unprepare(hdmi->osc_clk);
	252	clk_disable_unprepare(hdmi->cec_clk);
	253	}
	254
	255	static const struct drm_encoder_helper_funcs zx_hdmi_encoder_helper_funcs = {
	256	.enable = zx_hdmi_encoder_enable,
	257	.disable = zx_hdmi_encoder_disable,
	258	.mode_set = zx_hdmi_encoder_mode_set,
	259	};
	260
	261	static const struct drm_encoder_funcs zx_hdmi_encoder_funcs = {
	262	.destroy = drm_encoder_cleanup,
	263	};
	264
	265	static int zx_hdmi_connector_get_modes(struct drm_connector *connector)
	266	{
	267	struct zx_hdmi *hdmi = to_zx_hdmi(connector);
	268	struct edid *edid;
	269	int ret;
	270
	271	edid = drm_get_edid(connector, &hdmi->ddc->adap);
	272	if (!edid)
	273	return 0;
	274
	275	hdmi->sink_is_hdmi = drm_detect_hdmi_monitor(edid);
	276	hdmi->sink_has_audio = drm_detect_monitor_audio(edid);
c555f023	277	drm_connector_update_edid_property(connector, edid);
0a886f59 SG	278	ret = drm_add_edid_modes(connector, edid);
	279	kfree(edid);
	280
	281	return ret;
	282	}
	283
	284	static enum drm_mode_status
	285	zx_hdmi_connector_mode_valid(struct drm_connector *connector,
	286	struct drm_display_mode *mode)
	287	{
	288	return MODE_OK;
	289	}
	290
	291	static struct drm_connector_helper_funcs zx_hdmi_connector_helper_funcs = {
	292	.get_modes = zx_hdmi_connector_get_modes,
	293	.mode_valid = zx_hdmi_connector_mode_valid,
	294	};
	295
	296	static enum drm_connector_status
	297	zx_hdmi_connector_detect(struct drm_connector *connector, bool force)
	298	{
	299	struct zx_hdmi *hdmi = to_zx_hdmi(connector);
	300
	301	return (hdmi_readb(hdmi, TPI_HPD_RSEN) & TPI_HPD_CONNECTION) ?
	302	connector_status_connected : connector_status_disconnected;
	303	}
	304
	305	static const struct drm_connector_funcs zx_hdmi_connector_funcs = {
0a886f59 SG	306	.fill_modes = drm_helper_probe_single_connector_modes,
	307	.detect = zx_hdmi_connector_detect,
	308	.destroy = drm_connector_cleanup,
	309	.reset = drm_atomic_helper_connector_reset,
	310	.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
	311	.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
	312	};
	313
	314	static int zx_hdmi_register(struct drm_device drm, struct zx_hdmi hdmi)
	315	{
	316	struct drm_encoder *encoder = &hdmi->encoder;
	317
	318	encoder->possible_crtcs = VOU_CRTC_MASK;
	319
	320	drm_encoder_init(drm, encoder, &zx_hdmi_encoder_funcs,
	321	DRM_MODE_ENCODER_TMDS, NULL);
	322	drm_encoder_helper_add(encoder, &zx_hdmi_encoder_helper_funcs);
	323
	324	hdmi->connector.polled = DRM_CONNECTOR_POLL_HPD;
	325
	326	drm_connector_init(drm, &hdmi->connector, &zx_hdmi_connector_funcs,
	327	DRM_MODE_CONNECTOR_HDMIA);
	328	drm_connector_helper_add(&hdmi->connector,
	329	&zx_hdmi_connector_helper_funcs);
	330
cde4c44d	331	drm_connector_attach_encoder(&hdmi->connector, encoder);
0a886f59 SG	332
	333	return 0;
	334	}
	335
	336	static irqreturn_t zx_hdmi_irq_thread(int irq, void *dev_id)
	337	{
	338	struct zx_hdmi *hdmi = dev_id;
	339
	340	drm_helper_hpd_irq_event(hdmi->connector.dev);
	341
	342	return IRQ_HANDLED;
	343	}
	344
	345	static irqreturn_t zx_hdmi_irq_handler(int irq, void *dev_id)
	346	{
	347	struct zx_hdmi *hdmi = dev_id;
	348	u8 lstat;
	349
	350	lstat = hdmi_readb(hdmi, L1_INTR_STAT);
	351
	352	/* Monitor detect/HPD interrupt */
	353	if (lstat & L1_INTR_STAT_INTR1) {
	354	u8 stat;
	355
	356	stat = hdmi_readb(hdmi, INTR1_STAT);
	357	hdmi_writeb(hdmi, INTR1_STAT, stat);
	358
	359	if (stat & INTR1_MONITOR_DETECT)
	360	return IRQ_WAKE_THREAD;
	361	}
	362
	363	return IRQ_NONE;
	364	}
	365
83d71152 SG	366	static int zx_hdmi_audio_startup(struct device dev, void data)
	367	{
	368	struct zx_hdmi *hdmi = dev_get_drvdata(dev);
	369	struct drm_encoder *encoder = &hdmi->encoder;
	370
	371	vou_inf_hdmi_audio_sel(encoder->crtc, VOU_HDMI_AUD_SPDIF);
	372
	373	return 0;
	374	}
	375
	376	static void zx_hdmi_audio_shutdown(struct device dev, void data)
	377	{
	378	struct zx_hdmi *hdmi = dev_get_drvdata(dev);
	379
	380	/* Disable audio input */
	381	hdmi_writeb_mask(hdmi, AUD_EN, AUD_IN_EN, 0);
	382	}
	383
	384	static inline int zx_hdmi_audio_get_n(unsigned int fs)
	385	{
	386	unsigned int n;
	387
	388	if (fs && (fs % 44100) == 0)
	389	n = 6272 * (fs / 44100);
	390	else
	391	n = fs * 128 / 1000;
	392
	393	return n;
	394	}
	395
	396	static int zx_hdmi_audio_hw_params(struct device *dev,
	397	void *data,
	398	struct hdmi_codec_daifmt *daifmt,
	399	struct hdmi_codec_params *params)
	400	{
	401	struct zx_hdmi *hdmi = dev_get_drvdata(dev);
	402	struct hdmi_audio_infoframe *cea = &params->cea;
	403	union hdmi_infoframe frame;
	404	int n;
	405
	406	/* We only support spdif for now */
	407	if (daifmt->fmt != HDMI_SPDIF) {
	408	DRM_DEV_ERROR(hdmi->dev, "invalid daifmt %d\n", daifmt->fmt);
	409	return -EINVAL;
	410	}
	411
	412	switch (params->sample_width) {
	413	case 16:
	414	hdmi_writeb_mask(hdmi, TPI_AUD_CONFIG, SPDIF_SAMPLE_SIZE_MASK,
	415	SPDIF_SAMPLE_SIZE_16BIT);
	416	break;
	417	case 20:
	418	hdmi_writeb_mask(hdmi, TPI_AUD_CONFIG, SPDIF_SAMPLE_SIZE_MASK,
	419	SPDIF_SAMPLE_SIZE_20BIT);
	420	break;
	421	case 24:
	422	hdmi_writeb_mask(hdmi, TPI_AUD_CONFIG, SPDIF_SAMPLE_SIZE_MASK,
	423	SPDIF_SAMPLE_SIZE_24BIT);
	424	break;
	425	default:
	426	DRM_DEV_ERROR(hdmi->dev, "invalid sample width %d\n",
	427	params->sample_width);
	428	return -EINVAL;
	429	}
430
431	/* CTS is calculated by hardware, and we only need to take care of N */
432	n = zx_hdmi_audio_get_n(params->sample_rate);
433	hdmi_writeb(hdmi, N_SVAL1, n & 0xff);
434	hdmi_writeb(hdmi, N_SVAL2, (n >> 8) & 0xff);
435	hdmi_writeb(hdmi, N_SVAL3, (n >> 16) & 0xf);
436
437	/* Enable spdif mode */
438	hdmi_writeb_mask(hdmi, AUD_MODE, SPDIF_EN, SPDIF_EN);
439
440	/* Enable audio input */
441	hdmi_writeb_mask(hdmi, AUD_EN, AUD_IN_EN, AUD_IN_EN);
442
443	memcpy(&frame.audio, cea, sizeof(*cea));
444
445	return zx_hdmi_infoframe_trans(hdmi, &frame, FSEL_AUDIO);
446	}
447
448	static int zx_hdmi_audio_digital_mute(struct device dev, void data,
449	bool enable)
450	{
451	struct zx_hdmi *hdmi = dev_get_drvdata(dev);
452
453	if (enable)
454	hdmi_writeb_mask(hdmi, TPI_AUD_CONFIG, TPI_AUD_MUTE,
455	TPI_AUD_MUTE);
456	else
457	hdmi_writeb_mask(hdmi, TPI_AUD_CONFIG, TPI_AUD_MUTE, 0);
458
459	return 0;
460	}
461
462	static int zx_hdmi_audio_get_eld(struct device dev, void data,
463	uint8_t *buf, size_t len)
464	{
465	struct zx_hdmi *hdmi = dev_get_drvdata(dev);
466	struct drm_connector *connector = &hdmi->connector;
467
468	memcpy(buf, connector->eld, min(sizeof(connector->eld), len));
469
470	return 0;
471	}
472
473	static const struct hdmi_codec_ops zx_hdmi_codec_ops = {
474	.audio_startup = zx_hdmi_audio_startup,
475	.hw_params = zx_hdmi_audio_hw_params,
476	.audio_shutdown = zx_hdmi_audio_shutdown,
477	.digital_mute = zx_hdmi_audio_digital_mute,
478	.get_eld = zx_hdmi_audio_get_eld,
479	};
480
481	static struct hdmi_codec_pdata zx_hdmi_codec_pdata = {
482	.ops = &zx_hdmi_codec_ops,
483	.spdif = 1,
484	};
485
486	static int zx_hdmi_audio_register(struct zx_hdmi *hdmi)
487	{
488	struct platform_device *pdev;
489
490	pdev = platform_device_register_data(hdmi->dev, HDMI_CODEC_DRV_NAME,
491	PLATFORM_DEVID_AUTO,
492	&zx_hdmi_codec_pdata,
493	sizeof(zx_hdmi_codec_pdata));
494	if (IS_ERR(pdev))
495	return PTR_ERR(pdev);
496
497	hdmi->audio_pdev = pdev;
498
499	return 0;
500	}
501
0a886f59 SG	502	static int zx_hdmi_i2c_read(struct zx_hdmi hdmi, struct i2c_msg msg)
	503	{
	504	int len = msg->len;
	505	u8 *buf = msg->buf;
	506	int retry = 0;
	507	int ret = 0;
	508
	509	/* Bits [9:8] of bytes */
	510	hdmi_writeb(hdmi, ZX_DDC_DIN_CNT2, (len >> 8) & 0xff);
	511	/* Bits [7:0] of bytes */
	512	hdmi_writeb(hdmi, ZX_DDC_DIN_CNT1, len & 0xff);
	513
	514	/* Clear FIFO */
	515	hdmi_writeb_mask(hdmi, ZX_DDC_CMD, DDC_CMD_MASK, DDC_CMD_CLEAR_FIFO);
	516
	517	/* Kick off the read */
	518	hdmi_writeb_mask(hdmi, ZX_DDC_CMD, DDC_CMD_MASK,
	519	DDC_CMD_SEQUENTIAL_READ);
	520
	521	while (len > 0) {
	522	int cnt, i;
	523
	524	/* FIFO needs some time to get ready */
	525	usleep_range(500, 1000);
	526
	527	cnt = hdmi_readb(hdmi, ZX_DDC_DOUT_CNT) & DDC_DOUT_CNT_MASK;
	528	if (cnt == 0) {
	529	if (++retry > 5) {
	530	DRM_DEV_ERROR(hdmi->dev,
	531	"DDC FIFO read timed out!");
	532	return -ETIMEDOUT;
	533	}
	534	continue;
	535	}
	536
	537	for (i = 0; i < cnt; i++)
	538	*buf++ = hdmi_readb(hdmi, ZX_DDC_DATA);
	539	len -= cnt;
	540	}
	541
	542	return ret;
	543	}
	544
	545	static int zx_hdmi_i2c_write(struct zx_hdmi hdmi, struct i2c_msg msg)
	546	{
	547	/*
	548	* The DDC I2C adapter is only for reading EDID data, so we assume
	549	* that the write to this adapter must be the EDID data offset.
	550	*/
	551	if ((msg->len != 1) \|\|
	552	((msg->addr != DDC_ADDR) && (msg->addr != DDC_SEGMENT_ADDR)))
	553	return -EINVAL;
	554
	555	if (msg->addr == DDC_SEGMENT_ADDR)
	556	hdmi_writeb(hdmi, ZX_DDC_SEGM, msg->addr << 1);
	557	else if (msg->addr == DDC_ADDR)
	558	hdmi_writeb(hdmi, ZX_DDC_ADDR, msg->addr << 1);
	559
	560	hdmi_writeb(hdmi, ZX_DDC_OFFSET, msg->buf[0]);
	561
	562	return 0;
	563	}
	564
	565	static int zx_hdmi_i2c_xfer(struct i2c_adapter adap, struct i2c_msg msgs,
566	int num)
567	{
568	struct zx_hdmi *hdmi = i2c_get_adapdata(adap);
569	struct zx_hdmi_i2c *ddc = hdmi->ddc;
570	int i, ret = 0;
571
572	mutex_lock(&ddc->lock);
573
574	/* Enable DDC master access */
575	hdmi_writeb_mask(hdmi, TPI_DDC_MASTER_EN, HW_DDC_MASTER, HW_DDC_MASTER);
576
577	for (i = 0; i < num; i++) {
578	DRM_DEV_DEBUG(hdmi->dev,
579	"xfer: num: %d/%d, len: %d, flags: %#x\n",
580	i + 1, num, msgs[i].len, msgs[i].flags);
581
582	if (msgs[i].flags & I2C_M_RD)
583	ret = zx_hdmi_i2c_read(hdmi, &msgs[i]);
584	else
585	ret = zx_hdmi_i2c_write(hdmi, &msgs[i]);
586
587	if (ret < 0)
588	break;
589	}
590
591	if (!ret)
592	ret = num;
593
594	/* Disable DDC master access */
595	hdmi_writeb_mask(hdmi, TPI_DDC_MASTER_EN, HW_DDC_MASTER, 0);
596
597	mutex_unlock(&ddc->lock);
598
599	return ret;
600	}
601
602	static u32 zx_hdmi_i2c_func(struct i2c_adapter *adapter)
603	{
604	return I2C_FUNC_I2C \| I2C_FUNC_SMBUS_EMUL;
605	}
606
607	static const struct i2c_algorithm zx_hdmi_algorithm = {
608	.master_xfer = zx_hdmi_i2c_xfer,
609	.functionality = zx_hdmi_i2c_func,
610	};
611
612	static int zx_hdmi_ddc_register(struct zx_hdmi *hdmi)
613	{
614	struct i2c_adapter *adap;
615	struct zx_hdmi_i2c *ddc;
616	int ret;
617
618	ddc = devm_kzalloc(hdmi->dev, sizeof(*ddc), GFP_KERNEL);
619	if (!ddc)
620	return -ENOMEM;
621
622	hdmi->ddc = ddc;
623	mutex_init(&ddc->lock);
624
625	adap = &ddc->adap;
626	adap->owner = THIS_MODULE;
627	adap->class = I2C_CLASS_DDC;
628	adap->dev.parent = hdmi->dev;
629	adap->algo = &zx_hdmi_algorithm;
630	snprintf(adap->name, sizeof(adap->name), "zx hdmi i2c");
631
632	ret = i2c_add_adapter(adap);
633	if (ret) {
634	DRM_DEV_ERROR(hdmi->dev, "failed to add I2C adapter: %d\n",
635	ret);
636	return ret;
637	}
638
639	i2c_set_adapdata(adap, hdmi);
640
641	return 0;
642	}
643
644	static int zx_hdmi_bind(struct device dev, struct device master, void *data)
645	{
646	struct platform_device *pdev = to_platform_device(dev);
647	struct drm_device *drm = data;
648	struct resource *res;
649	struct zx_hdmi *hdmi;
650	int irq;
651	int ret;
652
653	hdmi = devm_kzalloc(dev, sizeof(*hdmi), GFP_KERNEL);
654	if (!hdmi)
655	return -ENOMEM;
656
657	hdmi->dev = dev;
658	hdmi->drm = drm;
0a886f59 SG	659
	660	dev_set_drvdata(dev, hdmi);
	661
	662	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	663	hdmi->mmio = devm_ioremap_resource(dev, res);
	664	if (IS_ERR(hdmi->mmio)) {
	665	ret = PTR_ERR(hdmi->mmio);
	666	DRM_DEV_ERROR(dev, "failed to remap hdmi region: %d\n", ret);
	667	return ret;
	668	}
	669
	670	irq = platform_get_irq(pdev, 0);
	671	if (irq < 0)
	672	return irq;
	673
	674	hdmi->cec_clk = devm_clk_get(hdmi->dev, "osc_cec");
	675	if (IS_ERR(hdmi->cec_clk)) {
	676	ret = PTR_ERR(hdmi->cec_clk);
	677	DRM_DEV_ERROR(dev, "failed to get cec_clk: %d\n", ret);
	678	return ret;
	679	}
	680
	681	hdmi->osc_clk = devm_clk_get(hdmi->dev, "osc_clk");
	682	if (IS_ERR(hdmi->osc_clk)) {
	683	ret = PTR_ERR(hdmi->osc_clk);
	684	DRM_DEV_ERROR(dev, "failed to get osc_clk: %d\n", ret);
	685	return ret;
	686	}
	687
	688	hdmi->xclk = devm_clk_get(hdmi->dev, "xclk");
	689	if (IS_ERR(hdmi->xclk)) {
	690	ret = PTR_ERR(hdmi->xclk);
	691	DRM_DEV_ERROR(dev, "failed to get xclk: %d\n", ret);
	692	return ret;
	693	}
	694
	695	ret = zx_hdmi_ddc_register(hdmi);
	696	if (ret) {
	697	DRM_DEV_ERROR(dev, "failed to register ddc: %d\n", ret);
	698	return ret;
	699	}
	700
83d71152 SG	701	ret = zx_hdmi_audio_register(hdmi);
	702	if (ret) {
	703	DRM_DEV_ERROR(dev, "failed to register audio: %d\n", ret);
	704	return ret;
	705	}
	706
0a886f59 SG	707	ret = zx_hdmi_register(drm, hdmi);
	708	if (ret) {
	709	DRM_DEV_ERROR(dev, "failed to register hdmi: %d\n", ret);
	710	return ret;
	711	}
	712
	713	ret = devm_request_threaded_irq(dev, irq, zx_hdmi_irq_handler,
	714	zx_hdmi_irq_thread, IRQF_SHARED,
	715	dev_name(dev), hdmi);
	716	if (ret) {
	717	DRM_DEV_ERROR(dev, "failed to request threaded irq: %d\n", ret);
	718	return ret;
	719	}
	720
	721	return 0;
	722	}
	723
	724	static void zx_hdmi_unbind(struct device dev, struct device master,
	725	void *data)
	726	{
	727	struct zx_hdmi *hdmi = dev_get_drvdata(dev);
	728
	729	hdmi->connector.funcs->destroy(&hdmi->connector);
	730	hdmi->encoder.funcs->destroy(&hdmi->encoder);
83d71152 SG	731
	732	if (hdmi->audio_pdev)
	733	platform_device_unregister(hdmi->audio_pdev);
0a886f59 SG	734	}
	735
	736	static const struct component_ops zx_hdmi_component_ops = {
	737	.bind = zx_hdmi_bind,
	738	.unbind = zx_hdmi_unbind,
	739	};
	740
	741	static int zx_hdmi_probe(struct platform_device *pdev)
	742	{
	743	return component_add(&pdev->dev, &zx_hdmi_component_ops);
	744	}
	745
	746	static int zx_hdmi_remove(struct platform_device *pdev)
	747	{
	748	component_del(&pdev->dev, &zx_hdmi_component_ops);
	749	return 0;
	750	}
	751
	752	static const struct of_device_id zx_hdmi_of_match[] = {
	753	{ .compatible = "zte,zx296718-hdmi", },
	754	{ /* end */ },
	755	};
	756	MODULE_DEVICE_TABLE(of, zx_hdmi_of_match);
	757
	758	struct platform_driver zx_hdmi_driver = {
	759	.probe = zx_hdmi_probe,
	760	.remove = zx_hdmi_remove,
	761	.driver = {
	762	.name = "zx-hdmi",
	763	.of_match_table = zx_hdmi_of_match,
	764	},
	765	};