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1 | /* |
2 | * Copyright (c) 2012-2013, NVIDIA Corporation. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify it | |
5 | * under the terms and conditions of the GNU General Public License, | |
6 | * version 2, as published by the Free Software Foundation. | |
7 | * | |
8 | * This program is distributed in the hope it will be useful, but WITHOUT | |
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
11 | * more details. | |
12 | * | |
13 | * You should have received a copy of the GNU General Public License | |
14 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
15 | */ | |
16 | ||
17 | #ifndef HOST1X_DEV_H | |
18 | #define HOST1X_DEV_H | |
19 | ||
20 | #include <linux/platform_device.h> | |
21 | #include <linux/device.h> | |
22 | ||
23 | #include "syncpt.h" | |
7ede0b0b | 24 | #include "intr.h" |
75471687 TB |
25 | |
26 | struct host1x_syncpt; | |
27 | ||
28 | struct host1x_syncpt_ops { | |
29 | void (*restore)(struct host1x_syncpt *syncpt); | |
30 | void (*restore_wait_base)(struct host1x_syncpt *syncpt); | |
31 | void (*load_wait_base)(struct host1x_syncpt *syncpt); | |
32 | u32 (*load)(struct host1x_syncpt *syncpt); | |
33 | void (*cpu_incr)(struct host1x_syncpt *syncpt); | |
34 | int (*patch_wait)(struct host1x_syncpt *syncpt, void *patch_addr); | |
35 | }; | |
36 | ||
7ede0b0b TB |
37 | struct host1x_intr_ops { |
38 | int (*init_host_sync)(struct host1x *host, u32 cpm, | |
39 | void (*syncpt_thresh_work)(struct work_struct *work)); | |
40 | void (*set_syncpt_threshold)( | |
41 | struct host1x *host, u32 id, u32 thresh); | |
42 | void (*enable_syncpt_intr)(struct host1x *host, u32 id); | |
43 | void (*disable_syncpt_intr)(struct host1x *host, u32 id); | |
44 | void (*disable_all_syncpt_intrs)(struct host1x *host); | |
45 | int (*free_syncpt_irq)(struct host1x *host); | |
46 | }; | |
47 | ||
75471687 TB |
48 | struct host1x_info { |
49 | int nb_channels; /* host1x: num channels supported */ | |
50 | int nb_pts; /* host1x: num syncpoints supported */ | |
51 | int nb_bases; /* host1x: num syncpoints supported */ | |
52 | int nb_mlocks; /* host1x: number of mlocks */ | |
53 | int (*init)(struct host1x *); /* initialize per SoC ops */ | |
54 | int sync_offset; | |
55 | }; | |
56 | ||
57 | struct host1x { | |
58 | const struct host1x_info *info; | |
59 | ||
60 | void __iomem *regs; | |
61 | struct host1x_syncpt *syncpt; | |
62 | struct device *dev; | |
63 | struct clk *clk; | |
64 | ||
7ede0b0b TB |
65 | struct mutex intr_mutex; |
66 | struct workqueue_struct *intr_wq; | |
67 | int intr_syncpt_irq; | |
68 | ||
75471687 | 69 | const struct host1x_syncpt_ops *syncpt_op; |
7ede0b0b TB |
70 | const struct host1x_intr_ops *intr_op; |
71 | ||
75471687 TB |
72 | }; |
73 | ||
74 | void host1x_sync_writel(struct host1x *host1x, u32 r, u32 v); | |
75 | u32 host1x_sync_readl(struct host1x *host1x, u32 r); | |
76 | ||
77 | static inline void host1x_hw_syncpt_restore(struct host1x *host, | |
78 | struct host1x_syncpt *sp) | |
79 | { | |
80 | host->syncpt_op->restore(sp); | |
81 | } | |
82 | ||
83 | static inline void host1x_hw_syncpt_restore_wait_base(struct host1x *host, | |
84 | struct host1x_syncpt *sp) | |
85 | { | |
86 | host->syncpt_op->restore_wait_base(sp); | |
87 | } | |
88 | ||
89 | static inline void host1x_hw_syncpt_load_wait_base(struct host1x *host, | |
90 | struct host1x_syncpt *sp) | |
91 | { | |
92 | host->syncpt_op->load_wait_base(sp); | |
93 | } | |
94 | ||
95 | static inline u32 host1x_hw_syncpt_load(struct host1x *host, | |
96 | struct host1x_syncpt *sp) | |
97 | { | |
98 | return host->syncpt_op->load(sp); | |
99 | } | |
100 | ||
101 | static inline void host1x_hw_syncpt_cpu_incr(struct host1x *host, | |
102 | struct host1x_syncpt *sp) | |
103 | { | |
104 | host->syncpt_op->cpu_incr(sp); | |
105 | } | |
106 | ||
107 | static inline int host1x_hw_syncpt_patch_wait(struct host1x *host, | |
108 | struct host1x_syncpt *sp, | |
109 | void *patch_addr) | |
110 | { | |
111 | return host->syncpt_op->patch_wait(sp, patch_addr); | |
112 | } | |
113 | ||
7ede0b0b TB |
114 | static inline int host1x_hw_intr_init_host_sync(struct host1x *host, u32 cpm, |
115 | void (*syncpt_thresh_work)(struct work_struct *)) | |
116 | { | |
117 | return host->intr_op->init_host_sync(host, cpm, syncpt_thresh_work); | |
118 | } | |
119 | ||
120 | static inline void host1x_hw_intr_set_syncpt_threshold(struct host1x *host, | |
121 | u32 id, u32 thresh) | |
122 | { | |
123 | host->intr_op->set_syncpt_threshold(host, id, thresh); | |
124 | } | |
125 | ||
126 | static inline void host1x_hw_intr_enable_syncpt_intr(struct host1x *host, | |
127 | u32 id) | |
128 | { | |
129 | host->intr_op->enable_syncpt_intr(host, id); | |
130 | } | |
131 | ||
132 | static inline void host1x_hw_intr_disable_syncpt_intr(struct host1x *host, | |
133 | u32 id) | |
134 | { | |
135 | host->intr_op->disable_syncpt_intr(host, id); | |
136 | } | |
137 | ||
138 | static inline void host1x_hw_intr_disable_all_syncpt_intrs(struct host1x *host) | |
139 | { | |
140 | host->intr_op->disable_all_syncpt_intrs(host); | |
141 | } | |
142 | ||
143 | static inline int host1x_hw_intr_free_syncpt_irq(struct host1x *host) | |
144 | { | |
145 | return host->intr_op->free_syncpt_irq(host); | |
146 | } | |
75471687 | 147 | #endif |