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75471687 TB |
1 | /* |
2 | * Copyright (c) 2012-2013, NVIDIA Corporation. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify it | |
5 | * under the terms and conditions of the GNU General Public License, | |
6 | * version 2, as published by the Free Software Foundation. | |
7 | * | |
8 | * This program is distributed in the hope it will be useful, but WITHOUT | |
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
11 | * more details. | |
12 | * | |
13 | * You should have received a copy of the GNU General Public License | |
14 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
15 | */ | |
16 | ||
17 | #ifndef HOST1X_DEV_H | |
18 | #define HOST1X_DEV_H | |
19 | ||
20 | #include <linux/platform_device.h> | |
21 | #include <linux/device.h> | |
22 | ||
6579324a | 23 | #include "channel.h" |
75471687 | 24 | #include "syncpt.h" |
7ede0b0b | 25 | #include "intr.h" |
6579324a TB |
26 | #include "cdma.h" |
27 | #include "job.h" | |
75471687 TB |
28 | |
29 | struct host1x_syncpt; | |
f5a954fe | 30 | struct host1x_syncpt_base; |
6579324a TB |
31 | struct host1x_channel; |
32 | struct host1x_cdma; | |
33 | struct host1x_job; | |
34 | struct push_buffer; | |
6236451d TB |
35 | struct output; |
36 | struct dentry; | |
6579324a TB |
37 | |
38 | struct host1x_channel_ops { | |
39 | int (*init)(struct host1x_channel *channel, struct host1x *host, | |
40 | unsigned int id); | |
41 | int (*submit)(struct host1x_job *job); | |
42 | }; | |
43 | ||
44 | struct host1x_cdma_ops { | |
45 | void (*start)(struct host1x_cdma *cdma); | |
46 | void (*stop)(struct host1x_cdma *cdma); | |
47 | void (*flush)(struct host1x_cdma *cdma); | |
48 | int (*timeout_init)(struct host1x_cdma *cdma, u32 syncpt_id); | |
49 | void (*timeout_destroy)(struct host1x_cdma *cdma); | |
50 | void (*freeze)(struct host1x_cdma *cdma); | |
51 | void (*resume)(struct host1x_cdma *cdma, u32 getptr); | |
52 | void (*timeout_cpu_incr)(struct host1x_cdma *cdma, u32 getptr, | |
53 | u32 syncpt_incrs, u32 syncval, u32 nr_slots); | |
54 | }; | |
55 | ||
56 | struct host1x_pushbuffer_ops { | |
57 | void (*init)(struct push_buffer *pb); | |
58 | }; | |
75471687 | 59 | |
6236451d TB |
60 | struct host1x_debug_ops { |
61 | void (*debug_init)(struct dentry *de); | |
62 | void (*show_channel_cdma)(struct host1x *host, | |
63 | struct host1x_channel *ch, | |
64 | struct output *o); | |
65 | void (*show_channel_fifo)(struct host1x *host, | |
66 | struct host1x_channel *ch, | |
67 | struct output *o); | |
68 | void (*show_mlocks)(struct host1x *host, struct output *output); | |
69 | ||
70 | }; | |
71 | ||
75471687 TB |
72 | struct host1x_syncpt_ops { |
73 | void (*restore)(struct host1x_syncpt *syncpt); | |
74 | void (*restore_wait_base)(struct host1x_syncpt *syncpt); | |
75 | void (*load_wait_base)(struct host1x_syncpt *syncpt); | |
76 | u32 (*load)(struct host1x_syncpt *syncpt); | |
ebae30b1 | 77 | int (*cpu_incr)(struct host1x_syncpt *syncpt); |
75471687 TB |
78 | int (*patch_wait)(struct host1x_syncpt *syncpt, void *patch_addr); |
79 | }; | |
80 | ||
7ede0b0b TB |
81 | struct host1x_intr_ops { |
82 | int (*init_host_sync)(struct host1x *host, u32 cpm, | |
83 | void (*syncpt_thresh_work)(struct work_struct *work)); | |
84 | void (*set_syncpt_threshold)( | |
85 | struct host1x *host, u32 id, u32 thresh); | |
86 | void (*enable_syncpt_intr)(struct host1x *host, u32 id); | |
87 | void (*disable_syncpt_intr)(struct host1x *host, u32 id); | |
88 | void (*disable_all_syncpt_intrs)(struct host1x *host); | |
89 | int (*free_syncpt_irq)(struct host1x *host); | |
90 | }; | |
91 | ||
75471687 TB |
92 | struct host1x_info { |
93 | int nb_channels; /* host1x: num channels supported */ | |
94 | int nb_pts; /* host1x: num syncpoints supported */ | |
95 | int nb_bases; /* host1x: num syncpoints supported */ | |
96 | int nb_mlocks; /* host1x: number of mlocks */ | |
97 | int (*init)(struct host1x *); /* initialize per SoC ops */ | |
98 | int sync_offset; | |
097452e6 | 99 | u64 dma_mask; /* mask of addressable memory */ |
75471687 TB |
100 | }; |
101 | ||
102 | struct host1x { | |
103 | const struct host1x_info *info; | |
104 | ||
105 | void __iomem *regs; | |
106 | struct host1x_syncpt *syncpt; | |
f5a954fe | 107 | struct host1x_syncpt_base *bases; |
75471687 TB |
108 | struct device *dev; |
109 | struct clk *clk; | |
110 | ||
7ede0b0b TB |
111 | struct mutex intr_mutex; |
112 | struct workqueue_struct *intr_wq; | |
113 | int intr_syncpt_irq; | |
114 | ||
75471687 | 115 | const struct host1x_syncpt_ops *syncpt_op; |
7ede0b0b | 116 | const struct host1x_intr_ops *intr_op; |
6579324a TB |
117 | const struct host1x_channel_ops *channel_op; |
118 | const struct host1x_cdma_ops *cdma_op; | |
119 | const struct host1x_pushbuffer_ops *cdma_pb_op; | |
6236451d | 120 | const struct host1x_debug_ops *debug_op; |
7ede0b0b | 121 | |
6579324a TB |
122 | struct host1x_syncpt *nop_sp; |
123 | ||
124 | struct mutex chlist_mutex; | |
125 | struct host1x_channel chlist; | |
126 | unsigned long allocated_channels; | |
127 | unsigned int num_allocated_channels; | |
6236451d TB |
128 | |
129 | struct dentry *debugfs; | |
692e6d7b | 130 | |
776dc384 TR |
131 | struct mutex devices_lock; |
132 | struct list_head devices; | |
133 | ||
134 | struct list_head list; | |
75471687 TB |
135 | }; |
136 | ||
137 | void host1x_sync_writel(struct host1x *host1x, u32 r, u32 v); | |
138 | u32 host1x_sync_readl(struct host1x *host1x, u32 r); | |
6579324a TB |
139 | void host1x_ch_writel(struct host1x_channel *ch, u32 r, u32 v); |
140 | u32 host1x_ch_readl(struct host1x_channel *ch, u32 r); | |
75471687 TB |
141 | |
142 | static inline void host1x_hw_syncpt_restore(struct host1x *host, | |
143 | struct host1x_syncpt *sp) | |
144 | { | |
145 | host->syncpt_op->restore(sp); | |
146 | } | |
147 | ||
148 | static inline void host1x_hw_syncpt_restore_wait_base(struct host1x *host, | |
149 | struct host1x_syncpt *sp) | |
150 | { | |
151 | host->syncpt_op->restore_wait_base(sp); | |
152 | } | |
153 | ||
154 | static inline void host1x_hw_syncpt_load_wait_base(struct host1x *host, | |
155 | struct host1x_syncpt *sp) | |
156 | { | |
157 | host->syncpt_op->load_wait_base(sp); | |
158 | } | |
159 | ||
160 | static inline u32 host1x_hw_syncpt_load(struct host1x *host, | |
161 | struct host1x_syncpt *sp) | |
162 | { | |
163 | return host->syncpt_op->load(sp); | |
164 | } | |
165 | ||
ebae30b1 AM |
166 | static inline int host1x_hw_syncpt_cpu_incr(struct host1x *host, |
167 | struct host1x_syncpt *sp) | |
75471687 | 168 | { |
ebae30b1 | 169 | return host->syncpt_op->cpu_incr(sp); |
75471687 TB |
170 | } |
171 | ||
172 | static inline int host1x_hw_syncpt_patch_wait(struct host1x *host, | |
173 | struct host1x_syncpt *sp, | |
174 | void *patch_addr) | |
175 | { | |
176 | return host->syncpt_op->patch_wait(sp, patch_addr); | |
177 | } | |
178 | ||
7ede0b0b TB |
179 | static inline int host1x_hw_intr_init_host_sync(struct host1x *host, u32 cpm, |
180 | void (*syncpt_thresh_work)(struct work_struct *)) | |
181 | { | |
182 | return host->intr_op->init_host_sync(host, cpm, syncpt_thresh_work); | |
183 | } | |
184 | ||
185 | static inline void host1x_hw_intr_set_syncpt_threshold(struct host1x *host, | |
186 | u32 id, u32 thresh) | |
187 | { | |
188 | host->intr_op->set_syncpt_threshold(host, id, thresh); | |
189 | } | |
190 | ||
191 | static inline void host1x_hw_intr_enable_syncpt_intr(struct host1x *host, | |
192 | u32 id) | |
193 | { | |
194 | host->intr_op->enable_syncpt_intr(host, id); | |
195 | } | |
196 | ||
197 | static inline void host1x_hw_intr_disable_syncpt_intr(struct host1x *host, | |
198 | u32 id) | |
199 | { | |
200 | host->intr_op->disable_syncpt_intr(host, id); | |
201 | } | |
202 | ||
203 | static inline void host1x_hw_intr_disable_all_syncpt_intrs(struct host1x *host) | |
204 | { | |
205 | host->intr_op->disable_all_syncpt_intrs(host); | |
206 | } | |
207 | ||
208 | static inline int host1x_hw_intr_free_syncpt_irq(struct host1x *host) | |
209 | { | |
210 | return host->intr_op->free_syncpt_irq(host); | |
211 | } | |
6579324a TB |
212 | |
213 | static inline int host1x_hw_channel_init(struct host1x *host, | |
214 | struct host1x_channel *channel, | |
215 | int chid) | |
216 | { | |
217 | return host->channel_op->init(channel, host, chid); | |
218 | } | |
219 | ||
220 | static inline int host1x_hw_channel_submit(struct host1x *host, | |
221 | struct host1x_job *job) | |
222 | { | |
223 | return host->channel_op->submit(job); | |
224 | } | |
225 | ||
226 | static inline void host1x_hw_cdma_start(struct host1x *host, | |
227 | struct host1x_cdma *cdma) | |
228 | { | |
229 | host->cdma_op->start(cdma); | |
230 | } | |
231 | ||
232 | static inline void host1x_hw_cdma_stop(struct host1x *host, | |
233 | struct host1x_cdma *cdma) | |
234 | { | |
235 | host->cdma_op->stop(cdma); | |
236 | } | |
237 | ||
238 | static inline void host1x_hw_cdma_flush(struct host1x *host, | |
239 | struct host1x_cdma *cdma) | |
240 | { | |
241 | host->cdma_op->flush(cdma); | |
242 | } | |
243 | ||
244 | static inline int host1x_hw_cdma_timeout_init(struct host1x *host, | |
245 | struct host1x_cdma *cdma, | |
246 | u32 syncpt_id) | |
247 | { | |
248 | return host->cdma_op->timeout_init(cdma, syncpt_id); | |
249 | } | |
250 | ||
251 | static inline void host1x_hw_cdma_timeout_destroy(struct host1x *host, | |
252 | struct host1x_cdma *cdma) | |
253 | { | |
254 | host->cdma_op->timeout_destroy(cdma); | |
255 | } | |
256 | ||
257 | static inline void host1x_hw_cdma_freeze(struct host1x *host, | |
258 | struct host1x_cdma *cdma) | |
259 | { | |
260 | host->cdma_op->freeze(cdma); | |
261 | } | |
262 | ||
263 | static inline void host1x_hw_cdma_resume(struct host1x *host, | |
264 | struct host1x_cdma *cdma, u32 getptr) | |
265 | { | |
266 | host->cdma_op->resume(cdma, getptr); | |
267 | } | |
268 | ||
269 | static inline void host1x_hw_cdma_timeout_cpu_incr(struct host1x *host, | |
270 | struct host1x_cdma *cdma, | |
271 | u32 getptr, | |
272 | u32 syncpt_incrs, | |
273 | u32 syncval, u32 nr_slots) | |
274 | { | |
275 | host->cdma_op->timeout_cpu_incr(cdma, getptr, syncpt_incrs, syncval, | |
276 | nr_slots); | |
277 | } | |
278 | ||
279 | static inline void host1x_hw_pushbuffer_init(struct host1x *host, | |
280 | struct push_buffer *pb) | |
281 | { | |
282 | host->cdma_pb_op->init(pb); | |
283 | } | |
284 | ||
6236451d TB |
285 | static inline void host1x_hw_debug_init(struct host1x *host, struct dentry *de) |
286 | { | |
287 | if (host->debug_op && host->debug_op->debug_init) | |
288 | host->debug_op->debug_init(de); | |
289 | } | |
290 | ||
291 | static inline void host1x_hw_show_channel_cdma(struct host1x *host, | |
292 | struct host1x_channel *channel, | |
293 | struct output *o) | |
294 | { | |
295 | host->debug_op->show_channel_cdma(host, channel, o); | |
296 | } | |
297 | ||
298 | static inline void host1x_hw_show_channel_fifo(struct host1x *host, | |
299 | struct host1x_channel *channel, | |
300 | struct output *o) | |
301 | { | |
302 | host->debug_op->show_channel_fifo(host, channel, o); | |
303 | } | |
304 | ||
305 | static inline void host1x_hw_show_mlocks(struct host1x *host, struct output *o) | |
306 | { | |
307 | host->debug_op->show_mlocks(host, o); | |
308 | } | |
309 | ||
4de6a2d6 TR |
310 | extern struct platform_driver tegra_mipi_driver; |
311 | ||
75471687 | 312 | #endif |