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Commit | Line | Data |
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9952f691 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
6579324a TB |
2 | /* |
3 | * Tegra host1x Job | |
4 | * | |
f08ef2d1 | 5 | * Copyright (c) 2010-2015, NVIDIA Corporation. |
6579324a TB |
6 | */ |
7 | ||
8 | #include <linux/dma-mapping.h> | |
9 | #include <linux/err.h> | |
35d747a8 | 10 | #include <linux/host1x.h> |
273da5a0 | 11 | #include <linux/iommu.h> |
6579324a TB |
12 | #include <linux/kref.h> |
13 | #include <linux/module.h> | |
14 | #include <linux/scatterlist.h> | |
15 | #include <linux/slab.h> | |
16 | #include <linux/vmalloc.h> | |
17 | #include <trace/events/host1x.h> | |
18 | ||
19 | #include "channel.h" | |
20 | #include "dev.h" | |
6579324a TB |
21 | #include "job.h" |
22 | #include "syncpt.h" | |
23 | ||
a47ac10e DO |
24 | #define HOST1X_WAIT_SYNCPT_OFFSET 0x8 |
25 | ||
6579324a | 26 | struct host1x_job *host1x_job_alloc(struct host1x_channel *ch, |
24c94e16 | 27 | u32 num_cmdbufs, u32 num_relocs) |
6579324a TB |
28 | { |
29 | struct host1x_job *job = NULL; | |
30 | unsigned int num_unpins = num_cmdbufs + num_relocs; | |
31 | u64 total; | |
32 | void *mem; | |
33 | ||
34 | /* Check that we're not going to overflow */ | |
35 | total = sizeof(struct host1x_job) + | |
f5fda676 DC |
36 | (u64)num_relocs * sizeof(struct host1x_reloc) + |
37 | (u64)num_unpins * sizeof(struct host1x_job_unpin_data) + | |
f5fda676 DC |
38 | (u64)num_cmdbufs * sizeof(struct host1x_job_gather) + |
39 | (u64)num_unpins * sizeof(dma_addr_t) + | |
40 | (u64)num_unpins * sizeof(u32 *); | |
6579324a TB |
41 | if (total > ULONG_MAX) |
42 | return NULL; | |
43 | ||
44 | mem = job = kzalloc(total, GFP_KERNEL); | |
45 | if (!job) | |
46 | return NULL; | |
47 | ||
48 | kref_init(&job->ref); | |
49 | job->channel = ch; | |
50 | ||
51 | /* Redistribute memory to the structs */ | |
52 | mem += sizeof(struct host1x_job); | |
06490bb9 | 53 | job->relocs = num_relocs ? mem : NULL; |
6579324a TB |
54 | mem += num_relocs * sizeof(struct host1x_reloc); |
55 | job->unpins = num_unpins ? mem : NULL; | |
56 | mem += num_unpins * sizeof(struct host1x_job_unpin_data); | |
6579324a TB |
57 | job->gathers = num_cmdbufs ? mem : NULL; |
58 | mem += num_cmdbufs * sizeof(struct host1x_job_gather); | |
59 | job->addr_phys = num_unpins ? mem : NULL; | |
60 | ||
61 | job->reloc_addr_phys = job->addr_phys; | |
62 | job->gather_addr_phys = &job->addr_phys[num_relocs]; | |
63 | ||
64 | return job; | |
65 | } | |
fae798a1 | 66 | EXPORT_SYMBOL(host1x_job_alloc); |
6579324a TB |
67 | |
68 | struct host1x_job *host1x_job_get(struct host1x_job *job) | |
69 | { | |
70 | kref_get(&job->ref); | |
71 | return job; | |
72 | } | |
fae798a1 | 73 | EXPORT_SYMBOL(host1x_job_get); |
6579324a TB |
74 | |
75 | static void job_free(struct kref *ref) | |
76 | { | |
77 | struct host1x_job *job = container_of(ref, struct host1x_job, ref); | |
78 | ||
79 | kfree(job); | |
80 | } | |
81 | ||
82 | void host1x_job_put(struct host1x_job *job) | |
83 | { | |
84 | kref_put(&job->ref, job_free); | |
85 | } | |
fae798a1 | 86 | EXPORT_SYMBOL(host1x_job_put); |
6579324a TB |
87 | |
88 | void host1x_job_add_gather(struct host1x_job *job, struct host1x_bo *bo, | |
326bbd79 | 89 | unsigned int words, unsigned int offset) |
6579324a | 90 | { |
326bbd79 TR |
91 | struct host1x_job_gather *gather = &job->gathers[job->num_gathers]; |
92 | ||
93 | gather->words = words; | |
94 | gather->bo = bo; | |
95 | gather->offset = offset; | |
6579324a | 96 | |
6579324a TB |
97 | job->num_gathers++; |
98 | } | |
fae798a1 | 99 | EXPORT_SYMBOL(host1x_job_add_gather); |
6579324a | 100 | |
404bfb78 | 101 | static unsigned int pin_job(struct host1x *host, struct host1x_job *job) |
6579324a | 102 | { |
af1cbfb9 TR |
103 | struct host1x_client *client = job->client; |
104 | struct device *dev = client->dev; | |
273da5a0 | 105 | struct iommu_domain *domain; |
6579324a | 106 | unsigned int i; |
404bfb78 | 107 | int err; |
6579324a | 108 | |
273da5a0 | 109 | domain = iommu_get_domain_for_dev(dev); |
6579324a TB |
110 | job->num_unpins = 0; |
111 | ||
112 | for (i = 0; i < job->num_relocs; i++) { | |
06490bb9 | 113 | struct host1x_reloc *reloc = &job->relocs[i]; |
af1cbfb9 | 114 | dma_addr_t phys_addr, *phys; |
6579324a | 115 | struct sg_table *sgt; |
6579324a | 116 | |
961e3bea | 117 | reloc->target.bo = host1x_bo_get(reloc->target.bo); |
404bfb78 MP |
118 | if (!reloc->target.bo) { |
119 | err = -EINVAL; | |
6579324a | 120 | goto unpin; |
404bfb78 | 121 | } |
6579324a | 122 | |
273da5a0 TR |
123 | /* |
124 | * If the client device is not attached to an IOMMU, the | |
125 | * physical address of the buffer object can be used. | |
126 | * | |
127 | * Similarly, when an IOMMU domain is shared between all | |
128 | * host1x clients, the IOVA is already available, so no | |
129 | * need to map the buffer object again. | |
130 | * | |
131 | * XXX Note that this isn't always safe to do because it | |
132 | * relies on an assumption that no cache maintenance is | |
133 | * needed on the buffer objects. | |
134 | */ | |
135 | if (!domain || client->group) | |
af1cbfb9 TR |
136 | phys = &phys_addr; |
137 | else | |
138 | phys = NULL; | |
139 | ||
140 | sgt = host1x_bo_pin(dev, reloc->target.bo, phys); | |
80327ce3 TR |
141 | if (IS_ERR(sgt)) { |
142 | err = PTR_ERR(sgt); | |
143 | goto unpin; | |
144 | } | |
6579324a | 145 | |
af1cbfb9 TR |
146 | if (sgt) { |
147 | unsigned long mask = HOST1X_RELOC_READ | | |
148 | HOST1X_RELOC_WRITE; | |
149 | enum dma_data_direction dir; | |
150 | ||
151 | switch (reloc->flags & mask) { | |
152 | case HOST1X_RELOC_READ: | |
153 | dir = DMA_TO_DEVICE; | |
154 | break; | |
155 | ||
156 | case HOST1X_RELOC_WRITE: | |
157 | dir = DMA_FROM_DEVICE; | |
158 | break; | |
159 | ||
160 | case HOST1X_RELOC_READ | HOST1X_RELOC_WRITE: | |
161 | dir = DMA_BIDIRECTIONAL; | |
162 | break; | |
163 | ||
164 | default: | |
165 | err = -EINVAL; | |
166 | goto unpin; | |
167 | } | |
168 | ||
169 | err = dma_map_sg(dev, sgt->sgl, sgt->nents, dir); | |
170 | if (!err) { | |
171 | err = -ENOMEM; | |
172 | goto unpin; | |
173 | } | |
174 | ||
175 | job->unpins[job->num_unpins].dev = dev; | |
176 | job->unpins[job->num_unpins].dir = dir; | |
177 | phys_addr = sg_dma_address(sgt->sgl); | |
178 | } | |
179 | ||
6579324a | 180 | job->addr_phys[job->num_unpins] = phys_addr; |
961e3bea | 181 | job->unpins[job->num_unpins].bo = reloc->target.bo; |
6579324a TB |
182 | job->unpins[job->num_unpins].sgt = sgt; |
183 | job->num_unpins++; | |
184 | } | |
185 | ||
186 | for (i = 0; i < job->num_gathers; i++) { | |
187 | struct host1x_job_gather *g = &job->gathers[i]; | |
404bfb78 MP |
188 | size_t gather_size = 0; |
189 | struct scatterlist *sg; | |
6579324a TB |
190 | struct sg_table *sgt; |
191 | dma_addr_t phys_addr; | |
404bfb78 MP |
192 | unsigned long shift; |
193 | struct iova *alloc; | |
273da5a0 | 194 | dma_addr_t *phys; |
404bfb78 | 195 | unsigned int j; |
6579324a TB |
196 | |
197 | g->bo = host1x_bo_get(g->bo); | |
404bfb78 MP |
198 | if (!g->bo) { |
199 | err = -EINVAL; | |
6579324a | 200 | goto unpin; |
404bfb78 | 201 | } |
6579324a | 202 | |
273da5a0 TR |
203 | /** |
204 | * If the host1x is not attached to an IOMMU, there is no need | |
205 | * to map the buffer object for the host1x, since the physical | |
206 | * address can simply be used. | |
207 | */ | |
208 | if (!iommu_get_domain_for_dev(host->dev)) | |
209 | phys = &phys_addr; | |
210 | else | |
211 | phys = NULL; | |
212 | ||
213 | sgt = host1x_bo_pin(host->dev, g->bo, phys); | |
80327ce3 TR |
214 | if (IS_ERR(sgt)) { |
215 | err = PTR_ERR(sgt); | |
216 | goto unpin; | |
217 | } | |
404bfb78 MP |
218 | |
219 | if (!IS_ENABLED(CONFIG_TEGRA_HOST1X_FIREWALL) && host->domain) { | |
220 | for_each_sg(sgt->sgl, sg, sgt->nents, j) | |
221 | gather_size += sg->length; | |
222 | gather_size = iova_align(&host->iova, gather_size); | |
223 | ||
224 | shift = iova_shift(&host->iova); | |
225 | alloc = alloc_iova(&host->iova, gather_size >> shift, | |
226 | host->iova_end >> shift, true); | |
227 | if (!alloc) { | |
228 | err = -ENOMEM; | |
229 | goto unpin; | |
230 | } | |
231 | ||
232 | err = iommu_map_sg(host->domain, | |
233 | iova_dma_addr(&host->iova, alloc), | |
234 | sgt->sgl, sgt->nents, IOMMU_READ); | |
235 | if (err == 0) { | |
236 | __free_iova(&host->iova, alloc); | |
237 | err = -EINVAL; | |
238 | goto unpin; | |
239 | } | |
240 | ||
404bfb78 | 241 | job->unpins[job->num_unpins].size = gather_size; |
af1cbfb9 | 242 | phys_addr = iova_dma_addr(&host->iova, alloc); |
273da5a0 | 243 | } else if (sgt) { |
af1cbfb9 TR |
244 | err = dma_map_sg(host->dev, sgt->sgl, sgt->nents, |
245 | DMA_TO_DEVICE); | |
246 | if (!err) { | |
247 | err = -ENOMEM; | |
248 | goto unpin; | |
249 | } | |
250 | ||
98ae41ad | 251 | job->unpins[job->num_unpins].dir = DMA_TO_DEVICE; |
af1cbfb9 TR |
252 | job->unpins[job->num_unpins].dev = host->dev; |
253 | phys_addr = sg_dma_address(sgt->sgl); | |
404bfb78 MP |
254 | } |
255 | ||
af1cbfb9 TR |
256 | job->addr_phys[job->num_unpins] = phys_addr; |
257 | job->gather_addr_phys[i] = phys_addr; | |
6579324a | 258 | |
6579324a TB |
259 | job->unpins[job->num_unpins].bo = g->bo; |
260 | job->unpins[job->num_unpins].sgt = sgt; | |
261 | job->num_unpins++; | |
262 | } | |
263 | ||
404bfb78 | 264 | return 0; |
6579324a TB |
265 | |
266 | unpin: | |
267 | host1x_job_unpin(job); | |
404bfb78 | 268 | return err; |
6579324a TB |
269 | } |
270 | ||
47f89c10 | 271 | static int do_relocs(struct host1x_job *job, struct host1x_job_gather *g) |
6579324a | 272 | { |
7a8139c5 | 273 | void *cmdbuf_addr = NULL; |
47f89c10 | 274 | struct host1x_bo *cmdbuf = g->bo; |
d4ad3ad9 | 275 | unsigned int i; |
6579324a TB |
276 | |
277 | /* pin & patch the relocs for one gather */ | |
3364cd28 | 278 | for (i = 0; i < job->num_relocs; i++) { |
06490bb9 | 279 | struct host1x_reloc *reloc = &job->relocs[i]; |
6579324a | 280 | u32 reloc_addr = (job->reloc_addr_phys[i] + |
961e3bea | 281 | reloc->target.offset) >> reloc->shift; |
6579324a TB |
282 | u32 *target; |
283 | ||
284 | /* skip all other gathers */ | |
961e3bea | 285 | if (cmdbuf != reloc->cmdbuf.bo) |
6579324a | 286 | continue; |
6579324a | 287 | |
47f89c10 DO |
288 | if (IS_ENABLED(CONFIG_TEGRA_HOST1X_FIREWALL)) { |
289 | target = (u32 *)job->gather_copy_mapped + | |
290 | reloc->cmdbuf.offset / sizeof(u32) + | |
291 | g->offset / sizeof(u32); | |
292 | goto patch_reloc; | |
293 | } | |
294 | ||
7a8139c5 DV |
295 | if (!cmdbuf_addr) { |
296 | cmdbuf_addr = host1x_bo_mmap(cmdbuf); | |
6579324a | 297 | |
7a8139c5 | 298 | if (unlikely(!cmdbuf_addr)) { |
6579324a TB |
299 | pr_err("Could not map cmdbuf for relocation\n"); |
300 | return -ENOMEM; | |
301 | } | |
302 | } | |
303 | ||
7a8139c5 | 304 | target = cmdbuf_addr + reloc->cmdbuf.offset; |
47f89c10 | 305 | patch_reloc: |
6579324a | 306 | *target = reloc_addr; |
6579324a TB |
307 | } |
308 | ||
7a8139c5 DV |
309 | if (cmdbuf_addr) |
310 | host1x_bo_munmap(cmdbuf, cmdbuf_addr); | |
6579324a TB |
311 | |
312 | return 0; | |
313 | } | |
314 | ||
5060d8ec | 315 | static bool check_reloc(struct host1x_reloc *reloc, struct host1x_bo *cmdbuf, |
37857cd2 | 316 | unsigned int offset) |
6579324a TB |
317 | { |
318 | offset *= sizeof(u32); | |
319 | ||
961e3bea | 320 | if (reloc->cmdbuf.bo != cmdbuf || reloc->cmdbuf.offset != offset) |
5060d8ec | 321 | return false; |
6579324a | 322 | |
571cbf70 DO |
323 | /* relocation shift value validation isn't implemented yet */ |
324 | if (reloc->shift) | |
325 | return false; | |
326 | ||
5060d8ec | 327 | return true; |
6579324a TB |
328 | } |
329 | ||
330 | struct host1x_firewall { | |
331 | struct host1x_job *job; | |
332 | struct device *dev; | |
333 | ||
334 | unsigned int num_relocs; | |
335 | struct host1x_reloc *reloc; | |
336 | ||
d7fbcf47 | 337 | struct host1x_bo *cmdbuf; |
6579324a TB |
338 | unsigned int offset; |
339 | ||
340 | u32 words; | |
341 | u32 class; | |
342 | u32 reg; | |
343 | u32 mask; | |
344 | u32 count; | |
345 | }; | |
346 | ||
d77563ff TR |
347 | static int check_register(struct host1x_firewall *fw, unsigned long offset) |
348 | { | |
0f563a4b DO |
349 | if (!fw->job->is_addr_reg) |
350 | return 0; | |
351 | ||
d77563ff TR |
352 | if (fw->job->is_addr_reg(fw->dev, fw->class, offset)) { |
353 | if (!fw->num_relocs) | |
354 | return -EINVAL; | |
355 | ||
356 | if (!check_reloc(fw->reloc, fw->cmdbuf, fw->offset)) | |
357 | return -EINVAL; | |
358 | ||
359 | fw->num_relocs--; | |
360 | fw->reloc++; | |
361 | } | |
362 | ||
363 | return 0; | |
364 | } | |
365 | ||
0f563a4b DO |
366 | static int check_class(struct host1x_firewall *fw, u32 class) |
367 | { | |
368 | if (!fw->job->is_valid_class) { | |
369 | if (fw->class != class) | |
370 | return -EINVAL; | |
371 | } else { | |
372 | if (!fw->job->is_valid_class(fw->class)) | |
373 | return -EINVAL; | |
374 | } | |
375 | ||
376 | return 0; | |
377 | } | |
378 | ||
6579324a TB |
379 | static int check_mask(struct host1x_firewall *fw) |
380 | { | |
381 | u32 mask = fw->mask; | |
382 | u32 reg = fw->reg; | |
d77563ff | 383 | int ret; |
6579324a TB |
384 | |
385 | while (mask) { | |
386 | if (fw->words == 0) | |
387 | return -EINVAL; | |
388 | ||
389 | if (mask & 1) { | |
d77563ff TR |
390 | ret = check_register(fw, reg); |
391 | if (ret < 0) | |
392 | return ret; | |
393 | ||
6579324a TB |
394 | fw->words--; |
395 | fw->offset++; | |
396 | } | |
397 | mask >>= 1; | |
398 | reg++; | |
399 | } | |
400 | ||
401 | return 0; | |
402 | } | |
403 | ||
404 | static int check_incr(struct host1x_firewall *fw) | |
405 | { | |
406 | u32 count = fw->count; | |
407 | u32 reg = fw->reg; | |
d77563ff | 408 | int ret; |
6579324a | 409 | |
64c173d3 | 410 | while (count) { |
6579324a TB |
411 | if (fw->words == 0) |
412 | return -EINVAL; | |
413 | ||
d77563ff TR |
414 | ret = check_register(fw, reg); |
415 | if (ret < 0) | |
416 | return ret; | |
417 | ||
6579324a TB |
418 | reg++; |
419 | fw->words--; | |
420 | fw->offset++; | |
421 | count--; | |
422 | } | |
423 | ||
424 | return 0; | |
425 | } | |
426 | ||
427 | static int check_nonincr(struct host1x_firewall *fw) | |
428 | { | |
6579324a | 429 | u32 count = fw->count; |
d77563ff | 430 | int ret; |
6579324a TB |
431 | |
432 | while (count) { | |
433 | if (fw->words == 0) | |
434 | return -EINVAL; | |
435 | ||
d77563ff TR |
436 | ret = check_register(fw, fw->reg); |
437 | if (ret < 0) | |
438 | return ret; | |
439 | ||
6579324a TB |
440 | fw->words--; |
441 | fw->offset++; | |
442 | count--; | |
443 | } | |
444 | ||
445 | return 0; | |
446 | } | |
447 | ||
afac0e43 | 448 | static int validate(struct host1x_firewall *fw, struct host1x_job_gather *g) |
6579324a | 449 | { |
3364cd28 AM |
450 | u32 *cmdbuf_base = (u32 *)fw->job->gather_copy_mapped + |
451 | (g->offset / sizeof(u32)); | |
0f563a4b | 452 | u32 job_class = fw->class; |
6579324a | 453 | int err = 0; |
6579324a | 454 | |
afac0e43 | 455 | fw->words = g->words; |
d7fbcf47 | 456 | fw->cmdbuf = g->bo; |
afac0e43 | 457 | fw->offset = 0; |
6579324a | 458 | |
afac0e43 TB |
459 | while (fw->words && !err) { |
460 | u32 word = cmdbuf_base[fw->offset]; | |
6579324a TB |
461 | u32 opcode = (word & 0xf0000000) >> 28; |
462 | ||
afac0e43 TB |
463 | fw->mask = 0; |
464 | fw->reg = 0; | |
465 | fw->count = 0; | |
466 | fw->words--; | |
467 | fw->offset++; | |
6579324a TB |
468 | |
469 | switch (opcode) { | |
470 | case 0: | |
afac0e43 TB |
471 | fw->class = word >> 6 & 0x3ff; |
472 | fw->mask = word & 0x3f; | |
473 | fw->reg = word >> 16 & 0xfff; | |
0f563a4b DO |
474 | err = check_class(fw, job_class); |
475 | if (!err) | |
476 | err = check_mask(fw); | |
6579324a TB |
477 | if (err) |
478 | goto out; | |
479 | break; | |
480 | case 1: | |
afac0e43 TB |
481 | fw->reg = word >> 16 & 0xfff; |
482 | fw->count = word & 0xffff; | |
483 | err = check_incr(fw); | |
6579324a TB |
484 | if (err) |
485 | goto out; | |
486 | break; | |
487 | ||
488 | case 2: | |
afac0e43 TB |
489 | fw->reg = word >> 16 & 0xfff; |
490 | fw->count = word & 0xffff; | |
491 | err = check_nonincr(fw); | |
6579324a TB |
492 | if (err) |
493 | goto out; | |
494 | break; | |
495 | ||
496 | case 3: | |
afac0e43 TB |
497 | fw->mask = word & 0xffff; |
498 | fw->reg = word >> 16 & 0xfff; | |
499 | err = check_mask(fw); | |
6579324a TB |
500 | if (err) |
501 | goto out; | |
502 | break; | |
503 | case 4: | |
6579324a TB |
504 | case 14: |
505 | break; | |
506 | default: | |
507 | err = -EINVAL; | |
508 | break; | |
509 | } | |
510 | } | |
511 | ||
6579324a | 512 | out: |
6579324a TB |
513 | return err; |
514 | } | |
515 | ||
b78e70c0 TR |
516 | static inline int copy_gathers(struct device *host, struct host1x_job *job, |
517 | struct device *dev) | |
6579324a | 518 | { |
3364cd28 | 519 | struct host1x_firewall fw; |
6579324a TB |
520 | size_t size = 0; |
521 | size_t offset = 0; | |
d4ad3ad9 | 522 | unsigned int i; |
6579324a | 523 | |
3364cd28 AM |
524 | fw.job = job; |
525 | fw.dev = dev; | |
06490bb9 | 526 | fw.reloc = job->relocs; |
3364cd28 | 527 | fw.num_relocs = job->num_relocs; |
3833d16f | 528 | fw.class = job->class; |
3364cd28 | 529 | |
6579324a TB |
530 | for (i = 0; i < job->num_gathers; i++) { |
531 | struct host1x_job_gather *g = &job->gathers[i]; | |
6df633d0 | 532 | |
6579324a TB |
533 | size += g->words * sizeof(u32); |
534 | } | |
535 | ||
43240bbd DO |
536 | /* |
537 | * Try a non-blocking allocation from a higher priority pools first, | |
538 | * as awaiting for the allocation here is a major performance hit. | |
539 | */ | |
b78e70c0 | 540 | job->gather_copy_mapped = dma_alloc_wc(host, size, &job->gather_copy, |
43240bbd DO |
541 | GFP_NOWAIT); |
542 | ||
543 | /* the higher priority allocation failed, try the generic-blocking */ | |
544 | if (!job->gather_copy_mapped) | |
b78e70c0 | 545 | job->gather_copy_mapped = dma_alloc_wc(host, size, |
43240bbd DO |
546 | &job->gather_copy, |
547 | GFP_KERNEL); | |
548 | if (!job->gather_copy_mapped) | |
745cecc0 | 549 | return -ENOMEM; |
6579324a TB |
550 | |
551 | job->gather_copy_size = size; | |
552 | ||
553 | for (i = 0; i < job->num_gathers; i++) { | |
554 | struct host1x_job_gather *g = &job->gathers[i]; | |
555 | void *gather; | |
556 | ||
3364cd28 | 557 | /* Copy the gather */ |
6579324a TB |
558 | gather = host1x_bo_mmap(g->bo); |
559 | memcpy(job->gather_copy_mapped + offset, gather + g->offset, | |
560 | g->words * sizeof(u32)); | |
561 | host1x_bo_munmap(g->bo, gather); | |
562 | ||
3364cd28 | 563 | /* Store the location in the buffer */ |
6579324a TB |
564 | g->base = job->gather_copy; |
565 | g->offset = offset; | |
3364cd28 AM |
566 | |
567 | /* Validate the job */ | |
568 | if (validate(&fw, g)) | |
569 | return -EINVAL; | |
6579324a TB |
570 | |
571 | offset += g->words * sizeof(u32); | |
572 | } | |
573 | ||
24c94e16 TR |
574 | /* No relocs should remain at this point */ |
575 | if (fw.num_relocs) | |
a9ff9995 EFL |
576 | return -EINVAL; |
577 | ||
6579324a TB |
578 | return 0; |
579 | } | |
580 | ||
581 | int host1x_job_pin(struct host1x_job *job, struct device *dev) | |
582 | { | |
583 | int err; | |
584 | unsigned int i, j; | |
585 | struct host1x *host = dev_get_drvdata(dev->parent); | |
6579324a TB |
586 | |
587 | /* pin memory */ | |
404bfb78 MP |
588 | err = pin_job(host, job); |
589 | if (err) | |
6579324a TB |
590 | goto out; |
591 | ||
47f89c10 | 592 | if (IS_ENABLED(CONFIG_TEGRA_HOST1X_FIREWALL)) { |
b78e70c0 | 593 | err = copy_gathers(host->dev, job, dev); |
47f89c10 DO |
594 | if (err) |
595 | goto out; | |
596 | } | |
597 | ||
6579324a TB |
598 | /* patch gathers */ |
599 | for (i = 0; i < job->num_gathers; i++) { | |
600 | struct host1x_job_gather *g = &job->gathers[i]; | |
601 | ||
602 | /* process each gather mem only once */ | |
603 | if (g->handled) | |
604 | continue; | |
605 | ||
47f89c10 DO |
606 | /* copy_gathers() sets gathers base if firewall is enabled */ |
607 | if (!IS_ENABLED(CONFIG_TEGRA_HOST1X_FIREWALL)) | |
608 | g->base = job->gather_addr_phys[i]; | |
6579324a | 609 | |
f08ef2d1 AM |
610 | for (j = i + 1; j < job->num_gathers; j++) { |
611 | if (job->gathers[j].bo == g->bo) { | |
6579324a | 612 | job->gathers[j].handled = true; |
f08ef2d1 AM |
613 | job->gathers[j].base = g->base; |
614 | } | |
615 | } | |
6579324a | 616 | |
47f89c10 | 617 | err = do_relocs(job, g); |
6579324a | 618 | if (err) |
47f89c10 | 619 | break; |
6579324a TB |
620 | } |
621 | ||
6579324a | 622 | out: |
e5855aa3 DO |
623 | if (err) |
624 | host1x_job_unpin(job); | |
6579324a TB |
625 | wmb(); |
626 | ||
627 | return err; | |
628 | } | |
fae798a1 | 629 | EXPORT_SYMBOL(host1x_job_pin); |
6579324a TB |
630 | |
631 | void host1x_job_unpin(struct host1x_job *job) | |
632 | { | |
404bfb78 | 633 | struct host1x *host = dev_get_drvdata(job->channel->dev->parent); |
6579324a TB |
634 | unsigned int i; |
635 | ||
636 | for (i = 0; i < job->num_unpins; i++) { | |
637 | struct host1x_job_unpin_data *unpin = &job->unpins[i]; | |
af1cbfb9 TR |
638 | struct device *dev = unpin->dev ?: host->dev; |
639 | struct sg_table *sgt = unpin->sgt; | |
6df633d0 | 640 | |
ec589232 DO |
641 | if (!IS_ENABLED(CONFIG_TEGRA_HOST1X_FIREWALL) && |
642 | unpin->size && host->domain) { | |
404bfb78 MP |
643 | iommu_unmap(host->domain, job->addr_phys[i], |
644 | unpin->size); | |
645 | free_iova(&host->iova, | |
646 | iova_pfn(&host->iova, job->addr_phys[i])); | |
647 | } | |
648 | ||
af1cbfb9 TR |
649 | if (unpin->dev && sgt) |
650 | dma_unmap_sg(unpin->dev, sgt->sgl, sgt->nents, | |
651 | unpin->dir); | |
652 | ||
653 | host1x_bo_unpin(dev, unpin->bo, sgt); | |
6579324a TB |
654 | host1x_bo_put(unpin->bo); |
655 | } | |
0b8070d1 | 656 | |
6579324a TB |
657 | job->num_unpins = 0; |
658 | ||
659 | if (job->gather_copy_size) | |
b78e70c0 | 660 | dma_free_wc(host->dev, job->gather_copy_size, |
0b8070d1 | 661 | job->gather_copy_mapped, job->gather_copy); |
6579324a | 662 | } |
fae798a1 | 663 | EXPORT_SYMBOL(host1x_job_unpin); |
6579324a TB |
664 | |
665 | /* | |
666 | * Debug routine used to dump job entries | |
667 | */ | |
668 | void host1x_job_dump(struct device *dev, struct host1x_job *job) | |
669 | { | |
670 | dev_dbg(dev, " SYNCPT_ID %d\n", job->syncpt_id); | |
671 | dev_dbg(dev, " SYNCPT_VAL %d\n", job->syncpt_end); | |
672 | dev_dbg(dev, " FIRST_GET 0x%x\n", job->first_get); | |
673 | dev_dbg(dev, " TIMEOUT %d\n", job->timeout); | |
674 | dev_dbg(dev, " NUM_SLOTS %d\n", job->num_slots); | |
675 | dev_dbg(dev, " NUM_HANDLES %d\n", job->num_unpins); | |
676 | } |