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Merge tag 'char-misc-5.6-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh...
[mirror_ubuntu-hirsute-kernel.git] / drivers / hwmon / adt7475.c
CommitLineData
d2912cb1 1// SPDX-License-Identifier: GPL-2.0-only
1c301fc5
JC		 2/*
3 * adt7475 - Thermal sensor driver for the ADT7475 chip and derivatives
4 * Copyright (C) 2007-2008, Advanced Micro Devices, Inc.
5 * Copyright (C) 2008 Jordan Crouse <jordan@cosmicpenguin.net>
6 * Copyright (C) 2008 Hans de Goede <hdegoede@redhat.com>
7c81c60f 7 * Copyright (C) 2009 Jean Delvare <jdelvare@suse.de>
3d849981 8 *
1c301fc5 9 * Derived from the lm83 driver by Jean Delvare
1c301fc5
JC		 10 */
11
12#include <linux/module.h>
4e2496e4 13#include <linux/of_device.h>
1c301fc5
JC		 14#include <linux/init.h>
15#include <linux/slab.h>
16#include <linux/i2c.h>
17#include <linux/hwmon.h>
18#include <linux/hwmon-sysfs.h>
54fe4671 19#include <linux/hwmon-vid.h>
1c301fc5 20#include <linux/err.h>
dcd8f392 21#include <linux/jiffies.h>
e4651640 22#include <linux/util_macros.h>
1c301fc5
JC		 23
24/* Indexes for the sysfs hooks */
25
26#define INPUT 0
27#define MIN 1
28#define MAX 2
29#define CONTROL 3
30#define OFFSET 3
31#define AUTOMIN 4
32#define THERM 5
33#define HYSTERSIS 6
34
9ed5bc24
GR		 35/*
36 * These are unique identifiers for the sysfs functions - unlike the
37 * numbers above, these are not also indexes into an array
38 */
1c301fc5
JC		 39
40#define ALARM 9
41#define FAULT 10
42
43/* 7475 Common Registers */
44
d07ca4ad
JD		 45#define REG_DEVREV2 0x12 /* ADT7490 only */
46
3d849981
JD		 47#define REG_VTT 0x1E /* ADT7490 only */
48#define REG_EXTEND3 0x1F /* ADT7490 only */
49
cffb9dd0 50#define REG_VOLTAGE_BASE 0x20
1c301fc5
JC		 51#define REG_TEMP_BASE 0x25
52#define REG_TACH_BASE 0x28
53#define REG_PWM_BASE 0x30
54#define REG_PWM_MAX_BASE 0x38
55
56#define REG_DEVID 0x3D
57#define REG_VENDID 0x3E
d656b6fd 58#define REG_DEVID2 0x3F
1c301fc5 59
4abdf38d
CP		 60#define REG_CONFIG1 0x40
61
1c301fc5
JC		 62#define REG_STATUS1 0x41
63#define REG_STATUS2 0x42
64
d8d2ee07
JD		 65#define REG_VID 0x43 /* ADT7476 only */
66
cffb9dd0
JD		 67#define REG_VOLTAGE_MIN_BASE 0x44
68#define REG_VOLTAGE_MAX_BASE 0x45
1c301fc5
JC		 69
70#define REG_TEMP_MIN_BASE 0x4E
71#define REG_TEMP_MAX_BASE 0x4F
72
73#define REG_TACH_MIN_BASE 0x54
74
75#define REG_PWM_CONFIG_BASE 0x5C
76
77#define REG_TEMP_TRANGE_BASE 0x5F
78
1d58f5ef
CP		 79#define REG_ENHANCE_ACOUSTICS1 0x62
80#define REG_ENHANCE_ACOUSTICS2 0x63
81
1c301fc5
JC		 82#define REG_PWM_MIN_BASE 0x64
83
84#define REG_TEMP_TMIN_BASE 0x67
85#define REG_TEMP_THERM_BASE 0x6A
86
87#define REG_REMOTE1_HYSTERSIS 0x6D
88#define REG_REMOTE2_HYSTERSIS 0x6E
89
90#define REG_TEMP_OFFSET_BASE 0x70
91
ebfaf1fb
JD		 92#define REG_CONFIG2 0x73
93
1c301fc5
JC		 94#define REG_EXTEND1 0x76
95#define REG_EXTEND2 0x77
378933c9
JD		 96
97#define REG_CONFIG3 0x78
1c301fc5 98#define REG_CONFIG5 0x7C
f99318b2
JD		 99#define REG_CONFIG4 0x7D
100
3d849981
JD		 101#define REG_STATUS4 0x81 /* ADT7490 only */
102
103#define REG_VTT_MIN 0x84 /* ADT7490 only */
104#define REG_VTT_MAX 0x86 /* ADT7490 only */
105
d8d2ee07
JD		 106#define VID_VIDSEL 0x80 /* ADT7476 only */
107
ebfaf1fb
JD		 108#define CONFIG2_ATTN 0x20
109
378933c9
JD		 110#define CONFIG3_SMBALERT 0x01
111#define CONFIG3_THERM 0x02
112
113#define CONFIG4_PINFUNC 0x03
f99318b2 114#define CONFIG4_MAXDUTY 0x08
ebfaf1fb
JD		 115#define CONFIG4_ATTN_IN10 0x30
116#define CONFIG4_ATTN_IN43 0xC0
1c301fc5
JC		 117
118#define CONFIG5_TWOSCOMP 0x01
119#define CONFIG5_TEMPOFFSET 0x02
54fe4671 120#define CONFIG5_VIDGPIO 0x10 /* ADT7476 only */
1c301fc5
JC		 121
122/* ADT7475 Settings */
123
cffb9dd0 124#define ADT7475_VOLTAGE_COUNT 5 /* Not counting Vtt */
1c301fc5
JC		 125#define ADT7475_TEMP_COUNT 3
126#define ADT7475_TACH_COUNT 4
127#define ADT7475_PWM_COUNT 3
128
129/* Macro to read the registers */
130
131#define adt7475_read(reg) i2c_smbus_read_byte_data(client, (reg))
132
133/* Macros to easily index the registers */
134
135#define TACH_REG(idx) (REG_TACH_BASE + ((idx) * 2))
136#define TACH_MIN_REG(idx) (REG_TACH_MIN_BASE + ((idx) * 2))
137
138#define PWM_REG(idx) (REG_PWM_BASE + (idx))
139#define PWM_MAX_REG(idx) (REG_PWM_MAX_BASE + (idx))
140#define PWM_MIN_REG(idx) (REG_PWM_MIN_BASE + (idx))
141#define PWM_CONFIG_REG(idx) (REG_PWM_CONFIG_BASE + (idx))
142
143#define VOLTAGE_REG(idx) (REG_VOLTAGE_BASE + (idx))
144#define VOLTAGE_MIN_REG(idx) (REG_VOLTAGE_MIN_BASE + ((idx) * 2))
145#define VOLTAGE_MAX_REG(idx) (REG_VOLTAGE_MAX_BASE + ((idx) * 2))
146
147#define TEMP_REG(idx) (REG_TEMP_BASE + (idx))
148#define TEMP_MIN_REG(idx) (REG_TEMP_MIN_BASE + ((idx) * 2))
149#define TEMP_MAX_REG(idx) (REG_TEMP_MAX_BASE + ((idx) * 2))
150#define TEMP_TMIN_REG(idx) (REG_TEMP_TMIN_BASE + (idx))
151#define TEMP_THERM_REG(idx) (REG_TEMP_THERM_BASE + (idx))
152#define TEMP_OFFSET_REG(idx) (REG_TEMP_OFFSET_BASE + (idx))
153#define TEMP_TRANGE_REG(idx) (REG_TEMP_TRANGE_BASE + (idx))
154
918ee91c 155static const unsigned short normal_i2c[] = { 0x2c, 0x2d, 0x2e, I2C_CLIENT_END };
1c301fc5 156
e5e9f44c 157enum chips { adt7473, adt7475, adt7476, adt7490 };
1c301fc5
JC		 158
159static const struct i2c_device_id adt7475_id[] = {
b180d050 160 { "adt7473", adt7473 },
1c301fc5 161 { "adt7475", adt7475 },
d8d2ee07 162 { "adt7476", adt7476 },
3d849981 163 { "adt7490", adt7490 },
1c301fc5
JC		 164 { }
165};
166MODULE_DEVICE_TABLE(i2c, adt7475_id);
167
fe339dbf 168static const struct of_device_id __maybe_unused adt7475_of_match[] = {
4e2496e4
JMC		 169 {
170 .compatible = "adi,adt7473",
171 .data = (void *)adt7473
172 },
173 {
174 .compatible = "adi,adt7475",
175 .data = (void *)adt7475
176 },
177 {
178 .compatible = "adi,adt7476",
179 .data = (void *)adt7476
180 },
181 {
182 .compatible = "adi,adt7490",
183 .data = (void *)adt7490
184 },
185 { },
186};
187MODULE_DEVICE_TABLE(of, adt7475_of_match);
188
1c301fc5 189struct adt7475_data {
c64fce7f 190 struct i2c_client *client;
1c301fc5
JC		 191 struct mutex lock;
192
193 unsigned long measure_updated;
b36fb171 194 bool valid;
1c301fc5 195
f99318b2 196 u8 config4;
1c301fc5 197 u8 config5;
cffb9dd0 198 u8 has_voltage;
ebfaf1fb 199 u8 bypass_attn; /* Bypass voltage attenuator */
378933c9
JD		 200 u8 has_pwm2:1;
201 u8 has_fan4:1;
54fe4671 202 u8 has_vid:1;
3d849981 203 u32 alarms;
cffb9dd0 204 u16 voltage[3][6];
1c301fc5
JC		 205 u16 temp[7][3];
206 u16 tach[2][4];
207 u8 pwm[4][3];
208 u8 range[3];
209 u8 pwmctl[3];
210 u8 pwmchan[3];
1d58f5ef 211 u8 enh_acoustics[2];
54fe4671
JD		 212
213 u8 vid;
214 u8 vrm;
c64fce7f 215 const struct attribute_group *groups[9];
1c301fc5
JC		 216};
217
218static struct i2c_driver adt7475_driver;
219static struct adt7475_data *adt7475_update_device(struct device *dev);
220static void adt7475_read_hystersis(struct i2c_client *client);
221static void adt7475_read_pwm(struct i2c_client *client, int index);
222
223/* Given a temp value, convert it to register value */
224
225static inline u16 temp2reg(struct adt7475_data *data, long val)
226{
227 u16 ret;
228
229 if (!(data->config5 & CONFIG5_TWOSCOMP)) {
2a844c14 230 val = clamp_val(val, -64000, 191000);
1c301fc5
JC		 231 ret = (val + 64500) / 1000;
232 } else {
2a844c14 233 val = clamp_val(val, -128000, 127000);
1c301fc5
JC		 234 if (val < -500)
235 ret = (256500 + val) / 1000;
236 else
237 ret = (val + 500) / 1000;
238 }
239
240 return ret << 2;
241}
242
243/* Given a register value, convert it to a real temp value */
244
245static inline int reg2temp(struct adt7475_data *data, u16 reg)
246{
247 if (data->config5 & CONFIG5_TWOSCOMP) {
248 if (reg >= 512)
249 return (reg - 1024) * 250;
250 else
251 return reg * 250;
252 } else
253 return (reg - 256) * 250;
254}
255
256static inline int tach2rpm(u16 tach)
257{
258 if (tach == 0 || tach == 0xFFFF)
259 return 0;
260
261 return (90000 * 60) / tach;
262}
263
264static inline u16 rpm2tach(unsigned long rpm)
265{
266 if (rpm == 0)
267 return 0;
268
2a844c14 269 return clamp_val((90000 * 60) / rpm, 1, 0xFFFF);
1c301fc5
JC		 270}
271
cffb9dd0
JD		 272/* Scaling factors for voltage inputs, taken from the ADT7490 datasheet */
273static const int adt7473_in_scaling[ADT7475_VOLTAGE_COUNT + 1][2] = {
274 { 45, 94 }, /* +2.5V */
275 { 175, 525 }, /* Vccp */
276 { 68, 71 }, /* Vcc */
277 { 93, 47 }, /* +5V */
278 { 120, 20 }, /* +12V */
279 { 45, 45 }, /* Vtt */
280};
1c301fc5 281
ebfaf1fb 282static inline int reg2volt(int channel, u16 reg, u8 bypass_attn)
1c301fc5 283{
cffb9dd0 284 const int *r = adt7473_in_scaling[channel];
1c301fc5 285
ebfaf1fb
JD		 286 if (bypass_attn & (1 << channel))
287 return DIV_ROUND_CLOSEST(reg * 2250, 1024);
cffb9dd0 288 return DIV_ROUND_CLOSEST(reg * (r[0] + r[1]) * 2250, r[1] * 1024);
1c301fc5
JC		 289}
290
ebfaf1fb 291static inline u16 volt2reg(int channel, long volt, u8 bypass_attn)
1c301fc5 292{
cffb9dd0
JD		 293 const int *r = adt7473_in_scaling[channel];
294 long reg;
295
ebfaf1fb 296 if (bypass_attn & (1 << channel))
cf3ca187 297 reg = DIV_ROUND_CLOSEST(volt * 1024, 2250);
ebfaf1fb 298 else
cf3ca187
LP		 299 reg = DIV_ROUND_CLOSEST(volt * r[1] * 1024,
300 (r[0] + r[1]) * 2250);
2a844c14 301 return clamp_val(reg, 0, 1023) & (0xff << 2);
1c301fc5
JC		 302}
303
f196dec6 304static int adt7475_read_word(struct i2c_client *client, int reg)
1c301fc5 305{
f196dec6 306 int val1, val2;
1c301fc5 307
f196dec6
DC		 308 val1 = i2c_smbus_read_byte_data(client, reg);
309 if (val1 < 0)
310 return val1;
311 val2 = i2c_smbus_read_byte_data(client, reg + 1);
312 if (val2 < 0)
313 return val2;
1c301fc5 314
f196dec6 315 return val1 | (val2 << 8);
1c301fc5
JC		 316}
317
318static void adt7475_write_word(struct i2c_client *client, int reg, u16 val)
319{
320 i2c_smbus_write_byte_data(client, reg + 1, val >> 8);
321 i2c_smbus_write_byte_data(client, reg, val & 0xFF);
322}
323
c24f9ba9 324static ssize_t voltage_show(struct device *dev, struct device_attribute *attr,
1c301fc5
JC		 325 char *buf)
326{
327 struct adt7475_data *data = adt7475_update_device(dev);
328 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
329 unsigned short val;
330
4afec79f
TI		 331 if (IS_ERR(data))
332 return PTR_ERR(data);
333
1c301fc5
JC		 334 switch (sattr->nr) {
335 case ALARM:
336 return sprintf(buf, "%d\n",
cffb9dd0 337 (data->alarms >> sattr->index) & 1);
1c301fc5
JC		 338 default:
339 val = data->voltage[sattr->nr][sattr->index];
ebfaf1fb
JD		 340 return sprintf(buf, "%d\n",
341 reg2volt(sattr->index, val, data->bypass_attn));
1c301fc5
JC		 342 }
343}
344
c24f9ba9
GR		 345static ssize_t voltage_store(struct device *dev,
346 struct device_attribute *attr, const char *buf,
347 size_t count)
1c301fc5
JC		 348{
349
350 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
c64fce7f
GM		 351 struct adt7475_data *data = dev_get_drvdata(dev);
352 struct i2c_client *client = data->client;
1c301fc5
JC		 353 unsigned char reg;
354 long val;
355
179c4fdb 356 if (kstrtol(buf, 10, &val))
1c301fc5
JC		 357 return -EINVAL;
358
359 mutex_lock(&data->lock);
360
ebfaf1fb
JD		 361 data->voltage[sattr->nr][sattr->index] =
362 volt2reg(sattr->index, val, data->bypass_attn);
1c301fc5 363
3d849981
JD		 364 if (sattr->index < ADT7475_VOLTAGE_COUNT) {
365 if (sattr->nr == MIN)
366 reg = VOLTAGE_MIN_REG(sattr->index);
367 else
368 reg = VOLTAGE_MAX_REG(sattr->index);
369 } else {
370 if (sattr->nr == MIN)
371 reg = REG_VTT_MIN;
372 else
373 reg = REG_VTT_MAX;
374 }
1c301fc5
JC		 375
376 i2c_smbus_write_byte_data(client, reg,
377 data->voltage[sattr->nr][sattr->index] >> 2);
378 mutex_unlock(&data->lock);
379
380 return count;
381}
382
c24f9ba9 383static ssize_t temp_show(struct device *dev, struct device_attribute *attr,
1c301fc5
JC		 384 char *buf)
385{
386 struct adt7475_data *data = adt7475_update_device(dev);
387 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
388 int out;
389
4afec79f
TI		 390 if (IS_ERR(data))
391 return PTR_ERR(data);
392
1c301fc5
JC		 393 switch (sattr->nr) {
394 case HYSTERSIS:
395 mutex_lock(&data->lock);
396 out = data->temp[sattr->nr][sattr->index];
397 if (sattr->index != 1)
398 out = (out >> 4) & 0xF;
399 else
400 out = (out & 0xF);
9ed5bc24
GR		 401 /*
402 * Show the value as an absolute number tied to
403 * THERM
404 */
1c301fc5
JC		 405 out = reg2temp(data, data->temp[THERM][sattr->index]) -
406 out * 1000;
407 mutex_unlock(&data->lock);
408 break;
409
410 case OFFSET:
9ed5bc24
GR		 411 /*
412 * Offset is always 2's complement, regardless of the
413 * setting in CONFIG5
414 */
1c301fc5
JC		 415 mutex_lock(&data->lock);
416 out = (s8)data->temp[sattr->nr][sattr->index];
417 if (data->config5 & CONFIG5_TEMPOFFSET)
418 out *= 1000;
419 else
420 out *= 500;
421 mutex_unlock(&data->lock);
422 break;
423
424 case ALARM:
425 out = (data->alarms >> (sattr->index + 4)) & 1;
426 break;
427
428 case FAULT:
429 /* Note - only for remote1 and remote2 */
cf312e07 430 out = !!(data->alarms & (sattr->index ? 0x8000 : 0x4000));
1c301fc5
JC		 431 break;
432
433 default:
434 /* All other temp values are in the configured format */
435 out = reg2temp(data, data->temp[sattr->nr][sattr->index]);
436 }
437
438 return sprintf(buf, "%d\n", out);
439}
440
c24f9ba9
GR		 441static ssize_t temp_store(struct device *dev, struct device_attribute *attr,
442 const char *buf, size_t count)
1c301fc5
JC		 443{
444 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
c64fce7f
GM		 445 struct adt7475_data *data = dev_get_drvdata(dev);
446 struct i2c_client *client = data->client;
1c301fc5
JC		 447 unsigned char reg = 0;
448 u8 out;
449 int temp;
450 long val;
451
179c4fdb 452 if (kstrtol(buf, 10, &val))
1c301fc5
JC		 453 return -EINVAL;
454
455 mutex_lock(&data->lock);
456
457 /* We need the config register in all cases for temp <-> reg conv. */
458 data->config5 = adt7475_read(REG_CONFIG5);
459
460 switch (sattr->nr) {
461 case OFFSET:
462 if (data->config5 & CONFIG5_TEMPOFFSET) {
2a844c14 463 val = clamp_val(val, -63000, 127000);
1c301fc5
JC		 464 out = data->temp[OFFSET][sattr->index] = val / 1000;
465 } else {
2a844c14 466 val = clamp_val(val, -63000, 64000);
1c301fc5
JC		 467 out = data->temp[OFFSET][sattr->index] = val / 500;
468 }
469 break;
470
471 case HYSTERSIS:
9ed5bc24
GR		 472 /*
473 * The value will be given as an absolute value, turn it
474 * into an offset based on THERM
475 */
1c301fc5
JC		 476
477 /* Read fresh THERM and HYSTERSIS values from the chip */
478 data->temp[THERM][sattr->index] =
479 adt7475_read(TEMP_THERM_REG(sattr->index)) << 2;
480 adt7475_read_hystersis(client);
481
482 temp = reg2temp(data, data->temp[THERM][sattr->index]);
2a844c14 483 val = clamp_val(val, temp - 15000, temp);
1c301fc5
JC		 484 val = (temp - val) / 1000;
485
486 if (sattr->index != 1) {
487 data->temp[HYSTERSIS][sattr->index] &= 0xF0;
488 data->temp[HYSTERSIS][sattr->index] |= (val & 0xF) << 4;
489 } else {
490 data->temp[HYSTERSIS][sattr->index] &= 0x0F;
491 data->temp[HYSTERSIS][sattr->index] |= (val & 0xF);
492 }
493
494 out = data->temp[HYSTERSIS][sattr->index];
495 break;
496
497 default:
498 data->temp[sattr->nr][sattr->index] = temp2reg(data, val);
499
9ed5bc24
GR		 500 /*
501 * We maintain an extra 2 digits of precision for simplicity
502 * - shift those back off before writing the value
503 */
1c301fc5
JC		 504 out = (u8) (data->temp[sattr->nr][sattr->index] >> 2);
505 }
506
507 switch (sattr->nr) {
508 case MIN:
509 reg = TEMP_MIN_REG(sattr->index);
510 break;
511 case MAX:
512 reg = TEMP_MAX_REG(sattr->index);
513 break;
514 case OFFSET:
515 reg = TEMP_OFFSET_REG(sattr->index);
516 break;
517 case AUTOMIN:
518 reg = TEMP_TMIN_REG(sattr->index);
519 break;
520 case THERM:
521 reg = TEMP_THERM_REG(sattr->index);
522 break;
523 case HYSTERSIS:
524 if (sattr->index != 2)
525 reg = REG_REMOTE1_HYSTERSIS;
526 else
527 reg = REG_REMOTE2_HYSTERSIS;
528
529 break;
530 }
531
532 i2c_smbus_write_byte_data(client, reg, out);
533
534 mutex_unlock(&data->lock);
535 return count;
536}
537
8f05bcc3
CP		 538/* Assuming CONFIG6[SLOW] is 0 */
539static const int ad7475_st_map[] = {
540 37500, 18800, 12500, 7500, 4700, 3100, 1600, 800,
541};
542
c24f9ba9
GR		 543static ssize_t temp_st_show(struct device *dev, struct device_attribute *attr,
544 char *buf)
8f05bcc3
CP		 545{
546 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
c64fce7f 547 struct adt7475_data *data = dev_get_drvdata(dev);
8f05bcc3
CP		 548 long val;
549
550 switch (sattr->index) {
551 case 0:
552 val = data->enh_acoustics[0] & 0xf;
553 break;
554 case 1:
555 val = (data->enh_acoustics[1] >> 4) & 0xf;
556 break;
557 case 2:
558 default:
559 val = data->enh_acoustics[1] & 0xf;
560 break;
561 }
562
563 if (val & 0x8)
564 return sprintf(buf, "%d\n", ad7475_st_map[val & 0x7]);
565 else
566 return sprintf(buf, "0\n");
567}
568
c24f9ba9
GR		 569static ssize_t temp_st_store(struct device *dev,
570 struct device_attribute *attr, const char *buf,
571 size_t count)
8f05bcc3
CP		 572{
573 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
c64fce7f
GM		 574 struct adt7475_data *data = dev_get_drvdata(dev);
575 struct i2c_client *client = data->client;
8f05bcc3
CP		 576 unsigned char reg;
577 int shift, idx;
578 ulong val;
579
580 if (kstrtoul(buf, 10, &val))
581 return -EINVAL;
582
583 switch (sattr->index) {
584 case 0:
585 reg = REG_ENHANCE_ACOUSTICS1;
586 shift = 0;
587 idx = 0;
588 break;
589 case 1:
590 reg = REG_ENHANCE_ACOUSTICS2;
591 shift = 0;
592 idx = 1;
593 break;
594 case 2:
595 default:
596 reg = REG_ENHANCE_ACOUSTICS2;
597 shift = 4;
598 idx = 1;
599 break;
600 }
601
602 if (val > 0) {
603 val = find_closest_descending(val, ad7475_st_map,
604 ARRAY_SIZE(ad7475_st_map));
605 val |= 0x8;
606 }
607
608 mutex_lock(&data->lock);
609
610 data->enh_acoustics[idx] &= ~(0xf << shift);
611 data->enh_acoustics[idx] |= (val << shift);
612
613 i2c_smbus_write_byte_data(client, reg, data->enh_acoustics[idx]);
614
615 mutex_unlock(&data->lock);
616
617 return count;
618}
619
9ed5bc24
GR		 620/*
621 * Table of autorange values - the user will write the value in millidegrees,
622 * and we'll convert it
623 */
1c301fc5
JC		 624static const int autorange_table[] = {
625 2000, 2500, 3330, 4000, 5000, 6670, 8000,
626 10000, 13330, 16000, 20000, 26670, 32000, 40000,
627 53330, 80000
628};
629
c24f9ba9 630static ssize_t point2_show(struct device *dev, struct device_attribute *attr,
1c301fc5
JC		 631 char *buf)
632{
633 struct adt7475_data *data = adt7475_update_device(dev);
634 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
635 int out, val;
636
4afec79f
TI		 637 if (IS_ERR(data))
638 return PTR_ERR(data);
639
1c301fc5
JC		 640 mutex_lock(&data->lock);
641 out = (data->range[sattr->index] >> 4) & 0x0F;
642 val = reg2temp(data, data->temp[AUTOMIN][sattr->index]);
643 mutex_unlock(&data->lock);
644
645 return sprintf(buf, "%d\n", val + autorange_table[out]);
646}
647
c24f9ba9
GR		 648static ssize_t point2_store(struct device *dev, struct device_attribute *attr,
649 const char *buf, size_t count)
1c301fc5 650{
c64fce7f
GM		 651 struct adt7475_data *data = dev_get_drvdata(dev);
652 struct i2c_client *client = data->client;
1c301fc5
JC		 653 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
654 int temp;
655 long val;
656
179c4fdb 657 if (kstrtol(buf, 10, &val))
1c301fc5
JC		 658 return -EINVAL;
659
660 mutex_lock(&data->lock);
661
662 /* Get a fresh copy of the needed registers */
663 data->config5 = adt7475_read(REG_CONFIG5);
664 data->temp[AUTOMIN][sattr->index] =
665 adt7475_read(TEMP_TMIN_REG(sattr->index)) << 2;
666 data->range[sattr->index] =
667 adt7475_read(TEMP_TRANGE_REG(sattr->index));
668
9ed5bc24
GR		 669 /*
670 * The user will write an absolute value, so subtract the start point
671 * to figure the range
672 */
1c301fc5 673 temp = reg2temp(data, data->temp[AUTOMIN][sattr->index]);
2a844c14 674 val = clamp_val(val, temp + autorange_table[0],
1c301fc5
JC		 675 temp + autorange_table[ARRAY_SIZE(autorange_table) - 1]);
676 val -= temp;
677
678 /* Find the nearest table entry to what the user wrote */
e4651640 679 val = find_closest(val, autorange_table, ARRAY_SIZE(autorange_table));
1c301fc5
JC		 680
681 data->range[sattr->index] &= ~0xF0;
682 data->range[sattr->index] |= val << 4;
683
684 i2c_smbus_write_byte_data(client, TEMP_TRANGE_REG(sattr->index),
685 data->range[sattr->index]);
686
687 mutex_unlock(&data->lock);
688 return count;
689}
690
c24f9ba9 691static ssize_t tach_show(struct device *dev, struct device_attribute *attr,
1c301fc5
JC		 692 char *buf)
693{
694 struct adt7475_data *data = adt7475_update_device(dev);
695 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
696 int out;
697
4afec79f
TI		 698 if (IS_ERR(data))
699 return PTR_ERR(data);
700
1c301fc5
JC		 701 if (sattr->nr == ALARM)
702 out = (data->alarms >> (sattr->index + 10)) & 1;
703 else
704 out = tach2rpm(data->tach[sattr->nr][sattr->index]);
705
706 return sprintf(buf, "%d\n", out);
707}
708
c24f9ba9
GR		 709static ssize_t tach_store(struct device *dev, struct device_attribute *attr,
710 const char *buf, size_t count)
1c301fc5
JC		 711{
712
713 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
c64fce7f
GM		 714 struct adt7475_data *data = dev_get_drvdata(dev);
715 struct i2c_client *client = data->client;
1c301fc5
JC		 716 unsigned long val;
717
179c4fdb 718 if (kstrtoul(buf, 10, &val))
1c301fc5
JC		 719 return -EINVAL;
720
721 mutex_lock(&data->lock);
722
723 data->tach[MIN][sattr->index] = rpm2tach(val);
724
725 adt7475_write_word(client, TACH_MIN_REG(sattr->index),
726 data->tach[MIN][sattr->index]);
727
728 mutex_unlock(&data->lock);
729 return count;
730}
731
c24f9ba9 732static ssize_t pwm_show(struct device *dev, struct device_attribute *attr,
1c301fc5
JC		 733 char *buf)
734{
735 struct adt7475_data *data = adt7475_update_device(dev);
736 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
737
4afec79f
TI		 738 if (IS_ERR(data))
739 return PTR_ERR(data);
740
1c301fc5
JC		 741 return sprintf(buf, "%d\n", data->pwm[sattr->nr][sattr->index]);
742}
743
c24f9ba9 744static ssize_t pwmchan_show(struct device *dev, struct device_attribute *attr,
1c301fc5
JC		 745 char *buf)
746{
747 struct adt7475_data *data = adt7475_update_device(dev);
748 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
749
4afec79f
TI		 750 if (IS_ERR(data))
751 return PTR_ERR(data);
752
1c301fc5
JC		 753 return sprintf(buf, "%d\n", data->pwmchan[sattr->index]);
754}
755
c24f9ba9 756static ssize_t pwmctrl_show(struct device *dev, struct device_attribute *attr,
1c301fc5
JC		 757 char *buf)
758{
759 struct adt7475_data *data = adt7475_update_device(dev);
760 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
761
4afec79f
TI		 762 if (IS_ERR(data))
763 return PTR_ERR(data);
764
1c301fc5
JC		 765 return sprintf(buf, "%d\n", data->pwmctl[sattr->index]);
766}
767
c24f9ba9
GR		 768static ssize_t pwm_store(struct device *dev, struct device_attribute *attr,
769 const char *buf, size_t count)
1c301fc5
JC		 770{
771
772 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
c64fce7f
GM		 773 struct adt7475_data *data = dev_get_drvdata(dev);
774 struct i2c_client *client = data->client;
1c301fc5
JC		 775 unsigned char reg = 0;
776 long val;
777
179c4fdb 778 if (kstrtol(buf, 10, &val))
1c301fc5
JC		 779 return -EINVAL;
780
781 mutex_lock(&data->lock);
782
783 switch (sattr->nr) {
784 case INPUT:
785 /* Get a fresh value for CONTROL */
786 data->pwm[CONTROL][sattr->index] =
787 adt7475_read(PWM_CONFIG_REG(sattr->index));
788
9ed5bc24
GR		 789 /*
790 * If we are not in manual mode, then we shouldn't allow
791 * the user to set the pwm speed
792 */
1c301fc5
JC		 793 if (((data->pwm[CONTROL][sattr->index] >> 5) & 7) != 7) {
794 mutex_unlock(&data->lock);
795 return count;
796 }
797
798 reg = PWM_REG(sattr->index);
799 break;
800
801 case MIN:
802 reg = PWM_MIN_REG(sattr->index);
803 break;
804
805 case MAX:
806 reg = PWM_MAX_REG(sattr->index);
807 break;
808 }
809
2a844c14 810 data->pwm[sattr->nr][sattr->index] = clamp_val(val, 0, 0xFF);
1c301fc5
JC		 811 i2c_smbus_write_byte_data(client, reg,
812 data->pwm[sattr->nr][sattr->index]);
1d58f5ef
CP		 813 mutex_unlock(&data->lock);
814
815 return count;
816}
817
c24f9ba9 818static ssize_t stall_disable_show(struct device *dev,
1d58f5ef
CP		 819 struct device_attribute *attr, char *buf)
820{
821 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
c64fce7f
GM		 822 struct adt7475_data *data = dev_get_drvdata(dev);
823
1d58f5ef
CP		 824 u8 mask = BIT(5 + sattr->index);
825
826 return sprintf(buf, "%d\n", !!(data->enh_acoustics[0] & mask));
827}
828
c24f9ba9
GR		 829static ssize_t stall_disable_store(struct device *dev,
830 struct device_attribute *attr,
831 const char *buf, size_t count)
1d58f5ef
CP		 832{
833 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
c64fce7f
GM		 834 struct adt7475_data *data = dev_get_drvdata(dev);
835 struct i2c_client *client = data->client;
1d58f5ef
CP		 836 long val;
837 u8 mask = BIT(5 + sattr->index);
838
839 if (kstrtol(buf, 10, &val))
840 return -EINVAL;
841
842 mutex_lock(&data->lock);
843
844 data->enh_acoustics[0] &= ~mask;
845 if (val)
846 data->enh_acoustics[0] |= mask;
847
848 i2c_smbus_write_byte_data(client, REG_ENHANCE_ACOUSTICS1,
849 data->enh_acoustics[0]);
1c301fc5
JC		 850
851 mutex_unlock(&data->lock);
852
853 return count;
854}
855
856/* Called by set_pwmctrl and set_pwmchan */
857
858static int hw_set_pwm(struct i2c_client *client, int index,
859 unsigned int pwmctl, unsigned int pwmchan)
860{
861 struct adt7475_data *data = i2c_get_clientdata(client);
862 long val = 0;
863
864 switch (pwmctl) {
865 case 0:
866 val = 0x03; /* Run at full speed */
867 break;
868 case 1:
869 val = 0x07; /* Manual mode */
870 break;
871 case 2:
872 switch (pwmchan) {
873 case 1:
874 /* Remote1 controls PWM */
875 val = 0x00;
876 break;
877 case 2:
878 /* local controls PWM */
879 val = 0x01;
880 break;
881 case 4:
882 /* remote2 controls PWM */
883 val = 0x02;
884 break;
885 case 6:
886 /* local/remote2 control PWM */
887 val = 0x05;
888 break;
889 case 7:
890 /* All three control PWM */
891 val = 0x06;
892 break;
893 default:
894 return -EINVAL;
895 }
896 break;
897 default:
898 return -EINVAL;
899 }
900
901 data->pwmctl[index] = pwmctl;
902 data->pwmchan[index] = pwmchan;
903
904 data->pwm[CONTROL][index] &= ~0xE0;
905 data->pwm[CONTROL][index] |= (val & 7) << 5;
906
907 i2c_smbus_write_byte_data(client, PWM_CONFIG_REG(index),
908 data->pwm[CONTROL][index]);
909
910 return 0;
911}
912
c24f9ba9
GR		 913static ssize_t pwmchan_store(struct device *dev,
914 struct device_attribute *attr, const char *buf,
915 size_t count)
1c301fc5
JC		 916{
917 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
c64fce7f
GM		 918 struct adt7475_data *data = dev_get_drvdata(dev);
919 struct i2c_client *client = data->client;
1c301fc5
JC		 920 int r;
921 long val;
922
179c4fdb 923 if (kstrtol(buf, 10, &val))
1c301fc5
JC		 924 return -EINVAL;
925
926 mutex_lock(&data->lock);
927 /* Read Modify Write PWM values */
928 adt7475_read_pwm(client, sattr->index);
929 r = hw_set_pwm(client, sattr->index, data->pwmctl[sattr->index], val);
930 if (r)
931 count = r;
932 mutex_unlock(&data->lock);
933
934 return count;
935}
936
c24f9ba9
GR		 937static ssize_t pwmctrl_store(struct device *dev,
938 struct device_attribute *attr, const char *buf,
939 size_t count)
1c301fc5
JC		 940{
941 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
c64fce7f
GM		 942 struct adt7475_data *data = dev_get_drvdata(dev);
943 struct i2c_client *client = data->client;
1c301fc5
JC		 944 int r;
945 long val;
946
179c4fdb 947 if (kstrtol(buf, 10, &val))
1c301fc5
JC		 948 return -EINVAL;
949
950 mutex_lock(&data->lock);
951 /* Read Modify Write PWM values */
952 adt7475_read_pwm(client, sattr->index);
953 r = hw_set_pwm(client, sattr->index, val, data->pwmchan[sattr->index]);
954 if (r)
955 count = r;
956 mutex_unlock(&data->lock);
957
958 return count;
959}
960
961/* List of frequencies for the PWM */
962static const int pwmfreq_table[] = {
3490c92a 963 11, 14, 22, 29, 35, 44, 58, 88, 22500
1c301fc5
JC		 964};
965
c24f9ba9 966static ssize_t pwmfreq_show(struct device *dev, struct device_attribute *attr,
1c301fc5
JC		 967 char *buf)
968{
969 struct adt7475_data *data = adt7475_update_device(dev);
970 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
9d19371d 971 int idx;
1c301fc5 972
4afec79f
TI		 973 if (IS_ERR(data))
974 return PTR_ERR(data);
9d19371d
DC		 975 idx = clamp_val(data->range[sattr->index] & 0xf, 0,
976 ARRAY_SIZE(pwmfreq_table) - 1);
4afec79f 977
9d19371d 978 return sprintf(buf, "%d\n", pwmfreq_table[idx]);
1c301fc5
JC		 979}
980
c24f9ba9
GR		 981static ssize_t pwmfreq_store(struct device *dev,
982 struct device_attribute *attr, const char *buf,
983 size_t count)
1c301fc5
JC		 984{
985 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
c64fce7f
GM		 986 struct adt7475_data *data = dev_get_drvdata(dev);
987 struct i2c_client *client = data->client;
1c301fc5
JC		 988 int out;
989 long val;
990
179c4fdb 991 if (kstrtol(buf, 10, &val))
1c301fc5
JC		 992 return -EINVAL;
993
e4651640 994 out = find_closest(val, pwmfreq_table, ARRAY_SIZE(pwmfreq_table));
1c301fc5
JC		 995
996 mutex_lock(&data->lock);
997
998 data->range[sattr->index] =
999 adt7475_read(TEMP_TRANGE_REG(sattr->index));
3490c92a 1000 data->range[sattr->index] &= ~0xf;
1c301fc5
JC		 1001 data->range[sattr->index] |= out;
1002
1003 i2c_smbus_write_byte_data(client, TEMP_TRANGE_REG(sattr->index),
1004 data->range[sattr->index]);
1005
1006 mutex_unlock(&data->lock);
1007 return count;
1008}
1009
1d05303c
JL		 1010static ssize_t pwm_use_point2_pwm_at_crit_show(struct device *dev,
1011 struct device_attribute *devattr,
1012 char *buf)
f99318b2
JD		 1013{
1014 struct adt7475_data *data = adt7475_update_device(dev);
9d19371d
DC		 1015
1016 if (IS_ERR(data))
1017 return PTR_ERR(data);
1018
f99318b2
JD		 1019 return sprintf(buf, "%d\n", !!(data->config4 & CONFIG4_MAXDUTY));
1020}
1021
1d05303c
JL		 1022static ssize_t pwm_use_point2_pwm_at_crit_store(struct device *dev,
1023 struct device_attribute *devattr,
1024 const char *buf, size_t count)
f99318b2 1025{
c64fce7f
GM		 1026 struct adt7475_data *data = dev_get_drvdata(dev);
1027 struct i2c_client *client = data->client;
f99318b2
JD		 1028 long val;
1029
179c4fdb 1030 if (kstrtol(buf, 10, &val))
f99318b2
JD		 1031 return -EINVAL;
1032 if (val != 0 && val != 1)
1033 return -EINVAL;
1034
1035 mutex_lock(&data->lock);
1036 data->config4 = i2c_smbus_read_byte_data(client, REG_CONFIG4);
1037 if (val)
1038 data->config4 |= CONFIG4_MAXDUTY;
1039 else
1040 data->config4 &= ~CONFIG4_MAXDUTY;
1041 i2c_smbus_write_byte_data(client, REG_CONFIG4, data->config4);
1042 mutex_unlock(&data->lock);
1043
1044 return count;
1045}
1046
1d05303c 1047static ssize_t vrm_show(struct device *dev, struct device_attribute *devattr,
54fe4671
JD		 1048 char *buf)
1049{
1050 struct adt7475_data *data = dev_get_drvdata(dev);
1051 return sprintf(buf, "%d\n", (int)data->vrm);
1052}
1053
1d05303c
JL		 1054static ssize_t vrm_store(struct device *dev, struct device_attribute *devattr,
1055 const char *buf, size_t count)
54fe4671
JD		 1056{
1057 struct adt7475_data *data = dev_get_drvdata(dev);
1058 long val;
1059
179c4fdb 1060 if (kstrtol(buf, 10, &val))
54fe4671
JD		 1061 return -EINVAL;
1062 if (val < 0 || val > 255)
1063 return -EINVAL;
1064 data->vrm = val;
1065
1066 return count;
1067}
1068
1d05303c
JL		 1069static ssize_t cpu0_vid_show(struct device *dev,
1070 struct device_attribute *devattr, char *buf)
54fe4671
JD		 1071{
1072 struct adt7475_data *data = adt7475_update_device(dev);
4afec79f
TI		 1073
1074 if (IS_ERR(data))
1075 return PTR_ERR(data);
1076
54fe4671
JD		 1077 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
1078}
1079
c24f9ba9
GR		 1080static SENSOR_DEVICE_ATTR_2_RO(in0_input, voltage, INPUT, 0);
1081static SENSOR_DEVICE_ATTR_2_RW(in0_max, voltage, MAX, 0);
1082static SENSOR_DEVICE_ATTR_2_RW(in0_min, voltage, MIN, 0);
1083static SENSOR_DEVICE_ATTR_2_RO(in0_alarm, voltage, ALARM, 0);
1084static SENSOR_DEVICE_ATTR_2_RO(in1_input, voltage, INPUT, 1);
1085static SENSOR_DEVICE_ATTR_2_RW(in1_max, voltage, MAX, 1);
1086static SENSOR_DEVICE_ATTR_2_RW(in1_min, voltage, MIN, 1);
1087static SENSOR_DEVICE_ATTR_2_RO(in1_alarm, voltage, ALARM, 1);
1088static SENSOR_DEVICE_ATTR_2_RO(in2_input, voltage, INPUT, 2);
1089static SENSOR_DEVICE_ATTR_2_RW(in2_max, voltage, MAX, 2);
1090static SENSOR_DEVICE_ATTR_2_RW(in2_min, voltage, MIN, 2);
1091static SENSOR_DEVICE_ATTR_2_RO(in2_alarm, voltage, ALARM, 2);
1092static SENSOR_DEVICE_ATTR_2_RO(in3_input, voltage, INPUT, 3);
1093static SENSOR_DEVICE_ATTR_2_RW(in3_max, voltage, MAX, 3);
1094static SENSOR_DEVICE_ATTR_2_RW(in3_min, voltage, MIN, 3);
1095static SENSOR_DEVICE_ATTR_2_RO(in3_alarm, voltage, ALARM, 3);
1096static SENSOR_DEVICE_ATTR_2_RO(in4_input, voltage, INPUT, 4);
1097static SENSOR_DEVICE_ATTR_2_RW(in4_max, voltage, MAX, 4);
1098static SENSOR_DEVICE_ATTR_2_RW(in4_min, voltage, MIN, 4);
1099static SENSOR_DEVICE_ATTR_2_RO(in4_alarm, voltage, ALARM, 8);
1100static SENSOR_DEVICE_ATTR_2_RO(in5_input, voltage, INPUT, 5);
1101static SENSOR_DEVICE_ATTR_2_RW(in5_max, voltage, MAX, 5);
1102static SENSOR_DEVICE_ATTR_2_RW(in5_min, voltage, MIN, 5);
1103static SENSOR_DEVICE_ATTR_2_RO(in5_alarm, voltage, ALARM, 31);
1104static SENSOR_DEVICE_ATTR_2_RO(temp1_input, temp, INPUT, 0);
1105static SENSOR_DEVICE_ATTR_2_RO(temp1_alarm, temp, ALARM, 0);
1106static SENSOR_DEVICE_ATTR_2_RO(temp1_fault, temp, FAULT, 0);
1107static SENSOR_DEVICE_ATTR_2_RW(temp1_max, temp, MAX, 0);
1108static SENSOR_DEVICE_ATTR_2_RW(temp1_min, temp, MIN, 0);
1109static SENSOR_DEVICE_ATTR_2_RW(temp1_offset, temp, OFFSET, 0);
1110static SENSOR_DEVICE_ATTR_2_RW(temp1_auto_point1_temp, temp, AUTOMIN, 0);
1111static SENSOR_DEVICE_ATTR_2_RW(temp1_auto_point2_temp, point2, 0, 0);
1112static SENSOR_DEVICE_ATTR_2_RW(temp1_crit, temp, THERM, 0);
1113static SENSOR_DEVICE_ATTR_2_RW(temp1_crit_hyst, temp, HYSTERSIS, 0);
1114static SENSOR_DEVICE_ATTR_2_RW(temp1_smoothing, temp_st, 0, 0);
1115static SENSOR_DEVICE_ATTR_2_RO(temp2_input, temp, INPUT, 1);
1116static SENSOR_DEVICE_ATTR_2_RO(temp2_alarm, temp, ALARM, 1);
1117static SENSOR_DEVICE_ATTR_2_RW(temp2_max, temp, MAX, 1);
1118static SENSOR_DEVICE_ATTR_2_RW(temp2_min, temp, MIN, 1);
1119static SENSOR_DEVICE_ATTR_2_RW(temp2_offset, temp, OFFSET, 1);
1120static SENSOR_DEVICE_ATTR_2_RW(temp2_auto_point1_temp, temp, AUTOMIN, 1);
1121static SENSOR_DEVICE_ATTR_2_RW(temp2_auto_point2_temp, point2, 0, 1);
1122static SENSOR_DEVICE_ATTR_2_RW(temp2_crit, temp, THERM, 1);
1123static SENSOR_DEVICE_ATTR_2_RW(temp2_crit_hyst, temp, HYSTERSIS, 1);
1124static SENSOR_DEVICE_ATTR_2_RW(temp2_smoothing, temp_st, 0, 1);
1125static SENSOR_DEVICE_ATTR_2_RO(temp3_input, temp, INPUT, 2);
1126static SENSOR_DEVICE_ATTR_2_RO(temp3_alarm, temp, ALARM, 2);
1127static SENSOR_DEVICE_ATTR_2_RO(temp3_fault, temp, FAULT, 2);
1128static SENSOR_DEVICE_ATTR_2_RW(temp3_max, temp, MAX, 2);
1129static SENSOR_DEVICE_ATTR_2_RW(temp3_min, temp, MIN, 2);
1130static SENSOR_DEVICE_ATTR_2_RW(temp3_offset, temp, OFFSET, 2);
1131static SENSOR_DEVICE_ATTR_2_RW(temp3_auto_point1_temp, temp, AUTOMIN, 2);
1132static SENSOR_DEVICE_ATTR_2_RW(temp3_auto_point2_temp, point2, 0, 2);
1133static SENSOR_DEVICE_ATTR_2_RW(temp3_crit, temp, THERM, 2);
1134static SENSOR_DEVICE_ATTR_2_RW(temp3_crit_hyst, temp, HYSTERSIS, 2);
1135static SENSOR_DEVICE_ATTR_2_RW(temp3_smoothing, temp_st, 0, 2);
1136static SENSOR_DEVICE_ATTR_2_RO(fan1_input, tach, INPUT, 0);
1137static SENSOR_DEVICE_ATTR_2_RW(fan1_min, tach, MIN, 0);
1138static SENSOR_DEVICE_ATTR_2_RO(fan1_alarm, tach, ALARM, 0);
1139static SENSOR_DEVICE_ATTR_2_RO(fan2_input, tach, INPUT, 1);
1140static SENSOR_DEVICE_ATTR_2_RW(fan2_min, tach, MIN, 1);
1141static SENSOR_DEVICE_ATTR_2_RO(fan2_alarm, tach, ALARM, 1);
1142static SENSOR_DEVICE_ATTR_2_RO(fan3_input, tach, INPUT, 2);
1143static SENSOR_DEVICE_ATTR_2_RW(fan3_min, tach, MIN, 2);
1144static SENSOR_DEVICE_ATTR_2_RO(fan3_alarm, tach, ALARM, 2);
1145static SENSOR_DEVICE_ATTR_2_RO(fan4_input, tach, INPUT, 3);
1146static SENSOR_DEVICE_ATTR_2_RW(fan4_min, tach, MIN, 3);
1147static SENSOR_DEVICE_ATTR_2_RO(fan4_alarm, tach, ALARM, 3);
1148static SENSOR_DEVICE_ATTR_2_RW(pwm1, pwm, INPUT, 0);
1149static SENSOR_DEVICE_ATTR_2_RW(pwm1_freq, pwmfreq, INPUT, 0);
1150static SENSOR_DEVICE_ATTR_2_RW(pwm1_enable, pwmctrl, INPUT, 0);
1151static SENSOR_DEVICE_ATTR_2_RW(pwm1_auto_channels_temp, pwmchan, INPUT, 0);
1152static SENSOR_DEVICE_ATTR_2_RW(pwm1_auto_point1_pwm, pwm, MIN, 0);
1153static SENSOR_DEVICE_ATTR_2_RW(pwm1_auto_point2_pwm, pwm, MAX, 0);
1154static SENSOR_DEVICE_ATTR_2_RW(pwm1_stall_disable, stall_disable, 0, 0);
1155static SENSOR_DEVICE_ATTR_2_RW(pwm2, pwm, INPUT, 1);
1156static SENSOR_DEVICE_ATTR_2_RW(pwm2_freq, pwmfreq, INPUT, 1);
1157static SENSOR_DEVICE_ATTR_2_RW(pwm2_enable, pwmctrl, INPUT, 1);
1158static SENSOR_DEVICE_ATTR_2_RW(pwm2_auto_channels_temp, pwmchan, INPUT, 1);
1159static SENSOR_DEVICE_ATTR_2_RW(pwm2_auto_point1_pwm, pwm, MIN, 1);
1160static SENSOR_DEVICE_ATTR_2_RW(pwm2_auto_point2_pwm, pwm, MAX, 1);
1161static SENSOR_DEVICE_ATTR_2_RW(pwm2_stall_disable, stall_disable, 0, 1);
1162static SENSOR_DEVICE_ATTR_2_RW(pwm3, pwm, INPUT, 2);
1163static SENSOR_DEVICE_ATTR_2_RW(pwm3_freq, pwmfreq, INPUT, 2);
1164static SENSOR_DEVICE_ATTR_2_RW(pwm3_enable, pwmctrl, INPUT, 2);
1165static SENSOR_DEVICE_ATTR_2_RW(pwm3_auto_channels_temp, pwmchan, INPUT, 2);
1166static SENSOR_DEVICE_ATTR_2_RW(pwm3_auto_point1_pwm, pwm, MIN, 2);
1167static SENSOR_DEVICE_ATTR_2_RW(pwm3_auto_point2_pwm, pwm, MAX, 2);
1168static SENSOR_DEVICE_ATTR_2_RW(pwm3_stall_disable, stall_disable, 0, 2);
1c301fc5 1169
f99318b2 1170/* Non-standard name, might need revisiting */
1d05303c 1171static DEVICE_ATTR_RW(pwm_use_point2_pwm_at_crit);
f99318b2 1172
1d05303c
JL		 1173static DEVICE_ATTR_RW(vrm);
1174static DEVICE_ATTR_RO(cpu0_vid);
54fe4671 1175
1c301fc5
JC		 1176static struct attribute *adt7475_attrs[] = {
1177 &sensor_dev_attr_in1_input.dev_attr.attr,
1178 &sensor_dev_attr_in1_max.dev_attr.attr,
1179 &sensor_dev_attr_in1_min.dev_attr.attr,
1180 &sensor_dev_attr_in1_alarm.dev_attr.attr,
1181 &sensor_dev_attr_in2_input.dev_attr.attr,
1182 &sensor_dev_attr_in2_max.dev_attr.attr,
1183 &sensor_dev_attr_in2_min.dev_attr.attr,
1184 &sensor_dev_attr_in2_alarm.dev_attr.attr,
1185 &sensor_dev_attr_temp1_input.dev_attr.attr,
1186 &sensor_dev_attr_temp1_alarm.dev_attr.attr,
1187 &sensor_dev_attr_temp1_fault.dev_attr.attr,
1188 &sensor_dev_attr_temp1_max.dev_attr.attr,
1189 &sensor_dev_attr_temp1_min.dev_attr.attr,
1190 &sensor_dev_attr_temp1_offset.dev_attr.attr,
1191 &sensor_dev_attr_temp1_auto_point1_temp.dev_attr.attr,
1192 &sensor_dev_attr_temp1_auto_point2_temp.dev_attr.attr,
1193 &sensor_dev_attr_temp1_crit.dev_attr.attr,
1194 &sensor_dev_attr_temp1_crit_hyst.dev_attr.attr,
8f05bcc3 1195 &sensor_dev_attr_temp1_smoothing.dev_attr.attr,
1c301fc5
JC		 1196 &sensor_dev_attr_temp2_input.dev_attr.attr,
1197 &sensor_dev_attr_temp2_alarm.dev_attr.attr,
1198 &sensor_dev_attr_temp2_max.dev_attr.attr,
1199 &sensor_dev_attr_temp2_min.dev_attr.attr,
1200 &sensor_dev_attr_temp2_offset.dev_attr.attr,
1201 &sensor_dev_attr_temp2_auto_point1_temp.dev_attr.attr,
1202 &sensor_dev_attr_temp2_auto_point2_temp.dev_attr.attr,
1203 &sensor_dev_attr_temp2_crit.dev_attr.attr,
1204 &sensor_dev_attr_temp2_crit_hyst.dev_attr.attr,
8f05bcc3 1205 &sensor_dev_attr_temp2_smoothing.dev_attr.attr,
1c301fc5
JC		 1206 &sensor_dev_attr_temp3_input.dev_attr.attr,
1207 &sensor_dev_attr_temp3_fault.dev_attr.attr,
1208 &sensor_dev_attr_temp3_alarm.dev_attr.attr,
1209 &sensor_dev_attr_temp3_max.dev_attr.attr,
1210 &sensor_dev_attr_temp3_min.dev_attr.attr,
1211 &sensor_dev_attr_temp3_offset.dev_attr.attr,
1212 &sensor_dev_attr_temp3_auto_point1_temp.dev_attr.attr,
1213 &sensor_dev_attr_temp3_auto_point2_temp.dev_attr.attr,
1214 &sensor_dev_attr_temp3_crit.dev_attr.attr,
1215 &sensor_dev_attr_temp3_crit_hyst.dev_attr.attr,
8f05bcc3 1216 &sensor_dev_attr_temp3_smoothing.dev_attr.attr,
1c301fc5
JC		 1217 &sensor_dev_attr_fan1_input.dev_attr.attr,
1218 &sensor_dev_attr_fan1_min.dev_attr.attr,
1219 &sensor_dev_attr_fan1_alarm.dev_attr.attr,
1220 &sensor_dev_attr_fan2_input.dev_attr.attr,
1221 &sensor_dev_attr_fan2_min.dev_attr.attr,
1222 &sensor_dev_attr_fan2_alarm.dev_attr.attr,
1223 &sensor_dev_attr_fan3_input.dev_attr.attr,
1224 &sensor_dev_attr_fan3_min.dev_attr.attr,
1225 &sensor_dev_attr_fan3_alarm.dev_attr.attr,
1c301fc5
JC		 1226 &sensor_dev_attr_pwm1.dev_attr.attr,
1227 &sensor_dev_attr_pwm1_freq.dev_attr.attr,
1228 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
84d2a314 1229 &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
1c301fc5
JC		 1230 &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
1231 &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
1d58f5ef 1232 &sensor_dev_attr_pwm1_stall_disable.dev_attr.attr,
1c301fc5
JC		 1233 &sensor_dev_attr_pwm3.dev_attr.attr,
1234 &sensor_dev_attr_pwm3_freq.dev_attr.attr,
1235 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
84d2a314 1236 &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
1c301fc5
JC		 1237 &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,
1238 &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
1d58f5ef 1239 &sensor_dev_attr_pwm3_stall_disable.dev_attr.attr,
f99318b2 1240 &dev_attr_pwm_use_point2_pwm_at_crit.attr,
1c301fc5
JC		 1241 NULL,
1242};
1243
378933c9
JD		 1244static struct attribute *fan4_attrs[] = {
1245 &sensor_dev_attr_fan4_input.dev_attr.attr,
1246 &sensor_dev_attr_fan4_min.dev_attr.attr,
1247 &sensor_dev_attr_fan4_alarm.dev_attr.attr,
1248 NULL
1249};
1250
1251static struct attribute *pwm2_attrs[] = {
1252 &sensor_dev_attr_pwm2.dev_attr.attr,
1253 &sensor_dev_attr_pwm2_freq.dev_attr.attr,
1254 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
1255 &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
1256 &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,
1257 &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
1d58f5ef 1258 &sensor_dev_attr_pwm2_stall_disable.dev_attr.attr,
378933c9
JD		 1259 NULL
1260};
1261
378933c9 1262static struct attribute *in0_attrs[] = {
3d849981
JD		 1263 &sensor_dev_attr_in0_input.dev_attr.attr,
1264 &sensor_dev_attr_in0_max.dev_attr.attr,
1265 &sensor_dev_attr_in0_min.dev_attr.attr,
1266 &sensor_dev_attr_in0_alarm.dev_attr.attr,
378933c9
JD		 1267 NULL
1268};
1269
d8d2ee07 1270static struct attribute *in3_attrs[] = {
3d849981
JD		 1271 &sensor_dev_attr_in3_input.dev_attr.attr,
1272 &sensor_dev_attr_in3_max.dev_attr.attr,
1273 &sensor_dev_attr_in3_min.dev_attr.attr,
1274 &sensor_dev_attr_in3_alarm.dev_attr.attr,
d8d2ee07
JD		 1275 NULL
1276};
1277
1278static struct attribute *in4_attrs[] = {
3d849981
JD		 1279 &sensor_dev_attr_in4_input.dev_attr.attr,
1280 &sensor_dev_attr_in4_max.dev_attr.attr,
1281 &sensor_dev_attr_in4_min.dev_attr.attr,
1282 &sensor_dev_attr_in4_alarm.dev_attr.attr,
d8d2ee07
JD		 1283 NULL
1284};
1285
1286static struct attribute *in5_attrs[] = {
3d849981
JD		 1287 &sensor_dev_attr_in5_input.dev_attr.attr,
1288 &sensor_dev_attr_in5_max.dev_attr.attr,
1289 &sensor_dev_attr_in5_min.dev_attr.attr,
1290 &sensor_dev_attr_in5_alarm.dev_attr.attr,
1291 NULL
1292};
1293
54fe4671
JD		 1294static struct attribute *vid_attrs[] = {
1295 &dev_attr_cpu0_vid.attr,
1296 &dev_attr_vrm.attr,
1297 NULL
1298};
1299
f5397be8
AY		 1300static const struct attribute_group adt7475_attr_group = { .attrs = adt7475_attrs };
1301static const struct attribute_group fan4_attr_group = { .attrs = fan4_attrs };
1302static const struct attribute_group pwm2_attr_group = { .attrs = pwm2_attrs };
1303static const struct attribute_group in0_attr_group = { .attrs = in0_attrs };
1304static const struct attribute_group in3_attr_group = { .attrs = in3_attrs };
1305static const struct attribute_group in4_attr_group = { .attrs = in4_attrs };
1306static const struct attribute_group in5_attr_group = { .attrs = in5_attrs };
1307static const struct attribute_group vid_attr_group = { .attrs = vid_attrs };
1c301fc5 1308
310ec792 1309static int adt7475_detect(struct i2c_client *client,
1c301fc5
JC		 1310 struct i2c_board_info *info)
1311{
1312 struct i2c_adapter *adapter = client->adapter;
d656b6fd 1313 int vendid, devid, devid2;
b180d050 1314 const char *name;
1c301fc5
JC		 1315
1316 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1317 return -ENODEV;
1318
b180d050 1319 vendid = adt7475_read(REG_VENDID);
d656b6fd
JD		 1320 devid2 = adt7475_read(REG_DEVID2);
1321 if (vendid != 0x41 || /* Analog Devices */
1322 (devid2 & 0xf8) != 0x68)
1323 return -ENODEV;
b180d050 1324
d656b6fd
JD		 1325 devid = adt7475_read(REG_DEVID);
1326 if (devid == 0x73)
b180d050 1327 name = "adt7473";
d656b6fd 1328 else if (devid == 0x75 && client->addr == 0x2e)
b180d050 1329 name = "adt7475";
d8d2ee07
JD		 1330 else if (devid == 0x76)
1331 name = "adt7476";
3d849981
JD		 1332 else if ((devid2 & 0xfc) == 0x6c)
1333 name = "adt7490";
b180d050
JD		 1334 else {
1335 dev_dbg(&adapter->dev,
d8d2ee07 1336 "Couldn't detect an ADT7473/75/76/90 part at "
b180d050 1337 "0x%02x\n", (unsigned int)client->addr);
52df6440 1338 return -ENODEV;
1c301fc5
JC		 1339 }
1340
b180d050 1341 strlcpy(info->type, name, I2C_NAME_SIZE);
1c301fc5
JC		 1342
1343 return 0;
1344}
1345
702afead 1346static int adt7475_update_limits(struct i2c_client *client)
5cf943ed
TI		 1347{
1348 struct adt7475_data *data = i2c_get_clientdata(client);
1349 int i;
702afead 1350 int ret;
5cf943ed 1351
702afead
TI		 1352 ret = adt7475_read(REG_CONFIG4);
1353 if (ret < 0)
1354 return ret;
1355 data->config4 = ret;
1356
1357 ret = adt7475_read(REG_CONFIG5);
1358 if (ret < 0)
1359 return ret;
1360 data->config5 = ret;
5cf943ed
TI		 1361
1362 for (i = 0; i < ADT7475_VOLTAGE_COUNT; i++) {
1363 if (!(data->has_voltage & (1 << i)))
1364 continue;
1365 /* Adjust values so they match the input precision */
702afead
TI		 1366 ret = adt7475_read(VOLTAGE_MIN_REG(i));
1367 if (ret < 0)
1368 return ret;
1369 data->voltage[MIN][i] = ret << 2;
1370
1371 ret = adt7475_read(VOLTAGE_MAX_REG(i));
1372 if (ret < 0)
1373 return ret;
1374 data->voltage[MAX][i] = ret << 2;
5cf943ed
TI		 1375 }
1376
1377 if (data->has_voltage & (1 << 5)) {
702afead
TI		 1378 ret = adt7475_read(REG_VTT_MIN);
1379 if (ret < 0)
1380 return ret;
1381 data->voltage[MIN][5] = ret << 2;
1382
1383 ret = adt7475_read(REG_VTT_MAX);
1384 if (ret < 0)
1385 return ret;
1386 data->voltage[MAX][5] = ret << 2;
5cf943ed
TI		 1387 }
1388
1389 for (i = 0; i < ADT7475_TEMP_COUNT; i++) {
1390 /* Adjust values so they match the input precision */
702afead
TI		 1391 ret = adt7475_read(TEMP_MIN_REG(i));
1392 if (ret < 0)
1393 return ret;
1394 data->temp[MIN][i] = ret << 2;
1395
1396 ret = adt7475_read(TEMP_MAX_REG(i));
1397 if (ret < 0)
1398 return ret;
1399 data->temp[MAX][i] = ret << 2;
1400
1401 ret = adt7475_read(TEMP_TMIN_REG(i));
1402 if (ret < 0)
1403 return ret;
1404 data->temp[AUTOMIN][i] = ret << 2;
1405
1406 ret = adt7475_read(TEMP_THERM_REG(i));
1407 if (ret < 0)
1408 return ret;
1409 data->temp[THERM][i] = ret << 2;
1410
1411 ret = adt7475_read(TEMP_OFFSET_REG(i));
1412 if (ret < 0)
1413 return ret;
1414 data->temp[OFFSET][i] = ret;
5cf943ed
TI		 1415 }
1416 adt7475_read_hystersis(client);
1417
1418 for (i = 0; i < ADT7475_TACH_COUNT; i++) {
1419 if (i == 3 && !data->has_fan4)
1420 continue;
702afead
TI		 1421 ret = adt7475_read_word(client, TACH_MIN_REG(i));
1422 if (ret < 0)
1423 return ret;
1424 data->tach[MIN][i] = ret;
5cf943ed
TI		 1425 }
1426
1427 for (i = 0; i < ADT7475_PWM_COUNT; i++) {
1428 if (i == 1 && !data->has_pwm2)
1429 continue;
702afead
TI		 1430 ret = adt7475_read(PWM_MAX_REG(i));
1431 if (ret < 0)
1432 return ret;
1433 data->pwm[MAX][i] = ret;
1434
1435 ret = adt7475_read(PWM_MIN_REG(i));
1436 if (ret < 0)
1437 return ret;
1438 data->pwm[MIN][i] = ret;
5cf943ed
TI		 1439 /* Set the channel and control information */
1440 adt7475_read_pwm(client, i);
1441 }
1442
702afead
TI		 1443 ret = adt7475_read(TEMP_TRANGE_REG(0));
1444 if (ret < 0)
1445 return ret;
1446 data->range[0] = ret;
1447
1448 ret = adt7475_read(TEMP_TRANGE_REG(1));
1449 if (ret < 0)
1450 return ret;
1451 data->range[1] = ret;
1452
1453 ret = adt7475_read(TEMP_TRANGE_REG(2));
1454 if (ret < 0)
1455 return ret;
1456 data->range[2] = ret;
1457
1458 return 0;
5cf943ed
TI		 1459}
1460
1c301fc5
JC		 1461static int adt7475_probe(struct i2c_client *client,
1462 const struct i2c_device_id *id)
1463{
4e2496e4 1464 enum chips chip;
99b8c83a 1465 static const char * const names[] = {
d07ca4ad
JD		 1466 [adt7473] = "ADT7473",
1467 [adt7475] = "ADT7475",
d8d2ee07 1468 [adt7476] = "ADT7476",
d07ca4ad
JD		 1469 [adt7490] = "ADT7490",
1470 };
1471
1c301fc5 1472 struct adt7475_data *data;
c64fce7f
GM		 1473 struct device *hwmon_dev;
1474 int i, ret = 0, revision, group_num = 0;
ebfaf1fb 1475 u8 config2, config3;
1c301fc5 1476
e3ecb2ee 1477 data = devm_kzalloc(&client->dev, sizeof(*data), GFP_KERNEL);
1c301fc5
JC		 1478 if (data == NULL)
1479 return -ENOMEM;
1480
1481 mutex_init(&data->lock);
c64fce7f 1482 data->client = client;
1c301fc5
JC		 1483 i2c_set_clientdata(client, data);
1484
4e2496e4
JMC		 1485 if (client->dev.of_node)
1486 chip = (enum chips)of_device_get_match_data(&client->dev);
1487 else
1488 chip = id->driver_data;
1489
cffb9dd0 1490 /* Initialize device-specific values */
4e2496e4 1491 switch (chip) {
d8d2ee07
JD		 1492 case adt7476:
1493 data->has_voltage = 0x0e; /* in1 to in3 */
1494 revision = adt7475_read(REG_DEVID2) & 0x07;
1495 break;
3d849981 1496 case adt7490:
378933c9
JD		 1497 data->has_voltage = 0x3e; /* in1 to in5 */
1498 revision = adt7475_read(REG_DEVID2) & 0x03;
d07ca4ad
JD		 1499 if (revision == 0x03)
1500 revision += adt7475_read(REG_DEVREV2);
3d849981 1501 break;
cffb9dd0
JD		 1502 default:
1503 data->has_voltage = 0x06; /* in1, in2 */
378933c9
JD		 1504 revision = adt7475_read(REG_DEVID2) & 0x07;
1505 }
1506
1507 config3 = adt7475_read(REG_CONFIG3);
1508 /* Pin PWM2 may alternatively be used for ALERT output */
1509 if (!(config3 & CONFIG3_SMBALERT))
1510 data->has_pwm2 = 1;
1511 /* Meaning of this bit is inverted for the ADT7473-1 */
1512 if (id->driver_data == adt7473 && revision >= 1)
1513 data->has_pwm2 = !data->has_pwm2;
1514
1515 data->config4 = adt7475_read(REG_CONFIG4);
1516 /* Pin TACH4 may alternatively be used for THERM */
1517 if ((data->config4 & CONFIG4_PINFUNC) == 0x0)
1518 data->has_fan4 = 1;
1519
9ed5bc24
GR		 1520 /*
1521 * THERM configuration is more complex on the ADT7476 and ADT7490,
1522 * because 2 different pins (TACH4 and +2.5 Vin) can be used for
1523 * this function
1524 */
378933c9
JD		 1525 if (id->driver_data == adt7490) {
1526 if ((data->config4 & CONFIG4_PINFUNC) == 0x1 &&
1527 !(config3 & CONFIG3_THERM))
1528 data->has_fan4 = 1;
d8d2ee07
JD		 1529 }
1530 if (id->driver_data == adt7476 || id->driver_data == adt7490) {
378933c9
JD		 1531 if (!(config3 & CONFIG3_THERM) ||
1532 (data->config4 & CONFIG4_PINFUNC) == 0x1)
1533 data->has_voltage |= (1 << 0); /* in0 */
cffb9dd0
JD		 1534 }
1535
9ed5bc24
GR		 1536 /*
1537 * On the ADT7476, the +12V input pin may instead be used as VID5,
1538 * and VID pins may alternatively be used as GPIO
1539 */
d8d2ee07
JD		 1540 if (id->driver_data == adt7476) {
1541 u8 vid = adt7475_read(REG_VID);
1542 if (!(vid & VID_VIDSEL))
1543 data->has_voltage |= (1 << 4); /* in4 */
54fe4671
JD		 1544
1545 data->has_vid = !(adt7475_read(REG_CONFIG5) & CONFIG5_VIDGPIO);
d8d2ee07
JD		 1546 }
1547
ebfaf1fb
JD		 1548 /* Voltage attenuators can be bypassed, globally or individually */
1549 config2 = adt7475_read(REG_CONFIG2);
1550 if (config2 & CONFIG2_ATTN) {
1551 data->bypass_attn = (0x3 << 3) | 0x3;
1552 } else {
1553 data->bypass_attn = ((data->config4 & CONFIG4_ATTN_IN10) >> 4) |
1554 ((data->config4 & CONFIG4_ATTN_IN43) >> 3);
1555 }
1556 data->bypass_attn &= data->has_voltage;
1557
9ed5bc24
GR		 1558 /*
1559 * Call adt7475_read_pwm for all pwm's as this will reprogram any
1560 * pwm's which are disabled to manual mode with 0% duty cycle
1561 */
1c301fc5
JC		 1562 for (i = 0; i < ADT7475_PWM_COUNT; i++)
1563 adt7475_read_pwm(client, i);
1564
4abdf38d
CP		 1565 /* Start monitoring */
1566 switch (chip) {
1567 case adt7475:
1568 case adt7476:
1569 i2c_smbus_write_byte_data(client, REG_CONFIG1,
1570 adt7475_read(REG_CONFIG1) | 0x01);
1571 break;
1572 default:
1573 break;
1574 }
1575
c64fce7f 1576 data->groups[group_num++] = &adt7475_attr_group;
1c301fc5 1577
378933c9
JD		 1578 /* Features that can be disabled individually */
1579 if (data->has_fan4) {
c64fce7f 1580 data->groups[group_num++] = &fan4_attr_group;
378933c9
JD		 1581 }
1582 if (data->has_pwm2) {
c64fce7f 1583 data->groups[group_num++] = &pwm2_attr_group;
378933c9
JD		 1584 }
1585 if (data->has_voltage & (1 << 0)) {
c64fce7f 1586 data->groups[group_num++] = &in0_attr_group;
378933c9 1587 }
d8d2ee07 1588 if (data->has_voltage & (1 << 3)) {
c64fce7f 1589 data->groups[group_num++] = &in3_attr_group;
d8d2ee07
JD		 1590 }
1591 if (data->has_voltage & (1 << 4)) {
c64fce7f 1592 data->groups[group_num++] = &in4_attr_group;
d8d2ee07
JD		 1593 }
1594 if (data->has_voltage & (1 << 5)) {
c64fce7f 1595 data->groups[group_num++] = &in5_attr_group;
d8d2ee07 1596 }
54fe4671
JD		 1597 if (data->has_vid) {
1598 data->vrm = vid_which_vrm();
c64fce7f 1599 data->groups[group_num] = &vid_attr_group;
54fe4671 1600 }
378933c9 1601
c64fce7f
GM		 1602 /* register device with all the acquired attributes */
1603 hwmon_dev = devm_hwmon_device_register_with_groups(&client->dev,
1604 client->name, data,
1605 data->groups);
1606
1607 if (IS_ERR(hwmon_dev)) {
1608 ret = PTR_ERR(hwmon_dev);
1609 return ret;
1c301fc5
JC		 1610 }
1611
d07ca4ad
JD		 1612 dev_info(&client->dev, "%s device, revision %d\n",
1613 names[id->driver_data], revision);
d8d2ee07 1614 if ((data->has_voltage & 0x11) || data->has_fan4 || data->has_pwm2)
54fe4671 1615 dev_info(&client->dev, "Optional features:%s%s%s%s%s\n",
d07ca4ad 1616 (data->has_voltage & (1 << 0)) ? " in0" : "",
d8d2ee07 1617 (data->has_voltage & (1 << 4)) ? " in4" : "",
d07ca4ad 1618 data->has_fan4 ? " fan4" : "",
54fe4671
JD		 1619 data->has_pwm2 ? " pwm2" : "",
1620 data->has_vid ? " vid" : "");
ebfaf1fb
JD		 1621 if (data->bypass_attn)
1622 dev_info(&client->dev, "Bypassing attenuators on:%s%s%s%s\n",
1623 (data->bypass_attn & (1 << 0)) ? " in0" : "",
1624 (data->bypass_attn & (1 << 1)) ? " in1" : "",
1625 (data->bypass_attn & (1 << 3)) ? " in3" : "",
1626 (data->bypass_attn & (1 << 4)) ? " in4" : "");
d07ca4ad 1627
5cf943ed 1628 /* Limits and settings, should never change update more than once */
4afec79f
TI		 1629 ret = adt7475_update_limits(client);
1630 if (ret)
c64fce7f 1631 return ret;
1c301fc5
JC		 1632
1633 return 0;
1634}
1635
1636static struct i2c_driver adt7475_driver = {
1637 .class = I2C_CLASS_HWMON,
1638 .driver = {
1639 .name = "adt7475",
4e2496e4 1640 .of_match_table = of_match_ptr(adt7475_of_match),
1c301fc5
JC		 1641 },
1642 .probe = adt7475_probe,
1c301fc5
JC		 1643 .id_table = adt7475_id,
1644 .detect = adt7475_detect,
c3813d6a 1645 .address_list = normal_i2c,
1c301fc5
JC		 1646};
1647
1648static void adt7475_read_hystersis(struct i2c_client *client)
1649{
1650 struct adt7475_data *data = i2c_get_clientdata(client);
1651
1652 data->temp[HYSTERSIS][0] = (u16) adt7475_read(REG_REMOTE1_HYSTERSIS);
1653 data->temp[HYSTERSIS][1] = data->temp[HYSTERSIS][0];
1654 data->temp[HYSTERSIS][2] = (u16) adt7475_read(REG_REMOTE2_HYSTERSIS);
1655}
1656
1657static void adt7475_read_pwm(struct i2c_client *client, int index)
1658{
1659 struct adt7475_data *data = i2c_get_clientdata(client);
1660 unsigned int v;
1661
1662 data->pwm[CONTROL][index] = adt7475_read(PWM_CONFIG_REG(index));
1663
9ed5bc24
GR		 1664 /*
1665 * Figure out the internal value for pwmctrl and pwmchan
1666 * based on the current settings
1667 */
1c301fc5
JC		 1668 v = (data->pwm[CONTROL][index] >> 5) & 7;
1669
1670 if (v == 3)
1671 data->pwmctl[index] = 0;
1672 else if (v == 7)
1673 data->pwmctl[index] = 1;
1674 else if (v == 4) {
9ed5bc24
GR		 1675 /*
1676 * The fan is disabled - we don't want to
1677 * support that, so change to manual mode and
1678 * set the duty cycle to 0 instead
1679 */
1c301fc5
JC		 1680 data->pwm[INPUT][index] = 0;
1681 data->pwm[CONTROL][index] &= ~0xE0;
1682 data->pwm[CONTROL][index] |= (7 << 5);
1683
1684 i2c_smbus_write_byte_data(client, PWM_CONFIG_REG(index),
1685 data->pwm[INPUT][index]);
1686
1687 i2c_smbus_write_byte_data(client, PWM_CONFIG_REG(index),
1688 data->pwm[CONTROL][index]);
1689
1690 data->pwmctl[index] = 1;
1691 } else {
1692 data->pwmctl[index] = 2;
1693
1694 switch (v) {
1695 case 0:
1696 data->pwmchan[index] = 1;
1697 break;
1698 case 1:
1699 data->pwmchan[index] = 2;
1700 break;
1701 case 2:
1702 data->pwmchan[index] = 4;
1703 break;
1704 case 5:
1705 data->pwmchan[index] = 6;
1706 break;
1707 case 6:
1708 data->pwmchan[index] = 7;
1709 break;
1710 }
1711 }
1712}
1713
702afead 1714static int adt7475_update_measure(struct device *dev)
1c301fc5 1715{
c64fce7f
GM		 1716 struct adt7475_data *data = dev_get_drvdata(dev);
1717 struct i2c_client *client = data->client;
3d849981 1718 u16 ext;
1c301fc5 1719 int i;
702afead
TI		 1720 int ret;
1721
1722 ret = adt7475_read(REG_STATUS2);
1723 if (ret < 0)
1724 return ret;
1725 data->alarms = ret << 8;
1c301fc5 1726
702afead
TI		 1727 ret = adt7475_read(REG_STATUS1);
1728 if (ret < 0)
1729 return ret;
1730 data->alarms |= ret;
1731
1732 ret = adt7475_read(REG_EXTEND2);
1733 if (ret < 0)
1734 return ret;
1735
1736 ext = (ret << 8);
1737
1738 ret = adt7475_read(REG_EXTEND1);
1739 if (ret < 0)
1740 return ret;
1741
1742 ext |= ret;
5cf943ed 1743
5cf943ed
TI		 1744 for (i = 0; i < ADT7475_VOLTAGE_COUNT; i++) {
1745 if (!(data->has_voltage & (1 << i)))
1746 continue;
702afead
TI		 1747 ret = adt7475_read(VOLTAGE_REG(i));
1748 if (ret < 0)
1749 return ret;
5cf943ed 1750 data->voltage[INPUT][i] =
702afead 1751 (ret << 2) |
5cf943ed
TI		 1752 ((ext >> (i * 2)) & 3);
1753 }
1c301fc5 1754
702afead
TI		 1755 for (i = 0; i < ADT7475_TEMP_COUNT; i++) {
1756 ret = adt7475_read(TEMP_REG(i));
1757 if (ret < 0)
1758 return ret;
5cf943ed 1759 data->temp[INPUT][i] =
702afead 1760 (ret << 2) |
5cf943ed 1761 ((ext >> ((i + 5) * 2)) & 3);
702afead 1762 }
54fe4671 1763
5cf943ed 1764 if (data->has_voltage & (1 << 5)) {
702afead
TI		 1765 ret = adt7475_read(REG_STATUS4);
1766 if (ret < 0)
1767 return ret;
1768 data->alarms |= ret << 24;
1769
1770 ret = adt7475_read(REG_EXTEND3);
1771 if (ret < 0)
1772 return ret;
1773 ext = ret;
1774
1775 ret = adt7475_read(REG_VTT);
1776 if (ret < 0)
1777 return ret;
1778 data->voltage[INPUT][5] = ret << 2 |
5cf943ed 1779 ((ext >> 4) & 3);
1c301fc5
JC		 1780 }
1781
5cf943ed
TI		 1782 for (i = 0; i < ADT7475_TACH_COUNT; i++) {
1783 if (i == 3 && !data->has_fan4)
1784 continue;
702afead
TI		 1785 ret = adt7475_read_word(client, TACH_REG(i));
1786 if (ret < 0)
1787 return ret;
1788 data->tach[INPUT][i] = ret;
5cf943ed 1789 }
3d849981 1790
5cf943ed
TI		 1791 /* Updated by hw when in auto mode */
1792 for (i = 0; i < ADT7475_PWM_COUNT; i++) {
1793 if (i == 1 && !data->has_pwm2)
1794 continue;
702afead
TI		 1795 ret = adt7475_read(PWM_REG(i));
1796 if (ret < 0)
1797 return ret;
1798 data->pwm[INPUT][i] = ret;
5cf943ed 1799 }
1c301fc5 1800
702afead
TI		 1801 if (data->has_vid) {
1802 ret = adt7475_read(REG_VID);
1803 if (ret < 0)
1804 return ret;
1805 data->vid = ret & 0x3f;
1806 }
1807
1808 return 0;
5cf943ed 1809}
1c301fc5 1810
5cf943ed
TI		 1811static struct adt7475_data *adt7475_update_device(struct device *dev)
1812{
c64fce7f 1813 struct adt7475_data *data = dev_get_drvdata(dev);
4afec79f 1814 int ret;
1c301fc5 1815
5cf943ed 1816 mutex_lock(&data->lock);
1c301fc5 1817
5cf943ed
TI		 1818 /* Measurement values update every 2 seconds */
1819 if (time_after(jiffies, data->measure_updated + HZ * 2) ||
1820 !data->valid) {
4afec79f
TI		 1821 ret = adt7475_update_measure(dev);
1822 if (ret) {
1823 data->valid = false;
1824 mutex_unlock(&data->lock);
1825 return ERR_PTR(ret);
1826 }
5cf943ed 1827 data->measure_updated = jiffies;
b36fb171 1828 data->valid = true;
1c301fc5
JC		 1829 }
1830
1831 mutex_unlock(&data->lock);
1832
1833 return data;
1834}
1835
f0967eea 1836module_i2c_driver(adt7475_driver);
1c301fc5
JC		 1837
1838MODULE_AUTHOR("Advanced Micro Devices, Inc");
1839MODULE_DESCRIPTION("adt7475 driver");
1840MODULE_LICENSE("GPL");
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