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Merge tag 'hwlock-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/andersson...
[mirror_ubuntu-jammy-kernel.git] / drivers / hwmon / adt7475.c
CommitLineData
d2912cb1 1// SPDX-License-Identifier: GPL-2.0-only
1c301fc5
JC		 2/*
3 * adt7475 - Thermal sensor driver for the ADT7475 chip and derivatives
4 * Copyright (C) 2007-2008, Advanced Micro Devices, Inc.
5 * Copyright (C) 2008 Jordan Crouse <jordan@cosmicpenguin.net>
6 * Copyright (C) 2008 Hans de Goede <hdegoede@redhat.com>
7c81c60f 7 * Copyright (C) 2009 Jean Delvare <jdelvare@suse.de>
3d849981 8 *
1c301fc5 9 * Derived from the lm83 driver by Jean Delvare
1c301fc5
JC		 10 */
11
12#include <linux/module.h>
4e2496e4 13#include <linux/of_device.h>
1c301fc5
JC		 14#include <linux/init.h>
15#include <linux/slab.h>
16#include <linux/i2c.h>
17#include <linux/hwmon.h>
18#include <linux/hwmon-sysfs.h>
54fe4671 19#include <linux/hwmon-vid.h>
1c301fc5 20#include <linux/err.h>
dcd8f392 21#include <linux/jiffies.h>
2ecff397 22#include <linux/of.h>
e4651640 23#include <linux/util_macros.h>
1c301fc5
JC		 24
25/* Indexes for the sysfs hooks */
26
27#define INPUT 0
28#define MIN 1
29#define MAX 2
30#define CONTROL 3
31#define OFFSET 3
32#define AUTOMIN 4
33#define THERM 5
34#define HYSTERSIS 6
35
9ed5bc24
GR		 36/*
37 * These are unique identifiers for the sysfs functions - unlike the
38 * numbers above, these are not also indexes into an array
39 */
1c301fc5
JC		 40
41#define ALARM 9
42#define FAULT 10
43
44/* 7475 Common Registers */
45
d07ca4ad
JD		 46#define REG_DEVREV2 0x12 /* ADT7490 only */
47
3d849981
JD		 48#define REG_VTT 0x1E /* ADT7490 only */
49#define REG_EXTEND3 0x1F /* ADT7490 only */
50
cffb9dd0 51#define REG_VOLTAGE_BASE 0x20
1c301fc5
JC		 52#define REG_TEMP_BASE 0x25
53#define REG_TACH_BASE 0x28
54#define REG_PWM_BASE 0x30
55#define REG_PWM_MAX_BASE 0x38
56
57#define REG_DEVID 0x3D
58#define REG_VENDID 0x3E
d656b6fd 59#define REG_DEVID2 0x3F
1c301fc5 60
4abdf38d
CP		 61#define REG_CONFIG1 0x40
62
1c301fc5
JC		 63#define REG_STATUS1 0x41
64#define REG_STATUS2 0x42
65
d8d2ee07
JD		 66#define REG_VID 0x43 /* ADT7476 only */
67
cffb9dd0
JD		 68#define REG_VOLTAGE_MIN_BASE 0x44
69#define REG_VOLTAGE_MAX_BASE 0x45
1c301fc5
JC		 70
71#define REG_TEMP_MIN_BASE 0x4E
72#define REG_TEMP_MAX_BASE 0x4F
73
74#define REG_TACH_MIN_BASE 0x54
75
76#define REG_PWM_CONFIG_BASE 0x5C
77
78#define REG_TEMP_TRANGE_BASE 0x5F
79
1d58f5ef
CP		 80#define REG_ENHANCE_ACOUSTICS1 0x62
81#define REG_ENHANCE_ACOUSTICS2 0x63
82
1c301fc5
JC		 83#define REG_PWM_MIN_BASE 0x64
84
85#define REG_TEMP_TMIN_BASE 0x67
86#define REG_TEMP_THERM_BASE 0x6A
87
88#define REG_REMOTE1_HYSTERSIS 0x6D
89#define REG_REMOTE2_HYSTERSIS 0x6E
90
91#define REG_TEMP_OFFSET_BASE 0x70
92
ebfaf1fb
JD		 93#define REG_CONFIG2 0x73
94
1c301fc5
JC		 95#define REG_EXTEND1 0x76
96#define REG_EXTEND2 0x77
378933c9
JD		 97
98#define REG_CONFIG3 0x78
1c301fc5 99#define REG_CONFIG5 0x7C
f99318b2
JD		 100#define REG_CONFIG4 0x7D
101
3d849981
JD		 102#define REG_STATUS4 0x81 /* ADT7490 only */
103
104#define REG_VTT_MIN 0x84 /* ADT7490 only */
105#define REG_VTT_MAX 0x86 /* ADT7490 only */
106
d8d2ee07
JD		 107#define VID_VIDSEL 0x80 /* ADT7476 only */
108
ebfaf1fb
JD		 109#define CONFIG2_ATTN 0x20
110
378933c9
JD		 111#define CONFIG3_SMBALERT 0x01
112#define CONFIG3_THERM 0x02
113
114#define CONFIG4_PINFUNC 0x03
f99318b2 115#define CONFIG4_MAXDUTY 0x08
ebfaf1fb
JD		 116#define CONFIG4_ATTN_IN10 0x30
117#define CONFIG4_ATTN_IN43 0xC0
1c301fc5
JC		 118
119#define CONFIG5_TWOSCOMP 0x01
120#define CONFIG5_TEMPOFFSET 0x02
54fe4671 121#define CONFIG5_VIDGPIO 0x10 /* ADT7476 only */
1c301fc5
JC		 122
123/* ADT7475 Settings */
124
cffb9dd0 125#define ADT7475_VOLTAGE_COUNT 5 /* Not counting Vtt */
1c301fc5
JC		 126#define ADT7475_TEMP_COUNT 3
127#define ADT7475_TACH_COUNT 4
128#define ADT7475_PWM_COUNT 3
129
130/* Macro to read the registers */
131
132#define adt7475_read(reg) i2c_smbus_read_byte_data(client, (reg))
133
134/* Macros to easily index the registers */
135
136#define TACH_REG(idx) (REG_TACH_BASE + ((idx) * 2))
137#define TACH_MIN_REG(idx) (REG_TACH_MIN_BASE + ((idx) * 2))
138
139#define PWM_REG(idx) (REG_PWM_BASE + (idx))
140#define PWM_MAX_REG(idx) (REG_PWM_MAX_BASE + (idx))
141#define PWM_MIN_REG(idx) (REG_PWM_MIN_BASE + (idx))
142#define PWM_CONFIG_REG(idx) (REG_PWM_CONFIG_BASE + (idx))
143
144#define VOLTAGE_REG(idx) (REG_VOLTAGE_BASE + (idx))
145#define VOLTAGE_MIN_REG(idx) (REG_VOLTAGE_MIN_BASE + ((idx) * 2))
146#define VOLTAGE_MAX_REG(idx) (REG_VOLTAGE_MAX_BASE + ((idx) * 2))
147
148#define TEMP_REG(idx) (REG_TEMP_BASE + (idx))
149#define TEMP_MIN_REG(idx) (REG_TEMP_MIN_BASE + ((idx) * 2))
150#define TEMP_MAX_REG(idx) (REG_TEMP_MAX_BASE + ((idx) * 2))
151#define TEMP_TMIN_REG(idx) (REG_TEMP_TMIN_BASE + (idx))
152#define TEMP_THERM_REG(idx) (REG_TEMP_THERM_BASE + (idx))
153#define TEMP_OFFSET_REG(idx) (REG_TEMP_OFFSET_BASE + (idx))
154#define TEMP_TRANGE_REG(idx) (REG_TEMP_TRANGE_BASE + (idx))
155
918ee91c 156static const unsigned short normal_i2c[] = { 0x2c, 0x2d, 0x2e, I2C_CLIENT_END };
1c301fc5 157
e5e9f44c 158enum chips { adt7473, adt7475, adt7476, adt7490 };
1c301fc5
JC		 159
160static const struct i2c_device_id adt7475_id[] = {
b180d050 161 { "adt7473", adt7473 },
1c301fc5 162 { "adt7475", adt7475 },
d8d2ee07 163 { "adt7476", adt7476 },
3d849981 164 { "adt7490", adt7490 },
1c301fc5
JC		 165 { }
166};
167MODULE_DEVICE_TABLE(i2c, adt7475_id);
168
fe339dbf 169static const struct of_device_id __maybe_unused adt7475_of_match[] = {
4e2496e4
JMC		 170 {
171 .compatible = "adi,adt7473",
172 .data = (void *)adt7473
173 },
174 {
175 .compatible = "adi,adt7475",
176 .data = (void *)adt7475
177 },
178 {
179 .compatible = "adi,adt7476",
180 .data = (void *)adt7476
181 },
182 {
183 .compatible = "adi,adt7490",
184 .data = (void *)adt7490
185 },
186 { },
187};
188MODULE_DEVICE_TABLE(of, adt7475_of_match);
189
1c301fc5 190struct adt7475_data {
c64fce7f 191 struct i2c_client *client;
1c301fc5
JC		 192 struct mutex lock;
193
194 unsigned long measure_updated;
b36fb171 195 bool valid;
1c301fc5 196
2ecff397 197 u8 config2;
f99318b2 198 u8 config4;
1c301fc5 199 u8 config5;
cffb9dd0 200 u8 has_voltage;
ebfaf1fb 201 u8 bypass_attn; /* Bypass voltage attenuator */
378933c9
JD		 202 u8 has_pwm2:1;
203 u8 has_fan4:1;
54fe4671 204 u8 has_vid:1;
3d849981 205 u32 alarms;
cffb9dd0 206 u16 voltage[3][6];
1c301fc5
JC		 207 u16 temp[7][3];
208 u16 tach[2][4];
209 u8 pwm[4][3];
210 u8 range[3];
211 u8 pwmctl[3];
212 u8 pwmchan[3];
1d58f5ef 213 u8 enh_acoustics[2];
54fe4671
JD		 214
215 u8 vid;
216 u8 vrm;
c64fce7f 217 const struct attribute_group *groups[9];
1c301fc5
JC		 218};
219
220static struct i2c_driver adt7475_driver;
221static struct adt7475_data *adt7475_update_device(struct device *dev);
222static void adt7475_read_hystersis(struct i2c_client *client);
223static void adt7475_read_pwm(struct i2c_client *client, int index);
224
225/* Given a temp value, convert it to register value */
226
227static inline u16 temp2reg(struct adt7475_data *data, long val)
228{
229 u16 ret;
230
231 if (!(data->config5 & CONFIG5_TWOSCOMP)) {
2a844c14 232 val = clamp_val(val, -64000, 191000);
1c301fc5
JC		 233 ret = (val + 64500) / 1000;
234 } else {
2a844c14 235 val = clamp_val(val, -128000, 127000);
1c301fc5
JC		 236 if (val < -500)
237 ret = (256500 + val) / 1000;
238 else
239 ret = (val + 500) / 1000;
240 }
241
242 return ret << 2;
243}
244
245/* Given a register value, convert it to a real temp value */
246
247static inline int reg2temp(struct adt7475_data *data, u16 reg)
248{
249 if (data->config5 & CONFIG5_TWOSCOMP) {
250 if (reg >= 512)
251 return (reg - 1024) * 250;
252 else
253 return reg * 250;
254 } else
255 return (reg - 256) * 250;
256}
257
258static inline int tach2rpm(u16 tach)
259{
260 if (tach == 0 || tach == 0xFFFF)
261 return 0;
262
263 return (90000 * 60) / tach;
264}
265
266static inline u16 rpm2tach(unsigned long rpm)
267{
268 if (rpm == 0)
269 return 0;
270
2a844c14 271 return clamp_val((90000 * 60) / rpm, 1, 0xFFFF);
1c301fc5
JC		 272}
273
cffb9dd0
JD		 274/* Scaling factors for voltage inputs, taken from the ADT7490 datasheet */
275static const int adt7473_in_scaling[ADT7475_VOLTAGE_COUNT + 1][2] = {
276 { 45, 94 }, /* +2.5V */
277 { 175, 525 }, /* Vccp */
278 { 68, 71 }, /* Vcc */
279 { 93, 47 }, /* +5V */
280 { 120, 20 }, /* +12V */
281 { 45, 45 }, /* Vtt */
282};
1c301fc5 283
ebfaf1fb 284static inline int reg2volt(int channel, u16 reg, u8 bypass_attn)
1c301fc5 285{
cffb9dd0 286 const int *r = adt7473_in_scaling[channel];
1c301fc5 287
ebfaf1fb
JD		 288 if (bypass_attn & (1 << channel))
289 return DIV_ROUND_CLOSEST(reg * 2250, 1024);
cffb9dd0 290 return DIV_ROUND_CLOSEST(reg * (r[0] + r[1]) * 2250, r[1] * 1024);
1c301fc5
JC		 291}
292
ebfaf1fb 293static inline u16 volt2reg(int channel, long volt, u8 bypass_attn)
1c301fc5 294{
cffb9dd0
JD		 295 const int *r = adt7473_in_scaling[channel];
296 long reg;
297
ebfaf1fb 298 if (bypass_attn & (1 << channel))
cf3ca187 299 reg = DIV_ROUND_CLOSEST(volt * 1024, 2250);
ebfaf1fb 300 else
cf3ca187
LP		 301 reg = DIV_ROUND_CLOSEST(volt * r[1] * 1024,
302 (r[0] + r[1]) * 2250);
2a844c14 303 return clamp_val(reg, 0, 1023) & (0xff << 2);
1c301fc5
JC		 304}
305
f196dec6 306static int adt7475_read_word(struct i2c_client *client, int reg)
1c301fc5 307{
f196dec6 308 int val1, val2;
1c301fc5 309
f196dec6
DC		 310 val1 = i2c_smbus_read_byte_data(client, reg);
311 if (val1 < 0)
312 return val1;
313 val2 = i2c_smbus_read_byte_data(client, reg + 1);
314 if (val2 < 0)
315 return val2;
1c301fc5 316
f196dec6 317 return val1 | (val2 << 8);
1c301fc5
JC		 318}
319
320static void adt7475_write_word(struct i2c_client *client, int reg, u16 val)
321{
322 i2c_smbus_write_byte_data(client, reg + 1, val >> 8);
323 i2c_smbus_write_byte_data(client, reg, val & 0xFF);
324}
325
c24f9ba9 326static ssize_t voltage_show(struct device *dev, struct device_attribute *attr,
1c301fc5
JC		 327 char *buf)
328{
329 struct adt7475_data *data = adt7475_update_device(dev);
330 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
331 unsigned short val;
332
4afec79f
TI		 333 if (IS_ERR(data))
334 return PTR_ERR(data);
335
1c301fc5
JC		 336 switch (sattr->nr) {
337 case ALARM:
338 return sprintf(buf, "%d\n",
cffb9dd0 339 (data->alarms >> sattr->index) & 1);
1c301fc5
JC		 340 default:
341 val = data->voltage[sattr->nr][sattr->index];
ebfaf1fb
JD		 342 return sprintf(buf, "%d\n",
343 reg2volt(sattr->index, val, data->bypass_attn));
1c301fc5
JC		 344 }
345}
346
c24f9ba9
GR		 347static ssize_t voltage_store(struct device *dev,
348 struct device_attribute *attr, const char *buf,
349 size_t count)
1c301fc5
JC		 350{
351
352 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
c64fce7f
GM		 353 struct adt7475_data *data = dev_get_drvdata(dev);
354 struct i2c_client *client = data->client;
1c301fc5
JC		 355 unsigned char reg;
356 long val;
357
179c4fdb 358 if (kstrtol(buf, 10, &val))
1c301fc5
JC		 359 return -EINVAL;
360
361 mutex_lock(&data->lock);
362
ebfaf1fb
JD		 363 data->voltage[sattr->nr][sattr->index] =
364 volt2reg(sattr->index, val, data->bypass_attn);
1c301fc5 365
3d849981
JD		 366 if (sattr->index < ADT7475_VOLTAGE_COUNT) {
367 if (sattr->nr == MIN)
368 reg = VOLTAGE_MIN_REG(sattr->index);
369 else
370 reg = VOLTAGE_MAX_REG(sattr->index);
371 } else {
372 if (sattr->nr == MIN)
373 reg = REG_VTT_MIN;
374 else
375 reg = REG_VTT_MAX;
376 }
1c301fc5
JC		 377
378 i2c_smbus_write_byte_data(client, reg,
379 data->voltage[sattr->nr][sattr->index] >> 2);
380 mutex_unlock(&data->lock);
381
382 return count;
383}
384
c24f9ba9 385static ssize_t temp_show(struct device *dev, struct device_attribute *attr,
1c301fc5
JC		 386 char *buf)
387{
388 struct adt7475_data *data = adt7475_update_device(dev);
389 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
390 int out;
391
4afec79f
TI		 392 if (IS_ERR(data))
393 return PTR_ERR(data);
394
1c301fc5
JC		 395 switch (sattr->nr) {
396 case HYSTERSIS:
397 mutex_lock(&data->lock);
398 out = data->temp[sattr->nr][sattr->index];
399 if (sattr->index != 1)
400 out = (out >> 4) & 0xF;
401 else
402 out = (out & 0xF);
9ed5bc24
GR		 403 /*
404 * Show the value as an absolute number tied to
405 * THERM
406 */
1c301fc5
JC		 407 out = reg2temp(data, data->temp[THERM][sattr->index]) -
408 out * 1000;
409 mutex_unlock(&data->lock);
410 break;
411
412 case OFFSET:
9ed5bc24
GR		 413 /*
414 * Offset is always 2's complement, regardless of the
415 * setting in CONFIG5
416 */
1c301fc5
JC		 417 mutex_lock(&data->lock);
418 out = (s8)data->temp[sattr->nr][sattr->index];
419 if (data->config5 & CONFIG5_TEMPOFFSET)
420 out *= 1000;
421 else
422 out *= 500;
423 mutex_unlock(&data->lock);
424 break;
425
426 case ALARM:
427 out = (data->alarms >> (sattr->index + 4)) & 1;
428 break;
429
430 case FAULT:
431 /* Note - only for remote1 and remote2 */
cf312e07 432 out = !!(data->alarms & (sattr->index ? 0x8000 : 0x4000));
1c301fc5
JC		 433 break;
434
435 default:
436 /* All other temp values are in the configured format */
437 out = reg2temp(data, data->temp[sattr->nr][sattr->index]);
438 }
439
440 return sprintf(buf, "%d\n", out);
441}
442
c24f9ba9
GR		 443static ssize_t temp_store(struct device *dev, struct device_attribute *attr,
444 const char *buf, size_t count)
1c301fc5
JC		 445{
446 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
c64fce7f
GM		 447 struct adt7475_data *data = dev_get_drvdata(dev);
448 struct i2c_client *client = data->client;
1c301fc5
JC		 449 unsigned char reg = 0;
450 u8 out;
451 int temp;
452 long val;
453
179c4fdb 454 if (kstrtol(buf, 10, &val))
1c301fc5
JC		 455 return -EINVAL;
456
457 mutex_lock(&data->lock);
458
459 /* We need the config register in all cases for temp <-> reg conv. */
460 data->config5 = adt7475_read(REG_CONFIG5);
461
462 switch (sattr->nr) {
463 case OFFSET:
464 if (data->config5 & CONFIG5_TEMPOFFSET) {
2a844c14 465 val = clamp_val(val, -63000, 127000);
1c301fc5
JC		 466 out = data->temp[OFFSET][sattr->index] = val / 1000;
467 } else {
2a844c14 468 val = clamp_val(val, -63000, 64000);
1c301fc5
JC		 469 out = data->temp[OFFSET][sattr->index] = val / 500;
470 }
471 break;
472
473 case HYSTERSIS:
9ed5bc24
GR		 474 /*
475 * The value will be given as an absolute value, turn it
476 * into an offset based on THERM
477 */
1c301fc5
JC		 478
479 /* Read fresh THERM and HYSTERSIS values from the chip */
480 data->temp[THERM][sattr->index] =
481 adt7475_read(TEMP_THERM_REG(sattr->index)) << 2;
482 adt7475_read_hystersis(client);
483
484 temp = reg2temp(data, data->temp[THERM][sattr->index]);
2a844c14 485 val = clamp_val(val, temp - 15000, temp);
1c301fc5
JC		 486 val = (temp - val) / 1000;
487
488 if (sattr->index != 1) {
489 data->temp[HYSTERSIS][sattr->index] &= 0xF0;
490 data->temp[HYSTERSIS][sattr->index] |= (val & 0xF) << 4;
491 } else {
492 data->temp[HYSTERSIS][sattr->index] &= 0x0F;
493 data->temp[HYSTERSIS][sattr->index] |= (val & 0xF);
494 }
495
496 out = data->temp[HYSTERSIS][sattr->index];
497 break;
498
499 default:
500 data->temp[sattr->nr][sattr->index] = temp2reg(data, val);
501
9ed5bc24
GR		 502 /*
503 * We maintain an extra 2 digits of precision for simplicity
504 * - shift those back off before writing the value
505 */
1c301fc5
JC		 506 out = (u8) (data->temp[sattr->nr][sattr->index] >> 2);
507 }
508
509 switch (sattr->nr) {
510 case MIN:
511 reg = TEMP_MIN_REG(sattr->index);
512 break;
513 case MAX:
514 reg = TEMP_MAX_REG(sattr->index);
515 break;
516 case OFFSET:
517 reg = TEMP_OFFSET_REG(sattr->index);
518 break;
519 case AUTOMIN:
520 reg = TEMP_TMIN_REG(sattr->index);
521 break;
522 case THERM:
523 reg = TEMP_THERM_REG(sattr->index);
524 break;
525 case HYSTERSIS:
526 if (sattr->index != 2)
527 reg = REG_REMOTE1_HYSTERSIS;
528 else
529 reg = REG_REMOTE2_HYSTERSIS;
530
531 break;
532 }
533
534 i2c_smbus_write_byte_data(client, reg, out);
535
536 mutex_unlock(&data->lock);
537 return count;
538}
539
8f05bcc3
CP		 540/* Assuming CONFIG6[SLOW] is 0 */
541static const int ad7475_st_map[] = {
542 37500, 18800, 12500, 7500, 4700, 3100, 1600, 800,
543};
544
c24f9ba9
GR		 545static ssize_t temp_st_show(struct device *dev, struct device_attribute *attr,
546 char *buf)
8f05bcc3
CP		 547{
548 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
c64fce7f 549 struct adt7475_data *data = dev_get_drvdata(dev);
8f05bcc3
CP		 550 long val;
551
552 switch (sattr->index) {
553 case 0:
554 val = data->enh_acoustics[0] & 0xf;
555 break;
556 case 1:
557 val = (data->enh_acoustics[1] >> 4) & 0xf;
558 break;
559 case 2:
560 default:
561 val = data->enh_acoustics[1] & 0xf;
562 break;
563 }
564
565 if (val & 0x8)
566 return sprintf(buf, "%d\n", ad7475_st_map[val & 0x7]);
567 else
568 return sprintf(buf, "0\n");
569}
570
c24f9ba9
GR		 571static ssize_t temp_st_store(struct device *dev,
572 struct device_attribute *attr, const char *buf,
573 size_t count)
8f05bcc3
CP		 574{
575 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
c64fce7f
GM		 576 struct adt7475_data *data = dev_get_drvdata(dev);
577 struct i2c_client *client = data->client;
8f05bcc3
CP		 578 unsigned char reg;
579 int shift, idx;
580 ulong val;
581
582 if (kstrtoul(buf, 10, &val))
583 return -EINVAL;
584
585 switch (sattr->index) {
586 case 0:
587 reg = REG_ENHANCE_ACOUSTICS1;
588 shift = 0;
589 idx = 0;
590 break;
591 case 1:
592 reg = REG_ENHANCE_ACOUSTICS2;
593 shift = 0;
594 idx = 1;
595 break;
596 case 2:
597 default:
598 reg = REG_ENHANCE_ACOUSTICS2;
599 shift = 4;
600 idx = 1;
601 break;
602 }
603
604 if (val > 0) {
605 val = find_closest_descending(val, ad7475_st_map,
606 ARRAY_SIZE(ad7475_st_map));
607 val |= 0x8;
608 }
609
610 mutex_lock(&data->lock);
611
612 data->enh_acoustics[idx] &= ~(0xf << shift);
613 data->enh_acoustics[idx] |= (val << shift);
614
615 i2c_smbus_write_byte_data(client, reg, data->enh_acoustics[idx]);
616
617 mutex_unlock(&data->lock);
618
619 return count;
620}
621
9ed5bc24
GR		 622/*
623 * Table of autorange values - the user will write the value in millidegrees,
624 * and we'll convert it
625 */
1c301fc5
JC		 626static const int autorange_table[] = {
627 2000, 2500, 3330, 4000, 5000, 6670, 8000,
628 10000, 13330, 16000, 20000, 26670, 32000, 40000,
629 53330, 80000
630};
631
c24f9ba9 632static ssize_t point2_show(struct device *dev, struct device_attribute *attr,
1c301fc5
JC		 633 char *buf)
634{
635 struct adt7475_data *data = adt7475_update_device(dev);
636 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
637 int out, val;
638
4afec79f
TI		 639 if (IS_ERR(data))
640 return PTR_ERR(data);
641
1c301fc5
JC		 642 mutex_lock(&data->lock);
643 out = (data->range[sattr->index] >> 4) & 0x0F;
644 val = reg2temp(data, data->temp[AUTOMIN][sattr->index]);
645 mutex_unlock(&data->lock);
646
647 return sprintf(buf, "%d\n", val + autorange_table[out]);
648}
649
c24f9ba9
GR		 650static ssize_t point2_store(struct device *dev, struct device_attribute *attr,
651 const char *buf, size_t count)
1c301fc5 652{
c64fce7f
GM		 653 struct adt7475_data *data = dev_get_drvdata(dev);
654 struct i2c_client *client = data->client;
1c301fc5
JC		 655 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
656 int temp;
657 long val;
658
179c4fdb 659 if (kstrtol(buf, 10, &val))
1c301fc5
JC		 660 return -EINVAL;
661
662 mutex_lock(&data->lock);
663
664 /* Get a fresh copy of the needed registers */
665 data->config5 = adt7475_read(REG_CONFIG5);
666 data->temp[AUTOMIN][sattr->index] =
667 adt7475_read(TEMP_TMIN_REG(sattr->index)) << 2;
668 data->range[sattr->index] =
669 adt7475_read(TEMP_TRANGE_REG(sattr->index));
670
9ed5bc24
GR		 671 /*
672 * The user will write an absolute value, so subtract the start point
673 * to figure the range
674 */
1c301fc5 675 temp = reg2temp(data, data->temp[AUTOMIN][sattr->index]);
2a844c14 676 val = clamp_val(val, temp + autorange_table[0],
1c301fc5
JC		 677 temp + autorange_table[ARRAY_SIZE(autorange_table) - 1]);
678 val -= temp;
679
680 /* Find the nearest table entry to what the user wrote */
e4651640 681 val = find_closest(val, autorange_table, ARRAY_SIZE(autorange_table));
1c301fc5
JC		 682
683 data->range[sattr->index] &= ~0xF0;
684 data->range[sattr->index] |= val << 4;
685
686 i2c_smbus_write_byte_data(client, TEMP_TRANGE_REG(sattr->index),
687 data->range[sattr->index]);
688
689 mutex_unlock(&data->lock);
690 return count;
691}
692
c24f9ba9 693static ssize_t tach_show(struct device *dev, struct device_attribute *attr,
1c301fc5
JC		 694 char *buf)
695{
696 struct adt7475_data *data = adt7475_update_device(dev);
697 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
698 int out;
699
4afec79f
TI		 700 if (IS_ERR(data))
701 return PTR_ERR(data);
702
1c301fc5
JC		 703 if (sattr->nr == ALARM)
704 out = (data->alarms >> (sattr->index + 10)) & 1;
705 else
706 out = tach2rpm(data->tach[sattr->nr][sattr->index]);
707
708 return sprintf(buf, "%d\n", out);
709}
710
c24f9ba9
GR		 711static ssize_t tach_store(struct device *dev, struct device_attribute *attr,
712 const char *buf, size_t count)
1c301fc5
JC		 713{
714
715 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
c64fce7f
GM		 716 struct adt7475_data *data = dev_get_drvdata(dev);
717 struct i2c_client *client = data->client;
1c301fc5
JC		 718 unsigned long val;
719
179c4fdb 720 if (kstrtoul(buf, 10, &val))
1c301fc5
JC		 721 return -EINVAL;
722
723 mutex_lock(&data->lock);
724
725 data->tach[MIN][sattr->index] = rpm2tach(val);
726
727 adt7475_write_word(client, TACH_MIN_REG(sattr->index),
728 data->tach[MIN][sattr->index]);
729
730 mutex_unlock(&data->lock);
731 return count;
732}
733
c24f9ba9 734static ssize_t pwm_show(struct device *dev, struct device_attribute *attr,
1c301fc5
JC		 735 char *buf)
736{
737 struct adt7475_data *data = adt7475_update_device(dev);
738 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
739
4afec79f
TI		 740 if (IS_ERR(data))
741 return PTR_ERR(data);
742
1c301fc5
JC		 743 return sprintf(buf, "%d\n", data->pwm[sattr->nr][sattr->index]);
744}
745
c24f9ba9 746static ssize_t pwmchan_show(struct device *dev, struct device_attribute *attr,
1c301fc5
JC		 747 char *buf)
748{
749 struct adt7475_data *data = adt7475_update_device(dev);
750 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
751
4afec79f
TI		 752 if (IS_ERR(data))
753 return PTR_ERR(data);
754
1c301fc5
JC		 755 return sprintf(buf, "%d\n", data->pwmchan[sattr->index]);
756}
757
c24f9ba9 758static ssize_t pwmctrl_show(struct device *dev, struct device_attribute *attr,
1c301fc5
JC		 759 char *buf)
760{
761 struct adt7475_data *data = adt7475_update_device(dev);
762 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
763
4afec79f
TI		 764 if (IS_ERR(data))
765 return PTR_ERR(data);
766
1c301fc5
JC		 767 return sprintf(buf, "%d\n", data->pwmctl[sattr->index]);
768}
769
c24f9ba9
GR		 770static ssize_t pwm_store(struct device *dev, struct device_attribute *attr,
771 const char *buf, size_t count)
1c301fc5
JC		 772{
773
774 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
c64fce7f
GM		 775 struct adt7475_data *data = dev_get_drvdata(dev);
776 struct i2c_client *client = data->client;
1c301fc5
JC		 777 unsigned char reg = 0;
778 long val;
779
179c4fdb 780 if (kstrtol(buf, 10, &val))
1c301fc5
JC		 781 return -EINVAL;
782
783 mutex_lock(&data->lock);
784
785 switch (sattr->nr) {
786 case INPUT:
787 /* Get a fresh value for CONTROL */
788 data->pwm[CONTROL][sattr->index] =
789 adt7475_read(PWM_CONFIG_REG(sattr->index));
790
9ed5bc24
GR		 791 /*
792 * If we are not in manual mode, then we shouldn't allow
793 * the user to set the pwm speed
794 */
1c301fc5
JC		 795 if (((data->pwm[CONTROL][sattr->index] >> 5) & 7) != 7) {
796 mutex_unlock(&data->lock);
797 return count;
798 }
799
800 reg = PWM_REG(sattr->index);
801 break;
802
803 case MIN:
804 reg = PWM_MIN_REG(sattr->index);
805 break;
806
807 case MAX:
808 reg = PWM_MAX_REG(sattr->index);
809 break;
810 }
811
2a844c14 812 data->pwm[sattr->nr][sattr->index] = clamp_val(val, 0, 0xFF);
1c301fc5
JC		 813 i2c_smbus_write_byte_data(client, reg,
814 data->pwm[sattr->nr][sattr->index]);
1d58f5ef
CP		 815 mutex_unlock(&data->lock);
816
817 return count;
818}
819
c24f9ba9 820static ssize_t stall_disable_show(struct device *dev,
1d58f5ef
CP		 821 struct device_attribute *attr, char *buf)
822{
823 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
c64fce7f
GM		 824 struct adt7475_data *data = dev_get_drvdata(dev);
825
1d58f5ef
CP		 826 u8 mask = BIT(5 + sattr->index);
827
828 return sprintf(buf, "%d\n", !!(data->enh_acoustics[0] & mask));
829}
830
c24f9ba9
GR		 831static ssize_t stall_disable_store(struct device *dev,
832 struct device_attribute *attr,
833 const char *buf, size_t count)
1d58f5ef
CP		 834{
835 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
c64fce7f
GM		 836 struct adt7475_data *data = dev_get_drvdata(dev);
837 struct i2c_client *client = data->client;
1d58f5ef
CP		 838 long val;
839 u8 mask = BIT(5 + sattr->index);
840
841 if (kstrtol(buf, 10, &val))
842 return -EINVAL;
843
844 mutex_lock(&data->lock);
845
846 data->enh_acoustics[0] &= ~mask;
847 if (val)
848 data->enh_acoustics[0] |= mask;
849
850 i2c_smbus_write_byte_data(client, REG_ENHANCE_ACOUSTICS1,
851 data->enh_acoustics[0]);
1c301fc5
JC		 852
853 mutex_unlock(&data->lock);
854
855 return count;
856}
857
858/* Called by set_pwmctrl and set_pwmchan */
859
860static int hw_set_pwm(struct i2c_client *client, int index,
861 unsigned int pwmctl, unsigned int pwmchan)
862{
863 struct adt7475_data *data = i2c_get_clientdata(client);
864 long val = 0;
865
866 switch (pwmctl) {
867 case 0:
868 val = 0x03; /* Run at full speed */
869 break;
870 case 1:
871 val = 0x07; /* Manual mode */
872 break;
873 case 2:
874 switch (pwmchan) {
875 case 1:
876 /* Remote1 controls PWM */
877 val = 0x00;
878 break;
879 case 2:
880 /* local controls PWM */
881 val = 0x01;
882 break;
883 case 4:
884 /* remote2 controls PWM */
885 val = 0x02;
886 break;
887 case 6:
888 /* local/remote2 control PWM */
889 val = 0x05;
890 break;
891 case 7:
892 /* All three control PWM */
893 val = 0x06;
894 break;
895 default:
896 return -EINVAL;
897 }
898 break;
899 default:
900 return -EINVAL;
901 }
902
903 data->pwmctl[index] = pwmctl;
904 data->pwmchan[index] = pwmchan;
905
906 data->pwm[CONTROL][index] &= ~0xE0;
907 data->pwm[CONTROL][index] |= (val & 7) << 5;
908
909 i2c_smbus_write_byte_data(client, PWM_CONFIG_REG(index),
910 data->pwm[CONTROL][index]);
911
912 return 0;
913}
914
c24f9ba9
GR		 915static ssize_t pwmchan_store(struct device *dev,
916 struct device_attribute *attr, const char *buf,
917 size_t count)
1c301fc5
JC		 918{
919 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
c64fce7f
GM		 920 struct adt7475_data *data = dev_get_drvdata(dev);
921 struct i2c_client *client = data->client;
1c301fc5
JC		 922 int r;
923 long val;
924
179c4fdb 925 if (kstrtol(buf, 10, &val))
1c301fc5
JC		 926 return -EINVAL;
927
928 mutex_lock(&data->lock);
929 /* Read Modify Write PWM values */
930 adt7475_read_pwm(client, sattr->index);
931 r = hw_set_pwm(client, sattr->index, data->pwmctl[sattr->index], val);
932 if (r)
933 count = r;
934 mutex_unlock(&data->lock);
935
936 return count;
937}
938
c24f9ba9
GR		 939static ssize_t pwmctrl_store(struct device *dev,
940 struct device_attribute *attr, const char *buf,
941 size_t count)
1c301fc5
JC		 942{
943 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
c64fce7f
GM		 944 struct adt7475_data *data = dev_get_drvdata(dev);
945 struct i2c_client *client = data->client;
1c301fc5
JC		 946 int r;
947 long val;
948
179c4fdb 949 if (kstrtol(buf, 10, &val))
1c301fc5
JC		 950 return -EINVAL;
951
952 mutex_lock(&data->lock);
953 /* Read Modify Write PWM values */
954 adt7475_read_pwm(client, sattr->index);
955 r = hw_set_pwm(client, sattr->index, val, data->pwmchan[sattr->index]);
956 if (r)
957 count = r;
958 mutex_unlock(&data->lock);
959
960 return count;
961}
962
963/* List of frequencies for the PWM */
964static const int pwmfreq_table[] = {
3490c92a 965 11, 14, 22, 29, 35, 44, 58, 88, 22500
1c301fc5
JC		 966};
967
c24f9ba9 968static ssize_t pwmfreq_show(struct device *dev, struct device_attribute *attr,
1c301fc5
JC		 969 char *buf)
970{
971 struct adt7475_data *data = adt7475_update_device(dev);
972 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
9d19371d 973 int idx;
1c301fc5 974
4afec79f
TI		 975 if (IS_ERR(data))
976 return PTR_ERR(data);
9d19371d
DC		 977 idx = clamp_val(data->range[sattr->index] & 0xf, 0,
978 ARRAY_SIZE(pwmfreq_table) - 1);
4afec79f 979
9d19371d 980 return sprintf(buf, "%d\n", pwmfreq_table[idx]);
1c301fc5
JC		 981}
982
c24f9ba9
GR		 983static ssize_t pwmfreq_store(struct device *dev,
984 struct device_attribute *attr, const char *buf,
985 size_t count)
1c301fc5
JC		 986{
987 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
c64fce7f
GM		 988 struct adt7475_data *data = dev_get_drvdata(dev);
989 struct i2c_client *client = data->client;
1c301fc5
JC		 990 int out;
991 long val;
992
179c4fdb 993 if (kstrtol(buf, 10, &val))
1c301fc5
JC		 994 return -EINVAL;
995
e4651640 996 out = find_closest(val, pwmfreq_table, ARRAY_SIZE(pwmfreq_table));
1c301fc5
JC		 997
998 mutex_lock(&data->lock);
999
1000 data->range[sattr->index] =
1001 adt7475_read(TEMP_TRANGE_REG(sattr->index));
3490c92a 1002 data->range[sattr->index] &= ~0xf;
1c301fc5
JC		 1003 data->range[sattr->index] |= out;
1004
1005 i2c_smbus_write_byte_data(client, TEMP_TRANGE_REG(sattr->index),
1006 data->range[sattr->index]);
1007
1008 mutex_unlock(&data->lock);
1009 return count;
1010}
1011
1d05303c
JL		 1012static ssize_t pwm_use_point2_pwm_at_crit_show(struct device *dev,
1013 struct device_attribute *devattr,
1014 char *buf)
f99318b2
JD		 1015{
1016 struct adt7475_data *data = adt7475_update_device(dev);
9d19371d
DC		 1017
1018 if (IS_ERR(data))
1019 return PTR_ERR(data);
1020
f99318b2
JD		 1021 return sprintf(buf, "%d\n", !!(data->config4 & CONFIG4_MAXDUTY));
1022}
1023
1d05303c
JL		 1024static ssize_t pwm_use_point2_pwm_at_crit_store(struct device *dev,
1025 struct device_attribute *devattr,
1026 const char *buf, size_t count)
f99318b2 1027{
c64fce7f
GM		 1028 struct adt7475_data *data = dev_get_drvdata(dev);
1029 struct i2c_client *client = data->client;
f99318b2
JD		 1030 long val;
1031
179c4fdb 1032 if (kstrtol(buf, 10, &val))
f99318b2
JD		 1033 return -EINVAL;
1034 if (val != 0 && val != 1)
1035 return -EINVAL;
1036
1037 mutex_lock(&data->lock);
1038 data->config4 = i2c_smbus_read_byte_data(client, REG_CONFIG4);
1039 if (val)
1040 data->config4 |= CONFIG4_MAXDUTY;
1041 else
1042 data->config4 &= ~CONFIG4_MAXDUTY;
1043 i2c_smbus_write_byte_data(client, REG_CONFIG4, data->config4);
1044 mutex_unlock(&data->lock);
1045
1046 return count;
1047}
1048
1d05303c 1049static ssize_t vrm_show(struct device *dev, struct device_attribute *devattr,
54fe4671
JD		 1050 char *buf)
1051{
1052 struct adt7475_data *data = dev_get_drvdata(dev);
1053 return sprintf(buf, "%d\n", (int)data->vrm);
1054}
1055
1d05303c
JL		 1056static ssize_t vrm_store(struct device *dev, struct device_attribute *devattr,
1057 const char *buf, size_t count)
54fe4671
JD		 1058{
1059 struct adt7475_data *data = dev_get_drvdata(dev);
1060 long val;
1061
179c4fdb 1062 if (kstrtol(buf, 10, &val))
54fe4671
JD		 1063 return -EINVAL;
1064 if (val < 0 || val > 255)
1065 return -EINVAL;
1066 data->vrm = val;
1067
1068 return count;
1069}
1070
1d05303c
JL		 1071static ssize_t cpu0_vid_show(struct device *dev,
1072 struct device_attribute *devattr, char *buf)
54fe4671
JD		 1073{
1074 struct adt7475_data *data = adt7475_update_device(dev);
4afec79f
TI		 1075
1076 if (IS_ERR(data))
1077 return PTR_ERR(data);
1078
54fe4671
JD		 1079 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
1080}
1081
c24f9ba9
GR		 1082static SENSOR_DEVICE_ATTR_2_RO(in0_input, voltage, INPUT, 0);
1083static SENSOR_DEVICE_ATTR_2_RW(in0_max, voltage, MAX, 0);
1084static SENSOR_DEVICE_ATTR_2_RW(in0_min, voltage, MIN, 0);
1085static SENSOR_DEVICE_ATTR_2_RO(in0_alarm, voltage, ALARM, 0);
1086static SENSOR_DEVICE_ATTR_2_RO(in1_input, voltage, INPUT, 1);
1087static SENSOR_DEVICE_ATTR_2_RW(in1_max, voltage, MAX, 1);
1088static SENSOR_DEVICE_ATTR_2_RW(in1_min, voltage, MIN, 1);
1089static SENSOR_DEVICE_ATTR_2_RO(in1_alarm, voltage, ALARM, 1);
1090static SENSOR_DEVICE_ATTR_2_RO(in2_input, voltage, INPUT, 2);
1091static SENSOR_DEVICE_ATTR_2_RW(in2_max, voltage, MAX, 2);
1092static SENSOR_DEVICE_ATTR_2_RW(in2_min, voltage, MIN, 2);
1093static SENSOR_DEVICE_ATTR_2_RO(in2_alarm, voltage, ALARM, 2);
1094static SENSOR_DEVICE_ATTR_2_RO(in3_input, voltage, INPUT, 3);
1095static SENSOR_DEVICE_ATTR_2_RW(in3_max, voltage, MAX, 3);
1096static SENSOR_DEVICE_ATTR_2_RW(in3_min, voltage, MIN, 3);
1097static SENSOR_DEVICE_ATTR_2_RO(in3_alarm, voltage, ALARM, 3);
1098static SENSOR_DEVICE_ATTR_2_RO(in4_input, voltage, INPUT, 4);
1099static SENSOR_DEVICE_ATTR_2_RW(in4_max, voltage, MAX, 4);
1100static SENSOR_DEVICE_ATTR_2_RW(in4_min, voltage, MIN, 4);
1101static SENSOR_DEVICE_ATTR_2_RO(in4_alarm, voltage, ALARM, 8);
1102static SENSOR_DEVICE_ATTR_2_RO(in5_input, voltage, INPUT, 5);
1103static SENSOR_DEVICE_ATTR_2_RW(in5_max, voltage, MAX, 5);
1104static SENSOR_DEVICE_ATTR_2_RW(in5_min, voltage, MIN, 5);
1105static SENSOR_DEVICE_ATTR_2_RO(in5_alarm, voltage, ALARM, 31);
1106static SENSOR_DEVICE_ATTR_2_RO(temp1_input, temp, INPUT, 0);
1107static SENSOR_DEVICE_ATTR_2_RO(temp1_alarm, temp, ALARM, 0);
1108static SENSOR_DEVICE_ATTR_2_RO(temp1_fault, temp, FAULT, 0);
1109static SENSOR_DEVICE_ATTR_2_RW(temp1_max, temp, MAX, 0);
1110static SENSOR_DEVICE_ATTR_2_RW(temp1_min, temp, MIN, 0);
1111static SENSOR_DEVICE_ATTR_2_RW(temp1_offset, temp, OFFSET, 0);
1112static SENSOR_DEVICE_ATTR_2_RW(temp1_auto_point1_temp, temp, AUTOMIN, 0);
1113static SENSOR_DEVICE_ATTR_2_RW(temp1_auto_point2_temp, point2, 0, 0);
1114static SENSOR_DEVICE_ATTR_2_RW(temp1_crit, temp, THERM, 0);
1115static SENSOR_DEVICE_ATTR_2_RW(temp1_crit_hyst, temp, HYSTERSIS, 0);
1116static SENSOR_DEVICE_ATTR_2_RW(temp1_smoothing, temp_st, 0, 0);
1117static SENSOR_DEVICE_ATTR_2_RO(temp2_input, temp, INPUT, 1);
1118static SENSOR_DEVICE_ATTR_2_RO(temp2_alarm, temp, ALARM, 1);
1119static SENSOR_DEVICE_ATTR_2_RW(temp2_max, temp, MAX, 1);
1120static SENSOR_DEVICE_ATTR_2_RW(temp2_min, temp, MIN, 1);
1121static SENSOR_DEVICE_ATTR_2_RW(temp2_offset, temp, OFFSET, 1);
1122static SENSOR_DEVICE_ATTR_2_RW(temp2_auto_point1_temp, temp, AUTOMIN, 1);
1123static SENSOR_DEVICE_ATTR_2_RW(temp2_auto_point2_temp, point2, 0, 1);
1124static SENSOR_DEVICE_ATTR_2_RW(temp2_crit, temp, THERM, 1);
1125static SENSOR_DEVICE_ATTR_2_RW(temp2_crit_hyst, temp, HYSTERSIS, 1);
1126static SENSOR_DEVICE_ATTR_2_RW(temp2_smoothing, temp_st, 0, 1);
1127static SENSOR_DEVICE_ATTR_2_RO(temp3_input, temp, INPUT, 2);
1128static SENSOR_DEVICE_ATTR_2_RO(temp3_alarm, temp, ALARM, 2);
1129static SENSOR_DEVICE_ATTR_2_RO(temp3_fault, temp, FAULT, 2);
1130static SENSOR_DEVICE_ATTR_2_RW(temp3_max, temp, MAX, 2);
1131static SENSOR_DEVICE_ATTR_2_RW(temp3_min, temp, MIN, 2);
1132static SENSOR_DEVICE_ATTR_2_RW(temp3_offset, temp, OFFSET, 2);
1133static SENSOR_DEVICE_ATTR_2_RW(temp3_auto_point1_temp, temp, AUTOMIN, 2);
1134static SENSOR_DEVICE_ATTR_2_RW(temp3_auto_point2_temp, point2, 0, 2);
1135static SENSOR_DEVICE_ATTR_2_RW(temp3_crit, temp, THERM, 2);
1136static SENSOR_DEVICE_ATTR_2_RW(temp3_crit_hyst, temp, HYSTERSIS, 2);
1137static SENSOR_DEVICE_ATTR_2_RW(temp3_smoothing, temp_st, 0, 2);
1138static SENSOR_DEVICE_ATTR_2_RO(fan1_input, tach, INPUT, 0);
1139static SENSOR_DEVICE_ATTR_2_RW(fan1_min, tach, MIN, 0);
1140static SENSOR_DEVICE_ATTR_2_RO(fan1_alarm, tach, ALARM, 0);
1141static SENSOR_DEVICE_ATTR_2_RO(fan2_input, tach, INPUT, 1);
1142static SENSOR_DEVICE_ATTR_2_RW(fan2_min, tach, MIN, 1);
1143static SENSOR_DEVICE_ATTR_2_RO(fan2_alarm, tach, ALARM, 1);
1144static SENSOR_DEVICE_ATTR_2_RO(fan3_input, tach, INPUT, 2);
1145static SENSOR_DEVICE_ATTR_2_RW(fan3_min, tach, MIN, 2);
1146static SENSOR_DEVICE_ATTR_2_RO(fan3_alarm, tach, ALARM, 2);
1147static SENSOR_DEVICE_ATTR_2_RO(fan4_input, tach, INPUT, 3);
1148static SENSOR_DEVICE_ATTR_2_RW(fan4_min, tach, MIN, 3);
1149static SENSOR_DEVICE_ATTR_2_RO(fan4_alarm, tach, ALARM, 3);
1150static SENSOR_DEVICE_ATTR_2_RW(pwm1, pwm, INPUT, 0);
1151static SENSOR_DEVICE_ATTR_2_RW(pwm1_freq, pwmfreq, INPUT, 0);
1152static SENSOR_DEVICE_ATTR_2_RW(pwm1_enable, pwmctrl, INPUT, 0);
1153static SENSOR_DEVICE_ATTR_2_RW(pwm1_auto_channels_temp, pwmchan, INPUT, 0);
1154static SENSOR_DEVICE_ATTR_2_RW(pwm1_auto_point1_pwm, pwm, MIN, 0);
1155static SENSOR_DEVICE_ATTR_2_RW(pwm1_auto_point2_pwm, pwm, MAX, 0);
1156static SENSOR_DEVICE_ATTR_2_RW(pwm1_stall_disable, stall_disable, 0, 0);
1157static SENSOR_DEVICE_ATTR_2_RW(pwm2, pwm, INPUT, 1);
1158static SENSOR_DEVICE_ATTR_2_RW(pwm2_freq, pwmfreq, INPUT, 1);
1159static SENSOR_DEVICE_ATTR_2_RW(pwm2_enable, pwmctrl, INPUT, 1);
1160static SENSOR_DEVICE_ATTR_2_RW(pwm2_auto_channels_temp, pwmchan, INPUT, 1);
1161static SENSOR_DEVICE_ATTR_2_RW(pwm2_auto_point1_pwm, pwm, MIN, 1);
1162static SENSOR_DEVICE_ATTR_2_RW(pwm2_auto_point2_pwm, pwm, MAX, 1);
1163static SENSOR_DEVICE_ATTR_2_RW(pwm2_stall_disable, stall_disable, 0, 1);
1164static SENSOR_DEVICE_ATTR_2_RW(pwm3, pwm, INPUT, 2);
1165static SENSOR_DEVICE_ATTR_2_RW(pwm3_freq, pwmfreq, INPUT, 2);
1166static SENSOR_DEVICE_ATTR_2_RW(pwm3_enable, pwmctrl, INPUT, 2);
1167static SENSOR_DEVICE_ATTR_2_RW(pwm3_auto_channels_temp, pwmchan, INPUT, 2);
1168static SENSOR_DEVICE_ATTR_2_RW(pwm3_auto_point1_pwm, pwm, MIN, 2);
1169static SENSOR_DEVICE_ATTR_2_RW(pwm3_auto_point2_pwm, pwm, MAX, 2);
1170static SENSOR_DEVICE_ATTR_2_RW(pwm3_stall_disable, stall_disable, 0, 2);
1c301fc5 1171
f99318b2 1172/* Non-standard name, might need revisiting */
1d05303c 1173static DEVICE_ATTR_RW(pwm_use_point2_pwm_at_crit);
f99318b2 1174
1d05303c
JL		 1175static DEVICE_ATTR_RW(vrm);
1176static DEVICE_ATTR_RO(cpu0_vid);
54fe4671 1177
1c301fc5
JC		 1178static struct attribute *adt7475_attrs[] = {
1179 &sensor_dev_attr_in1_input.dev_attr.attr,
1180 &sensor_dev_attr_in1_max.dev_attr.attr,
1181 &sensor_dev_attr_in1_min.dev_attr.attr,
1182 &sensor_dev_attr_in1_alarm.dev_attr.attr,
1183 &sensor_dev_attr_in2_input.dev_attr.attr,
1184 &sensor_dev_attr_in2_max.dev_attr.attr,
1185 &sensor_dev_attr_in2_min.dev_attr.attr,
1186 &sensor_dev_attr_in2_alarm.dev_attr.attr,
1187 &sensor_dev_attr_temp1_input.dev_attr.attr,
1188 &sensor_dev_attr_temp1_alarm.dev_attr.attr,
1189 &sensor_dev_attr_temp1_fault.dev_attr.attr,
1190 &sensor_dev_attr_temp1_max.dev_attr.attr,
1191 &sensor_dev_attr_temp1_min.dev_attr.attr,
1192 &sensor_dev_attr_temp1_offset.dev_attr.attr,
1193 &sensor_dev_attr_temp1_auto_point1_temp.dev_attr.attr,
1194 &sensor_dev_attr_temp1_auto_point2_temp.dev_attr.attr,
1195 &sensor_dev_attr_temp1_crit.dev_attr.attr,
1196 &sensor_dev_attr_temp1_crit_hyst.dev_attr.attr,
8f05bcc3 1197 &sensor_dev_attr_temp1_smoothing.dev_attr.attr,
1c301fc5
JC		 1198 &sensor_dev_attr_temp2_input.dev_attr.attr,
1199 &sensor_dev_attr_temp2_alarm.dev_attr.attr,
1200 &sensor_dev_attr_temp2_max.dev_attr.attr,
1201 &sensor_dev_attr_temp2_min.dev_attr.attr,
1202 &sensor_dev_attr_temp2_offset.dev_attr.attr,
1203 &sensor_dev_attr_temp2_auto_point1_temp.dev_attr.attr,
1204 &sensor_dev_attr_temp2_auto_point2_temp.dev_attr.attr,
1205 &sensor_dev_attr_temp2_crit.dev_attr.attr,
1206 &sensor_dev_attr_temp2_crit_hyst.dev_attr.attr,
8f05bcc3 1207 &sensor_dev_attr_temp2_smoothing.dev_attr.attr,
1c301fc5
JC		 1208 &sensor_dev_attr_temp3_input.dev_attr.attr,
1209 &sensor_dev_attr_temp3_fault.dev_attr.attr,
1210 &sensor_dev_attr_temp3_alarm.dev_attr.attr,
1211 &sensor_dev_attr_temp3_max.dev_attr.attr,
1212 &sensor_dev_attr_temp3_min.dev_attr.attr,
1213 &sensor_dev_attr_temp3_offset.dev_attr.attr,
1214 &sensor_dev_attr_temp3_auto_point1_temp.dev_attr.attr,
1215 &sensor_dev_attr_temp3_auto_point2_temp.dev_attr.attr,
1216 &sensor_dev_attr_temp3_crit.dev_attr.attr,
1217 &sensor_dev_attr_temp3_crit_hyst.dev_attr.attr,
8f05bcc3 1218 &sensor_dev_attr_temp3_smoothing.dev_attr.attr,
1c301fc5
JC		 1219 &sensor_dev_attr_fan1_input.dev_attr.attr,
1220 &sensor_dev_attr_fan1_min.dev_attr.attr,
1221 &sensor_dev_attr_fan1_alarm.dev_attr.attr,
1222 &sensor_dev_attr_fan2_input.dev_attr.attr,
1223 &sensor_dev_attr_fan2_min.dev_attr.attr,
1224 &sensor_dev_attr_fan2_alarm.dev_attr.attr,
1225 &sensor_dev_attr_fan3_input.dev_attr.attr,
1226 &sensor_dev_attr_fan3_min.dev_attr.attr,
1227 &sensor_dev_attr_fan3_alarm.dev_attr.attr,
1c301fc5
JC		 1228 &sensor_dev_attr_pwm1.dev_attr.attr,
1229 &sensor_dev_attr_pwm1_freq.dev_attr.attr,
1230 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
84d2a314 1231 &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
1c301fc5
JC		 1232 &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
1233 &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
1d58f5ef 1234 &sensor_dev_attr_pwm1_stall_disable.dev_attr.attr,
1c301fc5
JC		 1235 &sensor_dev_attr_pwm3.dev_attr.attr,
1236 &sensor_dev_attr_pwm3_freq.dev_attr.attr,
1237 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
84d2a314 1238 &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
1c301fc5
JC		 1239 &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,
1240 &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
1d58f5ef 1241 &sensor_dev_attr_pwm3_stall_disable.dev_attr.attr,
f99318b2 1242 &dev_attr_pwm_use_point2_pwm_at_crit.attr,
1c301fc5
JC		 1243 NULL,
1244};
1245
378933c9
JD		 1246static struct attribute *fan4_attrs[] = {
1247 &sensor_dev_attr_fan4_input.dev_attr.attr,
1248 &sensor_dev_attr_fan4_min.dev_attr.attr,
1249 &sensor_dev_attr_fan4_alarm.dev_attr.attr,
1250 NULL
1251};
1252
1253static struct attribute *pwm2_attrs[] = {
1254 &sensor_dev_attr_pwm2.dev_attr.attr,
1255 &sensor_dev_attr_pwm2_freq.dev_attr.attr,
1256 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
1257 &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
1258 &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,
1259 &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
1d58f5ef 1260 &sensor_dev_attr_pwm2_stall_disable.dev_attr.attr,
378933c9
JD		 1261 NULL
1262};
1263
378933c9 1264static struct attribute *in0_attrs[] = {
3d849981
JD		 1265 &sensor_dev_attr_in0_input.dev_attr.attr,
1266 &sensor_dev_attr_in0_max.dev_attr.attr,
1267 &sensor_dev_attr_in0_min.dev_attr.attr,
1268 &sensor_dev_attr_in0_alarm.dev_attr.attr,
378933c9
JD		 1269 NULL
1270};
1271
d8d2ee07 1272static struct attribute *in3_attrs[] = {
3d849981
JD		 1273 &sensor_dev_attr_in3_input.dev_attr.attr,
1274 &sensor_dev_attr_in3_max.dev_attr.attr,
1275 &sensor_dev_attr_in3_min.dev_attr.attr,
1276 &sensor_dev_attr_in3_alarm.dev_attr.attr,
d8d2ee07
JD		 1277 NULL
1278};
1279
1280static struct attribute *in4_attrs[] = {
3d849981
JD		 1281 &sensor_dev_attr_in4_input.dev_attr.attr,
1282 &sensor_dev_attr_in4_max.dev_attr.attr,
1283 &sensor_dev_attr_in4_min.dev_attr.attr,
1284 &sensor_dev_attr_in4_alarm.dev_attr.attr,
d8d2ee07
JD		 1285 NULL
1286};
1287
1288static struct attribute *in5_attrs[] = {
3d849981
JD		 1289 &sensor_dev_attr_in5_input.dev_attr.attr,
1290 &sensor_dev_attr_in5_max.dev_attr.attr,
1291 &sensor_dev_attr_in5_min.dev_attr.attr,
1292 &sensor_dev_attr_in5_alarm.dev_attr.attr,
1293 NULL
1294};
1295
54fe4671
JD		 1296static struct attribute *vid_attrs[] = {
1297 &dev_attr_cpu0_vid.attr,
1298 &dev_attr_vrm.attr,
1299 NULL
1300};
1301
f5397be8
AY		 1302static const struct attribute_group adt7475_attr_group = { .attrs = adt7475_attrs };
1303static const struct attribute_group fan4_attr_group = { .attrs = fan4_attrs };
1304static const struct attribute_group pwm2_attr_group = { .attrs = pwm2_attrs };
1305static const struct attribute_group in0_attr_group = { .attrs = in0_attrs };
1306static const struct attribute_group in3_attr_group = { .attrs = in3_attrs };
1307static const struct attribute_group in4_attr_group = { .attrs = in4_attrs };
1308static const struct attribute_group in5_attr_group = { .attrs = in5_attrs };
1309static const struct attribute_group vid_attr_group = { .attrs = vid_attrs };
1c301fc5 1310
310ec792 1311static int adt7475_detect(struct i2c_client *client,
1c301fc5
JC		 1312 struct i2c_board_info *info)
1313{
1314 struct i2c_adapter *adapter = client->adapter;
d656b6fd 1315 int vendid, devid, devid2;
b180d050 1316 const char *name;
1c301fc5
JC		 1317
1318 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1319 return -ENODEV;
1320
b180d050 1321 vendid = adt7475_read(REG_VENDID);
d656b6fd
JD		 1322 devid2 = adt7475_read(REG_DEVID2);
1323 if (vendid != 0x41 || /* Analog Devices */
1324 (devid2 & 0xf8) != 0x68)
1325 return -ENODEV;
b180d050 1326
d656b6fd
JD		 1327 devid = adt7475_read(REG_DEVID);
1328 if (devid == 0x73)
b180d050 1329 name = "adt7473";
d656b6fd 1330 else if (devid == 0x75 && client->addr == 0x2e)
b180d050 1331 name = "adt7475";
d8d2ee07
JD		 1332 else if (devid == 0x76)
1333 name = "adt7476";
3d849981
JD		 1334 else if ((devid2 & 0xfc) == 0x6c)
1335 name = "adt7490";
b180d050
JD		 1336 else {
1337 dev_dbg(&adapter->dev,
d8d2ee07 1338 "Couldn't detect an ADT7473/75/76/90 part at "
b180d050 1339 "0x%02x\n", (unsigned int)client->addr);
52df6440 1340 return -ENODEV;
1c301fc5
JC		 1341 }
1342
b180d050 1343 strlcpy(info->type, name, I2C_NAME_SIZE);
1c301fc5
JC		 1344
1345 return 0;
1346}
1347
702afead 1348static int adt7475_update_limits(struct i2c_client *client)
5cf943ed
TI		 1349{
1350 struct adt7475_data *data = i2c_get_clientdata(client);
1351 int i;
702afead 1352 int ret;
5cf943ed 1353
702afead
TI		 1354 ret = adt7475_read(REG_CONFIG4);
1355 if (ret < 0)
1356 return ret;
1357 data->config4 = ret;
1358
1359 ret = adt7475_read(REG_CONFIG5);
1360 if (ret < 0)
1361 return ret;
1362 data->config5 = ret;
5cf943ed
TI		 1363
1364 for (i = 0; i < ADT7475_VOLTAGE_COUNT; i++) {
1365 if (!(data->has_voltage & (1 << i)))
1366 continue;
1367 /* Adjust values so they match the input precision */
702afead
TI		 1368 ret = adt7475_read(VOLTAGE_MIN_REG(i));
1369 if (ret < 0)
1370 return ret;
1371 data->voltage[MIN][i] = ret << 2;
1372
1373 ret = adt7475_read(VOLTAGE_MAX_REG(i));
1374 if (ret < 0)
1375 return ret;
1376 data->voltage[MAX][i] = ret << 2;
5cf943ed
TI		 1377 }
1378
1379 if (data->has_voltage & (1 << 5)) {
702afead
TI		 1380 ret = adt7475_read(REG_VTT_MIN);
1381 if (ret < 0)
1382 return ret;
1383 data->voltage[MIN][5] = ret << 2;
1384
1385 ret = adt7475_read(REG_VTT_MAX);
1386 if (ret < 0)
1387 return ret;
1388 data->voltage[MAX][5] = ret << 2;
5cf943ed
TI		 1389 }
1390
1391 for (i = 0; i < ADT7475_TEMP_COUNT; i++) {
1392 /* Adjust values so they match the input precision */
702afead
TI		 1393 ret = adt7475_read(TEMP_MIN_REG(i));
1394 if (ret < 0)
1395 return ret;
1396 data->temp[MIN][i] = ret << 2;
1397
1398 ret = adt7475_read(TEMP_MAX_REG(i));
1399 if (ret < 0)
1400 return ret;
1401 data->temp[MAX][i] = ret << 2;
1402
1403 ret = adt7475_read(TEMP_TMIN_REG(i));
1404 if (ret < 0)
1405 return ret;
1406 data->temp[AUTOMIN][i] = ret << 2;
1407
1408 ret = adt7475_read(TEMP_THERM_REG(i));
1409 if (ret < 0)
1410 return ret;
1411 data->temp[THERM][i] = ret << 2;
1412
1413 ret = adt7475_read(TEMP_OFFSET_REG(i));
1414 if (ret < 0)
1415 return ret;
1416 data->temp[OFFSET][i] = ret;
5cf943ed
TI		 1417 }
1418 adt7475_read_hystersis(client);
1419
1420 for (i = 0; i < ADT7475_TACH_COUNT; i++) {
1421 if (i == 3 && !data->has_fan4)
1422 continue;
702afead
TI		 1423 ret = adt7475_read_word(client, TACH_MIN_REG(i));
1424 if (ret < 0)
1425 return ret;
1426 data->tach[MIN][i] = ret;
5cf943ed
TI		 1427 }
1428
1429 for (i = 0; i < ADT7475_PWM_COUNT; i++) {
1430 if (i == 1 && !data->has_pwm2)
1431 continue;
702afead
TI		 1432 ret = adt7475_read(PWM_MAX_REG(i));
1433 if (ret < 0)
1434 return ret;
1435 data->pwm[MAX][i] = ret;
1436
1437 ret = adt7475_read(PWM_MIN_REG(i));
1438 if (ret < 0)
1439 return ret;
1440 data->pwm[MIN][i] = ret;
5cf943ed
TI		 1441 /* Set the channel and control information */
1442 adt7475_read_pwm(client, i);
1443 }
1444
702afead
TI		 1445 ret = adt7475_read(TEMP_TRANGE_REG(0));
1446 if (ret < 0)
1447 return ret;
1448 data->range[0] = ret;
1449
1450 ret = adt7475_read(TEMP_TRANGE_REG(1));
1451 if (ret < 0)
1452 return ret;
1453 data->range[1] = ret;
1454
1455 ret = adt7475_read(TEMP_TRANGE_REG(2));
1456 if (ret < 0)
1457 return ret;
1458 data->range[2] = ret;
1459
1460 return 0;
5cf943ed
TI		 1461}
1462
2ecff397
LS		 1463static int set_property_bit(const struct i2c_client *client, char *property,
1464 u8 *config, u8 bit_index)
1465{
1466 u32 prop_value = 0;
1467 int ret = of_property_read_u32(client->dev.of_node, property,
1468 &prop_value);
1469
1470 if (!ret) {
1471 if (prop_value)
1472 *config |= (1 << bit_index);
1473 else
1474 *config &= ~(1 << bit_index);
1475 }
1476
1477 return ret;
1478}
1479
1480static int load_attenuators(const struct i2c_client *client, int chip,
1481 struct adt7475_data *data)
1482{
1483 int ret;
1484
1485 if (chip == adt7476 || chip == adt7490) {
1486 set_property_bit(client, "adi,bypass-attenuator-in0",
1487 &data->config4, 4);
1488 set_property_bit(client, "adi,bypass-attenuator-in1",
1489 &data->config4, 5);
1490 set_property_bit(client, "adi,bypass-attenuator-in3",
1491 &data->config4, 6);
1492 set_property_bit(client, "adi,bypass-attenuator-in4",
1493 &data->config4, 7);
1494
1495 ret = i2c_smbus_write_byte_data(client, REG_CONFIG4,
1496 data->config4);
1497 if (ret < 0)
1498 return ret;
1499 } else if (chip == adt7473 || chip == adt7475) {
1500 set_property_bit(client, "adi,bypass-attenuator-in1",
1501 &data->config2, 5);
1502
1503 ret = i2c_smbus_write_byte_data(client, REG_CONFIG2,
1504 data->config2);
1505 if (ret < 0)
1506 return ret;
1507 }
1508
1509 return 0;
1510}
1511
86da28ee
CP		 1512static int adt7475_set_pwm_polarity(struct i2c_client *client)
1513{
1514 u32 states[ADT7475_PWM_COUNT];
1515 int ret, i;
1516 u8 val;
1517
1518 ret = of_property_read_u32_array(client->dev.of_node,
1519 "adi,pwm-active-state", states,
1520 ARRAY_SIZE(states));
1521 if (ret)
1522 return ret;
1523
1524 for (i = 0; i < ADT7475_PWM_COUNT; i++) {
1525 ret = adt7475_read(PWM_CONFIG_REG(i));
1526 if (ret < 0)
1527 return ret;
1528 val = ret;
1529 if (states[i])
1530 val &= ~BIT(4);
1531 else
1532 val |= BIT(4);
1533
1534 ret = i2c_smbus_write_byte_data(client, PWM_CONFIG_REG(i), val);
1535 if (ret)
1536 return ret;
1537 }
1538
1539 return 0;
1540}
1541
67487038 1542static int adt7475_probe(struct i2c_client *client)
1c301fc5 1543{
4e2496e4 1544 enum chips chip;
99b8c83a 1545 static const char * const names[] = {
d07ca4ad
JD		 1546 [adt7473] = "ADT7473",
1547 [adt7475] = "ADT7475",
d8d2ee07 1548 [adt7476] = "ADT7476",
d07ca4ad
JD		 1549 [adt7490] = "ADT7490",
1550 };
1551
1c301fc5 1552 struct adt7475_data *data;
c64fce7f
GM		 1553 struct device *hwmon_dev;
1554 int i, ret = 0, revision, group_num = 0;
2ecff397 1555 u8 config3;
67487038 1556 const struct i2c_device_id *id = i2c_match_id(adt7475_id, client);
1c301fc5 1557
e3ecb2ee 1558 data = devm_kzalloc(&client->dev, sizeof(*data), GFP_KERNEL);
1c301fc5
JC		 1559 if (data == NULL)
1560 return -ENOMEM;
1561
1562 mutex_init(&data->lock);
c64fce7f 1563 data->client = client;
1c301fc5
JC		 1564 i2c_set_clientdata(client, data);
1565
4e2496e4
JMC		 1566 if (client->dev.of_node)
1567 chip = (enum chips)of_device_get_match_data(&client->dev);
1568 else
1569 chip = id->driver_data;
1570
cffb9dd0 1571 /* Initialize device-specific values */
4e2496e4 1572 switch (chip) {
d8d2ee07
JD		 1573 case adt7476:
1574 data->has_voltage = 0x0e; /* in1 to in3 */
1575 revision = adt7475_read(REG_DEVID2) & 0x07;
1576 break;
3d849981 1577 case adt7490:
378933c9
JD		 1578 data->has_voltage = 0x3e; /* in1 to in5 */
1579 revision = adt7475_read(REG_DEVID2) & 0x03;
d07ca4ad
JD		 1580 if (revision == 0x03)
1581 revision += adt7475_read(REG_DEVREV2);
3d849981 1582 break;
cffb9dd0
JD		 1583 default:
1584 data->has_voltage = 0x06; /* in1, in2 */
378933c9
JD		 1585 revision = adt7475_read(REG_DEVID2) & 0x07;
1586 }
1587
1588 config3 = adt7475_read(REG_CONFIG3);
1589 /* Pin PWM2 may alternatively be used for ALERT output */
1590 if (!(config3 & CONFIG3_SMBALERT))
1591 data->has_pwm2 = 1;
1592 /* Meaning of this bit is inverted for the ADT7473-1 */
1593 if (id->driver_data == adt7473 && revision >= 1)
1594 data->has_pwm2 = !data->has_pwm2;
1595
1596 data->config4 = adt7475_read(REG_CONFIG4);
1597 /* Pin TACH4 may alternatively be used for THERM */
1598 if ((data->config4 & CONFIG4_PINFUNC) == 0x0)
1599 data->has_fan4 = 1;
1600
9ed5bc24
GR		 1601 /*
1602 * THERM configuration is more complex on the ADT7476 and ADT7490,
1603 * because 2 different pins (TACH4 and +2.5 Vin) can be used for
1604 * this function
1605 */
378933c9
JD		 1606 if (id->driver_data == adt7490) {
1607 if ((data->config4 & CONFIG4_PINFUNC) == 0x1 &&
1608 !(config3 & CONFIG3_THERM))
1609 data->has_fan4 = 1;
d8d2ee07
JD		 1610 }
1611 if (id->driver_data == adt7476 || id->driver_data == adt7490) {
378933c9
JD		 1612 if (!(config3 & CONFIG3_THERM) ||
1613 (data->config4 & CONFIG4_PINFUNC) == 0x1)
1614 data->has_voltage |= (1 << 0); /* in0 */
cffb9dd0
JD		 1615 }
1616
9ed5bc24
GR		 1617 /*
1618 * On the ADT7476, the +12V input pin may instead be used as VID5,
1619 * and VID pins may alternatively be used as GPIO
1620 */
d8d2ee07
JD		 1621 if (id->driver_data == adt7476) {
1622 u8 vid = adt7475_read(REG_VID);
1623 if (!(vid & VID_VIDSEL))
1624 data->has_voltage |= (1 << 4); /* in4 */
54fe4671
JD		 1625
1626 data->has_vid = !(adt7475_read(REG_CONFIG5) & CONFIG5_VIDGPIO);
d8d2ee07
JD		 1627 }
1628
ebfaf1fb 1629 /* Voltage attenuators can be bypassed, globally or individually */
2ecff397
LS		 1630 data->config2 = adt7475_read(REG_CONFIG2);
1631 ret = load_attenuators(client, chip, data);
1632 if (ret)
1633 dev_warn(&client->dev, "Error configuring attenuator bypass\n");
1634
1635 if (data->config2 & CONFIG2_ATTN) {
ebfaf1fb
JD		 1636 data->bypass_attn = (0x3 << 3) | 0x3;
1637 } else {
1638 data->bypass_attn = ((data->config4 & CONFIG4_ATTN_IN10) >> 4) |
1639 ((data->config4 & CONFIG4_ATTN_IN43) >> 3);
1640 }
1641 data->bypass_attn &= data->has_voltage;
1642
9ed5bc24
GR		 1643 /*
1644 * Call adt7475_read_pwm for all pwm's as this will reprogram any
1645 * pwm's which are disabled to manual mode with 0% duty cycle
1646 */
1c301fc5
JC		 1647 for (i = 0; i < ADT7475_PWM_COUNT; i++)
1648 adt7475_read_pwm(client, i);
1649
86da28ee
CP		 1650 ret = adt7475_set_pwm_polarity(client);
1651 if (ret && ret != -EINVAL)
1652 dev_warn(&client->dev, "Error configuring pwm polarity\n");
1653
4abdf38d
CP		 1654 /* Start monitoring */
1655 switch (chip) {
1656 case adt7475:
1657 case adt7476:
1658 i2c_smbus_write_byte_data(client, REG_CONFIG1,
1659 adt7475_read(REG_CONFIG1) | 0x01);
1660 break;
1661 default:
1662 break;
1663 }
1664
c64fce7f 1665 data->groups[group_num++] = &adt7475_attr_group;
1c301fc5 1666
378933c9
JD		 1667 /* Features that can be disabled individually */
1668 if (data->has_fan4) {
c64fce7f 1669 data->groups[group_num++] = &fan4_attr_group;
378933c9
JD		 1670 }
1671 if (data->has_pwm2) {
c64fce7f 1672 data->groups[group_num++] = &pwm2_attr_group;
378933c9
JD		 1673 }
1674 if (data->has_voltage & (1 << 0)) {
c64fce7f 1675 data->groups[group_num++] = &in0_attr_group;
378933c9 1676 }
d8d2ee07 1677 if (data->has_voltage & (1 << 3)) {
c64fce7f 1678 data->groups[group_num++] = &in3_attr_group;
d8d2ee07
JD		 1679 }
1680 if (data->has_voltage & (1 << 4)) {
c64fce7f 1681 data->groups[group_num++] = &in4_attr_group;
d8d2ee07
JD		 1682 }
1683 if (data->has_voltage & (1 << 5)) {
c64fce7f 1684 data->groups[group_num++] = &in5_attr_group;
d8d2ee07 1685 }
54fe4671
JD		 1686 if (data->has_vid) {
1687 data->vrm = vid_which_vrm();
c64fce7f 1688 data->groups[group_num] = &vid_attr_group;
54fe4671 1689 }
378933c9 1690
c64fce7f
GM		 1691 /* register device with all the acquired attributes */
1692 hwmon_dev = devm_hwmon_device_register_with_groups(&client->dev,
1693 client->name, data,
1694 data->groups);
1695
1696 if (IS_ERR(hwmon_dev)) {
1697 ret = PTR_ERR(hwmon_dev);
1698 return ret;
1c301fc5
JC		 1699 }
1700
d07ca4ad
JD		 1701 dev_info(&client->dev, "%s device, revision %d\n",
1702 names[id->driver_data], revision);
d8d2ee07 1703 if ((data->has_voltage & 0x11) || data->has_fan4 || data->has_pwm2)
54fe4671 1704 dev_info(&client->dev, "Optional features:%s%s%s%s%s\n",
d07ca4ad 1705 (data->has_voltage & (1 << 0)) ? " in0" : "",
d8d2ee07 1706 (data->has_voltage & (1 << 4)) ? " in4" : "",
d07ca4ad 1707 data->has_fan4 ? " fan4" : "",
54fe4671
JD		 1708 data->has_pwm2 ? " pwm2" : "",
1709 data->has_vid ? " vid" : "");
ebfaf1fb
JD		 1710 if (data->bypass_attn)
1711 dev_info(&client->dev, "Bypassing attenuators on:%s%s%s%s\n",
1712 (data->bypass_attn & (1 << 0)) ? " in0" : "",
1713 (data->bypass_attn & (1 << 1)) ? " in1" : "",
1714 (data->bypass_attn & (1 << 3)) ? " in3" : "",
1715 (data->bypass_attn & (1 << 4)) ? " in4" : "");
d07ca4ad 1716
5cf943ed 1717 /* Limits and settings, should never change update more than once */
4afec79f
TI		 1718 ret = adt7475_update_limits(client);
1719 if (ret)
c64fce7f 1720 return ret;
1c301fc5
JC		 1721
1722 return 0;
1723}
1724
1725static struct i2c_driver adt7475_driver = {
1726 .class = I2C_CLASS_HWMON,
1727 .driver = {
1728 .name = "adt7475",
4e2496e4 1729 .of_match_table = of_match_ptr(adt7475_of_match),
1c301fc5 1730 },
67487038 1731 .probe_new = adt7475_probe,
1c301fc5
JC		 1732 .id_table = adt7475_id,
1733 .detect = adt7475_detect,
c3813d6a 1734 .address_list = normal_i2c,
1c301fc5
JC		 1735};
1736
1737static void adt7475_read_hystersis(struct i2c_client *client)
1738{
1739 struct adt7475_data *data = i2c_get_clientdata(client);
1740
1741 data->temp[HYSTERSIS][0] = (u16) adt7475_read(REG_REMOTE1_HYSTERSIS);
1742 data->temp[HYSTERSIS][1] = data->temp[HYSTERSIS][0];
1743 data->temp[HYSTERSIS][2] = (u16) adt7475_read(REG_REMOTE2_HYSTERSIS);
1744}
1745
1746static void adt7475_read_pwm(struct i2c_client *client, int index)
1747{
1748 struct adt7475_data *data = i2c_get_clientdata(client);
1749 unsigned int v;
1750
1751 data->pwm[CONTROL][index] = adt7475_read(PWM_CONFIG_REG(index));
1752
9ed5bc24
GR		 1753 /*
1754 * Figure out the internal value for pwmctrl and pwmchan
1755 * based on the current settings
1756 */
1c301fc5
JC		 1757 v = (data->pwm[CONTROL][index] >> 5) & 7;
1758
1759 if (v == 3)
1760 data->pwmctl[index] = 0;
1761 else if (v == 7)
1762 data->pwmctl[index] = 1;
1763 else if (v == 4) {
9ed5bc24
GR		 1764 /*
1765 * The fan is disabled - we don't want to
1766 * support that, so change to manual mode and
1767 * set the duty cycle to 0 instead
1768 */
1c301fc5
JC		 1769 data->pwm[INPUT][index] = 0;
1770 data->pwm[CONTROL][index] &= ~0xE0;
1771 data->pwm[CONTROL][index] |= (7 << 5);
1772
1773 i2c_smbus_write_byte_data(client, PWM_CONFIG_REG(index),
1774 data->pwm[INPUT][index]);
1775
1776 i2c_smbus_write_byte_data(client, PWM_CONFIG_REG(index),
1777 data->pwm[CONTROL][index]);
1778
1779 data->pwmctl[index] = 1;
1780 } else {
1781 data->pwmctl[index] = 2;
1782
1783 switch (v) {
1784 case 0:
1785 data->pwmchan[index] = 1;
1786 break;
1787 case 1:
1788 data->pwmchan[index] = 2;
1789 break;
1790 case 2:
1791 data->pwmchan[index] = 4;
1792 break;
1793 case 5:
1794 data->pwmchan[index] = 6;
1795 break;
1796 case 6:
1797 data->pwmchan[index] = 7;
1798 break;
1799 }
1800 }
1801}
1802
702afead 1803static int adt7475_update_measure(struct device *dev)
1c301fc5 1804{
c64fce7f
GM		 1805 struct adt7475_data *data = dev_get_drvdata(dev);
1806 struct i2c_client *client = data->client;
3d849981 1807 u16 ext;
1c301fc5 1808 int i;
702afead
TI		 1809 int ret;
1810
1811 ret = adt7475_read(REG_STATUS2);
1812 if (ret < 0)
1813 return ret;
1814 data->alarms = ret << 8;
1c301fc5 1815
702afead
TI		 1816 ret = adt7475_read(REG_STATUS1);
1817 if (ret < 0)
1818 return ret;
1819 data->alarms |= ret;
1820
1821 ret = adt7475_read(REG_EXTEND2);
1822 if (ret < 0)
1823 return ret;
1824
1825 ext = (ret << 8);
1826
1827 ret = adt7475_read(REG_EXTEND1);
1828 if (ret < 0)
1829 return ret;
1830
1831 ext |= ret;
5cf943ed 1832
5cf943ed
TI		 1833 for (i = 0; i < ADT7475_VOLTAGE_COUNT; i++) {
1834 if (!(data->has_voltage & (1 << i)))
1835 continue;
702afead
TI		 1836 ret = adt7475_read(VOLTAGE_REG(i));
1837 if (ret < 0)
1838 return ret;
5cf943ed 1839 data->voltage[INPUT][i] =
702afead 1840 (ret << 2) |
5cf943ed
TI		 1841 ((ext >> (i * 2)) & 3);
1842 }
1c301fc5 1843
702afead
TI		 1844 for (i = 0; i < ADT7475_TEMP_COUNT; i++) {
1845 ret = adt7475_read(TEMP_REG(i));
1846 if (ret < 0)
1847 return ret;
5cf943ed 1848 data->temp[INPUT][i] =
702afead 1849 (ret << 2) |
5cf943ed 1850 ((ext >> ((i + 5) * 2)) & 3);
702afead 1851 }
54fe4671 1852
5cf943ed 1853 if (data->has_voltage & (1 << 5)) {
702afead
TI		 1854 ret = adt7475_read(REG_STATUS4);
1855 if (ret < 0)
1856 return ret;
1857 data->alarms |= ret << 24;
1858
1859 ret = adt7475_read(REG_EXTEND3);
1860 if (ret < 0)
1861 return ret;
1862 ext = ret;
1863
1864 ret = adt7475_read(REG_VTT);
1865 if (ret < 0)
1866 return ret;
1867 data->voltage[INPUT][5] = ret << 2 |
5cf943ed 1868 ((ext >> 4) & 3);
1c301fc5
JC		 1869 }
1870
5cf943ed
TI		 1871 for (i = 0; i < ADT7475_TACH_COUNT; i++) {
1872 if (i == 3 && !data->has_fan4)
1873 continue;
702afead
TI		 1874 ret = adt7475_read_word(client, TACH_REG(i));
1875 if (ret < 0)
1876 return ret;
1877 data->tach[INPUT][i] = ret;
5cf943ed 1878 }
3d849981 1879
5cf943ed
TI		 1880 /* Updated by hw when in auto mode */
1881 for (i = 0; i < ADT7475_PWM_COUNT; i++) {
1882 if (i == 1 && !data->has_pwm2)
1883 continue;
702afead
TI		 1884 ret = adt7475_read(PWM_REG(i));
1885 if (ret < 0)
1886 return ret;
1887 data->pwm[INPUT][i] = ret;
5cf943ed 1888 }
1c301fc5 1889
702afead
TI		 1890 if (data->has_vid) {
1891 ret = adt7475_read(REG_VID);
1892 if (ret < 0)
1893 return ret;
1894 data->vid = ret & 0x3f;
1895 }
1896
1897 return 0;
5cf943ed 1898}
1c301fc5 1899
5cf943ed
TI		 1900static struct adt7475_data *adt7475_update_device(struct device *dev)
1901{
c64fce7f 1902 struct adt7475_data *data = dev_get_drvdata(dev);
4afec79f 1903 int ret;
1c301fc5 1904
5cf943ed 1905 mutex_lock(&data->lock);
1c301fc5 1906
5cf943ed
TI		 1907 /* Measurement values update every 2 seconds */
1908 if (time_after(jiffies, data->measure_updated + HZ * 2) ||
1909 !data->valid) {
4afec79f
TI		 1910 ret = adt7475_update_measure(dev);
1911 if (ret) {
1912 data->valid = false;
1913 mutex_unlock(&data->lock);
1914 return ERR_PTR(ret);
1915 }
5cf943ed 1916 data->measure_updated = jiffies;
b36fb171 1917 data->valid = true;
1c301fc5
JC		 1918 }
1919
1920 mutex_unlock(&data->lock);
1921
1922 return data;
1923}
1924
f0967eea 1925module_i2c_driver(adt7475_driver);
1c301fc5
JC		 1926
1927MODULE_AUTHOR("Advanced Micro Devices, Inc");
1928MODULE_DESCRIPTION("adt7475 driver");
1929MODULE_LICENSE("GPL");
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