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74ba9207 | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
51c2a487 LPC |
2 | /* |
3 | * adt7x10.c - Part of lm_sensors, Linux kernel modules for hardware | |
4 | * monitoring | |
5 | * This driver handles the ADT7410 and compatible digital temperature sensors. | |
6 | * Hartmut Knaack <knaack.h@gmx.de> 2012-07-22 | |
7 | * based on lm75.c by Frodo Looijaard <frodol@dds.nl> | |
8 | * and adt7410.c from iio-staging by Sonic Zhang <sonic.zhang@analog.com> | |
51c2a487 LPC |
9 | */ |
10 | ||
a748d30c | 11 | #include <linux/device.h> |
51c2a487 LPC |
12 | #include <linux/module.h> |
13 | #include <linux/init.h> | |
14 | #include <linux/slab.h> | |
15 | #include <linux/jiffies.h> | |
16 | #include <linux/hwmon.h> | |
51c2a487 LPC |
17 | #include <linux/err.h> |
18 | #include <linux/mutex.h> | |
19 | #include <linux/delay.h> | |
4b5e536b | 20 | #include <linux/interrupt.h> |
f5320701 | 21 | #include <linux/regmap.h> |
51c2a487 LPC |
22 | |
23 | #include "adt7x10.h" | |
24 | ||
25 | /* | |
26 | * ADT7X10 status | |
27 | */ | |
28 | #define ADT7X10_STAT_T_LOW (1 << 4) | |
29 | #define ADT7X10_STAT_T_HIGH (1 << 5) | |
30 | #define ADT7X10_STAT_T_CRIT (1 << 6) | |
31 | #define ADT7X10_STAT_NOT_RDY (1 << 7) | |
32 | ||
33 | /* | |
34 | * ADT7X10 config | |
35 | */ | |
36 | #define ADT7X10_FAULT_QUEUE_MASK (1 << 0 | 1 << 1) | |
37 | #define ADT7X10_CT_POLARITY (1 << 2) | |
38 | #define ADT7X10_INT_POLARITY (1 << 3) | |
39 | #define ADT7X10_EVENT_MODE (1 << 4) | |
40 | #define ADT7X10_MODE_MASK (1 << 5 | 1 << 6) | |
41 | #define ADT7X10_FULL (0 << 5 | 0 << 6) | |
42 | #define ADT7X10_PD (1 << 5 | 1 << 6) | |
43 | #define ADT7X10_RESOLUTION (1 << 7) | |
44 | ||
45 | /* | |
46 | * ADT7X10 masks | |
47 | */ | |
48 | #define ADT7X10_T13_VALUE_MASK 0xFFF8 | |
49 | #define ADT7X10_T_HYST_MASK 0xF | |
50 | ||
51 | /* straight from the datasheet */ | |
52 | #define ADT7X10_TEMP_MIN (-55000) | |
53 | #define ADT7X10_TEMP_MAX 150000 | |
54 | ||
55 | /* Each client has this additional data */ | |
56 | struct adt7x10_data { | |
f5320701 | 57 | struct regmap *regmap; |
51c2a487 LPC |
58 | struct mutex update_lock; |
59 | u8 config; | |
60 | u8 oldconfig; | |
f5320701 | 61 | bool valid; /* true if temperature valid */ |
51c2a487 LPC |
62 | }; |
63 | ||
a748d30c CT |
64 | enum { |
65 | adt7x10_temperature = 0, | |
66 | adt7x10_t_alarm_high, | |
67 | adt7x10_t_alarm_low, | |
68 | adt7x10_t_crit, | |
69 | }; | |
70 | ||
71 | static const u8 ADT7X10_REG_TEMP[] = { | |
72 | [adt7x10_temperature] = ADT7X10_TEMPERATURE, /* input */ | |
73 | [adt7x10_t_alarm_high] = ADT7X10_T_ALARM_HIGH, /* high */ | |
74 | [adt7x10_t_alarm_low] = ADT7X10_T_ALARM_LOW, /* low */ | |
75 | [adt7x10_t_crit] = ADT7X10_T_CRIT, /* critical */ | |
51c2a487 LPC |
76 | }; |
77 | ||
4b5e536b LPC |
78 | static irqreturn_t adt7x10_irq_handler(int irq, void *private) |
79 | { | |
80 | struct device *dev = private; | |
f5320701 GR |
81 | struct adt7x10_data *d = dev_get_drvdata(dev); |
82 | unsigned int status; | |
83 | int ret; | |
4b5e536b | 84 | |
f5320701 GR |
85 | ret = regmap_read(d->regmap, ADT7X10_STATUS, &status); |
86 | if (ret < 0) | |
4b5e536b LPC |
87 | return IRQ_HANDLED; |
88 | ||
89 | if (status & ADT7X10_STAT_T_HIGH) | |
a7a5731a | 90 | hwmon_notify_event(dev, hwmon_temp, hwmon_temp_max_alarm, 0); |
4b5e536b | 91 | if (status & ADT7X10_STAT_T_LOW) |
a7a5731a | 92 | hwmon_notify_event(dev, hwmon_temp, hwmon_temp_min_alarm, 0); |
4b5e536b | 93 | if (status & ADT7X10_STAT_T_CRIT) |
a7a5731a | 94 | hwmon_notify_event(dev, hwmon_temp, hwmon_temp_crit_alarm, 0); |
4b5e536b LPC |
95 | |
96 | return IRQ_HANDLED; | |
97 | } | |
98 | ||
f5320701 | 99 | static int adt7x10_temp_ready(struct regmap *regmap) |
51c2a487 | 100 | { |
f5320701 GR |
101 | unsigned int status; |
102 | int i, ret; | |
51c2a487 LPC |
103 | |
104 | for (i = 0; i < 6; i++) { | |
f5320701 GR |
105 | ret = regmap_read(regmap, ADT7X10_STATUS, &status); |
106 | if (ret < 0) | |
107 | return ret; | |
51c2a487 LPC |
108 | if (!(status & ADT7X10_STAT_NOT_RDY)) |
109 | return 0; | |
110 | msleep(60); | |
111 | } | |
112 | return -ETIMEDOUT; | |
113 | } | |
114 | ||
51c2a487 LPC |
115 | static s16 ADT7X10_TEMP_TO_REG(long temp) |
116 | { | |
117 | return DIV_ROUND_CLOSEST(clamp_val(temp, ADT7X10_TEMP_MIN, | |
f5320701 | 118 | ADT7X10_TEMP_MAX) * 128, 1000); |
51c2a487 LPC |
119 | } |
120 | ||
121 | static int ADT7X10_REG_TO_TEMP(struct adt7x10_data *data, s16 reg) | |
122 | { | |
123 | /* in 13 bit mode, bits 0-2 are status flags - mask them out */ | |
124 | if (!(data->config & ADT7X10_RESOLUTION)) | |
125 | reg &= ADT7X10_T13_VALUE_MASK; | |
126 | /* | |
127 | * temperature is stored in twos complement format, in steps of | |
128 | * 1/128°C | |
129 | */ | |
130 | return DIV_ROUND_CLOSEST(reg * 1000, 128); | |
131 | } | |
132 | ||
133 | /*-----------------------------------------------------------------------*/ | |
134 | ||
a748d30c | 135 | static int adt7x10_temp_read(struct adt7x10_data *data, int index, long *val) |
51c2a487 | 136 | { |
a748d30c | 137 | unsigned int regval; |
f5320701 | 138 | int ret; |
51c2a487 | 139 | |
f5320701 | 140 | mutex_lock(&data->update_lock); |
a748d30c | 141 | if (index == adt7x10_temperature && !data->valid) { |
f5320701 GR |
142 | /* wait for valid temperature */ |
143 | ret = adt7x10_temp_ready(data->regmap); | |
144 | if (ret) { | |
145 | mutex_unlock(&data->update_lock); | |
51c2a487 | 146 | return ret; |
f5320701 GR |
147 | } |
148 | data->valid = true; | |
51c2a487 | 149 | } |
f5320701 | 150 | mutex_unlock(&data->update_lock); |
51c2a487 | 151 | |
a748d30c | 152 | ret = regmap_read(data->regmap, ADT7X10_REG_TEMP[index], ®val); |
f5320701 GR |
153 | if (ret) |
154 | return ret; | |
155 | ||
a748d30c CT |
156 | *val = ADT7X10_REG_TO_TEMP(data, regval); |
157 | return 0; | |
51c2a487 LPC |
158 | } |
159 | ||
a748d30c | 160 | static int adt7x10_temp_write(struct adt7x10_data *data, int index, long temp) |
51c2a487 | 161 | { |
51c2a487 LPC |
162 | int ret; |
163 | ||
51c2a487 | 164 | mutex_lock(&data->update_lock); |
a748d30c | 165 | ret = regmap_write(data->regmap, ADT7X10_REG_TEMP[index], |
f5320701 | 166 | ADT7X10_TEMP_TO_REG(temp)); |
51c2a487 | 167 | mutex_unlock(&data->update_lock); |
a748d30c | 168 | return ret; |
51c2a487 LPC |
169 | } |
170 | ||
a748d30c | 171 | static int adt7x10_hyst_read(struct adt7x10_data *data, int index, long *val) |
51c2a487 | 172 | { |
f5320701 GR |
173 | int hyst, temp, ret; |
174 | ||
175 | mutex_lock(&data->update_lock); | |
176 | ret = regmap_read(data->regmap, ADT7X10_T_HYST, &hyst); | |
177 | if (ret) { | |
178 | mutex_unlock(&data->update_lock); | |
179 | return ret; | |
180 | } | |
181 | ||
a748d30c | 182 | ret = regmap_read(data->regmap, ADT7X10_REG_TEMP[index], &temp); |
f5320701 GR |
183 | mutex_unlock(&data->update_lock); |
184 | if (ret) | |
185 | return ret; | |
51c2a487 | 186 | |
f5320701 | 187 | hyst = (hyst & ADT7X10_T_HYST_MASK) * 1000; |
51c2a487 LPC |
188 | |
189 | /* | |
190 | * hysteresis is stored as a 4 bit offset in the device, convert it | |
191 | * to an absolute value | |
192 | */ | |
a748d30c CT |
193 | /* min has positive offset, others have negative */ |
194 | if (index == adt7x10_t_alarm_low) | |
51c2a487 | 195 | hyst = -hyst; |
f5320701 | 196 | |
a748d30c CT |
197 | *val = ADT7X10_REG_TO_TEMP(data, temp) - hyst; |
198 | return 0; | |
51c2a487 LPC |
199 | } |
200 | ||
a748d30c | 201 | static int adt7x10_hyst_write(struct adt7x10_data *data, long hyst) |
51c2a487 | 202 | { |
f5320701 | 203 | unsigned int regval; |
51c2a487 | 204 | int limit, ret; |
f5320701 GR |
205 | |
206 | mutex_lock(&data->update_lock); | |
207 | ||
51c2a487 | 208 | /* convert absolute hysteresis value to a 4 bit delta value */ |
f5320701 GR |
209 | ret = regmap_read(data->regmap, ADT7X10_T_ALARM_HIGH, ®val); |
210 | if (ret < 0) | |
211 | goto abort; | |
51c2a487 | 212 | |
f5320701 GR |
213 | limit = ADT7X10_REG_TO_TEMP(data, regval); |
214 | ||
215 | hyst = clamp_val(hyst, ADT7X10_TEMP_MIN, ADT7X10_TEMP_MAX); | |
216 | regval = clamp_val(DIV_ROUND_CLOSEST(limit - hyst, 1000), 0, | |
217 | ADT7X10_T_HYST_MASK); | |
218 | ret = regmap_write(data->regmap, ADT7X10_T_HYST, regval); | |
219 | abort: | |
220 | mutex_unlock(&data->update_lock); | |
a748d30c | 221 | return ret; |
51c2a487 LPC |
222 | } |
223 | ||
a748d30c | 224 | static int adt7x10_alarm_read(struct adt7x10_data *data, int index, long *val) |
51c2a487 | 225 | { |
f5320701 | 226 | unsigned int status; |
51c2a487 LPC |
227 | int ret; |
228 | ||
f5320701 | 229 | ret = regmap_read(data->regmap, ADT7X10_STATUS, &status); |
51c2a487 LPC |
230 | if (ret < 0) |
231 | return ret; | |
232 | ||
a748d30c CT |
233 | *val = !!(status & index); |
234 | ||
235 | return 0; | |
51c2a487 LPC |
236 | } |
237 | ||
a748d30c CT |
238 | static umode_t adt7x10_is_visible(const void *data, |
239 | enum hwmon_sensor_types type, | |
240 | u32 attr, int channel) | |
241 | { | |
242 | switch (attr) { | |
243 | case hwmon_temp_max: | |
244 | case hwmon_temp_min: | |
245 | case hwmon_temp_crit: | |
246 | case hwmon_temp_max_hyst: | |
247 | return 0644; | |
248 | case hwmon_temp_input: | |
249 | case hwmon_temp_min_alarm: | |
250 | case hwmon_temp_max_alarm: | |
251 | case hwmon_temp_crit_alarm: | |
252 | case hwmon_temp_min_hyst: | |
253 | case hwmon_temp_crit_hyst: | |
254 | return 0444; | |
255 | default: | |
256 | break; | |
257 | } | |
258 | ||
259 | return 0; | |
260 | } | |
261 | ||
262 | static int adt7x10_read(struct device *dev, enum hwmon_sensor_types type, | |
263 | u32 attr, int channel, long *val) | |
51c2a487 LPC |
264 | { |
265 | struct adt7x10_data *data = dev_get_drvdata(dev); | |
266 | ||
a748d30c CT |
267 | switch (attr) { |
268 | case hwmon_temp_input: | |
269 | return adt7x10_temp_read(data, adt7x10_temperature, val); | |
270 | case hwmon_temp_max: | |
271 | return adt7x10_temp_read(data, adt7x10_t_alarm_high, val); | |
272 | case hwmon_temp_min: | |
273 | return adt7x10_temp_read(data, adt7x10_t_alarm_low, val); | |
274 | case hwmon_temp_crit: | |
275 | return adt7x10_temp_read(data, adt7x10_t_crit, val); | |
276 | case hwmon_temp_max_hyst: | |
277 | return adt7x10_hyst_read(data, adt7x10_t_alarm_high, val); | |
278 | case hwmon_temp_min_hyst: | |
279 | return adt7x10_hyst_read(data, adt7x10_t_alarm_low, val); | |
280 | case hwmon_temp_crit_hyst: | |
281 | return adt7x10_hyst_read(data, adt7x10_t_crit, val); | |
282 | case hwmon_temp_min_alarm: | |
283 | return adt7x10_alarm_read(data, ADT7X10_STAT_T_LOW, val); | |
284 | case hwmon_temp_max_alarm: | |
285 | return adt7x10_alarm_read(data, ADT7X10_STAT_T_HIGH, val); | |
286 | case hwmon_temp_crit_alarm: | |
287 | return adt7x10_alarm_read(data, ADT7X10_STAT_T_CRIT, val); | |
288 | default: | |
289 | return -EOPNOTSUPP; | |
290 | } | |
51c2a487 LPC |
291 | } |
292 | ||
a748d30c CT |
293 | static int adt7x10_write(struct device *dev, enum hwmon_sensor_types type, |
294 | u32 attr, int channel, long val) | |
295 | { | |
296 | struct adt7x10_data *data = dev_get_drvdata(dev); | |
297 | ||
298 | switch (attr) { | |
299 | case hwmon_temp_max: | |
300 | return adt7x10_temp_write(data, adt7x10_t_alarm_high, val); | |
301 | case hwmon_temp_min: | |
302 | return adt7x10_temp_write(data, adt7x10_t_alarm_low, val); | |
303 | case hwmon_temp_crit: | |
304 | return adt7x10_temp_write(data, adt7x10_t_crit, val); | |
305 | case hwmon_temp_max_hyst: | |
306 | return adt7x10_hyst_write(data, val); | |
307 | default: | |
308 | return -EOPNOTSUPP; | |
309 | } | |
310 | } | |
311 | ||
d7bb04c3 | 312 | static const struct hwmon_channel_info * const adt7x10_info[] = { |
a748d30c CT |
313 | HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MIN | |
314 | HWMON_T_CRIT | HWMON_T_MAX_HYST | HWMON_T_MIN_HYST | | |
315 | HWMON_T_CRIT_HYST | HWMON_T_MIN_ALARM | | |
316 | HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM), | |
317 | NULL, | |
318 | }; | |
319 | ||
320 | static const struct hwmon_ops adt7x10_hwmon_ops = { | |
321 | .is_visible = adt7x10_is_visible, | |
322 | .read = adt7x10_read, | |
323 | .write = adt7x10_write, | |
51c2a487 LPC |
324 | }; |
325 | ||
a748d30c CT |
326 | static const struct hwmon_chip_info adt7x10_chip_info = { |
327 | .ops = &adt7x10_hwmon_ops, | |
328 | .info = adt7x10_info, | |
51c2a487 LPC |
329 | }; |
330 | ||
af910e92 CT |
331 | static void adt7x10_restore_config(void *private) |
332 | { | |
333 | struct adt7x10_data *data = private; | |
334 | ||
335 | regmap_write(data->regmap, ADT7X10_CONFIG, data->oldconfig); | |
336 | } | |
337 | ||
4b5e536b | 338 | int adt7x10_probe(struct device *dev, const char *name, int irq, |
f5320701 | 339 | struct regmap *regmap) |
51c2a487 LPC |
340 | { |
341 | struct adt7x10_data *data; | |
f5320701 | 342 | unsigned int config; |
a748d30c | 343 | struct device *hdev; |
51c2a487 LPC |
344 | int ret; |
345 | ||
346 | data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); | |
347 | if (!data) | |
348 | return -ENOMEM; | |
349 | ||
f5320701 | 350 | data->regmap = regmap; |
51c2a487 LPC |
351 | |
352 | dev_set_drvdata(dev, data); | |
353 | mutex_init(&data->update_lock); | |
354 | ||
355 | /* configure as specified */ | |
f5320701 | 356 | ret = regmap_read(regmap, ADT7X10_CONFIG, &config); |
51c2a487 LPC |
357 | if (ret < 0) { |
358 | dev_dbg(dev, "Can't read config? %d\n", ret); | |
359 | return ret; | |
360 | } | |
f5320701 | 361 | data->oldconfig = config; |
51c2a487 LPC |
362 | |
363 | /* | |
364 | * Set to 16 bit resolution, continous conversion and comparator mode. | |
365 | */ | |
366 | data->config = data->oldconfig; | |
4b5e536b LPC |
367 | data->config &= ~(ADT7X10_MODE_MASK | ADT7X10_CT_POLARITY | |
368 | ADT7X10_INT_POLARITY); | |
51c2a487 | 369 | data->config |= ADT7X10_FULL | ADT7X10_RESOLUTION | ADT7X10_EVENT_MODE; |
4b5e536b | 370 | |
51c2a487 | 371 | if (data->config != data->oldconfig) { |
f5320701 | 372 | ret = regmap_write(regmap, ADT7X10_CONFIG, data->config); |
51c2a487 LPC |
373 | if (ret) |
374 | return ret; | |
af910e92 CT |
375 | ret = devm_add_action_or_reset(dev, adt7x10_restore_config, data); |
376 | if (ret) | |
377 | return ret; | |
51c2a487 LPC |
378 | } |
379 | dev_dbg(dev, "Config %02x\n", data->config); | |
380 | ||
a748d30c CT |
381 | hdev = devm_hwmon_device_register_with_info(dev, name, data, |
382 | &adt7x10_chip_info, NULL); | |
383 | if (IS_ERR(hdev)) | |
384 | return PTR_ERR(hdev); | |
51c2a487 | 385 | |
4b5e536b | 386 | if (irq > 0) { |
f691adc3 CT |
387 | ret = devm_request_threaded_irq(dev, irq, NULL, |
388 | adt7x10_irq_handler, | |
389 | IRQF_TRIGGER_FALLING | | |
390 | IRQF_ONESHOT, | |
a7a5731a | 391 | dev_name(dev), hdev); |
4b5e536b | 392 | if (ret) |
a748d30c | 393 | return ret; |
4b5e536b LPC |
394 | } |
395 | ||
51c2a487 | 396 | return 0; |
51c2a487 LPC |
397 | } |
398 | EXPORT_SYMBOL_GPL(adt7x10_probe); | |
399 | ||
51c2a487 LPC |
400 | static int adt7x10_suspend(struct device *dev) |
401 | { | |
402 | struct adt7x10_data *data = dev_get_drvdata(dev); | |
403 | ||
f5320701 GR |
404 | return regmap_write(data->regmap, ADT7X10_CONFIG, |
405 | data->config | ADT7X10_PD); | |
51c2a487 LPC |
406 | } |
407 | ||
408 | static int adt7x10_resume(struct device *dev) | |
409 | { | |
410 | struct adt7x10_data *data = dev_get_drvdata(dev); | |
411 | ||
f5320701 | 412 | return regmap_write(data->regmap, ADT7X10_CONFIG, data->config); |
51c2a487 LPC |
413 | } |
414 | ||
29805956 | 415 | EXPORT_SIMPLE_DEV_PM_OPS(adt7x10_dev_pm_ops, adt7x10_suspend, adt7x10_resume); |
51c2a487 LPC |
416 | |
417 | MODULE_AUTHOR("Hartmut Knaack"); | |
418 | MODULE_DESCRIPTION("ADT7410/ADT7420, ADT7310/ADT7320 common code"); | |
419 | MODULE_LICENSE("GPL"); |