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Commit | Line | Data |
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bebe4678 RM |
1 | /* |
2 | * coretemp.c - Linux kernel module for hardware monitoring | |
3 | * | |
4 | * Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz> | |
5 | * | |
6 | * Inspired from many hwmon drivers | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; version 2 of the License. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA | |
20 | * 02110-1301 USA. | |
21 | */ | |
22 | ||
f8bb8925 JP |
23 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
24 | ||
bebe4678 | 25 | #include <linux/module.h> |
bebe4678 RM |
26 | #include <linux/init.h> |
27 | #include <linux/slab.h> | |
28 | #include <linux/jiffies.h> | |
29 | #include <linux/hwmon.h> | |
30 | #include <linux/sysfs.h> | |
31 | #include <linux/hwmon-sysfs.h> | |
32 | #include <linux/err.h> | |
33 | #include <linux/mutex.h> | |
34 | #include <linux/list.h> | |
35 | #include <linux/platform_device.h> | |
36 | #include <linux/cpu.h> | |
1fe63ab4 | 37 | #include <linux/pci.h> |
4cc45275 | 38 | #include <linux/smp.h> |
bebe4678 RM |
39 | #include <asm/msr.h> |
40 | #include <asm/processor.h> | |
41 | ||
42 | #define DRVNAME "coretemp" | |
43 | ||
199e0de7 D |
44 | #define BASE_SYSFS_ATTR_NO 2 /* Sysfs Base attr no for coretemp */ |
45 | #define NUM_REAL_CORES 16 /* Number of Real cores per cpu */ | |
46 | #define CORETEMP_NAME_LENGTH 17 /* String Length of attrs */ | |
47 | #define MAX_ATTRS 5 /* Maximum no of per-core attrs */ | |
48 | #define MAX_CORE_DATA (NUM_REAL_CORES + BASE_SYSFS_ATTR_NO) | |
49 | ||
50 | #ifdef CONFIG_SMP | |
51 | #define TO_PHYS_ID(cpu) cpu_data(cpu).phys_proc_id | |
52 | #define TO_CORE_ID(cpu) cpu_data(cpu).cpu_core_id | |
53 | #define TO_ATTR_NO(cpu) (TO_CORE_ID(cpu) + BASE_SYSFS_ATTR_NO) | |
bb74e8ca | 54 | #define for_each_sibling(i, cpu) for_each_cpu(i, cpu_sibling_mask(cpu)) |
199e0de7 D |
55 | #else |
56 | #define TO_PHYS_ID(cpu) (cpu) | |
57 | #define TO_CORE_ID(cpu) (cpu) | |
58 | #define TO_ATTR_NO(cpu) (cpu) | |
bb74e8ca | 59 | #define for_each_sibling(i, cpu) for (i = 0; false; ) |
199e0de7 | 60 | #endif |
bebe4678 RM |
61 | |
62 | /* | |
199e0de7 D |
63 | * Per-Core Temperature Data |
64 | * @last_updated: The time when the current temperature value was updated | |
65 | * earlier (in jiffies). | |
66 | * @cpu_core_id: The CPU Core from which temperature values should be read | |
67 | * This value is passed as "id" field to rdmsr/wrmsr functions. | |
68 | * @status_reg: One of IA32_THERM_STATUS or IA32_PACKAGE_THERM_STATUS, | |
69 | * from where the temperature values should be read. | |
70 | * @is_pkg_data: If this is 1, the temp_data holds pkgtemp data. | |
71 | * Otherwise, temp_data holds coretemp data. | |
72 | * @valid: If this is 1, the current temperature is valid. | |
bebe4678 | 73 | */ |
199e0de7 | 74 | struct temp_data { |
bebe4678 | 75 | int temp; |
6369a288 | 76 | int ttarget; |
199e0de7 D |
77 | int tjmax; |
78 | unsigned long last_updated; | |
79 | unsigned int cpu; | |
80 | u32 cpu_core_id; | |
81 | u32 status_reg; | |
82 | bool is_pkg_data; | |
83 | bool valid; | |
84 | struct sensor_device_attribute sd_attrs[MAX_ATTRS]; | |
85 | char attr_name[MAX_ATTRS][CORETEMP_NAME_LENGTH]; | |
86 | struct mutex update_lock; | |
bebe4678 RM |
87 | }; |
88 | ||
199e0de7 D |
89 | /* Platform Data per Physical CPU */ |
90 | struct platform_data { | |
91 | struct device *hwmon_dev; | |
92 | u16 phys_proc_id; | |
93 | struct temp_data *core_data[MAX_CORE_DATA]; | |
94 | struct device_attribute name_attr; | |
95 | }; | |
bebe4678 | 96 | |
199e0de7 D |
97 | struct pdev_entry { |
98 | struct list_head list; | |
99 | struct platform_device *pdev; | |
100 | unsigned int cpu; | |
101 | u16 phys_proc_id; | |
102 | u16 cpu_core_id; | |
103 | }; | |
104 | ||
105 | static LIST_HEAD(pdev_list); | |
106 | static DEFINE_MUTEX(pdev_list_mutex); | |
107 | ||
108 | static ssize_t show_name(struct device *dev, | |
109 | struct device_attribute *devattr, char *buf) | |
110 | { | |
111 | return sprintf(buf, "%s\n", DRVNAME); | |
112 | } | |
113 | ||
114 | static ssize_t show_label(struct device *dev, | |
115 | struct device_attribute *devattr, char *buf) | |
bebe4678 | 116 | { |
bebe4678 | 117 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); |
199e0de7 D |
118 | struct platform_data *pdata = dev_get_drvdata(dev); |
119 | struct temp_data *tdata = pdata->core_data[attr->index]; | |
120 | ||
121 | if (tdata->is_pkg_data) | |
122 | return sprintf(buf, "Physical id %u\n", pdata->phys_proc_id); | |
bebe4678 | 123 | |
199e0de7 | 124 | return sprintf(buf, "Core %u\n", tdata->cpu_core_id); |
bebe4678 RM |
125 | } |
126 | ||
199e0de7 D |
127 | static ssize_t show_crit_alarm(struct device *dev, |
128 | struct device_attribute *devattr, char *buf) | |
bebe4678 | 129 | { |
199e0de7 D |
130 | u32 eax, edx; |
131 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
132 | struct platform_data *pdata = dev_get_drvdata(dev); | |
133 | struct temp_data *tdata = pdata->core_data[attr->index]; | |
134 | ||
135 | rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx); | |
136 | ||
137 | return sprintf(buf, "%d\n", (eax >> 5) & 1); | |
bebe4678 RM |
138 | } |
139 | ||
199e0de7 D |
140 | static ssize_t show_tjmax(struct device *dev, |
141 | struct device_attribute *devattr, char *buf) | |
bebe4678 RM |
142 | { |
143 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
199e0de7 | 144 | struct platform_data *pdata = dev_get_drvdata(dev); |
bebe4678 | 145 | |
199e0de7 | 146 | return sprintf(buf, "%d\n", pdata->core_data[attr->index]->tjmax); |
bebe4678 RM |
147 | } |
148 | ||
199e0de7 D |
149 | static ssize_t show_ttarget(struct device *dev, |
150 | struct device_attribute *devattr, char *buf) | |
151 | { | |
152 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
153 | struct platform_data *pdata = dev_get_drvdata(dev); | |
bebe4678 | 154 | |
199e0de7 D |
155 | return sprintf(buf, "%d\n", pdata->core_data[attr->index]->ttarget); |
156 | } | |
bebe4678 | 157 | |
199e0de7 D |
158 | static ssize_t show_temp(struct device *dev, |
159 | struct device_attribute *devattr, char *buf) | |
bebe4678 | 160 | { |
199e0de7 D |
161 | u32 eax, edx; |
162 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
163 | struct platform_data *pdata = dev_get_drvdata(dev); | |
164 | struct temp_data *tdata = pdata->core_data[attr->index]; | |
bebe4678 | 165 | |
199e0de7 | 166 | mutex_lock(&tdata->update_lock); |
bebe4678 | 167 | |
199e0de7 D |
168 | /* Check whether the time interval has elapsed */ |
169 | if (!tdata->valid || time_after(jiffies, tdata->last_updated + HZ)) { | |
170 | rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx); | |
171 | tdata->valid = 0; | |
172 | /* Check whether the data is valid */ | |
bebe4678 | 173 | if (eax & 0x80000000) { |
199e0de7 | 174 | tdata->temp = tdata->tjmax - |
4cc45275 | 175 | ((eax >> 16) & 0x7f) * 1000; |
199e0de7 | 176 | tdata->valid = 1; |
bebe4678 | 177 | } |
199e0de7 | 178 | tdata->last_updated = jiffies; |
bebe4678 RM |
179 | } |
180 | ||
199e0de7 D |
181 | mutex_unlock(&tdata->update_lock); |
182 | return tdata->valid ? sprintf(buf, "%d\n", tdata->temp) : -EAGAIN; | |
bebe4678 RM |
183 | } |
184 | ||
199e0de7 | 185 | static int adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev) |
118a8871 RM |
186 | { |
187 | /* The 100C is default for both mobile and non mobile CPUs */ | |
188 | ||
189 | int tjmax = 100000; | |
eccfed42 | 190 | int tjmax_ee = 85000; |
708a62bc | 191 | int usemsr_ee = 1; |
118a8871 RM |
192 | int err; |
193 | u32 eax, edx; | |
1fe63ab4 | 194 | struct pci_dev *host_bridge; |
118a8871 RM |
195 | |
196 | /* Early chips have no MSR for TjMax */ | |
197 | ||
4cc45275 | 198 | if (c->x86_model == 0xf && c->x86_mask < 4) |
708a62bc | 199 | usemsr_ee = 0; |
118a8871 | 200 | |
1fe63ab4 | 201 | /* Atom CPUs */ |
708a62bc RM |
202 | |
203 | if (c->x86_model == 0x1c) { | |
204 | usemsr_ee = 0; | |
1fe63ab4 YW |
205 | |
206 | host_bridge = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0)); | |
207 | ||
208 | if (host_bridge && host_bridge->vendor == PCI_VENDOR_ID_INTEL | |
209 | && (host_bridge->device == 0xa000 /* NM10 based nettop */ | |
210 | || host_bridge->device == 0xa010)) /* NM10 based netbook */ | |
211 | tjmax = 100000; | |
212 | else | |
213 | tjmax = 90000; | |
214 | ||
215 | pci_dev_put(host_bridge); | |
708a62bc RM |
216 | } |
217 | ||
4cc45275 | 218 | if (c->x86_model > 0xe && usemsr_ee) { |
eccfed42 | 219 | u8 platform_id; |
118a8871 | 220 | |
4cc45275 GR |
221 | /* |
222 | * Now we can detect the mobile CPU using Intel provided table | |
223 | * http://softwarecommunity.intel.com/Wiki/Mobility/720.htm | |
224 | * For Core2 cores, check MSR 0x17, bit 28 1 = Mobile CPU | |
225 | */ | |
118a8871 RM |
226 | err = rdmsr_safe_on_cpu(id, 0x17, &eax, &edx); |
227 | if (err) { | |
228 | dev_warn(dev, | |
229 | "Unable to access MSR 0x17, assuming desktop" | |
230 | " CPU\n"); | |
708a62bc | 231 | usemsr_ee = 0; |
eccfed42 | 232 | } else if (c->x86_model < 0x17 && !(eax & 0x10000000)) { |
4cc45275 GR |
233 | /* |
234 | * Trust bit 28 up to Penryn, I could not find any | |
235 | * documentation on that; if you happen to know | |
236 | * someone at Intel please ask | |
237 | */ | |
708a62bc | 238 | usemsr_ee = 0; |
eccfed42 RM |
239 | } else { |
240 | /* Platform ID bits 52:50 (EDX starts at bit 32) */ | |
241 | platform_id = (edx >> 18) & 0x7; | |
242 | ||
4cc45275 GR |
243 | /* |
244 | * Mobile Penryn CPU seems to be platform ID 7 or 5 | |
245 | * (guesswork) | |
246 | */ | |
247 | if (c->x86_model == 0x17 && | |
248 | (platform_id == 5 || platform_id == 7)) { | |
249 | /* | |
250 | * If MSR EE bit is set, set it to 90 degrees C, | |
251 | * otherwise 105 degrees C | |
252 | */ | |
eccfed42 RM |
253 | tjmax_ee = 90000; |
254 | tjmax = 105000; | |
255 | } | |
118a8871 RM |
256 | } |
257 | } | |
258 | ||
708a62bc | 259 | if (usemsr_ee) { |
118a8871 RM |
260 | err = rdmsr_safe_on_cpu(id, 0xee, &eax, &edx); |
261 | if (err) { | |
262 | dev_warn(dev, | |
263 | "Unable to access MSR 0xEE, for Tjmax, left" | |
4d7a5644 | 264 | " at default\n"); |
118a8871 | 265 | } else if (eax & 0x40000000) { |
eccfed42 | 266 | tjmax = tjmax_ee; |
118a8871 | 267 | } |
708a62bc | 268 | } else if (tjmax == 100000) { |
4cc45275 GR |
269 | /* |
270 | * If we don't use msr EE it means we are desktop CPU | |
271 | * (with exeception of Atom) | |
272 | */ | |
118a8871 RM |
273 | dev_warn(dev, "Using relative temperature scale!\n"); |
274 | } | |
275 | ||
276 | return tjmax; | |
277 | } | |
278 | ||
199e0de7 | 279 | static int get_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev) |
a321cedb CE |
280 | { |
281 | /* The 100C is default for both mobile and non mobile CPUs */ | |
282 | int err; | |
283 | u32 eax, edx; | |
284 | u32 val; | |
285 | ||
4cc45275 GR |
286 | /* |
287 | * A new feature of current Intel(R) processors, the | |
288 | * IA32_TEMPERATURE_TARGET contains the TjMax value | |
289 | */ | |
a321cedb CE |
290 | err = rdmsr_safe_on_cpu(id, MSR_IA32_TEMPERATURE_TARGET, &eax, &edx); |
291 | if (err) { | |
292 | dev_warn(dev, "Unable to read TjMax from CPU.\n"); | |
293 | } else { | |
294 | val = (eax >> 16) & 0xff; | |
295 | /* | |
296 | * If the TjMax is not plausible, an assumption | |
297 | * will be used | |
298 | */ | |
4c6e0f81 | 299 | if (val >= 70 && val <= 125) { |
a321cedb CE |
300 | dev_info(dev, "TjMax is %d C.\n", val); |
301 | return val * 1000; | |
302 | } | |
303 | } | |
304 | ||
305 | /* | |
306 | * An assumption is made for early CPUs and unreadable MSR. | |
4f5f71a7 | 307 | * NOTE: the calculated value may not be correct. |
a321cedb | 308 | */ |
4f5f71a7 | 309 | return adjust_tjmax(c, id, dev); |
a321cedb CE |
310 | } |
311 | ||
32478006 JB |
312 | static void __devinit get_ucode_rev_on_cpu(void *edx) |
313 | { | |
314 | u32 eax; | |
315 | ||
316 | wrmsr(MSR_IA32_UCODE_REV, 0, 0); | |
317 | sync_core(); | |
318 | rdmsr(MSR_IA32_UCODE_REV, eax, *(u32 *)edx); | |
319 | } | |
320 | ||
199e0de7 | 321 | static int get_pkg_tjmax(unsigned int cpu, struct device *dev) |
bebe4678 | 322 | { |
bebe4678 | 323 | int err; |
199e0de7 | 324 | u32 eax, edx, val; |
bebe4678 | 325 | |
199e0de7 D |
326 | err = rdmsr_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET, &eax, &edx); |
327 | if (!err) { | |
328 | val = (eax >> 16) & 0xff; | |
4cc45275 | 329 | if (val > 80 && val < 120) |
199e0de7 | 330 | return val * 1000; |
bebe4678 | 331 | } |
199e0de7 D |
332 | dev_warn(dev, "Unable to read Pkg-TjMax from CPU:%u\n", cpu); |
333 | return 100000; /* Default TjMax: 100 degree celsius */ | |
334 | } | |
bebe4678 | 335 | |
199e0de7 D |
336 | static int create_name_attr(struct platform_data *pdata, struct device *dev) |
337 | { | |
4258781a | 338 | sysfs_attr_init(&pdata->name_attr.attr); |
199e0de7 D |
339 | pdata->name_attr.attr.name = "name"; |
340 | pdata->name_attr.attr.mode = S_IRUGO; | |
341 | pdata->name_attr.show = show_name; | |
342 | return device_create_file(dev, &pdata->name_attr); | |
343 | } | |
bebe4678 | 344 | |
199e0de7 D |
345 | static int create_core_attrs(struct temp_data *tdata, struct device *dev, |
346 | int attr_no) | |
347 | { | |
348 | int err, i; | |
349 | static ssize_t (*rd_ptr[MAX_ATTRS]) (struct device *dev, | |
350 | struct device_attribute *devattr, char *buf) = { | |
351 | show_label, show_crit_alarm, show_ttarget, | |
352 | show_temp, show_tjmax }; | |
353 | static const char *names[MAX_ATTRS] = { | |
354 | "temp%d_label", "temp%d_crit_alarm", | |
355 | "temp%d_max", "temp%d_input", | |
356 | "temp%d_crit" }; | |
357 | ||
358 | for (i = 0; i < MAX_ATTRS; i++) { | |
359 | snprintf(tdata->attr_name[i], CORETEMP_NAME_LENGTH, names[i], | |
360 | attr_no); | |
4258781a | 361 | sysfs_attr_init(&tdata->sd_attrs[i].dev_attr.attr); |
199e0de7 D |
362 | tdata->sd_attrs[i].dev_attr.attr.name = tdata->attr_name[i]; |
363 | tdata->sd_attrs[i].dev_attr.attr.mode = S_IRUGO; | |
364 | tdata->sd_attrs[i].dev_attr.show = rd_ptr[i]; | |
365 | tdata->sd_attrs[i].dev_attr.store = NULL; | |
366 | tdata->sd_attrs[i].index = attr_no; | |
367 | err = device_create_file(dev, &tdata->sd_attrs[i].dev_attr); | |
368 | if (err) | |
369 | goto exit_free; | |
bebe4678 | 370 | } |
199e0de7 D |
371 | return 0; |
372 | ||
373 | exit_free: | |
374 | while (--i >= 0) | |
375 | device_remove_file(dev, &tdata->sd_attrs[i].dev_attr); | |
376 | return err; | |
377 | } | |
378 | ||
379 | static void update_ttarget(__u8 cpu_model, struct temp_data *tdata, | |
380 | struct device *dev) | |
381 | { | |
382 | int err; | |
383 | u32 eax, edx; | |
384 | ||
385 | /* | |
386 | * Initialize ttarget value. Eventually this will be | |
387 | * initialized with the value from MSR_IA32_THERM_INTERRUPT | |
388 | * register. If IA32_TEMPERATURE_TARGET is supported, this | |
389 | * value will be over written below. | |
390 | * To Do: Patch to initialize ttarget from MSR_IA32_THERM_INTERRUPT | |
391 | */ | |
392 | tdata->ttarget = tdata->tjmax - 20000; | |
bebe4678 | 393 | |
199e0de7 D |
394 | /* |
395 | * Read the still undocumented IA32_TEMPERATURE_TARGET. It exists | |
396 | * on older CPUs but not in this register, | |
397 | * Atoms don't have it either. | |
398 | */ | |
4cc45275 | 399 | if (cpu_model > 0xe && cpu_model != 0x1c) { |
199e0de7 D |
400 | err = rdmsr_safe_on_cpu(tdata->cpu, |
401 | MSR_IA32_TEMPERATURE_TARGET, &eax, &edx); | |
402 | if (err) { | |
403 | dev_warn(dev, | |
404 | "Unable to read IA32_TEMPERATURE_TARGET MSR\n"); | |
405 | } else { | |
406 | tdata->ttarget = tdata->tjmax - | |
4cc45275 | 407 | ((eax >> 8) & 0xff) * 1000; |
199e0de7 D |
408 | } |
409 | } | |
410 | } | |
411 | ||
582e1b27 | 412 | static int __devinit chk_ucode_version(struct platform_device *pdev) |
199e0de7 D |
413 | { |
414 | struct cpuinfo_x86 *c = &cpu_data(pdev->id); | |
415 | int err; | |
416 | u32 edx; | |
67f363b1 | 417 | |
199e0de7 D |
418 | /* |
419 | * Check if we have problem with errata AE18 of Core processors: | |
420 | * Readings might stop update when processor visited too deep sleep, | |
421 | * fixed for stepping D0 (6EC). | |
422 | */ | |
4cc45275 | 423 | if (c->x86_model == 0xe && c->x86_mask < 0xc) { |
67f363b1 | 424 | /* check for microcode update */ |
199e0de7 | 425 | err = smp_call_function_single(pdev->id, get_ucode_rev_on_cpu, |
32478006 JB |
426 | &edx, 1); |
427 | if (err) { | |
428 | dev_err(&pdev->dev, | |
429 | "Cannot determine microcode revision of " | |
199e0de7 D |
430 | "CPU#%u (%d)!\n", pdev->id, err); |
431 | return -ENODEV; | |
32478006 | 432 | } else if (edx < 0x39) { |
67f363b1 RM |
433 | dev_err(&pdev->dev, |
434 | "Errata AE18 not fixed, update BIOS or " | |
435 | "microcode of the CPU!\n"); | |
199e0de7 | 436 | return -ENODEV; |
67f363b1 RM |
437 | } |
438 | } | |
199e0de7 D |
439 | return 0; |
440 | } | |
441 | ||
442 | static struct platform_device *coretemp_get_pdev(unsigned int cpu) | |
443 | { | |
444 | u16 phys_proc_id = TO_PHYS_ID(cpu); | |
445 | struct pdev_entry *p; | |
446 | ||
447 | mutex_lock(&pdev_list_mutex); | |
448 | ||
449 | list_for_each_entry(p, &pdev_list, list) | |
450 | if (p->phys_proc_id == phys_proc_id) { | |
451 | mutex_unlock(&pdev_list_mutex); | |
452 | return p->pdev; | |
453 | } | |
454 | ||
455 | mutex_unlock(&pdev_list_mutex); | |
456 | return NULL; | |
457 | } | |
458 | ||
459 | static struct temp_data *init_temp_data(unsigned int cpu, int pkg_flag) | |
460 | { | |
461 | struct temp_data *tdata; | |
462 | ||
463 | tdata = kzalloc(sizeof(struct temp_data), GFP_KERNEL); | |
464 | if (!tdata) | |
465 | return NULL; | |
466 | ||
467 | tdata->status_reg = pkg_flag ? MSR_IA32_PACKAGE_THERM_STATUS : | |
468 | MSR_IA32_THERM_STATUS; | |
469 | tdata->is_pkg_data = pkg_flag; | |
470 | tdata->cpu = cpu; | |
471 | tdata->cpu_core_id = TO_CORE_ID(cpu); | |
472 | mutex_init(&tdata->update_lock); | |
473 | return tdata; | |
474 | } | |
67f363b1 | 475 | |
199e0de7 D |
476 | static int create_core_data(struct platform_data *pdata, |
477 | struct platform_device *pdev, | |
478 | unsigned int cpu, int pkg_flag) | |
479 | { | |
480 | struct temp_data *tdata; | |
481 | struct cpuinfo_x86 *c = &cpu_data(cpu); | |
482 | u32 eax, edx; | |
483 | int err, attr_no; | |
bebe4678 | 484 | |
a321cedb | 485 | /* |
199e0de7 D |
486 | * Find attr number for sysfs: |
487 | * We map the attr number to core id of the CPU | |
488 | * The attr number is always core id + 2 | |
489 | * The Pkgtemp will always show up as temp1_*, if available | |
a321cedb | 490 | */ |
199e0de7 | 491 | attr_no = pkg_flag ? 1 : TO_ATTR_NO(cpu); |
6369a288 | 492 | |
199e0de7 D |
493 | if (attr_no > MAX_CORE_DATA - 1) |
494 | return -ERANGE; | |
495 | ||
f4e0bcf0 GR |
496 | /* |
497 | * Provide a single set of attributes for all HT siblings of a core | |
498 | * to avoid duplicate sensors (the processor ID and core ID of all | |
6777b9e4 GR |
499 | * HT siblings of a core are the same). |
500 | * Skip if a HT sibling of this core is already registered. | |
f4e0bcf0 GR |
501 | * This is not an error. |
502 | */ | |
199e0de7 D |
503 | if (pdata->core_data[attr_no] != NULL) |
504 | return 0; | |
6369a288 | 505 | |
199e0de7 D |
506 | tdata = init_temp_data(cpu, pkg_flag); |
507 | if (!tdata) | |
508 | return -ENOMEM; | |
bebe4678 | 509 | |
199e0de7 D |
510 | /* Test if we can access the status register */ |
511 | err = rdmsr_safe_on_cpu(cpu, tdata->status_reg, &eax, &edx); | |
512 | if (err) | |
513 | goto exit_free; | |
514 | ||
515 | /* We can access status register. Get Critical Temperature */ | |
516 | if (pkg_flag) | |
517 | tdata->tjmax = get_pkg_tjmax(pdev->id, &pdev->dev); | |
518 | else | |
519 | tdata->tjmax = get_tjmax(c, cpu, &pdev->dev); | |
520 | ||
521 | update_ttarget(c->x86_model, tdata, &pdev->dev); | |
522 | pdata->core_data[attr_no] = tdata; | |
523 | ||
524 | /* Create sysfs interfaces */ | |
525 | err = create_core_attrs(tdata, &pdev->dev, attr_no); | |
526 | if (err) | |
527 | goto exit_free; | |
bebe4678 RM |
528 | |
529 | return 0; | |
199e0de7 D |
530 | exit_free: |
531 | kfree(tdata); | |
532 | return err; | |
533 | } | |
534 | ||
535 | static void coretemp_add_core(unsigned int cpu, int pkg_flag) | |
536 | { | |
537 | struct platform_data *pdata; | |
538 | struct platform_device *pdev = coretemp_get_pdev(cpu); | |
539 | int err; | |
540 | ||
541 | if (!pdev) | |
542 | return; | |
543 | ||
544 | pdata = platform_get_drvdata(pdev); | |
545 | ||
546 | err = create_core_data(pdata, pdev, cpu, pkg_flag); | |
547 | if (err) | |
548 | dev_err(&pdev->dev, "Adding Core %u failed\n", cpu); | |
549 | } | |
550 | ||
551 | static void coretemp_remove_core(struct platform_data *pdata, | |
552 | struct device *dev, int indx) | |
553 | { | |
554 | int i; | |
555 | struct temp_data *tdata = pdata->core_data[indx]; | |
556 | ||
557 | /* Remove the sysfs attributes */ | |
558 | for (i = 0; i < MAX_ATTRS; i++) | |
559 | device_remove_file(dev, &tdata->sd_attrs[i].dev_attr); | |
560 | ||
561 | kfree(pdata->core_data[indx]); | |
562 | pdata->core_data[indx] = NULL; | |
563 | } | |
564 | ||
565 | static int __devinit coretemp_probe(struct platform_device *pdev) | |
566 | { | |
567 | struct platform_data *pdata; | |
568 | int err; | |
bebe4678 | 569 | |
199e0de7 D |
570 | /* Check the microcode version of the CPU */ |
571 | err = chk_ucode_version(pdev); | |
572 | if (err) | |
573 | return err; | |
574 | ||
575 | /* Initialize the per-package data structures */ | |
576 | pdata = kzalloc(sizeof(struct platform_data), GFP_KERNEL); | |
577 | if (!pdata) | |
578 | return -ENOMEM; | |
579 | ||
580 | err = create_name_attr(pdata, &pdev->dev); | |
581 | if (err) | |
582 | goto exit_free; | |
583 | ||
584 | pdata->phys_proc_id = TO_PHYS_ID(pdev->id); | |
585 | platform_set_drvdata(pdev, pdata); | |
586 | ||
587 | pdata->hwmon_dev = hwmon_device_register(&pdev->dev); | |
588 | if (IS_ERR(pdata->hwmon_dev)) { | |
589 | err = PTR_ERR(pdata->hwmon_dev); | |
590 | dev_err(&pdev->dev, "Class registration failed (%d)\n", err); | |
591 | goto exit_name; | |
592 | } | |
593 | return 0; | |
594 | ||
595 | exit_name: | |
596 | device_remove_file(&pdev->dev, &pdata->name_attr); | |
597 | platform_set_drvdata(pdev, NULL); | |
bebe4678 | 598 | exit_free: |
199e0de7 | 599 | kfree(pdata); |
bebe4678 RM |
600 | return err; |
601 | } | |
602 | ||
603 | static int __devexit coretemp_remove(struct platform_device *pdev) | |
604 | { | |
199e0de7 D |
605 | struct platform_data *pdata = platform_get_drvdata(pdev); |
606 | int i; | |
bebe4678 | 607 | |
199e0de7 D |
608 | for (i = MAX_CORE_DATA - 1; i >= 0; --i) |
609 | if (pdata->core_data[i]) | |
610 | coretemp_remove_core(pdata, &pdev->dev, i); | |
611 | ||
612 | device_remove_file(&pdev->dev, &pdata->name_attr); | |
613 | hwmon_device_unregister(pdata->hwmon_dev); | |
bebe4678 | 614 | platform_set_drvdata(pdev, NULL); |
199e0de7 | 615 | kfree(pdata); |
bebe4678 RM |
616 | return 0; |
617 | } | |
618 | ||
619 | static struct platform_driver coretemp_driver = { | |
620 | .driver = { | |
621 | .owner = THIS_MODULE, | |
622 | .name = DRVNAME, | |
623 | }, | |
624 | .probe = coretemp_probe, | |
625 | .remove = __devexit_p(coretemp_remove), | |
626 | }; | |
627 | ||
bebe4678 RM |
628 | static int __cpuinit coretemp_device_add(unsigned int cpu) |
629 | { | |
630 | int err; | |
631 | struct platform_device *pdev; | |
632 | struct pdev_entry *pdev_entry; | |
d883b9f0 JD |
633 | |
634 | mutex_lock(&pdev_list_mutex); | |
635 | ||
bebe4678 RM |
636 | pdev = platform_device_alloc(DRVNAME, cpu); |
637 | if (!pdev) { | |
638 | err = -ENOMEM; | |
f8bb8925 | 639 | pr_err("Device allocation failed\n"); |
bebe4678 RM |
640 | goto exit; |
641 | } | |
642 | ||
643 | pdev_entry = kzalloc(sizeof(struct pdev_entry), GFP_KERNEL); | |
644 | if (!pdev_entry) { | |
645 | err = -ENOMEM; | |
646 | goto exit_device_put; | |
647 | } | |
648 | ||
649 | err = platform_device_add(pdev); | |
650 | if (err) { | |
f8bb8925 | 651 | pr_err("Device addition failed (%d)\n", err); |
bebe4678 RM |
652 | goto exit_device_free; |
653 | } | |
654 | ||
655 | pdev_entry->pdev = pdev; | |
656 | pdev_entry->cpu = cpu; | |
199e0de7 D |
657 | pdev_entry->phys_proc_id = TO_PHYS_ID(cpu); |
658 | pdev_entry->cpu_core_id = TO_CORE_ID(cpu); | |
659 | ||
bebe4678 RM |
660 | list_add_tail(&pdev_entry->list, &pdev_list); |
661 | mutex_unlock(&pdev_list_mutex); | |
662 | ||
663 | return 0; | |
664 | ||
665 | exit_device_free: | |
666 | kfree(pdev_entry); | |
667 | exit_device_put: | |
668 | platform_device_put(pdev); | |
669 | exit: | |
d883b9f0 | 670 | mutex_unlock(&pdev_list_mutex); |
bebe4678 RM |
671 | return err; |
672 | } | |
673 | ||
199e0de7 | 674 | static void coretemp_device_remove(unsigned int cpu) |
bebe4678 | 675 | { |
199e0de7 D |
676 | struct pdev_entry *p, *n; |
677 | u16 phys_proc_id = TO_PHYS_ID(cpu); | |
e40cc4bd | 678 | |
bebe4678 | 679 | mutex_lock(&pdev_list_mutex); |
199e0de7 D |
680 | list_for_each_entry_safe(p, n, &pdev_list, list) { |
681 | if (p->phys_proc_id != phys_proc_id) | |
e40cc4bd | 682 | continue; |
e40cc4bd JB |
683 | platform_device_unregister(p->pdev); |
684 | list_del(&p->list); | |
e40cc4bd | 685 | kfree(p); |
bebe4678 RM |
686 | } |
687 | mutex_unlock(&pdev_list_mutex); | |
688 | } | |
689 | ||
199e0de7 D |
690 | static bool is_any_core_online(struct platform_data *pdata) |
691 | { | |
692 | int i; | |
693 | ||
694 | /* Find online cores, except pkgtemp data */ | |
695 | for (i = MAX_CORE_DATA - 1; i >= 0; --i) { | |
696 | if (pdata->core_data[i] && | |
697 | !pdata->core_data[i]->is_pkg_data) { | |
698 | return true; | |
699 | } | |
700 | } | |
701 | return false; | |
702 | } | |
703 | ||
704 | static void __cpuinit get_core_online(unsigned int cpu) | |
705 | { | |
706 | struct cpuinfo_x86 *c = &cpu_data(cpu); | |
707 | struct platform_device *pdev = coretemp_get_pdev(cpu); | |
708 | int err; | |
709 | ||
710 | /* | |
711 | * CPUID.06H.EAX[0] indicates whether the CPU has thermal | |
712 | * sensors. We check this bit only, all the early CPUs | |
713 | * without thermal sensors will be filtered out. | |
714 | */ | |
715 | if (!cpu_has(c, X86_FEATURE_DTS)) | |
716 | return; | |
717 | ||
718 | if (!pdev) { | |
719 | /* | |
720 | * Alright, we have DTS support. | |
721 | * We are bringing the _first_ core in this pkg | |
722 | * online. So, initialize per-pkg data structures and | |
723 | * then bring this core online. | |
724 | */ | |
725 | err = coretemp_device_add(cpu); | |
726 | if (err) | |
727 | return; | |
728 | /* | |
729 | * Check whether pkgtemp support is available. | |
730 | * If so, add interfaces for pkgtemp. | |
731 | */ | |
732 | if (cpu_has(c, X86_FEATURE_PTS)) | |
733 | coretemp_add_core(cpu, 1); | |
734 | } | |
735 | /* | |
736 | * Physical CPU device already exists. | |
737 | * So, just add interfaces for this core. | |
738 | */ | |
739 | coretemp_add_core(cpu, 0); | |
740 | } | |
741 | ||
742 | static void __cpuinit put_core_offline(unsigned int cpu) | |
743 | { | |
744 | int i, indx; | |
745 | struct platform_data *pdata; | |
746 | struct platform_device *pdev = coretemp_get_pdev(cpu); | |
747 | ||
748 | /* If the physical CPU device does not exist, just return */ | |
749 | if (!pdev) | |
750 | return; | |
751 | ||
752 | pdata = platform_get_drvdata(pdev); | |
753 | ||
754 | indx = TO_ATTR_NO(cpu); | |
755 | ||
756 | if (pdata->core_data[indx] && pdata->core_data[indx]->cpu == cpu) | |
757 | coretemp_remove_core(pdata, &pdev->dev, indx); | |
758 | ||
f4e0bcf0 | 759 | /* |
6777b9e4 GR |
760 | * If a HT sibling of a core is taken offline, but another HT sibling |
761 | * of the same core is still online, register the alternate sibling. | |
762 | * This ensures that exactly one set of attributes is provided as long | |
763 | * as at least one HT sibling of a core is online. | |
f4e0bcf0 | 764 | */ |
bb74e8ca | 765 | for_each_sibling(i, cpu) { |
199e0de7 D |
766 | if (i != cpu) { |
767 | get_core_online(i); | |
f4e0bcf0 GR |
768 | /* |
769 | * Display temperature sensor data for one HT sibling | |
770 | * per core only, so abort the loop after one such | |
771 | * sibling has been found. | |
772 | */ | |
199e0de7 D |
773 | break; |
774 | } | |
775 | } | |
776 | /* | |
777 | * If all cores in this pkg are offline, remove the device. | |
778 | * coretemp_device_remove calls unregister_platform_device, | |
779 | * which in turn calls coretemp_remove. This removes the | |
780 | * pkgtemp entry and does other clean ups. | |
781 | */ | |
782 | if (!is_any_core_online(pdata)) | |
783 | coretemp_device_remove(cpu); | |
784 | } | |
785 | ||
ba7c1927 | 786 | static int __cpuinit coretemp_cpu_callback(struct notifier_block *nfb, |
bebe4678 RM |
787 | unsigned long action, void *hcpu) |
788 | { | |
789 | unsigned int cpu = (unsigned long) hcpu; | |
790 | ||
791 | switch (action) { | |
792 | case CPU_ONLINE: | |
561d9a96 | 793 | case CPU_DOWN_FAILED: |
199e0de7 | 794 | get_core_online(cpu); |
bebe4678 | 795 | break; |
561d9a96 | 796 | case CPU_DOWN_PREPARE: |
199e0de7 | 797 | put_core_offline(cpu); |
bebe4678 RM |
798 | break; |
799 | } | |
800 | return NOTIFY_OK; | |
801 | } | |
802 | ||
ba7c1927 | 803 | static struct notifier_block coretemp_cpu_notifier __refdata = { |
bebe4678 RM |
804 | .notifier_call = coretemp_cpu_callback, |
805 | }; | |
bebe4678 RM |
806 | |
807 | static int __init coretemp_init(void) | |
808 | { | |
809 | int i, err = -ENODEV; | |
bebe4678 | 810 | |
bebe4678 | 811 | /* quick check if we run Intel */ |
92cb7612 | 812 | if (cpu_data(0).x86_vendor != X86_VENDOR_INTEL) |
bebe4678 RM |
813 | goto exit; |
814 | ||
815 | err = platform_driver_register(&coretemp_driver); | |
816 | if (err) | |
817 | goto exit; | |
818 | ||
a4659053 | 819 | for_each_online_cpu(i) |
199e0de7 | 820 | get_core_online(i); |
89a3fd35 JB |
821 | |
822 | #ifndef CONFIG_HOTPLUG_CPU | |
bebe4678 RM |
823 | if (list_empty(&pdev_list)) { |
824 | err = -ENODEV; | |
825 | goto exit_driver_unreg; | |
826 | } | |
89a3fd35 | 827 | #endif |
bebe4678 | 828 | |
bebe4678 | 829 | register_hotcpu_notifier(&coretemp_cpu_notifier); |
bebe4678 RM |
830 | return 0; |
831 | ||
0dca94ba | 832 | #ifndef CONFIG_HOTPLUG_CPU |
89a3fd35 | 833 | exit_driver_unreg: |
bebe4678 | 834 | platform_driver_unregister(&coretemp_driver); |
0dca94ba | 835 | #endif |
bebe4678 RM |
836 | exit: |
837 | return err; | |
838 | } | |
839 | ||
840 | static void __exit coretemp_exit(void) | |
841 | { | |
842 | struct pdev_entry *p, *n; | |
17c10d61 | 843 | |
bebe4678 | 844 | unregister_hotcpu_notifier(&coretemp_cpu_notifier); |
bebe4678 RM |
845 | mutex_lock(&pdev_list_mutex); |
846 | list_for_each_entry_safe(p, n, &pdev_list, list) { | |
847 | platform_device_unregister(p->pdev); | |
848 | list_del(&p->list); | |
849 | kfree(p); | |
850 | } | |
851 | mutex_unlock(&pdev_list_mutex); | |
852 | platform_driver_unregister(&coretemp_driver); | |
853 | } | |
854 | ||
855 | MODULE_AUTHOR("Rudolf Marek <r.marek@assembler.cz>"); | |
856 | MODULE_DESCRIPTION("Intel Core temperature monitor"); | |
857 | MODULE_LICENSE("GPL"); | |
858 | ||
859 | module_init(coretemp_init) | |
860 | module_exit(coretemp_exit) |