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Commit | Line | Data |
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bebe4678 RM |
1 | /* |
2 | * coretemp.c - Linux kernel module for hardware monitoring | |
3 | * | |
4 | * Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz> | |
5 | * | |
6 | * Inspired from many hwmon drivers | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; version 2 of the License. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA | |
20 | * 02110-1301 USA. | |
21 | */ | |
22 | ||
f8bb8925 JP |
23 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
24 | ||
bebe4678 | 25 | #include <linux/module.h> |
bebe4678 RM |
26 | #include <linux/init.h> |
27 | #include <linux/slab.h> | |
28 | #include <linux/jiffies.h> | |
29 | #include <linux/hwmon.h> | |
30 | #include <linux/sysfs.h> | |
31 | #include <linux/hwmon-sysfs.h> | |
32 | #include <linux/err.h> | |
33 | #include <linux/mutex.h> | |
34 | #include <linux/list.h> | |
35 | #include <linux/platform_device.h> | |
36 | #include <linux/cpu.h> | |
1fe63ab4 | 37 | #include <linux/pci.h> |
4cc45275 | 38 | #include <linux/smp.h> |
bebe4678 RM |
39 | #include <asm/msr.h> |
40 | #include <asm/processor.h> | |
41 | ||
42 | #define DRVNAME "coretemp" | |
43 | ||
199e0de7 D |
44 | #define BASE_SYSFS_ATTR_NO 2 /* Sysfs Base attr no for coretemp */ |
45 | #define NUM_REAL_CORES 16 /* Number of Real cores per cpu */ | |
46 | #define CORETEMP_NAME_LENGTH 17 /* String Length of attrs */ | |
c814a4c7 D |
47 | #define MAX_CORE_ATTRS 4 /* Maximum no of basic attrs */ |
48 | #define MAX_THRESH_ATTRS 3 /* Maximum no of Threshold attrs */ | |
49 | #define TOTAL_ATTRS (MAX_CORE_ATTRS + MAX_THRESH_ATTRS) | |
199e0de7 D |
50 | #define MAX_CORE_DATA (NUM_REAL_CORES + BASE_SYSFS_ATTR_NO) |
51 | ||
52 | #ifdef CONFIG_SMP | |
53 | #define TO_PHYS_ID(cpu) cpu_data(cpu).phys_proc_id | |
54 | #define TO_CORE_ID(cpu) cpu_data(cpu).cpu_core_id | |
55 | #define TO_ATTR_NO(cpu) (TO_CORE_ID(cpu) + BASE_SYSFS_ATTR_NO) | |
bb74e8ca | 56 | #define for_each_sibling(i, cpu) for_each_cpu(i, cpu_sibling_mask(cpu)) |
199e0de7 D |
57 | #else |
58 | #define TO_PHYS_ID(cpu) (cpu) | |
59 | #define TO_CORE_ID(cpu) (cpu) | |
60 | #define TO_ATTR_NO(cpu) (cpu) | |
bb74e8ca | 61 | #define for_each_sibling(i, cpu) for (i = 0; false; ) |
199e0de7 | 62 | #endif |
bebe4678 RM |
63 | |
64 | /* | |
199e0de7 D |
65 | * Per-Core Temperature Data |
66 | * @last_updated: The time when the current temperature value was updated | |
67 | * earlier (in jiffies). | |
68 | * @cpu_core_id: The CPU Core from which temperature values should be read | |
69 | * This value is passed as "id" field to rdmsr/wrmsr functions. | |
70 | * @status_reg: One of IA32_THERM_STATUS or IA32_PACKAGE_THERM_STATUS, | |
71 | * from where the temperature values should be read. | |
c814a4c7 D |
72 | * @intrpt_reg: One of IA32_THERM_INTERRUPT or IA32_PACKAGE_THERM_INTERRUPT, |
73 | * from where the thresholds are read. | |
74 | * @attr_size: Total number of pre-core attrs displayed in the sysfs. | |
199e0de7 D |
75 | * @is_pkg_data: If this is 1, the temp_data holds pkgtemp data. |
76 | * Otherwise, temp_data holds coretemp data. | |
77 | * @valid: If this is 1, the current temperature is valid. | |
bebe4678 | 78 | */ |
199e0de7 | 79 | struct temp_data { |
bebe4678 | 80 | int temp; |
6369a288 | 81 | int ttarget; |
c814a4c7 | 82 | int tmin; |
199e0de7 D |
83 | int tjmax; |
84 | unsigned long last_updated; | |
85 | unsigned int cpu; | |
86 | u32 cpu_core_id; | |
87 | u32 status_reg; | |
c814a4c7 D |
88 | u32 intrpt_reg; |
89 | int attr_size; | |
199e0de7 D |
90 | bool is_pkg_data; |
91 | bool valid; | |
c814a4c7 D |
92 | struct sensor_device_attribute sd_attrs[TOTAL_ATTRS]; |
93 | char attr_name[TOTAL_ATTRS][CORETEMP_NAME_LENGTH]; | |
199e0de7 | 94 | struct mutex update_lock; |
bebe4678 RM |
95 | }; |
96 | ||
199e0de7 D |
97 | /* Platform Data per Physical CPU */ |
98 | struct platform_data { | |
99 | struct device *hwmon_dev; | |
100 | u16 phys_proc_id; | |
101 | struct temp_data *core_data[MAX_CORE_DATA]; | |
102 | struct device_attribute name_attr; | |
103 | }; | |
bebe4678 | 104 | |
199e0de7 D |
105 | struct pdev_entry { |
106 | struct list_head list; | |
107 | struct platform_device *pdev; | |
199e0de7 | 108 | u16 phys_proc_id; |
199e0de7 D |
109 | }; |
110 | ||
111 | static LIST_HEAD(pdev_list); | |
112 | static DEFINE_MUTEX(pdev_list_mutex); | |
113 | ||
114 | static ssize_t show_name(struct device *dev, | |
115 | struct device_attribute *devattr, char *buf) | |
116 | { | |
117 | return sprintf(buf, "%s\n", DRVNAME); | |
118 | } | |
119 | ||
120 | static ssize_t show_label(struct device *dev, | |
121 | struct device_attribute *devattr, char *buf) | |
bebe4678 | 122 | { |
bebe4678 | 123 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); |
199e0de7 D |
124 | struct platform_data *pdata = dev_get_drvdata(dev); |
125 | struct temp_data *tdata = pdata->core_data[attr->index]; | |
126 | ||
127 | if (tdata->is_pkg_data) | |
128 | return sprintf(buf, "Physical id %u\n", pdata->phys_proc_id); | |
bebe4678 | 129 | |
199e0de7 | 130 | return sprintf(buf, "Core %u\n", tdata->cpu_core_id); |
bebe4678 RM |
131 | } |
132 | ||
199e0de7 D |
133 | static ssize_t show_crit_alarm(struct device *dev, |
134 | struct device_attribute *devattr, char *buf) | |
bebe4678 | 135 | { |
199e0de7 D |
136 | u32 eax, edx; |
137 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
138 | struct platform_data *pdata = dev_get_drvdata(dev); | |
139 | struct temp_data *tdata = pdata->core_data[attr->index]; | |
140 | ||
141 | rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx); | |
142 | ||
143 | return sprintf(buf, "%d\n", (eax >> 5) & 1); | |
bebe4678 RM |
144 | } |
145 | ||
c814a4c7 D |
146 | static ssize_t show_max_alarm(struct device *dev, |
147 | struct device_attribute *devattr, char *buf) | |
148 | { | |
149 | u32 eax, edx; | |
150 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
151 | struct platform_data *pdata = dev_get_drvdata(dev); | |
152 | struct temp_data *tdata = pdata->core_data[attr->index]; | |
153 | ||
154 | rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx); | |
155 | ||
156 | return sprintf(buf, "%d\n", !!(eax & THERM_STATUS_THRESHOLD1)); | |
157 | } | |
158 | ||
199e0de7 D |
159 | static ssize_t show_tjmax(struct device *dev, |
160 | struct device_attribute *devattr, char *buf) | |
bebe4678 RM |
161 | { |
162 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
199e0de7 | 163 | struct platform_data *pdata = dev_get_drvdata(dev); |
bebe4678 | 164 | |
199e0de7 | 165 | return sprintf(buf, "%d\n", pdata->core_data[attr->index]->tjmax); |
bebe4678 RM |
166 | } |
167 | ||
199e0de7 D |
168 | static ssize_t show_ttarget(struct device *dev, |
169 | struct device_attribute *devattr, char *buf) | |
170 | { | |
171 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
172 | struct platform_data *pdata = dev_get_drvdata(dev); | |
bebe4678 | 173 | |
199e0de7 D |
174 | return sprintf(buf, "%d\n", pdata->core_data[attr->index]->ttarget); |
175 | } | |
bebe4678 | 176 | |
c814a4c7 D |
177 | static ssize_t store_ttarget(struct device *dev, |
178 | struct device_attribute *devattr, | |
179 | const char *buf, size_t count) | |
180 | { | |
181 | struct platform_data *pdata = dev_get_drvdata(dev); | |
182 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
183 | struct temp_data *tdata = pdata->core_data[attr->index]; | |
184 | u32 eax, edx; | |
185 | unsigned long val; | |
186 | int diff; | |
187 | ||
188 | if (strict_strtoul(buf, 10, &val)) | |
189 | return -EINVAL; | |
190 | ||
191 | /* | |
192 | * THERM_MASK_THRESHOLD1 is 7 bits wide. Values are entered in terms | |
193 | * of milli degree celsius. Hence don't accept val > (127 * 1000) | |
194 | */ | |
195 | if (val > tdata->tjmax || val > 127000) | |
196 | return -EINVAL; | |
197 | ||
198 | diff = (tdata->tjmax - val) / 1000; | |
199 | ||
200 | mutex_lock(&tdata->update_lock); | |
201 | rdmsr_on_cpu(tdata->cpu, tdata->intrpt_reg, &eax, &edx); | |
202 | eax = (eax & ~THERM_MASK_THRESHOLD1) | | |
203 | (diff << THERM_SHIFT_THRESHOLD1); | |
204 | wrmsr_on_cpu(tdata->cpu, tdata->intrpt_reg, eax, edx); | |
205 | tdata->ttarget = val; | |
206 | mutex_unlock(&tdata->update_lock); | |
207 | ||
208 | return count; | |
209 | } | |
210 | ||
211 | static ssize_t show_tmin(struct device *dev, | |
212 | struct device_attribute *devattr, char *buf) | |
213 | { | |
214 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
215 | struct platform_data *pdata = dev_get_drvdata(dev); | |
216 | ||
217 | return sprintf(buf, "%d\n", pdata->core_data[attr->index]->tmin); | |
218 | } | |
219 | ||
220 | static ssize_t store_tmin(struct device *dev, | |
221 | struct device_attribute *devattr, | |
222 | const char *buf, size_t count) | |
223 | { | |
224 | struct platform_data *pdata = dev_get_drvdata(dev); | |
225 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
226 | struct temp_data *tdata = pdata->core_data[attr->index]; | |
227 | u32 eax, edx; | |
228 | unsigned long val; | |
229 | int diff; | |
230 | ||
231 | if (strict_strtoul(buf, 10, &val)) | |
232 | return -EINVAL; | |
233 | ||
234 | /* | |
235 | * THERM_MASK_THRESHOLD0 is 7 bits wide. Values are entered in terms | |
236 | * of milli degree celsius. Hence don't accept val > (127 * 1000) | |
237 | */ | |
238 | if (val > tdata->tjmax || val > 127000) | |
239 | return -EINVAL; | |
240 | ||
241 | diff = (tdata->tjmax - val) / 1000; | |
242 | ||
243 | mutex_lock(&tdata->update_lock); | |
244 | rdmsr_on_cpu(tdata->cpu, tdata->intrpt_reg, &eax, &edx); | |
245 | eax = (eax & ~THERM_MASK_THRESHOLD0) | | |
246 | (diff << THERM_SHIFT_THRESHOLD0); | |
247 | wrmsr_on_cpu(tdata->cpu, tdata->intrpt_reg, eax, edx); | |
248 | tdata->tmin = val; | |
249 | mutex_unlock(&tdata->update_lock); | |
250 | ||
251 | return count; | |
252 | } | |
253 | ||
199e0de7 D |
254 | static ssize_t show_temp(struct device *dev, |
255 | struct device_attribute *devattr, char *buf) | |
bebe4678 | 256 | { |
199e0de7 D |
257 | u32 eax, edx; |
258 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
259 | struct platform_data *pdata = dev_get_drvdata(dev); | |
260 | struct temp_data *tdata = pdata->core_data[attr->index]; | |
bebe4678 | 261 | |
199e0de7 | 262 | mutex_lock(&tdata->update_lock); |
bebe4678 | 263 | |
199e0de7 D |
264 | /* Check whether the time interval has elapsed */ |
265 | if (!tdata->valid || time_after(jiffies, tdata->last_updated + HZ)) { | |
266 | rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx); | |
267 | tdata->valid = 0; | |
268 | /* Check whether the data is valid */ | |
bebe4678 | 269 | if (eax & 0x80000000) { |
199e0de7 | 270 | tdata->temp = tdata->tjmax - |
4cc45275 | 271 | ((eax >> 16) & 0x7f) * 1000; |
199e0de7 | 272 | tdata->valid = 1; |
bebe4678 | 273 | } |
199e0de7 | 274 | tdata->last_updated = jiffies; |
bebe4678 RM |
275 | } |
276 | ||
199e0de7 D |
277 | mutex_unlock(&tdata->update_lock); |
278 | return tdata->valid ? sprintf(buf, "%d\n", tdata->temp) : -EAGAIN; | |
bebe4678 RM |
279 | } |
280 | ||
199e0de7 | 281 | static int adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev) |
118a8871 RM |
282 | { |
283 | /* The 100C is default for both mobile and non mobile CPUs */ | |
284 | ||
285 | int tjmax = 100000; | |
eccfed42 | 286 | int tjmax_ee = 85000; |
708a62bc | 287 | int usemsr_ee = 1; |
118a8871 RM |
288 | int err; |
289 | u32 eax, edx; | |
1fe63ab4 | 290 | struct pci_dev *host_bridge; |
118a8871 RM |
291 | |
292 | /* Early chips have no MSR for TjMax */ | |
293 | ||
4cc45275 | 294 | if (c->x86_model == 0xf && c->x86_mask < 4) |
708a62bc | 295 | usemsr_ee = 0; |
118a8871 | 296 | |
1fe63ab4 | 297 | /* Atom CPUs */ |
708a62bc RM |
298 | |
299 | if (c->x86_model == 0x1c) { | |
300 | usemsr_ee = 0; | |
1fe63ab4 YW |
301 | |
302 | host_bridge = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0)); | |
303 | ||
304 | if (host_bridge && host_bridge->vendor == PCI_VENDOR_ID_INTEL | |
305 | && (host_bridge->device == 0xa000 /* NM10 based nettop */ | |
306 | || host_bridge->device == 0xa010)) /* NM10 based netbook */ | |
307 | tjmax = 100000; | |
308 | else | |
309 | tjmax = 90000; | |
310 | ||
311 | pci_dev_put(host_bridge); | |
708a62bc RM |
312 | } |
313 | ||
4cc45275 | 314 | if (c->x86_model > 0xe && usemsr_ee) { |
eccfed42 | 315 | u8 platform_id; |
118a8871 | 316 | |
4cc45275 GR |
317 | /* |
318 | * Now we can detect the mobile CPU using Intel provided table | |
319 | * http://softwarecommunity.intel.com/Wiki/Mobility/720.htm | |
320 | * For Core2 cores, check MSR 0x17, bit 28 1 = Mobile CPU | |
321 | */ | |
118a8871 RM |
322 | err = rdmsr_safe_on_cpu(id, 0x17, &eax, &edx); |
323 | if (err) { | |
324 | dev_warn(dev, | |
325 | "Unable to access MSR 0x17, assuming desktop" | |
326 | " CPU\n"); | |
708a62bc | 327 | usemsr_ee = 0; |
eccfed42 | 328 | } else if (c->x86_model < 0x17 && !(eax & 0x10000000)) { |
4cc45275 GR |
329 | /* |
330 | * Trust bit 28 up to Penryn, I could not find any | |
331 | * documentation on that; if you happen to know | |
332 | * someone at Intel please ask | |
333 | */ | |
708a62bc | 334 | usemsr_ee = 0; |
eccfed42 RM |
335 | } else { |
336 | /* Platform ID bits 52:50 (EDX starts at bit 32) */ | |
337 | platform_id = (edx >> 18) & 0x7; | |
338 | ||
4cc45275 GR |
339 | /* |
340 | * Mobile Penryn CPU seems to be platform ID 7 or 5 | |
341 | * (guesswork) | |
342 | */ | |
343 | if (c->x86_model == 0x17 && | |
344 | (platform_id == 5 || platform_id == 7)) { | |
345 | /* | |
346 | * If MSR EE bit is set, set it to 90 degrees C, | |
347 | * otherwise 105 degrees C | |
348 | */ | |
eccfed42 RM |
349 | tjmax_ee = 90000; |
350 | tjmax = 105000; | |
351 | } | |
118a8871 RM |
352 | } |
353 | } | |
354 | ||
708a62bc | 355 | if (usemsr_ee) { |
118a8871 RM |
356 | err = rdmsr_safe_on_cpu(id, 0xee, &eax, &edx); |
357 | if (err) { | |
358 | dev_warn(dev, | |
359 | "Unable to access MSR 0xEE, for Tjmax, left" | |
4d7a5644 | 360 | " at default\n"); |
118a8871 | 361 | } else if (eax & 0x40000000) { |
eccfed42 | 362 | tjmax = tjmax_ee; |
118a8871 | 363 | } |
708a62bc | 364 | } else if (tjmax == 100000) { |
4cc45275 GR |
365 | /* |
366 | * If we don't use msr EE it means we are desktop CPU | |
367 | * (with exeception of Atom) | |
368 | */ | |
118a8871 RM |
369 | dev_warn(dev, "Using relative temperature scale!\n"); |
370 | } | |
371 | ||
372 | return tjmax; | |
373 | } | |
374 | ||
199e0de7 | 375 | static int get_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev) |
a321cedb | 376 | { |
a321cedb CE |
377 | int err; |
378 | u32 eax, edx; | |
379 | u32 val; | |
380 | ||
4cc45275 GR |
381 | /* |
382 | * A new feature of current Intel(R) processors, the | |
383 | * IA32_TEMPERATURE_TARGET contains the TjMax value | |
384 | */ | |
a321cedb CE |
385 | err = rdmsr_safe_on_cpu(id, MSR_IA32_TEMPERATURE_TARGET, &eax, &edx); |
386 | if (err) { | |
6bf9e9b0 JD |
387 | if (c->x86_model > 0xe && c->x86_model != 0x1c) |
388 | dev_warn(dev, "Unable to read TjMax from CPU %u\n", id); | |
a321cedb CE |
389 | } else { |
390 | val = (eax >> 16) & 0xff; | |
391 | /* | |
392 | * If the TjMax is not plausible, an assumption | |
393 | * will be used | |
394 | */ | |
bb9973e4 | 395 | if (val) { |
6bf9e9b0 | 396 | dev_dbg(dev, "TjMax is %d degrees C\n", val); |
a321cedb CE |
397 | return val * 1000; |
398 | } | |
399 | } | |
400 | ||
401 | /* | |
402 | * An assumption is made for early CPUs and unreadable MSR. | |
4f5f71a7 | 403 | * NOTE: the calculated value may not be correct. |
a321cedb | 404 | */ |
4f5f71a7 | 405 | return adjust_tjmax(c, id, dev); |
a321cedb CE |
406 | } |
407 | ||
32478006 JB |
408 | static void __devinit get_ucode_rev_on_cpu(void *edx) |
409 | { | |
410 | u32 eax; | |
411 | ||
412 | wrmsr(MSR_IA32_UCODE_REV, 0, 0); | |
413 | sync_core(); | |
414 | rdmsr(MSR_IA32_UCODE_REV, eax, *(u32 *)edx); | |
415 | } | |
416 | ||
199e0de7 D |
417 | static int create_name_attr(struct platform_data *pdata, struct device *dev) |
418 | { | |
4258781a | 419 | sysfs_attr_init(&pdata->name_attr.attr); |
199e0de7 D |
420 | pdata->name_attr.attr.name = "name"; |
421 | pdata->name_attr.attr.mode = S_IRUGO; | |
422 | pdata->name_attr.show = show_name; | |
423 | return device_create_file(dev, &pdata->name_attr); | |
424 | } | |
bebe4678 | 425 | |
199e0de7 D |
426 | static int create_core_attrs(struct temp_data *tdata, struct device *dev, |
427 | int attr_no) | |
428 | { | |
429 | int err, i; | |
c814a4c7 | 430 | static ssize_t (*rd_ptr[TOTAL_ATTRS]) (struct device *dev, |
199e0de7 | 431 | struct device_attribute *devattr, char *buf) = { |
c814a4c7 D |
432 | show_label, show_crit_alarm, show_temp, show_tjmax, |
433 | show_max_alarm, show_ttarget, show_tmin }; | |
434 | static ssize_t (*rw_ptr[TOTAL_ATTRS]) (struct device *dev, | |
435 | struct device_attribute *devattr, const char *buf, | |
436 | size_t count) = { NULL, NULL, NULL, NULL, NULL, | |
437 | store_ttarget, store_tmin }; | |
438 | static const char *names[TOTAL_ATTRS] = { | |
199e0de7 | 439 | "temp%d_label", "temp%d_crit_alarm", |
c814a4c7 D |
440 | "temp%d_input", "temp%d_crit", |
441 | "temp%d_max_alarm", "temp%d_max", | |
442 | "temp%d_max_hyst" }; | |
199e0de7 | 443 | |
c814a4c7 | 444 | for (i = 0; i < tdata->attr_size; i++) { |
199e0de7 D |
445 | snprintf(tdata->attr_name[i], CORETEMP_NAME_LENGTH, names[i], |
446 | attr_no); | |
4258781a | 447 | sysfs_attr_init(&tdata->sd_attrs[i].dev_attr.attr); |
199e0de7 D |
448 | tdata->sd_attrs[i].dev_attr.attr.name = tdata->attr_name[i]; |
449 | tdata->sd_attrs[i].dev_attr.attr.mode = S_IRUGO; | |
c814a4c7 D |
450 | if (rw_ptr[i]) { |
451 | tdata->sd_attrs[i].dev_attr.attr.mode |= S_IWUSR; | |
452 | tdata->sd_attrs[i].dev_attr.store = rw_ptr[i]; | |
453 | } | |
199e0de7 | 454 | tdata->sd_attrs[i].dev_attr.show = rd_ptr[i]; |
199e0de7 D |
455 | tdata->sd_attrs[i].index = attr_no; |
456 | err = device_create_file(dev, &tdata->sd_attrs[i].dev_attr); | |
457 | if (err) | |
458 | goto exit_free; | |
bebe4678 | 459 | } |
199e0de7 D |
460 | return 0; |
461 | ||
462 | exit_free: | |
463 | while (--i >= 0) | |
464 | device_remove_file(dev, &tdata->sd_attrs[i].dev_attr); | |
465 | return err; | |
466 | } | |
467 | ||
199e0de7 | 468 | |
582e1b27 | 469 | static int __devinit chk_ucode_version(struct platform_device *pdev) |
199e0de7 D |
470 | { |
471 | struct cpuinfo_x86 *c = &cpu_data(pdev->id); | |
472 | int err; | |
473 | u32 edx; | |
67f363b1 | 474 | |
199e0de7 D |
475 | /* |
476 | * Check if we have problem with errata AE18 of Core processors: | |
477 | * Readings might stop update when processor visited too deep sleep, | |
478 | * fixed for stepping D0 (6EC). | |
479 | */ | |
4cc45275 | 480 | if (c->x86_model == 0xe && c->x86_mask < 0xc) { |
67f363b1 | 481 | /* check for microcode update */ |
199e0de7 | 482 | err = smp_call_function_single(pdev->id, get_ucode_rev_on_cpu, |
32478006 JB |
483 | &edx, 1); |
484 | if (err) { | |
485 | dev_err(&pdev->dev, | |
486 | "Cannot determine microcode revision of " | |
199e0de7 D |
487 | "CPU#%u (%d)!\n", pdev->id, err); |
488 | return -ENODEV; | |
32478006 | 489 | } else if (edx < 0x39) { |
67f363b1 RM |
490 | dev_err(&pdev->dev, |
491 | "Errata AE18 not fixed, update BIOS or " | |
492 | "microcode of the CPU!\n"); | |
199e0de7 | 493 | return -ENODEV; |
67f363b1 RM |
494 | } |
495 | } | |
199e0de7 D |
496 | return 0; |
497 | } | |
498 | ||
499 | static struct platform_device *coretemp_get_pdev(unsigned int cpu) | |
500 | { | |
501 | u16 phys_proc_id = TO_PHYS_ID(cpu); | |
502 | struct pdev_entry *p; | |
503 | ||
504 | mutex_lock(&pdev_list_mutex); | |
505 | ||
506 | list_for_each_entry(p, &pdev_list, list) | |
507 | if (p->phys_proc_id == phys_proc_id) { | |
508 | mutex_unlock(&pdev_list_mutex); | |
509 | return p->pdev; | |
510 | } | |
511 | ||
512 | mutex_unlock(&pdev_list_mutex); | |
513 | return NULL; | |
514 | } | |
515 | ||
516 | static struct temp_data *init_temp_data(unsigned int cpu, int pkg_flag) | |
517 | { | |
518 | struct temp_data *tdata; | |
519 | ||
520 | tdata = kzalloc(sizeof(struct temp_data), GFP_KERNEL); | |
521 | if (!tdata) | |
522 | return NULL; | |
523 | ||
524 | tdata->status_reg = pkg_flag ? MSR_IA32_PACKAGE_THERM_STATUS : | |
525 | MSR_IA32_THERM_STATUS; | |
c814a4c7 D |
526 | tdata->intrpt_reg = pkg_flag ? MSR_IA32_PACKAGE_THERM_INTERRUPT : |
527 | MSR_IA32_THERM_INTERRUPT; | |
199e0de7 D |
528 | tdata->is_pkg_data = pkg_flag; |
529 | tdata->cpu = cpu; | |
530 | tdata->cpu_core_id = TO_CORE_ID(cpu); | |
c814a4c7 | 531 | tdata->attr_size = MAX_CORE_ATTRS; |
199e0de7 D |
532 | mutex_init(&tdata->update_lock); |
533 | return tdata; | |
534 | } | |
67f363b1 | 535 | |
199e0de7 D |
536 | static int create_core_data(struct platform_data *pdata, |
537 | struct platform_device *pdev, | |
538 | unsigned int cpu, int pkg_flag) | |
539 | { | |
540 | struct temp_data *tdata; | |
541 | struct cpuinfo_x86 *c = &cpu_data(cpu); | |
542 | u32 eax, edx; | |
543 | int err, attr_no; | |
bebe4678 | 544 | |
a321cedb | 545 | /* |
199e0de7 D |
546 | * Find attr number for sysfs: |
547 | * We map the attr number to core id of the CPU | |
548 | * The attr number is always core id + 2 | |
549 | * The Pkgtemp will always show up as temp1_*, if available | |
a321cedb | 550 | */ |
199e0de7 | 551 | attr_no = pkg_flag ? 1 : TO_ATTR_NO(cpu); |
6369a288 | 552 | |
199e0de7 D |
553 | if (attr_no > MAX_CORE_DATA - 1) |
554 | return -ERANGE; | |
555 | ||
f4e0bcf0 GR |
556 | /* |
557 | * Provide a single set of attributes for all HT siblings of a core | |
558 | * to avoid duplicate sensors (the processor ID and core ID of all | |
6777b9e4 GR |
559 | * HT siblings of a core are the same). |
560 | * Skip if a HT sibling of this core is already registered. | |
f4e0bcf0 GR |
561 | * This is not an error. |
562 | */ | |
199e0de7 D |
563 | if (pdata->core_data[attr_no] != NULL) |
564 | return 0; | |
6369a288 | 565 | |
199e0de7 D |
566 | tdata = init_temp_data(cpu, pkg_flag); |
567 | if (!tdata) | |
568 | return -ENOMEM; | |
bebe4678 | 569 | |
199e0de7 D |
570 | /* Test if we can access the status register */ |
571 | err = rdmsr_safe_on_cpu(cpu, tdata->status_reg, &eax, &edx); | |
572 | if (err) | |
573 | goto exit_free; | |
574 | ||
575 | /* We can access status register. Get Critical Temperature */ | |
6bf9e9b0 | 576 | tdata->tjmax = get_tjmax(c, cpu, &pdev->dev); |
199e0de7 | 577 | |
c814a4c7 D |
578 | /* |
579 | * Test if we can access the intrpt register. If so, increase the | |
580 | * 'size' enough to have ttarget/tmin/max_alarm interfaces. | |
581 | * Initialize ttarget with bits 16:22 of MSR_IA32_THERM_INTERRUPT | |
582 | */ | |
583 | err = rdmsr_safe_on_cpu(cpu, tdata->intrpt_reg, &eax, &edx); | |
584 | if (!err) { | |
585 | tdata->attr_size += MAX_THRESH_ATTRS; | |
cd5bd3df JD |
586 | tdata->tmin = tdata->tjmax - |
587 | ((eax & THERM_MASK_THRESHOLD0) >> | |
588 | THERM_SHIFT_THRESHOLD0) * 1000; | |
589 | tdata->ttarget = tdata->tjmax - | |
590 | ((eax & THERM_MASK_THRESHOLD1) >> | |
591 | THERM_SHIFT_THRESHOLD1) * 1000; | |
c814a4c7 D |
592 | } |
593 | ||
199e0de7 D |
594 | pdata->core_data[attr_no] = tdata; |
595 | ||
596 | /* Create sysfs interfaces */ | |
597 | err = create_core_attrs(tdata, &pdev->dev, attr_no); | |
598 | if (err) | |
599 | goto exit_free; | |
bebe4678 RM |
600 | |
601 | return 0; | |
199e0de7 D |
602 | exit_free: |
603 | kfree(tdata); | |
604 | return err; | |
605 | } | |
606 | ||
607 | static void coretemp_add_core(unsigned int cpu, int pkg_flag) | |
608 | { | |
609 | struct platform_data *pdata; | |
610 | struct platform_device *pdev = coretemp_get_pdev(cpu); | |
611 | int err; | |
612 | ||
613 | if (!pdev) | |
614 | return; | |
615 | ||
616 | pdata = platform_get_drvdata(pdev); | |
617 | ||
618 | err = create_core_data(pdata, pdev, cpu, pkg_flag); | |
619 | if (err) | |
620 | dev_err(&pdev->dev, "Adding Core %u failed\n", cpu); | |
621 | } | |
622 | ||
623 | static void coretemp_remove_core(struct platform_data *pdata, | |
624 | struct device *dev, int indx) | |
625 | { | |
626 | int i; | |
627 | struct temp_data *tdata = pdata->core_data[indx]; | |
628 | ||
629 | /* Remove the sysfs attributes */ | |
c814a4c7 | 630 | for (i = 0; i < tdata->attr_size; i++) |
199e0de7 D |
631 | device_remove_file(dev, &tdata->sd_attrs[i].dev_attr); |
632 | ||
633 | kfree(pdata->core_data[indx]); | |
634 | pdata->core_data[indx] = NULL; | |
635 | } | |
636 | ||
637 | static int __devinit coretemp_probe(struct platform_device *pdev) | |
638 | { | |
639 | struct platform_data *pdata; | |
640 | int err; | |
bebe4678 | 641 | |
199e0de7 D |
642 | /* Check the microcode version of the CPU */ |
643 | err = chk_ucode_version(pdev); | |
644 | if (err) | |
645 | return err; | |
646 | ||
647 | /* Initialize the per-package data structures */ | |
648 | pdata = kzalloc(sizeof(struct platform_data), GFP_KERNEL); | |
649 | if (!pdata) | |
650 | return -ENOMEM; | |
651 | ||
652 | err = create_name_attr(pdata, &pdev->dev); | |
653 | if (err) | |
654 | goto exit_free; | |
655 | ||
656 | pdata->phys_proc_id = TO_PHYS_ID(pdev->id); | |
657 | platform_set_drvdata(pdev, pdata); | |
658 | ||
659 | pdata->hwmon_dev = hwmon_device_register(&pdev->dev); | |
660 | if (IS_ERR(pdata->hwmon_dev)) { | |
661 | err = PTR_ERR(pdata->hwmon_dev); | |
662 | dev_err(&pdev->dev, "Class registration failed (%d)\n", err); | |
663 | goto exit_name; | |
664 | } | |
665 | return 0; | |
666 | ||
667 | exit_name: | |
668 | device_remove_file(&pdev->dev, &pdata->name_attr); | |
669 | platform_set_drvdata(pdev, NULL); | |
bebe4678 | 670 | exit_free: |
199e0de7 | 671 | kfree(pdata); |
bebe4678 RM |
672 | return err; |
673 | } | |
674 | ||
675 | static int __devexit coretemp_remove(struct platform_device *pdev) | |
676 | { | |
199e0de7 D |
677 | struct platform_data *pdata = platform_get_drvdata(pdev); |
678 | int i; | |
bebe4678 | 679 | |
199e0de7 D |
680 | for (i = MAX_CORE_DATA - 1; i >= 0; --i) |
681 | if (pdata->core_data[i]) | |
682 | coretemp_remove_core(pdata, &pdev->dev, i); | |
683 | ||
684 | device_remove_file(&pdev->dev, &pdata->name_attr); | |
685 | hwmon_device_unregister(pdata->hwmon_dev); | |
bebe4678 | 686 | platform_set_drvdata(pdev, NULL); |
199e0de7 | 687 | kfree(pdata); |
bebe4678 RM |
688 | return 0; |
689 | } | |
690 | ||
691 | static struct platform_driver coretemp_driver = { | |
692 | .driver = { | |
693 | .owner = THIS_MODULE, | |
694 | .name = DRVNAME, | |
695 | }, | |
696 | .probe = coretemp_probe, | |
697 | .remove = __devexit_p(coretemp_remove), | |
698 | }; | |
699 | ||
bebe4678 RM |
700 | static int __cpuinit coretemp_device_add(unsigned int cpu) |
701 | { | |
702 | int err; | |
703 | struct platform_device *pdev; | |
704 | struct pdev_entry *pdev_entry; | |
d883b9f0 JD |
705 | |
706 | mutex_lock(&pdev_list_mutex); | |
707 | ||
bebe4678 RM |
708 | pdev = platform_device_alloc(DRVNAME, cpu); |
709 | if (!pdev) { | |
710 | err = -ENOMEM; | |
f8bb8925 | 711 | pr_err("Device allocation failed\n"); |
bebe4678 RM |
712 | goto exit; |
713 | } | |
714 | ||
715 | pdev_entry = kzalloc(sizeof(struct pdev_entry), GFP_KERNEL); | |
716 | if (!pdev_entry) { | |
717 | err = -ENOMEM; | |
718 | goto exit_device_put; | |
719 | } | |
720 | ||
721 | err = platform_device_add(pdev); | |
722 | if (err) { | |
f8bb8925 | 723 | pr_err("Device addition failed (%d)\n", err); |
bebe4678 RM |
724 | goto exit_device_free; |
725 | } | |
726 | ||
727 | pdev_entry->pdev = pdev; | |
199e0de7 | 728 | pdev_entry->phys_proc_id = TO_PHYS_ID(cpu); |
199e0de7 | 729 | |
bebe4678 RM |
730 | list_add_tail(&pdev_entry->list, &pdev_list); |
731 | mutex_unlock(&pdev_list_mutex); | |
732 | ||
733 | return 0; | |
734 | ||
735 | exit_device_free: | |
736 | kfree(pdev_entry); | |
737 | exit_device_put: | |
738 | platform_device_put(pdev); | |
739 | exit: | |
d883b9f0 | 740 | mutex_unlock(&pdev_list_mutex); |
bebe4678 RM |
741 | return err; |
742 | } | |
743 | ||
199e0de7 | 744 | static void coretemp_device_remove(unsigned int cpu) |
bebe4678 | 745 | { |
199e0de7 D |
746 | struct pdev_entry *p, *n; |
747 | u16 phys_proc_id = TO_PHYS_ID(cpu); | |
e40cc4bd | 748 | |
bebe4678 | 749 | mutex_lock(&pdev_list_mutex); |
199e0de7 D |
750 | list_for_each_entry_safe(p, n, &pdev_list, list) { |
751 | if (p->phys_proc_id != phys_proc_id) | |
e40cc4bd | 752 | continue; |
e40cc4bd JB |
753 | platform_device_unregister(p->pdev); |
754 | list_del(&p->list); | |
e40cc4bd | 755 | kfree(p); |
bebe4678 RM |
756 | } |
757 | mutex_unlock(&pdev_list_mutex); | |
758 | } | |
759 | ||
199e0de7 D |
760 | static bool is_any_core_online(struct platform_data *pdata) |
761 | { | |
762 | int i; | |
763 | ||
764 | /* Find online cores, except pkgtemp data */ | |
765 | for (i = MAX_CORE_DATA - 1; i >= 0; --i) { | |
766 | if (pdata->core_data[i] && | |
767 | !pdata->core_data[i]->is_pkg_data) { | |
768 | return true; | |
769 | } | |
770 | } | |
771 | return false; | |
772 | } | |
773 | ||
774 | static void __cpuinit get_core_online(unsigned int cpu) | |
775 | { | |
776 | struct cpuinfo_x86 *c = &cpu_data(cpu); | |
777 | struct platform_device *pdev = coretemp_get_pdev(cpu); | |
778 | int err; | |
779 | ||
780 | /* | |
781 | * CPUID.06H.EAX[0] indicates whether the CPU has thermal | |
782 | * sensors. We check this bit only, all the early CPUs | |
783 | * without thermal sensors will be filtered out. | |
784 | */ | |
785 | if (!cpu_has(c, X86_FEATURE_DTS)) | |
786 | return; | |
787 | ||
788 | if (!pdev) { | |
789 | /* | |
790 | * Alright, we have DTS support. | |
791 | * We are bringing the _first_ core in this pkg | |
792 | * online. So, initialize per-pkg data structures and | |
793 | * then bring this core online. | |
794 | */ | |
795 | err = coretemp_device_add(cpu); | |
796 | if (err) | |
797 | return; | |
798 | /* | |
799 | * Check whether pkgtemp support is available. | |
800 | * If so, add interfaces for pkgtemp. | |
801 | */ | |
802 | if (cpu_has(c, X86_FEATURE_PTS)) | |
803 | coretemp_add_core(cpu, 1); | |
804 | } | |
805 | /* | |
806 | * Physical CPU device already exists. | |
807 | * So, just add interfaces for this core. | |
808 | */ | |
809 | coretemp_add_core(cpu, 0); | |
810 | } | |
811 | ||
812 | static void __cpuinit put_core_offline(unsigned int cpu) | |
813 | { | |
814 | int i, indx; | |
815 | struct platform_data *pdata; | |
816 | struct platform_device *pdev = coretemp_get_pdev(cpu); | |
817 | ||
818 | /* If the physical CPU device does not exist, just return */ | |
819 | if (!pdev) | |
820 | return; | |
821 | ||
822 | pdata = platform_get_drvdata(pdev); | |
823 | ||
824 | indx = TO_ATTR_NO(cpu); | |
825 | ||
826 | if (pdata->core_data[indx] && pdata->core_data[indx]->cpu == cpu) | |
827 | coretemp_remove_core(pdata, &pdev->dev, indx); | |
828 | ||
f4e0bcf0 | 829 | /* |
6777b9e4 GR |
830 | * If a HT sibling of a core is taken offline, but another HT sibling |
831 | * of the same core is still online, register the alternate sibling. | |
832 | * This ensures that exactly one set of attributes is provided as long | |
833 | * as at least one HT sibling of a core is online. | |
f4e0bcf0 | 834 | */ |
bb74e8ca | 835 | for_each_sibling(i, cpu) { |
199e0de7 D |
836 | if (i != cpu) { |
837 | get_core_online(i); | |
f4e0bcf0 GR |
838 | /* |
839 | * Display temperature sensor data for one HT sibling | |
840 | * per core only, so abort the loop after one such | |
841 | * sibling has been found. | |
842 | */ | |
199e0de7 D |
843 | break; |
844 | } | |
845 | } | |
846 | /* | |
847 | * If all cores in this pkg are offline, remove the device. | |
848 | * coretemp_device_remove calls unregister_platform_device, | |
849 | * which in turn calls coretemp_remove. This removes the | |
850 | * pkgtemp entry and does other clean ups. | |
851 | */ | |
852 | if (!is_any_core_online(pdata)) | |
853 | coretemp_device_remove(cpu); | |
854 | } | |
855 | ||
ba7c1927 | 856 | static int __cpuinit coretemp_cpu_callback(struct notifier_block *nfb, |
bebe4678 RM |
857 | unsigned long action, void *hcpu) |
858 | { | |
859 | unsigned int cpu = (unsigned long) hcpu; | |
860 | ||
861 | switch (action) { | |
862 | case CPU_ONLINE: | |
561d9a96 | 863 | case CPU_DOWN_FAILED: |
199e0de7 | 864 | get_core_online(cpu); |
bebe4678 | 865 | break; |
561d9a96 | 866 | case CPU_DOWN_PREPARE: |
199e0de7 | 867 | put_core_offline(cpu); |
bebe4678 RM |
868 | break; |
869 | } | |
870 | return NOTIFY_OK; | |
871 | } | |
872 | ||
ba7c1927 | 873 | static struct notifier_block coretemp_cpu_notifier __refdata = { |
bebe4678 RM |
874 | .notifier_call = coretemp_cpu_callback, |
875 | }; | |
bebe4678 RM |
876 | |
877 | static int __init coretemp_init(void) | |
878 | { | |
879 | int i, err = -ENODEV; | |
bebe4678 | 880 | |
bebe4678 | 881 | /* quick check if we run Intel */ |
92cb7612 | 882 | if (cpu_data(0).x86_vendor != X86_VENDOR_INTEL) |
bebe4678 RM |
883 | goto exit; |
884 | ||
885 | err = platform_driver_register(&coretemp_driver); | |
886 | if (err) | |
887 | goto exit; | |
888 | ||
a4659053 | 889 | for_each_online_cpu(i) |
199e0de7 | 890 | get_core_online(i); |
89a3fd35 JB |
891 | |
892 | #ifndef CONFIG_HOTPLUG_CPU | |
bebe4678 RM |
893 | if (list_empty(&pdev_list)) { |
894 | err = -ENODEV; | |
895 | goto exit_driver_unreg; | |
896 | } | |
89a3fd35 | 897 | #endif |
bebe4678 | 898 | |
bebe4678 | 899 | register_hotcpu_notifier(&coretemp_cpu_notifier); |
bebe4678 RM |
900 | return 0; |
901 | ||
0dca94ba | 902 | #ifndef CONFIG_HOTPLUG_CPU |
89a3fd35 | 903 | exit_driver_unreg: |
bebe4678 | 904 | platform_driver_unregister(&coretemp_driver); |
0dca94ba | 905 | #endif |
bebe4678 RM |
906 | exit: |
907 | return err; | |
908 | } | |
909 | ||
910 | static void __exit coretemp_exit(void) | |
911 | { | |
912 | struct pdev_entry *p, *n; | |
17c10d61 | 913 | |
bebe4678 | 914 | unregister_hotcpu_notifier(&coretemp_cpu_notifier); |
bebe4678 RM |
915 | mutex_lock(&pdev_list_mutex); |
916 | list_for_each_entry_safe(p, n, &pdev_list, list) { | |
917 | platform_device_unregister(p->pdev); | |
918 | list_del(&p->list); | |
919 | kfree(p); | |
920 | } | |
921 | mutex_unlock(&pdev_list_mutex); | |
922 | platform_driver_unregister(&coretemp_driver); | |
923 | } | |
924 | ||
925 | MODULE_AUTHOR("Rudolf Marek <r.marek@assembler.cz>"); | |
926 | MODULE_DESCRIPTION("Intel Core temperature monitor"); | |
927 | MODULE_LICENSE("GPL"); | |
928 | ||
929 | module_init(coretemp_init) | |
930 | module_exit(coretemp_exit) |