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hwmon: remove use of __devinit
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CommitLineData
bebe4678
RM
1/*
2 * coretemp.c - Linux kernel module for hardware monitoring
3 *
4 * Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz>
5 *
6 * Inspired from many hwmon drivers
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
20 * 02110-1301 USA.
21 */
22
f8bb8925
JP
23#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
24
bebe4678 25#include <linux/module.h>
bebe4678
RM
26#include <linux/init.h>
27#include <linux/slab.h>
28#include <linux/jiffies.h>
29#include <linux/hwmon.h>
30#include <linux/sysfs.h>
31#include <linux/hwmon-sysfs.h>
32#include <linux/err.h>
33#include <linux/mutex.h>
34#include <linux/list.h>
35#include <linux/platform_device.h>
36#include <linux/cpu.h>
1fe63ab4 37#include <linux/pci.h>
4cc45275 38#include <linux/smp.h>
a45a8c85 39#include <linux/moduleparam.h>
bebe4678
RM
40#include <asm/msr.h>
41#include <asm/processor.h>
9b38096f 42#include <asm/cpu_device_id.h>
bebe4678
RM
43
44#define DRVNAME "coretemp"
45
a45a8c85
JD
46/*
47 * force_tjmax only matters when TjMax can't be read from the CPU itself.
48 * When set, it replaces the driver's suboptimal heuristic.
49 */
50static int force_tjmax;
51module_param_named(tjmax, force_tjmax, int, 0444);
52MODULE_PARM_DESC(tjmax, "TjMax value in degrees Celsius");
53
199e0de7 54#define BASE_SYSFS_ATTR_NO 2 /* Sysfs Base attr no for coretemp */
bdc71c9a 55#define NUM_REAL_CORES 32 /* Number of Real cores per cpu */
199e0de7 56#define CORETEMP_NAME_LENGTH 17 /* String Length of attrs */
c814a4c7 57#define MAX_CORE_ATTRS 4 /* Maximum no of basic attrs */
f4af6fd6 58#define TOTAL_ATTRS (MAX_CORE_ATTRS + 1)
199e0de7
D
59#define MAX_CORE_DATA (NUM_REAL_CORES + BASE_SYSFS_ATTR_NO)
60
780affe0
GR
61#define TO_PHYS_ID(cpu) (cpu_data(cpu).phys_proc_id)
62#define TO_CORE_ID(cpu) (cpu_data(cpu).cpu_core_id)
141168c3
KW
63#define TO_ATTR_NO(cpu) (TO_CORE_ID(cpu) + BASE_SYSFS_ATTR_NO)
64
65#ifdef CONFIG_SMP
bb74e8ca 66#define for_each_sibling(i, cpu) for_each_cpu(i, cpu_sibling_mask(cpu))
199e0de7 67#else
bb74e8ca 68#define for_each_sibling(i, cpu) for (i = 0; false; )
199e0de7 69#endif
bebe4678
RM
70
71/*
199e0de7
D
72 * Per-Core Temperature Data
73 * @last_updated: The time when the current temperature value was updated
74 * earlier (in jiffies).
75 * @cpu_core_id: The CPU Core from which temperature values should be read
76 * This value is passed as "id" field to rdmsr/wrmsr functions.
77 * @status_reg: One of IA32_THERM_STATUS or IA32_PACKAGE_THERM_STATUS,
78 * from where the temperature values should be read.
c814a4c7 79 * @attr_size: Total number of pre-core attrs displayed in the sysfs.
199e0de7
D
80 * @is_pkg_data: If this is 1, the temp_data holds pkgtemp data.
81 * Otherwise, temp_data holds coretemp data.
82 * @valid: If this is 1, the current temperature is valid.
bebe4678 83 */
199e0de7 84struct temp_data {
bebe4678 85 int temp;
6369a288 86 int ttarget;
199e0de7
D
87 int tjmax;
88 unsigned long last_updated;
89 unsigned int cpu;
90 u32 cpu_core_id;
91 u32 status_reg;
c814a4c7 92 int attr_size;
199e0de7
D
93 bool is_pkg_data;
94 bool valid;
c814a4c7
D
95 struct sensor_device_attribute sd_attrs[TOTAL_ATTRS];
96 char attr_name[TOTAL_ATTRS][CORETEMP_NAME_LENGTH];
199e0de7 97 struct mutex update_lock;
bebe4678
RM
98};
99
199e0de7
D
100/* Platform Data per Physical CPU */
101struct platform_data {
102 struct device *hwmon_dev;
103 u16 phys_proc_id;
104 struct temp_data *core_data[MAX_CORE_DATA];
105 struct device_attribute name_attr;
106};
bebe4678 107
199e0de7
D
108struct pdev_entry {
109 struct list_head list;
110 struct platform_device *pdev;
199e0de7 111 u16 phys_proc_id;
199e0de7
D
112};
113
114static LIST_HEAD(pdev_list);
115static DEFINE_MUTEX(pdev_list_mutex);
116
117static ssize_t show_name(struct device *dev,
118 struct device_attribute *devattr, char *buf)
119{
120 return sprintf(buf, "%s\n", DRVNAME);
121}
122
123static ssize_t show_label(struct device *dev,
124 struct device_attribute *devattr, char *buf)
bebe4678 125{
bebe4678 126 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
199e0de7
D
127 struct platform_data *pdata = dev_get_drvdata(dev);
128 struct temp_data *tdata = pdata->core_data[attr->index];
129
130 if (tdata->is_pkg_data)
131 return sprintf(buf, "Physical id %u\n", pdata->phys_proc_id);
bebe4678 132
199e0de7 133 return sprintf(buf, "Core %u\n", tdata->cpu_core_id);
bebe4678
RM
134}
135
199e0de7
D
136static ssize_t show_crit_alarm(struct device *dev,
137 struct device_attribute *devattr, char *buf)
bebe4678 138{
199e0de7
D
139 u32 eax, edx;
140 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
141 struct platform_data *pdata = dev_get_drvdata(dev);
142 struct temp_data *tdata = pdata->core_data[attr->index];
143
144 rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
145
146 return sprintf(buf, "%d\n", (eax >> 5) & 1);
bebe4678
RM
147}
148
199e0de7
D
149static ssize_t show_tjmax(struct device *dev,
150 struct device_attribute *devattr, char *buf)
bebe4678
RM
151{
152 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
199e0de7 153 struct platform_data *pdata = dev_get_drvdata(dev);
bebe4678 154
199e0de7 155 return sprintf(buf, "%d\n", pdata->core_data[attr->index]->tjmax);
bebe4678
RM
156}
157
199e0de7
D
158static ssize_t show_ttarget(struct device *dev,
159 struct device_attribute *devattr, char *buf)
160{
161 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
162 struct platform_data *pdata = dev_get_drvdata(dev);
bebe4678 163
199e0de7
D
164 return sprintf(buf, "%d\n", pdata->core_data[attr->index]->ttarget);
165}
bebe4678 166
199e0de7
D
167static ssize_t show_temp(struct device *dev,
168 struct device_attribute *devattr, char *buf)
bebe4678 169{
199e0de7
D
170 u32 eax, edx;
171 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
172 struct platform_data *pdata = dev_get_drvdata(dev);
173 struct temp_data *tdata = pdata->core_data[attr->index];
bebe4678 174
199e0de7 175 mutex_lock(&tdata->update_lock);
bebe4678 176
199e0de7
D
177 /* Check whether the time interval has elapsed */
178 if (!tdata->valid || time_after(jiffies, tdata->last_updated + HZ)) {
179 rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
180 tdata->valid = 0;
181 /* Check whether the data is valid */
bebe4678 182 if (eax & 0x80000000) {
199e0de7 183 tdata->temp = tdata->tjmax -
4cc45275 184 ((eax >> 16) & 0x7f) * 1000;
199e0de7 185 tdata->valid = 1;
bebe4678 186 }
199e0de7 187 tdata->last_updated = jiffies;
bebe4678
RM
188 }
189
199e0de7
D
190 mutex_unlock(&tdata->update_lock);
191 return tdata->valid ? sprintf(buf, "%d\n", tdata->temp) : -EAGAIN;
bebe4678
RM
192}
193
41e58a1f
GR
194struct tjmax {
195 char const *id;
196 int tjmax;
197};
198
64f50307 199static const struct tjmax __cpuinitconst tjmax_table[] = {
41e58a1f
GR
200 { "CPU D410", 100000 },
201 { "CPU D425", 100000 },
202 { "CPU D510", 100000 },
203 { "CPU D525", 100000 },
204 { "CPU N450", 100000 },
205 { "CPU N455", 100000 },
206 { "CPU N470", 100000 },
207 { "CPU N475", 100000 },
1102dcab
GR
208 { "CPU 230", 100000 }, /* Model 0x1c, stepping 2 */
209 { "CPU 330", 125000 }, /* Model 0x1c, stepping 2 */
210 { "CPU CE4110", 110000 }, /* Model 0x1c, stepping 10 */
211 { "CPU CE4150", 110000 }, /* Model 0x1c, stepping 10 */
212 { "CPU CE4170", 110000 }, /* Model 0x1c, stepping 10 */
41e58a1f
GR
213};
214
d6db23c7
JD
215static int __cpuinit adjust_tjmax(struct cpuinfo_x86 *c, u32 id,
216 struct device *dev)
118a8871
RM
217{
218 /* The 100C is default for both mobile and non mobile CPUs */
219
220 int tjmax = 100000;
eccfed42 221 int tjmax_ee = 85000;
708a62bc 222 int usemsr_ee = 1;
118a8871
RM
223 int err;
224 u32 eax, edx;
1fe63ab4 225 struct pci_dev *host_bridge;
41e58a1f
GR
226 int i;
227
228 /* explicit tjmax table entries override heuristics */
229 for (i = 0; i < ARRAY_SIZE(tjmax_table); i++) {
230 if (strstr(c->x86_model_id, tjmax_table[i].id))
231 return tjmax_table[i].tjmax;
232 }
118a8871
RM
233
234 /* Early chips have no MSR for TjMax */
235
4cc45275 236 if (c->x86_model == 0xf && c->x86_mask < 4)
708a62bc 237 usemsr_ee = 0;
118a8871 238
1fe63ab4 239 /* Atom CPUs */
708a62bc 240
fcc14ac1
JD
241 if (c->x86_model == 0x1c || c->x86_model == 0x26
242 || c->x86_model == 0x27) {
708a62bc 243 usemsr_ee = 0;
1fe63ab4
YW
244
245 host_bridge = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0));
246
247 if (host_bridge && host_bridge->vendor == PCI_VENDOR_ID_INTEL
248 && (host_bridge->device == 0xa000 /* NM10 based nettop */
249 || host_bridge->device == 0xa010)) /* NM10 based netbook */
250 tjmax = 100000;
251 else
252 tjmax = 90000;
253
254 pci_dev_put(host_bridge);
5592906f
GR
255 } else if (c->x86_model == 0x36) {
256 usemsr_ee = 0;
257 tjmax = 100000;
708a62bc
RM
258 }
259
4cc45275 260 if (c->x86_model > 0xe && usemsr_ee) {
eccfed42 261 u8 platform_id;
118a8871 262
4cc45275
GR
263 /*
264 * Now we can detect the mobile CPU using Intel provided table
265 * http://softwarecommunity.intel.com/Wiki/Mobility/720.htm
266 * For Core2 cores, check MSR 0x17, bit 28 1 = Mobile CPU
267 */
118a8871
RM
268 err = rdmsr_safe_on_cpu(id, 0x17, &eax, &edx);
269 if (err) {
270 dev_warn(dev,
271 "Unable to access MSR 0x17, assuming desktop"
272 " CPU\n");
708a62bc 273 usemsr_ee = 0;
eccfed42 274 } else if (c->x86_model < 0x17 && !(eax & 0x10000000)) {
4cc45275
GR
275 /*
276 * Trust bit 28 up to Penryn, I could not find any
277 * documentation on that; if you happen to know
278 * someone at Intel please ask
279 */
708a62bc 280 usemsr_ee = 0;
eccfed42
RM
281 } else {
282 /* Platform ID bits 52:50 (EDX starts at bit 32) */
283 platform_id = (edx >> 18) & 0x7;
284
4cc45275
GR
285 /*
286 * Mobile Penryn CPU seems to be platform ID 7 or 5
287 * (guesswork)
288 */
289 if (c->x86_model == 0x17 &&
290 (platform_id == 5 || platform_id == 7)) {
291 /*
292 * If MSR EE bit is set, set it to 90 degrees C,
293 * otherwise 105 degrees C
294 */
eccfed42
RM
295 tjmax_ee = 90000;
296 tjmax = 105000;
297 }
118a8871
RM
298 }
299 }
300
708a62bc 301 if (usemsr_ee) {
118a8871
RM
302 err = rdmsr_safe_on_cpu(id, 0xee, &eax, &edx);
303 if (err) {
304 dev_warn(dev,
305 "Unable to access MSR 0xEE, for Tjmax, left"
4d7a5644 306 " at default\n");
118a8871 307 } else if (eax & 0x40000000) {
eccfed42 308 tjmax = tjmax_ee;
118a8871 309 }
708a62bc 310 } else if (tjmax == 100000) {
4cc45275
GR
311 /*
312 * If we don't use msr EE it means we are desktop CPU
313 * (with exeception of Atom)
314 */
118a8871
RM
315 dev_warn(dev, "Using relative temperature scale!\n");
316 }
317
318 return tjmax;
319}
320
d6db23c7
JD
321static int __cpuinit get_tjmax(struct cpuinfo_x86 *c, u32 id,
322 struct device *dev)
a321cedb 323{
a321cedb
CE
324 int err;
325 u32 eax, edx;
326 u32 val;
327
4cc45275
GR
328 /*
329 * A new feature of current Intel(R) processors, the
330 * IA32_TEMPERATURE_TARGET contains the TjMax value
331 */
a321cedb
CE
332 err = rdmsr_safe_on_cpu(id, MSR_IA32_TEMPERATURE_TARGET, &eax, &edx);
333 if (err) {
6bf9e9b0
JD
334 if (c->x86_model > 0xe && c->x86_model != 0x1c)
335 dev_warn(dev, "Unable to read TjMax from CPU %u\n", id);
a321cedb
CE
336 } else {
337 val = (eax >> 16) & 0xff;
338 /*
339 * If the TjMax is not plausible, an assumption
340 * will be used
341 */
bb9973e4 342 if (val) {
6bf9e9b0 343 dev_dbg(dev, "TjMax is %d degrees C\n", val);
a321cedb
CE
344 return val * 1000;
345 }
346 }
347
a45a8c85
JD
348 if (force_tjmax) {
349 dev_notice(dev, "TjMax forced to %d degrees C by user\n",
350 force_tjmax);
351 return force_tjmax * 1000;
352 }
353
a321cedb
CE
354 /*
355 * An assumption is made for early CPUs and unreadable MSR.
4f5f71a7 356 * NOTE: the calculated value may not be correct.
a321cedb 357 */
4f5f71a7 358 return adjust_tjmax(c, id, dev);
a321cedb
CE
359}
360
6c931ae1 361static int create_name_attr(struct platform_data *pdata,
d6db23c7 362 struct device *dev)
199e0de7 363{
4258781a 364 sysfs_attr_init(&pdata->name_attr.attr);
199e0de7
D
365 pdata->name_attr.attr.name = "name";
366 pdata->name_attr.attr.mode = S_IRUGO;
367 pdata->name_attr.show = show_name;
368 return device_create_file(dev, &pdata->name_attr);
369}
bebe4678 370
d6db23c7
JD
371static int __cpuinit create_core_attrs(struct temp_data *tdata,
372 struct device *dev, int attr_no)
199e0de7
D
373{
374 int err, i;
e3204ed3 375 static ssize_t (*const rd_ptr[TOTAL_ATTRS]) (struct device *dev,
199e0de7 376 struct device_attribute *devattr, char *buf) = {
c814a4c7 377 show_label, show_crit_alarm, show_temp, show_tjmax,
f4af6fd6 378 show_ttarget };
e3204ed3 379 static const char *const names[TOTAL_ATTRS] = {
199e0de7 380 "temp%d_label", "temp%d_crit_alarm",
c814a4c7 381 "temp%d_input", "temp%d_crit",
f4af6fd6 382 "temp%d_max" };
199e0de7 383
c814a4c7 384 for (i = 0; i < tdata->attr_size; i++) {
199e0de7
D
385 snprintf(tdata->attr_name[i], CORETEMP_NAME_LENGTH, names[i],
386 attr_no);
4258781a 387 sysfs_attr_init(&tdata->sd_attrs[i].dev_attr.attr);
199e0de7
D
388 tdata->sd_attrs[i].dev_attr.attr.name = tdata->attr_name[i];
389 tdata->sd_attrs[i].dev_attr.attr.mode = S_IRUGO;
390 tdata->sd_attrs[i].dev_attr.show = rd_ptr[i];
199e0de7
D
391 tdata->sd_attrs[i].index = attr_no;
392 err = device_create_file(dev, &tdata->sd_attrs[i].dev_attr);
393 if (err)
394 goto exit_free;
bebe4678 395 }
199e0de7
D
396 return 0;
397
398exit_free:
399 while (--i >= 0)
400 device_remove_file(dev, &tdata->sd_attrs[i].dev_attr);
401 return err;
402}
403
199e0de7 404
0eb9782a 405static int __cpuinit chk_ucode_version(unsigned int cpu)
199e0de7 406{
0eb9782a 407 struct cpuinfo_x86 *c = &cpu_data(cpu);
67f363b1 408
199e0de7
D
409 /*
410 * Check if we have problem with errata AE18 of Core processors:
411 * Readings might stop update when processor visited too deep sleep,
412 * fixed for stepping D0 (6EC).
413 */
ca8bc8dc
AK
414 if (c->x86_model == 0xe && c->x86_mask < 0xc && c->microcode < 0x39) {
415 pr_err("Errata AE18 not fixed, update BIOS or "
416 "microcode of the CPU!\n");
417 return -ENODEV;
67f363b1 418 }
199e0de7
D
419 return 0;
420}
421
d6db23c7 422static struct platform_device __cpuinit *coretemp_get_pdev(unsigned int cpu)
199e0de7
D
423{
424 u16 phys_proc_id = TO_PHYS_ID(cpu);
425 struct pdev_entry *p;
426
427 mutex_lock(&pdev_list_mutex);
428
429 list_for_each_entry(p, &pdev_list, list)
430 if (p->phys_proc_id == phys_proc_id) {
431 mutex_unlock(&pdev_list_mutex);
432 return p->pdev;
433 }
434
435 mutex_unlock(&pdev_list_mutex);
436 return NULL;
437}
438
d6db23c7
JD
439static struct temp_data __cpuinit *init_temp_data(unsigned int cpu,
440 int pkg_flag)
199e0de7
D
441{
442 struct temp_data *tdata;
443
444 tdata = kzalloc(sizeof(struct temp_data), GFP_KERNEL);
445 if (!tdata)
446 return NULL;
447
448 tdata->status_reg = pkg_flag ? MSR_IA32_PACKAGE_THERM_STATUS :
449 MSR_IA32_THERM_STATUS;
450 tdata->is_pkg_data = pkg_flag;
451 tdata->cpu = cpu;
452 tdata->cpu_core_id = TO_CORE_ID(cpu);
c814a4c7 453 tdata->attr_size = MAX_CORE_ATTRS;
199e0de7
D
454 mutex_init(&tdata->update_lock);
455 return tdata;
456}
67f363b1 457
d6db23c7 458static int __cpuinit create_core_data(struct platform_device *pdev,
199e0de7
D
459 unsigned int cpu, int pkg_flag)
460{
461 struct temp_data *tdata;
2f1c3db0 462 struct platform_data *pdata = platform_get_drvdata(pdev);
199e0de7
D
463 struct cpuinfo_x86 *c = &cpu_data(cpu);
464 u32 eax, edx;
465 int err, attr_no;
bebe4678 466
a321cedb 467 /*
199e0de7
D
468 * Find attr number for sysfs:
469 * We map the attr number to core id of the CPU
470 * The attr number is always core id + 2
471 * The Pkgtemp will always show up as temp1_*, if available
a321cedb 472 */
199e0de7 473 attr_no = pkg_flag ? 1 : TO_ATTR_NO(cpu);
6369a288 474
199e0de7
D
475 if (attr_no > MAX_CORE_DATA - 1)
476 return -ERANGE;
477
f4e0bcf0
GR
478 /*
479 * Provide a single set of attributes for all HT siblings of a core
480 * to avoid duplicate sensors (the processor ID and core ID of all
6777b9e4
GR
481 * HT siblings of a core are the same).
482 * Skip if a HT sibling of this core is already registered.
f4e0bcf0
GR
483 * This is not an error.
484 */
199e0de7
D
485 if (pdata->core_data[attr_no] != NULL)
486 return 0;
6369a288 487
199e0de7
D
488 tdata = init_temp_data(cpu, pkg_flag);
489 if (!tdata)
490 return -ENOMEM;
bebe4678 491
199e0de7
D
492 /* Test if we can access the status register */
493 err = rdmsr_safe_on_cpu(cpu, tdata->status_reg, &eax, &edx);
494 if (err)
495 goto exit_free;
496
497 /* We can access status register. Get Critical Temperature */
6bf9e9b0 498 tdata->tjmax = get_tjmax(c, cpu, &pdev->dev);
199e0de7 499
c814a4c7 500 /*
f4af6fd6
GR
501 * Read the still undocumented bits 8:15 of IA32_TEMPERATURE_TARGET.
502 * The target temperature is available on older CPUs but not in this
503 * register. Atoms don't have the register at all.
c814a4c7 504 */
f4af6fd6
GR
505 if (c->x86_model > 0xe && c->x86_model != 0x1c) {
506 err = rdmsr_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET,
507 &eax, &edx);
508 if (!err) {
509 tdata->ttarget
510 = tdata->tjmax - ((eax >> 8) & 0xff) * 1000;
511 tdata->attr_size++;
512 }
c814a4c7
D
513 }
514
199e0de7
D
515 pdata->core_data[attr_no] = tdata;
516
517 /* Create sysfs interfaces */
518 err = create_core_attrs(tdata, &pdev->dev, attr_no);
519 if (err)
520 goto exit_free;
bebe4678
RM
521
522 return 0;
199e0de7 523exit_free:
20ecb499 524 pdata->core_data[attr_no] = NULL;
199e0de7
D
525 kfree(tdata);
526 return err;
527}
528
d6db23c7 529static void __cpuinit coretemp_add_core(unsigned int cpu, int pkg_flag)
199e0de7 530{
199e0de7
D
531 struct platform_device *pdev = coretemp_get_pdev(cpu);
532 int err;
533
534 if (!pdev)
535 return;
536
2f1c3db0 537 err = create_core_data(pdev, cpu, pkg_flag);
199e0de7
D
538 if (err)
539 dev_err(&pdev->dev, "Adding Core %u failed\n", cpu);
540}
541
542static void coretemp_remove_core(struct platform_data *pdata,
543 struct device *dev, int indx)
544{
545 int i;
546 struct temp_data *tdata = pdata->core_data[indx];
547
548 /* Remove the sysfs attributes */
c814a4c7 549 for (i = 0; i < tdata->attr_size; i++)
199e0de7
D
550 device_remove_file(dev, &tdata->sd_attrs[i].dev_attr);
551
552 kfree(pdata->core_data[indx]);
553 pdata->core_data[indx] = NULL;
554}
555
6c931ae1 556static int coretemp_probe(struct platform_device *pdev)
199e0de7
D
557{
558 struct platform_data *pdata;
559 int err;
bebe4678 560
199e0de7
D
561 /* Initialize the per-package data structures */
562 pdata = kzalloc(sizeof(struct platform_data), GFP_KERNEL);
563 if (!pdata)
564 return -ENOMEM;
565
566 err = create_name_attr(pdata, &pdev->dev);
567 if (err)
568 goto exit_free;
569
b3a242a6 570 pdata->phys_proc_id = pdev->id;
199e0de7
D
571 platform_set_drvdata(pdev, pdata);
572
573 pdata->hwmon_dev = hwmon_device_register(&pdev->dev);
574 if (IS_ERR(pdata->hwmon_dev)) {
575 err = PTR_ERR(pdata->hwmon_dev);
576 dev_err(&pdev->dev, "Class registration failed (%d)\n", err);
577 goto exit_name;
578 }
579 return 0;
580
581exit_name:
582 device_remove_file(&pdev->dev, &pdata->name_attr);
583 platform_set_drvdata(pdev, NULL);
bebe4678 584exit_free:
199e0de7 585 kfree(pdata);
bebe4678
RM
586 return err;
587}
588
589static int __devexit coretemp_remove(struct platform_device *pdev)
590{
199e0de7
D
591 struct platform_data *pdata = platform_get_drvdata(pdev);
592 int i;
bebe4678 593
199e0de7
D
594 for (i = MAX_CORE_DATA - 1; i >= 0; --i)
595 if (pdata->core_data[i])
596 coretemp_remove_core(pdata, &pdev->dev, i);
597
598 device_remove_file(&pdev->dev, &pdata->name_attr);
599 hwmon_device_unregister(pdata->hwmon_dev);
bebe4678 600 platform_set_drvdata(pdev, NULL);
199e0de7 601 kfree(pdata);
bebe4678
RM
602 return 0;
603}
604
605static struct platform_driver coretemp_driver = {
606 .driver = {
607 .owner = THIS_MODULE,
608 .name = DRVNAME,
609 },
610 .probe = coretemp_probe,
9e5e9b7a 611 .remove = coretemp_remove,
bebe4678
RM
612};
613
bebe4678
RM
614static int __cpuinit coretemp_device_add(unsigned int cpu)
615{
616 int err;
617 struct platform_device *pdev;
618 struct pdev_entry *pdev_entry;
d883b9f0
JD
619
620 mutex_lock(&pdev_list_mutex);
621
b3a242a6 622 pdev = platform_device_alloc(DRVNAME, TO_PHYS_ID(cpu));
bebe4678
RM
623 if (!pdev) {
624 err = -ENOMEM;
f8bb8925 625 pr_err("Device allocation failed\n");
bebe4678
RM
626 goto exit;
627 }
628
629 pdev_entry = kzalloc(sizeof(struct pdev_entry), GFP_KERNEL);
630 if (!pdev_entry) {
631 err = -ENOMEM;
632 goto exit_device_put;
633 }
634
635 err = platform_device_add(pdev);
636 if (err) {
f8bb8925 637 pr_err("Device addition failed (%d)\n", err);
bebe4678
RM
638 goto exit_device_free;
639 }
640
641 pdev_entry->pdev = pdev;
0eb9782a 642 pdev_entry->phys_proc_id = pdev->id;
199e0de7 643
bebe4678
RM
644 list_add_tail(&pdev_entry->list, &pdev_list);
645 mutex_unlock(&pdev_list_mutex);
646
647 return 0;
648
649exit_device_free:
650 kfree(pdev_entry);
651exit_device_put:
652 platform_device_put(pdev);
653exit:
d883b9f0 654 mutex_unlock(&pdev_list_mutex);
bebe4678
RM
655 return err;
656}
657
d6db23c7 658static void __cpuinit coretemp_device_remove(unsigned int cpu)
bebe4678 659{
199e0de7
D
660 struct pdev_entry *p, *n;
661 u16 phys_proc_id = TO_PHYS_ID(cpu);
e40cc4bd 662
bebe4678 663 mutex_lock(&pdev_list_mutex);
199e0de7
D
664 list_for_each_entry_safe(p, n, &pdev_list, list) {
665 if (p->phys_proc_id != phys_proc_id)
e40cc4bd 666 continue;
e40cc4bd
JB
667 platform_device_unregister(p->pdev);
668 list_del(&p->list);
e40cc4bd 669 kfree(p);
bebe4678
RM
670 }
671 mutex_unlock(&pdev_list_mutex);
672}
673
d6db23c7 674static bool __cpuinit is_any_core_online(struct platform_data *pdata)
199e0de7
D
675{
676 int i;
677
678 /* Find online cores, except pkgtemp data */
679 for (i = MAX_CORE_DATA - 1; i >= 0; --i) {
680 if (pdata->core_data[i] &&
681 !pdata->core_data[i]->is_pkg_data) {
682 return true;
683 }
684 }
685 return false;
686}
687
688static void __cpuinit get_core_online(unsigned int cpu)
689{
690 struct cpuinfo_x86 *c = &cpu_data(cpu);
691 struct platform_device *pdev = coretemp_get_pdev(cpu);
692 int err;
693
694 /*
695 * CPUID.06H.EAX[0] indicates whether the CPU has thermal
696 * sensors. We check this bit only, all the early CPUs
697 * without thermal sensors will be filtered out.
698 */
4ad33411 699 if (!cpu_has(c, X86_FEATURE_DTHERM))
199e0de7
D
700 return;
701
702 if (!pdev) {
0eb9782a
JD
703 /* Check the microcode version of the CPU */
704 if (chk_ucode_version(cpu))
705 return;
706
199e0de7
D
707 /*
708 * Alright, we have DTS support.
709 * We are bringing the _first_ core in this pkg
710 * online. So, initialize per-pkg data structures and
711 * then bring this core online.
712 */
713 err = coretemp_device_add(cpu);
714 if (err)
715 return;
716 /*
717 * Check whether pkgtemp support is available.
718 * If so, add interfaces for pkgtemp.
719 */
720 if (cpu_has(c, X86_FEATURE_PTS))
721 coretemp_add_core(cpu, 1);
722 }
723 /*
724 * Physical CPU device already exists.
725 * So, just add interfaces for this core.
726 */
727 coretemp_add_core(cpu, 0);
728}
729
730static void __cpuinit put_core_offline(unsigned int cpu)
731{
732 int i, indx;
733 struct platform_data *pdata;
734 struct platform_device *pdev = coretemp_get_pdev(cpu);
735
736 /* If the physical CPU device does not exist, just return */
737 if (!pdev)
738 return;
739
740 pdata = platform_get_drvdata(pdev);
741
742 indx = TO_ATTR_NO(cpu);
743
b7048711
KS
744 /* The core id is too big, just return */
745 if (indx > MAX_CORE_DATA - 1)
746 return;
747
199e0de7
D
748 if (pdata->core_data[indx] && pdata->core_data[indx]->cpu == cpu)
749 coretemp_remove_core(pdata, &pdev->dev, indx);
750
f4e0bcf0 751 /*
6777b9e4
GR
752 * If a HT sibling of a core is taken offline, but another HT sibling
753 * of the same core is still online, register the alternate sibling.
754 * This ensures that exactly one set of attributes is provided as long
755 * as at least one HT sibling of a core is online.
f4e0bcf0 756 */
bb74e8ca 757 for_each_sibling(i, cpu) {
199e0de7
D
758 if (i != cpu) {
759 get_core_online(i);
f4e0bcf0
GR
760 /*
761 * Display temperature sensor data for one HT sibling
762 * per core only, so abort the loop after one such
763 * sibling has been found.
764 */
199e0de7
D
765 break;
766 }
767 }
768 /*
769 * If all cores in this pkg are offline, remove the device.
770 * coretemp_device_remove calls unregister_platform_device,
771 * which in turn calls coretemp_remove. This removes the
772 * pkgtemp entry and does other clean ups.
773 */
774 if (!is_any_core_online(pdata))
775 coretemp_device_remove(cpu);
776}
777
ba7c1927 778static int __cpuinit coretemp_cpu_callback(struct notifier_block *nfb,
bebe4678
RM
779 unsigned long action, void *hcpu)
780{
781 unsigned int cpu = (unsigned long) hcpu;
782
783 switch (action) {
784 case CPU_ONLINE:
561d9a96 785 case CPU_DOWN_FAILED:
199e0de7 786 get_core_online(cpu);
bebe4678 787 break;
561d9a96 788 case CPU_DOWN_PREPARE:
199e0de7 789 put_core_offline(cpu);
bebe4678
RM
790 break;
791 }
792 return NOTIFY_OK;
793}
794
ba7c1927 795static struct notifier_block coretemp_cpu_notifier __refdata = {
bebe4678
RM
796 .notifier_call = coretemp_cpu_callback,
797};
bebe4678 798
e273bd98 799static const struct x86_cpu_id __initconst coretemp_ids[] = {
4ad33411 800 { X86_VENDOR_INTEL, X86_FAMILY_ANY, X86_MODEL_ANY, X86_FEATURE_DTHERM },
9b38096f
AK
801 {}
802};
803MODULE_DEVICE_TABLE(x86cpu, coretemp_ids);
804
bebe4678
RM
805static int __init coretemp_init(void)
806{
1268a172 807 int i, err;
bebe4678 808
9b38096f
AK
809 /*
810 * CPUID.06H.EAX[0] indicates whether the CPU has thermal
811 * sensors. We check this bit only, all the early CPUs
812 * without thermal sensors will be filtered out.
813 */
814 if (!x86_match_cpu(coretemp_ids))
815 return -ENODEV;
bebe4678
RM
816
817 err = platform_driver_register(&coretemp_driver);
818 if (err)
819 goto exit;
820
641f1456 821 get_online_cpus();
a4659053 822 for_each_online_cpu(i)
199e0de7 823 get_core_online(i);
89a3fd35
JB
824
825#ifndef CONFIG_HOTPLUG_CPU
bebe4678 826 if (list_empty(&pdev_list)) {
641f1456 827 put_online_cpus();
bebe4678
RM
828 err = -ENODEV;
829 goto exit_driver_unreg;
830 }
89a3fd35 831#endif
bebe4678 832
bebe4678 833 register_hotcpu_notifier(&coretemp_cpu_notifier);
641f1456 834 put_online_cpus();
bebe4678
RM
835 return 0;
836
0dca94ba 837#ifndef CONFIG_HOTPLUG_CPU
89a3fd35 838exit_driver_unreg:
bebe4678 839 platform_driver_unregister(&coretemp_driver);
0dca94ba 840#endif
bebe4678
RM
841exit:
842 return err;
843}
844
845static void __exit coretemp_exit(void)
846{
847 struct pdev_entry *p, *n;
17c10d61 848
641f1456 849 get_online_cpus();
bebe4678 850 unregister_hotcpu_notifier(&coretemp_cpu_notifier);
bebe4678
RM
851 mutex_lock(&pdev_list_mutex);
852 list_for_each_entry_safe(p, n, &pdev_list, list) {
853 platform_device_unregister(p->pdev);
854 list_del(&p->list);
855 kfree(p);
856 }
857 mutex_unlock(&pdev_list_mutex);
641f1456 858 put_online_cpus();
bebe4678
RM
859 platform_driver_unregister(&coretemp_driver);
860}
861
862MODULE_AUTHOR("Rudolf Marek <r.marek@assembler.cz>");
863MODULE_DESCRIPTION("Intel Core temperature monitor");
864MODULE_LICENSE("GPL");
865
866module_init(coretemp_init)
867module_exit(coretemp_exit)