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bebe4678 RM |
1 | /* |
2 | * coretemp.c - Linux kernel module for hardware monitoring | |
3 | * | |
4 | * Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz> | |
5 | * | |
6 | * Inspired from many hwmon drivers | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; version 2 of the License. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA | |
20 | * 02110-1301 USA. | |
21 | */ | |
22 | ||
f8bb8925 JP |
23 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
24 | ||
bebe4678 | 25 | #include <linux/module.h> |
bebe4678 RM |
26 | #include <linux/init.h> |
27 | #include <linux/slab.h> | |
28 | #include <linux/jiffies.h> | |
29 | #include <linux/hwmon.h> | |
30 | #include <linux/sysfs.h> | |
31 | #include <linux/hwmon-sysfs.h> | |
32 | #include <linux/err.h> | |
33 | #include <linux/mutex.h> | |
34 | #include <linux/list.h> | |
35 | #include <linux/platform_device.h> | |
36 | #include <linux/cpu.h> | |
4cc45275 | 37 | #include <linux/smp.h> |
a45a8c85 | 38 | #include <linux/moduleparam.h> |
14513ee6 | 39 | #include <linux/pci.h> |
bebe4678 RM |
40 | #include <asm/msr.h> |
41 | #include <asm/processor.h> | |
9b38096f | 42 | #include <asm/cpu_device_id.h> |
bebe4678 RM |
43 | |
44 | #define DRVNAME "coretemp" | |
45 | ||
a45a8c85 JD |
46 | /* |
47 | * force_tjmax only matters when TjMax can't be read from the CPU itself. | |
48 | * When set, it replaces the driver's suboptimal heuristic. | |
49 | */ | |
50 | static int force_tjmax; | |
51 | module_param_named(tjmax, force_tjmax, int, 0444); | |
52 | MODULE_PARM_DESC(tjmax, "TjMax value in degrees Celsius"); | |
53 | ||
723f5734 | 54 | #define PKG_SYSFS_ATTR_NO 1 /* Sysfs attribute for package temp */ |
199e0de7 | 55 | #define BASE_SYSFS_ATTR_NO 2 /* Sysfs Base attr no for coretemp */ |
cc904f9c | 56 | #define NUM_REAL_CORES 128 /* Number of Real cores per cpu */ |
3f9aec76 | 57 | #define CORETEMP_NAME_LENGTH 19 /* String Length of attrs */ |
c814a4c7 | 58 | #define MAX_CORE_ATTRS 4 /* Maximum no of basic attrs */ |
f4af6fd6 | 59 | #define TOTAL_ATTRS (MAX_CORE_ATTRS + 1) |
199e0de7 D |
60 | #define MAX_CORE_DATA (NUM_REAL_CORES + BASE_SYSFS_ATTR_NO) |
61 | ||
780affe0 GR |
62 | #define TO_PHYS_ID(cpu) (cpu_data(cpu).phys_proc_id) |
63 | #define TO_CORE_ID(cpu) (cpu_data(cpu).cpu_core_id) | |
141168c3 KW |
64 | #define TO_ATTR_NO(cpu) (TO_CORE_ID(cpu) + BASE_SYSFS_ATTR_NO) |
65 | ||
66 | #ifdef CONFIG_SMP | |
19a34eea BG |
67 | #define for_each_sibling(i, cpu) \ |
68 | for_each_cpu(i, topology_sibling_cpumask(cpu)) | |
199e0de7 | 69 | #else |
bb74e8ca | 70 | #define for_each_sibling(i, cpu) for (i = 0; false; ) |
199e0de7 | 71 | #endif |
bebe4678 RM |
72 | |
73 | /* | |
199e0de7 D |
74 | * Per-Core Temperature Data |
75 | * @last_updated: The time when the current temperature value was updated | |
76 | * earlier (in jiffies). | |
77 | * @cpu_core_id: The CPU Core from which temperature values should be read | |
78 | * This value is passed as "id" field to rdmsr/wrmsr functions. | |
79 | * @status_reg: One of IA32_THERM_STATUS or IA32_PACKAGE_THERM_STATUS, | |
80 | * from where the temperature values should be read. | |
c814a4c7 | 81 | * @attr_size: Total number of pre-core attrs displayed in the sysfs. |
199e0de7 D |
82 | * @is_pkg_data: If this is 1, the temp_data holds pkgtemp data. |
83 | * Otherwise, temp_data holds coretemp data. | |
84 | * @valid: If this is 1, the current temperature is valid. | |
bebe4678 | 85 | */ |
199e0de7 | 86 | struct temp_data { |
bebe4678 | 87 | int temp; |
6369a288 | 88 | int ttarget; |
199e0de7 D |
89 | int tjmax; |
90 | unsigned long last_updated; | |
91 | unsigned int cpu; | |
92 | u32 cpu_core_id; | |
93 | u32 status_reg; | |
c814a4c7 | 94 | int attr_size; |
199e0de7 D |
95 | bool is_pkg_data; |
96 | bool valid; | |
c814a4c7 D |
97 | struct sensor_device_attribute sd_attrs[TOTAL_ATTRS]; |
98 | char attr_name[TOTAL_ATTRS][CORETEMP_NAME_LENGTH]; | |
1075305d GR |
99 | struct attribute *attrs[TOTAL_ATTRS + 1]; |
100 | struct attribute_group attr_group; | |
199e0de7 | 101 | struct mutex update_lock; |
bebe4678 RM |
102 | }; |
103 | ||
199e0de7 D |
104 | /* Platform Data per Physical CPU */ |
105 | struct platform_data { | |
106 | struct device *hwmon_dev; | |
107 | u16 phys_proc_id; | |
108 | struct temp_data *core_data[MAX_CORE_DATA]; | |
109 | struct device_attribute name_attr; | |
110 | }; | |
bebe4678 | 111 | |
199e0de7 D |
112 | struct pdev_entry { |
113 | struct list_head list; | |
114 | struct platform_device *pdev; | |
199e0de7 | 115 | u16 phys_proc_id; |
199e0de7 D |
116 | }; |
117 | ||
118 | static LIST_HEAD(pdev_list); | |
119 | static DEFINE_MUTEX(pdev_list_mutex); | |
120 | ||
199e0de7 D |
121 | static ssize_t show_label(struct device *dev, |
122 | struct device_attribute *devattr, char *buf) | |
bebe4678 | 123 | { |
bebe4678 | 124 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); |
199e0de7 D |
125 | struct platform_data *pdata = dev_get_drvdata(dev); |
126 | struct temp_data *tdata = pdata->core_data[attr->index]; | |
127 | ||
128 | if (tdata->is_pkg_data) | |
129 | return sprintf(buf, "Physical id %u\n", pdata->phys_proc_id); | |
bebe4678 | 130 | |
199e0de7 | 131 | return sprintf(buf, "Core %u\n", tdata->cpu_core_id); |
bebe4678 RM |
132 | } |
133 | ||
199e0de7 D |
134 | static ssize_t show_crit_alarm(struct device *dev, |
135 | struct device_attribute *devattr, char *buf) | |
bebe4678 | 136 | { |
199e0de7 D |
137 | u32 eax, edx; |
138 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
139 | struct platform_data *pdata = dev_get_drvdata(dev); | |
140 | struct temp_data *tdata = pdata->core_data[attr->index]; | |
141 | ||
723f5734 | 142 | mutex_lock(&tdata->update_lock); |
199e0de7 | 143 | rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx); |
723f5734 | 144 | mutex_unlock(&tdata->update_lock); |
199e0de7 D |
145 | |
146 | return sprintf(buf, "%d\n", (eax >> 5) & 1); | |
bebe4678 RM |
147 | } |
148 | ||
199e0de7 D |
149 | static ssize_t show_tjmax(struct device *dev, |
150 | struct device_attribute *devattr, char *buf) | |
bebe4678 RM |
151 | { |
152 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
199e0de7 | 153 | struct platform_data *pdata = dev_get_drvdata(dev); |
bebe4678 | 154 | |
199e0de7 | 155 | return sprintf(buf, "%d\n", pdata->core_data[attr->index]->tjmax); |
bebe4678 RM |
156 | } |
157 | ||
199e0de7 D |
158 | static ssize_t show_ttarget(struct device *dev, |
159 | struct device_attribute *devattr, char *buf) | |
160 | { | |
161 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
162 | struct platform_data *pdata = dev_get_drvdata(dev); | |
bebe4678 | 163 | |
199e0de7 D |
164 | return sprintf(buf, "%d\n", pdata->core_data[attr->index]->ttarget); |
165 | } | |
bebe4678 | 166 | |
199e0de7 D |
167 | static ssize_t show_temp(struct device *dev, |
168 | struct device_attribute *devattr, char *buf) | |
bebe4678 | 169 | { |
199e0de7 D |
170 | u32 eax, edx; |
171 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
172 | struct platform_data *pdata = dev_get_drvdata(dev); | |
173 | struct temp_data *tdata = pdata->core_data[attr->index]; | |
bebe4678 | 174 | |
199e0de7 | 175 | mutex_lock(&tdata->update_lock); |
bebe4678 | 176 | |
199e0de7 D |
177 | /* Check whether the time interval has elapsed */ |
178 | if (!tdata->valid || time_after(jiffies, tdata->last_updated + HZ)) { | |
179 | rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx); | |
bf6ea084 GR |
180 | /* |
181 | * Ignore the valid bit. In all observed cases the register | |
182 | * value is either low or zero if the valid bit is 0. | |
183 | * Return it instead of reporting an error which doesn't | |
184 | * really help at all. | |
185 | */ | |
186 | tdata->temp = tdata->tjmax - ((eax >> 16) & 0x7f) * 1000; | |
187 | tdata->valid = 1; | |
199e0de7 | 188 | tdata->last_updated = jiffies; |
bebe4678 RM |
189 | } |
190 | ||
199e0de7 | 191 | mutex_unlock(&tdata->update_lock); |
bf6ea084 | 192 | return sprintf(buf, "%d\n", tdata->temp); |
bebe4678 RM |
193 | } |
194 | ||
14513ee6 GR |
195 | struct tjmax_pci { |
196 | unsigned int device; | |
197 | int tjmax; | |
198 | }; | |
199 | ||
200 | static const struct tjmax_pci tjmax_pci_table[] = { | |
347c16cf | 201 | { 0x0708, 110000 }, /* CE41x0 (Sodaville ) */ |
14513ee6 GR |
202 | { 0x0c72, 102000 }, /* Atom S1240 (Centerton) */ |
203 | { 0x0c73, 95000 }, /* Atom S1220 (Centerton) */ | |
204 | { 0x0c75, 95000 }, /* Atom S1260 (Centerton) */ | |
205 | }; | |
206 | ||
41e58a1f GR |
207 | struct tjmax { |
208 | char const *id; | |
209 | int tjmax; | |
210 | }; | |
211 | ||
d23e2ae1 | 212 | static const struct tjmax tjmax_table[] = { |
1102dcab GR |
213 | { "CPU 230", 100000 }, /* Model 0x1c, stepping 2 */ |
214 | { "CPU 330", 125000 }, /* Model 0x1c, stepping 2 */ | |
41e58a1f GR |
215 | }; |
216 | ||
2fa5222e GR |
217 | struct tjmax_model { |
218 | u8 model; | |
219 | u8 mask; | |
220 | int tjmax; | |
221 | }; | |
222 | ||
223 | #define ANY 0xff | |
224 | ||
d23e2ae1 | 225 | static const struct tjmax_model tjmax_model_table[] = { |
9e3970fb | 226 | { 0x1c, 10, 100000 }, /* D4xx, K4xx, N4xx, D5xx, K5xx, N5xx */ |
2fa5222e GR |
227 | { 0x1c, ANY, 90000 }, /* Z5xx, N2xx, possibly others |
228 | * Note: Also matches 230 and 330, | |
229 | * which are covered by tjmax_table | |
230 | */ | |
231 | { 0x26, ANY, 90000 }, /* Atom Tunnel Creek (Exx), Lincroft (Z6xx) | |
232 | * Note: TjMax for E6xxT is 110C, but CPU type | |
233 | * is undetectable by software | |
234 | */ | |
235 | { 0x27, ANY, 90000 }, /* Atom Medfield (Z2460) */ | |
14513ee6 GR |
236 | { 0x35, ANY, 90000 }, /* Atom Clover Trail/Cloverview (Z27x0) */ |
237 | { 0x36, ANY, 100000 }, /* Atom Cedar Trail/Cedarview (N2xxx, D2xxx) | |
238 | * Also matches S12x0 (stepping 9), covered by | |
239 | * PCI table | |
240 | */ | |
2fa5222e GR |
241 | }; |
242 | ||
d23e2ae1 | 243 | static int adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev) |
118a8871 RM |
244 | { |
245 | /* The 100C is default for both mobile and non mobile CPUs */ | |
246 | ||
247 | int tjmax = 100000; | |
eccfed42 | 248 | int tjmax_ee = 85000; |
708a62bc | 249 | int usemsr_ee = 1; |
118a8871 RM |
250 | int err; |
251 | u32 eax, edx; | |
41e58a1f | 252 | int i; |
14513ee6 GR |
253 | struct pci_dev *host_bridge = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0)); |
254 | ||
255 | /* | |
256 | * Explicit tjmax table entries override heuristics. | |
257 | * First try PCI host bridge IDs, followed by model ID strings | |
258 | * and model/stepping information. | |
259 | */ | |
260 | if (host_bridge && host_bridge->vendor == PCI_VENDOR_ID_INTEL) { | |
261 | for (i = 0; i < ARRAY_SIZE(tjmax_pci_table); i++) { | |
262 | if (host_bridge->device == tjmax_pci_table[i].device) | |
263 | return tjmax_pci_table[i].tjmax; | |
264 | } | |
265 | } | |
41e58a1f | 266 | |
41e58a1f GR |
267 | for (i = 0; i < ARRAY_SIZE(tjmax_table); i++) { |
268 | if (strstr(c->x86_model_id, tjmax_table[i].id)) | |
269 | return tjmax_table[i].tjmax; | |
270 | } | |
118a8871 | 271 | |
2fa5222e GR |
272 | for (i = 0; i < ARRAY_SIZE(tjmax_model_table); i++) { |
273 | const struct tjmax_model *tm = &tjmax_model_table[i]; | |
274 | if (c->x86_model == tm->model && | |
275 | (tm->mask == ANY || c->x86_mask == tm->mask)) | |
276 | return tm->tjmax; | |
72cbdddc | 277 | } |
1fe63ab4 | 278 | |
72cbdddc | 279 | /* Early chips have no MSR for TjMax */ |
1fe63ab4 | 280 | |
72cbdddc | 281 | if (c->x86_model == 0xf && c->x86_mask < 4) |
5592906f | 282 | usemsr_ee = 0; |
708a62bc | 283 | |
4cc45275 | 284 | if (c->x86_model > 0xe && usemsr_ee) { |
eccfed42 | 285 | u8 platform_id; |
118a8871 | 286 | |
4cc45275 GR |
287 | /* |
288 | * Now we can detect the mobile CPU using Intel provided table | |
289 | * http://softwarecommunity.intel.com/Wiki/Mobility/720.htm | |
290 | * For Core2 cores, check MSR 0x17, bit 28 1 = Mobile CPU | |
291 | */ | |
118a8871 RM |
292 | err = rdmsr_safe_on_cpu(id, 0x17, &eax, &edx); |
293 | if (err) { | |
294 | dev_warn(dev, | |
295 | "Unable to access MSR 0x17, assuming desktop" | |
296 | " CPU\n"); | |
708a62bc | 297 | usemsr_ee = 0; |
eccfed42 | 298 | } else if (c->x86_model < 0x17 && !(eax & 0x10000000)) { |
4cc45275 GR |
299 | /* |
300 | * Trust bit 28 up to Penryn, I could not find any | |
301 | * documentation on that; if you happen to know | |
302 | * someone at Intel please ask | |
303 | */ | |
708a62bc | 304 | usemsr_ee = 0; |
eccfed42 RM |
305 | } else { |
306 | /* Platform ID bits 52:50 (EDX starts at bit 32) */ | |
307 | platform_id = (edx >> 18) & 0x7; | |
308 | ||
4cc45275 GR |
309 | /* |
310 | * Mobile Penryn CPU seems to be platform ID 7 or 5 | |
311 | * (guesswork) | |
312 | */ | |
313 | if (c->x86_model == 0x17 && | |
314 | (platform_id == 5 || platform_id == 7)) { | |
315 | /* | |
316 | * If MSR EE bit is set, set it to 90 degrees C, | |
317 | * otherwise 105 degrees C | |
318 | */ | |
eccfed42 RM |
319 | tjmax_ee = 90000; |
320 | tjmax = 105000; | |
321 | } | |
118a8871 RM |
322 | } |
323 | } | |
324 | ||
708a62bc | 325 | if (usemsr_ee) { |
118a8871 RM |
326 | err = rdmsr_safe_on_cpu(id, 0xee, &eax, &edx); |
327 | if (err) { | |
328 | dev_warn(dev, | |
329 | "Unable to access MSR 0xEE, for Tjmax, left" | |
4d7a5644 | 330 | " at default\n"); |
118a8871 | 331 | } else if (eax & 0x40000000) { |
eccfed42 | 332 | tjmax = tjmax_ee; |
118a8871 | 333 | } |
708a62bc | 334 | } else if (tjmax == 100000) { |
4cc45275 GR |
335 | /* |
336 | * If we don't use msr EE it means we are desktop CPU | |
337 | * (with exeception of Atom) | |
338 | */ | |
118a8871 RM |
339 | dev_warn(dev, "Using relative temperature scale!\n"); |
340 | } | |
341 | ||
342 | return tjmax; | |
343 | } | |
344 | ||
1c2faa22 GR |
345 | static bool cpu_has_tjmax(struct cpuinfo_x86 *c) |
346 | { | |
347 | u8 model = c->x86_model; | |
348 | ||
349 | return model > 0xe && | |
350 | model != 0x1c && | |
351 | model != 0x26 && | |
352 | model != 0x27 && | |
353 | model != 0x35 && | |
354 | model != 0x36; | |
355 | } | |
356 | ||
d23e2ae1 | 357 | static int get_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev) |
a321cedb | 358 | { |
a321cedb CE |
359 | int err; |
360 | u32 eax, edx; | |
361 | u32 val; | |
362 | ||
4cc45275 GR |
363 | /* |
364 | * A new feature of current Intel(R) processors, the | |
365 | * IA32_TEMPERATURE_TARGET contains the TjMax value | |
366 | */ | |
a321cedb CE |
367 | err = rdmsr_safe_on_cpu(id, MSR_IA32_TEMPERATURE_TARGET, &eax, &edx); |
368 | if (err) { | |
1c2faa22 | 369 | if (cpu_has_tjmax(c)) |
6bf9e9b0 | 370 | dev_warn(dev, "Unable to read TjMax from CPU %u\n", id); |
a321cedb | 371 | } else { |
c0940e95 | 372 | val = (eax >> 16) & 0xff; |
a321cedb CE |
373 | /* |
374 | * If the TjMax is not plausible, an assumption | |
375 | * will be used | |
376 | */ | |
c0940e95 | 377 | if (val) { |
6bf9e9b0 | 378 | dev_dbg(dev, "TjMax is %d degrees C\n", val); |
a321cedb CE |
379 | return val * 1000; |
380 | } | |
381 | } | |
382 | ||
a45a8c85 JD |
383 | if (force_tjmax) { |
384 | dev_notice(dev, "TjMax forced to %d degrees C by user\n", | |
385 | force_tjmax); | |
386 | return force_tjmax * 1000; | |
387 | } | |
388 | ||
a321cedb CE |
389 | /* |
390 | * An assumption is made for early CPUs and unreadable MSR. | |
4f5f71a7 | 391 | * NOTE: the calculated value may not be correct. |
a321cedb | 392 | */ |
4f5f71a7 | 393 | return adjust_tjmax(c, id, dev); |
a321cedb CE |
394 | } |
395 | ||
d23e2ae1 PG |
396 | static int create_core_attrs(struct temp_data *tdata, struct device *dev, |
397 | int attr_no) | |
199e0de7 | 398 | { |
1075305d | 399 | int i; |
e3204ed3 | 400 | static ssize_t (*const rd_ptr[TOTAL_ATTRS]) (struct device *dev, |
199e0de7 | 401 | struct device_attribute *devattr, char *buf) = { |
c814a4c7 | 402 | show_label, show_crit_alarm, show_temp, show_tjmax, |
f4af6fd6 | 403 | show_ttarget }; |
1055b5f9 RV |
404 | static const char *const suffixes[TOTAL_ATTRS] = { |
405 | "label", "crit_alarm", "input", "crit", "max" | |
406 | }; | |
199e0de7 | 407 | |
c814a4c7 | 408 | for (i = 0; i < tdata->attr_size; i++) { |
1055b5f9 RV |
409 | snprintf(tdata->attr_name[i], CORETEMP_NAME_LENGTH, |
410 | "temp%d_%s", attr_no, suffixes[i]); | |
4258781a | 411 | sysfs_attr_init(&tdata->sd_attrs[i].dev_attr.attr); |
199e0de7 D |
412 | tdata->sd_attrs[i].dev_attr.attr.name = tdata->attr_name[i]; |
413 | tdata->sd_attrs[i].dev_attr.attr.mode = S_IRUGO; | |
414 | tdata->sd_attrs[i].dev_attr.show = rd_ptr[i]; | |
199e0de7 | 415 | tdata->sd_attrs[i].index = attr_no; |
1075305d | 416 | tdata->attrs[i] = &tdata->sd_attrs[i].dev_attr.attr; |
bebe4678 | 417 | } |
1075305d GR |
418 | tdata->attr_group.attrs = tdata->attrs; |
419 | return sysfs_create_group(&dev->kobj, &tdata->attr_group); | |
199e0de7 D |
420 | } |
421 | ||
199e0de7 | 422 | |
d23e2ae1 | 423 | static int chk_ucode_version(unsigned int cpu) |
199e0de7 | 424 | { |
0eb9782a | 425 | struct cpuinfo_x86 *c = &cpu_data(cpu); |
67f363b1 | 426 | |
199e0de7 D |
427 | /* |
428 | * Check if we have problem with errata AE18 of Core processors: | |
429 | * Readings might stop update when processor visited too deep sleep, | |
430 | * fixed for stepping D0 (6EC). | |
431 | */ | |
ca8bc8dc | 432 | if (c->x86_model == 0xe && c->x86_mask < 0xc && c->microcode < 0x39) { |
b55f3757 | 433 | pr_err("Errata AE18 not fixed, update BIOS or microcode of the CPU!\n"); |
ca8bc8dc | 434 | return -ENODEV; |
67f363b1 | 435 | } |
199e0de7 D |
436 | return 0; |
437 | } | |
438 | ||
d23e2ae1 | 439 | static struct platform_device *coretemp_get_pdev(unsigned int cpu) |
199e0de7 D |
440 | { |
441 | u16 phys_proc_id = TO_PHYS_ID(cpu); | |
442 | struct pdev_entry *p; | |
443 | ||
444 | mutex_lock(&pdev_list_mutex); | |
445 | ||
446 | list_for_each_entry(p, &pdev_list, list) | |
447 | if (p->phys_proc_id == phys_proc_id) { | |
448 | mutex_unlock(&pdev_list_mutex); | |
449 | return p->pdev; | |
450 | } | |
451 | ||
452 | mutex_unlock(&pdev_list_mutex); | |
453 | return NULL; | |
454 | } | |
455 | ||
d23e2ae1 | 456 | static struct temp_data *init_temp_data(unsigned int cpu, int pkg_flag) |
199e0de7 D |
457 | { |
458 | struct temp_data *tdata; | |
459 | ||
460 | tdata = kzalloc(sizeof(struct temp_data), GFP_KERNEL); | |
461 | if (!tdata) | |
462 | return NULL; | |
463 | ||
464 | tdata->status_reg = pkg_flag ? MSR_IA32_PACKAGE_THERM_STATUS : | |
465 | MSR_IA32_THERM_STATUS; | |
466 | tdata->is_pkg_data = pkg_flag; | |
467 | tdata->cpu = cpu; | |
468 | tdata->cpu_core_id = TO_CORE_ID(cpu); | |
c814a4c7 | 469 | tdata->attr_size = MAX_CORE_ATTRS; |
199e0de7 D |
470 | mutex_init(&tdata->update_lock); |
471 | return tdata; | |
472 | } | |
67f363b1 | 473 | |
d23e2ae1 PG |
474 | static int create_core_data(struct platform_device *pdev, unsigned int cpu, |
475 | int pkg_flag) | |
199e0de7 D |
476 | { |
477 | struct temp_data *tdata; | |
2f1c3db0 | 478 | struct platform_data *pdata = platform_get_drvdata(pdev); |
199e0de7 D |
479 | struct cpuinfo_x86 *c = &cpu_data(cpu); |
480 | u32 eax, edx; | |
481 | int err, attr_no; | |
bebe4678 | 482 | |
a321cedb | 483 | /* |
199e0de7 D |
484 | * Find attr number for sysfs: |
485 | * We map the attr number to core id of the CPU | |
486 | * The attr number is always core id + 2 | |
487 | * The Pkgtemp will always show up as temp1_*, if available | |
a321cedb | 488 | */ |
723f5734 | 489 | attr_no = pkg_flag ? PKG_SYSFS_ATTR_NO : TO_ATTR_NO(cpu); |
6369a288 | 490 | |
199e0de7 D |
491 | if (attr_no > MAX_CORE_DATA - 1) |
492 | return -ERANGE; | |
493 | ||
f4e0bcf0 GR |
494 | /* |
495 | * Provide a single set of attributes for all HT siblings of a core | |
496 | * to avoid duplicate sensors (the processor ID and core ID of all | |
6777b9e4 GR |
497 | * HT siblings of a core are the same). |
498 | * Skip if a HT sibling of this core is already registered. | |
f4e0bcf0 GR |
499 | * This is not an error. |
500 | */ | |
199e0de7 D |
501 | if (pdata->core_data[attr_no] != NULL) |
502 | return 0; | |
6369a288 | 503 | |
199e0de7 D |
504 | tdata = init_temp_data(cpu, pkg_flag); |
505 | if (!tdata) | |
506 | return -ENOMEM; | |
bebe4678 | 507 | |
199e0de7 D |
508 | /* Test if we can access the status register */ |
509 | err = rdmsr_safe_on_cpu(cpu, tdata->status_reg, &eax, &edx); | |
510 | if (err) | |
511 | goto exit_free; | |
512 | ||
513 | /* We can access status register. Get Critical Temperature */ | |
6bf9e9b0 | 514 | tdata->tjmax = get_tjmax(c, cpu, &pdev->dev); |
199e0de7 | 515 | |
c814a4c7 | 516 | /* |
f4af6fd6 GR |
517 | * Read the still undocumented bits 8:15 of IA32_TEMPERATURE_TARGET. |
518 | * The target temperature is available on older CPUs but not in this | |
519 | * register. Atoms don't have the register at all. | |
c814a4c7 | 520 | */ |
f4af6fd6 GR |
521 | if (c->x86_model > 0xe && c->x86_model != 0x1c) { |
522 | err = rdmsr_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET, | |
523 | &eax, &edx); | |
524 | if (!err) { | |
525 | tdata->ttarget | |
526 | = tdata->tjmax - ((eax >> 8) & 0xff) * 1000; | |
527 | tdata->attr_size++; | |
528 | } | |
c814a4c7 D |
529 | } |
530 | ||
199e0de7 D |
531 | pdata->core_data[attr_no] = tdata; |
532 | ||
533 | /* Create sysfs interfaces */ | |
d72d19c2 | 534 | err = create_core_attrs(tdata, pdata->hwmon_dev, attr_no); |
199e0de7 D |
535 | if (err) |
536 | goto exit_free; | |
bebe4678 RM |
537 | |
538 | return 0; | |
199e0de7 | 539 | exit_free: |
20ecb499 | 540 | pdata->core_data[attr_no] = NULL; |
199e0de7 D |
541 | kfree(tdata); |
542 | return err; | |
543 | } | |
544 | ||
d23e2ae1 | 545 | static void coretemp_add_core(unsigned int cpu, int pkg_flag) |
199e0de7 | 546 | { |
199e0de7 D |
547 | struct platform_device *pdev = coretemp_get_pdev(cpu); |
548 | int err; | |
549 | ||
550 | if (!pdev) | |
551 | return; | |
552 | ||
2f1c3db0 | 553 | err = create_core_data(pdev, cpu, pkg_flag); |
199e0de7 D |
554 | if (err) |
555 | dev_err(&pdev->dev, "Adding Core %u failed\n", cpu); | |
556 | } | |
557 | ||
558 | static void coretemp_remove_core(struct platform_data *pdata, | |
d72d19c2 | 559 | int indx) |
199e0de7 | 560 | { |
199e0de7 D |
561 | struct temp_data *tdata = pdata->core_data[indx]; |
562 | ||
563 | /* Remove the sysfs attributes */ | |
d72d19c2 | 564 | sysfs_remove_group(&pdata->hwmon_dev->kobj, &tdata->attr_group); |
199e0de7 D |
565 | |
566 | kfree(pdata->core_data[indx]); | |
567 | pdata->core_data[indx] = NULL; | |
568 | } | |
569 | ||
6c931ae1 | 570 | static int coretemp_probe(struct platform_device *pdev) |
199e0de7 | 571 | { |
c503a811 | 572 | struct device *dev = &pdev->dev; |
199e0de7 | 573 | struct platform_data *pdata; |
bebe4678 | 574 | |
199e0de7 | 575 | /* Initialize the per-package data structures */ |
c503a811 | 576 | pdata = devm_kzalloc(dev, sizeof(struct platform_data), GFP_KERNEL); |
199e0de7 D |
577 | if (!pdata) |
578 | return -ENOMEM; | |
579 | ||
b3a242a6 | 580 | pdata->phys_proc_id = pdev->id; |
199e0de7 D |
581 | platform_set_drvdata(pdev, pdata); |
582 | ||
d72d19c2 GR |
583 | pdata->hwmon_dev = devm_hwmon_device_register_with_groups(dev, DRVNAME, |
584 | pdata, NULL); | |
585 | return PTR_ERR_OR_ZERO(pdata->hwmon_dev); | |
bebe4678 RM |
586 | } |
587 | ||
281dfd0b | 588 | static int coretemp_remove(struct platform_device *pdev) |
bebe4678 | 589 | { |
199e0de7 D |
590 | struct platform_data *pdata = platform_get_drvdata(pdev); |
591 | int i; | |
bebe4678 | 592 | |
199e0de7 D |
593 | for (i = MAX_CORE_DATA - 1; i >= 0; --i) |
594 | if (pdata->core_data[i]) | |
d72d19c2 | 595 | coretemp_remove_core(pdata, i); |
199e0de7 | 596 | |
bebe4678 RM |
597 | return 0; |
598 | } | |
599 | ||
600 | static struct platform_driver coretemp_driver = { | |
601 | .driver = { | |
bebe4678 RM |
602 | .name = DRVNAME, |
603 | }, | |
604 | .probe = coretemp_probe, | |
9e5e9b7a | 605 | .remove = coretemp_remove, |
bebe4678 RM |
606 | }; |
607 | ||
d23e2ae1 | 608 | static int coretemp_device_add(unsigned int cpu) |
bebe4678 RM |
609 | { |
610 | int err; | |
611 | struct platform_device *pdev; | |
612 | struct pdev_entry *pdev_entry; | |
d883b9f0 JD |
613 | |
614 | mutex_lock(&pdev_list_mutex); | |
615 | ||
b3a242a6 | 616 | pdev = platform_device_alloc(DRVNAME, TO_PHYS_ID(cpu)); |
bebe4678 RM |
617 | if (!pdev) { |
618 | err = -ENOMEM; | |
f8bb8925 | 619 | pr_err("Device allocation failed\n"); |
bebe4678 RM |
620 | goto exit; |
621 | } | |
622 | ||
623 | pdev_entry = kzalloc(sizeof(struct pdev_entry), GFP_KERNEL); | |
624 | if (!pdev_entry) { | |
625 | err = -ENOMEM; | |
626 | goto exit_device_put; | |
627 | } | |
628 | ||
629 | err = platform_device_add(pdev); | |
630 | if (err) { | |
f8bb8925 | 631 | pr_err("Device addition failed (%d)\n", err); |
bebe4678 RM |
632 | goto exit_device_free; |
633 | } | |
634 | ||
635 | pdev_entry->pdev = pdev; | |
0eb9782a | 636 | pdev_entry->phys_proc_id = pdev->id; |
199e0de7 | 637 | |
bebe4678 RM |
638 | list_add_tail(&pdev_entry->list, &pdev_list); |
639 | mutex_unlock(&pdev_list_mutex); | |
640 | ||
641 | return 0; | |
642 | ||
643 | exit_device_free: | |
644 | kfree(pdev_entry); | |
645 | exit_device_put: | |
646 | platform_device_put(pdev); | |
647 | exit: | |
d883b9f0 | 648 | mutex_unlock(&pdev_list_mutex); |
bebe4678 RM |
649 | return err; |
650 | } | |
651 | ||
d23e2ae1 | 652 | static void coretemp_device_remove(unsigned int cpu) |
bebe4678 | 653 | { |
199e0de7 D |
654 | struct pdev_entry *p, *n; |
655 | u16 phys_proc_id = TO_PHYS_ID(cpu); | |
e40cc4bd | 656 | |
bebe4678 | 657 | mutex_lock(&pdev_list_mutex); |
199e0de7 D |
658 | list_for_each_entry_safe(p, n, &pdev_list, list) { |
659 | if (p->phys_proc_id != phys_proc_id) | |
e40cc4bd | 660 | continue; |
e40cc4bd JB |
661 | platform_device_unregister(p->pdev); |
662 | list_del(&p->list); | |
e40cc4bd | 663 | kfree(p); |
bebe4678 RM |
664 | } |
665 | mutex_unlock(&pdev_list_mutex); | |
666 | } | |
667 | ||
723f5734 | 668 | static int get_online_core_in_package(struct platform_data *pdata) |
199e0de7 D |
669 | { |
670 | int i; | |
671 | ||
672 | /* Find online cores, except pkgtemp data */ | |
673 | for (i = MAX_CORE_DATA - 1; i >= 0; --i) { | |
674 | if (pdata->core_data[i] && | |
675 | !pdata->core_data[i]->is_pkg_data) { | |
723f5734 | 676 | return pdata->core_data[i]->cpu; |
199e0de7 D |
677 | } |
678 | } | |
723f5734 | 679 | return nr_cpu_ids; |
199e0de7 D |
680 | } |
681 | ||
d23e2ae1 | 682 | static void get_core_online(unsigned int cpu) |
199e0de7 D |
683 | { |
684 | struct cpuinfo_x86 *c = &cpu_data(cpu); | |
685 | struct platform_device *pdev = coretemp_get_pdev(cpu); | |
686 | int err; | |
687 | ||
688 | /* | |
689 | * CPUID.06H.EAX[0] indicates whether the CPU has thermal | |
690 | * sensors. We check this bit only, all the early CPUs | |
691 | * without thermal sensors will be filtered out. | |
692 | */ | |
4ad33411 | 693 | if (!cpu_has(c, X86_FEATURE_DTHERM)) |
199e0de7 D |
694 | return; |
695 | ||
696 | if (!pdev) { | |
0eb9782a JD |
697 | /* Check the microcode version of the CPU */ |
698 | if (chk_ucode_version(cpu)) | |
699 | return; | |
700 | ||
199e0de7 D |
701 | /* |
702 | * Alright, we have DTS support. | |
703 | * We are bringing the _first_ core in this pkg | |
704 | * online. So, initialize per-pkg data structures and | |
705 | * then bring this core online. | |
706 | */ | |
707 | err = coretemp_device_add(cpu); | |
708 | if (err) | |
709 | return; | |
710 | /* | |
711 | * Check whether pkgtemp support is available. | |
712 | * If so, add interfaces for pkgtemp. | |
713 | */ | |
714 | if (cpu_has(c, X86_FEATURE_PTS)) | |
715 | coretemp_add_core(cpu, 1); | |
716 | } | |
717 | /* | |
718 | * Physical CPU device already exists. | |
719 | * So, just add interfaces for this core. | |
720 | */ | |
721 | coretemp_add_core(cpu, 0); | |
722 | } | |
723 | ||
d23e2ae1 | 724 | static void put_core_offline(unsigned int cpu) |
199e0de7 | 725 | { |
199e0de7 | 726 | struct platform_device *pdev = coretemp_get_pdev(cpu); |
723f5734 TG |
727 | struct platform_data *pdata; |
728 | struct temp_data *tdata; | |
729 | int i, indx, target; | |
199e0de7 D |
730 | |
731 | /* If the physical CPU device does not exist, just return */ | |
732 | if (!pdev) | |
733 | return; | |
734 | ||
735 | pdata = platform_get_drvdata(pdev); | |
736 | ||
737 | indx = TO_ATTR_NO(cpu); | |
738 | ||
b7048711 KS |
739 | /* The core id is too big, just return */ |
740 | if (indx > MAX_CORE_DATA - 1) | |
741 | return; | |
742 | ||
199e0de7 | 743 | if (pdata->core_data[indx] && pdata->core_data[indx]->cpu == cpu) |
d72d19c2 | 744 | coretemp_remove_core(pdata, indx); |
199e0de7 | 745 | |
f4e0bcf0 | 746 | /* |
6777b9e4 GR |
747 | * If a HT sibling of a core is taken offline, but another HT sibling |
748 | * of the same core is still online, register the alternate sibling. | |
749 | * This ensures that exactly one set of attributes is provided as long | |
750 | * as at least one HT sibling of a core is online. | |
f4e0bcf0 | 751 | */ |
bb74e8ca | 752 | for_each_sibling(i, cpu) { |
199e0de7 D |
753 | if (i != cpu) { |
754 | get_core_online(i); | |
f4e0bcf0 GR |
755 | /* |
756 | * Display temperature sensor data for one HT sibling | |
757 | * per core only, so abort the loop after one such | |
758 | * sibling has been found. | |
759 | */ | |
199e0de7 D |
760 | break; |
761 | } | |
762 | } | |
763 | /* | |
764 | * If all cores in this pkg are offline, remove the device. | |
765 | * coretemp_device_remove calls unregister_platform_device, | |
766 | * which in turn calls coretemp_remove. This removes the | |
767 | * pkgtemp entry and does other clean ups. | |
768 | */ | |
723f5734 TG |
769 | target = get_online_core_in_package(pdata); |
770 | if (target >= nr_cpu_ids) { | |
199e0de7 | 771 | coretemp_device_remove(cpu); |
723f5734 TG |
772 | return; |
773 | } | |
774 | /* | |
775 | * Check whether this core is the target for the package | |
776 | * interface. We need to assign it to some other cpu. | |
777 | */ | |
778 | tdata = pdata->core_data[PKG_SYSFS_ATTR_NO]; | |
779 | if (tdata && tdata->cpu == cpu) { | |
780 | mutex_lock(&tdata->update_lock); | |
781 | tdata->cpu = target; | |
782 | mutex_unlock(&tdata->update_lock); | |
783 | } | |
199e0de7 D |
784 | } |
785 | ||
d23e2ae1 | 786 | static int coretemp_cpu_callback(struct notifier_block *nfb, |
bebe4678 RM |
787 | unsigned long action, void *hcpu) |
788 | { | |
789 | unsigned int cpu = (unsigned long) hcpu; | |
790 | ||
791 | switch (action) { | |
792 | case CPU_ONLINE: | |
561d9a96 | 793 | case CPU_DOWN_FAILED: |
199e0de7 | 794 | get_core_online(cpu); |
bebe4678 | 795 | break; |
561d9a96 | 796 | case CPU_DOWN_PREPARE: |
199e0de7 | 797 | put_core_offline(cpu); |
bebe4678 RM |
798 | break; |
799 | } | |
800 | return NOTIFY_OK; | |
801 | } | |
802 | ||
ba7c1927 | 803 | static struct notifier_block coretemp_cpu_notifier __refdata = { |
bebe4678 RM |
804 | .notifier_call = coretemp_cpu_callback, |
805 | }; | |
bebe4678 | 806 | |
e273bd98 | 807 | static const struct x86_cpu_id __initconst coretemp_ids[] = { |
4ad33411 | 808 | { X86_VENDOR_INTEL, X86_FAMILY_ANY, X86_MODEL_ANY, X86_FEATURE_DTHERM }, |
9b38096f AK |
809 | {} |
810 | }; | |
811 | MODULE_DEVICE_TABLE(x86cpu, coretemp_ids); | |
812 | ||
bebe4678 RM |
813 | static int __init coretemp_init(void) |
814 | { | |
1268a172 | 815 | int i, err; |
bebe4678 | 816 | |
9b38096f AK |
817 | /* |
818 | * CPUID.06H.EAX[0] indicates whether the CPU has thermal | |
819 | * sensors. We check this bit only, all the early CPUs | |
820 | * without thermal sensors will be filtered out. | |
821 | */ | |
822 | if (!x86_match_cpu(coretemp_ids)) | |
823 | return -ENODEV; | |
bebe4678 RM |
824 | |
825 | err = platform_driver_register(&coretemp_driver); | |
826 | if (err) | |
827 | goto exit; | |
828 | ||
3289705f | 829 | cpu_notifier_register_begin(); |
a4659053 | 830 | for_each_online_cpu(i) |
199e0de7 | 831 | get_core_online(i); |
89a3fd35 JB |
832 | |
833 | #ifndef CONFIG_HOTPLUG_CPU | |
bebe4678 | 834 | if (list_empty(&pdev_list)) { |
3289705f | 835 | cpu_notifier_register_done(); |
bebe4678 RM |
836 | err = -ENODEV; |
837 | goto exit_driver_unreg; | |
838 | } | |
89a3fd35 | 839 | #endif |
bebe4678 | 840 | |
3289705f SB |
841 | __register_hotcpu_notifier(&coretemp_cpu_notifier); |
842 | cpu_notifier_register_done(); | |
bebe4678 RM |
843 | return 0; |
844 | ||
0dca94ba | 845 | #ifndef CONFIG_HOTPLUG_CPU |
89a3fd35 | 846 | exit_driver_unreg: |
bebe4678 | 847 | platform_driver_unregister(&coretemp_driver); |
0dca94ba | 848 | #endif |
bebe4678 RM |
849 | exit: |
850 | return err; | |
851 | } | |
852 | ||
853 | static void __exit coretemp_exit(void) | |
854 | { | |
855 | struct pdev_entry *p, *n; | |
17c10d61 | 856 | |
3289705f SB |
857 | cpu_notifier_register_begin(); |
858 | __unregister_hotcpu_notifier(&coretemp_cpu_notifier); | |
bebe4678 RM |
859 | mutex_lock(&pdev_list_mutex); |
860 | list_for_each_entry_safe(p, n, &pdev_list, list) { | |
861 | platform_device_unregister(p->pdev); | |
862 | list_del(&p->list); | |
863 | kfree(p); | |
864 | } | |
865 | mutex_unlock(&pdev_list_mutex); | |
3289705f | 866 | cpu_notifier_register_done(); |
bebe4678 RM |
867 | platform_driver_unregister(&coretemp_driver); |
868 | } | |
869 | ||
870 | MODULE_AUTHOR("Rudolf Marek <r.marek@assembler.cz>"); | |
871 | MODULE_DESCRIPTION("Intel Core temperature monitor"); | |
872 | MODULE_LICENSE("GPL"); | |
873 | ||
874 | module_init(coretemp_init) | |
875 | module_exit(coretemp_exit) |