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hwmon: (dme1737) Skip detection if forced
[mirror_ubuntu-artful-kernel.git] / drivers / hwmon / dme1737.c
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9431996f 1/*
e95c237d
JH		 2 * dme1737.c - Driver for the SMSC DME1737, Asus A8000, and SMSC SCH311x
3 * Super-I/O chips integrated hardware monitoring features.
9431996f
JH		 4 * Copyright (c) 2007 Juerg Haefliger <juergh@gmail.com>
5 *
e95c237d
JH		 6 * This driver is an I2C/ISA hybrid, meaning that it uses the I2C bus to access
7 * the chip registers if a DME1737 (or A8000) is found and the ISA bus if a
8 * SCH311x chip is found. Both types of chips have very similar hardware
9 * monitoring capabilities but differ in the way they can be accessed.
9431996f
JH		 10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 */
25
26#include <linux/module.h>
27#include <linux/init.h>
28#include <linux/slab.h>
29#include <linux/jiffies.h>
30#include <linux/i2c.h>
e95c237d 31#include <linux/platform_device.h>
9431996f
JH		 32#include <linux/hwmon.h>
33#include <linux/hwmon-sysfs.h>
34#include <linux/hwmon-vid.h>
35#include <linux/err.h>
36#include <linux/mutex.h>
37#include <asm/io.h>
38
e95c237d
JH		 39/* ISA device, if found */
40static struct platform_device *pdev;
41
9431996f
JH		 42/* Module load parameters */
43static int force_start;
44module_param(force_start, bool, 0);
45MODULE_PARM_DESC(force_start, "Force the chip to start monitoring inputs");
46
67b671bc
JD		 47static unsigned short force_id;
48module_param(force_id, ushort, 0);
49MODULE_PARM_DESC(force_id, "Override the detected device ID");
50
92430b6f
JH		 51static int probe_all_addr;
52module_param(probe_all_addr, bool, 0);
53MODULE_PARM_DESC(probe_all_addr, "Include probing of non-standard LPC "
54 "addresses");
55
9431996f 56/* Addresses to scan */
25e9c86d 57static const unsigned short normal_i2c[] = {0x2c, 0x2d, 0x2e, I2C_CLIENT_END};
9431996f
JH		 58
59/* Insmod parameters */
60I2C_CLIENT_INSMOD_1(dme1737);
61
62/* ---------------------------------------------------------------------
63 * Registers
64 *
65 * The sensors are defined as follows:
66 *
67 * Voltages Temperatures
68 * -------- ------------
69 * in0 +5VTR (+5V stdby) temp1 Remote diode 1
70 * in1 Vccp (proc core) temp2 Internal temp
71 * in2 VCC (internal +3.3V) temp3 Remote diode 2
72 * in3 +5V
73 * in4 +12V
74 * in5 VTR (+3.3V stby)
75 * in6 Vbat
76 *
77 * --------------------------------------------------------------------- */
78
79/* Voltages (in) numbered 0-6 (ix) */
80#define DME1737_REG_IN(ix) ((ix) < 5 ? 0x20 + (ix) \
81 : 0x94 + (ix))
82#define DME1737_REG_IN_MIN(ix) ((ix) < 5 ? 0x44 + (ix) * 2 \
83 : 0x91 + (ix) * 2)
84#define DME1737_REG_IN_MAX(ix) ((ix) < 5 ? 0x45 + (ix) * 2 \
85 : 0x92 + (ix) * 2)
86
87/* Temperatures (temp) numbered 0-2 (ix) */
88#define DME1737_REG_TEMP(ix) (0x25 + (ix))
89#define DME1737_REG_TEMP_MIN(ix) (0x4e + (ix) * 2)
90#define DME1737_REG_TEMP_MAX(ix) (0x4f + (ix) * 2)
91#define DME1737_REG_TEMP_OFFSET(ix) ((ix) == 0 ? 0x1f \
92 : 0x1c + (ix))
93
94/* Voltage and temperature LSBs
95 * The LSBs (4 bits each) are stored in 5 registers with the following layouts:
96 * IN_TEMP_LSB(0) = [in5, in6]
97 * IN_TEMP_LSB(1) = [temp3, temp1]
98 * IN_TEMP_LSB(2) = [in4, temp2]
99 * IN_TEMP_LSB(3) = [in3, in0]
100 * IN_TEMP_LSB(4) = [in2, in1] */
101#define DME1737_REG_IN_TEMP_LSB(ix) (0x84 + (ix))
102static const u8 DME1737_REG_IN_LSB[] = {3, 4, 4, 3, 2, 0, 0};
103static const u8 DME1737_REG_IN_LSB_SHL[] = {4, 4, 0, 0, 0, 0, 4};
104static const u8 DME1737_REG_TEMP_LSB[] = {1, 2, 1};
105static const u8 DME1737_REG_TEMP_LSB_SHL[] = {4, 4, 0};
106
107/* Fans numbered 0-5 (ix) */
108#define DME1737_REG_FAN(ix) ((ix) < 4 ? 0x28 + (ix) * 2 \
109 : 0xa1 + (ix) * 2)
110#define DME1737_REG_FAN_MIN(ix) ((ix) < 4 ? 0x54 + (ix) * 2 \
111 : 0xa5 + (ix) * 2)
112#define DME1737_REG_FAN_OPT(ix) ((ix) < 4 ? 0x90 + (ix) \
113 : 0xb2 + (ix))
114#define DME1737_REG_FAN_MAX(ix) (0xb4 + (ix)) /* only for fan[4-5] */
115
116/* PWMs numbered 0-2, 4-5 (ix) */
117#define DME1737_REG_PWM(ix) ((ix) < 3 ? 0x30 + (ix) \
118 : 0xa1 + (ix))
119#define DME1737_REG_PWM_CONFIG(ix) (0x5c + (ix)) /* only for pwm[0-2] */
120#define DME1737_REG_PWM_MIN(ix) (0x64 + (ix)) /* only for pwm[0-2] */
121#define DME1737_REG_PWM_FREQ(ix) ((ix) < 3 ? 0x5f + (ix) \
122 : 0xa3 + (ix))
123/* The layout of the ramp rate registers is different from the other pwm
124 * registers. The bits for the 3 PWMs are stored in 2 registers:
125 * PWM_RR(0) = [OFF3, OFF2, OFF1, RES, RR1E, RR1-2, RR1-1, RR1-0]
126 * PWM_RR(1) = [RR2E, RR2-2, RR2-1, RR2-0, RR3E, RR3-2, RR3-1, RR3-0] */
127#define DME1737_REG_PWM_RR(ix) (0x62 + (ix)) /* only for pwm[0-2] */
128
129/* Thermal zones 0-2 */
130#define DME1737_REG_ZONE_LOW(ix) (0x67 + (ix))
131#define DME1737_REG_ZONE_ABS(ix) (0x6a + (ix))
132/* The layout of the hysteresis registers is different from the other zone
133 * registers. The bits for the 3 zones are stored in 2 registers:
134 * ZONE_HYST(0) = [H1-3, H1-2, H1-1, H1-0, H2-3, H2-2, H2-1, H2-0]
135 * ZONE_HYST(1) = [H3-3, H3-2, H3-1, H3-0, RES, RES, RES, RES] */
136#define DME1737_REG_ZONE_HYST(ix) (0x6d + (ix))
137
138/* Alarm registers and bit mapping
139 * The 3 8-bit alarm registers will be concatenated to a single 32-bit
140 * alarm value [0, ALARM3, ALARM2, ALARM1]. */
141#define DME1737_REG_ALARM1 0x41
142#define DME1737_REG_ALARM2 0x42
143#define DME1737_REG_ALARM3 0x83
144static const u8 DME1737_BIT_ALARM_IN[] = {0, 1, 2, 3, 8, 16, 17};
145static const u8 DME1737_BIT_ALARM_TEMP[] = {4, 5, 6};
146static const u8 DME1737_BIT_ALARM_FAN[] = {10, 11, 12, 13, 22, 23};
147
148/* Miscellaneous registers */
e95c237d 149#define DME1737_REG_DEVICE 0x3d
9431996f
JH		 150#define DME1737_REG_COMPANY 0x3e
151#define DME1737_REG_VERSTEP 0x3f
152#define DME1737_REG_CONFIG 0x40
153#define DME1737_REG_CONFIG2 0x7f
154#define DME1737_REG_VID 0x43
155#define DME1737_REG_TACH_PWM 0x81
156
157/* ---------------------------------------------------------------------
158 * Misc defines
159 * --------------------------------------------------------------------- */
160
161/* Chip identification */
162#define DME1737_COMPANY_SMSC 0x5c
163#define DME1737_VERSTEP 0x88
164#define DME1737_VERSTEP_MASK 0xf8
e95c237d
JH		 165#define SCH311X_DEVICE 0x8c
166
167/* Length of ISA address segment */
168#define DME1737_EXTENT 2
9431996f
JH		 169
170/* ---------------------------------------------------------------------
171 * Data structures and manipulation thereof
172 * --------------------------------------------------------------------- */
173
e95c237d
JH		 174/* For ISA chips, we abuse the i2c_client addr and name fields. We also use
175 the driver field to differentiate between I2C and ISA chips. */
9431996f
JH		 176struct dme1737_data {
177 struct i2c_client client;
1beeffe4 178 struct device *hwmon_dev;
9431996f
JH		 179
180 struct mutex update_lock;
181 int valid; /* !=0 if following fields are valid */
182 unsigned long last_update; /* in jiffies */
183 unsigned long last_vbat; /* in jiffies */
f994fb23 184 enum chips type;
9431996f
JH		 185
186 u8 vid;
187 u8 pwm_rr_en;
188 u8 has_pwm;
189 u8 has_fan;
190
191 /* Register values */
192 u16 in[7];
193 u8 in_min[7];
194 u8 in_max[7];
195 s16 temp[3];
196 s8 temp_min[3];
197 s8 temp_max[3];
198 s8 temp_offset[3];
199 u8 config;
200 u8 config2;
201 u8 vrm;
202 u16 fan[6];
203 u16 fan_min[6];
204 u8 fan_max[2];
205 u8 fan_opt[6];
206 u8 pwm[6];
207 u8 pwm_min[3];
208 u8 pwm_config[3];
209 u8 pwm_acz[3];
210 u8 pwm_freq[6];
211 u8 pwm_rr[2];
212 u8 zone_low[3];
213 u8 zone_abs[3];
214 u8 zone_hyst[2];
215 u32 alarms;
216};
217
218/* Nominal voltage values */
f994fb23
JH		 219static const int IN_NOMINAL_DME1737[] = {5000, 2250, 3300, 5000, 12000, 3300,
220 3300};
221static const int IN_NOMINAL_SCH311x[] = {2500, 1500, 3300, 5000, 12000, 3300,
222 3300};
223#define IN_NOMINAL(ix, type) (((type) == dme1737) ? \
224 IN_NOMINAL_DME1737[(ix)] : \
225 IN_NOMINAL_SCH311x[(ix)])
9431996f
JH		 226
227/* Voltage input
228 * Voltage inputs have 16 bits resolution, limit values have 8 bits
229 * resolution. */
f994fb23 230static inline int IN_FROM_REG(int reg, int ix, int res, int type)
9431996f 231{
f994fb23
JH		 232 return (reg * IN_NOMINAL(ix, type) + (3 << (res - 3))) /
233 (3 << (res - 2));
9431996f
JH		 234}
235
f994fb23 236static inline int IN_TO_REG(int val, int ix, int type)
9431996f 237{
f994fb23
JH		 238 return SENSORS_LIMIT((val * 192 + IN_NOMINAL(ix, type) / 2) /
239 IN_NOMINAL(ix, type), 0, 255);
9431996f
JH		 240}
241
242/* Temperature input
243 * The register values represent temperatures in 2's complement notation from
244 * -127 degrees C to +127 degrees C. Temp inputs have 16 bits resolution, limit
245 * values have 8 bits resolution. */
246static inline int TEMP_FROM_REG(int reg, int res)
247{
248 return (reg * 1000) >> (res - 8);
249}
250
251static inline int TEMP_TO_REG(int val)
252{
253 return SENSORS_LIMIT((val < 0 ? val - 500 : val + 500) / 1000,
254 -128, 127);
255}
256
257/* Temperature range */
258static const int TEMP_RANGE[] = {2000, 2500, 3333, 4000, 5000, 6666, 8000,
259 10000, 13333, 16000, 20000, 26666, 32000,
260 40000, 53333, 80000};
261
262static inline int TEMP_RANGE_FROM_REG(int reg)
263{
264 return TEMP_RANGE[(reg >> 4) & 0x0f];
265}
266
267static int TEMP_RANGE_TO_REG(int val, int reg)
268{
269 int i;
270
271 for (i = 15; i > 0; i--) {
272 if (val > (TEMP_RANGE[i] + TEMP_RANGE[i - 1] + 1) / 2) {
273 break;
274 }
275 }
276
277 return (reg & 0x0f) | (i << 4);
278}
279
280/* Temperature hysteresis
281 * Register layout:
282 * reg[0] = [H1-3, H1-2, H1-1, H1-0, H2-3, H2-2, H2-1, H2-0]
283 * reg[1] = [H3-3, H3-2, H3-1, H3-0, xxxx, xxxx, xxxx, xxxx] */
284static inline int TEMP_HYST_FROM_REG(int reg, int ix)
285{
286 return (((ix == 1) ? reg : reg >> 4) & 0x0f) * 1000;
287}
288
289static inline int TEMP_HYST_TO_REG(int val, int ix, int reg)
290{
291 int hyst = SENSORS_LIMIT((val + 500) / 1000, 0, 15);
292
293 return (ix == 1) ? (reg & 0xf0) | hyst : (reg & 0x0f) | (hyst << 4);
294}
295
296/* Fan input RPM */
297static inline int FAN_FROM_REG(int reg, int tpc)
298{
ff8421f7
JH		 299 if (tpc) {
300 return tpc * reg;
301 } else {
302 return (reg == 0 || reg == 0xffff) ? 0 : 90000 * 60 / reg;
303 }
9431996f
JH		 304}
305
306static inline int FAN_TO_REG(int val, int tpc)
307{
ff8421f7
JH		 308 if (tpc) {
309 return SENSORS_LIMIT(val / tpc, 0, 0xffff);
310 } else {
311 return (val <= 0) ? 0xffff :
312 SENSORS_LIMIT(90000 * 60 / val, 0, 0xfffe);
313 }
9431996f
JH		 314}
315
316/* Fan TPC (tach pulse count)
317 * Converts a register value to a TPC multiplier or returns 0 if the tachometer
318 * is configured in legacy (non-tpc) mode */
319static inline int FAN_TPC_FROM_REG(int reg)
320{
321 return (reg & 0x20) ? 0 : 60 >> (reg & 0x03);
322}
323
324/* Fan type
325 * The type of a fan is expressed in number of pulses-per-revolution that it
326 * emits */
327static inline int FAN_TYPE_FROM_REG(int reg)
328{
329 int edge = (reg >> 1) & 0x03;
330
331 return (edge > 0) ? 1 << (edge - 1) : 0;
332}
333
334static inline int FAN_TYPE_TO_REG(int val, int reg)
335{
336 int edge = (val == 4) ? 3 : val;
337
338 return (reg & 0xf9) | (edge << 1);
339}
340
341/* Fan max RPM */
342static const int FAN_MAX[] = {0x54, 0x38, 0x2a, 0x21, 0x1c, 0x18, 0x15, 0x12,
343 0x11, 0x0f, 0x0e};
344
345static int FAN_MAX_FROM_REG(int reg)
346{
347 int i;
348
349 for (i = 10; i > 0; i--) {
350 if (reg == FAN_MAX[i]) {
351 break;
352 }
353 }
354
355 return 1000 + i * 500;
356}
357
358static int FAN_MAX_TO_REG(int val)
359{
360 int i;
361
362 for (i = 10; i > 0; i--) {
363 if (val > (1000 + (i - 1) * 500)) {
364 break;
365 }
366 }
367
368 return FAN_MAX[i];
369}
370
371/* PWM enable
372 * Register to enable mapping:
373 * 000: 2 fan on zone 1 auto
374 * 001: 2 fan on zone 2 auto
375 * 010: 2 fan on zone 3 auto
376 * 011: 0 fan full on
377 * 100: -1 fan disabled
378 * 101: 2 fan on hottest of zones 2,3 auto
379 * 110: 2 fan on hottest of zones 1,2,3 auto
380 * 111: 1 fan in manual mode */
381static inline int PWM_EN_FROM_REG(int reg)
382{
383 static const int en[] = {2, 2, 2, 0, -1, 2, 2, 1};
384
385 return en[(reg >> 5) & 0x07];
386}
387
388static inline int PWM_EN_TO_REG(int val, int reg)
389{
390 int en = (val == 1) ? 7 : 3;
391
392 return (reg & 0x1f) | ((en & 0x07) << 5);
393}
394
395/* PWM auto channels zone
396 * Register to auto channels zone mapping (ACZ is a bitfield with bit x
397 * corresponding to zone x+1):
398 * 000: 001 fan on zone 1 auto
399 * 001: 010 fan on zone 2 auto
400 * 010: 100 fan on zone 3 auto
401 * 011: 000 fan full on
402 * 100: 000 fan disabled
403 * 101: 110 fan on hottest of zones 2,3 auto
404 * 110: 111 fan on hottest of zones 1,2,3 auto
405 * 111: 000 fan in manual mode */
406static inline int PWM_ACZ_FROM_REG(int reg)
407{
408 static const int acz[] = {1, 2, 4, 0, 0, 6, 7, 0};
409
410 return acz[(reg >> 5) & 0x07];
411}
412
413static inline int PWM_ACZ_TO_REG(int val, int reg)
414{
415 int acz = (val == 4) ? 2 : val - 1;
416
417 return (reg & 0x1f) | ((acz & 0x07) << 5);
418}
419
420/* PWM frequency */
421static const int PWM_FREQ[] = {11, 15, 22, 29, 35, 44, 59, 88,
422 15000, 20000, 30000, 25000, 0, 0, 0, 0};
423
424static inline int PWM_FREQ_FROM_REG(int reg)
425{
426 return PWM_FREQ[reg & 0x0f];
427}
428
429static int PWM_FREQ_TO_REG(int val, int reg)
430{
431 int i;
432
433 /* the first two cases are special - stupid chip design! */
434 if (val > 27500) {
435 i = 10;
436 } else if (val > 22500) {
437 i = 11;
438 } else {
439 for (i = 9; i > 0; i--) {
440 if (val > (PWM_FREQ[i] + PWM_FREQ[i - 1] + 1) / 2) {
441 break;
442 }
443 }
444 }
445
446 return (reg & 0xf0) | i;
447}
448
449/* PWM ramp rate
450 * Register layout:
451 * reg[0] = [OFF3, OFF2, OFF1, RES, RR1-E, RR1-2, RR1-1, RR1-0]
452 * reg[1] = [RR2-E, RR2-2, RR2-1, RR2-0, RR3-E, RR3-2, RR3-1, RR3-0] */
453static const u8 PWM_RR[] = {206, 104, 69, 41, 26, 18, 10, 5};
454
455static inline int PWM_RR_FROM_REG(int reg, int ix)
456{
457 int rr = (ix == 1) ? reg >> 4 : reg;
458
459 return (rr & 0x08) ? PWM_RR[rr & 0x07] : 0;
460}
461
462static int PWM_RR_TO_REG(int val, int ix, int reg)
463{
464 int i;
465
466 for (i = 0; i < 7; i++) {
467 if (val > (PWM_RR[i] + PWM_RR[i + 1] + 1) / 2) {
468 break;
469 }
470 }
471
472 return (ix == 1) ? (reg & 0x8f) | (i << 4) : (reg & 0xf8) | i;
473}
474
475/* PWM ramp rate enable */
476static inline int PWM_RR_EN_FROM_REG(int reg, int ix)
477{
478 return PWM_RR_FROM_REG(reg, ix) ? 1 : 0;
479}
480
481static inline int PWM_RR_EN_TO_REG(int val, int ix, int reg)
482{
483 int en = (ix == 1) ? 0x80 : 0x08;
484
485 return val ? reg | en : reg & ~en;
486}
487
488/* PWM min/off
489 * The PWM min/off bits are part of the PMW ramp rate register 0 (see above for
490 * the register layout). */
491static inline int PWM_OFF_FROM_REG(int reg, int ix)
492{
493 return (reg >> (ix + 5)) & 0x01;
494}
495
496static inline int PWM_OFF_TO_REG(int val, int ix, int reg)
497{
498 return (reg & ~(1 << (ix + 5))) | ((val & 0x01) << (ix + 5));
499}
500
501/* ---------------------------------------------------------------------
502 * Device I/O access
e95c237d
JH		 503 *
504 * ISA access is performed through an index/data register pair and needs to
505 * be protected by a mutex during runtime (not required for initialization).
506 * We use data->update_lock for this and need to ensure that we acquire it
507 * before calling dme1737_read or dme1737_write.
9431996f
JH		 508 * --------------------------------------------------------------------- */
509
510static u8 dme1737_read(struct i2c_client *client, u8 reg)
511{
e95c237d 512 s32 val;
9431996f 513
e95c237d
JH		 514 if (client->driver) { /* I2C device */
515 val = i2c_smbus_read_byte_data(client, reg);
516
517 if (val < 0) {
518 dev_warn(&client->dev, "Read from register "
519 "0x%02x failed! Please report to the driver "
520 "maintainer.\n", reg);
521 }
522 } else { /* ISA device */
523 outb(reg, client->addr);
524 val = inb(client->addr + 1);
9431996f
JH		 525 }
526
527 return val;
528}
529
e95c237d 530static s32 dme1737_write(struct i2c_client *client, u8 reg, u8 val)
9431996f 531{
e95c237d
JH		 532 s32 res = 0;
533
534 if (client->driver) { /* I2C device */
535 res = i2c_smbus_write_byte_data(client, reg, val);
9431996f 536
e95c237d
JH		 537 if (res < 0) {
538 dev_warn(&client->dev, "Write to register "
539 "0x%02x failed! Please report to the driver "
540 "maintainer.\n", reg);
541 }
542 } else { /* ISA device */
543 outb(reg, client->addr);
544 outb(val, client->addr + 1);
9431996f
JH		 545 }
546
547 return res;
548}
549
550static struct dme1737_data *dme1737_update_device(struct device *dev)
551{
b237eb25
JH		 552 struct dme1737_data *data = dev_get_drvdata(dev);
553 struct i2c_client *client = &data->client;
9431996f
JH		 554 int ix;
555 u8 lsb[5];
556
557 mutex_lock(&data->update_lock);
558
559 /* Enable a Vbat monitoring cycle every 10 mins */
560 if (time_after(jiffies, data->last_vbat + 600 * HZ) || !data->valid) {
561 dme1737_write(client, DME1737_REG_CONFIG, dme1737_read(client,
562 DME1737_REG_CONFIG) | 0x10);
563 data->last_vbat = jiffies;
564 }
565
566 /* Sample register contents every 1 sec */
567 if (time_after(jiffies, data->last_update + HZ) || !data->valid) {
568 data->vid = dme1737_read(client, DME1737_REG_VID) & 0x3f;
569
570 /* In (voltage) registers */
571 for (ix = 0; ix < ARRAY_SIZE(data->in); ix++) {
572 /* Voltage inputs are stored as 16 bit values even
573 * though they have only 12 bits resolution. This is
574 * to make it consistent with the temp inputs. */
575 data->in[ix] = dme1737_read(client,
576 DME1737_REG_IN(ix)) << 8;
577 data->in_min[ix] = dme1737_read(client,
578 DME1737_REG_IN_MIN(ix));
579 data->in_max[ix] = dme1737_read(client,
580 DME1737_REG_IN_MAX(ix));
581 }
582
583 /* Temp registers */
584 for (ix = 0; ix < ARRAY_SIZE(data->temp); ix++) {
585 /* Temp inputs are stored as 16 bit values even
586 * though they have only 12 bits resolution. This is
587 * to take advantage of implicit conversions between
588 * register values (2's complement) and temp values
589 * (signed decimal). */
590 data->temp[ix] = dme1737_read(client,
591 DME1737_REG_TEMP(ix)) << 8;
592 data->temp_min[ix] = dme1737_read(client,
593 DME1737_REG_TEMP_MIN(ix));
594 data->temp_max[ix] = dme1737_read(client,
595 DME1737_REG_TEMP_MAX(ix));
596 data->temp_offset[ix] = dme1737_read(client,
597 DME1737_REG_TEMP_OFFSET(ix));
598 }
599
600 /* In and temp LSB registers
601 * The LSBs are latched when the MSBs are read, so the order in
602 * which the registers are read (MSB first, then LSB) is
603 * important! */
604 for (ix = 0; ix < ARRAY_SIZE(lsb); ix++) {
605 lsb[ix] = dme1737_read(client,
606 DME1737_REG_IN_TEMP_LSB(ix));
607 }
608 for (ix = 0; ix < ARRAY_SIZE(data->in); ix++) {
609 data->in[ix] |= (lsb[DME1737_REG_IN_LSB[ix]] <<
610 DME1737_REG_IN_LSB_SHL[ix]) & 0xf0;
611 }
612 for (ix = 0; ix < ARRAY_SIZE(data->temp); ix++) {
613 data->temp[ix] |= (lsb[DME1737_REG_TEMP_LSB[ix]] <<
614 DME1737_REG_TEMP_LSB_SHL[ix]) & 0xf0;
615 }
616
617 /* Fan registers */
618 for (ix = 0; ix < ARRAY_SIZE(data->fan); ix++) {
619 /* Skip reading registers if optional fans are not
620 * present */
621 if (!(data->has_fan & (1 << ix))) {
622 continue;
623 }
624 data->fan[ix] = dme1737_read(client,
625 DME1737_REG_FAN(ix));
626 data->fan[ix] |= dme1737_read(client,
627 DME1737_REG_FAN(ix) + 1) << 8;
628 data->fan_min[ix] = dme1737_read(client,
629 DME1737_REG_FAN_MIN(ix));
630 data->fan_min[ix] |= dme1737_read(client,
631 DME1737_REG_FAN_MIN(ix) + 1) << 8;
632 data->fan_opt[ix] = dme1737_read(client,
633 DME1737_REG_FAN_OPT(ix));
634 /* fan_max exists only for fan[5-6] */
635 if (ix > 3) {
636 data->fan_max[ix - 4] = dme1737_read(client,
637 DME1737_REG_FAN_MAX(ix));
638 }
639 }
640
641 /* PWM registers */
642 for (ix = 0; ix < ARRAY_SIZE(data->pwm); ix++) {
643 /* Skip reading registers if optional PWMs are not
644 * present */
645 if (!(data->has_pwm & (1 << ix))) {
646 continue;
647 }
648 data->pwm[ix] = dme1737_read(client,
649 DME1737_REG_PWM(ix));
650 data->pwm_freq[ix] = dme1737_read(client,
651 DME1737_REG_PWM_FREQ(ix));
652 /* pwm_config and pwm_min exist only for pwm[1-3] */
653 if (ix < 3) {
654 data->pwm_config[ix] = dme1737_read(client,
655 DME1737_REG_PWM_CONFIG(ix));
656 data->pwm_min[ix] = dme1737_read(client,
657 DME1737_REG_PWM_MIN(ix));
658 }
659 }
660 for (ix = 0; ix < ARRAY_SIZE(data->pwm_rr); ix++) {
661 data->pwm_rr[ix] = dme1737_read(client,
662 DME1737_REG_PWM_RR(ix));
663 }
664
665 /* Thermal zone registers */
666 for (ix = 0; ix < ARRAY_SIZE(data->zone_low); ix++) {
667 data->zone_low[ix] = dme1737_read(client,
668 DME1737_REG_ZONE_LOW(ix));
669 data->zone_abs[ix] = dme1737_read(client,
670 DME1737_REG_ZONE_ABS(ix));
671 }
672 for (ix = 0; ix < ARRAY_SIZE(data->zone_hyst); ix++) {
673 data->zone_hyst[ix] = dme1737_read(client,
674 DME1737_REG_ZONE_HYST(ix));
675 }
676
677 /* Alarm registers */
678 data->alarms = dme1737_read(client,
679 DME1737_REG_ALARM1);
680 /* Bit 7 tells us if the other alarm registers are non-zero and
681 * therefore also need to be read */
682 if (data->alarms & 0x80) {
683 data->alarms |= dme1737_read(client,
684 DME1737_REG_ALARM2) << 8;
685 data->alarms |= dme1737_read(client,
686 DME1737_REG_ALARM3) << 16;
687 }
688
e95c237d
JH		 689 /* The ISA chips require explicit clearing of alarm bits.
690 * Don't worry, an alarm will come back if the condition
691 * that causes it still exists */
692 if (!client->driver) {
693 if (data->alarms & 0xff0000) {
694 dme1737_write(client, DME1737_REG_ALARM3,
695 0xff);
696 }
697 if (data->alarms & 0xff00) {
698 dme1737_write(client, DME1737_REG_ALARM2,
699 0xff);
700 }
701 if (data->alarms & 0xff) {
702 dme1737_write(client, DME1737_REG_ALARM1,
703 0xff);
704 }
705 }
706
9431996f
JH		 707 data->last_update = jiffies;
708 data->valid = 1;
709 }
710
711 mutex_unlock(&data->update_lock);
712
713 return data;
714}
715
716/* ---------------------------------------------------------------------
717 * Voltage sysfs attributes
718 * ix = [0-5]
719 * --------------------------------------------------------------------- */
720
721#define SYS_IN_INPUT 0
722#define SYS_IN_MIN 1
723#define SYS_IN_MAX 2
724#define SYS_IN_ALARM 3
725
726static ssize_t show_in(struct device *dev, struct device_attribute *attr,
727 char *buf)
728{
729 struct dme1737_data *data = dme1737_update_device(dev);
730 struct sensor_device_attribute_2
731 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
732 int ix = sensor_attr_2->index;
733 int fn = sensor_attr_2->nr;
734 int res;
735
736 switch (fn) {
737 case SYS_IN_INPUT:
f994fb23 738 res = IN_FROM_REG(data->in[ix], ix, 16, data->type);
9431996f
JH		 739 break;
740 case SYS_IN_MIN:
f994fb23 741 res = IN_FROM_REG(data->in_min[ix], ix, 8, data->type);
9431996f
JH		 742 break;
743 case SYS_IN_MAX:
f994fb23 744 res = IN_FROM_REG(data->in_max[ix], ix, 8, data->type);
9431996f
JH		 745 break;
746 case SYS_IN_ALARM:
747 res = (data->alarms >> DME1737_BIT_ALARM_IN[ix]) & 0x01;
748 break;
749 default:
750 res = 0;
b237eb25 751 dev_dbg(dev, "Unknown function %d.\n", fn);
9431996f
JH		 752 }
753
754 return sprintf(buf, "%d\n", res);
755}
756
757static ssize_t set_in(struct device *dev, struct device_attribute *attr,
758 const char *buf, size_t count)
759{
b237eb25
JH		 760 struct dme1737_data *data = dev_get_drvdata(dev);
761 struct i2c_client *client = &data->client;
9431996f
JH		 762 struct sensor_device_attribute_2
763 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
764 int ix = sensor_attr_2->index;
765 int fn = sensor_attr_2->nr;
766 long val = simple_strtol(buf, NULL, 10);
767
768 mutex_lock(&data->update_lock);
769 switch (fn) {
770 case SYS_IN_MIN:
f994fb23 771 data->in_min[ix] = IN_TO_REG(val, ix, data->type);
9431996f
JH		 772 dme1737_write(client, DME1737_REG_IN_MIN(ix),
773 data->in_min[ix]);
774 break;
775 case SYS_IN_MAX:
f994fb23 776 data->in_max[ix] = IN_TO_REG(val, ix, data->type);
9431996f
JH		 777 dme1737_write(client, DME1737_REG_IN_MAX(ix),
778 data->in_max[ix]);
779 break;
780 default:
b237eb25 781 dev_dbg(dev, "Unknown function %d.\n", fn);
9431996f
JH		 782 }
783 mutex_unlock(&data->update_lock);
784
785 return count;
786}
787
788/* ---------------------------------------------------------------------
789 * Temperature sysfs attributes
790 * ix = [0-2]
791 * --------------------------------------------------------------------- */
792
793#define SYS_TEMP_INPUT 0
794#define SYS_TEMP_MIN 1
795#define SYS_TEMP_MAX 2
796#define SYS_TEMP_OFFSET 3
797#define SYS_TEMP_ALARM 4
798#define SYS_TEMP_FAULT 5
799
800static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
801 char *buf)
802{
803 struct dme1737_data *data = dme1737_update_device(dev);
804 struct sensor_device_attribute_2
805 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
806 int ix = sensor_attr_2->index;
807 int fn = sensor_attr_2->nr;
808 int res;
809
810 switch (fn) {
811 case SYS_TEMP_INPUT:
812 res = TEMP_FROM_REG(data->temp[ix], 16);
813 break;
814 case SYS_TEMP_MIN:
815 res = TEMP_FROM_REG(data->temp_min[ix], 8);
816 break;
817 case SYS_TEMP_MAX:
818 res = TEMP_FROM_REG(data->temp_max[ix], 8);
819 break;
820 case SYS_TEMP_OFFSET:
821 res = TEMP_FROM_REG(data->temp_offset[ix], 8);
822 break;
823 case SYS_TEMP_ALARM:
824 res = (data->alarms >> DME1737_BIT_ALARM_TEMP[ix]) & 0x01;
825 break;
826 case SYS_TEMP_FAULT:
c0f31403 827 res = (((u16)data->temp[ix] & 0xff00) == 0x8000);
9431996f
JH		 828 break;
829 default:
830 res = 0;
b237eb25 831 dev_dbg(dev, "Unknown function %d.\n", fn);
9431996f
JH		 832 }
833
834 return sprintf(buf, "%d\n", res);
835}
836
837static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
838 const char *buf, size_t count)
839{
b237eb25
JH		 840 struct dme1737_data *data = dev_get_drvdata(dev);
841 struct i2c_client *client = &data->client;
9431996f
JH		 842 struct sensor_device_attribute_2
843 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
844 int ix = sensor_attr_2->index;
845 int fn = sensor_attr_2->nr;
846 long val = simple_strtol(buf, NULL, 10);
847
848 mutex_lock(&data->update_lock);
849 switch (fn) {
850 case SYS_TEMP_MIN:
851 data->temp_min[ix] = TEMP_TO_REG(val);
852 dme1737_write(client, DME1737_REG_TEMP_MIN(ix),
853 data->temp_min[ix]);
854 break;
855 case SYS_TEMP_MAX:
856 data->temp_max[ix] = TEMP_TO_REG(val);
857 dme1737_write(client, DME1737_REG_TEMP_MAX(ix),
858 data->temp_max[ix]);
859 break;
860 case SYS_TEMP_OFFSET:
861 data->temp_offset[ix] = TEMP_TO_REG(val);
862 dme1737_write(client, DME1737_REG_TEMP_OFFSET(ix),
863 data->temp_offset[ix]);
864 break;
865 default:
b237eb25 866 dev_dbg(dev, "Unknown function %d.\n", fn);
9431996f
JH		 867 }
868 mutex_unlock(&data->update_lock);
869
870 return count;
871}
872
873/* ---------------------------------------------------------------------
874 * Zone sysfs attributes
875 * ix = [0-2]
876 * --------------------------------------------------------------------- */
877
878#define SYS_ZONE_AUTO_CHANNELS_TEMP 0
879#define SYS_ZONE_AUTO_POINT1_TEMP_HYST 1
880#define SYS_ZONE_AUTO_POINT1_TEMP 2
881#define SYS_ZONE_AUTO_POINT2_TEMP 3
882#define SYS_ZONE_AUTO_POINT3_TEMP 4
883
884static ssize_t show_zone(struct device *dev, struct device_attribute *attr,
885 char *buf)
886{
887 struct dme1737_data *data = dme1737_update_device(dev);
888 struct sensor_device_attribute_2
889 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
890 int ix = sensor_attr_2->index;
891 int fn = sensor_attr_2->nr;
892 int res;
893
894 switch (fn) {
895 case SYS_ZONE_AUTO_CHANNELS_TEMP:
896 /* check config2 for non-standard temp-to-zone mapping */
897 if ((ix == 1) && (data->config2 & 0x02)) {
898 res = 4;
899 } else {
900 res = 1 << ix;
901 }
902 break;
903 case SYS_ZONE_AUTO_POINT1_TEMP_HYST:
904 res = TEMP_FROM_REG(data->zone_low[ix], 8) -
905 TEMP_HYST_FROM_REG(data->zone_hyst[ix == 2], ix);
906 break;
907 case SYS_ZONE_AUTO_POINT1_TEMP:
908 res = TEMP_FROM_REG(data->zone_low[ix], 8);
909 break;
910 case SYS_ZONE_AUTO_POINT2_TEMP:
911 /* pwm_freq holds the temp range bits in the upper nibble */
912 res = TEMP_FROM_REG(data->zone_low[ix], 8) +
913 TEMP_RANGE_FROM_REG(data->pwm_freq[ix]);
914 break;
915 case SYS_ZONE_AUTO_POINT3_TEMP:
916 res = TEMP_FROM_REG(data->zone_abs[ix], 8);
917 break;
918 default:
919 res = 0;
b237eb25 920 dev_dbg(dev, "Unknown function %d.\n", fn);
9431996f
JH		 921 }
922
923 return sprintf(buf, "%d\n", res);
924}
925
926static ssize_t set_zone(struct device *dev, struct device_attribute *attr,
927 const char *buf, size_t count)
928{
b237eb25
JH		 929 struct dme1737_data *data = dev_get_drvdata(dev);
930 struct i2c_client *client = &data->client;
9431996f
JH		 931 struct sensor_device_attribute_2
932 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
933 int ix = sensor_attr_2->index;
934 int fn = sensor_attr_2->nr;
935 long val = simple_strtol(buf, NULL, 10);
936
937 mutex_lock(&data->update_lock);
938 switch (fn) {
939 case SYS_ZONE_AUTO_POINT1_TEMP_HYST:
940 /* Refresh the cache */
941 data->zone_low[ix] = dme1737_read(client,
942 DME1737_REG_ZONE_LOW(ix));
943 /* Modify the temp hyst value */
944 data->zone_hyst[ix == 2] = TEMP_HYST_TO_REG(
945 TEMP_FROM_REG(data->zone_low[ix], 8) -
946 val, ix, dme1737_read(client,
947 DME1737_REG_ZONE_HYST(ix == 2)));
948 dme1737_write(client, DME1737_REG_ZONE_HYST(ix == 2),
949 data->zone_hyst[ix == 2]);
950 break;
951 case SYS_ZONE_AUTO_POINT1_TEMP:
952 data->zone_low[ix] = TEMP_TO_REG(val);
953 dme1737_write(client, DME1737_REG_ZONE_LOW(ix),
954 data->zone_low[ix]);
955 break;
956 case SYS_ZONE_AUTO_POINT2_TEMP:
957 /* Refresh the cache */
958 data->zone_low[ix] = dme1737_read(client,
959 DME1737_REG_ZONE_LOW(ix));
960 /* Modify the temp range value (which is stored in the upper
961 * nibble of the pwm_freq register) */
962 data->pwm_freq[ix] = TEMP_RANGE_TO_REG(val -
963 TEMP_FROM_REG(data->zone_low[ix], 8),
964 dme1737_read(client,
965 DME1737_REG_PWM_FREQ(ix)));
966 dme1737_write(client, DME1737_REG_PWM_FREQ(ix),
967 data->pwm_freq[ix]);
968 break;
969 case SYS_ZONE_AUTO_POINT3_TEMP:
970 data->zone_abs[ix] = TEMP_TO_REG(val);
971 dme1737_write(client, DME1737_REG_ZONE_ABS(ix),
972 data->zone_abs[ix]);
973 break;
974 default:
b237eb25 975 dev_dbg(dev, "Unknown function %d.\n", fn);
9431996f
JH		 976 }
977 mutex_unlock(&data->update_lock);
978
979 return count;
980}
981
982/* ---------------------------------------------------------------------
983 * Fan sysfs attributes
984 * ix = [0-5]
985 * --------------------------------------------------------------------- */
986
987#define SYS_FAN_INPUT 0
988#define SYS_FAN_MIN 1
989#define SYS_FAN_MAX 2
990#define SYS_FAN_ALARM 3
991#define SYS_FAN_TYPE 4
992
993static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
994 char *buf)
995{
996 struct dme1737_data *data = dme1737_update_device(dev);
997 struct sensor_device_attribute_2
998 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
999 int ix = sensor_attr_2->index;
1000 int fn = sensor_attr_2->nr;
1001 int res;
1002
1003 switch (fn) {
1004 case SYS_FAN_INPUT:
1005 res = FAN_FROM_REG(data->fan[ix],
1006 ix < 4 ? 0 :
1007 FAN_TPC_FROM_REG(data->fan_opt[ix]));
1008 break;
1009 case SYS_FAN_MIN:
1010 res = FAN_FROM_REG(data->fan_min[ix],
1011 ix < 4 ? 0 :
1012 FAN_TPC_FROM_REG(data->fan_opt[ix]));
1013 break;
1014 case SYS_FAN_MAX:
1015 /* only valid for fan[5-6] */
1016 res = FAN_MAX_FROM_REG(data->fan_max[ix - 4]);
1017 break;
1018 case SYS_FAN_ALARM:
1019 res = (data->alarms >> DME1737_BIT_ALARM_FAN[ix]) & 0x01;
1020 break;
1021 case SYS_FAN_TYPE:
1022 /* only valid for fan[1-4] */
1023 res = FAN_TYPE_FROM_REG(data->fan_opt[ix]);
1024 break;
1025 default:
1026 res = 0;
b237eb25 1027 dev_dbg(dev, "Unknown function %d.\n", fn);
9431996f
JH		 1028 }
1029
1030 return sprintf(buf, "%d\n", res);
1031}
1032
1033static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
1034 const char *buf, size_t count)
1035{
b237eb25
JH		 1036 struct dme1737_data *data = dev_get_drvdata(dev);
1037 struct i2c_client *client = &data->client;
9431996f
JH		 1038 struct sensor_device_attribute_2
1039 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
1040 int ix = sensor_attr_2->index;
1041 int fn = sensor_attr_2->nr;
1042 long val = simple_strtol(buf, NULL, 10);
1043
1044 mutex_lock(&data->update_lock);
1045 switch (fn) {
1046 case SYS_FAN_MIN:
1047 if (ix < 4) {
1048 data->fan_min[ix] = FAN_TO_REG(val, 0);
1049 } else {
1050 /* Refresh the cache */
1051 data->fan_opt[ix] = dme1737_read(client,
1052 DME1737_REG_FAN_OPT(ix));
1053 /* Modify the fan min value */
1054 data->fan_min[ix] = FAN_TO_REG(val,
1055 FAN_TPC_FROM_REG(data->fan_opt[ix]));
1056 }
1057 dme1737_write(client, DME1737_REG_FAN_MIN(ix),
1058 data->fan_min[ix] & 0xff);
1059 dme1737_write(client, DME1737_REG_FAN_MIN(ix) + 1,
1060 data->fan_min[ix] >> 8);
1061 break;
1062 case SYS_FAN_MAX:
1063 /* Only valid for fan[5-6] */
1064 data->fan_max[ix - 4] = FAN_MAX_TO_REG(val);
1065 dme1737_write(client, DME1737_REG_FAN_MAX(ix),
1066 data->fan_max[ix - 4]);
1067 break;
1068 case SYS_FAN_TYPE:
1069 /* Only valid for fan[1-4] */
1070 if (!(val == 1 || val == 2 || val == 4)) {
1071 count = -EINVAL;
e95c237d 1072 dev_warn(dev, "Fan type value %ld not "
9431996f
JH		 1073 "supported. Choose one of 1, 2, or 4.\n",
1074 val);
1075 goto exit;
1076 }
1077 data->fan_opt[ix] = FAN_TYPE_TO_REG(val, dme1737_read(client,
1078 DME1737_REG_FAN_OPT(ix)));
1079 dme1737_write(client, DME1737_REG_FAN_OPT(ix),
1080 data->fan_opt[ix]);
1081 break;
1082 default:
b237eb25 1083 dev_dbg(dev, "Unknown function %d.\n", fn);
9431996f
JH		 1084 }
1085exit:
1086 mutex_unlock(&data->update_lock);
1087
1088 return count;
1089}
1090
1091/* ---------------------------------------------------------------------
1092 * PWM sysfs attributes
1093 * ix = [0-4]
1094 * --------------------------------------------------------------------- */
1095
1096#define SYS_PWM 0
1097#define SYS_PWM_FREQ 1
1098#define SYS_PWM_ENABLE 2
1099#define SYS_PWM_RAMP_RATE 3
1100#define SYS_PWM_AUTO_CHANNELS_ZONE 4
1101#define SYS_PWM_AUTO_PWM_MIN 5
1102#define SYS_PWM_AUTO_POINT1_PWM 6
1103#define SYS_PWM_AUTO_POINT2_PWM 7
1104
1105static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
1106 char *buf)
1107{
1108 struct dme1737_data *data = dme1737_update_device(dev);
1109 struct sensor_device_attribute_2
1110 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
1111 int ix = sensor_attr_2->index;
1112 int fn = sensor_attr_2->nr;
1113 int res;
1114
1115 switch (fn) {
1116 case SYS_PWM:
1117 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 0) {
1118 res = 255;
1119 } else {
1120 res = data->pwm[ix];
1121 }
1122 break;
1123 case SYS_PWM_FREQ:
1124 res = PWM_FREQ_FROM_REG(data->pwm_freq[ix]);
1125 break;
1126 case SYS_PWM_ENABLE:
1127 if (ix > 3) {
1128 res = 1; /* pwm[5-6] hard-wired to manual mode */
1129 } else {
1130 res = PWM_EN_FROM_REG(data->pwm_config[ix]);
1131 }
1132 break;
1133 case SYS_PWM_RAMP_RATE:
1134 /* Only valid for pwm[1-3] */
1135 res = PWM_RR_FROM_REG(data->pwm_rr[ix > 0], ix);
1136 break;
1137 case SYS_PWM_AUTO_CHANNELS_ZONE:
1138 /* Only valid for pwm[1-3] */
1139 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) {
1140 res = PWM_ACZ_FROM_REG(data->pwm_config[ix]);
1141 } else {
1142 res = data->pwm_acz[ix];
1143 }
1144 break;
1145 case SYS_PWM_AUTO_PWM_MIN:
1146 /* Only valid for pwm[1-3] */
1147 if (PWM_OFF_FROM_REG(data->pwm_rr[0], ix)) {
1148 res = data->pwm_min[ix];
1149 } else {
1150 res = 0;
1151 }
1152 break;
1153 case SYS_PWM_AUTO_POINT1_PWM:
1154 /* Only valid for pwm[1-3] */
1155 res = data->pwm_min[ix];
1156 break;
1157 case SYS_PWM_AUTO_POINT2_PWM:
1158 /* Only valid for pwm[1-3] */
1159 res = 255; /* hard-wired */
1160 break;
1161 default:
1162 res = 0;
b237eb25 1163 dev_dbg(dev, "Unknown function %d.\n", fn);
9431996f
JH		 1164 }
1165
1166 return sprintf(buf, "%d\n", res);
1167}
1168
73ce48f6 1169static struct attribute *dme1737_pwm_chmod_attr[];
b237eb25 1170static void dme1737_chmod_file(struct device*, struct attribute*, mode_t);
9431996f
JH		 1171
1172static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
1173 const char *buf, size_t count)
1174{
b237eb25
JH		 1175 struct dme1737_data *data = dev_get_drvdata(dev);
1176 struct i2c_client *client = &data->client;
9431996f
JH		 1177 struct sensor_device_attribute_2
1178 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
1179 int ix = sensor_attr_2->index;
1180 int fn = sensor_attr_2->nr;
1181 long val = simple_strtol(buf, NULL, 10);
1182
1183 mutex_lock(&data->update_lock);
1184 switch (fn) {
1185 case SYS_PWM:
1186 data->pwm[ix] = SENSORS_LIMIT(val, 0, 255);
1187 dme1737_write(client, DME1737_REG_PWM(ix), data->pwm[ix]);
1188 break;
1189 case SYS_PWM_FREQ:
1190 data->pwm_freq[ix] = PWM_FREQ_TO_REG(val, dme1737_read(client,
1191 DME1737_REG_PWM_FREQ(ix)));
1192 dme1737_write(client, DME1737_REG_PWM_FREQ(ix),
1193 data->pwm_freq[ix]);
1194 break;
1195 case SYS_PWM_ENABLE:
1196 /* Only valid for pwm[1-3] */
1197 if (val < 0 || val > 2) {
1198 count = -EINVAL;
e95c237d 1199 dev_warn(dev, "PWM enable %ld not "
9431996f
JH		 1200 "supported. Choose one of 0, 1, or 2.\n",
1201 val);
1202 goto exit;
1203 }
1204 /* Refresh the cache */
1205 data->pwm_config[ix] = dme1737_read(client,
1206 DME1737_REG_PWM_CONFIG(ix));
1207 if (val == PWM_EN_FROM_REG(data->pwm_config[ix])) {
1208 /* Bail out if no change */
1209 goto exit;
1210 }
1211 /* Do some housekeeping if we are currently in auto mode */
1212 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) {
1213 /* Save the current zone channel assignment */
1214 data->pwm_acz[ix] = PWM_ACZ_FROM_REG(
1215 data->pwm_config[ix]);
1216 /* Save the current ramp rate state and disable it */
1217 data->pwm_rr[ix > 0] = dme1737_read(client,
1218 DME1737_REG_PWM_RR(ix > 0));
1219 data->pwm_rr_en &= ~(1 << ix);
1220 if (PWM_RR_EN_FROM_REG(data->pwm_rr[ix > 0], ix)) {
1221 data->pwm_rr_en |= (1 << ix);
1222 data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(0, ix,
1223 data->pwm_rr[ix > 0]);
1224 dme1737_write(client,
1225 DME1737_REG_PWM_RR(ix > 0),
1226 data->pwm_rr[ix > 0]);
1227 }
1228 }
1229 /* Set the new PWM mode */
1230 switch (val) {
1231 case 0:
1232 /* Change permissions of pwm[ix] to read-only */
73ce48f6 1233 dme1737_chmod_file(dev, dme1737_pwm_chmod_attr[ix],
9431996f
JH		 1234 S_IRUGO);
1235 /* Turn fan fully on */
1236 data->pwm_config[ix] = PWM_EN_TO_REG(0,
1237 data->pwm_config[ix]);
1238 dme1737_write(client, DME1737_REG_PWM_CONFIG(ix),
1239 data->pwm_config[ix]);
1240 break;
1241 case 1:
1242 /* Turn on manual mode */
1243 data->pwm_config[ix] = PWM_EN_TO_REG(1,
1244 data->pwm_config[ix]);
1245 dme1737_write(client, DME1737_REG_PWM_CONFIG(ix),
1246 data->pwm_config[ix]);
1247 /* Change permissions of pwm[ix] to read-writeable */
73ce48f6 1248 dme1737_chmod_file(dev, dme1737_pwm_chmod_attr[ix],
9431996f
JH		 1249 S_IRUGO | S_IWUSR);
1250 break;
1251 case 2:
1252 /* Change permissions of pwm[ix] to read-only */
73ce48f6 1253 dme1737_chmod_file(dev, dme1737_pwm_chmod_attr[ix],
9431996f
JH		 1254 S_IRUGO);
1255 /* Turn on auto mode using the saved zone channel
1256 * assignment */
1257 data->pwm_config[ix] = PWM_ACZ_TO_REG(
1258 data->pwm_acz[ix],
1259 data->pwm_config[ix]);
1260 dme1737_write(client, DME1737_REG_PWM_CONFIG(ix),
1261 data->pwm_config[ix]);
1262 /* Enable PWM ramp rate if previously enabled */
1263 if (data->pwm_rr_en & (1 << ix)) {
1264 data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(1, ix,
1265 dme1737_read(client,
1266 DME1737_REG_PWM_RR(ix > 0)));
1267 dme1737_write(client,
1268 DME1737_REG_PWM_RR(ix > 0),
1269 data->pwm_rr[ix > 0]);
1270 }
1271 break;
1272 }
1273 break;
1274 case SYS_PWM_RAMP_RATE:
1275 /* Only valid for pwm[1-3] */
1276 /* Refresh the cache */
1277 data->pwm_config[ix] = dme1737_read(client,
1278 DME1737_REG_PWM_CONFIG(ix));
1279 data->pwm_rr[ix > 0] = dme1737_read(client,
1280 DME1737_REG_PWM_RR(ix > 0));
1281 /* Set the ramp rate value */
1282 if (val > 0) {
1283 data->pwm_rr[ix > 0] = PWM_RR_TO_REG(val, ix,
1284 data->pwm_rr[ix > 0]);
1285 }
1286 /* Enable/disable the feature only if the associated PWM
1287 * output is in automatic mode. */
1288 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) {
1289 data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(val > 0, ix,
1290 data->pwm_rr[ix > 0]);
1291 }
1292 dme1737_write(client, DME1737_REG_PWM_RR(ix > 0),
1293 data->pwm_rr[ix > 0]);
1294 break;
1295 case SYS_PWM_AUTO_CHANNELS_ZONE:
1296 /* Only valid for pwm[1-3] */
1297 if (!(val == 1 || val == 2 || val == 4 ||
1298 val == 6 || val == 7)) {
1299 count = -EINVAL;
e95c237d 1300 dev_warn(dev, "PWM auto channels zone %ld "
9431996f
JH		 1301 "not supported. Choose one of 1, 2, 4, 6, "
1302 "or 7.\n", val);
1303 goto exit;
1304 }
1305 /* Refresh the cache */
1306 data->pwm_config[ix] = dme1737_read(client,
1307 DME1737_REG_PWM_CONFIG(ix));
1308 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) {
1309 /* PWM is already in auto mode so update the temp
1310 * channel assignment */
1311 data->pwm_config[ix] = PWM_ACZ_TO_REG(val,
1312 data->pwm_config[ix]);
1313 dme1737_write(client, DME1737_REG_PWM_CONFIG(ix),
1314 data->pwm_config[ix]);
1315 } else {
1316 /* PWM is not in auto mode so we save the temp
1317 * channel assignment for later use */
1318 data->pwm_acz[ix] = val;
1319 }
1320 break;
1321 case SYS_PWM_AUTO_PWM_MIN:
1322 /* Only valid for pwm[1-3] */
1323 /* Refresh the cache */
1324 data->pwm_min[ix] = dme1737_read(client,
1325 DME1737_REG_PWM_MIN(ix));
1326 /* There are only 2 values supported for the auto_pwm_min
1327 * value: 0 or auto_point1_pwm. So if the temperature drops
1328 * below the auto_point1_temp_hyst value, the fan either turns
1329 * off or runs at auto_point1_pwm duty-cycle. */
1330 if (val > ((data->pwm_min[ix] + 1) / 2)) {
1331 data->pwm_rr[0] = PWM_OFF_TO_REG(1, ix,
1332 dme1737_read(client,
1333 DME1737_REG_PWM_RR(0)));
9431996f
JH		 1334 } else {
1335 data->pwm_rr[0] = PWM_OFF_TO_REG(0, ix,
1336 dme1737_read(client,
1337 DME1737_REG_PWM_RR(0)));
9431996f
JH		 1338 }
1339 dme1737_write(client, DME1737_REG_PWM_RR(0),
1340 data->pwm_rr[0]);
1341 break;
1342 case SYS_PWM_AUTO_POINT1_PWM:
1343 /* Only valid for pwm[1-3] */
1344 data->pwm_min[ix] = SENSORS_LIMIT(val, 0, 255);
1345 dme1737_write(client, DME1737_REG_PWM_MIN(ix),
1346 data->pwm_min[ix]);
1347 break;
1348 default:
b237eb25 1349 dev_dbg(dev, "Unknown function %d.\n", fn);
9431996f
JH		 1350 }
1351exit:
1352 mutex_unlock(&data->update_lock);
1353
1354 return count;
1355}
1356
1357/* ---------------------------------------------------------------------
1358 * Miscellaneous sysfs attributes
1359 * --------------------------------------------------------------------- */
1360
1361static ssize_t show_vrm(struct device *dev, struct device_attribute *attr,
1362 char *buf)
1363{
1364 struct i2c_client *client = to_i2c_client(dev);
1365 struct dme1737_data *data = i2c_get_clientdata(client);
1366
1367 return sprintf(buf, "%d\n", data->vrm);
1368}
1369
1370static ssize_t set_vrm(struct device *dev, struct device_attribute *attr,
1371 const char *buf, size_t count)
1372{
b237eb25 1373 struct dme1737_data *data = dev_get_drvdata(dev);
9431996f
JH		 1374 long val = simple_strtol(buf, NULL, 10);
1375
1376 data->vrm = val;
1377 return count;
1378}
1379
1380static ssize_t show_vid(struct device *dev, struct device_attribute *attr,
1381 char *buf)
1382{
1383 struct dme1737_data *data = dme1737_update_device(dev);
1384
1385 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
1386}
1387
e95c237d
JH		 1388static ssize_t show_name(struct device *dev, struct device_attribute *attr,
1389 char *buf)
1390{
1391 struct dme1737_data *data = dev_get_drvdata(dev);
1392
1393 return sprintf(buf, "%s\n", data->client.name);
1394}
1395
9431996f
JH		 1396/* ---------------------------------------------------------------------
1397 * Sysfs device attribute defines and structs
1398 * --------------------------------------------------------------------- */
1399
1400/* Voltages 0-6 */
1401
1402#define SENSOR_DEVICE_ATTR_IN(ix) \
1403static SENSOR_DEVICE_ATTR_2(in##ix##_input, S_IRUGO, \
b237eb25 1404 show_in, NULL, SYS_IN_INPUT, ix); \
9431996f 1405static SENSOR_DEVICE_ATTR_2(in##ix##_min, S_IRUGO | S_IWUSR, \
b237eb25 1406 show_in, set_in, SYS_IN_MIN, ix); \
9431996f 1407static SENSOR_DEVICE_ATTR_2(in##ix##_max, S_IRUGO | S_IWUSR, \
b237eb25 1408 show_in, set_in, SYS_IN_MAX, ix); \
9431996f 1409static SENSOR_DEVICE_ATTR_2(in##ix##_alarm, S_IRUGO, \
b237eb25 1410 show_in, NULL, SYS_IN_ALARM, ix)
9431996f
JH		 1411
1412SENSOR_DEVICE_ATTR_IN(0);
1413SENSOR_DEVICE_ATTR_IN(1);
1414SENSOR_DEVICE_ATTR_IN(2);
1415SENSOR_DEVICE_ATTR_IN(3);
1416SENSOR_DEVICE_ATTR_IN(4);
1417SENSOR_DEVICE_ATTR_IN(5);
1418SENSOR_DEVICE_ATTR_IN(6);
1419
1420/* Temperatures 1-3 */
1421
1422#define SENSOR_DEVICE_ATTR_TEMP(ix) \
1423static SENSOR_DEVICE_ATTR_2(temp##ix##_input, S_IRUGO, \
b237eb25 1424 show_temp, NULL, SYS_TEMP_INPUT, ix-1); \
9431996f 1425static SENSOR_DEVICE_ATTR_2(temp##ix##_min, S_IRUGO | S_IWUSR, \
b237eb25 1426 show_temp, set_temp, SYS_TEMP_MIN, ix-1); \
9431996f 1427static SENSOR_DEVICE_ATTR_2(temp##ix##_max, S_IRUGO | S_IWUSR, \
b237eb25 1428 show_temp, set_temp, SYS_TEMP_MAX, ix-1); \
9431996f 1429static SENSOR_DEVICE_ATTR_2(temp##ix##_offset, S_IRUGO, \
b237eb25 1430 show_temp, set_temp, SYS_TEMP_OFFSET, ix-1); \
9431996f 1431static SENSOR_DEVICE_ATTR_2(temp##ix##_alarm, S_IRUGO, \
b237eb25 1432 show_temp, NULL, SYS_TEMP_ALARM, ix-1); \
9431996f 1433static SENSOR_DEVICE_ATTR_2(temp##ix##_fault, S_IRUGO, \
b237eb25 1434 show_temp, NULL, SYS_TEMP_FAULT, ix-1)
9431996f
JH		 1435
1436SENSOR_DEVICE_ATTR_TEMP(1);
1437SENSOR_DEVICE_ATTR_TEMP(2);
1438SENSOR_DEVICE_ATTR_TEMP(3);
1439
1440/* Zones 1-3 */
1441
1442#define SENSOR_DEVICE_ATTR_ZONE(ix) \
1443static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_channels_temp, S_IRUGO, \
b237eb25 1444 show_zone, NULL, SYS_ZONE_AUTO_CHANNELS_TEMP, ix-1); \
9431996f 1445static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point1_temp_hyst, S_IRUGO, \
b237eb25 1446 show_zone, set_zone, SYS_ZONE_AUTO_POINT1_TEMP_HYST, ix-1); \
9431996f 1447static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point1_temp, S_IRUGO, \
b237eb25 1448 show_zone, set_zone, SYS_ZONE_AUTO_POINT1_TEMP, ix-1); \
9431996f 1449static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point2_temp, S_IRUGO, \
b237eb25 1450 show_zone, set_zone, SYS_ZONE_AUTO_POINT2_TEMP, ix-1); \
9431996f 1451static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point3_temp, S_IRUGO, \
b237eb25 1452 show_zone, set_zone, SYS_ZONE_AUTO_POINT3_TEMP, ix-1)
9431996f
JH		 1453
1454SENSOR_DEVICE_ATTR_ZONE(1);
1455SENSOR_DEVICE_ATTR_ZONE(2);
1456SENSOR_DEVICE_ATTR_ZONE(3);
1457
1458/* Fans 1-4 */
1459
1460#define SENSOR_DEVICE_ATTR_FAN_1TO4(ix) \
1461static SENSOR_DEVICE_ATTR_2(fan##ix##_input, S_IRUGO, \
b237eb25 1462 show_fan, NULL, SYS_FAN_INPUT, ix-1); \
9431996f 1463static SENSOR_DEVICE_ATTR_2(fan##ix##_min, S_IRUGO | S_IWUSR, \
b237eb25 1464 show_fan, set_fan, SYS_FAN_MIN, ix-1); \
9431996f 1465static SENSOR_DEVICE_ATTR_2(fan##ix##_alarm, S_IRUGO, \
b237eb25 1466 show_fan, NULL, SYS_FAN_ALARM, ix-1); \
9431996f 1467static SENSOR_DEVICE_ATTR_2(fan##ix##_type, S_IRUGO | S_IWUSR, \
b237eb25 1468 show_fan, set_fan, SYS_FAN_TYPE, ix-1)
9431996f
JH		 1469
1470SENSOR_DEVICE_ATTR_FAN_1TO4(1);
1471SENSOR_DEVICE_ATTR_FAN_1TO4(2);
1472SENSOR_DEVICE_ATTR_FAN_1TO4(3);
1473SENSOR_DEVICE_ATTR_FAN_1TO4(4);
1474
1475/* Fans 5-6 */
1476
1477#define SENSOR_DEVICE_ATTR_FAN_5TO6(ix) \
1478static SENSOR_DEVICE_ATTR_2(fan##ix##_input, S_IRUGO, \
b237eb25 1479 show_fan, NULL, SYS_FAN_INPUT, ix-1); \
9431996f 1480static SENSOR_DEVICE_ATTR_2(fan##ix##_min, S_IRUGO | S_IWUSR, \
b237eb25 1481 show_fan, set_fan, SYS_FAN_MIN, ix-1); \
9431996f 1482static SENSOR_DEVICE_ATTR_2(fan##ix##_alarm, S_IRUGO, \
b237eb25 1483 show_fan, NULL, SYS_FAN_ALARM, ix-1); \
9431996f 1484static SENSOR_DEVICE_ATTR_2(fan##ix##_max, S_IRUGO | S_IWUSR, \
b237eb25 1485 show_fan, set_fan, SYS_FAN_MAX, ix-1)
9431996f
JH		 1486
1487SENSOR_DEVICE_ATTR_FAN_5TO6(5);
1488SENSOR_DEVICE_ATTR_FAN_5TO6(6);
1489
1490/* PWMs 1-3 */
1491
1492#define SENSOR_DEVICE_ATTR_PWM_1TO3(ix) \
1493static SENSOR_DEVICE_ATTR_2(pwm##ix, S_IRUGO, \
b237eb25 1494 show_pwm, set_pwm, SYS_PWM, ix-1); \
9431996f 1495static SENSOR_DEVICE_ATTR_2(pwm##ix##_freq, S_IRUGO, \
b237eb25 1496 show_pwm, set_pwm, SYS_PWM_FREQ, ix-1); \
9431996f 1497static SENSOR_DEVICE_ATTR_2(pwm##ix##_enable, S_IRUGO, \
b237eb25 1498 show_pwm, set_pwm, SYS_PWM_ENABLE, ix-1); \
9431996f 1499static SENSOR_DEVICE_ATTR_2(pwm##ix##_ramp_rate, S_IRUGO, \
b237eb25 1500 show_pwm, set_pwm, SYS_PWM_RAMP_RATE, ix-1); \
9431996f 1501static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_channels_zone, S_IRUGO, \
b237eb25 1502 show_pwm, set_pwm, SYS_PWM_AUTO_CHANNELS_ZONE, ix-1); \
9431996f 1503static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_pwm_min, S_IRUGO, \
b237eb25 1504 show_pwm, set_pwm, SYS_PWM_AUTO_PWM_MIN, ix-1); \
9431996f 1505static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_point1_pwm, S_IRUGO, \
b237eb25 1506 show_pwm, set_pwm, SYS_PWM_AUTO_POINT1_PWM, ix-1); \
9431996f 1507static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_point2_pwm, S_IRUGO, \
b237eb25 1508 show_pwm, NULL, SYS_PWM_AUTO_POINT2_PWM, ix-1)
9431996f
JH		 1509
1510SENSOR_DEVICE_ATTR_PWM_1TO3(1);
1511SENSOR_DEVICE_ATTR_PWM_1TO3(2);
1512SENSOR_DEVICE_ATTR_PWM_1TO3(3);
1513
1514/* PWMs 5-6 */
1515
1516#define SENSOR_DEVICE_ATTR_PWM_5TO6(ix) \
9b257714 1517static SENSOR_DEVICE_ATTR_2(pwm##ix, S_IRUGO, \
b237eb25 1518 show_pwm, set_pwm, SYS_PWM, ix-1); \
9b257714 1519static SENSOR_DEVICE_ATTR_2(pwm##ix##_freq, S_IRUGO, \
b237eb25 1520 show_pwm, set_pwm, SYS_PWM_FREQ, ix-1); \
9431996f 1521static SENSOR_DEVICE_ATTR_2(pwm##ix##_enable, S_IRUGO, \
b237eb25 1522 show_pwm, NULL, SYS_PWM_ENABLE, ix-1)
9431996f
JH		 1523
1524SENSOR_DEVICE_ATTR_PWM_5TO6(5);
1525SENSOR_DEVICE_ATTR_PWM_5TO6(6);
1526
1527/* Misc */
1528
1529static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm, set_vrm);
1530static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
e95c237d 1531static DEVICE_ATTR(name, S_IRUGO, show_name, NULL); /* for ISA devices */
9431996f 1532
9431996f
JH		 1533/* This struct holds all the attributes that are always present and need to be
1534 * created unconditionally. The attributes that need modification of their
1535 * permissions are created read-only and write permissions are added or removed
1536 * on the fly when required */
1537static struct attribute *dme1737_attr[] ={
b237eb25 1538 /* Voltages */
9b257714
JH		 1539 &sensor_dev_attr_in0_input.dev_attr.attr,
1540 &sensor_dev_attr_in0_min.dev_attr.attr,
1541 &sensor_dev_attr_in0_max.dev_attr.attr,
1542 &sensor_dev_attr_in0_alarm.dev_attr.attr,
1543 &sensor_dev_attr_in1_input.dev_attr.attr,
1544 &sensor_dev_attr_in1_min.dev_attr.attr,
1545 &sensor_dev_attr_in1_max.dev_attr.attr,
1546 &sensor_dev_attr_in1_alarm.dev_attr.attr,
1547 &sensor_dev_attr_in2_input.dev_attr.attr,
1548 &sensor_dev_attr_in2_min.dev_attr.attr,
1549 &sensor_dev_attr_in2_max.dev_attr.attr,
1550 &sensor_dev_attr_in2_alarm.dev_attr.attr,
1551 &sensor_dev_attr_in3_input.dev_attr.attr,
1552 &sensor_dev_attr_in3_min.dev_attr.attr,
1553 &sensor_dev_attr_in3_max.dev_attr.attr,
1554 &sensor_dev_attr_in3_alarm.dev_attr.attr,
1555 &sensor_dev_attr_in4_input.dev_attr.attr,
1556 &sensor_dev_attr_in4_min.dev_attr.attr,
1557 &sensor_dev_attr_in4_max.dev_attr.attr,
1558 &sensor_dev_attr_in4_alarm.dev_attr.attr,
1559 &sensor_dev_attr_in5_input.dev_attr.attr,
1560 &sensor_dev_attr_in5_min.dev_attr.attr,
1561 &sensor_dev_attr_in5_max.dev_attr.attr,
1562 &sensor_dev_attr_in5_alarm.dev_attr.attr,
1563 &sensor_dev_attr_in6_input.dev_attr.attr,
1564 &sensor_dev_attr_in6_min.dev_attr.attr,
1565 &sensor_dev_attr_in6_max.dev_attr.attr,
1566 &sensor_dev_attr_in6_alarm.dev_attr.attr,
b237eb25 1567 /* Temperatures */
9b257714
JH		 1568 &sensor_dev_attr_temp1_input.dev_attr.attr,
1569 &sensor_dev_attr_temp1_min.dev_attr.attr,
1570 &sensor_dev_attr_temp1_max.dev_attr.attr,
1571 &sensor_dev_attr_temp1_alarm.dev_attr.attr,
1572 &sensor_dev_attr_temp1_fault.dev_attr.attr,
1573 &sensor_dev_attr_temp1_offset.dev_attr.attr,
1574 &sensor_dev_attr_temp2_input.dev_attr.attr,
1575 &sensor_dev_attr_temp2_min.dev_attr.attr,
1576 &sensor_dev_attr_temp2_max.dev_attr.attr,
1577 &sensor_dev_attr_temp2_alarm.dev_attr.attr,
1578 &sensor_dev_attr_temp2_fault.dev_attr.attr,
1579 &sensor_dev_attr_temp2_offset.dev_attr.attr,
1580 &sensor_dev_attr_temp3_input.dev_attr.attr,
1581 &sensor_dev_attr_temp3_min.dev_attr.attr,
1582 &sensor_dev_attr_temp3_max.dev_attr.attr,
1583 &sensor_dev_attr_temp3_alarm.dev_attr.attr,
1584 &sensor_dev_attr_temp3_fault.dev_attr.attr,
1585 &sensor_dev_attr_temp3_offset.dev_attr.attr,
b237eb25 1586 /* Zones */
9b257714
JH		 1587 &sensor_dev_attr_zone1_auto_point1_temp_hyst.dev_attr.attr,
1588 &sensor_dev_attr_zone1_auto_point1_temp.dev_attr.attr,
1589 &sensor_dev_attr_zone1_auto_point2_temp.dev_attr.attr,
1590 &sensor_dev_attr_zone1_auto_point3_temp.dev_attr.attr,
1591 &sensor_dev_attr_zone1_auto_channels_temp.dev_attr.attr,
1592 &sensor_dev_attr_zone2_auto_point1_temp_hyst.dev_attr.attr,
1593 &sensor_dev_attr_zone2_auto_point1_temp.dev_attr.attr,
1594 &sensor_dev_attr_zone2_auto_point2_temp.dev_attr.attr,
1595 &sensor_dev_attr_zone2_auto_point3_temp.dev_attr.attr,
1596 &sensor_dev_attr_zone2_auto_channels_temp.dev_attr.attr,
1597 &sensor_dev_attr_zone3_auto_point1_temp_hyst.dev_attr.attr,
1598 &sensor_dev_attr_zone3_auto_point1_temp.dev_attr.attr,
1599 &sensor_dev_attr_zone3_auto_point2_temp.dev_attr.attr,
1600 &sensor_dev_attr_zone3_auto_point3_temp.dev_attr.attr,
1601 &sensor_dev_attr_zone3_auto_channels_temp.dev_attr.attr,
b237eb25
JH		 1602 /* Misc */
1603 &dev_attr_vrm.attr,
1604 &dev_attr_cpu0_vid.attr,
9431996f
JH		 1605 NULL
1606};
1607
1608static const struct attribute_group dme1737_group = {
b237eb25 1609 .attrs = dme1737_attr,
9431996f
JH		 1610};
1611
1612/* The following structs hold the PWM attributes, some of which are optional.
1613 * Their creation depends on the chip configuration which is determined during
1614 * module load. */
73ce48f6 1615static struct attribute *dme1737_pwm1_attr[] = {
9b257714
JH		 1616 &sensor_dev_attr_pwm1.dev_attr.attr,
1617 &sensor_dev_attr_pwm1_freq.dev_attr.attr,
1618 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
1619 &sensor_dev_attr_pwm1_ramp_rate.dev_attr.attr,
1620 &sensor_dev_attr_pwm1_auto_channels_zone.dev_attr.attr,
1621 &sensor_dev_attr_pwm1_auto_pwm_min.dev_attr.attr,
1622 &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
1623 &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
9431996f
JH		 1624 NULL
1625};
73ce48f6 1626static struct attribute *dme1737_pwm2_attr[] = {
9b257714
JH		 1627 &sensor_dev_attr_pwm2.dev_attr.attr,
1628 &sensor_dev_attr_pwm2_freq.dev_attr.attr,
1629 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
1630 &sensor_dev_attr_pwm2_ramp_rate.dev_attr.attr,
1631 &sensor_dev_attr_pwm2_auto_channels_zone.dev_attr.attr,
1632 &sensor_dev_attr_pwm2_auto_pwm_min.dev_attr.attr,
1633 &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,
1634 &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
9431996f
JH		 1635 NULL
1636};
73ce48f6 1637static struct attribute *dme1737_pwm3_attr[] = {
9b257714
JH		 1638 &sensor_dev_attr_pwm3.dev_attr.attr,
1639 &sensor_dev_attr_pwm3_freq.dev_attr.attr,
1640 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
1641 &sensor_dev_attr_pwm3_ramp_rate.dev_attr.attr,
1642 &sensor_dev_attr_pwm3_auto_channels_zone.dev_attr.attr,
1643 &sensor_dev_attr_pwm3_auto_pwm_min.dev_attr.attr,
1644 &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,
1645 &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
9431996f
JH		 1646 NULL
1647};
73ce48f6 1648static struct attribute *dme1737_pwm5_attr[] = {
9b257714
JH		 1649 &sensor_dev_attr_pwm5.dev_attr.attr,
1650 &sensor_dev_attr_pwm5_freq.dev_attr.attr,
1651 &sensor_dev_attr_pwm5_enable.dev_attr.attr,
9431996f
JH		 1652 NULL
1653};
73ce48f6 1654static struct attribute *dme1737_pwm6_attr[] = {
9b257714
JH		 1655 &sensor_dev_attr_pwm6.dev_attr.attr,
1656 &sensor_dev_attr_pwm6_freq.dev_attr.attr,
1657 &sensor_dev_attr_pwm6_enable.dev_attr.attr,
9431996f
JH		 1658 NULL
1659};
1660
1661static const struct attribute_group dme1737_pwm_group[] = {
73ce48f6
JH		 1662 { .attrs = dme1737_pwm1_attr },
1663 { .attrs = dme1737_pwm2_attr },
1664 { .attrs = dme1737_pwm3_attr },
9431996f 1665 { .attrs = NULL },
73ce48f6
JH		 1666 { .attrs = dme1737_pwm5_attr },
1667 { .attrs = dme1737_pwm6_attr },
9431996f
JH		 1668};
1669
1670/* The following structs hold the fan attributes, some of which are optional.
1671 * Their creation depends on the chip configuration which is determined during
1672 * module load. */
73ce48f6 1673static struct attribute *dme1737_fan1_attr[] = {
9b257714
JH		 1674 &sensor_dev_attr_fan1_input.dev_attr.attr,
1675 &sensor_dev_attr_fan1_min.dev_attr.attr,
1676 &sensor_dev_attr_fan1_alarm.dev_attr.attr,
1677 &sensor_dev_attr_fan1_type.dev_attr.attr,
9431996f
JH		 1678 NULL
1679};
73ce48f6 1680static struct attribute *dme1737_fan2_attr[] = {
9b257714
JH		 1681 &sensor_dev_attr_fan2_input.dev_attr.attr,
1682 &sensor_dev_attr_fan2_min.dev_attr.attr,
1683 &sensor_dev_attr_fan2_alarm.dev_attr.attr,
1684 &sensor_dev_attr_fan2_type.dev_attr.attr,
9431996f
JH		 1685 NULL
1686};
73ce48f6 1687static struct attribute *dme1737_fan3_attr[] = {
9b257714
JH		 1688 &sensor_dev_attr_fan3_input.dev_attr.attr,
1689 &sensor_dev_attr_fan3_min.dev_attr.attr,
1690 &sensor_dev_attr_fan3_alarm.dev_attr.attr,
1691 &sensor_dev_attr_fan3_type.dev_attr.attr,
9431996f
JH		 1692 NULL
1693};
73ce48f6 1694static struct attribute *dme1737_fan4_attr[] = {
9b257714
JH		 1695 &sensor_dev_attr_fan4_input.dev_attr.attr,
1696 &sensor_dev_attr_fan4_min.dev_attr.attr,
1697 &sensor_dev_attr_fan4_alarm.dev_attr.attr,
1698 &sensor_dev_attr_fan4_type.dev_attr.attr,
9431996f
JH		 1699 NULL
1700};
73ce48f6 1701static struct attribute *dme1737_fan5_attr[] = {
9b257714
JH		 1702 &sensor_dev_attr_fan5_input.dev_attr.attr,
1703 &sensor_dev_attr_fan5_min.dev_attr.attr,
1704 &sensor_dev_attr_fan5_alarm.dev_attr.attr,
1705 &sensor_dev_attr_fan5_max.dev_attr.attr,
9431996f
JH		 1706 NULL
1707};
73ce48f6 1708static struct attribute *dme1737_fan6_attr[] = {
9b257714
JH		 1709 &sensor_dev_attr_fan6_input.dev_attr.attr,
1710 &sensor_dev_attr_fan6_min.dev_attr.attr,
1711 &sensor_dev_attr_fan6_alarm.dev_attr.attr,
1712 &sensor_dev_attr_fan6_max.dev_attr.attr,
9431996f
JH		 1713 NULL
1714};
1715
1716static const struct attribute_group dme1737_fan_group[] = {
73ce48f6
JH		 1717 { .attrs = dme1737_fan1_attr },
1718 { .attrs = dme1737_fan2_attr },
1719 { .attrs = dme1737_fan3_attr },
1720 { .attrs = dme1737_fan4_attr },
1721 { .attrs = dme1737_fan5_attr },
1722 { .attrs = dme1737_fan6_attr },
9431996f
JH		 1723};
1724
1725/* The permissions of all of the following attributes are changed to read-
1726 * writeable if the chip is *not* locked. Otherwise they stay read-only. */
73ce48f6 1727static struct attribute *dme1737_misc_chmod_attr[] = {
9431996f 1728 /* Temperatures */
9b257714
JH		 1729 &sensor_dev_attr_temp1_offset.dev_attr.attr,
1730 &sensor_dev_attr_temp2_offset.dev_attr.attr,
1731 &sensor_dev_attr_temp3_offset.dev_attr.attr,
9431996f 1732 /* Zones */
9b257714
JH		 1733 &sensor_dev_attr_zone1_auto_point1_temp_hyst.dev_attr.attr,
1734 &sensor_dev_attr_zone1_auto_point1_temp.dev_attr.attr,
1735 &sensor_dev_attr_zone1_auto_point2_temp.dev_attr.attr,
1736 &sensor_dev_attr_zone1_auto_point3_temp.dev_attr.attr,
1737 &sensor_dev_attr_zone2_auto_point1_temp_hyst.dev_attr.attr,
1738 &sensor_dev_attr_zone2_auto_point1_temp.dev_attr.attr,
1739 &sensor_dev_attr_zone2_auto_point2_temp.dev_attr.attr,
1740 &sensor_dev_attr_zone2_auto_point3_temp.dev_attr.attr,
1741 &sensor_dev_attr_zone3_auto_point1_temp_hyst.dev_attr.attr,
1742 &sensor_dev_attr_zone3_auto_point1_temp.dev_attr.attr,
1743 &sensor_dev_attr_zone3_auto_point2_temp.dev_attr.attr,
1744 &sensor_dev_attr_zone3_auto_point3_temp.dev_attr.attr,
9431996f
JH		 1745 NULL
1746};
1747
73ce48f6
JH		 1748static const struct attribute_group dme1737_misc_chmod_group = {
1749 .attrs = dme1737_misc_chmod_attr,
9431996f
JH		 1750};
1751
1752/* The permissions of the following PWM attributes are changed to read-
1753 * writeable if the chip is *not* locked and the respective PWM is available.
1754 * Otherwise they stay read-only. */
73ce48f6 1755static struct attribute *dme1737_pwm1_chmod_attr[] = {
9b257714
JH		 1756 &sensor_dev_attr_pwm1_freq.dev_attr.attr,
1757 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
1758 &sensor_dev_attr_pwm1_ramp_rate.dev_attr.attr,
1759 &sensor_dev_attr_pwm1_auto_channels_zone.dev_attr.attr,
1760 &sensor_dev_attr_pwm1_auto_pwm_min.dev_attr.attr,
1761 &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
9431996f
JH		 1762 NULL
1763};
73ce48f6 1764static struct attribute *dme1737_pwm2_chmod_attr[] = {
9b257714
JH		 1765 &sensor_dev_attr_pwm2_freq.dev_attr.attr,
1766 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
1767 &sensor_dev_attr_pwm2_ramp_rate.dev_attr.attr,
1768 &sensor_dev_attr_pwm2_auto_channels_zone.dev_attr.attr,
1769 &sensor_dev_attr_pwm2_auto_pwm_min.dev_attr.attr,
1770 &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,
9431996f
JH		 1771 NULL
1772};
73ce48f6 1773static struct attribute *dme1737_pwm3_chmod_attr[] = {
9b257714
JH		 1774 &sensor_dev_attr_pwm3_freq.dev_attr.attr,
1775 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
1776 &sensor_dev_attr_pwm3_ramp_rate.dev_attr.attr,
1777 &sensor_dev_attr_pwm3_auto_channels_zone.dev_attr.attr,
1778 &sensor_dev_attr_pwm3_auto_pwm_min.dev_attr.attr,
1779 &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,
9431996f
JH		 1780 NULL
1781};
73ce48f6 1782static struct attribute *dme1737_pwm5_chmod_attr[] = {
9b257714
JH		 1783 &sensor_dev_attr_pwm5.dev_attr.attr,
1784 &sensor_dev_attr_pwm5_freq.dev_attr.attr,
9431996f
JH		 1785 NULL
1786};
73ce48f6 1787static struct attribute *dme1737_pwm6_chmod_attr[] = {
9b257714
JH		 1788 &sensor_dev_attr_pwm6.dev_attr.attr,
1789 &sensor_dev_attr_pwm6_freq.dev_attr.attr,
9431996f
JH		 1790 NULL
1791};
1792
73ce48f6
JH		 1793static const struct attribute_group dme1737_pwm_chmod_group[] = {
1794 { .attrs = dme1737_pwm1_chmod_attr },
1795 { .attrs = dme1737_pwm2_chmod_attr },
1796 { .attrs = dme1737_pwm3_chmod_attr },
9431996f 1797 { .attrs = NULL },
73ce48f6
JH		 1798 { .attrs = dme1737_pwm5_chmod_attr },
1799 { .attrs = dme1737_pwm6_chmod_attr },
9431996f
JH		 1800};
1801
1802/* Pwm[1-3] are read-writeable if the associated pwm is in manual mode and the
1803 * chip is not locked. Otherwise they are read-only. */
73ce48f6 1804static struct attribute *dme1737_pwm_chmod_attr[] = {
9431996f
JH		 1805 &sensor_dev_attr_pwm1.dev_attr.attr,
1806 &sensor_dev_attr_pwm2.dev_attr.attr,
1807 &sensor_dev_attr_pwm3.dev_attr.attr,
1808};
1809
1810/* ---------------------------------------------------------------------
1811 * Super-IO functions
1812 * --------------------------------------------------------------------- */
1813
b237eb25
JH		 1814static inline void dme1737_sio_enter(int sio_cip)
1815{
1816 outb(0x55, sio_cip);
1817}
1818
1819static inline void dme1737_sio_exit(int sio_cip)
1820{
1821 outb(0xaa, sio_cip);
1822}
1823
9431996f
JH		 1824static inline int dme1737_sio_inb(int sio_cip, int reg)
1825{
1826 outb(reg, sio_cip);
1827 return inb(sio_cip + 1);
1828}
1829
1830static inline void dme1737_sio_outb(int sio_cip, int reg, int val)
1831{
1832 outb(reg, sio_cip);
1833 outb(val, sio_cip + 1);
1834}
1835
9431996f 1836/* ---------------------------------------------------------------------
e95c237d 1837 * Device initialization
9431996f
JH		 1838 * --------------------------------------------------------------------- */
1839
67e2f328 1840static int dme1737_i2c_get_features(int, struct dme1737_data*);
9431996f 1841
b237eb25 1842static void dme1737_chmod_file(struct device *dev,
9431996f
JH		 1843 struct attribute *attr, mode_t mode)
1844{
b237eb25
JH		 1845 if (sysfs_chmod_file(&dev->kobj, attr, mode)) {
1846 dev_warn(dev, "Failed to change permissions of %s.\n",
9431996f
JH		 1847 attr->name);
1848 }
1849}
1850
b237eb25 1851static void dme1737_chmod_group(struct device *dev,
9431996f
JH		 1852 const struct attribute_group *group,
1853 mode_t mode)
1854{
1855 struct attribute **attr;
1856
1857 for (attr = group->attrs; *attr; attr++) {
b237eb25 1858 dme1737_chmod_file(dev, *attr, mode);
9431996f
JH		 1859 }
1860}
1861
b237eb25 1862static void dme1737_remove_files(struct device *dev)
9431996f 1863{
b237eb25
JH		 1864 struct dme1737_data *data = dev_get_drvdata(dev);
1865 int ix;
1866
1867 for (ix = 0; ix < ARRAY_SIZE(dme1737_fan_group); ix++) {
1868 if (data->has_fan & (1 << ix)) {
1869 sysfs_remove_group(&dev->kobj,
1870 &dme1737_fan_group[ix]);
1871 }
1872 }
1873
1874 for (ix = 0; ix < ARRAY_SIZE(dme1737_pwm_group); ix++) {
1875 if (data->has_pwm & (1 << ix)) {
1876 sysfs_remove_group(&dev->kobj,
1877 &dme1737_pwm_group[ix]);
1878 }
1879 }
1880
1881 sysfs_remove_group(&dev->kobj, &dme1737_group);
e95c237d
JH		 1882
1883 if (!data->client.driver) {
1884 sysfs_remove_file(&dev->kobj, &dev_attr_name.attr);
1885 }
b237eb25
JH		 1886}
1887
1888static int dme1737_create_files(struct device *dev)
1889{
1890 struct dme1737_data *data = dev_get_drvdata(dev);
1891 int err, ix;
1892
e95c237d
JH		 1893 /* Create a name attribute for ISA devices */
1894 if (!data->client.driver &&
1895 (err = sysfs_create_file(&dev->kobj, &dev_attr_name.attr))) {
1896 goto exit;
1897 }
1898
b237eb25
JH		 1899 /* Create standard sysfs attributes */
1900 if ((err = sysfs_create_group(&dev->kobj, &dme1737_group))) {
e95c237d 1901 goto exit_remove;
b237eb25
JH		 1902 }
1903
1904 /* Create fan sysfs attributes */
1905 for (ix = 0; ix < ARRAY_SIZE(dme1737_fan_group); ix++) {
1906 if (data->has_fan & (1 << ix)) {
1907 if ((err = sysfs_create_group(&dev->kobj,
1908 &dme1737_fan_group[ix]))) {
1909 goto exit_remove;
1910 }
1911 }
1912 }
1913
1914 /* Create PWM sysfs attributes */
1915 for (ix = 0; ix < ARRAY_SIZE(dme1737_pwm_group); ix++) {
1916 if (data->has_pwm & (1 << ix)) {
1917 if ((err = sysfs_create_group(&dev->kobj,
1918 &dme1737_pwm_group[ix]))) {
1919 goto exit_remove;
1920 }
1921 }
1922 }
1923
1924 /* Inform if the device is locked. Otherwise change the permissions of
1925 * selected attributes from read-only to read-writeable. */
1926 if (data->config & 0x02) {
1927 dev_info(dev, "Device is locked. Some attributes "
1928 "will be read-only.\n");
1929 } else {
73ce48f6
JH		 1930 /* Change permissions of standard sysfs attributes */
1931 dme1737_chmod_group(dev, &dme1737_misc_chmod_group,
b237eb25
JH		 1932 S_IRUGO | S_IWUSR);
1933
73ce48f6
JH		 1934 /* Change permissions of PWM sysfs attributes */
1935 for (ix = 0; ix < ARRAY_SIZE(dme1737_pwm_chmod_group); ix++) {
b237eb25
JH		 1936 if (data->has_pwm & (1 << ix)) {
1937 dme1737_chmod_group(dev,
73ce48f6 1938 &dme1737_pwm_chmod_group[ix],
b237eb25
JH		 1939 S_IRUGO | S_IWUSR);
1940 }
1941 }
1942
1943 /* Change permissions of pwm[1-3] if in manual mode */
1944 for (ix = 0; ix < 3; ix++) {
1945 if ((data->has_pwm & (1 << ix)) &&
1946 (PWM_EN_FROM_REG(data->pwm_config[ix]) == 1)) {
1947 dme1737_chmod_file(dev,
73ce48f6 1948 dme1737_pwm_chmod_attr[ix],
b237eb25
JH		 1949 S_IRUGO | S_IWUSR);
1950 }
1951 }
1952 }
1953
1954 return 0;
1955
1956exit_remove:
1957 dme1737_remove_files(dev);
1958exit:
1959 return err;
1960}
1961
1962static int dme1737_init_device(struct device *dev)
1963{
1964 struct dme1737_data *data = dev_get_drvdata(dev);
1965 struct i2c_client *client = &data->client;
9431996f
JH		 1966 int ix;
1967 u8 reg;
1968
b237eb25
JH		 1969 data->config = dme1737_read(client, DME1737_REG_CONFIG);
1970 /* Inform if part is not monitoring/started */
1971 if (!(data->config & 0x01)) {
1972 if (!force_start) {
1973 dev_err(dev, "Device is not monitoring. "
1974 "Use the force_start load parameter to "
1975 "override.\n");
1976 return -EFAULT;
1977 }
1978
1979 /* Force monitoring */
1980 data->config |= 0x01;
1981 dme1737_write(client, DME1737_REG_CONFIG, data->config);
1982 }
9431996f
JH		 1983 /* Inform if part is not ready */
1984 if (!(data->config & 0x04)) {
b237eb25 1985 dev_err(dev, "Device is not ready.\n");
9431996f
JH		 1986 return -EFAULT;
1987 }
1988
e95c237d
JH		 1989 /* Determine which optional fan and pwm features are enabled/present */
1990 if (client->driver) { /* I2C chip */
1991 data->config2 = dme1737_read(client, DME1737_REG_CONFIG2);
1992 /* Check if optional fan3 input is enabled */
1993 if (data->config2 & 0x04) {
1994 data->has_fan |= (1 << 2);
1995 }
9431996f 1996
e95c237d
JH		 1997 /* Fan4 and pwm3 are only available if the client's I2C address
1998 * is the default 0x2e. Otherwise the I/Os associated with
1999 * these functions are used for addr enable/select. */
2000 if (data->client.addr == 0x2e) {
2001 data->has_fan |= (1 << 3);
2002 data->has_pwm |= (1 << 2);
2003 }
9431996f 2004
e95c237d
JH		 2005 /* Determine which of the optional fan[5-6] and pwm[5-6]
2006 * features are enabled. For this, we need to query the runtime
2007 * registers through the Super-IO LPC interface. Try both
2008 * config ports 0x2e and 0x4e. */
2009 if (dme1737_i2c_get_features(0x2e, data) &&
2010 dme1737_i2c_get_features(0x4e, data)) {
2011 dev_warn(dev, "Failed to query Super-IO for optional "
2012 "features.\n");
2013 }
2014 } else { /* ISA chip */
2015 /* Fan3 and pwm3 are always available. Fan[4-5] and pwm[5-6]
2016 * don't exist in the ISA chip. */
2017 data->has_fan |= (1 << 2);
2018 data->has_pwm |= (1 << 2);
9431996f
JH		 2019 }
2020
2021 /* Fan1, fan2, pwm1, and pwm2 are always present */
2022 data->has_fan |= 0x03;
2023 data->has_pwm |= 0x03;
2024
b237eb25 2025 dev_info(dev, "Optional features: pwm3=%s, pwm5=%s, pwm6=%s, "
9431996f
JH		 2026 "fan3=%s, fan4=%s, fan5=%s, fan6=%s.\n",
2027 (data->has_pwm & (1 << 2)) ? "yes" : "no",
2028 (data->has_pwm & (1 << 4)) ? "yes" : "no",
2029 (data->has_pwm & (1 << 5)) ? "yes" : "no",
2030 (data->has_fan & (1 << 2)) ? "yes" : "no",
2031 (data->has_fan & (1 << 3)) ? "yes" : "no",
2032 (data->has_fan & (1 << 4)) ? "yes" : "no",
2033 (data->has_fan & (1 << 5)) ? "yes" : "no");
2034
2035 reg = dme1737_read(client, DME1737_REG_TACH_PWM);
2036 /* Inform if fan-to-pwm mapping differs from the default */
e95c237d 2037 if (client->driver && reg != 0xa4) { /* I2C chip */
b237eb25 2038 dev_warn(dev, "Non-standard fan to pwm mapping: "
9431996f
JH		 2039 "fan1->pwm%d, fan2->pwm%d, fan3->pwm%d, "
2040 "fan4->pwm%d. Please report to the driver "
2041 "maintainer.\n",
2042 (reg & 0x03) + 1, ((reg >> 2) & 0x03) + 1,
2043 ((reg >> 4) & 0x03) + 1, ((reg >> 6) & 0x03) + 1);
e95c237d
JH		 2044 } else if (!client->driver && reg != 0x24) { /* ISA chip */
2045 dev_warn(dev, "Non-standard fan to pwm mapping: "
2046 "fan1->pwm%d, fan2->pwm%d, fan3->pwm%d. "
2047 "Please report to the driver maintainer.\n",
2048 (reg & 0x03) + 1, ((reg >> 2) & 0x03) + 1,
2049 ((reg >> 4) & 0x03) + 1);
9431996f
JH		 2050 }
2051
2052 /* Switch pwm[1-3] to manual mode if they are currently disabled and
2053 * set the duty-cycles to 0% (which is identical to the PWMs being
2054 * disabled). */
2055 if (!(data->config & 0x02)) {
2056 for (ix = 0; ix < 3; ix++) {
2057 data->pwm_config[ix] = dme1737_read(client,
2058 DME1737_REG_PWM_CONFIG(ix));
2059 if ((data->has_pwm & (1 << ix)) &&
2060 (PWM_EN_FROM_REG(data->pwm_config[ix]) == -1)) {
b237eb25 2061 dev_info(dev, "Switching pwm%d to "
9431996f
JH		 2062 "manual mode.\n", ix + 1);
2063 data->pwm_config[ix] = PWM_EN_TO_REG(1,
2064 data->pwm_config[ix]);
2065 dme1737_write(client, DME1737_REG_PWM(ix), 0);
2066 dme1737_write(client,
2067 DME1737_REG_PWM_CONFIG(ix),
2068 data->pwm_config[ix]);
2069 }
2070 }
2071 }
2072
2073 /* Initialize the default PWM auto channels zone (acz) assignments */
2074 data->pwm_acz[0] = 1; /* pwm1 -> zone1 */
2075 data->pwm_acz[1] = 2; /* pwm2 -> zone2 */
2076 data->pwm_acz[2] = 4; /* pwm3 -> zone3 */
2077
2078 /* Set VRM */
2079 data->vrm = vid_which_vrm();
2080
2081 return 0;
2082}
2083
67e2f328
JH		 2084/* ---------------------------------------------------------------------
2085 * I2C device detection and registration
2086 * --------------------------------------------------------------------- */
2087
2088static struct i2c_driver dme1737_i2c_driver;
2089
2090static int dme1737_i2c_get_features(int sio_cip, struct dme1737_data *data)
2091{
2092 int err = 0, reg;
2093 u16 addr;
2094
2095 dme1737_sio_enter(sio_cip);
2096
2097 /* Check device ID
2098 * The DME1737 can return either 0x78 or 0x77 as its device ID. */
345a2224 2099 reg = force_id ? force_id : dme1737_sio_inb(sio_cip, 0x20);
67e2f328
JH		 2100 if (!(reg == 0x77 || reg == 0x78)) {
2101 err = -ENODEV;
2102 goto exit;
2103 }
2104
2105 /* Select logical device A (runtime registers) */
2106 dme1737_sio_outb(sio_cip, 0x07, 0x0a);
2107
2108 /* Get the base address of the runtime registers */
2109 if (!(addr = (dme1737_sio_inb(sio_cip, 0x60) << 8) |
2110 dme1737_sio_inb(sio_cip, 0x61))) {
2111 err = -ENODEV;
2112 goto exit;
2113 }
2114
2115 /* Read the runtime registers to determine which optional features
2116 * are enabled and available. Bits [3:2] of registers 0x43-0x46 are set
2117 * to '10' if the respective feature is enabled. */
2118 if ((inb(addr + 0x43) & 0x0c) == 0x08) { /* fan6 */
2119 data->has_fan |= (1 << 5);
2120 }
2121 if ((inb(addr + 0x44) & 0x0c) == 0x08) { /* pwm6 */
2122 data->has_pwm |= (1 << 5);
2123 }
2124 if ((inb(addr + 0x45) & 0x0c) == 0x08) { /* fan5 */
2125 data->has_fan |= (1 << 4);
2126 }
2127 if ((inb(addr + 0x46) & 0x0c) == 0x08) { /* pwm5 */
2128 data->has_pwm |= (1 << 4);
2129 }
2130
2131exit:
2132 dme1737_sio_exit(sio_cip);
2133
2134 return err;
2135}
2136
b237eb25
JH		 2137static int dme1737_i2c_detect(struct i2c_adapter *adapter, int address,
2138 int kind)
9431996f
JH		 2139{
2140 u8 company, verstep = 0;
2141 struct i2c_client *client;
2142 struct dme1737_data *data;
b237eb25
JH		 2143 struct device *dev;
2144 int err = 0;
9431996f
JH		 2145 const char *name;
2146
2147 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
2148 goto exit;
2149 }
2150
2151 if (!(data = kzalloc(sizeof(struct dme1737_data), GFP_KERNEL))) {
2152 err = -ENOMEM;
2153 goto exit;
2154 }
2155
2156 client = &data->client;
2157 i2c_set_clientdata(client, data);
2158 client->addr = address;
2159 client->adapter = adapter;
b237eb25
JH		 2160 client->driver = &dme1737_i2c_driver;
2161 dev = &client->dev;
9431996f
JH		 2162
2163 /* A negative kind means that the driver was loaded with no force
2164 * parameter (default), so we must identify the chip. */
2165 if (kind < 0) {
2166 company = dme1737_read(client, DME1737_REG_COMPANY);
2167 verstep = dme1737_read(client, DME1737_REG_VERSTEP);
2168
2169 if (!((company == DME1737_COMPANY_SMSC) &&
2170 ((verstep & DME1737_VERSTEP_MASK) == DME1737_VERSTEP))) {
2171 err = -ENODEV;
2172 goto exit_kfree;
2173 }
2174 }
2175
2176 kind = dme1737;
2177 name = "dme1737";
f994fb23 2178 data->type = kind;
9431996f
JH		 2179
2180 /* Fill in the remaining client fields and put it into the global
2181 * list */
2182 strlcpy(client->name, name, I2C_NAME_SIZE);
2183 mutex_init(&data->update_lock);
2184
2185 /* Tell the I2C layer a new client has arrived */
2186 if ((err = i2c_attach_client(client))) {
2187 goto exit_kfree;
2188 }
2189
b237eb25
JH		 2190 dev_info(dev, "Found a DME1737 chip at 0x%02x (rev 0x%02x).\n",
2191 client->addr, verstep);
2192
9431996f 2193 /* Initialize the DME1737 chip */
b237eb25
JH		 2194 if ((err = dme1737_init_device(dev))) {
2195 dev_err(dev, "Failed to initialize device.\n");
9431996f
JH		 2196 goto exit_detach;
2197 }
2198
b237eb25
JH		 2199 /* Create sysfs files */
2200 if ((err = dme1737_create_files(dev))) {
2201 dev_err(dev, "Failed to create sysfs files.\n");
2202 goto exit_detach;
9431996f
JH		 2203 }
2204
2205 /* Register device */
62ee3e10 2206 data->hwmon_dev = hwmon_device_register(dev);
1beeffe4 2207 if (IS_ERR(data->hwmon_dev)) {
b237eb25 2208 dev_err(dev, "Failed to register device.\n");
1beeffe4 2209 err = PTR_ERR(data->hwmon_dev);
9431996f
JH		 2210 goto exit_remove;
2211 }
2212
9431996f
JH		 2213 return 0;
2214
2215exit_remove:
b237eb25 2216 dme1737_remove_files(dev);
9431996f
JH		 2217exit_detach:
2218 i2c_detach_client(client);
2219exit_kfree:
2220 kfree(data);
2221exit:
2222 return err;
2223}
2224
b237eb25 2225static int dme1737_i2c_attach_adapter(struct i2c_adapter *adapter)
9431996f
JH		 2226{
2227 if (!(adapter->class & I2C_CLASS_HWMON)) {
2228 return 0;
2229 }
2230
b237eb25 2231 return i2c_probe(adapter, &addr_data, dme1737_i2c_detect);
9431996f
JH		 2232}
2233
b237eb25 2234static int dme1737_i2c_detach_client(struct i2c_client *client)
9431996f
JH		 2235{
2236 struct dme1737_data *data = i2c_get_clientdata(client);
b237eb25 2237 int err;
9431996f 2238
1beeffe4 2239 hwmon_device_unregister(data->hwmon_dev);
b237eb25 2240 dme1737_remove_files(&client->dev);
9431996f
JH		 2241
2242 if ((err = i2c_detach_client(client))) {
2243 return err;
2244 }
2245
2246 kfree(data);
2247 return 0;
2248}
2249
b237eb25 2250static struct i2c_driver dme1737_i2c_driver = {
9431996f
JH		 2251 .driver = {
2252 .name = "dme1737",
2253 },
b237eb25
JH		 2254 .attach_adapter = dme1737_i2c_attach_adapter,
2255 .detach_client = dme1737_i2c_detach_client,
9431996f
JH		 2256};
2257
e95c237d
JH		 2258/* ---------------------------------------------------------------------
2259 * ISA device detection and registration
2260 * --------------------------------------------------------------------- */
2261
2262static int __init dme1737_isa_detect(int sio_cip, unsigned short *addr)
2263{
2264 int err = 0, reg;
2265 unsigned short base_addr;
2266
2267 dme1737_sio_enter(sio_cip);
2268
2269 /* Check device ID
2270 * We currently know about SCH3112 (0x7c), SCH3114 (0x7d), and
2271 * SCH3116 (0x7f). */
67b671bc 2272 reg = force_id ? force_id : dme1737_sio_inb(sio_cip, 0x20);
e95c237d
JH		 2273 if (!(reg == 0x7c || reg == 0x7d || reg == 0x7f)) {
2274 err = -ENODEV;
2275 goto exit;
2276 }
2277
2278 /* Select logical device A (runtime registers) */
2279 dme1737_sio_outb(sio_cip, 0x07, 0x0a);
2280
2281 /* Get the base address of the runtime registers */
2282 if (!(base_addr = (dme1737_sio_inb(sio_cip, 0x60) << 8) |
2283 dme1737_sio_inb(sio_cip, 0x61))) {
2284 printk(KERN_ERR "dme1737: Base address not set.\n");
2285 err = -ENODEV;
2286 goto exit;
2287 }
2288
2289 /* Access to the hwmon registers is through an index/data register
2290 * pair located at offset 0x70/0x71. */
2291 *addr = base_addr + 0x70;
2292
2293exit:
2294 dme1737_sio_exit(sio_cip);
2295 return err;
2296}
2297
2298static int __init dme1737_isa_device_add(unsigned short addr)
2299{
2300 struct resource res = {
2301 .start = addr,
2302 .end = addr + DME1737_EXTENT - 1,
2303 .name = "dme1737",
2304 .flags = IORESOURCE_IO,
2305 };
2306 int err;
2307
2308 if (!(pdev = platform_device_alloc("dme1737", addr))) {
2309 printk(KERN_ERR "dme1737: Failed to allocate device.\n");
2310 err = -ENOMEM;
2311 goto exit;
2312 }
2313
2314 if ((err = platform_device_add_resources(pdev, &res, 1))) {
2315 printk(KERN_ERR "dme1737: Failed to add device resource "
2316 "(err = %d).\n", err);
2317 goto exit_device_put;
2318 }
2319
2320 if ((err = platform_device_add(pdev))) {
2321 printk(KERN_ERR "dme1737: Failed to add device (err = %d).\n",
2322 err);
2323 goto exit_device_put;
2324 }
2325
2326 return 0;
2327
2328exit_device_put:
2329 platform_device_put(pdev);
2330 pdev = NULL;
2331exit:
2332 return err;
2333}
2334
2335static int __devinit dme1737_isa_probe(struct platform_device *pdev)
2336{
2337 u8 company, device;
2338 struct resource *res;
2339 struct i2c_client *client;
2340 struct dme1737_data *data;
2341 struct device *dev = &pdev->dev;
2342 int err;
2343
2344 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
2345 if (!request_region(res->start, DME1737_EXTENT, "dme1737")) {
2346 dev_err(dev, "Failed to request region 0x%04x-0x%04x.\n",
2347 (unsigned short)res->start,
2348 (unsigned short)res->start + DME1737_EXTENT - 1);
2349 err = -EBUSY;
2350 goto exit;
2351 }
2352
2353 if (!(data = kzalloc(sizeof(struct dme1737_data), GFP_KERNEL))) {
2354 err = -ENOMEM;
2355 goto exit_release_region;
2356 }
2357
2358 client = &data->client;
2359 i2c_set_clientdata(client, data);
2360 client->addr = res->start;
2361 platform_set_drvdata(pdev, data);
2362
55d68d75
JH		 2363 /* Skip chip detection if module is loaded with force_id parameter */
2364 if (!force_id) {
2365 company = dme1737_read(client, DME1737_REG_COMPANY);
2366 device = dme1737_read(client, DME1737_REG_DEVICE);
e95c237d 2367
55d68d75
JH		 2368 if (!((company == DME1737_COMPANY_SMSC) &&
2369 (device == SCH311X_DEVICE))) {
2370 err = -ENODEV;
2371 goto exit_kfree;
2372 }
e95c237d 2373 }
f994fb23 2374 data->type = -1;
e95c237d
JH		 2375
2376 /* Fill in the remaining client fields and initialize the mutex */
2377 strlcpy(client->name, "sch311x", I2C_NAME_SIZE);
2378 mutex_init(&data->update_lock);
2379
2380 dev_info(dev, "Found a SCH311x chip at 0x%04x\n", client->addr);
2381
2382 /* Initialize the chip */
2383 if ((err = dme1737_init_device(dev))) {
2384 dev_err(dev, "Failed to initialize device.\n");
2385 goto exit_kfree;
2386 }
2387
2388 /* Create sysfs files */
2389 if ((err = dme1737_create_files(dev))) {
2390 dev_err(dev, "Failed to create sysfs files.\n");
2391 goto exit_kfree;
2392 }
2393
2394 /* Register device */
2395 data->hwmon_dev = hwmon_device_register(dev);
2396 if (IS_ERR(data->hwmon_dev)) {
2397 dev_err(dev, "Failed to register device.\n");
2398 err = PTR_ERR(data->hwmon_dev);
2399 goto exit_remove_files;
2400 }
2401
2402 return 0;
2403
2404exit_remove_files:
2405 dme1737_remove_files(dev);
2406exit_kfree:
2407 platform_set_drvdata(pdev, NULL);
2408 kfree(data);
2409exit_release_region:
2410 release_region(res->start, DME1737_EXTENT);
2411exit:
2412 return err;
2413}
2414
2415static int __devexit dme1737_isa_remove(struct platform_device *pdev)
2416{
2417 struct dme1737_data *data = platform_get_drvdata(pdev);
2418
2419 hwmon_device_unregister(data->hwmon_dev);
2420 dme1737_remove_files(&pdev->dev);
2421 release_region(data->client.addr, DME1737_EXTENT);
2422 platform_set_drvdata(pdev, NULL);
2423 kfree(data);
2424
2425 return 0;
2426}
2427
2428static struct platform_driver dme1737_isa_driver = {
2429 .driver = {
2430 .owner = THIS_MODULE,
2431 .name = "dme1737",
2432 },
2433 .probe = dme1737_isa_probe,
2434 .remove = __devexit_p(dme1737_isa_remove),
2435};
2436
67e2f328
JH		 2437/* ---------------------------------------------------------------------
2438 * Module initialization and cleanup
2439 * --------------------------------------------------------------------- */
2440
9431996f
JH		 2441static int __init dme1737_init(void)
2442{
e95c237d
JH		 2443 int err;
2444 unsigned short addr;
2445
2446 if ((err = i2c_add_driver(&dme1737_i2c_driver))) {
2447 goto exit;
2448 }
2449
2450 if (dme1737_isa_detect(0x2e, &addr) &&
92430b6f
JH		 2451 dme1737_isa_detect(0x4e, &addr) &&
2452 (!probe_all_addr ||
2453 (dme1737_isa_detect(0x162e, &addr) &&
2454 dme1737_isa_detect(0x164e, &addr)))) {
e95c237d
JH		 2455 /* Return 0 if we didn't find an ISA device */
2456 return 0;
2457 }
2458
2459 if ((err = platform_driver_register(&dme1737_isa_driver))) {
2460 goto exit_del_i2c_driver;
2461 }
2462
2463 /* Sets global pdev as a side effect */
2464 if ((err = dme1737_isa_device_add(addr))) {
2465 goto exit_del_isa_driver;
2466 }
2467
2468 return 0;
2469
2470exit_del_isa_driver:
2471 platform_driver_unregister(&dme1737_isa_driver);
2472exit_del_i2c_driver:
2473 i2c_del_driver(&dme1737_i2c_driver);
2474exit:
2475 return err;
9431996f
JH		 2476}
2477
2478static void __exit dme1737_exit(void)
2479{
e95c237d
JH		 2480 if (pdev) {
2481 platform_device_unregister(pdev);
2482 platform_driver_unregister(&dme1737_isa_driver);
2483 }
2484
b237eb25 2485 i2c_del_driver(&dme1737_i2c_driver);
9431996f
JH		 2486}
2487
2488MODULE_AUTHOR("Juerg Haefliger <juergh@gmail.com>");
2489MODULE_DESCRIPTION("DME1737 sensors");
2490MODULE_LICENSE("GPL");
2491
2492module_init(dme1737_init);
2493module_exit(dme1737_exit);
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