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9431996f | 1 | /* |
549edb83 JH |
2 | * dme1737.c - Driver for the SMSC DME1737, Asus A8000, SMSC SCH311x and |
3 | * SCH5027 Super-I/O chips integrated hardware monitoring features. | |
4 | * Copyright (c) 2007, 2008 Juerg Haefliger <juergh@gmail.com> | |
9431996f | 5 | * |
e95c237d | 6 | * This driver is an I2C/ISA hybrid, meaning that it uses the I2C bus to access |
549edb83 JH |
7 | * the chip registers if a DME1737, A8000, or SCH5027 is found and the ISA bus |
8 | * if a SCH311x chip is found. Both types of chips have very similar hardware | |
e95c237d | 9 | * monitoring capabilities but differ in the way they can be accessed. |
9431996f JH |
10 | * |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License as published by | |
13 | * the Free Software Foundation; either version 2 of the License, or | |
14 | * (at your option) any later version. | |
15 | * | |
16 | * This program is distributed in the hope that it will be useful, | |
17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | * GNU General Public License for more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License | |
22 | * along with this program; if not, write to the Free Software | |
23 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
24 | */ | |
25 | ||
26 | #include <linux/module.h> | |
27 | #include <linux/init.h> | |
28 | #include <linux/slab.h> | |
29 | #include <linux/jiffies.h> | |
30 | #include <linux/i2c.h> | |
e95c237d | 31 | #include <linux/platform_device.h> |
9431996f JH |
32 | #include <linux/hwmon.h> |
33 | #include <linux/hwmon-sysfs.h> | |
34 | #include <linux/hwmon-vid.h> | |
35 | #include <linux/err.h> | |
36 | #include <linux/mutex.h> | |
37 | #include <asm/io.h> | |
38 | ||
e95c237d JH |
39 | /* ISA device, if found */ |
40 | static struct platform_device *pdev; | |
41 | ||
9431996f JH |
42 | /* Module load parameters */ |
43 | static int force_start; | |
44 | module_param(force_start, bool, 0); | |
45 | MODULE_PARM_DESC(force_start, "Force the chip to start monitoring inputs"); | |
46 | ||
67b671bc JD |
47 | static unsigned short force_id; |
48 | module_param(force_id, ushort, 0); | |
49 | MODULE_PARM_DESC(force_id, "Override the detected device ID"); | |
50 | ||
92430b6f JH |
51 | static int probe_all_addr; |
52 | module_param(probe_all_addr, bool, 0); | |
53 | MODULE_PARM_DESC(probe_all_addr, "Include probing of non-standard LPC " | |
54 | "addresses"); | |
55 | ||
9431996f | 56 | /* Addresses to scan */ |
25e9c86d | 57 | static const unsigned short normal_i2c[] = {0x2c, 0x2d, 0x2e, I2C_CLIENT_END}; |
9431996f JH |
58 | |
59 | /* Insmod parameters */ | |
549edb83 JH |
60 | I2C_CLIENT_INSMOD_2(dme1737, sch5027); |
61 | ||
62 | /* ISA chip types */ | |
63 | enum isa_chips { sch311x = sch5027 + 1 }; | |
9431996f JH |
64 | |
65 | /* --------------------------------------------------------------------- | |
66 | * Registers | |
67 | * | |
68 | * The sensors are defined as follows: | |
69 | * | |
70 | * Voltages Temperatures | |
71 | * -------- ------------ | |
72 | * in0 +5VTR (+5V stdby) temp1 Remote diode 1 | |
73 | * in1 Vccp (proc core) temp2 Internal temp | |
74 | * in2 VCC (internal +3.3V) temp3 Remote diode 2 | |
75 | * in3 +5V | |
76 | * in4 +12V | |
77 | * in5 VTR (+3.3V stby) | |
78 | * in6 Vbat | |
79 | * | |
80 | * --------------------------------------------------------------------- */ | |
81 | ||
82 | /* Voltages (in) numbered 0-6 (ix) */ | |
83 | #define DME1737_REG_IN(ix) ((ix) < 5 ? 0x20 + (ix) \ | |
84 | : 0x94 + (ix)) | |
85 | #define DME1737_REG_IN_MIN(ix) ((ix) < 5 ? 0x44 + (ix) * 2 \ | |
86 | : 0x91 + (ix) * 2) | |
87 | #define DME1737_REG_IN_MAX(ix) ((ix) < 5 ? 0x45 + (ix) * 2 \ | |
88 | : 0x92 + (ix) * 2) | |
89 | ||
90 | /* Temperatures (temp) numbered 0-2 (ix) */ | |
91 | #define DME1737_REG_TEMP(ix) (0x25 + (ix)) | |
92 | #define DME1737_REG_TEMP_MIN(ix) (0x4e + (ix) * 2) | |
93 | #define DME1737_REG_TEMP_MAX(ix) (0x4f + (ix) * 2) | |
94 | #define DME1737_REG_TEMP_OFFSET(ix) ((ix) == 0 ? 0x1f \ | |
95 | : 0x1c + (ix)) | |
96 | ||
97 | /* Voltage and temperature LSBs | |
98 | * The LSBs (4 bits each) are stored in 5 registers with the following layouts: | |
99 | * IN_TEMP_LSB(0) = [in5, in6] | |
100 | * IN_TEMP_LSB(1) = [temp3, temp1] | |
101 | * IN_TEMP_LSB(2) = [in4, temp2] | |
102 | * IN_TEMP_LSB(3) = [in3, in0] | |
103 | * IN_TEMP_LSB(4) = [in2, in1] */ | |
104 | #define DME1737_REG_IN_TEMP_LSB(ix) (0x84 + (ix)) | |
105 | static const u8 DME1737_REG_IN_LSB[] = {3, 4, 4, 3, 2, 0, 0}; | |
106 | static const u8 DME1737_REG_IN_LSB_SHL[] = {4, 4, 0, 0, 0, 0, 4}; | |
107 | static const u8 DME1737_REG_TEMP_LSB[] = {1, 2, 1}; | |
108 | static const u8 DME1737_REG_TEMP_LSB_SHL[] = {4, 4, 0}; | |
109 | ||
110 | /* Fans numbered 0-5 (ix) */ | |
111 | #define DME1737_REG_FAN(ix) ((ix) < 4 ? 0x28 + (ix) * 2 \ | |
112 | : 0xa1 + (ix) * 2) | |
113 | #define DME1737_REG_FAN_MIN(ix) ((ix) < 4 ? 0x54 + (ix) * 2 \ | |
114 | : 0xa5 + (ix) * 2) | |
115 | #define DME1737_REG_FAN_OPT(ix) ((ix) < 4 ? 0x90 + (ix) \ | |
116 | : 0xb2 + (ix)) | |
117 | #define DME1737_REG_FAN_MAX(ix) (0xb4 + (ix)) /* only for fan[4-5] */ | |
118 | ||
119 | /* PWMs numbered 0-2, 4-5 (ix) */ | |
120 | #define DME1737_REG_PWM(ix) ((ix) < 3 ? 0x30 + (ix) \ | |
121 | : 0xa1 + (ix)) | |
122 | #define DME1737_REG_PWM_CONFIG(ix) (0x5c + (ix)) /* only for pwm[0-2] */ | |
123 | #define DME1737_REG_PWM_MIN(ix) (0x64 + (ix)) /* only for pwm[0-2] */ | |
124 | #define DME1737_REG_PWM_FREQ(ix) ((ix) < 3 ? 0x5f + (ix) \ | |
125 | : 0xa3 + (ix)) | |
126 | /* The layout of the ramp rate registers is different from the other pwm | |
127 | * registers. The bits for the 3 PWMs are stored in 2 registers: | |
128 | * PWM_RR(0) = [OFF3, OFF2, OFF1, RES, RR1E, RR1-2, RR1-1, RR1-0] | |
129 | * PWM_RR(1) = [RR2E, RR2-2, RR2-1, RR2-0, RR3E, RR3-2, RR3-1, RR3-0] */ | |
130 | #define DME1737_REG_PWM_RR(ix) (0x62 + (ix)) /* only for pwm[0-2] */ | |
131 | ||
132 | /* Thermal zones 0-2 */ | |
133 | #define DME1737_REG_ZONE_LOW(ix) (0x67 + (ix)) | |
134 | #define DME1737_REG_ZONE_ABS(ix) (0x6a + (ix)) | |
135 | /* The layout of the hysteresis registers is different from the other zone | |
136 | * registers. The bits for the 3 zones are stored in 2 registers: | |
137 | * ZONE_HYST(0) = [H1-3, H1-2, H1-1, H1-0, H2-3, H2-2, H2-1, H2-0] | |
138 | * ZONE_HYST(1) = [H3-3, H3-2, H3-1, H3-0, RES, RES, RES, RES] */ | |
139 | #define DME1737_REG_ZONE_HYST(ix) (0x6d + (ix)) | |
140 | ||
141 | /* Alarm registers and bit mapping | |
142 | * The 3 8-bit alarm registers will be concatenated to a single 32-bit | |
143 | * alarm value [0, ALARM3, ALARM2, ALARM1]. */ | |
144 | #define DME1737_REG_ALARM1 0x41 | |
145 | #define DME1737_REG_ALARM2 0x42 | |
146 | #define DME1737_REG_ALARM3 0x83 | |
147 | static const u8 DME1737_BIT_ALARM_IN[] = {0, 1, 2, 3, 8, 16, 17}; | |
148 | static const u8 DME1737_BIT_ALARM_TEMP[] = {4, 5, 6}; | |
149 | static const u8 DME1737_BIT_ALARM_FAN[] = {10, 11, 12, 13, 22, 23}; | |
150 | ||
151 | /* Miscellaneous registers */ | |
e95c237d | 152 | #define DME1737_REG_DEVICE 0x3d |
9431996f JH |
153 | #define DME1737_REG_COMPANY 0x3e |
154 | #define DME1737_REG_VERSTEP 0x3f | |
155 | #define DME1737_REG_CONFIG 0x40 | |
156 | #define DME1737_REG_CONFIG2 0x7f | |
157 | #define DME1737_REG_VID 0x43 | |
158 | #define DME1737_REG_TACH_PWM 0x81 | |
159 | ||
160 | /* --------------------------------------------------------------------- | |
161 | * Misc defines | |
162 | * --------------------------------------------------------------------- */ | |
163 | ||
164 | /* Chip identification */ | |
165 | #define DME1737_COMPANY_SMSC 0x5c | |
166 | #define DME1737_VERSTEP 0x88 | |
167 | #define DME1737_VERSTEP_MASK 0xf8 | |
e95c237d | 168 | #define SCH311X_DEVICE 0x8c |
549edb83 | 169 | #define SCH5027_VERSTEP 0x69 |
e95c237d JH |
170 | |
171 | /* Length of ISA address segment */ | |
172 | #define DME1737_EXTENT 2 | |
9431996f JH |
173 | |
174 | /* --------------------------------------------------------------------- | |
175 | * Data structures and manipulation thereof | |
176 | * --------------------------------------------------------------------- */ | |
177 | ||
178 | struct dme1737_data { | |
dbc2bc25 JD |
179 | struct i2c_client _client; /* will go away soon */ |
180 | struct i2c_client *client; /* for I2C devices only */ | |
1beeffe4 | 181 | struct device *hwmon_dev; |
dbc2bc25 JD |
182 | const char *name; |
183 | unsigned int addr; /* for ISA devices only */ | |
9431996f JH |
184 | |
185 | struct mutex update_lock; | |
186 | int valid; /* !=0 if following fields are valid */ | |
187 | unsigned long last_update; /* in jiffies */ | |
188 | unsigned long last_vbat; /* in jiffies */ | |
f994fb23 | 189 | enum chips type; |
549edb83 | 190 | const int *in_nominal; /* pointer to IN_NOMINAL array */ |
9431996f JH |
191 | |
192 | u8 vid; | |
193 | u8 pwm_rr_en; | |
194 | u8 has_pwm; | |
195 | u8 has_fan; | |
196 | ||
197 | /* Register values */ | |
198 | u16 in[7]; | |
199 | u8 in_min[7]; | |
200 | u8 in_max[7]; | |
201 | s16 temp[3]; | |
202 | s8 temp_min[3]; | |
203 | s8 temp_max[3]; | |
204 | s8 temp_offset[3]; | |
205 | u8 config; | |
206 | u8 config2; | |
207 | u8 vrm; | |
208 | u16 fan[6]; | |
209 | u16 fan_min[6]; | |
210 | u8 fan_max[2]; | |
211 | u8 fan_opt[6]; | |
212 | u8 pwm[6]; | |
213 | u8 pwm_min[3]; | |
214 | u8 pwm_config[3]; | |
215 | u8 pwm_acz[3]; | |
216 | u8 pwm_freq[6]; | |
217 | u8 pwm_rr[2]; | |
218 | u8 zone_low[3]; | |
219 | u8 zone_abs[3]; | |
220 | u8 zone_hyst[2]; | |
221 | u32 alarms; | |
222 | }; | |
223 | ||
224 | /* Nominal voltage values */ | |
f994fb23 JH |
225 | static const int IN_NOMINAL_DME1737[] = {5000, 2250, 3300, 5000, 12000, 3300, |
226 | 3300}; | |
227 | static const int IN_NOMINAL_SCH311x[] = {2500, 1500, 3300, 5000, 12000, 3300, | |
228 | 3300}; | |
549edb83 JH |
229 | static const int IN_NOMINAL_SCH5027[] = {5000, 2250, 3300, 1125, 1125, 3300, |
230 | 3300}; | |
231 | #define IN_NOMINAL(type) ((type) == sch311x ? IN_NOMINAL_SCH311x : \ | |
232 | (type) == sch5027 ? IN_NOMINAL_SCH5027 : \ | |
233 | IN_NOMINAL_DME1737) | |
9431996f JH |
234 | |
235 | /* Voltage input | |
236 | * Voltage inputs have 16 bits resolution, limit values have 8 bits | |
237 | * resolution. */ | |
549edb83 | 238 | static inline int IN_FROM_REG(int reg, int nominal, int res) |
9431996f | 239 | { |
549edb83 | 240 | return (reg * nominal + (3 << (res - 3))) / (3 << (res - 2)); |
9431996f JH |
241 | } |
242 | ||
549edb83 | 243 | static inline int IN_TO_REG(int val, int nominal) |
9431996f | 244 | { |
549edb83 | 245 | return SENSORS_LIMIT((val * 192 + nominal / 2) / nominal, 0, 255); |
9431996f JH |
246 | } |
247 | ||
248 | /* Temperature input | |
249 | * The register values represent temperatures in 2's complement notation from | |
250 | * -127 degrees C to +127 degrees C. Temp inputs have 16 bits resolution, limit | |
251 | * values have 8 bits resolution. */ | |
252 | static inline int TEMP_FROM_REG(int reg, int res) | |
253 | { | |
254 | return (reg * 1000) >> (res - 8); | |
255 | } | |
256 | ||
257 | static inline int TEMP_TO_REG(int val) | |
258 | { | |
259 | return SENSORS_LIMIT((val < 0 ? val - 500 : val + 500) / 1000, | |
260 | -128, 127); | |
261 | } | |
262 | ||
263 | /* Temperature range */ | |
264 | static const int TEMP_RANGE[] = {2000, 2500, 3333, 4000, 5000, 6666, 8000, | |
265 | 10000, 13333, 16000, 20000, 26666, 32000, | |
266 | 40000, 53333, 80000}; | |
267 | ||
268 | static inline int TEMP_RANGE_FROM_REG(int reg) | |
269 | { | |
270 | return TEMP_RANGE[(reg >> 4) & 0x0f]; | |
271 | } | |
272 | ||
273 | static int TEMP_RANGE_TO_REG(int val, int reg) | |
274 | { | |
275 | int i; | |
276 | ||
277 | for (i = 15; i > 0; i--) { | |
278 | if (val > (TEMP_RANGE[i] + TEMP_RANGE[i - 1] + 1) / 2) { | |
279 | break; | |
280 | } | |
281 | } | |
282 | ||
283 | return (reg & 0x0f) | (i << 4); | |
284 | } | |
285 | ||
286 | /* Temperature hysteresis | |
287 | * Register layout: | |
288 | * reg[0] = [H1-3, H1-2, H1-1, H1-0, H2-3, H2-2, H2-1, H2-0] | |
289 | * reg[1] = [H3-3, H3-2, H3-1, H3-0, xxxx, xxxx, xxxx, xxxx] */ | |
290 | static inline int TEMP_HYST_FROM_REG(int reg, int ix) | |
291 | { | |
292 | return (((ix == 1) ? reg : reg >> 4) & 0x0f) * 1000; | |
293 | } | |
294 | ||
295 | static inline int TEMP_HYST_TO_REG(int val, int ix, int reg) | |
296 | { | |
297 | int hyst = SENSORS_LIMIT((val + 500) / 1000, 0, 15); | |
298 | ||
299 | return (ix == 1) ? (reg & 0xf0) | hyst : (reg & 0x0f) | (hyst << 4); | |
300 | } | |
301 | ||
302 | /* Fan input RPM */ | |
303 | static inline int FAN_FROM_REG(int reg, int tpc) | |
304 | { | |
ff8421f7 JH |
305 | if (tpc) { |
306 | return tpc * reg; | |
307 | } else { | |
308 | return (reg == 0 || reg == 0xffff) ? 0 : 90000 * 60 / reg; | |
309 | } | |
9431996f JH |
310 | } |
311 | ||
312 | static inline int FAN_TO_REG(int val, int tpc) | |
313 | { | |
ff8421f7 JH |
314 | if (tpc) { |
315 | return SENSORS_LIMIT(val / tpc, 0, 0xffff); | |
316 | } else { | |
317 | return (val <= 0) ? 0xffff : | |
318 | SENSORS_LIMIT(90000 * 60 / val, 0, 0xfffe); | |
319 | } | |
9431996f JH |
320 | } |
321 | ||
322 | /* Fan TPC (tach pulse count) | |
323 | * Converts a register value to a TPC multiplier or returns 0 if the tachometer | |
324 | * is configured in legacy (non-tpc) mode */ | |
325 | static inline int FAN_TPC_FROM_REG(int reg) | |
326 | { | |
327 | return (reg & 0x20) ? 0 : 60 >> (reg & 0x03); | |
328 | } | |
329 | ||
330 | /* Fan type | |
331 | * The type of a fan is expressed in number of pulses-per-revolution that it | |
332 | * emits */ | |
333 | static inline int FAN_TYPE_FROM_REG(int reg) | |
334 | { | |
335 | int edge = (reg >> 1) & 0x03; | |
336 | ||
337 | return (edge > 0) ? 1 << (edge - 1) : 0; | |
338 | } | |
339 | ||
340 | static inline int FAN_TYPE_TO_REG(int val, int reg) | |
341 | { | |
342 | int edge = (val == 4) ? 3 : val; | |
343 | ||
344 | return (reg & 0xf9) | (edge << 1); | |
345 | } | |
346 | ||
347 | /* Fan max RPM */ | |
348 | static const int FAN_MAX[] = {0x54, 0x38, 0x2a, 0x21, 0x1c, 0x18, 0x15, 0x12, | |
349 | 0x11, 0x0f, 0x0e}; | |
350 | ||
351 | static int FAN_MAX_FROM_REG(int reg) | |
352 | { | |
353 | int i; | |
354 | ||
355 | for (i = 10; i > 0; i--) { | |
356 | if (reg == FAN_MAX[i]) { | |
357 | break; | |
358 | } | |
359 | } | |
360 | ||
361 | return 1000 + i * 500; | |
362 | } | |
363 | ||
364 | static int FAN_MAX_TO_REG(int val) | |
365 | { | |
366 | int i; | |
367 | ||
368 | for (i = 10; i > 0; i--) { | |
369 | if (val > (1000 + (i - 1) * 500)) { | |
370 | break; | |
371 | } | |
372 | } | |
373 | ||
374 | return FAN_MAX[i]; | |
375 | } | |
376 | ||
377 | /* PWM enable | |
378 | * Register to enable mapping: | |
379 | * 000: 2 fan on zone 1 auto | |
380 | * 001: 2 fan on zone 2 auto | |
381 | * 010: 2 fan on zone 3 auto | |
382 | * 011: 0 fan full on | |
383 | * 100: -1 fan disabled | |
384 | * 101: 2 fan on hottest of zones 2,3 auto | |
385 | * 110: 2 fan on hottest of zones 1,2,3 auto | |
386 | * 111: 1 fan in manual mode */ | |
387 | static inline int PWM_EN_FROM_REG(int reg) | |
388 | { | |
389 | static const int en[] = {2, 2, 2, 0, -1, 2, 2, 1}; | |
390 | ||
391 | return en[(reg >> 5) & 0x07]; | |
392 | } | |
393 | ||
394 | static inline int PWM_EN_TO_REG(int val, int reg) | |
395 | { | |
396 | int en = (val == 1) ? 7 : 3; | |
397 | ||
398 | return (reg & 0x1f) | ((en & 0x07) << 5); | |
399 | } | |
400 | ||
401 | /* PWM auto channels zone | |
402 | * Register to auto channels zone mapping (ACZ is a bitfield with bit x | |
403 | * corresponding to zone x+1): | |
404 | * 000: 001 fan on zone 1 auto | |
405 | * 001: 010 fan on zone 2 auto | |
406 | * 010: 100 fan on zone 3 auto | |
407 | * 011: 000 fan full on | |
408 | * 100: 000 fan disabled | |
409 | * 101: 110 fan on hottest of zones 2,3 auto | |
410 | * 110: 111 fan on hottest of zones 1,2,3 auto | |
411 | * 111: 000 fan in manual mode */ | |
412 | static inline int PWM_ACZ_FROM_REG(int reg) | |
413 | { | |
414 | static const int acz[] = {1, 2, 4, 0, 0, 6, 7, 0}; | |
415 | ||
416 | return acz[(reg >> 5) & 0x07]; | |
417 | } | |
418 | ||
419 | static inline int PWM_ACZ_TO_REG(int val, int reg) | |
420 | { | |
421 | int acz = (val == 4) ? 2 : val - 1; | |
422 | ||
423 | return (reg & 0x1f) | ((acz & 0x07) << 5); | |
424 | } | |
425 | ||
426 | /* PWM frequency */ | |
427 | static const int PWM_FREQ[] = {11, 15, 22, 29, 35, 44, 59, 88, | |
428 | 15000, 20000, 30000, 25000, 0, 0, 0, 0}; | |
429 | ||
430 | static inline int PWM_FREQ_FROM_REG(int reg) | |
431 | { | |
432 | return PWM_FREQ[reg & 0x0f]; | |
433 | } | |
434 | ||
435 | static int PWM_FREQ_TO_REG(int val, int reg) | |
436 | { | |
437 | int i; | |
438 | ||
439 | /* the first two cases are special - stupid chip design! */ | |
440 | if (val > 27500) { | |
441 | i = 10; | |
442 | } else if (val > 22500) { | |
443 | i = 11; | |
444 | } else { | |
445 | for (i = 9; i > 0; i--) { | |
446 | if (val > (PWM_FREQ[i] + PWM_FREQ[i - 1] + 1) / 2) { | |
447 | break; | |
448 | } | |
449 | } | |
450 | } | |
451 | ||
452 | return (reg & 0xf0) | i; | |
453 | } | |
454 | ||
455 | /* PWM ramp rate | |
456 | * Register layout: | |
457 | * reg[0] = [OFF3, OFF2, OFF1, RES, RR1-E, RR1-2, RR1-1, RR1-0] | |
458 | * reg[1] = [RR2-E, RR2-2, RR2-1, RR2-0, RR3-E, RR3-2, RR3-1, RR3-0] */ | |
459 | static const u8 PWM_RR[] = {206, 104, 69, 41, 26, 18, 10, 5}; | |
460 | ||
461 | static inline int PWM_RR_FROM_REG(int reg, int ix) | |
462 | { | |
463 | int rr = (ix == 1) ? reg >> 4 : reg; | |
464 | ||
465 | return (rr & 0x08) ? PWM_RR[rr & 0x07] : 0; | |
466 | } | |
467 | ||
468 | static int PWM_RR_TO_REG(int val, int ix, int reg) | |
469 | { | |
470 | int i; | |
471 | ||
472 | for (i = 0; i < 7; i++) { | |
473 | if (val > (PWM_RR[i] + PWM_RR[i + 1] + 1) / 2) { | |
474 | break; | |
475 | } | |
476 | } | |
477 | ||
478 | return (ix == 1) ? (reg & 0x8f) | (i << 4) : (reg & 0xf8) | i; | |
479 | } | |
480 | ||
481 | /* PWM ramp rate enable */ | |
482 | static inline int PWM_RR_EN_FROM_REG(int reg, int ix) | |
483 | { | |
484 | return PWM_RR_FROM_REG(reg, ix) ? 1 : 0; | |
485 | } | |
486 | ||
487 | static inline int PWM_RR_EN_TO_REG(int val, int ix, int reg) | |
488 | { | |
489 | int en = (ix == 1) ? 0x80 : 0x08; | |
490 | ||
491 | return val ? reg | en : reg & ~en; | |
492 | } | |
493 | ||
494 | /* PWM min/off | |
495 | * The PWM min/off bits are part of the PMW ramp rate register 0 (see above for | |
496 | * the register layout). */ | |
497 | static inline int PWM_OFF_FROM_REG(int reg, int ix) | |
498 | { | |
499 | return (reg >> (ix + 5)) & 0x01; | |
500 | } | |
501 | ||
502 | static inline int PWM_OFF_TO_REG(int val, int ix, int reg) | |
503 | { | |
504 | return (reg & ~(1 << (ix + 5))) | ((val & 0x01) << (ix + 5)); | |
505 | } | |
506 | ||
507 | /* --------------------------------------------------------------------- | |
508 | * Device I/O access | |
e95c237d JH |
509 | * |
510 | * ISA access is performed through an index/data register pair and needs to | |
511 | * be protected by a mutex during runtime (not required for initialization). | |
512 | * We use data->update_lock for this and need to ensure that we acquire it | |
513 | * before calling dme1737_read or dme1737_write. | |
9431996f JH |
514 | * --------------------------------------------------------------------- */ |
515 | ||
dbc2bc25 | 516 | static u8 dme1737_read(const struct dme1737_data *data, u8 reg) |
9431996f | 517 | { |
dbc2bc25 | 518 | struct i2c_client *client = data->client; |
e95c237d | 519 | s32 val; |
9431996f | 520 | |
dbc2bc25 | 521 | if (client) { /* I2C device */ |
e95c237d JH |
522 | val = i2c_smbus_read_byte_data(client, reg); |
523 | ||
524 | if (val < 0) { | |
525 | dev_warn(&client->dev, "Read from register " | |
526 | "0x%02x failed! Please report to the driver " | |
527 | "maintainer.\n", reg); | |
528 | } | |
529 | } else { /* ISA device */ | |
dbc2bc25 JD |
530 | outb(reg, data->addr); |
531 | val = inb(data->addr + 1); | |
9431996f JH |
532 | } |
533 | ||
534 | return val; | |
535 | } | |
536 | ||
dbc2bc25 | 537 | static s32 dme1737_write(const struct dme1737_data *data, u8 reg, u8 val) |
9431996f | 538 | { |
dbc2bc25 | 539 | struct i2c_client *client = data->client; |
e95c237d JH |
540 | s32 res = 0; |
541 | ||
dbc2bc25 | 542 | if (client) { /* I2C device */ |
e95c237d | 543 | res = i2c_smbus_write_byte_data(client, reg, val); |
9431996f | 544 | |
e95c237d JH |
545 | if (res < 0) { |
546 | dev_warn(&client->dev, "Write to register " | |
547 | "0x%02x failed! Please report to the driver " | |
548 | "maintainer.\n", reg); | |
549 | } | |
550 | } else { /* ISA device */ | |
dbc2bc25 JD |
551 | outb(reg, data->addr); |
552 | outb(val, data->addr + 1); | |
9431996f JH |
553 | } |
554 | ||
555 | return res; | |
556 | } | |
557 | ||
558 | static struct dme1737_data *dme1737_update_device(struct device *dev) | |
559 | { | |
b237eb25 | 560 | struct dme1737_data *data = dev_get_drvdata(dev); |
9431996f JH |
561 | int ix; |
562 | u8 lsb[5]; | |
563 | ||
564 | mutex_lock(&data->update_lock); | |
565 | ||
566 | /* Enable a Vbat monitoring cycle every 10 mins */ | |
567 | if (time_after(jiffies, data->last_vbat + 600 * HZ) || !data->valid) { | |
dbc2bc25 | 568 | dme1737_write(data, DME1737_REG_CONFIG, dme1737_read(data, |
9431996f JH |
569 | DME1737_REG_CONFIG) | 0x10); |
570 | data->last_vbat = jiffies; | |
571 | } | |
572 | ||
573 | /* Sample register contents every 1 sec */ | |
574 | if (time_after(jiffies, data->last_update + HZ) || !data->valid) { | |
549edb83 | 575 | if (data->type != sch5027) { |
dbc2bc25 | 576 | data->vid = dme1737_read(data, DME1737_REG_VID) & |
549edb83 JH |
577 | 0x3f; |
578 | } | |
9431996f JH |
579 | |
580 | /* In (voltage) registers */ | |
581 | for (ix = 0; ix < ARRAY_SIZE(data->in); ix++) { | |
582 | /* Voltage inputs are stored as 16 bit values even | |
583 | * though they have only 12 bits resolution. This is | |
584 | * to make it consistent with the temp inputs. */ | |
dbc2bc25 | 585 | data->in[ix] = dme1737_read(data, |
9431996f | 586 | DME1737_REG_IN(ix)) << 8; |
dbc2bc25 | 587 | data->in_min[ix] = dme1737_read(data, |
9431996f | 588 | DME1737_REG_IN_MIN(ix)); |
dbc2bc25 | 589 | data->in_max[ix] = dme1737_read(data, |
9431996f JH |
590 | DME1737_REG_IN_MAX(ix)); |
591 | } | |
592 | ||
593 | /* Temp registers */ | |
594 | for (ix = 0; ix < ARRAY_SIZE(data->temp); ix++) { | |
595 | /* Temp inputs are stored as 16 bit values even | |
596 | * though they have only 12 bits resolution. This is | |
597 | * to take advantage of implicit conversions between | |
598 | * register values (2's complement) and temp values | |
599 | * (signed decimal). */ | |
dbc2bc25 | 600 | data->temp[ix] = dme1737_read(data, |
9431996f | 601 | DME1737_REG_TEMP(ix)) << 8; |
dbc2bc25 | 602 | data->temp_min[ix] = dme1737_read(data, |
9431996f | 603 | DME1737_REG_TEMP_MIN(ix)); |
dbc2bc25 | 604 | data->temp_max[ix] = dme1737_read(data, |
9431996f | 605 | DME1737_REG_TEMP_MAX(ix)); |
549edb83 | 606 | if (data->type != sch5027) { |
dbc2bc25 | 607 | data->temp_offset[ix] = dme1737_read(data, |
549edb83 JH |
608 | DME1737_REG_TEMP_OFFSET(ix)); |
609 | } | |
9431996f JH |
610 | } |
611 | ||
612 | /* In and temp LSB registers | |
613 | * The LSBs are latched when the MSBs are read, so the order in | |
614 | * which the registers are read (MSB first, then LSB) is | |
615 | * important! */ | |
616 | for (ix = 0; ix < ARRAY_SIZE(lsb); ix++) { | |
dbc2bc25 | 617 | lsb[ix] = dme1737_read(data, |
9431996f JH |
618 | DME1737_REG_IN_TEMP_LSB(ix)); |
619 | } | |
620 | for (ix = 0; ix < ARRAY_SIZE(data->in); ix++) { | |
621 | data->in[ix] |= (lsb[DME1737_REG_IN_LSB[ix]] << | |
622 | DME1737_REG_IN_LSB_SHL[ix]) & 0xf0; | |
623 | } | |
624 | for (ix = 0; ix < ARRAY_SIZE(data->temp); ix++) { | |
625 | data->temp[ix] |= (lsb[DME1737_REG_TEMP_LSB[ix]] << | |
626 | DME1737_REG_TEMP_LSB_SHL[ix]) & 0xf0; | |
627 | } | |
628 | ||
629 | /* Fan registers */ | |
630 | for (ix = 0; ix < ARRAY_SIZE(data->fan); ix++) { | |
631 | /* Skip reading registers if optional fans are not | |
632 | * present */ | |
633 | if (!(data->has_fan & (1 << ix))) { | |
634 | continue; | |
635 | } | |
dbc2bc25 | 636 | data->fan[ix] = dme1737_read(data, |
9431996f | 637 | DME1737_REG_FAN(ix)); |
dbc2bc25 | 638 | data->fan[ix] |= dme1737_read(data, |
9431996f | 639 | DME1737_REG_FAN(ix) + 1) << 8; |
dbc2bc25 | 640 | data->fan_min[ix] = dme1737_read(data, |
9431996f | 641 | DME1737_REG_FAN_MIN(ix)); |
dbc2bc25 | 642 | data->fan_min[ix] |= dme1737_read(data, |
9431996f | 643 | DME1737_REG_FAN_MIN(ix) + 1) << 8; |
dbc2bc25 | 644 | data->fan_opt[ix] = dme1737_read(data, |
9431996f JH |
645 | DME1737_REG_FAN_OPT(ix)); |
646 | /* fan_max exists only for fan[5-6] */ | |
647 | if (ix > 3) { | |
dbc2bc25 | 648 | data->fan_max[ix - 4] = dme1737_read(data, |
9431996f JH |
649 | DME1737_REG_FAN_MAX(ix)); |
650 | } | |
651 | } | |
652 | ||
653 | /* PWM registers */ | |
654 | for (ix = 0; ix < ARRAY_SIZE(data->pwm); ix++) { | |
655 | /* Skip reading registers if optional PWMs are not | |
656 | * present */ | |
657 | if (!(data->has_pwm & (1 << ix))) { | |
658 | continue; | |
659 | } | |
dbc2bc25 | 660 | data->pwm[ix] = dme1737_read(data, |
9431996f | 661 | DME1737_REG_PWM(ix)); |
dbc2bc25 | 662 | data->pwm_freq[ix] = dme1737_read(data, |
9431996f JH |
663 | DME1737_REG_PWM_FREQ(ix)); |
664 | /* pwm_config and pwm_min exist only for pwm[1-3] */ | |
665 | if (ix < 3) { | |
dbc2bc25 | 666 | data->pwm_config[ix] = dme1737_read(data, |
9431996f | 667 | DME1737_REG_PWM_CONFIG(ix)); |
dbc2bc25 | 668 | data->pwm_min[ix] = dme1737_read(data, |
9431996f JH |
669 | DME1737_REG_PWM_MIN(ix)); |
670 | } | |
671 | } | |
672 | for (ix = 0; ix < ARRAY_SIZE(data->pwm_rr); ix++) { | |
dbc2bc25 | 673 | data->pwm_rr[ix] = dme1737_read(data, |
9431996f JH |
674 | DME1737_REG_PWM_RR(ix)); |
675 | } | |
676 | ||
677 | /* Thermal zone registers */ | |
678 | for (ix = 0; ix < ARRAY_SIZE(data->zone_low); ix++) { | |
dbc2bc25 | 679 | data->zone_low[ix] = dme1737_read(data, |
9431996f | 680 | DME1737_REG_ZONE_LOW(ix)); |
dbc2bc25 | 681 | data->zone_abs[ix] = dme1737_read(data, |
9431996f JH |
682 | DME1737_REG_ZONE_ABS(ix)); |
683 | } | |
549edb83 JH |
684 | if (data->type != sch5027) { |
685 | for (ix = 0; ix < ARRAY_SIZE(data->zone_hyst); ix++) { | |
dbc2bc25 | 686 | data->zone_hyst[ix] = dme1737_read(data, |
9431996f | 687 | DME1737_REG_ZONE_HYST(ix)); |
549edb83 | 688 | } |
9431996f JH |
689 | } |
690 | ||
691 | /* Alarm registers */ | |
dbc2bc25 | 692 | data->alarms = dme1737_read(data, |
9431996f JH |
693 | DME1737_REG_ALARM1); |
694 | /* Bit 7 tells us if the other alarm registers are non-zero and | |
695 | * therefore also need to be read */ | |
696 | if (data->alarms & 0x80) { | |
dbc2bc25 | 697 | data->alarms |= dme1737_read(data, |
9431996f | 698 | DME1737_REG_ALARM2) << 8; |
dbc2bc25 | 699 | data->alarms |= dme1737_read(data, |
9431996f JH |
700 | DME1737_REG_ALARM3) << 16; |
701 | } | |
702 | ||
e95c237d JH |
703 | /* The ISA chips require explicit clearing of alarm bits. |
704 | * Don't worry, an alarm will come back if the condition | |
705 | * that causes it still exists */ | |
dbc2bc25 | 706 | if (!data->client) { |
e95c237d | 707 | if (data->alarms & 0xff0000) { |
dbc2bc25 | 708 | dme1737_write(data, DME1737_REG_ALARM3, |
e95c237d JH |
709 | 0xff); |
710 | } | |
711 | if (data->alarms & 0xff00) { | |
dbc2bc25 | 712 | dme1737_write(data, DME1737_REG_ALARM2, |
e95c237d JH |
713 | 0xff); |
714 | } | |
715 | if (data->alarms & 0xff) { | |
dbc2bc25 | 716 | dme1737_write(data, DME1737_REG_ALARM1, |
e95c237d JH |
717 | 0xff); |
718 | } | |
719 | } | |
720 | ||
9431996f JH |
721 | data->last_update = jiffies; |
722 | data->valid = 1; | |
723 | } | |
724 | ||
725 | mutex_unlock(&data->update_lock); | |
726 | ||
727 | return data; | |
728 | } | |
729 | ||
730 | /* --------------------------------------------------------------------- | |
731 | * Voltage sysfs attributes | |
732 | * ix = [0-5] | |
733 | * --------------------------------------------------------------------- */ | |
734 | ||
735 | #define SYS_IN_INPUT 0 | |
736 | #define SYS_IN_MIN 1 | |
737 | #define SYS_IN_MAX 2 | |
738 | #define SYS_IN_ALARM 3 | |
739 | ||
740 | static ssize_t show_in(struct device *dev, struct device_attribute *attr, | |
741 | char *buf) | |
742 | { | |
743 | struct dme1737_data *data = dme1737_update_device(dev); | |
744 | struct sensor_device_attribute_2 | |
745 | *sensor_attr_2 = to_sensor_dev_attr_2(attr); | |
746 | int ix = sensor_attr_2->index; | |
747 | int fn = sensor_attr_2->nr; | |
748 | int res; | |
749 | ||
750 | switch (fn) { | |
751 | case SYS_IN_INPUT: | |
549edb83 | 752 | res = IN_FROM_REG(data->in[ix], data->in_nominal[ix], 16); |
9431996f JH |
753 | break; |
754 | case SYS_IN_MIN: | |
549edb83 | 755 | res = IN_FROM_REG(data->in_min[ix], data->in_nominal[ix], 8); |
9431996f JH |
756 | break; |
757 | case SYS_IN_MAX: | |
549edb83 | 758 | res = IN_FROM_REG(data->in_max[ix], data->in_nominal[ix], 8); |
9431996f JH |
759 | break; |
760 | case SYS_IN_ALARM: | |
761 | res = (data->alarms >> DME1737_BIT_ALARM_IN[ix]) & 0x01; | |
762 | break; | |
763 | default: | |
764 | res = 0; | |
b237eb25 | 765 | dev_dbg(dev, "Unknown function %d.\n", fn); |
9431996f JH |
766 | } |
767 | ||
768 | return sprintf(buf, "%d\n", res); | |
769 | } | |
770 | ||
771 | static ssize_t set_in(struct device *dev, struct device_attribute *attr, | |
772 | const char *buf, size_t count) | |
773 | { | |
b237eb25 | 774 | struct dme1737_data *data = dev_get_drvdata(dev); |
9431996f JH |
775 | struct sensor_device_attribute_2 |
776 | *sensor_attr_2 = to_sensor_dev_attr_2(attr); | |
777 | int ix = sensor_attr_2->index; | |
778 | int fn = sensor_attr_2->nr; | |
779 | long val = simple_strtol(buf, NULL, 10); | |
780 | ||
781 | mutex_lock(&data->update_lock); | |
782 | switch (fn) { | |
783 | case SYS_IN_MIN: | |
549edb83 | 784 | data->in_min[ix] = IN_TO_REG(val, data->in_nominal[ix]); |
dbc2bc25 | 785 | dme1737_write(data, DME1737_REG_IN_MIN(ix), |
9431996f JH |
786 | data->in_min[ix]); |
787 | break; | |
788 | case SYS_IN_MAX: | |
549edb83 | 789 | data->in_max[ix] = IN_TO_REG(val, data->in_nominal[ix]); |
dbc2bc25 | 790 | dme1737_write(data, DME1737_REG_IN_MAX(ix), |
9431996f JH |
791 | data->in_max[ix]); |
792 | break; | |
793 | default: | |
b237eb25 | 794 | dev_dbg(dev, "Unknown function %d.\n", fn); |
9431996f JH |
795 | } |
796 | mutex_unlock(&data->update_lock); | |
797 | ||
798 | return count; | |
799 | } | |
800 | ||
801 | /* --------------------------------------------------------------------- | |
802 | * Temperature sysfs attributes | |
803 | * ix = [0-2] | |
804 | * --------------------------------------------------------------------- */ | |
805 | ||
806 | #define SYS_TEMP_INPUT 0 | |
807 | #define SYS_TEMP_MIN 1 | |
808 | #define SYS_TEMP_MAX 2 | |
809 | #define SYS_TEMP_OFFSET 3 | |
810 | #define SYS_TEMP_ALARM 4 | |
811 | #define SYS_TEMP_FAULT 5 | |
812 | ||
813 | static ssize_t show_temp(struct device *dev, struct device_attribute *attr, | |
814 | char *buf) | |
815 | { | |
816 | struct dme1737_data *data = dme1737_update_device(dev); | |
817 | struct sensor_device_attribute_2 | |
818 | *sensor_attr_2 = to_sensor_dev_attr_2(attr); | |
819 | int ix = sensor_attr_2->index; | |
820 | int fn = sensor_attr_2->nr; | |
821 | int res; | |
822 | ||
823 | switch (fn) { | |
824 | case SYS_TEMP_INPUT: | |
825 | res = TEMP_FROM_REG(data->temp[ix], 16); | |
826 | break; | |
827 | case SYS_TEMP_MIN: | |
828 | res = TEMP_FROM_REG(data->temp_min[ix], 8); | |
829 | break; | |
830 | case SYS_TEMP_MAX: | |
831 | res = TEMP_FROM_REG(data->temp_max[ix], 8); | |
832 | break; | |
833 | case SYS_TEMP_OFFSET: | |
834 | res = TEMP_FROM_REG(data->temp_offset[ix], 8); | |
835 | break; | |
836 | case SYS_TEMP_ALARM: | |
837 | res = (data->alarms >> DME1737_BIT_ALARM_TEMP[ix]) & 0x01; | |
838 | break; | |
839 | case SYS_TEMP_FAULT: | |
c0f31403 | 840 | res = (((u16)data->temp[ix] & 0xff00) == 0x8000); |
9431996f JH |
841 | break; |
842 | default: | |
843 | res = 0; | |
b237eb25 | 844 | dev_dbg(dev, "Unknown function %d.\n", fn); |
9431996f JH |
845 | } |
846 | ||
847 | return sprintf(buf, "%d\n", res); | |
848 | } | |
849 | ||
850 | static ssize_t set_temp(struct device *dev, struct device_attribute *attr, | |
851 | const char *buf, size_t count) | |
852 | { | |
b237eb25 | 853 | struct dme1737_data *data = dev_get_drvdata(dev); |
9431996f JH |
854 | struct sensor_device_attribute_2 |
855 | *sensor_attr_2 = to_sensor_dev_attr_2(attr); | |
856 | int ix = sensor_attr_2->index; | |
857 | int fn = sensor_attr_2->nr; | |
858 | long val = simple_strtol(buf, NULL, 10); | |
859 | ||
860 | mutex_lock(&data->update_lock); | |
861 | switch (fn) { | |
862 | case SYS_TEMP_MIN: | |
863 | data->temp_min[ix] = TEMP_TO_REG(val); | |
dbc2bc25 | 864 | dme1737_write(data, DME1737_REG_TEMP_MIN(ix), |
9431996f JH |
865 | data->temp_min[ix]); |
866 | break; | |
867 | case SYS_TEMP_MAX: | |
868 | data->temp_max[ix] = TEMP_TO_REG(val); | |
dbc2bc25 | 869 | dme1737_write(data, DME1737_REG_TEMP_MAX(ix), |
9431996f JH |
870 | data->temp_max[ix]); |
871 | break; | |
872 | case SYS_TEMP_OFFSET: | |
873 | data->temp_offset[ix] = TEMP_TO_REG(val); | |
dbc2bc25 | 874 | dme1737_write(data, DME1737_REG_TEMP_OFFSET(ix), |
9431996f JH |
875 | data->temp_offset[ix]); |
876 | break; | |
877 | default: | |
b237eb25 | 878 | dev_dbg(dev, "Unknown function %d.\n", fn); |
9431996f JH |
879 | } |
880 | mutex_unlock(&data->update_lock); | |
881 | ||
882 | return count; | |
883 | } | |
884 | ||
885 | /* --------------------------------------------------------------------- | |
886 | * Zone sysfs attributes | |
887 | * ix = [0-2] | |
888 | * --------------------------------------------------------------------- */ | |
889 | ||
890 | #define SYS_ZONE_AUTO_CHANNELS_TEMP 0 | |
891 | #define SYS_ZONE_AUTO_POINT1_TEMP_HYST 1 | |
892 | #define SYS_ZONE_AUTO_POINT1_TEMP 2 | |
893 | #define SYS_ZONE_AUTO_POINT2_TEMP 3 | |
894 | #define SYS_ZONE_AUTO_POINT3_TEMP 4 | |
895 | ||
896 | static ssize_t show_zone(struct device *dev, struct device_attribute *attr, | |
897 | char *buf) | |
898 | { | |
899 | struct dme1737_data *data = dme1737_update_device(dev); | |
900 | struct sensor_device_attribute_2 | |
901 | *sensor_attr_2 = to_sensor_dev_attr_2(attr); | |
902 | int ix = sensor_attr_2->index; | |
903 | int fn = sensor_attr_2->nr; | |
904 | int res; | |
905 | ||
906 | switch (fn) { | |
907 | case SYS_ZONE_AUTO_CHANNELS_TEMP: | |
908 | /* check config2 for non-standard temp-to-zone mapping */ | |
909 | if ((ix == 1) && (data->config2 & 0x02)) { | |
910 | res = 4; | |
911 | } else { | |
912 | res = 1 << ix; | |
913 | } | |
914 | break; | |
915 | case SYS_ZONE_AUTO_POINT1_TEMP_HYST: | |
916 | res = TEMP_FROM_REG(data->zone_low[ix], 8) - | |
917 | TEMP_HYST_FROM_REG(data->zone_hyst[ix == 2], ix); | |
918 | break; | |
919 | case SYS_ZONE_AUTO_POINT1_TEMP: | |
920 | res = TEMP_FROM_REG(data->zone_low[ix], 8); | |
921 | break; | |
922 | case SYS_ZONE_AUTO_POINT2_TEMP: | |
923 | /* pwm_freq holds the temp range bits in the upper nibble */ | |
924 | res = TEMP_FROM_REG(data->zone_low[ix], 8) + | |
925 | TEMP_RANGE_FROM_REG(data->pwm_freq[ix]); | |
926 | break; | |
927 | case SYS_ZONE_AUTO_POINT3_TEMP: | |
928 | res = TEMP_FROM_REG(data->zone_abs[ix], 8); | |
929 | break; | |
930 | default: | |
931 | res = 0; | |
b237eb25 | 932 | dev_dbg(dev, "Unknown function %d.\n", fn); |
9431996f JH |
933 | } |
934 | ||
935 | return sprintf(buf, "%d\n", res); | |
936 | } | |
937 | ||
938 | static ssize_t set_zone(struct device *dev, struct device_attribute *attr, | |
939 | const char *buf, size_t count) | |
940 | { | |
b237eb25 | 941 | struct dme1737_data *data = dev_get_drvdata(dev); |
9431996f JH |
942 | struct sensor_device_attribute_2 |
943 | *sensor_attr_2 = to_sensor_dev_attr_2(attr); | |
944 | int ix = sensor_attr_2->index; | |
945 | int fn = sensor_attr_2->nr; | |
946 | long val = simple_strtol(buf, NULL, 10); | |
947 | ||
948 | mutex_lock(&data->update_lock); | |
949 | switch (fn) { | |
950 | case SYS_ZONE_AUTO_POINT1_TEMP_HYST: | |
951 | /* Refresh the cache */ | |
dbc2bc25 | 952 | data->zone_low[ix] = dme1737_read(data, |
9431996f JH |
953 | DME1737_REG_ZONE_LOW(ix)); |
954 | /* Modify the temp hyst value */ | |
955 | data->zone_hyst[ix == 2] = TEMP_HYST_TO_REG( | |
956 | TEMP_FROM_REG(data->zone_low[ix], 8) - | |
dbc2bc25 | 957 | val, ix, dme1737_read(data, |
9431996f | 958 | DME1737_REG_ZONE_HYST(ix == 2))); |
dbc2bc25 | 959 | dme1737_write(data, DME1737_REG_ZONE_HYST(ix == 2), |
9431996f JH |
960 | data->zone_hyst[ix == 2]); |
961 | break; | |
962 | case SYS_ZONE_AUTO_POINT1_TEMP: | |
963 | data->zone_low[ix] = TEMP_TO_REG(val); | |
dbc2bc25 | 964 | dme1737_write(data, DME1737_REG_ZONE_LOW(ix), |
9431996f JH |
965 | data->zone_low[ix]); |
966 | break; | |
967 | case SYS_ZONE_AUTO_POINT2_TEMP: | |
968 | /* Refresh the cache */ | |
dbc2bc25 | 969 | data->zone_low[ix] = dme1737_read(data, |
9431996f JH |
970 | DME1737_REG_ZONE_LOW(ix)); |
971 | /* Modify the temp range value (which is stored in the upper | |
972 | * nibble of the pwm_freq register) */ | |
973 | data->pwm_freq[ix] = TEMP_RANGE_TO_REG(val - | |
974 | TEMP_FROM_REG(data->zone_low[ix], 8), | |
dbc2bc25 | 975 | dme1737_read(data, |
9431996f | 976 | DME1737_REG_PWM_FREQ(ix))); |
dbc2bc25 | 977 | dme1737_write(data, DME1737_REG_PWM_FREQ(ix), |
9431996f JH |
978 | data->pwm_freq[ix]); |
979 | break; | |
980 | case SYS_ZONE_AUTO_POINT3_TEMP: | |
981 | data->zone_abs[ix] = TEMP_TO_REG(val); | |
dbc2bc25 | 982 | dme1737_write(data, DME1737_REG_ZONE_ABS(ix), |
9431996f JH |
983 | data->zone_abs[ix]); |
984 | break; | |
985 | default: | |
b237eb25 | 986 | dev_dbg(dev, "Unknown function %d.\n", fn); |
9431996f JH |
987 | } |
988 | mutex_unlock(&data->update_lock); | |
989 | ||
990 | return count; | |
991 | } | |
992 | ||
993 | /* --------------------------------------------------------------------- | |
994 | * Fan sysfs attributes | |
995 | * ix = [0-5] | |
996 | * --------------------------------------------------------------------- */ | |
997 | ||
998 | #define SYS_FAN_INPUT 0 | |
999 | #define SYS_FAN_MIN 1 | |
1000 | #define SYS_FAN_MAX 2 | |
1001 | #define SYS_FAN_ALARM 3 | |
1002 | #define SYS_FAN_TYPE 4 | |
1003 | ||
1004 | static ssize_t show_fan(struct device *dev, struct device_attribute *attr, | |
1005 | char *buf) | |
1006 | { | |
1007 | struct dme1737_data *data = dme1737_update_device(dev); | |
1008 | struct sensor_device_attribute_2 | |
1009 | *sensor_attr_2 = to_sensor_dev_attr_2(attr); | |
1010 | int ix = sensor_attr_2->index; | |
1011 | int fn = sensor_attr_2->nr; | |
1012 | int res; | |
1013 | ||
1014 | switch (fn) { | |
1015 | case SYS_FAN_INPUT: | |
1016 | res = FAN_FROM_REG(data->fan[ix], | |
1017 | ix < 4 ? 0 : | |
1018 | FAN_TPC_FROM_REG(data->fan_opt[ix])); | |
1019 | break; | |
1020 | case SYS_FAN_MIN: | |
1021 | res = FAN_FROM_REG(data->fan_min[ix], | |
1022 | ix < 4 ? 0 : | |
1023 | FAN_TPC_FROM_REG(data->fan_opt[ix])); | |
1024 | break; | |
1025 | case SYS_FAN_MAX: | |
1026 | /* only valid for fan[5-6] */ | |
1027 | res = FAN_MAX_FROM_REG(data->fan_max[ix - 4]); | |
1028 | break; | |
1029 | case SYS_FAN_ALARM: | |
1030 | res = (data->alarms >> DME1737_BIT_ALARM_FAN[ix]) & 0x01; | |
1031 | break; | |
1032 | case SYS_FAN_TYPE: | |
1033 | /* only valid for fan[1-4] */ | |
1034 | res = FAN_TYPE_FROM_REG(data->fan_opt[ix]); | |
1035 | break; | |
1036 | default: | |
1037 | res = 0; | |
b237eb25 | 1038 | dev_dbg(dev, "Unknown function %d.\n", fn); |
9431996f JH |
1039 | } |
1040 | ||
1041 | return sprintf(buf, "%d\n", res); | |
1042 | } | |
1043 | ||
1044 | static ssize_t set_fan(struct device *dev, struct device_attribute *attr, | |
1045 | const char *buf, size_t count) | |
1046 | { | |
b237eb25 | 1047 | struct dme1737_data *data = dev_get_drvdata(dev); |
9431996f JH |
1048 | struct sensor_device_attribute_2 |
1049 | *sensor_attr_2 = to_sensor_dev_attr_2(attr); | |
1050 | int ix = sensor_attr_2->index; | |
1051 | int fn = sensor_attr_2->nr; | |
1052 | long val = simple_strtol(buf, NULL, 10); | |
1053 | ||
1054 | mutex_lock(&data->update_lock); | |
1055 | switch (fn) { | |
1056 | case SYS_FAN_MIN: | |
1057 | if (ix < 4) { | |
1058 | data->fan_min[ix] = FAN_TO_REG(val, 0); | |
1059 | } else { | |
1060 | /* Refresh the cache */ | |
dbc2bc25 | 1061 | data->fan_opt[ix] = dme1737_read(data, |
9431996f JH |
1062 | DME1737_REG_FAN_OPT(ix)); |
1063 | /* Modify the fan min value */ | |
1064 | data->fan_min[ix] = FAN_TO_REG(val, | |
1065 | FAN_TPC_FROM_REG(data->fan_opt[ix])); | |
1066 | } | |
dbc2bc25 | 1067 | dme1737_write(data, DME1737_REG_FAN_MIN(ix), |
9431996f | 1068 | data->fan_min[ix] & 0xff); |
dbc2bc25 | 1069 | dme1737_write(data, DME1737_REG_FAN_MIN(ix) + 1, |
9431996f JH |
1070 | data->fan_min[ix] >> 8); |
1071 | break; | |
1072 | case SYS_FAN_MAX: | |
1073 | /* Only valid for fan[5-6] */ | |
1074 | data->fan_max[ix - 4] = FAN_MAX_TO_REG(val); | |
dbc2bc25 | 1075 | dme1737_write(data, DME1737_REG_FAN_MAX(ix), |
9431996f JH |
1076 | data->fan_max[ix - 4]); |
1077 | break; | |
1078 | case SYS_FAN_TYPE: | |
1079 | /* Only valid for fan[1-4] */ | |
1080 | if (!(val == 1 || val == 2 || val == 4)) { | |
1081 | count = -EINVAL; | |
e95c237d | 1082 | dev_warn(dev, "Fan type value %ld not " |
9431996f JH |
1083 | "supported. Choose one of 1, 2, or 4.\n", |
1084 | val); | |
1085 | goto exit; | |
1086 | } | |
dbc2bc25 | 1087 | data->fan_opt[ix] = FAN_TYPE_TO_REG(val, dme1737_read(data, |
9431996f | 1088 | DME1737_REG_FAN_OPT(ix))); |
dbc2bc25 | 1089 | dme1737_write(data, DME1737_REG_FAN_OPT(ix), |
9431996f JH |
1090 | data->fan_opt[ix]); |
1091 | break; | |
1092 | default: | |
b237eb25 | 1093 | dev_dbg(dev, "Unknown function %d.\n", fn); |
9431996f JH |
1094 | } |
1095 | exit: | |
1096 | mutex_unlock(&data->update_lock); | |
1097 | ||
1098 | return count; | |
1099 | } | |
1100 | ||
1101 | /* --------------------------------------------------------------------- | |
1102 | * PWM sysfs attributes | |
1103 | * ix = [0-4] | |
1104 | * --------------------------------------------------------------------- */ | |
1105 | ||
1106 | #define SYS_PWM 0 | |
1107 | #define SYS_PWM_FREQ 1 | |
1108 | #define SYS_PWM_ENABLE 2 | |
1109 | #define SYS_PWM_RAMP_RATE 3 | |
1110 | #define SYS_PWM_AUTO_CHANNELS_ZONE 4 | |
1111 | #define SYS_PWM_AUTO_PWM_MIN 5 | |
1112 | #define SYS_PWM_AUTO_POINT1_PWM 6 | |
1113 | #define SYS_PWM_AUTO_POINT2_PWM 7 | |
1114 | ||
1115 | static ssize_t show_pwm(struct device *dev, struct device_attribute *attr, | |
1116 | char *buf) | |
1117 | { | |
1118 | struct dme1737_data *data = dme1737_update_device(dev); | |
1119 | struct sensor_device_attribute_2 | |
1120 | *sensor_attr_2 = to_sensor_dev_attr_2(attr); | |
1121 | int ix = sensor_attr_2->index; | |
1122 | int fn = sensor_attr_2->nr; | |
1123 | int res; | |
1124 | ||
1125 | switch (fn) { | |
1126 | case SYS_PWM: | |
1127 | if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 0) { | |
1128 | res = 255; | |
1129 | } else { | |
1130 | res = data->pwm[ix]; | |
1131 | } | |
1132 | break; | |
1133 | case SYS_PWM_FREQ: | |
1134 | res = PWM_FREQ_FROM_REG(data->pwm_freq[ix]); | |
1135 | break; | |
1136 | case SYS_PWM_ENABLE: | |
1137 | if (ix > 3) { | |
1138 | res = 1; /* pwm[5-6] hard-wired to manual mode */ | |
1139 | } else { | |
1140 | res = PWM_EN_FROM_REG(data->pwm_config[ix]); | |
1141 | } | |
1142 | break; | |
1143 | case SYS_PWM_RAMP_RATE: | |
1144 | /* Only valid for pwm[1-3] */ | |
1145 | res = PWM_RR_FROM_REG(data->pwm_rr[ix > 0], ix); | |
1146 | break; | |
1147 | case SYS_PWM_AUTO_CHANNELS_ZONE: | |
1148 | /* Only valid for pwm[1-3] */ | |
1149 | if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) { | |
1150 | res = PWM_ACZ_FROM_REG(data->pwm_config[ix]); | |
1151 | } else { | |
1152 | res = data->pwm_acz[ix]; | |
1153 | } | |
1154 | break; | |
1155 | case SYS_PWM_AUTO_PWM_MIN: | |
1156 | /* Only valid for pwm[1-3] */ | |
1157 | if (PWM_OFF_FROM_REG(data->pwm_rr[0], ix)) { | |
1158 | res = data->pwm_min[ix]; | |
1159 | } else { | |
1160 | res = 0; | |
1161 | } | |
1162 | break; | |
1163 | case SYS_PWM_AUTO_POINT1_PWM: | |
1164 | /* Only valid for pwm[1-3] */ | |
1165 | res = data->pwm_min[ix]; | |
1166 | break; | |
1167 | case SYS_PWM_AUTO_POINT2_PWM: | |
1168 | /* Only valid for pwm[1-3] */ | |
1169 | res = 255; /* hard-wired */ | |
1170 | break; | |
1171 | default: | |
1172 | res = 0; | |
b237eb25 | 1173 | dev_dbg(dev, "Unknown function %d.\n", fn); |
9431996f JH |
1174 | } |
1175 | ||
1176 | return sprintf(buf, "%d\n", res); | |
1177 | } | |
1178 | ||
73ce48f6 | 1179 | static struct attribute *dme1737_pwm_chmod_attr[]; |
b237eb25 | 1180 | static void dme1737_chmod_file(struct device*, struct attribute*, mode_t); |
9431996f JH |
1181 | |
1182 | static ssize_t set_pwm(struct device *dev, struct device_attribute *attr, | |
1183 | const char *buf, size_t count) | |
1184 | { | |
b237eb25 | 1185 | struct dme1737_data *data = dev_get_drvdata(dev); |
9431996f JH |
1186 | struct sensor_device_attribute_2 |
1187 | *sensor_attr_2 = to_sensor_dev_attr_2(attr); | |
1188 | int ix = sensor_attr_2->index; | |
1189 | int fn = sensor_attr_2->nr; | |
1190 | long val = simple_strtol(buf, NULL, 10); | |
1191 | ||
1192 | mutex_lock(&data->update_lock); | |
1193 | switch (fn) { | |
1194 | case SYS_PWM: | |
1195 | data->pwm[ix] = SENSORS_LIMIT(val, 0, 255); | |
dbc2bc25 | 1196 | dme1737_write(data, DME1737_REG_PWM(ix), data->pwm[ix]); |
9431996f JH |
1197 | break; |
1198 | case SYS_PWM_FREQ: | |
dbc2bc25 | 1199 | data->pwm_freq[ix] = PWM_FREQ_TO_REG(val, dme1737_read(data, |
9431996f | 1200 | DME1737_REG_PWM_FREQ(ix))); |
dbc2bc25 | 1201 | dme1737_write(data, DME1737_REG_PWM_FREQ(ix), |
9431996f JH |
1202 | data->pwm_freq[ix]); |
1203 | break; | |
1204 | case SYS_PWM_ENABLE: | |
1205 | /* Only valid for pwm[1-3] */ | |
1206 | if (val < 0 || val > 2) { | |
1207 | count = -EINVAL; | |
e95c237d | 1208 | dev_warn(dev, "PWM enable %ld not " |
9431996f JH |
1209 | "supported. Choose one of 0, 1, or 2.\n", |
1210 | val); | |
1211 | goto exit; | |
1212 | } | |
1213 | /* Refresh the cache */ | |
dbc2bc25 | 1214 | data->pwm_config[ix] = dme1737_read(data, |
9431996f JH |
1215 | DME1737_REG_PWM_CONFIG(ix)); |
1216 | if (val == PWM_EN_FROM_REG(data->pwm_config[ix])) { | |
1217 | /* Bail out if no change */ | |
1218 | goto exit; | |
1219 | } | |
1220 | /* Do some housekeeping if we are currently in auto mode */ | |
1221 | if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) { | |
1222 | /* Save the current zone channel assignment */ | |
1223 | data->pwm_acz[ix] = PWM_ACZ_FROM_REG( | |
1224 | data->pwm_config[ix]); | |
1225 | /* Save the current ramp rate state and disable it */ | |
dbc2bc25 | 1226 | data->pwm_rr[ix > 0] = dme1737_read(data, |
9431996f JH |
1227 | DME1737_REG_PWM_RR(ix > 0)); |
1228 | data->pwm_rr_en &= ~(1 << ix); | |
1229 | if (PWM_RR_EN_FROM_REG(data->pwm_rr[ix > 0], ix)) { | |
1230 | data->pwm_rr_en |= (1 << ix); | |
1231 | data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(0, ix, | |
1232 | data->pwm_rr[ix > 0]); | |
dbc2bc25 | 1233 | dme1737_write(data, |
9431996f JH |
1234 | DME1737_REG_PWM_RR(ix > 0), |
1235 | data->pwm_rr[ix > 0]); | |
1236 | } | |
1237 | } | |
1238 | /* Set the new PWM mode */ | |
1239 | switch (val) { | |
1240 | case 0: | |
1241 | /* Change permissions of pwm[ix] to read-only */ | |
73ce48f6 | 1242 | dme1737_chmod_file(dev, dme1737_pwm_chmod_attr[ix], |
9431996f JH |
1243 | S_IRUGO); |
1244 | /* Turn fan fully on */ | |
1245 | data->pwm_config[ix] = PWM_EN_TO_REG(0, | |
1246 | data->pwm_config[ix]); | |
dbc2bc25 | 1247 | dme1737_write(data, DME1737_REG_PWM_CONFIG(ix), |
9431996f JH |
1248 | data->pwm_config[ix]); |
1249 | break; | |
1250 | case 1: | |
1251 | /* Turn on manual mode */ | |
1252 | data->pwm_config[ix] = PWM_EN_TO_REG(1, | |
1253 | data->pwm_config[ix]); | |
dbc2bc25 | 1254 | dme1737_write(data, DME1737_REG_PWM_CONFIG(ix), |
9431996f JH |
1255 | data->pwm_config[ix]); |
1256 | /* Change permissions of pwm[ix] to read-writeable */ | |
73ce48f6 | 1257 | dme1737_chmod_file(dev, dme1737_pwm_chmod_attr[ix], |
9431996f JH |
1258 | S_IRUGO | S_IWUSR); |
1259 | break; | |
1260 | case 2: | |
1261 | /* Change permissions of pwm[ix] to read-only */ | |
73ce48f6 | 1262 | dme1737_chmod_file(dev, dme1737_pwm_chmod_attr[ix], |
9431996f JH |
1263 | S_IRUGO); |
1264 | /* Turn on auto mode using the saved zone channel | |
1265 | * assignment */ | |
1266 | data->pwm_config[ix] = PWM_ACZ_TO_REG( | |
1267 | data->pwm_acz[ix], | |
1268 | data->pwm_config[ix]); | |
dbc2bc25 | 1269 | dme1737_write(data, DME1737_REG_PWM_CONFIG(ix), |
9431996f JH |
1270 | data->pwm_config[ix]); |
1271 | /* Enable PWM ramp rate if previously enabled */ | |
1272 | if (data->pwm_rr_en & (1 << ix)) { | |
1273 | data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(1, ix, | |
dbc2bc25 | 1274 | dme1737_read(data, |
9431996f | 1275 | DME1737_REG_PWM_RR(ix > 0))); |
dbc2bc25 | 1276 | dme1737_write(data, |
9431996f JH |
1277 | DME1737_REG_PWM_RR(ix > 0), |
1278 | data->pwm_rr[ix > 0]); | |
1279 | } | |
1280 | break; | |
1281 | } | |
1282 | break; | |
1283 | case SYS_PWM_RAMP_RATE: | |
1284 | /* Only valid for pwm[1-3] */ | |
1285 | /* Refresh the cache */ | |
dbc2bc25 | 1286 | data->pwm_config[ix] = dme1737_read(data, |
9431996f | 1287 | DME1737_REG_PWM_CONFIG(ix)); |
dbc2bc25 | 1288 | data->pwm_rr[ix > 0] = dme1737_read(data, |
9431996f JH |
1289 | DME1737_REG_PWM_RR(ix > 0)); |
1290 | /* Set the ramp rate value */ | |
1291 | if (val > 0) { | |
1292 | data->pwm_rr[ix > 0] = PWM_RR_TO_REG(val, ix, | |
1293 | data->pwm_rr[ix > 0]); | |
1294 | } | |
1295 | /* Enable/disable the feature only if the associated PWM | |
1296 | * output is in automatic mode. */ | |
1297 | if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) { | |
1298 | data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(val > 0, ix, | |
1299 | data->pwm_rr[ix > 0]); | |
1300 | } | |
dbc2bc25 | 1301 | dme1737_write(data, DME1737_REG_PWM_RR(ix > 0), |
9431996f JH |
1302 | data->pwm_rr[ix > 0]); |
1303 | break; | |
1304 | case SYS_PWM_AUTO_CHANNELS_ZONE: | |
1305 | /* Only valid for pwm[1-3] */ | |
1306 | if (!(val == 1 || val == 2 || val == 4 || | |
1307 | val == 6 || val == 7)) { | |
1308 | count = -EINVAL; | |
e95c237d | 1309 | dev_warn(dev, "PWM auto channels zone %ld " |
9431996f JH |
1310 | "not supported. Choose one of 1, 2, 4, 6, " |
1311 | "or 7.\n", val); | |
1312 | goto exit; | |
1313 | } | |
1314 | /* Refresh the cache */ | |
dbc2bc25 | 1315 | data->pwm_config[ix] = dme1737_read(data, |
9431996f JH |
1316 | DME1737_REG_PWM_CONFIG(ix)); |
1317 | if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) { | |
1318 | /* PWM is already in auto mode so update the temp | |
1319 | * channel assignment */ | |
1320 | data->pwm_config[ix] = PWM_ACZ_TO_REG(val, | |
1321 | data->pwm_config[ix]); | |
dbc2bc25 | 1322 | dme1737_write(data, DME1737_REG_PWM_CONFIG(ix), |
9431996f JH |
1323 | data->pwm_config[ix]); |
1324 | } else { | |
1325 | /* PWM is not in auto mode so we save the temp | |
1326 | * channel assignment for later use */ | |
1327 | data->pwm_acz[ix] = val; | |
1328 | } | |
1329 | break; | |
1330 | case SYS_PWM_AUTO_PWM_MIN: | |
1331 | /* Only valid for pwm[1-3] */ | |
1332 | /* Refresh the cache */ | |
dbc2bc25 | 1333 | data->pwm_min[ix] = dme1737_read(data, |
9431996f JH |
1334 | DME1737_REG_PWM_MIN(ix)); |
1335 | /* There are only 2 values supported for the auto_pwm_min | |
1336 | * value: 0 or auto_point1_pwm. So if the temperature drops | |
1337 | * below the auto_point1_temp_hyst value, the fan either turns | |
1338 | * off or runs at auto_point1_pwm duty-cycle. */ | |
1339 | if (val > ((data->pwm_min[ix] + 1) / 2)) { | |
1340 | data->pwm_rr[0] = PWM_OFF_TO_REG(1, ix, | |
dbc2bc25 | 1341 | dme1737_read(data, |
9431996f | 1342 | DME1737_REG_PWM_RR(0))); |
9431996f JH |
1343 | } else { |
1344 | data->pwm_rr[0] = PWM_OFF_TO_REG(0, ix, | |
dbc2bc25 | 1345 | dme1737_read(data, |
9431996f | 1346 | DME1737_REG_PWM_RR(0))); |
9431996f | 1347 | } |
dbc2bc25 | 1348 | dme1737_write(data, DME1737_REG_PWM_RR(0), |
9431996f JH |
1349 | data->pwm_rr[0]); |
1350 | break; | |
1351 | case SYS_PWM_AUTO_POINT1_PWM: | |
1352 | /* Only valid for pwm[1-3] */ | |
1353 | data->pwm_min[ix] = SENSORS_LIMIT(val, 0, 255); | |
dbc2bc25 | 1354 | dme1737_write(data, DME1737_REG_PWM_MIN(ix), |
9431996f JH |
1355 | data->pwm_min[ix]); |
1356 | break; | |
1357 | default: | |
b237eb25 | 1358 | dev_dbg(dev, "Unknown function %d.\n", fn); |
9431996f JH |
1359 | } |
1360 | exit: | |
1361 | mutex_unlock(&data->update_lock); | |
1362 | ||
1363 | return count; | |
1364 | } | |
1365 | ||
1366 | /* --------------------------------------------------------------------- | |
1367 | * Miscellaneous sysfs attributes | |
1368 | * --------------------------------------------------------------------- */ | |
1369 | ||
1370 | static ssize_t show_vrm(struct device *dev, struct device_attribute *attr, | |
1371 | char *buf) | |
1372 | { | |
1373 | struct i2c_client *client = to_i2c_client(dev); | |
1374 | struct dme1737_data *data = i2c_get_clientdata(client); | |
1375 | ||
1376 | return sprintf(buf, "%d\n", data->vrm); | |
1377 | } | |
1378 | ||
1379 | static ssize_t set_vrm(struct device *dev, struct device_attribute *attr, | |
1380 | const char *buf, size_t count) | |
1381 | { | |
b237eb25 | 1382 | struct dme1737_data *data = dev_get_drvdata(dev); |
9431996f JH |
1383 | long val = simple_strtol(buf, NULL, 10); |
1384 | ||
1385 | data->vrm = val; | |
1386 | return count; | |
1387 | } | |
1388 | ||
1389 | static ssize_t show_vid(struct device *dev, struct device_attribute *attr, | |
1390 | char *buf) | |
1391 | { | |
1392 | struct dme1737_data *data = dme1737_update_device(dev); | |
1393 | ||
1394 | return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm)); | |
1395 | } | |
1396 | ||
e95c237d JH |
1397 | static ssize_t show_name(struct device *dev, struct device_attribute *attr, |
1398 | char *buf) | |
1399 | { | |
1400 | struct dme1737_data *data = dev_get_drvdata(dev); | |
1401 | ||
dbc2bc25 | 1402 | return sprintf(buf, "%s\n", data->name); |
e95c237d JH |
1403 | } |
1404 | ||
9431996f JH |
1405 | /* --------------------------------------------------------------------- |
1406 | * Sysfs device attribute defines and structs | |
1407 | * --------------------------------------------------------------------- */ | |
1408 | ||
1409 | /* Voltages 0-6 */ | |
1410 | ||
1411 | #define SENSOR_DEVICE_ATTR_IN(ix) \ | |
1412 | static SENSOR_DEVICE_ATTR_2(in##ix##_input, S_IRUGO, \ | |
b237eb25 | 1413 | show_in, NULL, SYS_IN_INPUT, ix); \ |
9431996f | 1414 | static SENSOR_DEVICE_ATTR_2(in##ix##_min, S_IRUGO | S_IWUSR, \ |
b237eb25 | 1415 | show_in, set_in, SYS_IN_MIN, ix); \ |
9431996f | 1416 | static SENSOR_DEVICE_ATTR_2(in##ix##_max, S_IRUGO | S_IWUSR, \ |
b237eb25 | 1417 | show_in, set_in, SYS_IN_MAX, ix); \ |
9431996f | 1418 | static SENSOR_DEVICE_ATTR_2(in##ix##_alarm, S_IRUGO, \ |
b237eb25 | 1419 | show_in, NULL, SYS_IN_ALARM, ix) |
9431996f JH |
1420 | |
1421 | SENSOR_DEVICE_ATTR_IN(0); | |
1422 | SENSOR_DEVICE_ATTR_IN(1); | |
1423 | SENSOR_DEVICE_ATTR_IN(2); | |
1424 | SENSOR_DEVICE_ATTR_IN(3); | |
1425 | SENSOR_DEVICE_ATTR_IN(4); | |
1426 | SENSOR_DEVICE_ATTR_IN(5); | |
1427 | SENSOR_DEVICE_ATTR_IN(6); | |
1428 | ||
1429 | /* Temperatures 1-3 */ | |
1430 | ||
1431 | #define SENSOR_DEVICE_ATTR_TEMP(ix) \ | |
1432 | static SENSOR_DEVICE_ATTR_2(temp##ix##_input, S_IRUGO, \ | |
b237eb25 | 1433 | show_temp, NULL, SYS_TEMP_INPUT, ix-1); \ |
9431996f | 1434 | static SENSOR_DEVICE_ATTR_2(temp##ix##_min, S_IRUGO | S_IWUSR, \ |
b237eb25 | 1435 | show_temp, set_temp, SYS_TEMP_MIN, ix-1); \ |
9431996f | 1436 | static SENSOR_DEVICE_ATTR_2(temp##ix##_max, S_IRUGO | S_IWUSR, \ |
b237eb25 | 1437 | show_temp, set_temp, SYS_TEMP_MAX, ix-1); \ |
9431996f | 1438 | static SENSOR_DEVICE_ATTR_2(temp##ix##_offset, S_IRUGO, \ |
b237eb25 | 1439 | show_temp, set_temp, SYS_TEMP_OFFSET, ix-1); \ |
9431996f | 1440 | static SENSOR_DEVICE_ATTR_2(temp##ix##_alarm, S_IRUGO, \ |
b237eb25 | 1441 | show_temp, NULL, SYS_TEMP_ALARM, ix-1); \ |
9431996f | 1442 | static SENSOR_DEVICE_ATTR_2(temp##ix##_fault, S_IRUGO, \ |
b237eb25 | 1443 | show_temp, NULL, SYS_TEMP_FAULT, ix-1) |
9431996f JH |
1444 | |
1445 | SENSOR_DEVICE_ATTR_TEMP(1); | |
1446 | SENSOR_DEVICE_ATTR_TEMP(2); | |
1447 | SENSOR_DEVICE_ATTR_TEMP(3); | |
1448 | ||
1449 | /* Zones 1-3 */ | |
1450 | ||
1451 | #define SENSOR_DEVICE_ATTR_ZONE(ix) \ | |
1452 | static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_channels_temp, S_IRUGO, \ | |
b237eb25 | 1453 | show_zone, NULL, SYS_ZONE_AUTO_CHANNELS_TEMP, ix-1); \ |
9431996f | 1454 | static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point1_temp_hyst, S_IRUGO, \ |
b237eb25 | 1455 | show_zone, set_zone, SYS_ZONE_AUTO_POINT1_TEMP_HYST, ix-1); \ |
9431996f | 1456 | static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point1_temp, S_IRUGO, \ |
b237eb25 | 1457 | show_zone, set_zone, SYS_ZONE_AUTO_POINT1_TEMP, ix-1); \ |
9431996f | 1458 | static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point2_temp, S_IRUGO, \ |
b237eb25 | 1459 | show_zone, set_zone, SYS_ZONE_AUTO_POINT2_TEMP, ix-1); \ |
9431996f | 1460 | static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point3_temp, S_IRUGO, \ |
b237eb25 | 1461 | show_zone, set_zone, SYS_ZONE_AUTO_POINT3_TEMP, ix-1) |
9431996f JH |
1462 | |
1463 | SENSOR_DEVICE_ATTR_ZONE(1); | |
1464 | SENSOR_DEVICE_ATTR_ZONE(2); | |
1465 | SENSOR_DEVICE_ATTR_ZONE(3); | |
1466 | ||
1467 | /* Fans 1-4 */ | |
1468 | ||
1469 | #define SENSOR_DEVICE_ATTR_FAN_1TO4(ix) \ | |
1470 | static SENSOR_DEVICE_ATTR_2(fan##ix##_input, S_IRUGO, \ | |
b237eb25 | 1471 | show_fan, NULL, SYS_FAN_INPUT, ix-1); \ |
9431996f | 1472 | static SENSOR_DEVICE_ATTR_2(fan##ix##_min, S_IRUGO | S_IWUSR, \ |
b237eb25 | 1473 | show_fan, set_fan, SYS_FAN_MIN, ix-1); \ |
9431996f | 1474 | static SENSOR_DEVICE_ATTR_2(fan##ix##_alarm, S_IRUGO, \ |
b237eb25 | 1475 | show_fan, NULL, SYS_FAN_ALARM, ix-1); \ |
9431996f | 1476 | static SENSOR_DEVICE_ATTR_2(fan##ix##_type, S_IRUGO | S_IWUSR, \ |
b237eb25 | 1477 | show_fan, set_fan, SYS_FAN_TYPE, ix-1) |
9431996f JH |
1478 | |
1479 | SENSOR_DEVICE_ATTR_FAN_1TO4(1); | |
1480 | SENSOR_DEVICE_ATTR_FAN_1TO4(2); | |
1481 | SENSOR_DEVICE_ATTR_FAN_1TO4(3); | |
1482 | SENSOR_DEVICE_ATTR_FAN_1TO4(4); | |
1483 | ||
1484 | /* Fans 5-6 */ | |
1485 | ||
1486 | #define SENSOR_DEVICE_ATTR_FAN_5TO6(ix) \ | |
1487 | static SENSOR_DEVICE_ATTR_2(fan##ix##_input, S_IRUGO, \ | |
b237eb25 | 1488 | show_fan, NULL, SYS_FAN_INPUT, ix-1); \ |
9431996f | 1489 | static SENSOR_DEVICE_ATTR_2(fan##ix##_min, S_IRUGO | S_IWUSR, \ |
b237eb25 | 1490 | show_fan, set_fan, SYS_FAN_MIN, ix-1); \ |
9431996f | 1491 | static SENSOR_DEVICE_ATTR_2(fan##ix##_alarm, S_IRUGO, \ |
b237eb25 | 1492 | show_fan, NULL, SYS_FAN_ALARM, ix-1); \ |
9431996f | 1493 | static SENSOR_DEVICE_ATTR_2(fan##ix##_max, S_IRUGO | S_IWUSR, \ |
b237eb25 | 1494 | show_fan, set_fan, SYS_FAN_MAX, ix-1) |
9431996f JH |
1495 | |
1496 | SENSOR_DEVICE_ATTR_FAN_5TO6(5); | |
1497 | SENSOR_DEVICE_ATTR_FAN_5TO6(6); | |
1498 | ||
1499 | /* PWMs 1-3 */ | |
1500 | ||
1501 | #define SENSOR_DEVICE_ATTR_PWM_1TO3(ix) \ | |
1502 | static SENSOR_DEVICE_ATTR_2(pwm##ix, S_IRUGO, \ | |
b237eb25 | 1503 | show_pwm, set_pwm, SYS_PWM, ix-1); \ |
9431996f | 1504 | static SENSOR_DEVICE_ATTR_2(pwm##ix##_freq, S_IRUGO, \ |
b237eb25 | 1505 | show_pwm, set_pwm, SYS_PWM_FREQ, ix-1); \ |
9431996f | 1506 | static SENSOR_DEVICE_ATTR_2(pwm##ix##_enable, S_IRUGO, \ |
b237eb25 | 1507 | show_pwm, set_pwm, SYS_PWM_ENABLE, ix-1); \ |
9431996f | 1508 | static SENSOR_DEVICE_ATTR_2(pwm##ix##_ramp_rate, S_IRUGO, \ |
b237eb25 | 1509 | show_pwm, set_pwm, SYS_PWM_RAMP_RATE, ix-1); \ |
9431996f | 1510 | static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_channels_zone, S_IRUGO, \ |
b237eb25 | 1511 | show_pwm, set_pwm, SYS_PWM_AUTO_CHANNELS_ZONE, ix-1); \ |
9431996f | 1512 | static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_pwm_min, S_IRUGO, \ |
b237eb25 | 1513 | show_pwm, set_pwm, SYS_PWM_AUTO_PWM_MIN, ix-1); \ |
9431996f | 1514 | static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_point1_pwm, S_IRUGO, \ |
b237eb25 | 1515 | show_pwm, set_pwm, SYS_PWM_AUTO_POINT1_PWM, ix-1); \ |
9431996f | 1516 | static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_point2_pwm, S_IRUGO, \ |
b237eb25 | 1517 | show_pwm, NULL, SYS_PWM_AUTO_POINT2_PWM, ix-1) |
9431996f JH |
1518 | |
1519 | SENSOR_DEVICE_ATTR_PWM_1TO3(1); | |
1520 | SENSOR_DEVICE_ATTR_PWM_1TO3(2); | |
1521 | SENSOR_DEVICE_ATTR_PWM_1TO3(3); | |
1522 | ||
1523 | /* PWMs 5-6 */ | |
1524 | ||
1525 | #define SENSOR_DEVICE_ATTR_PWM_5TO6(ix) \ | |
9b257714 | 1526 | static SENSOR_DEVICE_ATTR_2(pwm##ix, S_IRUGO, \ |
b237eb25 | 1527 | show_pwm, set_pwm, SYS_PWM, ix-1); \ |
9b257714 | 1528 | static SENSOR_DEVICE_ATTR_2(pwm##ix##_freq, S_IRUGO, \ |
b237eb25 | 1529 | show_pwm, set_pwm, SYS_PWM_FREQ, ix-1); \ |
9431996f | 1530 | static SENSOR_DEVICE_ATTR_2(pwm##ix##_enable, S_IRUGO, \ |
b237eb25 | 1531 | show_pwm, NULL, SYS_PWM_ENABLE, ix-1) |
9431996f JH |
1532 | |
1533 | SENSOR_DEVICE_ATTR_PWM_5TO6(5); | |
1534 | SENSOR_DEVICE_ATTR_PWM_5TO6(6); | |
1535 | ||
1536 | /* Misc */ | |
1537 | ||
1538 | static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm, set_vrm); | |
1539 | static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL); | |
e95c237d | 1540 | static DEVICE_ATTR(name, S_IRUGO, show_name, NULL); /* for ISA devices */ |
9431996f | 1541 | |
9431996f JH |
1542 | /* This struct holds all the attributes that are always present and need to be |
1543 | * created unconditionally. The attributes that need modification of their | |
1544 | * permissions are created read-only and write permissions are added or removed | |
1545 | * on the fly when required */ | |
1546 | static struct attribute *dme1737_attr[] ={ | |
b237eb25 | 1547 | /* Voltages */ |
9b257714 JH |
1548 | &sensor_dev_attr_in0_input.dev_attr.attr, |
1549 | &sensor_dev_attr_in0_min.dev_attr.attr, | |
1550 | &sensor_dev_attr_in0_max.dev_attr.attr, | |
1551 | &sensor_dev_attr_in0_alarm.dev_attr.attr, | |
1552 | &sensor_dev_attr_in1_input.dev_attr.attr, | |
1553 | &sensor_dev_attr_in1_min.dev_attr.attr, | |
1554 | &sensor_dev_attr_in1_max.dev_attr.attr, | |
1555 | &sensor_dev_attr_in1_alarm.dev_attr.attr, | |
1556 | &sensor_dev_attr_in2_input.dev_attr.attr, | |
1557 | &sensor_dev_attr_in2_min.dev_attr.attr, | |
1558 | &sensor_dev_attr_in2_max.dev_attr.attr, | |
1559 | &sensor_dev_attr_in2_alarm.dev_attr.attr, | |
1560 | &sensor_dev_attr_in3_input.dev_attr.attr, | |
1561 | &sensor_dev_attr_in3_min.dev_attr.attr, | |
1562 | &sensor_dev_attr_in3_max.dev_attr.attr, | |
1563 | &sensor_dev_attr_in3_alarm.dev_attr.attr, | |
1564 | &sensor_dev_attr_in4_input.dev_attr.attr, | |
1565 | &sensor_dev_attr_in4_min.dev_attr.attr, | |
1566 | &sensor_dev_attr_in4_max.dev_attr.attr, | |
1567 | &sensor_dev_attr_in4_alarm.dev_attr.attr, | |
1568 | &sensor_dev_attr_in5_input.dev_attr.attr, | |
1569 | &sensor_dev_attr_in5_min.dev_attr.attr, | |
1570 | &sensor_dev_attr_in5_max.dev_attr.attr, | |
1571 | &sensor_dev_attr_in5_alarm.dev_attr.attr, | |
1572 | &sensor_dev_attr_in6_input.dev_attr.attr, | |
1573 | &sensor_dev_attr_in6_min.dev_attr.attr, | |
1574 | &sensor_dev_attr_in6_max.dev_attr.attr, | |
1575 | &sensor_dev_attr_in6_alarm.dev_attr.attr, | |
b237eb25 | 1576 | /* Temperatures */ |
9b257714 JH |
1577 | &sensor_dev_attr_temp1_input.dev_attr.attr, |
1578 | &sensor_dev_attr_temp1_min.dev_attr.attr, | |
1579 | &sensor_dev_attr_temp1_max.dev_attr.attr, | |
1580 | &sensor_dev_attr_temp1_alarm.dev_attr.attr, | |
1581 | &sensor_dev_attr_temp1_fault.dev_attr.attr, | |
9b257714 JH |
1582 | &sensor_dev_attr_temp2_input.dev_attr.attr, |
1583 | &sensor_dev_attr_temp2_min.dev_attr.attr, | |
1584 | &sensor_dev_attr_temp2_max.dev_attr.attr, | |
1585 | &sensor_dev_attr_temp2_alarm.dev_attr.attr, | |
1586 | &sensor_dev_attr_temp2_fault.dev_attr.attr, | |
9b257714 JH |
1587 | &sensor_dev_attr_temp3_input.dev_attr.attr, |
1588 | &sensor_dev_attr_temp3_min.dev_attr.attr, | |
1589 | &sensor_dev_attr_temp3_max.dev_attr.attr, | |
1590 | &sensor_dev_attr_temp3_alarm.dev_attr.attr, | |
1591 | &sensor_dev_attr_temp3_fault.dev_attr.attr, | |
b237eb25 | 1592 | /* Zones */ |
9b257714 JH |
1593 | &sensor_dev_attr_zone1_auto_point1_temp.dev_attr.attr, |
1594 | &sensor_dev_attr_zone1_auto_point2_temp.dev_attr.attr, | |
1595 | &sensor_dev_attr_zone1_auto_point3_temp.dev_attr.attr, | |
1596 | &sensor_dev_attr_zone1_auto_channels_temp.dev_attr.attr, | |
9b257714 JH |
1597 | &sensor_dev_attr_zone2_auto_point1_temp.dev_attr.attr, |
1598 | &sensor_dev_attr_zone2_auto_point2_temp.dev_attr.attr, | |
1599 | &sensor_dev_attr_zone2_auto_point3_temp.dev_attr.attr, | |
1600 | &sensor_dev_attr_zone2_auto_channels_temp.dev_attr.attr, | |
9b257714 JH |
1601 | &sensor_dev_attr_zone3_auto_point1_temp.dev_attr.attr, |
1602 | &sensor_dev_attr_zone3_auto_point2_temp.dev_attr.attr, | |
1603 | &sensor_dev_attr_zone3_auto_point3_temp.dev_attr.attr, | |
1604 | &sensor_dev_attr_zone3_auto_channels_temp.dev_attr.attr, | |
549edb83 JH |
1605 | NULL |
1606 | }; | |
1607 | ||
1608 | static const struct attribute_group dme1737_group = { | |
1609 | .attrs = dme1737_attr, | |
1610 | }; | |
1611 | ||
1612 | /* The following struct holds misc attributes, which are not available in all | |
1613 | * chips. Their creation depends on the chip type which is determined during | |
1614 | * module load. */ | |
1615 | static struct attribute *dme1737_misc_attr[] = { | |
1616 | /* Temperatures */ | |
1617 | &sensor_dev_attr_temp1_offset.dev_attr.attr, | |
1618 | &sensor_dev_attr_temp2_offset.dev_attr.attr, | |
1619 | &sensor_dev_attr_temp3_offset.dev_attr.attr, | |
1620 | /* Zones */ | |
1621 | &sensor_dev_attr_zone1_auto_point1_temp_hyst.dev_attr.attr, | |
1622 | &sensor_dev_attr_zone2_auto_point1_temp_hyst.dev_attr.attr, | |
1623 | &sensor_dev_attr_zone3_auto_point1_temp_hyst.dev_attr.attr, | |
b237eb25 JH |
1624 | /* Misc */ |
1625 | &dev_attr_vrm.attr, | |
1626 | &dev_attr_cpu0_vid.attr, | |
9431996f JH |
1627 | NULL |
1628 | }; | |
1629 | ||
549edb83 JH |
1630 | static const struct attribute_group dme1737_misc_group = { |
1631 | .attrs = dme1737_misc_attr, | |
9431996f JH |
1632 | }; |
1633 | ||
1634 | /* The following structs hold the PWM attributes, some of which are optional. | |
1635 | * Their creation depends on the chip configuration which is determined during | |
1636 | * module load. */ | |
73ce48f6 | 1637 | static struct attribute *dme1737_pwm1_attr[] = { |
9b257714 JH |
1638 | &sensor_dev_attr_pwm1.dev_attr.attr, |
1639 | &sensor_dev_attr_pwm1_freq.dev_attr.attr, | |
1640 | &sensor_dev_attr_pwm1_enable.dev_attr.attr, | |
1641 | &sensor_dev_attr_pwm1_ramp_rate.dev_attr.attr, | |
1642 | &sensor_dev_attr_pwm1_auto_channels_zone.dev_attr.attr, | |
9b257714 JH |
1643 | &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr, |
1644 | &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr, | |
9431996f JH |
1645 | NULL |
1646 | }; | |
73ce48f6 | 1647 | static struct attribute *dme1737_pwm2_attr[] = { |
9b257714 JH |
1648 | &sensor_dev_attr_pwm2.dev_attr.attr, |
1649 | &sensor_dev_attr_pwm2_freq.dev_attr.attr, | |
1650 | &sensor_dev_attr_pwm2_enable.dev_attr.attr, | |
1651 | &sensor_dev_attr_pwm2_ramp_rate.dev_attr.attr, | |
1652 | &sensor_dev_attr_pwm2_auto_channels_zone.dev_attr.attr, | |
9b257714 JH |
1653 | &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr, |
1654 | &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr, | |
9431996f JH |
1655 | NULL |
1656 | }; | |
73ce48f6 | 1657 | static struct attribute *dme1737_pwm3_attr[] = { |
9b257714 JH |
1658 | &sensor_dev_attr_pwm3.dev_attr.attr, |
1659 | &sensor_dev_attr_pwm3_freq.dev_attr.attr, | |
1660 | &sensor_dev_attr_pwm3_enable.dev_attr.attr, | |
1661 | &sensor_dev_attr_pwm3_ramp_rate.dev_attr.attr, | |
1662 | &sensor_dev_attr_pwm3_auto_channels_zone.dev_attr.attr, | |
9b257714 JH |
1663 | &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr, |
1664 | &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr, | |
9431996f JH |
1665 | NULL |
1666 | }; | |
73ce48f6 | 1667 | static struct attribute *dme1737_pwm5_attr[] = { |
9b257714 JH |
1668 | &sensor_dev_attr_pwm5.dev_attr.attr, |
1669 | &sensor_dev_attr_pwm5_freq.dev_attr.attr, | |
1670 | &sensor_dev_attr_pwm5_enable.dev_attr.attr, | |
9431996f JH |
1671 | NULL |
1672 | }; | |
73ce48f6 | 1673 | static struct attribute *dme1737_pwm6_attr[] = { |
9b257714 JH |
1674 | &sensor_dev_attr_pwm6.dev_attr.attr, |
1675 | &sensor_dev_attr_pwm6_freq.dev_attr.attr, | |
1676 | &sensor_dev_attr_pwm6_enable.dev_attr.attr, | |
9431996f JH |
1677 | NULL |
1678 | }; | |
1679 | ||
1680 | static const struct attribute_group dme1737_pwm_group[] = { | |
73ce48f6 JH |
1681 | { .attrs = dme1737_pwm1_attr }, |
1682 | { .attrs = dme1737_pwm2_attr }, | |
1683 | { .attrs = dme1737_pwm3_attr }, | |
9431996f | 1684 | { .attrs = NULL }, |
73ce48f6 JH |
1685 | { .attrs = dme1737_pwm5_attr }, |
1686 | { .attrs = dme1737_pwm6_attr }, | |
9431996f JH |
1687 | }; |
1688 | ||
549edb83 JH |
1689 | /* The following struct holds misc PWM attributes, which are not available in |
1690 | * all chips. Their creation depends on the chip type which is determined | |
1691 | * during module load. */ | |
1692 | static struct attribute *dme1737_pwm_misc_attr[] = { | |
1693 | &sensor_dev_attr_pwm1_auto_pwm_min.dev_attr.attr, | |
1694 | &sensor_dev_attr_pwm2_auto_pwm_min.dev_attr.attr, | |
1695 | &sensor_dev_attr_pwm3_auto_pwm_min.dev_attr.attr, | |
1696 | }; | |
1697 | ||
9431996f JH |
1698 | /* The following structs hold the fan attributes, some of which are optional. |
1699 | * Their creation depends on the chip configuration which is determined during | |
1700 | * module load. */ | |
73ce48f6 | 1701 | static struct attribute *dme1737_fan1_attr[] = { |
9b257714 JH |
1702 | &sensor_dev_attr_fan1_input.dev_attr.attr, |
1703 | &sensor_dev_attr_fan1_min.dev_attr.attr, | |
1704 | &sensor_dev_attr_fan1_alarm.dev_attr.attr, | |
1705 | &sensor_dev_attr_fan1_type.dev_attr.attr, | |
9431996f JH |
1706 | NULL |
1707 | }; | |
73ce48f6 | 1708 | static struct attribute *dme1737_fan2_attr[] = { |
9b257714 JH |
1709 | &sensor_dev_attr_fan2_input.dev_attr.attr, |
1710 | &sensor_dev_attr_fan2_min.dev_attr.attr, | |
1711 | &sensor_dev_attr_fan2_alarm.dev_attr.attr, | |
1712 | &sensor_dev_attr_fan2_type.dev_attr.attr, | |
9431996f JH |
1713 | NULL |
1714 | }; | |
73ce48f6 | 1715 | static struct attribute *dme1737_fan3_attr[] = { |
9b257714 JH |
1716 | &sensor_dev_attr_fan3_input.dev_attr.attr, |
1717 | &sensor_dev_attr_fan3_min.dev_attr.attr, | |
1718 | &sensor_dev_attr_fan3_alarm.dev_attr.attr, | |
1719 | &sensor_dev_attr_fan3_type.dev_attr.attr, | |
9431996f JH |
1720 | NULL |
1721 | }; | |
73ce48f6 | 1722 | static struct attribute *dme1737_fan4_attr[] = { |
9b257714 JH |
1723 | &sensor_dev_attr_fan4_input.dev_attr.attr, |
1724 | &sensor_dev_attr_fan4_min.dev_attr.attr, | |
1725 | &sensor_dev_attr_fan4_alarm.dev_attr.attr, | |
1726 | &sensor_dev_attr_fan4_type.dev_attr.attr, | |
9431996f JH |
1727 | NULL |
1728 | }; | |
73ce48f6 | 1729 | static struct attribute *dme1737_fan5_attr[] = { |
9b257714 JH |
1730 | &sensor_dev_attr_fan5_input.dev_attr.attr, |
1731 | &sensor_dev_attr_fan5_min.dev_attr.attr, | |
1732 | &sensor_dev_attr_fan5_alarm.dev_attr.attr, | |
1733 | &sensor_dev_attr_fan5_max.dev_attr.attr, | |
9431996f JH |
1734 | NULL |
1735 | }; | |
73ce48f6 | 1736 | static struct attribute *dme1737_fan6_attr[] = { |
9b257714 JH |
1737 | &sensor_dev_attr_fan6_input.dev_attr.attr, |
1738 | &sensor_dev_attr_fan6_min.dev_attr.attr, | |
1739 | &sensor_dev_attr_fan6_alarm.dev_attr.attr, | |
1740 | &sensor_dev_attr_fan6_max.dev_attr.attr, | |
9431996f JH |
1741 | NULL |
1742 | }; | |
1743 | ||
1744 | static const struct attribute_group dme1737_fan_group[] = { | |
73ce48f6 JH |
1745 | { .attrs = dme1737_fan1_attr }, |
1746 | { .attrs = dme1737_fan2_attr }, | |
1747 | { .attrs = dme1737_fan3_attr }, | |
1748 | { .attrs = dme1737_fan4_attr }, | |
1749 | { .attrs = dme1737_fan5_attr }, | |
1750 | { .attrs = dme1737_fan6_attr }, | |
9431996f JH |
1751 | }; |
1752 | ||
549edb83 | 1753 | /* The permissions of the following zone attributes are changed to read- |
9431996f | 1754 | * writeable if the chip is *not* locked. Otherwise they stay read-only. */ |
549edb83 | 1755 | static struct attribute *dme1737_zone_chmod_attr[] = { |
9b257714 JH |
1756 | &sensor_dev_attr_zone1_auto_point1_temp.dev_attr.attr, |
1757 | &sensor_dev_attr_zone1_auto_point2_temp.dev_attr.attr, | |
1758 | &sensor_dev_attr_zone1_auto_point3_temp.dev_attr.attr, | |
9b257714 JH |
1759 | &sensor_dev_attr_zone2_auto_point1_temp.dev_attr.attr, |
1760 | &sensor_dev_attr_zone2_auto_point2_temp.dev_attr.attr, | |
1761 | &sensor_dev_attr_zone2_auto_point3_temp.dev_attr.attr, | |
9b257714 JH |
1762 | &sensor_dev_attr_zone3_auto_point1_temp.dev_attr.attr, |
1763 | &sensor_dev_attr_zone3_auto_point2_temp.dev_attr.attr, | |
1764 | &sensor_dev_attr_zone3_auto_point3_temp.dev_attr.attr, | |
9431996f JH |
1765 | NULL |
1766 | }; | |
1767 | ||
549edb83 JH |
1768 | static const struct attribute_group dme1737_zone_chmod_group = { |
1769 | .attrs = dme1737_zone_chmod_attr, | |
9431996f JH |
1770 | }; |
1771 | ||
1772 | /* The permissions of the following PWM attributes are changed to read- | |
1773 | * writeable if the chip is *not* locked and the respective PWM is available. | |
1774 | * Otherwise they stay read-only. */ | |
73ce48f6 | 1775 | static struct attribute *dme1737_pwm1_chmod_attr[] = { |
9b257714 JH |
1776 | &sensor_dev_attr_pwm1_freq.dev_attr.attr, |
1777 | &sensor_dev_attr_pwm1_enable.dev_attr.attr, | |
1778 | &sensor_dev_attr_pwm1_ramp_rate.dev_attr.attr, | |
1779 | &sensor_dev_attr_pwm1_auto_channels_zone.dev_attr.attr, | |
9b257714 | 1780 | &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr, |
9431996f JH |
1781 | NULL |
1782 | }; | |
73ce48f6 | 1783 | static struct attribute *dme1737_pwm2_chmod_attr[] = { |
9b257714 JH |
1784 | &sensor_dev_attr_pwm2_freq.dev_attr.attr, |
1785 | &sensor_dev_attr_pwm2_enable.dev_attr.attr, | |
1786 | &sensor_dev_attr_pwm2_ramp_rate.dev_attr.attr, | |
1787 | &sensor_dev_attr_pwm2_auto_channels_zone.dev_attr.attr, | |
9b257714 | 1788 | &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr, |
9431996f JH |
1789 | NULL |
1790 | }; | |
73ce48f6 | 1791 | static struct attribute *dme1737_pwm3_chmod_attr[] = { |
9b257714 JH |
1792 | &sensor_dev_attr_pwm3_freq.dev_attr.attr, |
1793 | &sensor_dev_attr_pwm3_enable.dev_attr.attr, | |
1794 | &sensor_dev_attr_pwm3_ramp_rate.dev_attr.attr, | |
1795 | &sensor_dev_attr_pwm3_auto_channels_zone.dev_attr.attr, | |
9b257714 | 1796 | &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr, |
9431996f JH |
1797 | NULL |
1798 | }; | |
73ce48f6 | 1799 | static struct attribute *dme1737_pwm5_chmod_attr[] = { |
9b257714 JH |
1800 | &sensor_dev_attr_pwm5.dev_attr.attr, |
1801 | &sensor_dev_attr_pwm5_freq.dev_attr.attr, | |
9431996f JH |
1802 | NULL |
1803 | }; | |
73ce48f6 | 1804 | static struct attribute *dme1737_pwm6_chmod_attr[] = { |
9b257714 JH |
1805 | &sensor_dev_attr_pwm6.dev_attr.attr, |
1806 | &sensor_dev_attr_pwm6_freq.dev_attr.attr, | |
9431996f JH |
1807 | NULL |
1808 | }; | |
1809 | ||
73ce48f6 JH |
1810 | static const struct attribute_group dme1737_pwm_chmod_group[] = { |
1811 | { .attrs = dme1737_pwm1_chmod_attr }, | |
1812 | { .attrs = dme1737_pwm2_chmod_attr }, | |
1813 | { .attrs = dme1737_pwm3_chmod_attr }, | |
9431996f | 1814 | { .attrs = NULL }, |
73ce48f6 JH |
1815 | { .attrs = dme1737_pwm5_chmod_attr }, |
1816 | { .attrs = dme1737_pwm6_chmod_attr }, | |
9431996f JH |
1817 | }; |
1818 | ||
1819 | /* Pwm[1-3] are read-writeable if the associated pwm is in manual mode and the | |
1820 | * chip is not locked. Otherwise they are read-only. */ | |
73ce48f6 | 1821 | static struct attribute *dme1737_pwm_chmod_attr[] = { |
9431996f JH |
1822 | &sensor_dev_attr_pwm1.dev_attr.attr, |
1823 | &sensor_dev_attr_pwm2.dev_attr.attr, | |
1824 | &sensor_dev_attr_pwm3.dev_attr.attr, | |
1825 | }; | |
1826 | ||
1827 | /* --------------------------------------------------------------------- | |
1828 | * Super-IO functions | |
1829 | * --------------------------------------------------------------------- */ | |
1830 | ||
b237eb25 JH |
1831 | static inline void dme1737_sio_enter(int sio_cip) |
1832 | { | |
1833 | outb(0x55, sio_cip); | |
1834 | } | |
1835 | ||
1836 | static inline void dme1737_sio_exit(int sio_cip) | |
1837 | { | |
1838 | outb(0xaa, sio_cip); | |
1839 | } | |
1840 | ||
9431996f JH |
1841 | static inline int dme1737_sio_inb(int sio_cip, int reg) |
1842 | { | |
1843 | outb(reg, sio_cip); | |
1844 | return inb(sio_cip + 1); | |
1845 | } | |
1846 | ||
1847 | static inline void dme1737_sio_outb(int sio_cip, int reg, int val) | |
1848 | { | |
1849 | outb(reg, sio_cip); | |
1850 | outb(val, sio_cip + 1); | |
1851 | } | |
1852 | ||
9431996f | 1853 | /* --------------------------------------------------------------------- |
e95c237d | 1854 | * Device initialization |
9431996f JH |
1855 | * --------------------------------------------------------------------- */ |
1856 | ||
67e2f328 | 1857 | static int dme1737_i2c_get_features(int, struct dme1737_data*); |
9431996f | 1858 | |
b237eb25 | 1859 | static void dme1737_chmod_file(struct device *dev, |
9431996f JH |
1860 | struct attribute *attr, mode_t mode) |
1861 | { | |
b237eb25 JH |
1862 | if (sysfs_chmod_file(&dev->kobj, attr, mode)) { |
1863 | dev_warn(dev, "Failed to change permissions of %s.\n", | |
9431996f JH |
1864 | attr->name); |
1865 | } | |
1866 | } | |
1867 | ||
b237eb25 | 1868 | static void dme1737_chmod_group(struct device *dev, |
9431996f JH |
1869 | const struct attribute_group *group, |
1870 | mode_t mode) | |
1871 | { | |
1872 | struct attribute **attr; | |
1873 | ||
1874 | for (attr = group->attrs; *attr; attr++) { | |
b237eb25 | 1875 | dme1737_chmod_file(dev, *attr, mode); |
9431996f JH |
1876 | } |
1877 | } | |
1878 | ||
b237eb25 | 1879 | static void dme1737_remove_files(struct device *dev) |
9431996f | 1880 | { |
b237eb25 JH |
1881 | struct dme1737_data *data = dev_get_drvdata(dev); |
1882 | int ix; | |
1883 | ||
1884 | for (ix = 0; ix < ARRAY_SIZE(dme1737_fan_group); ix++) { | |
1885 | if (data->has_fan & (1 << ix)) { | |
1886 | sysfs_remove_group(&dev->kobj, | |
1887 | &dme1737_fan_group[ix]); | |
1888 | } | |
1889 | } | |
1890 | ||
1891 | for (ix = 0; ix < ARRAY_SIZE(dme1737_pwm_group); ix++) { | |
1892 | if (data->has_pwm & (1 << ix)) { | |
1893 | sysfs_remove_group(&dev->kobj, | |
1894 | &dme1737_pwm_group[ix]); | |
549edb83 JH |
1895 | if (data->type != sch5027 && ix < 3) { |
1896 | sysfs_remove_file(&dev->kobj, | |
1897 | dme1737_pwm_misc_attr[ix]); | |
1898 | } | |
b237eb25 JH |
1899 | } |
1900 | } | |
1901 | ||
549edb83 JH |
1902 | if (data->type != sch5027) { |
1903 | sysfs_remove_group(&dev->kobj, &dme1737_misc_group); | |
1904 | } | |
1905 | ||
b237eb25 | 1906 | sysfs_remove_group(&dev->kobj, &dme1737_group); |
e95c237d | 1907 | |
dbc2bc25 | 1908 | if (!data->client) { |
e95c237d JH |
1909 | sysfs_remove_file(&dev->kobj, &dev_attr_name.attr); |
1910 | } | |
b237eb25 JH |
1911 | } |
1912 | ||
1913 | static int dme1737_create_files(struct device *dev) | |
1914 | { | |
1915 | struct dme1737_data *data = dev_get_drvdata(dev); | |
1916 | int err, ix; | |
1917 | ||
e95c237d | 1918 | /* Create a name attribute for ISA devices */ |
dbc2bc25 | 1919 | if (!data->client && |
e95c237d JH |
1920 | (err = sysfs_create_file(&dev->kobj, &dev_attr_name.attr))) { |
1921 | goto exit; | |
1922 | } | |
1923 | ||
b237eb25 JH |
1924 | /* Create standard sysfs attributes */ |
1925 | if ((err = sysfs_create_group(&dev->kobj, &dme1737_group))) { | |
e95c237d | 1926 | goto exit_remove; |
b237eb25 JH |
1927 | } |
1928 | ||
549edb83 JH |
1929 | /* Create misc sysfs attributes */ |
1930 | if ((data->type != sch5027) && | |
1931 | (err = sysfs_create_group(&dev->kobj, | |
1932 | &dme1737_misc_group))) { | |
1933 | goto exit_remove; | |
1934 | } | |
1935 | ||
b237eb25 JH |
1936 | /* Create fan sysfs attributes */ |
1937 | for (ix = 0; ix < ARRAY_SIZE(dme1737_fan_group); ix++) { | |
1938 | if (data->has_fan & (1 << ix)) { | |
1939 | if ((err = sysfs_create_group(&dev->kobj, | |
1940 | &dme1737_fan_group[ix]))) { | |
1941 | goto exit_remove; | |
1942 | } | |
1943 | } | |
1944 | } | |
1945 | ||
1946 | /* Create PWM sysfs attributes */ | |
1947 | for (ix = 0; ix < ARRAY_SIZE(dme1737_pwm_group); ix++) { | |
1948 | if (data->has_pwm & (1 << ix)) { | |
1949 | if ((err = sysfs_create_group(&dev->kobj, | |
1950 | &dme1737_pwm_group[ix]))) { | |
1951 | goto exit_remove; | |
1952 | } | |
549edb83 JH |
1953 | if (data->type != sch5027 && ix < 3 && |
1954 | (err = sysfs_create_file(&dev->kobj, | |
1955 | dme1737_pwm_misc_attr[ix]))) { | |
1956 | goto exit_remove; | |
1957 | } | |
b237eb25 JH |
1958 | } |
1959 | } | |
1960 | ||
1961 | /* Inform if the device is locked. Otherwise change the permissions of | |
1962 | * selected attributes from read-only to read-writeable. */ | |
1963 | if (data->config & 0x02) { | |
1964 | dev_info(dev, "Device is locked. Some attributes " | |
1965 | "will be read-only.\n"); | |
1966 | } else { | |
549edb83 JH |
1967 | /* Change permissions of zone sysfs attributes */ |
1968 | dme1737_chmod_group(dev, &dme1737_zone_chmod_group, | |
b237eb25 JH |
1969 | S_IRUGO | S_IWUSR); |
1970 | ||
549edb83 JH |
1971 | /* Change permissions of misc sysfs attributes */ |
1972 | if (data->type != sch5027) { | |
1973 | dme1737_chmod_group(dev, &dme1737_misc_group, | |
1974 | S_IRUGO | S_IWUSR); | |
1975 | } | |
1976 | ||
73ce48f6 JH |
1977 | /* Change permissions of PWM sysfs attributes */ |
1978 | for (ix = 0; ix < ARRAY_SIZE(dme1737_pwm_chmod_group); ix++) { | |
b237eb25 JH |
1979 | if (data->has_pwm & (1 << ix)) { |
1980 | dme1737_chmod_group(dev, | |
73ce48f6 | 1981 | &dme1737_pwm_chmod_group[ix], |
b237eb25 | 1982 | S_IRUGO | S_IWUSR); |
549edb83 JH |
1983 | if (data->type != sch5027 && ix < 3) { |
1984 | dme1737_chmod_file(dev, | |
1985 | dme1737_pwm_misc_attr[ix], | |
1986 | S_IRUGO | S_IWUSR); | |
1987 | } | |
b237eb25 JH |
1988 | } |
1989 | } | |
1990 | ||
1991 | /* Change permissions of pwm[1-3] if in manual mode */ | |
1992 | for (ix = 0; ix < 3; ix++) { | |
1993 | if ((data->has_pwm & (1 << ix)) && | |
1994 | (PWM_EN_FROM_REG(data->pwm_config[ix]) == 1)) { | |
1995 | dme1737_chmod_file(dev, | |
73ce48f6 | 1996 | dme1737_pwm_chmod_attr[ix], |
b237eb25 JH |
1997 | S_IRUGO | S_IWUSR); |
1998 | } | |
1999 | } | |
2000 | } | |
2001 | ||
2002 | return 0; | |
2003 | ||
2004 | exit_remove: | |
2005 | dme1737_remove_files(dev); | |
2006 | exit: | |
2007 | return err; | |
2008 | } | |
2009 | ||
2010 | static int dme1737_init_device(struct device *dev) | |
2011 | { | |
2012 | struct dme1737_data *data = dev_get_drvdata(dev); | |
dbc2bc25 | 2013 | struct i2c_client *client = data->client; |
9431996f JH |
2014 | int ix; |
2015 | u8 reg; | |
2016 | ||
549edb83 JH |
2017 | /* Point to the right nominal voltages array */ |
2018 | data->in_nominal = IN_NOMINAL(data->type); | |
2019 | ||
dbc2bc25 | 2020 | data->config = dme1737_read(data, DME1737_REG_CONFIG); |
b237eb25 JH |
2021 | /* Inform if part is not monitoring/started */ |
2022 | if (!(data->config & 0x01)) { | |
2023 | if (!force_start) { | |
2024 | dev_err(dev, "Device is not monitoring. " | |
2025 | "Use the force_start load parameter to " | |
2026 | "override.\n"); | |
2027 | return -EFAULT; | |
2028 | } | |
2029 | ||
2030 | /* Force monitoring */ | |
2031 | data->config |= 0x01; | |
dbc2bc25 | 2032 | dme1737_write(data, DME1737_REG_CONFIG, data->config); |
b237eb25 | 2033 | } |
9431996f JH |
2034 | /* Inform if part is not ready */ |
2035 | if (!(data->config & 0x04)) { | |
b237eb25 | 2036 | dev_err(dev, "Device is not ready.\n"); |
9431996f JH |
2037 | return -EFAULT; |
2038 | } | |
2039 | ||
e95c237d | 2040 | /* Determine which optional fan and pwm features are enabled/present */ |
dbc2bc25 JD |
2041 | if (client) { /* I2C chip */ |
2042 | data->config2 = dme1737_read(data, DME1737_REG_CONFIG2); | |
e95c237d JH |
2043 | /* Check if optional fan3 input is enabled */ |
2044 | if (data->config2 & 0x04) { | |
2045 | data->has_fan |= (1 << 2); | |
2046 | } | |
9431996f | 2047 | |
e95c237d JH |
2048 | /* Fan4 and pwm3 are only available if the client's I2C address |
2049 | * is the default 0x2e. Otherwise the I/Os associated with | |
2050 | * these functions are used for addr enable/select. */ | |
dbc2bc25 | 2051 | if (client->addr == 0x2e) { |
e95c237d JH |
2052 | data->has_fan |= (1 << 3); |
2053 | data->has_pwm |= (1 << 2); | |
2054 | } | |
9431996f | 2055 | |
e95c237d JH |
2056 | /* Determine which of the optional fan[5-6] and pwm[5-6] |
2057 | * features are enabled. For this, we need to query the runtime | |
2058 | * registers through the Super-IO LPC interface. Try both | |
2059 | * config ports 0x2e and 0x4e. */ | |
2060 | if (dme1737_i2c_get_features(0x2e, data) && | |
2061 | dme1737_i2c_get_features(0x4e, data)) { | |
2062 | dev_warn(dev, "Failed to query Super-IO for optional " | |
2063 | "features.\n"); | |
2064 | } | |
2065 | } else { /* ISA chip */ | |
2066 | /* Fan3 and pwm3 are always available. Fan[4-5] and pwm[5-6] | |
2067 | * don't exist in the ISA chip. */ | |
2068 | data->has_fan |= (1 << 2); | |
2069 | data->has_pwm |= (1 << 2); | |
9431996f JH |
2070 | } |
2071 | ||
2072 | /* Fan1, fan2, pwm1, and pwm2 are always present */ | |
2073 | data->has_fan |= 0x03; | |
2074 | data->has_pwm |= 0x03; | |
2075 | ||
b237eb25 | 2076 | dev_info(dev, "Optional features: pwm3=%s, pwm5=%s, pwm6=%s, " |
9431996f JH |
2077 | "fan3=%s, fan4=%s, fan5=%s, fan6=%s.\n", |
2078 | (data->has_pwm & (1 << 2)) ? "yes" : "no", | |
2079 | (data->has_pwm & (1 << 4)) ? "yes" : "no", | |
2080 | (data->has_pwm & (1 << 5)) ? "yes" : "no", | |
2081 | (data->has_fan & (1 << 2)) ? "yes" : "no", | |
2082 | (data->has_fan & (1 << 3)) ? "yes" : "no", | |
2083 | (data->has_fan & (1 << 4)) ? "yes" : "no", | |
2084 | (data->has_fan & (1 << 5)) ? "yes" : "no"); | |
2085 | ||
dbc2bc25 | 2086 | reg = dme1737_read(data, DME1737_REG_TACH_PWM); |
9431996f | 2087 | /* Inform if fan-to-pwm mapping differs from the default */ |
dbc2bc25 | 2088 | if (client && reg != 0xa4) { /* I2C chip */ |
b237eb25 | 2089 | dev_warn(dev, "Non-standard fan to pwm mapping: " |
9431996f JH |
2090 | "fan1->pwm%d, fan2->pwm%d, fan3->pwm%d, " |
2091 | "fan4->pwm%d. Please report to the driver " | |
2092 | "maintainer.\n", | |
2093 | (reg & 0x03) + 1, ((reg >> 2) & 0x03) + 1, | |
2094 | ((reg >> 4) & 0x03) + 1, ((reg >> 6) & 0x03) + 1); | |
dbc2bc25 | 2095 | } else if (!client && reg != 0x24) { /* ISA chip */ |
e95c237d JH |
2096 | dev_warn(dev, "Non-standard fan to pwm mapping: " |
2097 | "fan1->pwm%d, fan2->pwm%d, fan3->pwm%d. " | |
2098 | "Please report to the driver maintainer.\n", | |
2099 | (reg & 0x03) + 1, ((reg >> 2) & 0x03) + 1, | |
2100 | ((reg >> 4) & 0x03) + 1); | |
9431996f JH |
2101 | } |
2102 | ||
2103 | /* Switch pwm[1-3] to manual mode if they are currently disabled and | |
2104 | * set the duty-cycles to 0% (which is identical to the PWMs being | |
2105 | * disabled). */ | |
2106 | if (!(data->config & 0x02)) { | |
2107 | for (ix = 0; ix < 3; ix++) { | |
dbc2bc25 | 2108 | data->pwm_config[ix] = dme1737_read(data, |
9431996f JH |
2109 | DME1737_REG_PWM_CONFIG(ix)); |
2110 | if ((data->has_pwm & (1 << ix)) && | |
2111 | (PWM_EN_FROM_REG(data->pwm_config[ix]) == -1)) { | |
b237eb25 | 2112 | dev_info(dev, "Switching pwm%d to " |
9431996f JH |
2113 | "manual mode.\n", ix + 1); |
2114 | data->pwm_config[ix] = PWM_EN_TO_REG(1, | |
2115 | data->pwm_config[ix]); | |
dbc2bc25 JD |
2116 | dme1737_write(data, DME1737_REG_PWM(ix), 0); |
2117 | dme1737_write(data, | |
9431996f JH |
2118 | DME1737_REG_PWM_CONFIG(ix), |
2119 | data->pwm_config[ix]); | |
2120 | } | |
2121 | } | |
2122 | } | |
2123 | ||
2124 | /* Initialize the default PWM auto channels zone (acz) assignments */ | |
2125 | data->pwm_acz[0] = 1; /* pwm1 -> zone1 */ | |
2126 | data->pwm_acz[1] = 2; /* pwm2 -> zone2 */ | |
2127 | data->pwm_acz[2] = 4; /* pwm3 -> zone3 */ | |
2128 | ||
2129 | /* Set VRM */ | |
549edb83 JH |
2130 | if (data->type != sch5027) { |
2131 | data->vrm = vid_which_vrm(); | |
2132 | } | |
9431996f JH |
2133 | |
2134 | return 0; | |
2135 | } | |
2136 | ||
67e2f328 JH |
2137 | /* --------------------------------------------------------------------- |
2138 | * I2C device detection and registration | |
2139 | * --------------------------------------------------------------------- */ | |
2140 | ||
2141 | static struct i2c_driver dme1737_i2c_driver; | |
2142 | ||
2143 | static int dme1737_i2c_get_features(int sio_cip, struct dme1737_data *data) | |
2144 | { | |
2145 | int err = 0, reg; | |
2146 | u16 addr; | |
2147 | ||
2148 | dme1737_sio_enter(sio_cip); | |
2149 | ||
2150 | /* Check device ID | |
549edb83 JH |
2151 | * The DME1737 can return either 0x78 or 0x77 as its device ID. |
2152 | * The SCH5027 returns 0x89 as its device ID. */ | |
345a2224 | 2153 | reg = force_id ? force_id : dme1737_sio_inb(sio_cip, 0x20); |
549edb83 | 2154 | if (!(reg == 0x77 || reg == 0x78 || reg == 0x89)) { |
67e2f328 JH |
2155 | err = -ENODEV; |
2156 | goto exit; | |
2157 | } | |
2158 | ||
2159 | /* Select logical device A (runtime registers) */ | |
2160 | dme1737_sio_outb(sio_cip, 0x07, 0x0a); | |
2161 | ||
2162 | /* Get the base address of the runtime registers */ | |
2163 | if (!(addr = (dme1737_sio_inb(sio_cip, 0x60) << 8) | | |
2164 | dme1737_sio_inb(sio_cip, 0x61))) { | |
2165 | err = -ENODEV; | |
2166 | goto exit; | |
2167 | } | |
2168 | ||
2169 | /* Read the runtime registers to determine which optional features | |
2170 | * are enabled and available. Bits [3:2] of registers 0x43-0x46 are set | |
2171 | * to '10' if the respective feature is enabled. */ | |
2172 | if ((inb(addr + 0x43) & 0x0c) == 0x08) { /* fan6 */ | |
2173 | data->has_fan |= (1 << 5); | |
2174 | } | |
2175 | if ((inb(addr + 0x44) & 0x0c) == 0x08) { /* pwm6 */ | |
2176 | data->has_pwm |= (1 << 5); | |
2177 | } | |
2178 | if ((inb(addr + 0x45) & 0x0c) == 0x08) { /* fan5 */ | |
2179 | data->has_fan |= (1 << 4); | |
2180 | } | |
2181 | if ((inb(addr + 0x46) & 0x0c) == 0x08) { /* pwm5 */ | |
2182 | data->has_pwm |= (1 << 4); | |
2183 | } | |
2184 | ||
2185 | exit: | |
2186 | dme1737_sio_exit(sio_cip); | |
2187 | ||
2188 | return err; | |
2189 | } | |
2190 | ||
b237eb25 JH |
2191 | static int dme1737_i2c_detect(struct i2c_adapter *adapter, int address, |
2192 | int kind) | |
9431996f JH |
2193 | { |
2194 | u8 company, verstep = 0; | |
2195 | struct i2c_client *client; | |
2196 | struct dme1737_data *data; | |
b237eb25 JH |
2197 | struct device *dev; |
2198 | int err = 0; | |
9431996f JH |
2199 | const char *name; |
2200 | ||
2201 | if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { | |
2202 | goto exit; | |
2203 | } | |
2204 | ||
2205 | if (!(data = kzalloc(sizeof(struct dme1737_data), GFP_KERNEL))) { | |
2206 | err = -ENOMEM; | |
2207 | goto exit; | |
2208 | } | |
2209 | ||
dbc2bc25 JD |
2210 | client = &data->_client; |
2211 | data->client = client; | |
9431996f JH |
2212 | i2c_set_clientdata(client, data); |
2213 | client->addr = address; | |
2214 | client->adapter = adapter; | |
b237eb25 JH |
2215 | client->driver = &dme1737_i2c_driver; |
2216 | dev = &client->dev; | |
9431996f JH |
2217 | |
2218 | /* A negative kind means that the driver was loaded with no force | |
2219 | * parameter (default), so we must identify the chip. */ | |
2220 | if (kind < 0) { | |
dbc2bc25 JD |
2221 | company = dme1737_read(data, DME1737_REG_COMPANY); |
2222 | verstep = dme1737_read(data, DME1737_REG_VERSTEP); | |
9431996f | 2223 | |
549edb83 JH |
2224 | if (company == DME1737_COMPANY_SMSC && |
2225 | (verstep & DME1737_VERSTEP_MASK) == DME1737_VERSTEP) { | |
2226 | kind = dme1737; | |
2227 | } else if (company == DME1737_COMPANY_SMSC && | |
2228 | verstep == SCH5027_VERSTEP) { | |
2229 | kind = sch5027; | |
2230 | } else { | |
9431996f JH |
2231 | err = -ENODEV; |
2232 | goto exit_kfree; | |
2233 | } | |
2234 | } | |
2235 | ||
549edb83 JH |
2236 | if (kind == sch5027) { |
2237 | name = "sch5027"; | |
2238 | } else { | |
2239 | kind = dme1737; | |
2240 | name = "dme1737"; | |
2241 | } | |
f994fb23 | 2242 | data->type = kind; |
9431996f JH |
2243 | |
2244 | /* Fill in the remaining client fields and put it into the global | |
2245 | * list */ | |
2246 | strlcpy(client->name, name, I2C_NAME_SIZE); | |
dbc2bc25 | 2247 | data->name = client->name; |
9431996f JH |
2248 | mutex_init(&data->update_lock); |
2249 | ||
2250 | /* Tell the I2C layer a new client has arrived */ | |
2251 | if ((err = i2c_attach_client(client))) { | |
2252 | goto exit_kfree; | |
2253 | } | |
2254 | ||
549edb83 JH |
2255 | dev_info(dev, "Found a %s chip at 0x%02x (rev 0x%02x).\n", |
2256 | kind == sch5027 ? "SCH5027" : "DME1737", client->addr, | |
2257 | verstep); | |
b237eb25 | 2258 | |
9431996f | 2259 | /* Initialize the DME1737 chip */ |
b237eb25 JH |
2260 | if ((err = dme1737_init_device(dev))) { |
2261 | dev_err(dev, "Failed to initialize device.\n"); | |
9431996f JH |
2262 | goto exit_detach; |
2263 | } | |
2264 | ||
b237eb25 JH |
2265 | /* Create sysfs files */ |
2266 | if ((err = dme1737_create_files(dev))) { | |
2267 | dev_err(dev, "Failed to create sysfs files.\n"); | |
2268 | goto exit_detach; | |
9431996f JH |
2269 | } |
2270 | ||
2271 | /* Register device */ | |
62ee3e10 | 2272 | data->hwmon_dev = hwmon_device_register(dev); |
1beeffe4 | 2273 | if (IS_ERR(data->hwmon_dev)) { |
b237eb25 | 2274 | dev_err(dev, "Failed to register device.\n"); |
1beeffe4 | 2275 | err = PTR_ERR(data->hwmon_dev); |
9431996f JH |
2276 | goto exit_remove; |
2277 | } | |
2278 | ||
9431996f JH |
2279 | return 0; |
2280 | ||
2281 | exit_remove: | |
b237eb25 | 2282 | dme1737_remove_files(dev); |
9431996f JH |
2283 | exit_detach: |
2284 | i2c_detach_client(client); | |
2285 | exit_kfree: | |
2286 | kfree(data); | |
2287 | exit: | |
2288 | return err; | |
2289 | } | |
2290 | ||
b237eb25 | 2291 | static int dme1737_i2c_attach_adapter(struct i2c_adapter *adapter) |
9431996f JH |
2292 | { |
2293 | if (!(adapter->class & I2C_CLASS_HWMON)) { | |
2294 | return 0; | |
2295 | } | |
2296 | ||
b237eb25 | 2297 | return i2c_probe(adapter, &addr_data, dme1737_i2c_detect); |
9431996f JH |
2298 | } |
2299 | ||
b237eb25 | 2300 | static int dme1737_i2c_detach_client(struct i2c_client *client) |
9431996f JH |
2301 | { |
2302 | struct dme1737_data *data = i2c_get_clientdata(client); | |
b237eb25 | 2303 | int err; |
9431996f | 2304 | |
1beeffe4 | 2305 | hwmon_device_unregister(data->hwmon_dev); |
b237eb25 | 2306 | dme1737_remove_files(&client->dev); |
9431996f JH |
2307 | |
2308 | if ((err = i2c_detach_client(client))) { | |
2309 | return err; | |
2310 | } | |
2311 | ||
2312 | kfree(data); | |
2313 | return 0; | |
2314 | } | |
2315 | ||
b237eb25 | 2316 | static struct i2c_driver dme1737_i2c_driver = { |
9431996f JH |
2317 | .driver = { |
2318 | .name = "dme1737", | |
2319 | }, | |
b237eb25 JH |
2320 | .attach_adapter = dme1737_i2c_attach_adapter, |
2321 | .detach_client = dme1737_i2c_detach_client, | |
9431996f JH |
2322 | }; |
2323 | ||
e95c237d JH |
2324 | /* --------------------------------------------------------------------- |
2325 | * ISA device detection and registration | |
2326 | * --------------------------------------------------------------------- */ | |
2327 | ||
2328 | static int __init dme1737_isa_detect(int sio_cip, unsigned short *addr) | |
2329 | { | |
2330 | int err = 0, reg; | |
2331 | unsigned short base_addr; | |
2332 | ||
2333 | dme1737_sio_enter(sio_cip); | |
2334 | ||
2335 | /* Check device ID | |
2336 | * We currently know about SCH3112 (0x7c), SCH3114 (0x7d), and | |
2337 | * SCH3116 (0x7f). */ | |
67b671bc | 2338 | reg = force_id ? force_id : dme1737_sio_inb(sio_cip, 0x20); |
e95c237d JH |
2339 | if (!(reg == 0x7c || reg == 0x7d || reg == 0x7f)) { |
2340 | err = -ENODEV; | |
2341 | goto exit; | |
2342 | } | |
2343 | ||
2344 | /* Select logical device A (runtime registers) */ | |
2345 | dme1737_sio_outb(sio_cip, 0x07, 0x0a); | |
2346 | ||
2347 | /* Get the base address of the runtime registers */ | |
2348 | if (!(base_addr = (dme1737_sio_inb(sio_cip, 0x60) << 8) | | |
2349 | dme1737_sio_inb(sio_cip, 0x61))) { | |
2350 | printk(KERN_ERR "dme1737: Base address not set.\n"); | |
2351 | err = -ENODEV; | |
2352 | goto exit; | |
2353 | } | |
2354 | ||
2355 | /* Access to the hwmon registers is through an index/data register | |
2356 | * pair located at offset 0x70/0x71. */ | |
2357 | *addr = base_addr + 0x70; | |
2358 | ||
2359 | exit: | |
2360 | dme1737_sio_exit(sio_cip); | |
2361 | return err; | |
2362 | } | |
2363 | ||
2364 | static int __init dme1737_isa_device_add(unsigned short addr) | |
2365 | { | |
2366 | struct resource res = { | |
2367 | .start = addr, | |
2368 | .end = addr + DME1737_EXTENT - 1, | |
2369 | .name = "dme1737", | |
2370 | .flags = IORESOURCE_IO, | |
2371 | }; | |
2372 | int err; | |
2373 | ||
2374 | if (!(pdev = platform_device_alloc("dme1737", addr))) { | |
2375 | printk(KERN_ERR "dme1737: Failed to allocate device.\n"); | |
2376 | err = -ENOMEM; | |
2377 | goto exit; | |
2378 | } | |
2379 | ||
2380 | if ((err = platform_device_add_resources(pdev, &res, 1))) { | |
2381 | printk(KERN_ERR "dme1737: Failed to add device resource " | |
2382 | "(err = %d).\n", err); | |
2383 | goto exit_device_put; | |
2384 | } | |
2385 | ||
2386 | if ((err = platform_device_add(pdev))) { | |
2387 | printk(KERN_ERR "dme1737: Failed to add device (err = %d).\n", | |
2388 | err); | |
2389 | goto exit_device_put; | |
2390 | } | |
2391 | ||
2392 | return 0; | |
2393 | ||
2394 | exit_device_put: | |
2395 | platform_device_put(pdev); | |
2396 | pdev = NULL; | |
2397 | exit: | |
2398 | return err; | |
2399 | } | |
2400 | ||
2401 | static int __devinit dme1737_isa_probe(struct platform_device *pdev) | |
2402 | { | |
2403 | u8 company, device; | |
2404 | struct resource *res; | |
e95c237d JH |
2405 | struct dme1737_data *data; |
2406 | struct device *dev = &pdev->dev; | |
2407 | int err; | |
2408 | ||
2409 | res = platform_get_resource(pdev, IORESOURCE_IO, 0); | |
2410 | if (!request_region(res->start, DME1737_EXTENT, "dme1737")) { | |
2411 | dev_err(dev, "Failed to request region 0x%04x-0x%04x.\n", | |
2412 | (unsigned short)res->start, | |
2413 | (unsigned short)res->start + DME1737_EXTENT - 1); | |
2414 | err = -EBUSY; | |
2415 | goto exit; | |
2416 | } | |
2417 | ||
2418 | if (!(data = kzalloc(sizeof(struct dme1737_data), GFP_KERNEL))) { | |
2419 | err = -ENOMEM; | |
2420 | goto exit_release_region; | |
2421 | } | |
2422 | ||
dbc2bc25 | 2423 | data->addr = res->start; |
e95c237d JH |
2424 | platform_set_drvdata(pdev, data); |
2425 | ||
55d68d75 JH |
2426 | /* Skip chip detection if module is loaded with force_id parameter */ |
2427 | if (!force_id) { | |
dbc2bc25 JD |
2428 | company = dme1737_read(data, DME1737_REG_COMPANY); |
2429 | device = dme1737_read(data, DME1737_REG_DEVICE); | |
e95c237d | 2430 | |
55d68d75 JH |
2431 | if (!((company == DME1737_COMPANY_SMSC) && |
2432 | (device == SCH311X_DEVICE))) { | |
2433 | err = -ENODEV; | |
2434 | goto exit_kfree; | |
2435 | } | |
e95c237d | 2436 | } |
549edb83 | 2437 | data->type = sch311x; |
e95c237d JH |
2438 | |
2439 | /* Fill in the remaining client fields and initialize the mutex */ | |
dbc2bc25 | 2440 | data->name = "sch311x"; |
e95c237d JH |
2441 | mutex_init(&data->update_lock); |
2442 | ||
dbc2bc25 | 2443 | dev_info(dev, "Found a SCH311x chip at 0x%04x\n", data->addr); |
e95c237d JH |
2444 | |
2445 | /* Initialize the chip */ | |
2446 | if ((err = dme1737_init_device(dev))) { | |
2447 | dev_err(dev, "Failed to initialize device.\n"); | |
2448 | goto exit_kfree; | |
2449 | } | |
2450 | ||
2451 | /* Create sysfs files */ | |
2452 | if ((err = dme1737_create_files(dev))) { | |
2453 | dev_err(dev, "Failed to create sysfs files.\n"); | |
2454 | goto exit_kfree; | |
2455 | } | |
2456 | ||
2457 | /* Register device */ | |
2458 | data->hwmon_dev = hwmon_device_register(dev); | |
2459 | if (IS_ERR(data->hwmon_dev)) { | |
2460 | dev_err(dev, "Failed to register device.\n"); | |
2461 | err = PTR_ERR(data->hwmon_dev); | |
2462 | goto exit_remove_files; | |
2463 | } | |
2464 | ||
2465 | return 0; | |
2466 | ||
2467 | exit_remove_files: | |
2468 | dme1737_remove_files(dev); | |
2469 | exit_kfree: | |
2470 | platform_set_drvdata(pdev, NULL); | |
2471 | kfree(data); | |
2472 | exit_release_region: | |
2473 | release_region(res->start, DME1737_EXTENT); | |
2474 | exit: | |
2475 | return err; | |
2476 | } | |
2477 | ||
2478 | static int __devexit dme1737_isa_remove(struct platform_device *pdev) | |
2479 | { | |
2480 | struct dme1737_data *data = platform_get_drvdata(pdev); | |
2481 | ||
2482 | hwmon_device_unregister(data->hwmon_dev); | |
2483 | dme1737_remove_files(&pdev->dev); | |
dbc2bc25 | 2484 | release_region(data->addr, DME1737_EXTENT); |
e95c237d JH |
2485 | platform_set_drvdata(pdev, NULL); |
2486 | kfree(data); | |
2487 | ||
2488 | return 0; | |
2489 | } | |
2490 | ||
2491 | static struct platform_driver dme1737_isa_driver = { | |
2492 | .driver = { | |
2493 | .owner = THIS_MODULE, | |
2494 | .name = "dme1737", | |
2495 | }, | |
2496 | .probe = dme1737_isa_probe, | |
2497 | .remove = __devexit_p(dme1737_isa_remove), | |
2498 | }; | |
2499 | ||
67e2f328 JH |
2500 | /* --------------------------------------------------------------------- |
2501 | * Module initialization and cleanup | |
2502 | * --------------------------------------------------------------------- */ | |
2503 | ||
9431996f JH |
2504 | static int __init dme1737_init(void) |
2505 | { | |
e95c237d JH |
2506 | int err; |
2507 | unsigned short addr; | |
2508 | ||
2509 | if ((err = i2c_add_driver(&dme1737_i2c_driver))) { | |
2510 | goto exit; | |
2511 | } | |
2512 | ||
2513 | if (dme1737_isa_detect(0x2e, &addr) && | |
92430b6f JH |
2514 | dme1737_isa_detect(0x4e, &addr) && |
2515 | (!probe_all_addr || | |
2516 | (dme1737_isa_detect(0x162e, &addr) && | |
2517 | dme1737_isa_detect(0x164e, &addr)))) { | |
e95c237d JH |
2518 | /* Return 0 if we didn't find an ISA device */ |
2519 | return 0; | |
2520 | } | |
2521 | ||
2522 | if ((err = platform_driver_register(&dme1737_isa_driver))) { | |
2523 | goto exit_del_i2c_driver; | |
2524 | } | |
2525 | ||
2526 | /* Sets global pdev as a side effect */ | |
2527 | if ((err = dme1737_isa_device_add(addr))) { | |
2528 | goto exit_del_isa_driver; | |
2529 | } | |
2530 | ||
2531 | return 0; | |
2532 | ||
2533 | exit_del_isa_driver: | |
2534 | platform_driver_unregister(&dme1737_isa_driver); | |
2535 | exit_del_i2c_driver: | |
2536 | i2c_del_driver(&dme1737_i2c_driver); | |
2537 | exit: | |
2538 | return err; | |
9431996f JH |
2539 | } |
2540 | ||
2541 | static void __exit dme1737_exit(void) | |
2542 | { | |
e95c237d JH |
2543 | if (pdev) { |
2544 | platform_device_unregister(pdev); | |
2545 | platform_driver_unregister(&dme1737_isa_driver); | |
2546 | } | |
2547 | ||
b237eb25 | 2548 | i2c_del_driver(&dme1737_i2c_driver); |
9431996f JH |
2549 | } |
2550 | ||
2551 | MODULE_AUTHOR("Juerg Haefliger <juergh@gmail.com>"); | |
2552 | MODULE_DESCRIPTION("DME1737 sensors"); | |
2553 | MODULE_LICENSE("GPL"); | |
2554 | ||
2555 | module_init(dme1737_init); | |
2556 | module_exit(dme1737_exit); |