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e53004e2 JD |
1 | /* |
2 | * f71805f.c - driver for the Fintek F71805F/FG Super-I/O chip integrated | |
3 | * hardware monitoring features | |
4 | * Copyright (C) 2005 Jean Delvare <khali@linux-fr.org> | |
5 | * | |
6 | * The F71805F/FG is a LPC Super-I/O chip made by Fintek. It integrates | |
7 | * complete hardware monitoring features: voltage, fan and temperature | |
8 | * sensors, and manual and automatic fan speed control. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; either version 2 of the License, or | |
13 | * (at your option) any later version. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, | |
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | * GNU General Public License for more details. | |
19 | * | |
20 | * You should have received a copy of the GNU General Public License | |
21 | * along with this program; if not, write to the Free Software | |
22 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
23 | */ | |
24 | ||
25 | #include <linux/module.h> | |
26 | #include <linux/init.h> | |
27 | #include <linux/slab.h> | |
28 | #include <linux/jiffies.h> | |
29 | #include <linux/platform_device.h> | |
30 | #include <linux/hwmon.h> | |
31 | #include <linux/hwmon-sysfs.h> | |
32 | #include <linux/err.h> | |
f0819184 | 33 | #include <linux/mutex.h> |
e53004e2 JD |
34 | #include <asm/io.h> |
35 | ||
36 | static struct platform_device *pdev; | |
37 | ||
38 | #define DRVNAME "f71805f" | |
39 | ||
40 | /* | |
41 | * Super-I/O constants and functions | |
42 | */ | |
43 | ||
44 | #define F71805F_LD_HWM 0x04 | |
45 | ||
46 | #define SIO_REG_LDSEL 0x07 /* Logical device select */ | |
47 | #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */ | |
48 | #define SIO_REG_DEVREV 0x22 /* Device revision */ | |
49 | #define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */ | |
50 | #define SIO_REG_ENABLE 0x30 /* Logical device enable */ | |
51 | #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */ | |
52 | ||
53 | #define SIO_FINTEK_ID 0x1934 | |
54 | #define SIO_F71805F_ID 0x0406 | |
55 | ||
56 | static inline int | |
57 | superio_inb(int base, int reg) | |
58 | { | |
59 | outb(reg, base); | |
60 | return inb(base + 1); | |
61 | } | |
62 | ||
63 | static int | |
64 | superio_inw(int base, int reg) | |
65 | { | |
66 | int val; | |
67 | outb(reg++, base); | |
68 | val = inb(base + 1) << 8; | |
69 | outb(reg, base); | |
70 | val |= inb(base + 1); | |
71 | return val; | |
72 | } | |
73 | ||
74 | static inline void | |
75 | superio_select(int base, int ld) | |
76 | { | |
77 | outb(SIO_REG_LDSEL, base); | |
78 | outb(ld, base + 1); | |
79 | } | |
80 | ||
81 | static inline void | |
82 | superio_enter(int base) | |
83 | { | |
84 | outb(0x87, base); | |
85 | outb(0x87, base); | |
86 | } | |
87 | ||
88 | static inline void | |
89 | superio_exit(int base) | |
90 | { | |
91 | outb(0xaa, base); | |
92 | } | |
93 | ||
94 | /* | |
95 | * ISA constants | |
96 | */ | |
97 | ||
98 | #define REGION_LENGTH 2 | |
99 | #define ADDR_REG_OFFSET 0 | |
100 | #define DATA_REG_OFFSET 1 | |
101 | ||
e53004e2 JD |
102 | /* |
103 | * Registers | |
104 | */ | |
105 | ||
106 | /* in nr from 0 to 8 (8-bit values) */ | |
107 | #define F71805F_REG_IN(nr) (0x10 + (nr)) | |
108 | #define F71805F_REG_IN_HIGH(nr) (0x40 + 2 * (nr)) | |
109 | #define F71805F_REG_IN_LOW(nr) (0x41 + 2 * (nr)) | |
110 | /* fan nr from 0 to 2 (12-bit values, two registers) */ | |
111 | #define F71805F_REG_FAN(nr) (0x20 + 2 * (nr)) | |
112 | #define F71805F_REG_FAN_LOW(nr) (0x28 + 2 * (nr)) | |
113 | #define F71805F_REG_FAN_CTRL(nr) (0x60 + 16 * (nr)) | |
114 | /* temp nr from 0 to 2 (8-bit values) */ | |
115 | #define F71805F_REG_TEMP(nr) (0x1B + (nr)) | |
116 | #define F71805F_REG_TEMP_HIGH(nr) (0x54 + 2 * (nr)) | |
117 | #define F71805F_REG_TEMP_HYST(nr) (0x55 + 2 * (nr)) | |
118 | #define F71805F_REG_TEMP_MODE 0x01 | |
119 | ||
120 | #define F71805F_REG_START 0x00 | |
121 | /* status nr from 0 to 2 */ | |
122 | #define F71805F_REG_STATUS(nr) (0x36 + (nr)) | |
123 | ||
124 | /* | |
125 | * Data structures and manipulation thereof | |
126 | */ | |
127 | ||
128 | struct f71805f_data { | |
129 | unsigned short addr; | |
130 | const char *name; | |
f0819184 | 131 | struct mutex lock; |
e53004e2 JD |
132 | struct class_device *class_dev; |
133 | ||
f0819184 | 134 | struct mutex update_lock; |
e53004e2 JD |
135 | char valid; /* !=0 if following fields are valid */ |
136 | unsigned long last_updated; /* In jiffies */ | |
137 | unsigned long last_limits; /* In jiffies */ | |
138 | ||
139 | /* Register values */ | |
140 | u8 in[9]; | |
141 | u8 in_high[9]; | |
142 | u8 in_low[9]; | |
143 | u16 fan[3]; | |
144 | u16 fan_low[3]; | |
145 | u8 fan_enabled; /* Read once at init time */ | |
146 | u8 temp[3]; | |
147 | u8 temp_high[3]; | |
148 | u8 temp_hyst[3]; | |
149 | u8 temp_mode; | |
150 | u8 alarms[3]; | |
151 | }; | |
152 | ||
153 | static inline long in_from_reg(u8 reg) | |
154 | { | |
155 | return (reg * 8); | |
156 | } | |
157 | ||
158 | /* The 2 least significant bits are not used */ | |
159 | static inline u8 in_to_reg(long val) | |
160 | { | |
161 | if (val <= 0) | |
162 | return 0; | |
163 | if (val >= 2016) | |
164 | return 0xfc; | |
165 | return (((val + 16) / 32) << 2); | |
166 | } | |
167 | ||
168 | /* in0 is downscaled by a factor 2 internally */ | |
169 | static inline long in0_from_reg(u8 reg) | |
170 | { | |
171 | return (reg * 16); | |
172 | } | |
173 | ||
174 | static inline u8 in0_to_reg(long val) | |
175 | { | |
176 | if (val <= 0) | |
177 | return 0; | |
178 | if (val >= 4032) | |
179 | return 0xfc; | |
180 | return (((val + 32) / 64) << 2); | |
181 | } | |
182 | ||
183 | /* The 4 most significant bits are not used */ | |
184 | static inline long fan_from_reg(u16 reg) | |
185 | { | |
186 | reg &= 0xfff; | |
187 | if (!reg || reg == 0xfff) | |
188 | return 0; | |
189 | return (1500000 / reg); | |
190 | } | |
191 | ||
192 | static inline u16 fan_to_reg(long rpm) | |
193 | { | |
194 | /* If the low limit is set below what the chip can measure, | |
195 | store the largest possible 12-bit value in the registers, | |
196 | so that no alarm will ever trigger. */ | |
197 | if (rpm < 367) | |
198 | return 0xfff; | |
199 | return (1500000 / rpm); | |
200 | } | |
201 | ||
202 | static inline long temp_from_reg(u8 reg) | |
203 | { | |
204 | return (reg * 1000); | |
205 | } | |
206 | ||
207 | static inline u8 temp_to_reg(long val) | |
208 | { | |
209 | if (val < 0) | |
210 | val = 0; | |
211 | else if (val > 1000 * 0xff) | |
212 | val = 0xff; | |
213 | return ((val + 500) / 1000); | |
214 | } | |
215 | ||
216 | /* | |
217 | * Device I/O access | |
218 | */ | |
219 | ||
220 | static u8 f71805f_read8(struct f71805f_data *data, u8 reg) | |
221 | { | |
222 | u8 val; | |
223 | ||
f0819184 | 224 | mutex_lock(&data->lock); |
e53004e2 JD |
225 | outb(reg, data->addr + ADDR_REG_OFFSET); |
226 | val = inb(data->addr + DATA_REG_OFFSET); | |
f0819184 | 227 | mutex_unlock(&data->lock); |
e53004e2 JD |
228 | |
229 | return val; | |
230 | } | |
231 | ||
232 | static void f71805f_write8(struct f71805f_data *data, u8 reg, u8 val) | |
233 | { | |
f0819184 | 234 | mutex_lock(&data->lock); |
e53004e2 JD |
235 | outb(reg, data->addr + ADDR_REG_OFFSET); |
236 | outb(val, data->addr + DATA_REG_OFFSET); | |
f0819184 | 237 | mutex_unlock(&data->lock); |
e53004e2 JD |
238 | } |
239 | ||
240 | /* It is important to read the MSB first, because doing so latches the | |
241 | value of the LSB, so we are sure both bytes belong to the same value. */ | |
242 | static u16 f71805f_read16(struct f71805f_data *data, u8 reg) | |
243 | { | |
244 | u16 val; | |
245 | ||
f0819184 | 246 | mutex_lock(&data->lock); |
e53004e2 JD |
247 | outb(reg, data->addr + ADDR_REG_OFFSET); |
248 | val = inb(data->addr + DATA_REG_OFFSET) << 8; | |
249 | outb(++reg, data->addr + ADDR_REG_OFFSET); | |
250 | val |= inb(data->addr + DATA_REG_OFFSET); | |
f0819184 | 251 | mutex_unlock(&data->lock); |
e53004e2 JD |
252 | |
253 | return val; | |
254 | } | |
255 | ||
256 | static void f71805f_write16(struct f71805f_data *data, u8 reg, u16 val) | |
257 | { | |
f0819184 | 258 | mutex_lock(&data->lock); |
e53004e2 JD |
259 | outb(reg, data->addr + ADDR_REG_OFFSET); |
260 | outb(val >> 8, data->addr + DATA_REG_OFFSET); | |
261 | outb(++reg, data->addr + ADDR_REG_OFFSET); | |
262 | outb(val & 0xff, data->addr + DATA_REG_OFFSET); | |
f0819184 | 263 | mutex_unlock(&data->lock); |
e53004e2 JD |
264 | } |
265 | ||
266 | static struct f71805f_data *f71805f_update_device(struct device *dev) | |
267 | { | |
268 | struct f71805f_data *data = dev_get_drvdata(dev); | |
269 | int nr; | |
270 | ||
f0819184 | 271 | mutex_lock(&data->update_lock); |
e53004e2 JD |
272 | |
273 | /* Limit registers cache is refreshed after 60 seconds */ | |
274 | if (time_after(jiffies, data->last_updated + 60 * HZ) | |
275 | || !data->valid) { | |
276 | for (nr = 0; nr < 9; nr++) { | |
277 | data->in_high[nr] = f71805f_read8(data, | |
278 | F71805F_REG_IN_HIGH(nr)); | |
279 | data->in_low[nr] = f71805f_read8(data, | |
280 | F71805F_REG_IN_LOW(nr)); | |
281 | } | |
282 | for (nr = 0; nr < 3; nr++) { | |
283 | if (data->fan_enabled & (1 << nr)) | |
284 | data->fan_low[nr] = f71805f_read16(data, | |
285 | F71805F_REG_FAN_LOW(nr)); | |
286 | } | |
287 | for (nr = 0; nr < 3; nr++) { | |
288 | data->temp_high[nr] = f71805f_read8(data, | |
289 | F71805F_REG_TEMP_HIGH(nr)); | |
290 | data->temp_hyst[nr] = f71805f_read8(data, | |
291 | F71805F_REG_TEMP_HYST(nr)); | |
292 | } | |
293 | data->temp_mode = f71805f_read8(data, F71805F_REG_TEMP_MODE); | |
294 | ||
295 | data->last_limits = jiffies; | |
296 | } | |
297 | ||
298 | /* Measurement registers cache is refreshed after 1 second */ | |
299 | if (time_after(jiffies, data->last_updated + HZ) | |
300 | || !data->valid) { | |
301 | for (nr = 0; nr < 9; nr++) { | |
302 | data->in[nr] = f71805f_read8(data, | |
303 | F71805F_REG_IN(nr)); | |
304 | } | |
305 | for (nr = 0; nr < 3; nr++) { | |
306 | if (data->fan_enabled & (1 << nr)) | |
307 | data->fan[nr] = f71805f_read16(data, | |
308 | F71805F_REG_FAN(nr)); | |
309 | } | |
310 | for (nr = 0; nr < 3; nr++) { | |
311 | data->temp[nr] = f71805f_read8(data, | |
312 | F71805F_REG_TEMP(nr)); | |
313 | } | |
314 | for (nr = 0; nr < 3; nr++) { | |
315 | data->alarms[nr] = f71805f_read8(data, | |
316 | F71805F_REG_STATUS(nr)); | |
317 | } | |
318 | ||
319 | data->last_updated = jiffies; | |
320 | data->valid = 1; | |
321 | } | |
322 | ||
f0819184 | 323 | mutex_unlock(&data->update_lock); |
e53004e2 JD |
324 | |
325 | return data; | |
326 | } | |
327 | ||
328 | /* | |
329 | * Sysfs interface | |
330 | */ | |
331 | ||
332 | static ssize_t show_in0(struct device *dev, struct device_attribute *devattr, | |
333 | char *buf) | |
334 | { | |
335 | struct f71805f_data *data = f71805f_update_device(dev); | |
336 | ||
337 | return sprintf(buf, "%ld\n", in0_from_reg(data->in[0])); | |
338 | } | |
339 | ||
340 | static ssize_t show_in0_max(struct device *dev, struct device_attribute | |
341 | *devattr, char *buf) | |
342 | { | |
343 | struct f71805f_data *data = f71805f_update_device(dev); | |
344 | ||
345 | return sprintf(buf, "%ld\n", in0_from_reg(data->in_high[0])); | |
346 | } | |
347 | ||
348 | static ssize_t show_in0_min(struct device *dev, struct device_attribute | |
349 | *devattr, char *buf) | |
350 | { | |
351 | struct f71805f_data *data = f71805f_update_device(dev); | |
352 | ||
353 | return sprintf(buf, "%ld\n", in0_from_reg(data->in_low[0])); | |
354 | } | |
355 | ||
356 | static ssize_t set_in0_max(struct device *dev, struct device_attribute | |
357 | *devattr, const char *buf, size_t count) | |
358 | { | |
359 | struct f71805f_data *data = dev_get_drvdata(dev); | |
360 | long val = simple_strtol(buf, NULL, 10); | |
361 | ||
f0819184 | 362 | mutex_lock(&data->update_lock); |
e53004e2 JD |
363 | data->in_high[0] = in0_to_reg(val); |
364 | f71805f_write8(data, F71805F_REG_IN_HIGH(0), data->in_high[0]); | |
f0819184 | 365 | mutex_unlock(&data->update_lock); |
e53004e2 JD |
366 | |
367 | return count; | |
368 | } | |
369 | ||
370 | static ssize_t set_in0_min(struct device *dev, struct device_attribute | |
371 | *devattr, const char *buf, size_t count) | |
372 | { | |
373 | struct f71805f_data *data = dev_get_drvdata(dev); | |
374 | long val = simple_strtol(buf, NULL, 10); | |
375 | ||
f0819184 | 376 | mutex_lock(&data->update_lock); |
e53004e2 JD |
377 | data->in_low[0] = in0_to_reg(val); |
378 | f71805f_write8(data, F71805F_REG_IN_LOW(0), data->in_low[0]); | |
f0819184 | 379 | mutex_unlock(&data->update_lock); |
e53004e2 JD |
380 | |
381 | return count; | |
382 | } | |
383 | ||
e53004e2 JD |
384 | static ssize_t show_in(struct device *dev, struct device_attribute *devattr, |
385 | char *buf) | |
386 | { | |
387 | struct f71805f_data *data = f71805f_update_device(dev); | |
388 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
389 | int nr = attr->index; | |
390 | ||
391 | return sprintf(buf, "%ld\n", in_from_reg(data->in[nr])); | |
392 | } | |
393 | ||
394 | static ssize_t show_in_max(struct device *dev, struct device_attribute | |
395 | *devattr, char *buf) | |
396 | { | |
397 | struct f71805f_data *data = f71805f_update_device(dev); | |
398 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
399 | int nr = attr->index; | |
400 | ||
401 | return sprintf(buf, "%ld\n", in_from_reg(data->in_high[nr])); | |
402 | } | |
403 | ||
404 | static ssize_t show_in_min(struct device *dev, struct device_attribute | |
405 | *devattr, char *buf) | |
406 | { | |
407 | struct f71805f_data *data = f71805f_update_device(dev); | |
408 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
409 | int nr = attr->index; | |
410 | ||
411 | return sprintf(buf, "%ld\n", in_from_reg(data->in_low[nr])); | |
412 | } | |
413 | ||
414 | static ssize_t set_in_max(struct device *dev, struct device_attribute | |
415 | *devattr, const char *buf, size_t count) | |
416 | { | |
417 | struct f71805f_data *data = dev_get_drvdata(dev); | |
418 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
419 | int nr = attr->index; | |
420 | long val = simple_strtol(buf, NULL, 10); | |
421 | ||
f0819184 | 422 | mutex_lock(&data->update_lock); |
e53004e2 JD |
423 | data->in_high[nr] = in_to_reg(val); |
424 | f71805f_write8(data, F71805F_REG_IN_HIGH(nr), data->in_high[nr]); | |
f0819184 | 425 | mutex_unlock(&data->update_lock); |
e53004e2 JD |
426 | |
427 | return count; | |
428 | } | |
429 | ||
430 | static ssize_t set_in_min(struct device *dev, struct device_attribute | |
431 | *devattr, const char *buf, size_t count) | |
432 | { | |
433 | struct f71805f_data *data = dev_get_drvdata(dev); | |
434 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
435 | int nr = attr->index; | |
436 | long val = simple_strtol(buf, NULL, 10); | |
437 | ||
f0819184 | 438 | mutex_lock(&data->update_lock); |
e53004e2 JD |
439 | data->in_low[nr] = in_to_reg(val); |
440 | f71805f_write8(data, F71805F_REG_IN_LOW(nr), data->in_low[nr]); | |
f0819184 | 441 | mutex_unlock(&data->update_lock); |
e53004e2 JD |
442 | |
443 | return count; | |
444 | } | |
445 | ||
e53004e2 JD |
446 | static ssize_t show_fan(struct device *dev, struct device_attribute *devattr, |
447 | char *buf) | |
448 | { | |
449 | struct f71805f_data *data = f71805f_update_device(dev); | |
450 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
451 | int nr = attr->index; | |
452 | ||
453 | return sprintf(buf, "%ld\n", fan_from_reg(data->fan[nr])); | |
454 | } | |
455 | ||
456 | static ssize_t show_fan_min(struct device *dev, struct device_attribute | |
457 | *devattr, char *buf) | |
458 | { | |
459 | struct f71805f_data *data = f71805f_update_device(dev); | |
460 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
461 | int nr = attr->index; | |
462 | ||
463 | return sprintf(buf, "%ld\n", fan_from_reg(data->fan_low[nr])); | |
464 | } | |
465 | ||
466 | static ssize_t set_fan_min(struct device *dev, struct device_attribute | |
467 | *devattr, const char *buf, size_t count) | |
468 | { | |
469 | struct f71805f_data *data = dev_get_drvdata(dev); | |
470 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
471 | int nr = attr->index; | |
472 | long val = simple_strtol(buf, NULL, 10); | |
473 | ||
f0819184 | 474 | mutex_lock(&data->update_lock); |
e53004e2 JD |
475 | data->fan_low[nr] = fan_to_reg(val); |
476 | f71805f_write16(data, F71805F_REG_FAN_LOW(nr), data->fan_low[nr]); | |
f0819184 | 477 | mutex_unlock(&data->update_lock); |
e53004e2 JD |
478 | |
479 | return count; | |
480 | } | |
481 | ||
e53004e2 JD |
482 | static ssize_t show_temp(struct device *dev, struct device_attribute *devattr, |
483 | char *buf) | |
484 | { | |
485 | struct f71805f_data *data = f71805f_update_device(dev); | |
486 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
487 | int nr = attr->index; | |
488 | ||
489 | return sprintf(buf, "%ld\n", temp_from_reg(data->temp[nr])); | |
490 | } | |
491 | ||
492 | static ssize_t show_temp_max(struct device *dev, struct device_attribute | |
493 | *devattr, char *buf) | |
494 | { | |
495 | struct f71805f_data *data = f71805f_update_device(dev); | |
496 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
497 | int nr = attr->index; | |
498 | ||
499 | return sprintf(buf, "%ld\n", temp_from_reg(data->temp_high[nr])); | |
500 | } | |
501 | ||
502 | static ssize_t show_temp_hyst(struct device *dev, struct device_attribute | |
503 | *devattr, char *buf) | |
504 | { | |
505 | struct f71805f_data *data = f71805f_update_device(dev); | |
506 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
507 | int nr = attr->index; | |
508 | ||
509 | return sprintf(buf, "%ld\n", temp_from_reg(data->temp_hyst[nr])); | |
510 | } | |
511 | ||
512 | static ssize_t show_temp_type(struct device *dev, struct device_attribute | |
513 | *devattr, char *buf) | |
514 | { | |
515 | struct f71805f_data *data = f71805f_update_device(dev); | |
516 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
517 | int nr = attr->index; | |
518 | ||
519 | /* 3 is diode, 4 is thermistor */ | |
520 | return sprintf(buf, "%u\n", (data->temp_mode & (1 << nr)) ? 3 : 4); | |
521 | } | |
522 | ||
523 | static ssize_t set_temp_max(struct device *dev, struct device_attribute | |
524 | *devattr, const char *buf, size_t count) | |
525 | { | |
526 | struct f71805f_data *data = dev_get_drvdata(dev); | |
527 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
528 | int nr = attr->index; | |
529 | long val = simple_strtol(buf, NULL, 10); | |
530 | ||
f0819184 | 531 | mutex_lock(&data->update_lock); |
e53004e2 JD |
532 | data->temp_high[nr] = temp_to_reg(val); |
533 | f71805f_write8(data, F71805F_REG_TEMP_HIGH(nr), data->temp_high[nr]); | |
f0819184 | 534 | mutex_unlock(&data->update_lock); |
e53004e2 JD |
535 | |
536 | return count; | |
537 | } | |
538 | ||
539 | static ssize_t set_temp_hyst(struct device *dev, struct device_attribute | |
540 | *devattr, const char *buf, size_t count) | |
541 | { | |
542 | struct f71805f_data *data = dev_get_drvdata(dev); | |
543 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
544 | int nr = attr->index; | |
545 | long val = simple_strtol(buf, NULL, 10); | |
546 | ||
f0819184 | 547 | mutex_lock(&data->update_lock); |
e53004e2 JD |
548 | data->temp_hyst[nr] = temp_to_reg(val); |
549 | f71805f_write8(data, F71805F_REG_TEMP_HYST(nr), data->temp_hyst[nr]); | |
f0819184 | 550 | mutex_unlock(&data->update_lock); |
e53004e2 JD |
551 | |
552 | return count; | |
553 | } | |
554 | ||
e53004e2 JD |
555 | static ssize_t show_alarms_in(struct device *dev, struct device_attribute |
556 | *devattr, char *buf) | |
557 | { | |
558 | struct f71805f_data *data = f71805f_update_device(dev); | |
559 | ||
560 | return sprintf(buf, "%d\n", data->alarms[0] | | |
561 | ((data->alarms[1] & 0x01) << 8)); | |
562 | } | |
563 | ||
564 | static ssize_t show_alarms_fan(struct device *dev, struct device_attribute | |
565 | *devattr, char *buf) | |
566 | { | |
567 | struct f71805f_data *data = f71805f_update_device(dev); | |
568 | ||
569 | return sprintf(buf, "%d\n", data->alarms[2] & 0x07); | |
570 | } | |
571 | ||
572 | static ssize_t show_alarms_temp(struct device *dev, struct device_attribute | |
573 | *devattr, char *buf) | |
574 | { | |
575 | struct f71805f_data *data = f71805f_update_device(dev); | |
576 | ||
577 | return sprintf(buf, "%d\n", (data->alarms[1] >> 3) & 0x07); | |
578 | } | |
579 | ||
e53004e2 JD |
580 | static ssize_t show_name(struct device *dev, struct device_attribute |
581 | *devattr, char *buf) | |
582 | { | |
583 | struct f71805f_data *data = dev_get_drvdata(dev); | |
584 | ||
585 | return sprintf(buf, "%s\n", data->name); | |
586 | } | |
587 | ||
2488a39d JD |
588 | static struct device_attribute f71805f_dev_attr[] = { |
589 | __ATTR(in0_input, S_IRUGO, show_in0, NULL), | |
590 | __ATTR(in0_max, S_IRUGO| S_IWUSR, show_in0_max, set_in0_max), | |
591 | __ATTR(in0_min, S_IRUGO| S_IWUSR, show_in0_min, set_in0_min), | |
592 | __ATTR(alarms_in, S_IRUGO, show_alarms_in, NULL), | |
593 | __ATTR(alarms_fan, S_IRUGO, show_alarms_fan, NULL), | |
594 | __ATTR(alarms_temp, S_IRUGO, show_alarms_temp, NULL), | |
595 | __ATTR(name, S_IRUGO, show_name, NULL), | |
596 | }; | |
597 | ||
598 | static struct sensor_device_attribute f71805f_sensor_attr[] = { | |
599 | SENSOR_ATTR(in1_input, S_IRUGO, show_in, NULL, 1), | |
600 | SENSOR_ATTR(in1_max, S_IRUGO | S_IWUSR, | |
601 | show_in_max, set_in_max, 1), | |
602 | SENSOR_ATTR(in1_min, S_IRUGO | S_IWUSR, | |
603 | show_in_min, set_in_min, 1), | |
604 | SENSOR_ATTR(in2_input, S_IRUGO, show_in, NULL, 2), | |
605 | SENSOR_ATTR(in2_max, S_IRUGO | S_IWUSR, | |
606 | show_in_max, set_in_max, 2), | |
607 | SENSOR_ATTR(in2_min, S_IRUGO | S_IWUSR, | |
608 | show_in_min, set_in_min, 2), | |
609 | SENSOR_ATTR(in3_input, S_IRUGO, show_in, NULL, 3), | |
610 | SENSOR_ATTR(in3_max, S_IRUGO | S_IWUSR, | |
611 | show_in_max, set_in_max, 3), | |
612 | SENSOR_ATTR(in3_min, S_IRUGO | S_IWUSR, | |
613 | show_in_min, set_in_min, 3), | |
614 | SENSOR_ATTR(in4_input, S_IRUGO, show_in, NULL, 4), | |
615 | SENSOR_ATTR(in4_max, S_IRUGO | S_IWUSR, | |
616 | show_in_max, set_in_max, 4), | |
617 | SENSOR_ATTR(in4_min, S_IRUGO | S_IWUSR, | |
618 | show_in_min, set_in_min, 4), | |
619 | SENSOR_ATTR(in5_input, S_IRUGO, show_in, NULL, 5), | |
620 | SENSOR_ATTR(in5_max, S_IRUGO | S_IWUSR, | |
621 | show_in_max, set_in_max, 5), | |
622 | SENSOR_ATTR(in5_min, S_IRUGO | S_IWUSR, | |
623 | show_in_min, set_in_min, 5), | |
624 | SENSOR_ATTR(in6_input, S_IRUGO, show_in, NULL, 6), | |
625 | SENSOR_ATTR(in6_max, S_IRUGO | S_IWUSR, | |
626 | show_in_max, set_in_max, 6), | |
627 | SENSOR_ATTR(in6_min, S_IRUGO | S_IWUSR, | |
628 | show_in_min, set_in_min, 6), | |
629 | SENSOR_ATTR(in7_input, S_IRUGO, show_in, NULL, 7), | |
630 | SENSOR_ATTR(in7_max, S_IRUGO | S_IWUSR, | |
631 | show_in_max, set_in_max, 7), | |
632 | SENSOR_ATTR(in7_min, S_IRUGO | S_IWUSR, | |
633 | show_in_min, set_in_min, 7), | |
634 | SENSOR_ATTR(in8_input, S_IRUGO, show_in, NULL, 8), | |
635 | SENSOR_ATTR(in8_max, S_IRUGO | S_IWUSR, | |
636 | show_in_max, set_in_max, 8), | |
637 | SENSOR_ATTR(in8_min, S_IRUGO | S_IWUSR, | |
638 | show_in_min, set_in_min, 8), | |
639 | ||
640 | SENSOR_ATTR(temp1_input, S_IRUGO, show_temp, NULL, 0), | |
641 | SENSOR_ATTR(temp1_max, S_IRUGO | S_IWUSR, | |
642 | show_temp_max, set_temp_max, 0), | |
643 | SENSOR_ATTR(temp1_max_hyst, S_IRUGO | S_IWUSR, | |
644 | show_temp_hyst, set_temp_hyst, 0), | |
645 | SENSOR_ATTR(temp1_type, S_IRUGO, show_temp_type, NULL, 0), | |
646 | SENSOR_ATTR(temp2_input, S_IRUGO, show_temp, NULL, 1), | |
647 | SENSOR_ATTR(temp2_max, S_IRUGO | S_IWUSR, | |
648 | show_temp_max, set_temp_max, 1), | |
649 | SENSOR_ATTR(temp2_max_hyst, S_IRUGO | S_IWUSR, | |
650 | show_temp_hyst, set_temp_hyst, 1), | |
651 | SENSOR_ATTR(temp2_type, S_IRUGO, show_temp_type, NULL, 1), | |
652 | SENSOR_ATTR(temp3_input, S_IRUGO, show_temp, NULL, 2), | |
653 | SENSOR_ATTR(temp3_max, S_IRUGO | S_IWUSR, | |
654 | show_temp_max, set_temp_max, 2), | |
655 | SENSOR_ATTR(temp3_max_hyst, S_IRUGO | S_IWUSR, | |
656 | show_temp_hyst, set_temp_hyst, 2), | |
657 | SENSOR_ATTR(temp3_type, S_IRUGO, show_temp_type, NULL, 2), | |
658 | }; | |
659 | ||
660 | static struct sensor_device_attribute f71805f_fan_attr[] = { | |
661 | SENSOR_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0), | |
662 | SENSOR_ATTR(fan1_min, S_IRUGO | S_IWUSR, | |
663 | show_fan_min, set_fan_min, 0), | |
664 | SENSOR_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1), | |
665 | SENSOR_ATTR(fan2_min, S_IRUGO | S_IWUSR, | |
666 | show_fan_min, set_fan_min, 1), | |
667 | SENSOR_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2), | |
668 | SENSOR_ATTR(fan3_min, S_IRUGO | S_IWUSR, | |
669 | show_fan_min, set_fan_min, 2), | |
670 | }; | |
e53004e2 JD |
671 | |
672 | /* | |
673 | * Device registration and initialization | |
674 | */ | |
675 | ||
676 | static void __devinit f71805f_init_device(struct f71805f_data *data) | |
677 | { | |
678 | u8 reg; | |
679 | int i; | |
680 | ||
681 | reg = f71805f_read8(data, F71805F_REG_START); | |
682 | if ((reg & 0x41) != 0x01) { | |
683 | printk(KERN_DEBUG DRVNAME ": Starting monitoring " | |
684 | "operations\n"); | |
685 | f71805f_write8(data, F71805F_REG_START, (reg | 0x01) & ~0x40); | |
686 | } | |
687 | ||
688 | /* Fan monitoring can be disabled. If it is, we won't be polling | |
689 | the register values, and won't create the related sysfs files. */ | |
690 | for (i = 0; i < 3; i++) { | |
691 | reg = f71805f_read8(data, F71805F_REG_FAN_CTRL(i)); | |
692 | if (!(reg & 0x80)) | |
693 | data->fan_enabled |= (1 << i); | |
694 | } | |
695 | } | |
696 | ||
697 | static int __devinit f71805f_probe(struct platform_device *pdev) | |
698 | { | |
699 | struct f71805f_data *data; | |
700 | struct resource *res; | |
2488a39d | 701 | int i, err; |
e53004e2 JD |
702 | |
703 | if (!(data = kzalloc(sizeof(struct f71805f_data), GFP_KERNEL))) { | |
704 | err = -ENOMEM; | |
705 | printk(KERN_ERR DRVNAME ": Out of memory\n"); | |
706 | goto exit; | |
707 | } | |
708 | ||
709 | res = platform_get_resource(pdev, IORESOURCE_IO, 0); | |
710 | data->addr = res->start; | |
f0819184 | 711 | mutex_init(&data->lock); |
e53004e2 | 712 | data->name = "f71805f"; |
f0819184 | 713 | mutex_init(&data->update_lock); |
e53004e2 JD |
714 | |
715 | platform_set_drvdata(pdev, data); | |
716 | ||
717 | data->class_dev = hwmon_device_register(&pdev->dev); | |
718 | if (IS_ERR(data->class_dev)) { | |
719 | err = PTR_ERR(data->class_dev); | |
720 | dev_err(&pdev->dev, "Class registration failed (%d)\n", err); | |
721 | goto exit_free; | |
722 | } | |
723 | ||
724 | /* Initialize the F71805F chip */ | |
725 | f71805f_init_device(data); | |
726 | ||
727 | /* Register sysfs interface files */ | |
2488a39d JD |
728 | for (i = 0; i < ARRAY_SIZE(f71805f_dev_attr); i++) { |
729 | err = device_create_file(&pdev->dev, &f71805f_dev_attr[i]); | |
730 | if (err) | |
731 | goto exit_class; | |
e53004e2 | 732 | } |
2488a39d JD |
733 | for (i = 0; i < ARRAY_SIZE(f71805f_sensor_attr); i++) { |
734 | err = device_create_file(&pdev->dev, | |
735 | &f71805f_sensor_attr[i].dev_attr); | |
736 | if (err) | |
737 | goto exit_class; | |
e53004e2 | 738 | } |
2488a39d JD |
739 | for (i = 0; i < ARRAY_SIZE(f71805f_fan_attr); i++) { |
740 | if (!(data->fan_enabled & (1 << (i / 2)))) | |
741 | continue; | |
742 | err = device_create_file(&pdev->dev, | |
743 | &f71805f_fan_attr[i].dev_attr); | |
744 | if (err) | |
745 | goto exit_class; | |
e53004e2 | 746 | } |
e53004e2 JD |
747 | |
748 | return 0; | |
749 | ||
2488a39d JD |
750 | exit_class: |
751 | dev_err(&pdev->dev, "Sysfs interface creation failed\n"); | |
752 | hwmon_device_unregister(data->class_dev); | |
e53004e2 JD |
753 | exit_free: |
754 | kfree(data); | |
755 | exit: | |
756 | return err; | |
757 | } | |
758 | ||
759 | static int __devexit f71805f_remove(struct platform_device *pdev) | |
760 | { | |
761 | struct f71805f_data *data = platform_get_drvdata(pdev); | |
762 | ||
763 | platform_set_drvdata(pdev, NULL); | |
764 | hwmon_device_unregister(data->class_dev); | |
765 | kfree(data); | |
766 | ||
767 | return 0; | |
768 | } | |
769 | ||
770 | static struct platform_driver f71805f_driver = { | |
771 | .driver = { | |
772 | .owner = THIS_MODULE, | |
773 | .name = DRVNAME, | |
774 | }, | |
775 | .probe = f71805f_probe, | |
776 | .remove = __devexit_p(f71805f_remove), | |
777 | }; | |
778 | ||
779 | static int __init f71805f_device_add(unsigned short address) | |
780 | { | |
568825c8 JD |
781 | struct resource res = { |
782 | .start = address, | |
783 | .end = address + REGION_LENGTH - 1, | |
784 | .flags = IORESOURCE_IO, | |
785 | }; | |
e53004e2 JD |
786 | int err; |
787 | ||
788 | pdev = platform_device_alloc(DRVNAME, address); | |
789 | if (!pdev) { | |
790 | err = -ENOMEM; | |
791 | printk(KERN_ERR DRVNAME ": Device allocation failed\n"); | |
792 | goto exit; | |
793 | } | |
794 | ||
568825c8 JD |
795 | res.name = pdev->name; |
796 | err = platform_device_add_resources(pdev, &res, 1); | |
e53004e2 JD |
797 | if (err) { |
798 | printk(KERN_ERR DRVNAME ": Device resource addition failed " | |
799 | "(%d)\n", err); | |
800 | goto exit_device_put; | |
801 | } | |
802 | ||
803 | err = platform_device_add(pdev); | |
804 | if (err) { | |
805 | printk(KERN_ERR DRVNAME ": Device addition failed (%d)\n", | |
806 | err); | |
807 | goto exit_device_put; | |
808 | } | |
809 | ||
810 | return 0; | |
811 | ||
812 | exit_device_put: | |
813 | platform_device_put(pdev); | |
814 | exit: | |
815 | return err; | |
816 | } | |
817 | ||
818 | static int __init f71805f_find(int sioaddr, unsigned short *address) | |
819 | { | |
820 | int err = -ENODEV; | |
821 | u16 devid; | |
822 | ||
823 | superio_enter(sioaddr); | |
824 | ||
825 | devid = superio_inw(sioaddr, SIO_REG_MANID); | |
826 | if (devid != SIO_FINTEK_ID) | |
827 | goto exit; | |
828 | ||
829 | devid = superio_inw(sioaddr, SIO_REG_DEVID); | |
830 | if (devid != SIO_F71805F_ID) { | |
831 | printk(KERN_INFO DRVNAME ": Unsupported Fintek device, " | |
832 | "skipping\n"); | |
833 | goto exit; | |
834 | } | |
835 | ||
836 | superio_select(sioaddr, F71805F_LD_HWM); | |
837 | if (!(superio_inb(sioaddr, SIO_REG_ENABLE) & 0x01)) { | |
838 | printk(KERN_WARNING DRVNAME ": Device not activated, " | |
839 | "skipping\n"); | |
840 | goto exit; | |
841 | } | |
842 | ||
843 | *address = superio_inw(sioaddr, SIO_REG_ADDR); | |
844 | if (*address == 0) { | |
845 | printk(KERN_WARNING DRVNAME ": Base address not set, " | |
846 | "skipping\n"); | |
847 | goto exit; | |
848 | } | |
849 | ||
850 | err = 0; | |
851 | printk(KERN_INFO DRVNAME ": Found F71805F chip at %#x, revision %u\n", | |
852 | *address, superio_inb(sioaddr, SIO_REG_DEVREV)); | |
853 | ||
854 | exit: | |
855 | superio_exit(sioaddr); | |
856 | return err; | |
857 | } | |
858 | ||
859 | static int __init f71805f_init(void) | |
860 | { | |
861 | int err; | |
862 | unsigned short address; | |
863 | ||
864 | if (f71805f_find(0x2e, &address) | |
865 | && f71805f_find(0x4e, &address)) | |
866 | return -ENODEV; | |
867 | ||
868 | err = platform_driver_register(&f71805f_driver); | |
869 | if (err) | |
870 | goto exit; | |
871 | ||
872 | /* Sets global pdev as a side effect */ | |
873 | err = f71805f_device_add(address); | |
874 | if (err) | |
875 | goto exit_driver; | |
876 | ||
877 | return 0; | |
878 | ||
879 | exit_driver: | |
880 | platform_driver_unregister(&f71805f_driver); | |
881 | exit: | |
882 | return err; | |
883 | } | |
884 | ||
885 | static void __exit f71805f_exit(void) | |
886 | { | |
887 | platform_device_unregister(pdev); | |
888 | platform_driver_unregister(&f71805f_driver); | |
889 | } | |
890 | ||
891 | MODULE_AUTHOR("Jean Delvare <khali@linux-fr>"); | |
892 | MODULE_LICENSE("GPL"); | |
893 | MODULE_DESCRIPTION("F71805F hardware monitoring driver"); | |
894 | ||
895 | module_init(f71805f_init); | |
896 | module_exit(f71805f_exit); |