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e53004e2 | 1 | /* |
51c997d8 JD |
2 | * f71805f.c - driver for the Fintek F71805F/FG and F71872F/FG Super-I/O |
3 | * chips integrated hardware monitoring features | |
7c81c60f | 4 | * Copyright (C) 2005-2006 Jean Delvare <jdelvare@suse.de> |
e53004e2 JD |
5 | * |
6 | * The F71805F/FG is a LPC Super-I/O chip made by Fintek. It integrates | |
7 | * complete hardware monitoring features: voltage, fan and temperature | |
8 | * sensors, and manual and automatic fan speed control. | |
9 | * | |
51c997d8 JD |
10 | * The F71872F/FG is almost the same, with two more voltages monitored, |
11 | * and 6 VID inputs. | |
12 | * | |
9cab0217 JD |
13 | * The F71806F/FG is essentially the same as the F71872F/FG. It even has |
14 | * the same chip ID, so the driver can't differentiate between. | |
15 | * | |
e53004e2 JD |
16 | * This program is free software; you can redistribute it and/or modify |
17 | * it under the terms of the GNU General Public License as published by | |
18 | * the Free Software Foundation; either version 2 of the License, or | |
19 | * (at your option) any later version. | |
20 | * | |
21 | * This program is distributed in the hope that it will be useful, | |
22 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
23 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
24 | * GNU General Public License for more details. | |
25 | * | |
26 | * You should have received a copy of the GNU General Public License | |
27 | * along with this program; if not, write to the Free Software | |
28 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
29 | */ | |
30 | ||
e54c5ad6 JP |
31 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
32 | ||
e53004e2 JD |
33 | #include <linux/module.h> |
34 | #include <linux/init.h> | |
35 | #include <linux/slab.h> | |
36 | #include <linux/jiffies.h> | |
37 | #include <linux/platform_device.h> | |
38 | #include <linux/hwmon.h> | |
39 | #include <linux/hwmon-sysfs.h> | |
40 | #include <linux/err.h> | |
f0819184 | 41 | #include <linux/mutex.h> |
0e39e01c | 42 | #include <linux/sysfs.h> |
ce7ee4e8 | 43 | #include <linux/ioport.h> |
b9acb64a | 44 | #include <linux/acpi.h> |
6055fae8 | 45 | #include <linux/io.h> |
e53004e2 | 46 | |
67b671bc JD |
47 | static unsigned short force_id; |
48 | module_param(force_id, ushort, 0); | |
49 | MODULE_PARM_DESC(force_id, "Override the detected device ID"); | |
50 | ||
e53004e2 JD |
51 | static struct platform_device *pdev; |
52 | ||
53 | #define DRVNAME "f71805f" | |
51c997d8 | 54 | enum kinds { f71805f, f71872f }; |
e53004e2 JD |
55 | |
56 | /* | |
57 | * Super-I/O constants and functions | |
58 | */ | |
59 | ||
60 | #define F71805F_LD_HWM 0x04 | |
61 | ||
62 | #define SIO_REG_LDSEL 0x07 /* Logical device select */ | |
63 | #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */ | |
64 | #define SIO_REG_DEVREV 0x22 /* Device revision */ | |
65 | #define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */ | |
51c997d8 | 66 | #define SIO_REG_FNSEL1 0x29 /* Multi Function Select 1 (F71872F) */ |
e53004e2 JD |
67 | #define SIO_REG_ENABLE 0x30 /* Logical device enable */ |
68 | #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */ | |
69 | ||
70 | #define SIO_FINTEK_ID 0x1934 | |
71 | #define SIO_F71805F_ID 0x0406 | |
51c997d8 | 72 | #define SIO_F71872F_ID 0x0341 |
e53004e2 JD |
73 | |
74 | static inline int | |
75 | superio_inb(int base, int reg) | |
76 | { | |
77 | outb(reg, base); | |
78 | return inb(base + 1); | |
79 | } | |
80 | ||
81 | static int | |
82 | superio_inw(int base, int reg) | |
83 | { | |
84 | int val; | |
85 | outb(reg++, base); | |
86 | val = inb(base + 1) << 8; | |
87 | outb(reg, base); | |
88 | val |= inb(base + 1); | |
89 | return val; | |
90 | } | |
91 | ||
92 | static inline void | |
93 | superio_select(int base, int ld) | |
94 | { | |
95 | outb(SIO_REG_LDSEL, base); | |
96 | outb(ld, base + 1); | |
97 | } | |
98 | ||
103d6f2b | 99 | static inline int |
e53004e2 JD |
100 | superio_enter(int base) |
101 | { | |
103d6f2b GR |
102 | if (!request_muxed_region(base, 2, DRVNAME)) |
103 | return -EBUSY; | |
104 | ||
e53004e2 JD |
105 | outb(0x87, base); |
106 | outb(0x87, base); | |
103d6f2b GR |
107 | |
108 | return 0; | |
e53004e2 JD |
109 | } |
110 | ||
111 | static inline void | |
112 | superio_exit(int base) | |
113 | { | |
114 | outb(0xaa, base); | |
103d6f2b | 115 | release_region(base, 2); |
e53004e2 JD |
116 | } |
117 | ||
118 | /* | |
119 | * ISA constants | |
120 | */ | |
121 | ||
75c99029 JD |
122 | #define REGION_LENGTH 8 |
123 | #define ADDR_REG_OFFSET 5 | |
124 | #define DATA_REG_OFFSET 6 | |
e53004e2 | 125 | |
e53004e2 JD |
126 | /* |
127 | * Registers | |
128 | */ | |
129 | ||
51c997d8 | 130 | /* in nr from 0 to 10 (8-bit values) */ |
e53004e2 | 131 | #define F71805F_REG_IN(nr) (0x10 + (nr)) |
51c997d8 JD |
132 | #define F71805F_REG_IN_HIGH(nr) ((nr) < 10 ? 0x40 + 2 * (nr) : 0x2E) |
133 | #define F71805F_REG_IN_LOW(nr) ((nr) < 10 ? 0x41 + 2 * (nr) : 0x2F) | |
e53004e2 JD |
134 | /* fan nr from 0 to 2 (12-bit values, two registers) */ |
135 | #define F71805F_REG_FAN(nr) (0x20 + 2 * (nr)) | |
136 | #define F71805F_REG_FAN_LOW(nr) (0x28 + 2 * (nr)) | |
315c7113 | 137 | #define F71805F_REG_FAN_TARGET(nr) (0x69 + 16 * (nr)) |
e53004e2 | 138 | #define F71805F_REG_FAN_CTRL(nr) (0x60 + 16 * (nr)) |
6e2bc17b | 139 | #define F71805F_REG_PWM_FREQ(nr) (0x63 + 16 * (nr)) |
95e35312 | 140 | #define F71805F_REG_PWM_DUTY(nr) (0x6B + 16 * (nr)) |
e53004e2 JD |
141 | /* temp nr from 0 to 2 (8-bit values) */ |
142 | #define F71805F_REG_TEMP(nr) (0x1B + (nr)) | |
143 | #define F71805F_REG_TEMP_HIGH(nr) (0x54 + 2 * (nr)) | |
144 | #define F71805F_REG_TEMP_HYST(nr) (0x55 + 2 * (nr)) | |
145 | #define F71805F_REG_TEMP_MODE 0x01 | |
aba5073d PE |
146 | /* pwm/fan pwmnr from 0 to 2, auto point apnr from 0 to 2 */ |
147 | /* map Fintek numbers to our numbers as follows: 9->0, 5->1, 1->2 */ | |
148 | #define F71805F_REG_PWM_AUTO_POINT_TEMP(pwmnr, apnr) \ | |
149 | (0xA0 + 0x10 * (pwmnr) + (2 - (apnr))) | |
150 | #define F71805F_REG_PWM_AUTO_POINT_FAN(pwmnr, apnr) \ | |
151 | (0xA4 + 0x10 * (pwmnr) + \ | |
152 | 2 * (2 - (apnr))) | |
e53004e2 JD |
153 | |
154 | #define F71805F_REG_START 0x00 | |
155 | /* status nr from 0 to 2 */ | |
156 | #define F71805F_REG_STATUS(nr) (0x36 + (nr)) | |
157 | ||
6b14a546 | 158 | /* individual register bits */ |
e196783d | 159 | #define FAN_CTRL_DC_MODE 0x10 |
315c7113 | 160 | #define FAN_CTRL_LATCH_FULL 0x08 |
95e35312 JD |
161 | #define FAN_CTRL_MODE_MASK 0x03 |
162 | #define FAN_CTRL_MODE_SPEED 0x00 | |
163 | #define FAN_CTRL_MODE_TEMPERATURE 0x01 | |
164 | #define FAN_CTRL_MODE_MANUAL 0x02 | |
6b14a546 | 165 | |
e53004e2 JD |
166 | /* |
167 | * Data structures and manipulation thereof | |
168 | */ | |
169 | ||
aba5073d PE |
170 | struct f71805f_auto_point { |
171 | u8 temp[3]; | |
172 | u16 fan[3]; | |
173 | }; | |
174 | ||
e53004e2 JD |
175 | struct f71805f_data { |
176 | unsigned short addr; | |
177 | const char *name; | |
1beeffe4 | 178 | struct device *hwmon_dev; |
e53004e2 | 179 | |
f0819184 | 180 | struct mutex update_lock; |
e53004e2 JD |
181 | char valid; /* !=0 if following fields are valid */ |
182 | unsigned long last_updated; /* In jiffies */ | |
183 | unsigned long last_limits; /* In jiffies */ | |
184 | ||
185 | /* Register values */ | |
51c997d8 JD |
186 | u8 in[11]; |
187 | u8 in_high[11]; | |
188 | u8 in_low[11]; | |
189 | u16 has_in; | |
e53004e2 JD |
190 | u16 fan[3]; |
191 | u16 fan_low[3]; | |
315c7113 | 192 | u16 fan_target[3]; |
6b14a546 | 193 | u8 fan_ctrl[3]; |
95e35312 | 194 | u8 pwm[3]; |
6e2bc17b | 195 | u8 pwm_freq[3]; |
e53004e2 JD |
196 | u8 temp[3]; |
197 | u8 temp_high[3]; | |
198 | u8 temp_hyst[3]; | |
199 | u8 temp_mode; | |
2d45771e | 200 | unsigned long alarms; |
aba5073d | 201 | struct f71805f_auto_point auto_points[3]; |
e53004e2 JD |
202 | }; |
203 | ||
51c997d8 JD |
204 | struct f71805f_sio_data { |
205 | enum kinds kind; | |
206 | u8 fnsel1; | |
207 | }; | |
208 | ||
e53004e2 JD |
209 | static inline long in_from_reg(u8 reg) |
210 | { | |
7fe83ad8 | 211 | return reg * 8; |
e53004e2 JD |
212 | } |
213 | ||
214 | /* The 2 least significant bits are not used */ | |
215 | static inline u8 in_to_reg(long val) | |
216 | { | |
217 | if (val <= 0) | |
218 | return 0; | |
219 | if (val >= 2016) | |
220 | return 0xfc; | |
7fe83ad8 | 221 | return ((val + 16) / 32) << 2; |
e53004e2 JD |
222 | } |
223 | ||
224 | /* in0 is downscaled by a factor 2 internally */ | |
225 | static inline long in0_from_reg(u8 reg) | |
226 | { | |
7fe83ad8 | 227 | return reg * 16; |
e53004e2 JD |
228 | } |
229 | ||
230 | static inline u8 in0_to_reg(long val) | |
231 | { | |
232 | if (val <= 0) | |
233 | return 0; | |
234 | if (val >= 4032) | |
235 | return 0xfc; | |
7fe83ad8 | 236 | return ((val + 32) / 64) << 2; |
e53004e2 JD |
237 | } |
238 | ||
239 | /* The 4 most significant bits are not used */ | |
240 | static inline long fan_from_reg(u16 reg) | |
241 | { | |
242 | reg &= 0xfff; | |
243 | if (!reg || reg == 0xfff) | |
244 | return 0; | |
7fe83ad8 | 245 | return 1500000 / reg; |
e53004e2 JD |
246 | } |
247 | ||
248 | static inline u16 fan_to_reg(long rpm) | |
249 | { | |
2fff0840 GR |
250 | /* |
251 | * If the low limit is set below what the chip can measure, | |
252 | * store the largest possible 12-bit value in the registers, | |
253 | * so that no alarm will ever trigger. | |
254 | */ | |
e53004e2 JD |
255 | if (rpm < 367) |
256 | return 0xfff; | |
7fe83ad8 | 257 | return 1500000 / rpm; |
e53004e2 JD |
258 | } |
259 | ||
6e2bc17b JD |
260 | static inline unsigned long pwm_freq_from_reg(u8 reg) |
261 | { | |
262 | unsigned long clock = (reg & 0x80) ? 48000000UL : 1000000UL; | |
263 | ||
264 | reg &= 0x7f; | |
265 | if (reg == 0) | |
266 | reg++; | |
267 | return clock / (reg << 8); | |
268 | } | |
269 | ||
270 | static inline u8 pwm_freq_to_reg(unsigned long val) | |
271 | { | |
272 | if (val >= 187500) /* The highest we can do */ | |
273 | return 0x80; | |
274 | if (val >= 1475) /* Use 48 MHz clock */ | |
275 | return 0x80 | (48000000UL / (val << 8)); | |
276 | if (val < 31) /* The lowest we can do */ | |
277 | return 0x7f; | |
278 | else /* Use 1 MHz clock */ | |
279 | return 1000000UL / (val << 8); | |
280 | } | |
281 | ||
e196783d JD |
282 | static inline int pwm_mode_from_reg(u8 reg) |
283 | { | |
284 | return !(reg & FAN_CTRL_DC_MODE); | |
285 | } | |
286 | ||
e53004e2 JD |
287 | static inline long temp_from_reg(u8 reg) |
288 | { | |
7fe83ad8 | 289 | return reg * 1000; |
e53004e2 JD |
290 | } |
291 | ||
292 | static inline u8 temp_to_reg(long val) | |
293 | { | |
86b2bbfd JD |
294 | if (val <= 0) |
295 | return 0; | |
296 | if (val >= 1000 * 0xff) | |
297 | return 0xff; | |
298 | return (val + 500) / 1000; | |
e53004e2 JD |
299 | } |
300 | ||
301 | /* | |
302 | * Device I/O access | |
303 | */ | |
304 | ||
7f999aa7 | 305 | /* Must be called with data->update_lock held, except during initialization */ |
e53004e2 JD |
306 | static u8 f71805f_read8(struct f71805f_data *data, u8 reg) |
307 | { | |
e53004e2 | 308 | outb(reg, data->addr + ADDR_REG_OFFSET); |
7f999aa7 | 309 | return inb(data->addr + DATA_REG_OFFSET); |
e53004e2 JD |
310 | } |
311 | ||
7f999aa7 | 312 | /* Must be called with data->update_lock held, except during initialization */ |
e53004e2 JD |
313 | static void f71805f_write8(struct f71805f_data *data, u8 reg, u8 val) |
314 | { | |
e53004e2 JD |
315 | outb(reg, data->addr + ADDR_REG_OFFSET); |
316 | outb(val, data->addr + DATA_REG_OFFSET); | |
e53004e2 JD |
317 | } |
318 | ||
2fff0840 GR |
319 | /* |
320 | * It is important to read the MSB first, because doing so latches the | |
321 | * value of the LSB, so we are sure both bytes belong to the same value. | |
322 | * Must be called with data->update_lock held, except during initialization | |
323 | */ | |
e53004e2 JD |
324 | static u16 f71805f_read16(struct f71805f_data *data, u8 reg) |
325 | { | |
326 | u16 val; | |
327 | ||
e53004e2 JD |
328 | outb(reg, data->addr + ADDR_REG_OFFSET); |
329 | val = inb(data->addr + DATA_REG_OFFSET) << 8; | |
330 | outb(++reg, data->addr + ADDR_REG_OFFSET); | |
331 | val |= inb(data->addr + DATA_REG_OFFSET); | |
e53004e2 JD |
332 | |
333 | return val; | |
334 | } | |
335 | ||
7f999aa7 | 336 | /* Must be called with data->update_lock held, except during initialization */ |
e53004e2 JD |
337 | static void f71805f_write16(struct f71805f_data *data, u8 reg, u16 val) |
338 | { | |
e53004e2 JD |
339 | outb(reg, data->addr + ADDR_REG_OFFSET); |
340 | outb(val >> 8, data->addr + DATA_REG_OFFSET); | |
341 | outb(++reg, data->addr + ADDR_REG_OFFSET); | |
342 | outb(val & 0xff, data->addr + DATA_REG_OFFSET); | |
e53004e2 JD |
343 | } |
344 | ||
345 | static struct f71805f_data *f71805f_update_device(struct device *dev) | |
346 | { | |
347 | struct f71805f_data *data = dev_get_drvdata(dev); | |
aba5073d | 348 | int nr, apnr; |
e53004e2 | 349 | |
f0819184 | 350 | mutex_lock(&data->update_lock); |
e53004e2 JD |
351 | |
352 | /* Limit registers cache is refreshed after 60 seconds */ | |
353 | if (time_after(jiffies, data->last_updated + 60 * HZ) | |
354 | || !data->valid) { | |
51c997d8 JD |
355 | for (nr = 0; nr < 11; nr++) { |
356 | if (!(data->has_in & (1 << nr))) | |
357 | continue; | |
e53004e2 JD |
358 | data->in_high[nr] = f71805f_read8(data, |
359 | F71805F_REG_IN_HIGH(nr)); | |
360 | data->in_low[nr] = f71805f_read8(data, | |
361 | F71805F_REG_IN_LOW(nr)); | |
362 | } | |
363 | for (nr = 0; nr < 3; nr++) { | |
6b14a546 JD |
364 | data->fan_low[nr] = f71805f_read16(data, |
365 | F71805F_REG_FAN_LOW(nr)); | |
315c7113 JD |
366 | data->fan_target[nr] = f71805f_read16(data, |
367 | F71805F_REG_FAN_TARGET(nr)); | |
6e2bc17b JD |
368 | data->pwm_freq[nr] = f71805f_read8(data, |
369 | F71805F_REG_PWM_FREQ(nr)); | |
e53004e2 JD |
370 | } |
371 | for (nr = 0; nr < 3; nr++) { | |
372 | data->temp_high[nr] = f71805f_read8(data, | |
373 | F71805F_REG_TEMP_HIGH(nr)); | |
374 | data->temp_hyst[nr] = f71805f_read8(data, | |
375 | F71805F_REG_TEMP_HYST(nr)); | |
376 | } | |
377 | data->temp_mode = f71805f_read8(data, F71805F_REG_TEMP_MODE); | |
aba5073d PE |
378 | for (nr = 0; nr < 3; nr++) { |
379 | for (apnr = 0; apnr < 3; apnr++) { | |
380 | data->auto_points[nr].temp[apnr] = | |
381 | f71805f_read8(data, | |
382 | F71805F_REG_PWM_AUTO_POINT_TEMP(nr, | |
383 | apnr)); | |
384 | data->auto_points[nr].fan[apnr] = | |
385 | f71805f_read16(data, | |
386 | F71805F_REG_PWM_AUTO_POINT_FAN(nr, | |
387 | apnr)); | |
388 | } | |
389 | } | |
e53004e2 JD |
390 | |
391 | data->last_limits = jiffies; | |
392 | } | |
393 | ||
394 | /* Measurement registers cache is refreshed after 1 second */ | |
395 | if (time_after(jiffies, data->last_updated + HZ) | |
396 | || !data->valid) { | |
51c997d8 JD |
397 | for (nr = 0; nr < 11; nr++) { |
398 | if (!(data->has_in & (1 << nr))) | |
399 | continue; | |
e53004e2 JD |
400 | data->in[nr] = f71805f_read8(data, |
401 | F71805F_REG_IN(nr)); | |
402 | } | |
403 | for (nr = 0; nr < 3; nr++) { | |
6b14a546 JD |
404 | data->fan[nr] = f71805f_read16(data, |
405 | F71805F_REG_FAN(nr)); | |
95e35312 JD |
406 | data->fan_ctrl[nr] = f71805f_read8(data, |
407 | F71805F_REG_FAN_CTRL(nr)); | |
408 | data->pwm[nr] = f71805f_read8(data, | |
409 | F71805F_REG_PWM_DUTY(nr)); | |
e53004e2 JD |
410 | } |
411 | for (nr = 0; nr < 3; nr++) { | |
412 | data->temp[nr] = f71805f_read8(data, | |
413 | F71805F_REG_TEMP(nr)); | |
414 | } | |
2d45771e JD |
415 | data->alarms = f71805f_read8(data, F71805F_REG_STATUS(0)) |
416 | + (f71805f_read8(data, F71805F_REG_STATUS(1)) << 8) | |
417 | + (f71805f_read8(data, F71805F_REG_STATUS(2)) << 16); | |
e53004e2 JD |
418 | |
419 | data->last_updated = jiffies; | |
420 | data->valid = 1; | |
421 | } | |
422 | ||
f0819184 | 423 | mutex_unlock(&data->update_lock); |
e53004e2 JD |
424 | |
425 | return data; | |
426 | } | |
427 | ||
428 | /* | |
429 | * Sysfs interface | |
430 | */ | |
431 | ||
432 | static ssize_t show_in0(struct device *dev, struct device_attribute *devattr, | |
433 | char *buf) | |
434 | { | |
435 | struct f71805f_data *data = f71805f_update_device(dev); | |
51c997d8 JD |
436 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); |
437 | int nr = attr->index; | |
e53004e2 | 438 | |
51c997d8 | 439 | return sprintf(buf, "%ld\n", in0_from_reg(data->in[nr])); |
e53004e2 JD |
440 | } |
441 | ||
442 | static ssize_t show_in0_max(struct device *dev, struct device_attribute | |
443 | *devattr, char *buf) | |
444 | { | |
445 | struct f71805f_data *data = f71805f_update_device(dev); | |
51c997d8 JD |
446 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); |
447 | int nr = attr->index; | |
e53004e2 | 448 | |
51c997d8 | 449 | return sprintf(buf, "%ld\n", in0_from_reg(data->in_high[nr])); |
e53004e2 JD |
450 | } |
451 | ||
452 | static ssize_t show_in0_min(struct device *dev, struct device_attribute | |
453 | *devattr, char *buf) | |
454 | { | |
455 | struct f71805f_data *data = f71805f_update_device(dev); | |
51c997d8 JD |
456 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); |
457 | int nr = attr->index; | |
e53004e2 | 458 | |
51c997d8 | 459 | return sprintf(buf, "%ld\n", in0_from_reg(data->in_low[nr])); |
e53004e2 JD |
460 | } |
461 | ||
462 | static ssize_t set_in0_max(struct device *dev, struct device_attribute | |
463 | *devattr, const char *buf, size_t count) | |
464 | { | |
465 | struct f71805f_data *data = dev_get_drvdata(dev); | |
51c997d8 JD |
466 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); |
467 | int nr = attr->index; | |
2fff0840 GR |
468 | long val; |
469 | int err; | |
470 | ||
471 | err = kstrtol(buf, 10, &val); | |
472 | if (err) | |
473 | return err; | |
e53004e2 | 474 | |
f0819184 | 475 | mutex_lock(&data->update_lock); |
51c997d8 JD |
476 | data->in_high[nr] = in0_to_reg(val); |
477 | f71805f_write8(data, F71805F_REG_IN_HIGH(nr), data->in_high[nr]); | |
f0819184 | 478 | mutex_unlock(&data->update_lock); |
e53004e2 JD |
479 | |
480 | return count; | |
481 | } | |
482 | ||
483 | static ssize_t set_in0_min(struct device *dev, struct device_attribute | |
484 | *devattr, const char *buf, size_t count) | |
485 | { | |
486 | struct f71805f_data *data = dev_get_drvdata(dev); | |
51c997d8 JD |
487 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); |
488 | int nr = attr->index; | |
2fff0840 GR |
489 | long val; |
490 | int err; | |
491 | ||
492 | err = kstrtol(buf, 10, &val); | |
493 | if (err) | |
494 | return err; | |
e53004e2 | 495 | |
f0819184 | 496 | mutex_lock(&data->update_lock); |
51c997d8 JD |
497 | data->in_low[nr] = in0_to_reg(val); |
498 | f71805f_write8(data, F71805F_REG_IN_LOW(nr), data->in_low[nr]); | |
f0819184 | 499 | mutex_unlock(&data->update_lock); |
e53004e2 JD |
500 | |
501 | return count; | |
502 | } | |
503 | ||
e53004e2 JD |
504 | static ssize_t show_in(struct device *dev, struct device_attribute *devattr, |
505 | char *buf) | |
506 | { | |
507 | struct f71805f_data *data = f71805f_update_device(dev); | |
508 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
509 | int nr = attr->index; | |
510 | ||
511 | return sprintf(buf, "%ld\n", in_from_reg(data->in[nr])); | |
512 | } | |
513 | ||
514 | static ssize_t show_in_max(struct device *dev, struct device_attribute | |
515 | *devattr, char *buf) | |
516 | { | |
517 | struct f71805f_data *data = f71805f_update_device(dev); | |
518 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
519 | int nr = attr->index; | |
520 | ||
521 | return sprintf(buf, "%ld\n", in_from_reg(data->in_high[nr])); | |
522 | } | |
523 | ||
524 | static ssize_t show_in_min(struct device *dev, struct device_attribute | |
525 | *devattr, char *buf) | |
526 | { | |
527 | struct f71805f_data *data = f71805f_update_device(dev); | |
528 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
529 | int nr = attr->index; | |
530 | ||
531 | return sprintf(buf, "%ld\n", in_from_reg(data->in_low[nr])); | |
532 | } | |
533 | ||
534 | static ssize_t set_in_max(struct device *dev, struct device_attribute | |
535 | *devattr, const char *buf, size_t count) | |
536 | { | |
537 | struct f71805f_data *data = dev_get_drvdata(dev); | |
538 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
539 | int nr = attr->index; | |
2fff0840 GR |
540 | long val; |
541 | int err; | |
542 | ||
543 | err = kstrtol(buf, 10, &val); | |
544 | if (err) | |
545 | return err; | |
e53004e2 | 546 | |
f0819184 | 547 | mutex_lock(&data->update_lock); |
e53004e2 JD |
548 | data->in_high[nr] = in_to_reg(val); |
549 | f71805f_write8(data, F71805F_REG_IN_HIGH(nr), data->in_high[nr]); | |
f0819184 | 550 | mutex_unlock(&data->update_lock); |
e53004e2 JD |
551 | |
552 | return count; | |
553 | } | |
554 | ||
555 | static ssize_t set_in_min(struct device *dev, struct device_attribute | |
556 | *devattr, const char *buf, size_t count) | |
557 | { | |
558 | struct f71805f_data *data = dev_get_drvdata(dev); | |
559 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
560 | int nr = attr->index; | |
2fff0840 GR |
561 | long val; |
562 | int err; | |
563 | ||
564 | err = kstrtol(buf, 10, &val); | |
565 | if (err) | |
566 | return err; | |
e53004e2 | 567 | |
f0819184 | 568 | mutex_lock(&data->update_lock); |
e53004e2 JD |
569 | data->in_low[nr] = in_to_reg(val); |
570 | f71805f_write8(data, F71805F_REG_IN_LOW(nr), data->in_low[nr]); | |
f0819184 | 571 | mutex_unlock(&data->update_lock); |
e53004e2 JD |
572 | |
573 | return count; | |
574 | } | |
575 | ||
e53004e2 JD |
576 | static ssize_t show_fan(struct device *dev, struct device_attribute *devattr, |
577 | char *buf) | |
578 | { | |
579 | struct f71805f_data *data = f71805f_update_device(dev); | |
580 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
581 | int nr = attr->index; | |
582 | ||
583 | return sprintf(buf, "%ld\n", fan_from_reg(data->fan[nr])); | |
584 | } | |
585 | ||
586 | static ssize_t show_fan_min(struct device *dev, struct device_attribute | |
587 | *devattr, char *buf) | |
588 | { | |
589 | struct f71805f_data *data = f71805f_update_device(dev); | |
590 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
591 | int nr = attr->index; | |
592 | ||
593 | return sprintf(buf, "%ld\n", fan_from_reg(data->fan_low[nr])); | |
594 | } | |
595 | ||
315c7113 JD |
596 | static ssize_t show_fan_target(struct device *dev, struct device_attribute |
597 | *devattr, char *buf) | |
598 | { | |
599 | struct f71805f_data *data = f71805f_update_device(dev); | |
600 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
601 | int nr = attr->index; | |
602 | ||
603 | return sprintf(buf, "%ld\n", fan_from_reg(data->fan_target[nr])); | |
604 | } | |
605 | ||
e53004e2 JD |
606 | static ssize_t set_fan_min(struct device *dev, struct device_attribute |
607 | *devattr, const char *buf, size_t count) | |
608 | { | |
609 | struct f71805f_data *data = dev_get_drvdata(dev); | |
610 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
611 | int nr = attr->index; | |
2fff0840 GR |
612 | long val; |
613 | int err; | |
614 | ||
615 | err = kstrtol(buf, 10, &val); | |
616 | if (err) | |
617 | return err; | |
e53004e2 | 618 | |
f0819184 | 619 | mutex_lock(&data->update_lock); |
e53004e2 JD |
620 | data->fan_low[nr] = fan_to_reg(val); |
621 | f71805f_write16(data, F71805F_REG_FAN_LOW(nr), data->fan_low[nr]); | |
f0819184 | 622 | mutex_unlock(&data->update_lock); |
e53004e2 JD |
623 | |
624 | return count; | |
625 | } | |
626 | ||
315c7113 JD |
627 | static ssize_t set_fan_target(struct device *dev, struct device_attribute |
628 | *devattr, const char *buf, size_t count) | |
629 | { | |
630 | struct f71805f_data *data = dev_get_drvdata(dev); | |
631 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
632 | int nr = attr->index; | |
2fff0840 GR |
633 | long val; |
634 | int err; | |
635 | ||
636 | err = kstrtol(buf, 10, &val); | |
637 | if (err) | |
638 | return err; | |
315c7113 JD |
639 | |
640 | mutex_lock(&data->update_lock); | |
641 | data->fan_target[nr] = fan_to_reg(val); | |
642 | f71805f_write16(data, F71805F_REG_FAN_TARGET(nr), | |
643 | data->fan_target[nr]); | |
644 | mutex_unlock(&data->update_lock); | |
645 | ||
646 | return count; | |
647 | } | |
648 | ||
95e35312 JD |
649 | static ssize_t show_pwm(struct device *dev, struct device_attribute *devattr, |
650 | char *buf) | |
651 | { | |
652 | struct f71805f_data *data = f71805f_update_device(dev); | |
653 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
654 | int nr = attr->index; | |
655 | ||
656 | return sprintf(buf, "%d\n", (int)data->pwm[nr]); | |
657 | } | |
658 | ||
659 | static ssize_t show_pwm_enable(struct device *dev, struct device_attribute | |
660 | *devattr, char *buf) | |
661 | { | |
662 | struct f71805f_data *data = f71805f_update_device(dev); | |
663 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
664 | int nr = attr->index; | |
665 | int mode; | |
666 | ||
667 | switch (data->fan_ctrl[nr] & FAN_CTRL_MODE_MASK) { | |
668 | case FAN_CTRL_MODE_SPEED: | |
669 | mode = 3; | |
670 | break; | |
671 | case FAN_CTRL_MODE_TEMPERATURE: | |
672 | mode = 2; | |
673 | break; | |
674 | default: /* MANUAL */ | |
675 | mode = 1; | |
676 | } | |
677 | ||
678 | return sprintf(buf, "%d\n", mode); | |
679 | } | |
680 | ||
6e2bc17b JD |
681 | static ssize_t show_pwm_freq(struct device *dev, struct device_attribute |
682 | *devattr, char *buf) | |
683 | { | |
684 | struct f71805f_data *data = f71805f_update_device(dev); | |
685 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
686 | int nr = attr->index; | |
687 | ||
688 | return sprintf(buf, "%lu\n", pwm_freq_from_reg(data->pwm_freq[nr])); | |
689 | } | |
690 | ||
e196783d JD |
691 | static ssize_t show_pwm_mode(struct device *dev, struct device_attribute |
692 | *devattr, char *buf) | |
693 | { | |
694 | struct f71805f_data *data = f71805f_update_device(dev); | |
695 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
696 | int nr = attr->index; | |
697 | ||
698 | return sprintf(buf, "%d\n", pwm_mode_from_reg(data->fan_ctrl[nr])); | |
699 | } | |
700 | ||
95e35312 JD |
701 | static ssize_t set_pwm(struct device *dev, struct device_attribute *devattr, |
702 | const char *buf, size_t count) | |
703 | { | |
704 | struct f71805f_data *data = dev_get_drvdata(dev); | |
705 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
706 | int nr = attr->index; | |
2fff0840 GR |
707 | unsigned long val; |
708 | int err; | |
709 | ||
710 | err = kstrtoul(buf, 10, &val); | |
711 | if (err) | |
712 | return err; | |
95e35312 JD |
713 | |
714 | if (val > 255) | |
715 | return -EINVAL; | |
716 | ||
717 | mutex_lock(&data->update_lock); | |
718 | data->pwm[nr] = val; | |
719 | f71805f_write8(data, F71805F_REG_PWM_DUTY(nr), data->pwm[nr]); | |
720 | mutex_unlock(&data->update_lock); | |
721 | ||
722 | return count; | |
723 | } | |
724 | ||
725 | static struct attribute *f71805f_attr_pwm[]; | |
726 | ||
727 | static ssize_t set_pwm_enable(struct device *dev, struct device_attribute | |
728 | *devattr, const char *buf, size_t count) | |
729 | { | |
730 | struct f71805f_data *data = dev_get_drvdata(dev); | |
731 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
732 | int nr = attr->index; | |
95e35312 | 733 | u8 reg; |
2fff0840 GR |
734 | unsigned long val; |
735 | int err; | |
736 | ||
737 | err = kstrtoul(buf, 10, &val); | |
738 | if (err) | |
739 | return err; | |
95e35312 JD |
740 | |
741 | if (val < 1 || val > 3) | |
742 | return -EINVAL; | |
743 | ||
744 | if (val > 1) { /* Automatic mode, user can't set PWM value */ | |
745 | if (sysfs_chmod_file(&dev->kobj, f71805f_attr_pwm[nr], | |
746 | S_IRUGO)) | |
747 | dev_dbg(dev, "chmod -w pwm%d failed\n", nr + 1); | |
748 | } | |
749 | ||
750 | mutex_lock(&data->update_lock); | |
751 | reg = f71805f_read8(data, F71805F_REG_FAN_CTRL(nr)) | |
752 | & ~FAN_CTRL_MODE_MASK; | |
753 | switch (val) { | |
754 | case 1: | |
755 | reg |= FAN_CTRL_MODE_MANUAL; | |
756 | break; | |
757 | case 2: | |
758 | reg |= FAN_CTRL_MODE_TEMPERATURE; | |
759 | break; | |
760 | case 3: | |
761 | reg |= FAN_CTRL_MODE_SPEED; | |
762 | break; | |
763 | } | |
764 | data->fan_ctrl[nr] = reg; | |
765 | f71805f_write8(data, F71805F_REG_FAN_CTRL(nr), reg); | |
766 | mutex_unlock(&data->update_lock); | |
767 | ||
768 | if (val == 1) { /* Manual mode, user can set PWM value */ | |
769 | if (sysfs_chmod_file(&dev->kobj, f71805f_attr_pwm[nr], | |
770 | S_IRUGO | S_IWUSR)) | |
771 | dev_dbg(dev, "chmod +w pwm%d failed\n", nr + 1); | |
772 | } | |
773 | ||
774 | return count; | |
775 | } | |
776 | ||
6e2bc17b JD |
777 | static ssize_t set_pwm_freq(struct device *dev, struct device_attribute |
778 | *devattr, const char *buf, size_t count) | |
779 | { | |
780 | struct f71805f_data *data = dev_get_drvdata(dev); | |
781 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
782 | int nr = attr->index; | |
2fff0840 GR |
783 | unsigned long val; |
784 | int err; | |
785 | ||
786 | err = kstrtoul(buf, 10, &val); | |
787 | if (err) | |
788 | return err; | |
6e2bc17b JD |
789 | |
790 | mutex_lock(&data->update_lock); | |
791 | data->pwm_freq[nr] = pwm_freq_to_reg(val); | |
792 | f71805f_write8(data, F71805F_REG_PWM_FREQ(nr), data->pwm_freq[nr]); | |
793 | mutex_unlock(&data->update_lock); | |
794 | ||
795 | return count; | |
796 | } | |
797 | ||
aba5073d PE |
798 | static ssize_t show_pwm_auto_point_temp(struct device *dev, |
799 | struct device_attribute *devattr, | |
2fff0840 | 800 | char *buf) |
aba5073d PE |
801 | { |
802 | struct f71805f_data *data = dev_get_drvdata(dev); | |
803 | struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr); | |
804 | int pwmnr = attr->nr; | |
805 | int apnr = attr->index; | |
806 | ||
807 | return sprintf(buf, "%ld\n", | |
808 | temp_from_reg(data->auto_points[pwmnr].temp[apnr])); | |
809 | } | |
810 | ||
811 | static ssize_t set_pwm_auto_point_temp(struct device *dev, | |
812 | struct device_attribute *devattr, | |
2fff0840 | 813 | const char *buf, size_t count) |
aba5073d PE |
814 | { |
815 | struct f71805f_data *data = dev_get_drvdata(dev); | |
816 | struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr); | |
817 | int pwmnr = attr->nr; | |
818 | int apnr = attr->index; | |
2fff0840 GR |
819 | unsigned long val; |
820 | int err; | |
821 | ||
822 | err = kstrtoul(buf, 10, &val); | |
823 | if (err) | |
824 | return err; | |
aba5073d PE |
825 | |
826 | mutex_lock(&data->update_lock); | |
827 | data->auto_points[pwmnr].temp[apnr] = temp_to_reg(val); | |
828 | f71805f_write8(data, F71805F_REG_PWM_AUTO_POINT_TEMP(pwmnr, apnr), | |
829 | data->auto_points[pwmnr].temp[apnr]); | |
830 | mutex_unlock(&data->update_lock); | |
831 | ||
832 | return count; | |
833 | } | |
834 | ||
835 | static ssize_t show_pwm_auto_point_fan(struct device *dev, | |
836 | struct device_attribute *devattr, | |
2fff0840 | 837 | char *buf) |
aba5073d PE |
838 | { |
839 | struct f71805f_data *data = dev_get_drvdata(dev); | |
840 | struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr); | |
841 | int pwmnr = attr->nr; | |
842 | int apnr = attr->index; | |
843 | ||
844 | return sprintf(buf, "%ld\n", | |
845 | fan_from_reg(data->auto_points[pwmnr].fan[apnr])); | |
846 | } | |
847 | ||
848 | static ssize_t set_pwm_auto_point_fan(struct device *dev, | |
849 | struct device_attribute *devattr, | |
2fff0840 | 850 | const char *buf, size_t count) |
aba5073d PE |
851 | { |
852 | struct f71805f_data *data = dev_get_drvdata(dev); | |
853 | struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr); | |
854 | int pwmnr = attr->nr; | |
855 | int apnr = attr->index; | |
2fff0840 GR |
856 | unsigned long val; |
857 | int err; | |
858 | ||
859 | err = kstrtoul(buf, 10, &val); | |
860 | if (err) | |
861 | return err; | |
aba5073d PE |
862 | |
863 | mutex_lock(&data->update_lock); | |
864 | data->auto_points[pwmnr].fan[apnr] = fan_to_reg(val); | |
865 | f71805f_write16(data, F71805F_REG_PWM_AUTO_POINT_FAN(pwmnr, apnr), | |
2fff0840 | 866 | data->auto_points[pwmnr].fan[apnr]); |
aba5073d PE |
867 | mutex_unlock(&data->update_lock); |
868 | ||
869 | return count; | |
870 | } | |
871 | ||
e53004e2 JD |
872 | static ssize_t show_temp(struct device *dev, struct device_attribute *devattr, |
873 | char *buf) | |
874 | { | |
875 | struct f71805f_data *data = f71805f_update_device(dev); | |
876 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
877 | int nr = attr->index; | |
878 | ||
879 | return sprintf(buf, "%ld\n", temp_from_reg(data->temp[nr])); | |
880 | } | |
881 | ||
882 | static ssize_t show_temp_max(struct device *dev, struct device_attribute | |
883 | *devattr, char *buf) | |
884 | { | |
885 | struct f71805f_data *data = f71805f_update_device(dev); | |
886 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
887 | int nr = attr->index; | |
888 | ||
889 | return sprintf(buf, "%ld\n", temp_from_reg(data->temp_high[nr])); | |
890 | } | |
891 | ||
892 | static ssize_t show_temp_hyst(struct device *dev, struct device_attribute | |
893 | *devattr, char *buf) | |
894 | { | |
895 | struct f71805f_data *data = f71805f_update_device(dev); | |
896 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
897 | int nr = attr->index; | |
898 | ||
899 | return sprintf(buf, "%ld\n", temp_from_reg(data->temp_hyst[nr])); | |
900 | } | |
901 | ||
902 | static ssize_t show_temp_type(struct device *dev, struct device_attribute | |
903 | *devattr, char *buf) | |
904 | { | |
905 | struct f71805f_data *data = f71805f_update_device(dev); | |
906 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
907 | int nr = attr->index; | |
908 | ||
909 | /* 3 is diode, 4 is thermistor */ | |
910 | return sprintf(buf, "%u\n", (data->temp_mode & (1 << nr)) ? 3 : 4); | |
911 | } | |
912 | ||
913 | static ssize_t set_temp_max(struct device *dev, struct device_attribute | |
914 | *devattr, const char *buf, size_t count) | |
915 | { | |
916 | struct f71805f_data *data = dev_get_drvdata(dev); | |
917 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
918 | int nr = attr->index; | |
2fff0840 GR |
919 | long val; |
920 | int err; | |
921 | ||
922 | err = kstrtol(buf, 10, &val); | |
923 | if (err) | |
924 | return err; | |
e53004e2 | 925 | |
f0819184 | 926 | mutex_lock(&data->update_lock); |
e53004e2 JD |
927 | data->temp_high[nr] = temp_to_reg(val); |
928 | f71805f_write8(data, F71805F_REG_TEMP_HIGH(nr), data->temp_high[nr]); | |
f0819184 | 929 | mutex_unlock(&data->update_lock); |
e53004e2 JD |
930 | |
931 | return count; | |
932 | } | |
933 | ||
934 | static ssize_t set_temp_hyst(struct device *dev, struct device_attribute | |
935 | *devattr, const char *buf, size_t count) | |
936 | { | |
937 | struct f71805f_data *data = dev_get_drvdata(dev); | |
938 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
939 | int nr = attr->index; | |
2fff0840 GR |
940 | long val; |
941 | int err; | |
942 | ||
943 | err = kstrtol(buf, 10, &val); | |
944 | if (err) | |
945 | return err; | |
e53004e2 | 946 | |
f0819184 | 947 | mutex_lock(&data->update_lock); |
e53004e2 JD |
948 | data->temp_hyst[nr] = temp_to_reg(val); |
949 | f71805f_write8(data, F71805F_REG_TEMP_HYST(nr), data->temp_hyst[nr]); | |
f0819184 | 950 | mutex_unlock(&data->update_lock); |
e53004e2 JD |
951 | |
952 | return count; | |
953 | } | |
954 | ||
8258e490 | 955 | static ssize_t alarms_in_show(struct device *dev, struct device_attribute |
e53004e2 JD |
956 | *devattr, char *buf) |
957 | { | |
958 | struct f71805f_data *data = f71805f_update_device(dev); | |
959 | ||
51c997d8 | 960 | return sprintf(buf, "%lu\n", data->alarms & 0x7ff); |
e53004e2 JD |
961 | } |
962 | ||
8258e490 | 963 | static ssize_t alarms_fan_show(struct device *dev, struct device_attribute |
e53004e2 JD |
964 | *devattr, char *buf) |
965 | { | |
966 | struct f71805f_data *data = f71805f_update_device(dev); | |
967 | ||
2d45771e | 968 | return sprintf(buf, "%lu\n", (data->alarms >> 16) & 0x07); |
e53004e2 JD |
969 | } |
970 | ||
8258e490 | 971 | static ssize_t alarms_temp_show(struct device *dev, struct device_attribute |
e53004e2 JD |
972 | *devattr, char *buf) |
973 | { | |
974 | struct f71805f_data *data = f71805f_update_device(dev); | |
975 | ||
2d45771e JD |
976 | return sprintf(buf, "%lu\n", (data->alarms >> 11) & 0x07); |
977 | } | |
978 | ||
979 | static ssize_t show_alarm(struct device *dev, struct device_attribute | |
980 | *devattr, char *buf) | |
981 | { | |
982 | struct f71805f_data *data = f71805f_update_device(dev); | |
983 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
984 | int bitnr = attr->index; | |
985 | ||
986 | return sprintf(buf, "%lu\n", (data->alarms >> bitnr) & 1); | |
e53004e2 JD |
987 | } |
988 | ||
8258e490 | 989 | static ssize_t name_show(struct device *dev, struct device_attribute |
e53004e2 JD |
990 | *devattr, char *buf) |
991 | { | |
992 | struct f71805f_data *data = dev_get_drvdata(dev); | |
993 | ||
994 | return sprintf(buf, "%s\n", data->name); | |
995 | } | |
996 | ||
51c997d8 | 997 | static SENSOR_DEVICE_ATTR(in0_input, S_IRUGO, show_in0, NULL, 0); |
2fff0840 | 998 | static SENSOR_DEVICE_ATTR(in0_max, S_IRUGO | S_IWUSR, |
51c997d8 | 999 | show_in0_max, set_in0_max, 0); |
2fff0840 | 1000 | static SENSOR_DEVICE_ATTR(in0_min, S_IRUGO | S_IWUSR, |
51c997d8 | 1001 | show_in0_min, set_in0_min, 0); |
0e39e01c JD |
1002 | static SENSOR_DEVICE_ATTR(in1_input, S_IRUGO, show_in, NULL, 1); |
1003 | static SENSOR_DEVICE_ATTR(in1_max, S_IRUGO | S_IWUSR, | |
1004 | show_in_max, set_in_max, 1); | |
1005 | static SENSOR_DEVICE_ATTR(in1_min, S_IRUGO | S_IWUSR, | |
1006 | show_in_min, set_in_min, 1); | |
1007 | static SENSOR_DEVICE_ATTR(in2_input, S_IRUGO, show_in, NULL, 2); | |
1008 | static SENSOR_DEVICE_ATTR(in2_max, S_IRUGO | S_IWUSR, | |
1009 | show_in_max, set_in_max, 2); | |
1010 | static SENSOR_DEVICE_ATTR(in2_min, S_IRUGO | S_IWUSR, | |
1011 | show_in_min, set_in_min, 2); | |
1012 | static SENSOR_DEVICE_ATTR(in3_input, S_IRUGO, show_in, NULL, 3); | |
1013 | static SENSOR_DEVICE_ATTR(in3_max, S_IRUGO | S_IWUSR, | |
1014 | show_in_max, set_in_max, 3); | |
1015 | static SENSOR_DEVICE_ATTR(in3_min, S_IRUGO | S_IWUSR, | |
1016 | show_in_min, set_in_min, 3); | |
1017 | static SENSOR_DEVICE_ATTR(in4_input, S_IRUGO, show_in, NULL, 4); | |
1018 | static SENSOR_DEVICE_ATTR(in4_max, S_IRUGO | S_IWUSR, | |
1019 | show_in_max, set_in_max, 4); | |
1020 | static SENSOR_DEVICE_ATTR(in4_min, S_IRUGO | S_IWUSR, | |
1021 | show_in_min, set_in_min, 4); | |
1022 | static SENSOR_DEVICE_ATTR(in5_input, S_IRUGO, show_in, NULL, 5); | |
1023 | static SENSOR_DEVICE_ATTR(in5_max, S_IRUGO | S_IWUSR, | |
1024 | show_in_max, set_in_max, 5); | |
1025 | static SENSOR_DEVICE_ATTR(in5_min, S_IRUGO | S_IWUSR, | |
1026 | show_in_min, set_in_min, 5); | |
1027 | static SENSOR_DEVICE_ATTR(in6_input, S_IRUGO, show_in, NULL, 6); | |
1028 | static SENSOR_DEVICE_ATTR(in6_max, S_IRUGO | S_IWUSR, | |
1029 | show_in_max, set_in_max, 6); | |
1030 | static SENSOR_DEVICE_ATTR(in6_min, S_IRUGO | S_IWUSR, | |
1031 | show_in_min, set_in_min, 6); | |
1032 | static SENSOR_DEVICE_ATTR(in7_input, S_IRUGO, show_in, NULL, 7); | |
1033 | static SENSOR_DEVICE_ATTR(in7_max, S_IRUGO | S_IWUSR, | |
1034 | show_in_max, set_in_max, 7); | |
1035 | static SENSOR_DEVICE_ATTR(in7_min, S_IRUGO | S_IWUSR, | |
1036 | show_in_min, set_in_min, 7); | |
1037 | static SENSOR_DEVICE_ATTR(in8_input, S_IRUGO, show_in, NULL, 8); | |
1038 | static SENSOR_DEVICE_ATTR(in8_max, S_IRUGO | S_IWUSR, | |
1039 | show_in_max, set_in_max, 8); | |
1040 | static SENSOR_DEVICE_ATTR(in8_min, S_IRUGO | S_IWUSR, | |
1041 | show_in_min, set_in_min, 8); | |
51c997d8 JD |
1042 | static SENSOR_DEVICE_ATTR(in9_input, S_IRUGO, show_in0, NULL, 9); |
1043 | static SENSOR_DEVICE_ATTR(in9_max, S_IRUGO | S_IWUSR, | |
1044 | show_in0_max, set_in0_max, 9); | |
1045 | static SENSOR_DEVICE_ATTR(in9_min, S_IRUGO | S_IWUSR, | |
1046 | show_in0_min, set_in0_min, 9); | |
1047 | static SENSOR_DEVICE_ATTR(in10_input, S_IRUGO, show_in0, NULL, 10); | |
1048 | static SENSOR_DEVICE_ATTR(in10_max, S_IRUGO | S_IWUSR, | |
1049 | show_in0_max, set_in0_max, 10); | |
1050 | static SENSOR_DEVICE_ATTR(in10_min, S_IRUGO | S_IWUSR, | |
1051 | show_in0_min, set_in0_min, 10); | |
0e39e01c JD |
1052 | |
1053 | static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0); | |
1054 | static SENSOR_DEVICE_ATTR(fan1_min, S_IRUGO | S_IWUSR, | |
1055 | show_fan_min, set_fan_min, 0); | |
315c7113 JD |
1056 | static SENSOR_DEVICE_ATTR(fan1_target, S_IRUGO | S_IWUSR, |
1057 | show_fan_target, set_fan_target, 0); | |
0e39e01c JD |
1058 | static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1); |
1059 | static SENSOR_DEVICE_ATTR(fan2_min, S_IRUGO | S_IWUSR, | |
1060 | show_fan_min, set_fan_min, 1); | |
315c7113 JD |
1061 | static SENSOR_DEVICE_ATTR(fan2_target, S_IRUGO | S_IWUSR, |
1062 | show_fan_target, set_fan_target, 1); | |
0e39e01c JD |
1063 | static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2); |
1064 | static SENSOR_DEVICE_ATTR(fan3_min, S_IRUGO | S_IWUSR, | |
1065 | show_fan_min, set_fan_min, 2); | |
315c7113 JD |
1066 | static SENSOR_DEVICE_ATTR(fan3_target, S_IRUGO | S_IWUSR, |
1067 | show_fan_target, set_fan_target, 2); | |
0e39e01c JD |
1068 | |
1069 | static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_temp, NULL, 0); | |
1070 | static SENSOR_DEVICE_ATTR(temp1_max, S_IRUGO | S_IWUSR, | |
1071 | show_temp_max, set_temp_max, 0); | |
1072 | static SENSOR_DEVICE_ATTR(temp1_max_hyst, S_IRUGO | S_IWUSR, | |
1073 | show_temp_hyst, set_temp_hyst, 0); | |
1074 | static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO, show_temp_type, NULL, 0); | |
1075 | static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO, show_temp, NULL, 1); | |
1076 | static SENSOR_DEVICE_ATTR(temp2_max, S_IRUGO | S_IWUSR, | |
1077 | show_temp_max, set_temp_max, 1); | |
1078 | static SENSOR_DEVICE_ATTR(temp2_max_hyst, S_IRUGO | S_IWUSR, | |
1079 | show_temp_hyst, set_temp_hyst, 1); | |
1080 | static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO, show_temp_type, NULL, 1); | |
1081 | static SENSOR_DEVICE_ATTR(temp3_input, S_IRUGO, show_temp, NULL, 2); | |
1082 | static SENSOR_DEVICE_ATTR(temp3_max, S_IRUGO | S_IWUSR, | |
1083 | show_temp_max, set_temp_max, 2); | |
1084 | static SENSOR_DEVICE_ATTR(temp3_max_hyst, S_IRUGO | S_IWUSR, | |
1085 | show_temp_hyst, set_temp_hyst, 2); | |
1086 | static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO, show_temp_type, NULL, 2); | |
1087 | ||
2fff0840 GR |
1088 | /* |
1089 | * pwm (value) files are created read-only, write permission is | |
1090 | * then added or removed dynamically as needed | |
1091 | */ | |
95e35312 JD |
1092 | static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO, show_pwm, set_pwm, 0); |
1093 | static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR, | |
1094 | show_pwm_enable, set_pwm_enable, 0); | |
6e2bc17b JD |
1095 | static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR, |
1096 | show_pwm_freq, set_pwm_freq, 0); | |
e196783d | 1097 | static SENSOR_DEVICE_ATTR(pwm1_mode, S_IRUGO, show_pwm_mode, NULL, 0); |
95e35312 JD |
1098 | static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO, show_pwm, set_pwm, 1); |
1099 | static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR, | |
1100 | show_pwm_enable, set_pwm_enable, 1); | |
6e2bc17b JD |
1101 | static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO | S_IWUSR, |
1102 | show_pwm_freq, set_pwm_freq, 1); | |
e196783d | 1103 | static SENSOR_DEVICE_ATTR(pwm2_mode, S_IRUGO, show_pwm_mode, NULL, 1); |
95e35312 JD |
1104 | static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO, show_pwm, set_pwm, 2); |
1105 | static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR, | |
1106 | show_pwm_enable, set_pwm_enable, 2); | |
6e2bc17b JD |
1107 | static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO | S_IWUSR, |
1108 | show_pwm_freq, set_pwm_freq, 2); | |
e196783d | 1109 | static SENSOR_DEVICE_ATTR(pwm3_mode, S_IRUGO, show_pwm_mode, NULL, 2); |
95e35312 | 1110 | |
aba5073d PE |
1111 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR, |
1112 | show_pwm_auto_point_temp, set_pwm_auto_point_temp, | |
1113 | 0, 0); | |
1114 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_fan, S_IRUGO | S_IWUSR, | |
1115 | show_pwm_auto_point_fan, set_pwm_auto_point_fan, | |
1116 | 0, 0); | |
1117 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR, | |
1118 | show_pwm_auto_point_temp, set_pwm_auto_point_temp, | |
1119 | 0, 1); | |
1120 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_fan, S_IRUGO | S_IWUSR, | |
1121 | show_pwm_auto_point_fan, set_pwm_auto_point_fan, | |
1122 | 0, 1); | |
1123 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR, | |
1124 | show_pwm_auto_point_temp, set_pwm_auto_point_temp, | |
1125 | 0, 2); | |
1126 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_fan, S_IRUGO | S_IWUSR, | |
1127 | show_pwm_auto_point_fan, set_pwm_auto_point_fan, | |
1128 | 0, 2); | |
1129 | ||
1130 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR, | |
1131 | show_pwm_auto_point_temp, set_pwm_auto_point_temp, | |
1132 | 1, 0); | |
1133 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_fan, S_IRUGO | S_IWUSR, | |
1134 | show_pwm_auto_point_fan, set_pwm_auto_point_fan, | |
1135 | 1, 0); | |
1136 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR, | |
1137 | show_pwm_auto_point_temp, set_pwm_auto_point_temp, | |
1138 | 1, 1); | |
1139 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_fan, S_IRUGO | S_IWUSR, | |
1140 | show_pwm_auto_point_fan, set_pwm_auto_point_fan, | |
1141 | 1, 1); | |
1142 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR, | |
1143 | show_pwm_auto_point_temp, set_pwm_auto_point_temp, | |
1144 | 1, 2); | |
1145 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_fan, S_IRUGO | S_IWUSR, | |
1146 | show_pwm_auto_point_fan, set_pwm_auto_point_fan, | |
1147 | 1, 2); | |
1148 | ||
1149 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR, | |
1150 | show_pwm_auto_point_temp, set_pwm_auto_point_temp, | |
1151 | 2, 0); | |
1152 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_fan, S_IRUGO | S_IWUSR, | |
1153 | show_pwm_auto_point_fan, set_pwm_auto_point_fan, | |
1154 | 2, 0); | |
1155 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR, | |
1156 | show_pwm_auto_point_temp, set_pwm_auto_point_temp, | |
1157 | 2, 1); | |
1158 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_fan, S_IRUGO | S_IWUSR, | |
1159 | show_pwm_auto_point_fan, set_pwm_auto_point_fan, | |
1160 | 2, 1); | |
1161 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR, | |
1162 | show_pwm_auto_point_temp, set_pwm_auto_point_temp, | |
1163 | 2, 2); | |
1164 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_fan, S_IRUGO | S_IWUSR, | |
1165 | show_pwm_auto_point_fan, set_pwm_auto_point_fan, | |
1166 | 2, 2); | |
1167 | ||
0e39e01c JD |
1168 | static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0); |
1169 | static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1); | |
1170 | static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2); | |
1171 | static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3); | |
1172 | static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 4); | |
1173 | static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 5); | |
1174 | static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 6); | |
1175 | static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 7); | |
1176 | static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 8); | |
51c997d8 JD |
1177 | static SENSOR_DEVICE_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 9); |
1178 | static SENSOR_DEVICE_ATTR(in10_alarm, S_IRUGO, show_alarm, NULL, 10); | |
0e39e01c JD |
1179 | static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 11); |
1180 | static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 12); | |
1181 | static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13); | |
1182 | static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 16); | |
1183 | static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 17); | |
1184 | static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 18); | |
8258e490 JL |
1185 | static DEVICE_ATTR_RO(alarms_in); |
1186 | static DEVICE_ATTR_RO(alarms_fan); | |
1187 | static DEVICE_ATTR_RO(alarms_temp); | |
0e39e01c | 1188 | |
8258e490 | 1189 | static DEVICE_ATTR_RO(name); |
0e39e01c JD |
1190 | |
1191 | static struct attribute *f71805f_attributes[] = { | |
51c997d8 JD |
1192 | &sensor_dev_attr_in0_input.dev_attr.attr, |
1193 | &sensor_dev_attr_in0_max.dev_attr.attr, | |
1194 | &sensor_dev_attr_in0_min.dev_attr.attr, | |
0e39e01c JD |
1195 | &sensor_dev_attr_in1_input.dev_attr.attr, |
1196 | &sensor_dev_attr_in1_max.dev_attr.attr, | |
1197 | &sensor_dev_attr_in1_min.dev_attr.attr, | |
1198 | &sensor_dev_attr_in2_input.dev_attr.attr, | |
1199 | &sensor_dev_attr_in2_max.dev_attr.attr, | |
1200 | &sensor_dev_attr_in2_min.dev_attr.attr, | |
1201 | &sensor_dev_attr_in3_input.dev_attr.attr, | |
1202 | &sensor_dev_attr_in3_max.dev_attr.attr, | |
1203 | &sensor_dev_attr_in3_min.dev_attr.attr, | |
0e39e01c JD |
1204 | &sensor_dev_attr_in5_input.dev_attr.attr, |
1205 | &sensor_dev_attr_in5_max.dev_attr.attr, | |
1206 | &sensor_dev_attr_in5_min.dev_attr.attr, | |
1207 | &sensor_dev_attr_in6_input.dev_attr.attr, | |
1208 | &sensor_dev_attr_in6_max.dev_attr.attr, | |
1209 | &sensor_dev_attr_in6_min.dev_attr.attr, | |
1210 | &sensor_dev_attr_in7_input.dev_attr.attr, | |
1211 | &sensor_dev_attr_in7_max.dev_attr.attr, | |
1212 | &sensor_dev_attr_in7_min.dev_attr.attr, | |
0e39e01c | 1213 | |
c7176cb5 JD |
1214 | &sensor_dev_attr_fan1_input.dev_attr.attr, |
1215 | &sensor_dev_attr_fan1_min.dev_attr.attr, | |
1216 | &sensor_dev_attr_fan1_alarm.dev_attr.attr, | |
1217 | &sensor_dev_attr_fan1_target.dev_attr.attr, | |
1218 | &sensor_dev_attr_fan2_input.dev_attr.attr, | |
1219 | &sensor_dev_attr_fan2_min.dev_attr.attr, | |
1220 | &sensor_dev_attr_fan2_alarm.dev_attr.attr, | |
1221 | &sensor_dev_attr_fan2_target.dev_attr.attr, | |
1222 | &sensor_dev_attr_fan3_input.dev_attr.attr, | |
1223 | &sensor_dev_attr_fan3_min.dev_attr.attr, | |
1224 | &sensor_dev_attr_fan3_alarm.dev_attr.attr, | |
1225 | &sensor_dev_attr_fan3_target.dev_attr.attr, | |
1226 | ||
1227 | &sensor_dev_attr_pwm1.dev_attr.attr, | |
1228 | &sensor_dev_attr_pwm1_enable.dev_attr.attr, | |
1229 | &sensor_dev_attr_pwm1_mode.dev_attr.attr, | |
1230 | &sensor_dev_attr_pwm2.dev_attr.attr, | |
1231 | &sensor_dev_attr_pwm2_enable.dev_attr.attr, | |
1232 | &sensor_dev_attr_pwm2_mode.dev_attr.attr, | |
1233 | &sensor_dev_attr_pwm3.dev_attr.attr, | |
1234 | &sensor_dev_attr_pwm3_enable.dev_attr.attr, | |
1235 | &sensor_dev_attr_pwm3_mode.dev_attr.attr, | |
1236 | ||
0e39e01c JD |
1237 | &sensor_dev_attr_temp1_input.dev_attr.attr, |
1238 | &sensor_dev_attr_temp1_max.dev_attr.attr, | |
1239 | &sensor_dev_attr_temp1_max_hyst.dev_attr.attr, | |
1240 | &sensor_dev_attr_temp1_type.dev_attr.attr, | |
1241 | &sensor_dev_attr_temp2_input.dev_attr.attr, | |
1242 | &sensor_dev_attr_temp2_max.dev_attr.attr, | |
1243 | &sensor_dev_attr_temp2_max_hyst.dev_attr.attr, | |
1244 | &sensor_dev_attr_temp2_type.dev_attr.attr, | |
1245 | &sensor_dev_attr_temp3_input.dev_attr.attr, | |
1246 | &sensor_dev_attr_temp3_max.dev_attr.attr, | |
1247 | &sensor_dev_attr_temp3_max_hyst.dev_attr.attr, | |
1248 | &sensor_dev_attr_temp3_type.dev_attr.attr, | |
1249 | ||
aba5073d PE |
1250 | &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr, |
1251 | &sensor_dev_attr_pwm1_auto_point1_fan.dev_attr.attr, | |
1252 | &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr, | |
1253 | &sensor_dev_attr_pwm1_auto_point2_fan.dev_attr.attr, | |
1254 | &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr, | |
1255 | &sensor_dev_attr_pwm1_auto_point3_fan.dev_attr.attr, | |
1256 | &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr, | |
1257 | &sensor_dev_attr_pwm2_auto_point1_fan.dev_attr.attr, | |
1258 | &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr, | |
1259 | &sensor_dev_attr_pwm2_auto_point2_fan.dev_attr.attr, | |
1260 | &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr, | |
1261 | &sensor_dev_attr_pwm2_auto_point3_fan.dev_attr.attr, | |
1262 | &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr, | |
1263 | &sensor_dev_attr_pwm3_auto_point1_fan.dev_attr.attr, | |
1264 | &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr, | |
1265 | &sensor_dev_attr_pwm3_auto_point2_fan.dev_attr.attr, | |
1266 | &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr, | |
1267 | &sensor_dev_attr_pwm3_auto_point3_fan.dev_attr.attr, | |
1268 | ||
0e39e01c JD |
1269 | &sensor_dev_attr_in0_alarm.dev_attr.attr, |
1270 | &sensor_dev_attr_in1_alarm.dev_attr.attr, | |
1271 | &sensor_dev_attr_in2_alarm.dev_attr.attr, | |
1272 | &sensor_dev_attr_in3_alarm.dev_attr.attr, | |
0e39e01c JD |
1273 | &sensor_dev_attr_in5_alarm.dev_attr.attr, |
1274 | &sensor_dev_attr_in6_alarm.dev_attr.attr, | |
1275 | &sensor_dev_attr_in7_alarm.dev_attr.attr, | |
0e39e01c JD |
1276 | &dev_attr_alarms_in.attr, |
1277 | &sensor_dev_attr_temp1_alarm.dev_attr.attr, | |
1278 | &sensor_dev_attr_temp2_alarm.dev_attr.attr, | |
1279 | &sensor_dev_attr_temp3_alarm.dev_attr.attr, | |
1280 | &dev_attr_alarms_temp.attr, | |
1281 | &dev_attr_alarms_fan.attr, | |
1282 | ||
1283 | &dev_attr_name.attr, | |
1284 | NULL | |
2488a39d JD |
1285 | }; |
1286 | ||
0e39e01c JD |
1287 | static const struct attribute_group f71805f_group = { |
1288 | .attrs = f71805f_attributes, | |
2488a39d JD |
1289 | }; |
1290 | ||
51c997d8 JD |
1291 | static struct attribute *f71805f_attributes_optin[4][5] = { |
1292 | { | |
1293 | &sensor_dev_attr_in4_input.dev_attr.attr, | |
1294 | &sensor_dev_attr_in4_max.dev_attr.attr, | |
1295 | &sensor_dev_attr_in4_min.dev_attr.attr, | |
1296 | &sensor_dev_attr_in4_alarm.dev_attr.attr, | |
1297 | NULL | |
1298 | }, { | |
1299 | &sensor_dev_attr_in8_input.dev_attr.attr, | |
1300 | &sensor_dev_attr_in8_max.dev_attr.attr, | |
1301 | &sensor_dev_attr_in8_min.dev_attr.attr, | |
1302 | &sensor_dev_attr_in8_alarm.dev_attr.attr, | |
1303 | NULL | |
1304 | }, { | |
1305 | &sensor_dev_attr_in9_input.dev_attr.attr, | |
1306 | &sensor_dev_attr_in9_max.dev_attr.attr, | |
1307 | &sensor_dev_attr_in9_min.dev_attr.attr, | |
1308 | &sensor_dev_attr_in9_alarm.dev_attr.attr, | |
1309 | NULL | |
1310 | }, { | |
1311 | &sensor_dev_attr_in10_input.dev_attr.attr, | |
1312 | &sensor_dev_attr_in10_max.dev_attr.attr, | |
1313 | &sensor_dev_attr_in10_min.dev_attr.attr, | |
1314 | &sensor_dev_attr_in10_alarm.dev_attr.attr, | |
1315 | NULL | |
1316 | } | |
1317 | }; | |
1318 | ||
1319 | static const struct attribute_group f71805f_group_optin[4] = { | |
1320 | { .attrs = f71805f_attributes_optin[0] }, | |
1321 | { .attrs = f71805f_attributes_optin[1] }, | |
1322 | { .attrs = f71805f_attributes_optin[2] }, | |
1323 | { .attrs = f71805f_attributes_optin[3] }, | |
1324 | }; | |
1325 | ||
2fff0840 GR |
1326 | /* |
1327 | * We don't include pwm_freq files in the arrays above, because they must be | |
1328 | * created conditionally (only if pwm_mode is 1 == PWM) | |
1329 | */ | |
e196783d JD |
1330 | static struct attribute *f71805f_attributes_pwm_freq[] = { |
1331 | &sensor_dev_attr_pwm1_freq.dev_attr.attr, | |
1332 | &sensor_dev_attr_pwm2_freq.dev_attr.attr, | |
1333 | &sensor_dev_attr_pwm3_freq.dev_attr.attr, | |
1334 | NULL | |
1335 | }; | |
1336 | ||
1337 | static const struct attribute_group f71805f_group_pwm_freq = { | |
1338 | .attrs = f71805f_attributes_pwm_freq, | |
1339 | }; | |
1340 | ||
95e35312 JD |
1341 | /* We also need an indexed access to pwmN files to toggle writability */ |
1342 | static struct attribute *f71805f_attr_pwm[] = { | |
1343 | &sensor_dev_attr_pwm1.dev_attr.attr, | |
1344 | &sensor_dev_attr_pwm2.dev_attr.attr, | |
1345 | &sensor_dev_attr_pwm3.dev_attr.attr, | |
1346 | }; | |
1347 | ||
e53004e2 JD |
1348 | /* |
1349 | * Device registration and initialization | |
1350 | */ | |
1351 | ||
6c931ae1 | 1352 | static void f71805f_init_device(struct f71805f_data *data) |
e53004e2 JD |
1353 | { |
1354 | u8 reg; | |
1355 | int i; | |
1356 | ||
1357 | reg = f71805f_read8(data, F71805F_REG_START); | |
1358 | if ((reg & 0x41) != 0x01) { | |
692fe501 | 1359 | pr_debug("Starting monitoring operations\n"); |
e53004e2 JD |
1360 | f71805f_write8(data, F71805F_REG_START, (reg | 0x01) & ~0x40); |
1361 | } | |
1362 | ||
2fff0840 GR |
1363 | /* |
1364 | * Fan monitoring can be disabled. If it is, we won't be polling | |
1365 | * the register values, and won't create the related sysfs files. | |
1366 | */ | |
e53004e2 | 1367 | for (i = 0; i < 3; i++) { |
6b14a546 JD |
1368 | data->fan_ctrl[i] = f71805f_read8(data, |
1369 | F71805F_REG_FAN_CTRL(i)); | |
2fff0840 GR |
1370 | /* |
1371 | * Clear latch full bit, else "speed mode" fan speed control | |
1372 | * doesn't work | |
1373 | */ | |
315c7113 JD |
1374 | if (data->fan_ctrl[i] & FAN_CTRL_LATCH_FULL) { |
1375 | data->fan_ctrl[i] &= ~FAN_CTRL_LATCH_FULL; | |
1376 | f71805f_write8(data, F71805F_REG_FAN_CTRL(i), | |
1377 | data->fan_ctrl[i]); | |
1378 | } | |
e53004e2 JD |
1379 | } |
1380 | } | |
1381 | ||
6c931ae1 | 1382 | static int f71805f_probe(struct platform_device *pdev) |
e53004e2 | 1383 | { |
a8b3a3a5 | 1384 | struct f71805f_sio_data *sio_data = dev_get_platdata(&pdev->dev); |
e53004e2 JD |
1385 | struct f71805f_data *data; |
1386 | struct resource *res; | |
2488a39d | 1387 | int i, err; |
e53004e2 | 1388 | |
2fff0840 | 1389 | static const char * const names[] = { |
51c997d8 JD |
1390 | "f71805f", |
1391 | "f71872f", | |
1392 | }; | |
1393 | ||
adc14132 GR |
1394 | data = devm_kzalloc(&pdev->dev, sizeof(struct f71805f_data), |
1395 | GFP_KERNEL); | |
b83207fd | 1396 | if (!data) |
adc14132 | 1397 | return -ENOMEM; |
e53004e2 JD |
1398 | |
1399 | res = platform_get_resource(pdev, IORESOURCE_IO, 0); | |
adc14132 GR |
1400 | if (!devm_request_region(&pdev->dev, res->start + ADDR_REG_OFFSET, 2, |
1401 | DRVNAME)) { | |
ce7ee4e8 JD |
1402 | dev_err(&pdev->dev, "Failed to request region 0x%lx-0x%lx\n", |
1403 | (unsigned long)(res->start + ADDR_REG_OFFSET), | |
1404 | (unsigned long)(res->start + ADDR_REG_OFFSET + 1)); | |
adc14132 | 1405 | return -EBUSY; |
ce7ee4e8 | 1406 | } |
e53004e2 | 1407 | data->addr = res->start; |
51c997d8 | 1408 | data->name = names[sio_data->kind]; |
f0819184 | 1409 | mutex_init(&data->update_lock); |
e53004e2 JD |
1410 | |
1411 | platform_set_drvdata(pdev, data); | |
1412 | ||
51c997d8 JD |
1413 | /* Some voltage inputs depend on chip model and configuration */ |
1414 | switch (sio_data->kind) { | |
1415 | case f71805f: | |
1416 | data->has_in = 0x1ff; | |
1417 | break; | |
1418 | case f71872f: | |
1419 | data->has_in = 0x6ef; | |
1420 | if (sio_data->fnsel1 & 0x01) | |
1421 | data->has_in |= (1 << 4); /* in4 */ | |
1422 | if (sio_data->fnsel1 & 0x02) | |
1423 | data->has_in |= (1 << 8); /* in8 */ | |
1424 | break; | |
1425 | } | |
1426 | ||
e53004e2 JD |
1427 | /* Initialize the F71805F chip */ |
1428 | f71805f_init_device(data); | |
1429 | ||
1430 | /* Register sysfs interface files */ | |
2fff0840 GR |
1431 | err = sysfs_create_group(&pdev->dev.kobj, &f71805f_group); |
1432 | if (err) | |
adc14132 | 1433 | return err; |
51c997d8 | 1434 | if (data->has_in & (1 << 4)) { /* in4 */ |
2fff0840 GR |
1435 | err = sysfs_create_group(&pdev->dev.kobj, |
1436 | &f71805f_group_optin[0]); | |
1437 | if (err) | |
51c997d8 JD |
1438 | goto exit_remove_files; |
1439 | } | |
1440 | if (data->has_in & (1 << 8)) { /* in8 */ | |
2fff0840 GR |
1441 | err = sysfs_create_group(&pdev->dev.kobj, |
1442 | &f71805f_group_optin[1]); | |
1443 | if (err) | |
51c997d8 JD |
1444 | goto exit_remove_files; |
1445 | } | |
1446 | if (data->has_in & (1 << 9)) { /* in9 (F71872F/FG only) */ | |
2fff0840 GR |
1447 | err = sysfs_create_group(&pdev->dev.kobj, |
1448 | &f71805f_group_optin[2]); | |
1449 | if (err) | |
51c997d8 JD |
1450 | goto exit_remove_files; |
1451 | } | |
1452 | if (data->has_in & (1 << 10)) { /* in9 (F71872F/FG only) */ | |
2fff0840 GR |
1453 | err = sysfs_create_group(&pdev->dev.kobj, |
1454 | &f71805f_group_optin[3]); | |
1455 | if (err) | |
51c997d8 JD |
1456 | goto exit_remove_files; |
1457 | } | |
0e39e01c | 1458 | for (i = 0; i < 3; i++) { |
e196783d JD |
1459 | /* If control mode is PWM, create pwm_freq file */ |
1460 | if (!(data->fan_ctrl[i] & FAN_CTRL_DC_MODE)) { | |
2fff0840 GR |
1461 | err = sysfs_create_file(&pdev->dev.kobj, |
1462 | f71805f_attributes_pwm_freq[i]); | |
1463 | if (err) | |
e196783d JD |
1464 | goto exit_remove_files; |
1465 | } | |
95e35312 JD |
1466 | /* If PWM is in manual mode, add write permission */ |
1467 | if (data->fan_ctrl[i] & FAN_CTRL_MODE_MANUAL) { | |
2fff0840 GR |
1468 | err = sysfs_chmod_file(&pdev->dev.kobj, |
1469 | f71805f_attr_pwm[i], | |
1470 | S_IRUGO | S_IWUSR); | |
1471 | if (err) { | |
95e35312 JD |
1472 | dev_err(&pdev->dev, "chmod +w pwm%d failed\n", |
1473 | i + 1); | |
1474 | goto exit_remove_files; | |
1475 | } | |
1476 | } | |
0e39e01c JD |
1477 | } |
1478 | ||
1beeffe4 TJ |
1479 | data->hwmon_dev = hwmon_device_register(&pdev->dev); |
1480 | if (IS_ERR(data->hwmon_dev)) { | |
1481 | err = PTR_ERR(data->hwmon_dev); | |
0e39e01c JD |
1482 | dev_err(&pdev->dev, "Class registration failed (%d)\n", err); |
1483 | goto exit_remove_files; | |
e53004e2 | 1484 | } |
e53004e2 JD |
1485 | |
1486 | return 0; | |
1487 | ||
0e39e01c JD |
1488 | exit_remove_files: |
1489 | sysfs_remove_group(&pdev->dev.kobj, &f71805f_group); | |
51c997d8 JD |
1490 | for (i = 0; i < 4; i++) |
1491 | sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_optin[i]); | |
e196783d | 1492 | sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_pwm_freq); |
e53004e2 JD |
1493 | return err; |
1494 | } | |
1495 | ||
281dfd0b | 1496 | static int f71805f_remove(struct platform_device *pdev) |
e53004e2 JD |
1497 | { |
1498 | struct f71805f_data *data = platform_get_drvdata(pdev); | |
0e39e01c | 1499 | int i; |
e53004e2 | 1500 | |
1beeffe4 | 1501 | hwmon_device_unregister(data->hwmon_dev); |
0e39e01c | 1502 | sysfs_remove_group(&pdev->dev.kobj, &f71805f_group); |
51c997d8 JD |
1503 | for (i = 0; i < 4; i++) |
1504 | sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_optin[i]); | |
e196783d | 1505 | sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_pwm_freq); |
ce7ee4e8 | 1506 | |
e53004e2 JD |
1507 | return 0; |
1508 | } | |
1509 | ||
1510 | static struct platform_driver f71805f_driver = { | |
1511 | .driver = { | |
e53004e2 JD |
1512 | .name = DRVNAME, |
1513 | }, | |
1514 | .probe = f71805f_probe, | |
9e5e9b7a | 1515 | .remove = f71805f_remove, |
e53004e2 JD |
1516 | }; |
1517 | ||
51c997d8 JD |
1518 | static int __init f71805f_device_add(unsigned short address, |
1519 | const struct f71805f_sio_data *sio_data) | |
e53004e2 | 1520 | { |
568825c8 JD |
1521 | struct resource res = { |
1522 | .start = address, | |
1523 | .end = address + REGION_LENGTH - 1, | |
1524 | .flags = IORESOURCE_IO, | |
1525 | }; | |
e53004e2 JD |
1526 | int err; |
1527 | ||
1528 | pdev = platform_device_alloc(DRVNAME, address); | |
1529 | if (!pdev) { | |
1530 | err = -ENOMEM; | |
e54c5ad6 | 1531 | pr_err("Device allocation failed\n"); |
e53004e2 JD |
1532 | goto exit; |
1533 | } | |
1534 | ||
568825c8 | 1535 | res.name = pdev->name; |
b9acb64a JD |
1536 | err = acpi_check_resource_conflict(&res); |
1537 | if (err) | |
1538 | goto exit_device_put; | |
1539 | ||
568825c8 | 1540 | err = platform_device_add_resources(pdev, &res, 1); |
e53004e2 | 1541 | if (err) { |
e54c5ad6 | 1542 | pr_err("Device resource addition failed (%d)\n", err); |
e53004e2 JD |
1543 | goto exit_device_put; |
1544 | } | |
1545 | ||
2df6d811 JD |
1546 | err = platform_device_add_data(pdev, sio_data, |
1547 | sizeof(struct f71805f_sio_data)); | |
1548 | if (err) { | |
e54c5ad6 | 1549 | pr_err("Platform data allocation failed\n"); |
51c997d8 JD |
1550 | goto exit_device_put; |
1551 | } | |
51c997d8 | 1552 | |
e53004e2 JD |
1553 | err = platform_device_add(pdev); |
1554 | if (err) { | |
e54c5ad6 | 1555 | pr_err("Device addition failed (%d)\n", err); |
a117dddf | 1556 | goto exit_device_put; |
e53004e2 JD |
1557 | } |
1558 | ||
1559 | return 0; | |
1560 | ||
1561 | exit_device_put: | |
1562 | platform_device_put(pdev); | |
1563 | exit: | |
1564 | return err; | |
1565 | } | |
1566 | ||
51c997d8 JD |
1567 | static int __init f71805f_find(int sioaddr, unsigned short *address, |
1568 | struct f71805f_sio_data *sio_data) | |
e53004e2 | 1569 | { |
103d6f2b | 1570 | int err; |
e53004e2 JD |
1571 | u16 devid; |
1572 | ||
2fff0840 | 1573 | static const char * const names[] = { |
51c997d8 | 1574 | "F71805F/FG", |
9cab0217 | 1575 | "F71872F/FG or F71806F/FG", |
51c997d8 JD |
1576 | }; |
1577 | ||
103d6f2b GR |
1578 | err = superio_enter(sioaddr); |
1579 | if (err) | |
1580 | return err; | |
e53004e2 | 1581 | |
103d6f2b | 1582 | err = -ENODEV; |
e53004e2 JD |
1583 | devid = superio_inw(sioaddr, SIO_REG_MANID); |
1584 | if (devid != SIO_FINTEK_ID) | |
1585 | goto exit; | |
1586 | ||
67b671bc | 1587 | devid = force_id ? force_id : superio_inw(sioaddr, SIO_REG_DEVID); |
51c997d8 JD |
1588 | switch (devid) { |
1589 | case SIO_F71805F_ID: | |
1590 | sio_data->kind = f71805f; | |
1591 | break; | |
1592 | case SIO_F71872F_ID: | |
1593 | sio_data->kind = f71872f; | |
1594 | sio_data->fnsel1 = superio_inb(sioaddr, SIO_REG_FNSEL1); | |
1595 | break; | |
1596 | default: | |
e54c5ad6 | 1597 | pr_info("Unsupported Fintek device, skipping\n"); |
e53004e2 JD |
1598 | goto exit; |
1599 | } | |
1600 | ||
1601 | superio_select(sioaddr, F71805F_LD_HWM); | |
1602 | if (!(superio_inb(sioaddr, SIO_REG_ENABLE) & 0x01)) { | |
e54c5ad6 | 1603 | pr_warn("Device not activated, skipping\n"); |
e53004e2 JD |
1604 | goto exit; |
1605 | } | |
1606 | ||
1607 | *address = superio_inw(sioaddr, SIO_REG_ADDR); | |
1608 | if (*address == 0) { | |
e54c5ad6 | 1609 | pr_warn("Base address not set, skipping\n"); |
e53004e2 JD |
1610 | goto exit; |
1611 | } | |
75c99029 | 1612 | *address &= ~(REGION_LENGTH - 1); /* Ignore 3 LSB */ |
e53004e2 JD |
1613 | |
1614 | err = 0; | |
e54c5ad6 JP |
1615 | pr_info("Found %s chip at %#x, revision %u\n", |
1616 | names[sio_data->kind], *address, | |
1617 | superio_inb(sioaddr, SIO_REG_DEVREV)); | |
e53004e2 JD |
1618 | |
1619 | exit: | |
1620 | superio_exit(sioaddr); | |
1621 | return err; | |
1622 | } | |
1623 | ||
1624 | static int __init f71805f_init(void) | |
1625 | { | |
1626 | int err; | |
1627 | unsigned short address; | |
51c997d8 | 1628 | struct f71805f_sio_data sio_data; |
e53004e2 | 1629 | |
51c997d8 JD |
1630 | if (f71805f_find(0x2e, &address, &sio_data) |
1631 | && f71805f_find(0x4e, &address, &sio_data)) | |
e53004e2 JD |
1632 | return -ENODEV; |
1633 | ||
1634 | err = platform_driver_register(&f71805f_driver); | |
1635 | if (err) | |
1636 | goto exit; | |
1637 | ||
1638 | /* Sets global pdev as a side effect */ | |
51c997d8 | 1639 | err = f71805f_device_add(address, &sio_data); |
e53004e2 JD |
1640 | if (err) |
1641 | goto exit_driver; | |
1642 | ||
1643 | return 0; | |
1644 | ||
1645 | exit_driver: | |
1646 | platform_driver_unregister(&f71805f_driver); | |
1647 | exit: | |
1648 | return err; | |
1649 | } | |
1650 | ||
1651 | static void __exit f71805f_exit(void) | |
1652 | { | |
1653 | platform_device_unregister(pdev); | |
1654 | platform_driver_unregister(&f71805f_driver); | |
1655 | } | |
1656 | ||
964f945b | 1657 | MODULE_AUTHOR("Jean Delvare <jdelvare@suse.de>"); |
e53004e2 | 1658 | MODULE_LICENSE("GPL"); |
51c997d8 | 1659 | MODULE_DESCRIPTION("F71805F/F71872F hardware monitoring driver"); |
e53004e2 JD |
1660 | |
1661 | module_init(f71805f_init); | |
1662 | module_exit(f71805f_exit); |