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e53004e2 | 1 | /* |
51c997d8 JD |
2 | * f71805f.c - driver for the Fintek F71805F/FG and F71872F/FG Super-I/O |
3 | * chips integrated hardware monitoring features | |
2d45771e | 4 | * Copyright (C) 2005-2006 Jean Delvare <khali@linux-fr.org> |
e53004e2 JD |
5 | * |
6 | * The F71805F/FG is a LPC Super-I/O chip made by Fintek. It integrates | |
7 | * complete hardware monitoring features: voltage, fan and temperature | |
8 | * sensors, and manual and automatic fan speed control. | |
9 | * | |
51c997d8 JD |
10 | * The F71872F/FG is almost the same, with two more voltages monitored, |
11 | * and 6 VID inputs. | |
12 | * | |
e53004e2 JD |
13 | * This program is free software; you can redistribute it and/or modify |
14 | * it under the terms of the GNU General Public License as published by | |
15 | * the Free Software Foundation; either version 2 of the License, or | |
16 | * (at your option) any later version. | |
17 | * | |
18 | * This program is distributed in the hope that it will be useful, | |
19 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
20 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
21 | * GNU General Public License for more details. | |
22 | * | |
23 | * You should have received a copy of the GNU General Public License | |
24 | * along with this program; if not, write to the Free Software | |
25 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
26 | */ | |
27 | ||
28 | #include <linux/module.h> | |
29 | #include <linux/init.h> | |
30 | #include <linux/slab.h> | |
31 | #include <linux/jiffies.h> | |
32 | #include <linux/platform_device.h> | |
33 | #include <linux/hwmon.h> | |
34 | #include <linux/hwmon-sysfs.h> | |
35 | #include <linux/err.h> | |
f0819184 | 36 | #include <linux/mutex.h> |
0e39e01c | 37 | #include <linux/sysfs.h> |
e53004e2 JD |
38 | #include <asm/io.h> |
39 | ||
40 | static struct platform_device *pdev; | |
41 | ||
42 | #define DRVNAME "f71805f" | |
51c997d8 | 43 | enum kinds { f71805f, f71872f }; |
e53004e2 JD |
44 | |
45 | /* | |
46 | * Super-I/O constants and functions | |
47 | */ | |
48 | ||
49 | #define F71805F_LD_HWM 0x04 | |
50 | ||
51 | #define SIO_REG_LDSEL 0x07 /* Logical device select */ | |
52 | #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */ | |
53 | #define SIO_REG_DEVREV 0x22 /* Device revision */ | |
54 | #define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */ | |
51c997d8 | 55 | #define SIO_REG_FNSEL1 0x29 /* Multi Function Select 1 (F71872F) */ |
e53004e2 JD |
56 | #define SIO_REG_ENABLE 0x30 /* Logical device enable */ |
57 | #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */ | |
58 | ||
59 | #define SIO_FINTEK_ID 0x1934 | |
60 | #define SIO_F71805F_ID 0x0406 | |
51c997d8 | 61 | #define SIO_F71872F_ID 0x0341 |
e53004e2 JD |
62 | |
63 | static inline int | |
64 | superio_inb(int base, int reg) | |
65 | { | |
66 | outb(reg, base); | |
67 | return inb(base + 1); | |
68 | } | |
69 | ||
70 | static int | |
71 | superio_inw(int base, int reg) | |
72 | { | |
73 | int val; | |
74 | outb(reg++, base); | |
75 | val = inb(base + 1) << 8; | |
76 | outb(reg, base); | |
77 | val |= inb(base + 1); | |
78 | return val; | |
79 | } | |
80 | ||
81 | static inline void | |
82 | superio_select(int base, int ld) | |
83 | { | |
84 | outb(SIO_REG_LDSEL, base); | |
85 | outb(ld, base + 1); | |
86 | } | |
87 | ||
88 | static inline void | |
89 | superio_enter(int base) | |
90 | { | |
91 | outb(0x87, base); | |
92 | outb(0x87, base); | |
93 | } | |
94 | ||
95 | static inline void | |
96 | superio_exit(int base) | |
97 | { | |
98 | outb(0xaa, base); | |
99 | } | |
100 | ||
101 | /* | |
102 | * ISA constants | |
103 | */ | |
104 | ||
75c99029 JD |
105 | #define REGION_LENGTH 8 |
106 | #define ADDR_REG_OFFSET 5 | |
107 | #define DATA_REG_OFFSET 6 | |
e53004e2 | 108 | |
e53004e2 JD |
109 | /* |
110 | * Registers | |
111 | */ | |
112 | ||
51c997d8 | 113 | /* in nr from 0 to 10 (8-bit values) */ |
e53004e2 | 114 | #define F71805F_REG_IN(nr) (0x10 + (nr)) |
51c997d8 JD |
115 | #define F71805F_REG_IN_HIGH(nr) ((nr) < 10 ? 0x40 + 2 * (nr) : 0x2E) |
116 | #define F71805F_REG_IN_LOW(nr) ((nr) < 10 ? 0x41 + 2 * (nr) : 0x2F) | |
e53004e2 JD |
117 | /* fan nr from 0 to 2 (12-bit values, two registers) */ |
118 | #define F71805F_REG_FAN(nr) (0x20 + 2 * (nr)) | |
119 | #define F71805F_REG_FAN_LOW(nr) (0x28 + 2 * (nr)) | |
315c7113 | 120 | #define F71805F_REG_FAN_TARGET(nr) (0x69 + 16 * (nr)) |
e53004e2 | 121 | #define F71805F_REG_FAN_CTRL(nr) (0x60 + 16 * (nr)) |
6e2bc17b | 122 | #define F71805F_REG_PWM_FREQ(nr) (0x63 + 16 * (nr)) |
95e35312 | 123 | #define F71805F_REG_PWM_DUTY(nr) (0x6B + 16 * (nr)) |
e53004e2 JD |
124 | /* temp nr from 0 to 2 (8-bit values) */ |
125 | #define F71805F_REG_TEMP(nr) (0x1B + (nr)) | |
126 | #define F71805F_REG_TEMP_HIGH(nr) (0x54 + 2 * (nr)) | |
127 | #define F71805F_REG_TEMP_HYST(nr) (0x55 + 2 * (nr)) | |
128 | #define F71805F_REG_TEMP_MODE 0x01 | |
129 | ||
130 | #define F71805F_REG_START 0x00 | |
131 | /* status nr from 0 to 2 */ | |
132 | #define F71805F_REG_STATUS(nr) (0x36 + (nr)) | |
133 | ||
6b14a546 | 134 | /* individual register bits */ |
e196783d | 135 | #define FAN_CTRL_DC_MODE 0x10 |
315c7113 | 136 | #define FAN_CTRL_LATCH_FULL 0x08 |
95e35312 JD |
137 | #define FAN_CTRL_MODE_MASK 0x03 |
138 | #define FAN_CTRL_MODE_SPEED 0x00 | |
139 | #define FAN_CTRL_MODE_TEMPERATURE 0x01 | |
140 | #define FAN_CTRL_MODE_MANUAL 0x02 | |
6b14a546 | 141 | |
e53004e2 JD |
142 | /* |
143 | * Data structures and manipulation thereof | |
144 | */ | |
145 | ||
146 | struct f71805f_data { | |
147 | unsigned short addr; | |
148 | const char *name; | |
e53004e2 JD |
149 | struct class_device *class_dev; |
150 | ||
f0819184 | 151 | struct mutex update_lock; |
e53004e2 JD |
152 | char valid; /* !=0 if following fields are valid */ |
153 | unsigned long last_updated; /* In jiffies */ | |
154 | unsigned long last_limits; /* In jiffies */ | |
155 | ||
156 | /* Register values */ | |
51c997d8 JD |
157 | u8 in[11]; |
158 | u8 in_high[11]; | |
159 | u8 in_low[11]; | |
160 | u16 has_in; | |
e53004e2 JD |
161 | u16 fan[3]; |
162 | u16 fan_low[3]; | |
315c7113 | 163 | u16 fan_target[3]; |
6b14a546 | 164 | u8 fan_ctrl[3]; |
95e35312 | 165 | u8 pwm[3]; |
6e2bc17b | 166 | u8 pwm_freq[3]; |
e53004e2 JD |
167 | u8 temp[3]; |
168 | u8 temp_high[3]; | |
169 | u8 temp_hyst[3]; | |
170 | u8 temp_mode; | |
2d45771e | 171 | unsigned long alarms; |
e53004e2 JD |
172 | }; |
173 | ||
51c997d8 JD |
174 | struct f71805f_sio_data { |
175 | enum kinds kind; | |
176 | u8 fnsel1; | |
177 | }; | |
178 | ||
e53004e2 JD |
179 | static inline long in_from_reg(u8 reg) |
180 | { | |
181 | return (reg * 8); | |
182 | } | |
183 | ||
184 | /* The 2 least significant bits are not used */ | |
185 | static inline u8 in_to_reg(long val) | |
186 | { | |
187 | if (val <= 0) | |
188 | return 0; | |
189 | if (val >= 2016) | |
190 | return 0xfc; | |
191 | return (((val + 16) / 32) << 2); | |
192 | } | |
193 | ||
194 | /* in0 is downscaled by a factor 2 internally */ | |
195 | static inline long in0_from_reg(u8 reg) | |
196 | { | |
197 | return (reg * 16); | |
198 | } | |
199 | ||
200 | static inline u8 in0_to_reg(long val) | |
201 | { | |
202 | if (val <= 0) | |
203 | return 0; | |
204 | if (val >= 4032) | |
205 | return 0xfc; | |
206 | return (((val + 32) / 64) << 2); | |
207 | } | |
208 | ||
209 | /* The 4 most significant bits are not used */ | |
210 | static inline long fan_from_reg(u16 reg) | |
211 | { | |
212 | reg &= 0xfff; | |
213 | if (!reg || reg == 0xfff) | |
214 | return 0; | |
215 | return (1500000 / reg); | |
216 | } | |
217 | ||
218 | static inline u16 fan_to_reg(long rpm) | |
219 | { | |
220 | /* If the low limit is set below what the chip can measure, | |
221 | store the largest possible 12-bit value in the registers, | |
222 | so that no alarm will ever trigger. */ | |
223 | if (rpm < 367) | |
224 | return 0xfff; | |
225 | return (1500000 / rpm); | |
226 | } | |
227 | ||
6e2bc17b JD |
228 | static inline unsigned long pwm_freq_from_reg(u8 reg) |
229 | { | |
230 | unsigned long clock = (reg & 0x80) ? 48000000UL : 1000000UL; | |
231 | ||
232 | reg &= 0x7f; | |
233 | if (reg == 0) | |
234 | reg++; | |
235 | return clock / (reg << 8); | |
236 | } | |
237 | ||
238 | static inline u8 pwm_freq_to_reg(unsigned long val) | |
239 | { | |
240 | if (val >= 187500) /* The highest we can do */ | |
241 | return 0x80; | |
242 | if (val >= 1475) /* Use 48 MHz clock */ | |
243 | return 0x80 | (48000000UL / (val << 8)); | |
244 | if (val < 31) /* The lowest we can do */ | |
245 | return 0x7f; | |
246 | else /* Use 1 MHz clock */ | |
247 | return 1000000UL / (val << 8); | |
248 | } | |
249 | ||
e196783d JD |
250 | static inline int pwm_mode_from_reg(u8 reg) |
251 | { | |
252 | return !(reg & FAN_CTRL_DC_MODE); | |
253 | } | |
254 | ||
e53004e2 JD |
255 | static inline long temp_from_reg(u8 reg) |
256 | { | |
257 | return (reg * 1000); | |
258 | } | |
259 | ||
260 | static inline u8 temp_to_reg(long val) | |
261 | { | |
262 | if (val < 0) | |
263 | val = 0; | |
264 | else if (val > 1000 * 0xff) | |
265 | val = 0xff; | |
266 | return ((val + 500) / 1000); | |
267 | } | |
268 | ||
269 | /* | |
270 | * Device I/O access | |
271 | */ | |
272 | ||
7f999aa7 | 273 | /* Must be called with data->update_lock held, except during initialization */ |
e53004e2 JD |
274 | static u8 f71805f_read8(struct f71805f_data *data, u8 reg) |
275 | { | |
e53004e2 | 276 | outb(reg, data->addr + ADDR_REG_OFFSET); |
7f999aa7 | 277 | return inb(data->addr + DATA_REG_OFFSET); |
e53004e2 JD |
278 | } |
279 | ||
7f999aa7 | 280 | /* Must be called with data->update_lock held, except during initialization */ |
e53004e2 JD |
281 | static void f71805f_write8(struct f71805f_data *data, u8 reg, u8 val) |
282 | { | |
e53004e2 JD |
283 | outb(reg, data->addr + ADDR_REG_OFFSET); |
284 | outb(val, data->addr + DATA_REG_OFFSET); | |
e53004e2 JD |
285 | } |
286 | ||
287 | /* It is important to read the MSB first, because doing so latches the | |
7f999aa7 JD |
288 | value of the LSB, so we are sure both bytes belong to the same value. |
289 | Must be called with data->update_lock held, except during initialization */ | |
e53004e2 JD |
290 | static u16 f71805f_read16(struct f71805f_data *data, u8 reg) |
291 | { | |
292 | u16 val; | |
293 | ||
e53004e2 JD |
294 | outb(reg, data->addr + ADDR_REG_OFFSET); |
295 | val = inb(data->addr + DATA_REG_OFFSET) << 8; | |
296 | outb(++reg, data->addr + ADDR_REG_OFFSET); | |
297 | val |= inb(data->addr + DATA_REG_OFFSET); | |
e53004e2 JD |
298 | |
299 | return val; | |
300 | } | |
301 | ||
7f999aa7 | 302 | /* Must be called with data->update_lock held, except during initialization */ |
e53004e2 JD |
303 | static void f71805f_write16(struct f71805f_data *data, u8 reg, u16 val) |
304 | { | |
e53004e2 JD |
305 | outb(reg, data->addr + ADDR_REG_OFFSET); |
306 | outb(val >> 8, data->addr + DATA_REG_OFFSET); | |
307 | outb(++reg, data->addr + ADDR_REG_OFFSET); | |
308 | outb(val & 0xff, data->addr + DATA_REG_OFFSET); | |
e53004e2 JD |
309 | } |
310 | ||
311 | static struct f71805f_data *f71805f_update_device(struct device *dev) | |
312 | { | |
313 | struct f71805f_data *data = dev_get_drvdata(dev); | |
314 | int nr; | |
315 | ||
f0819184 | 316 | mutex_lock(&data->update_lock); |
e53004e2 JD |
317 | |
318 | /* Limit registers cache is refreshed after 60 seconds */ | |
319 | if (time_after(jiffies, data->last_updated + 60 * HZ) | |
320 | || !data->valid) { | |
51c997d8 JD |
321 | for (nr = 0; nr < 11; nr++) { |
322 | if (!(data->has_in & (1 << nr))) | |
323 | continue; | |
e53004e2 JD |
324 | data->in_high[nr] = f71805f_read8(data, |
325 | F71805F_REG_IN_HIGH(nr)); | |
326 | data->in_low[nr] = f71805f_read8(data, | |
327 | F71805F_REG_IN_LOW(nr)); | |
328 | } | |
329 | for (nr = 0; nr < 3; nr++) { | |
6b14a546 JD |
330 | data->fan_low[nr] = f71805f_read16(data, |
331 | F71805F_REG_FAN_LOW(nr)); | |
315c7113 JD |
332 | data->fan_target[nr] = f71805f_read16(data, |
333 | F71805F_REG_FAN_TARGET(nr)); | |
6e2bc17b JD |
334 | data->pwm_freq[nr] = f71805f_read8(data, |
335 | F71805F_REG_PWM_FREQ(nr)); | |
e53004e2 JD |
336 | } |
337 | for (nr = 0; nr < 3; nr++) { | |
338 | data->temp_high[nr] = f71805f_read8(data, | |
339 | F71805F_REG_TEMP_HIGH(nr)); | |
340 | data->temp_hyst[nr] = f71805f_read8(data, | |
341 | F71805F_REG_TEMP_HYST(nr)); | |
342 | } | |
343 | data->temp_mode = f71805f_read8(data, F71805F_REG_TEMP_MODE); | |
344 | ||
345 | data->last_limits = jiffies; | |
346 | } | |
347 | ||
348 | /* Measurement registers cache is refreshed after 1 second */ | |
349 | if (time_after(jiffies, data->last_updated + HZ) | |
350 | || !data->valid) { | |
51c997d8 JD |
351 | for (nr = 0; nr < 11; nr++) { |
352 | if (!(data->has_in & (1 << nr))) | |
353 | continue; | |
e53004e2 JD |
354 | data->in[nr] = f71805f_read8(data, |
355 | F71805F_REG_IN(nr)); | |
356 | } | |
357 | for (nr = 0; nr < 3; nr++) { | |
6b14a546 JD |
358 | data->fan[nr] = f71805f_read16(data, |
359 | F71805F_REG_FAN(nr)); | |
95e35312 JD |
360 | data->fan_ctrl[nr] = f71805f_read8(data, |
361 | F71805F_REG_FAN_CTRL(nr)); | |
362 | data->pwm[nr] = f71805f_read8(data, | |
363 | F71805F_REG_PWM_DUTY(nr)); | |
e53004e2 JD |
364 | } |
365 | for (nr = 0; nr < 3; nr++) { | |
366 | data->temp[nr] = f71805f_read8(data, | |
367 | F71805F_REG_TEMP(nr)); | |
368 | } | |
2d45771e JD |
369 | data->alarms = f71805f_read8(data, F71805F_REG_STATUS(0)) |
370 | + (f71805f_read8(data, F71805F_REG_STATUS(1)) << 8) | |
371 | + (f71805f_read8(data, F71805F_REG_STATUS(2)) << 16); | |
e53004e2 JD |
372 | |
373 | data->last_updated = jiffies; | |
374 | data->valid = 1; | |
375 | } | |
376 | ||
f0819184 | 377 | mutex_unlock(&data->update_lock); |
e53004e2 JD |
378 | |
379 | return data; | |
380 | } | |
381 | ||
382 | /* | |
383 | * Sysfs interface | |
384 | */ | |
385 | ||
386 | static ssize_t show_in0(struct device *dev, struct device_attribute *devattr, | |
387 | char *buf) | |
388 | { | |
389 | struct f71805f_data *data = f71805f_update_device(dev); | |
51c997d8 JD |
390 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); |
391 | int nr = attr->index; | |
e53004e2 | 392 | |
51c997d8 | 393 | return sprintf(buf, "%ld\n", in0_from_reg(data->in[nr])); |
e53004e2 JD |
394 | } |
395 | ||
396 | static ssize_t show_in0_max(struct device *dev, struct device_attribute | |
397 | *devattr, char *buf) | |
398 | { | |
399 | struct f71805f_data *data = f71805f_update_device(dev); | |
51c997d8 JD |
400 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); |
401 | int nr = attr->index; | |
e53004e2 | 402 | |
51c997d8 | 403 | return sprintf(buf, "%ld\n", in0_from_reg(data->in_high[nr])); |
e53004e2 JD |
404 | } |
405 | ||
406 | static ssize_t show_in0_min(struct device *dev, struct device_attribute | |
407 | *devattr, char *buf) | |
408 | { | |
409 | struct f71805f_data *data = f71805f_update_device(dev); | |
51c997d8 JD |
410 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); |
411 | int nr = attr->index; | |
e53004e2 | 412 | |
51c997d8 | 413 | return sprintf(buf, "%ld\n", in0_from_reg(data->in_low[nr])); |
e53004e2 JD |
414 | } |
415 | ||
416 | static ssize_t set_in0_max(struct device *dev, struct device_attribute | |
417 | *devattr, const char *buf, size_t count) | |
418 | { | |
419 | struct f71805f_data *data = dev_get_drvdata(dev); | |
51c997d8 JD |
420 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); |
421 | int nr = attr->index; | |
e53004e2 JD |
422 | long val = simple_strtol(buf, NULL, 10); |
423 | ||
f0819184 | 424 | mutex_lock(&data->update_lock); |
51c997d8 JD |
425 | data->in_high[nr] = in0_to_reg(val); |
426 | f71805f_write8(data, F71805F_REG_IN_HIGH(nr), data->in_high[nr]); | |
f0819184 | 427 | mutex_unlock(&data->update_lock); |
e53004e2 JD |
428 | |
429 | return count; | |
430 | } | |
431 | ||
432 | static ssize_t set_in0_min(struct device *dev, struct device_attribute | |
433 | *devattr, const char *buf, size_t count) | |
434 | { | |
435 | struct f71805f_data *data = dev_get_drvdata(dev); | |
51c997d8 JD |
436 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); |
437 | int nr = attr->index; | |
e53004e2 JD |
438 | long val = simple_strtol(buf, NULL, 10); |
439 | ||
f0819184 | 440 | mutex_lock(&data->update_lock); |
51c997d8 JD |
441 | data->in_low[nr] = in0_to_reg(val); |
442 | f71805f_write8(data, F71805F_REG_IN_LOW(nr), data->in_low[nr]); | |
f0819184 | 443 | mutex_unlock(&data->update_lock); |
e53004e2 JD |
444 | |
445 | return count; | |
446 | } | |
447 | ||
e53004e2 JD |
448 | static ssize_t show_in(struct device *dev, struct device_attribute *devattr, |
449 | char *buf) | |
450 | { | |
451 | struct f71805f_data *data = f71805f_update_device(dev); | |
452 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
453 | int nr = attr->index; | |
454 | ||
455 | return sprintf(buf, "%ld\n", in_from_reg(data->in[nr])); | |
456 | } | |
457 | ||
458 | static ssize_t show_in_max(struct device *dev, struct device_attribute | |
459 | *devattr, char *buf) | |
460 | { | |
461 | struct f71805f_data *data = f71805f_update_device(dev); | |
462 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
463 | int nr = attr->index; | |
464 | ||
465 | return sprintf(buf, "%ld\n", in_from_reg(data->in_high[nr])); | |
466 | } | |
467 | ||
468 | static ssize_t show_in_min(struct device *dev, struct device_attribute | |
469 | *devattr, char *buf) | |
470 | { | |
471 | struct f71805f_data *data = f71805f_update_device(dev); | |
472 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
473 | int nr = attr->index; | |
474 | ||
475 | return sprintf(buf, "%ld\n", in_from_reg(data->in_low[nr])); | |
476 | } | |
477 | ||
478 | static ssize_t set_in_max(struct device *dev, struct device_attribute | |
479 | *devattr, const char *buf, size_t count) | |
480 | { | |
481 | struct f71805f_data *data = dev_get_drvdata(dev); | |
482 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
483 | int nr = attr->index; | |
484 | long val = simple_strtol(buf, NULL, 10); | |
485 | ||
f0819184 | 486 | mutex_lock(&data->update_lock); |
e53004e2 JD |
487 | data->in_high[nr] = in_to_reg(val); |
488 | f71805f_write8(data, F71805F_REG_IN_HIGH(nr), data->in_high[nr]); | |
f0819184 | 489 | mutex_unlock(&data->update_lock); |
e53004e2 JD |
490 | |
491 | return count; | |
492 | } | |
493 | ||
494 | static ssize_t set_in_min(struct device *dev, struct device_attribute | |
495 | *devattr, const char *buf, size_t count) | |
496 | { | |
497 | struct f71805f_data *data = dev_get_drvdata(dev); | |
498 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
499 | int nr = attr->index; | |
500 | long val = simple_strtol(buf, NULL, 10); | |
501 | ||
f0819184 | 502 | mutex_lock(&data->update_lock); |
e53004e2 JD |
503 | data->in_low[nr] = in_to_reg(val); |
504 | f71805f_write8(data, F71805F_REG_IN_LOW(nr), data->in_low[nr]); | |
f0819184 | 505 | mutex_unlock(&data->update_lock); |
e53004e2 JD |
506 | |
507 | return count; | |
508 | } | |
509 | ||
e53004e2 JD |
510 | static ssize_t show_fan(struct device *dev, struct device_attribute *devattr, |
511 | char *buf) | |
512 | { | |
513 | struct f71805f_data *data = f71805f_update_device(dev); | |
514 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
515 | int nr = attr->index; | |
516 | ||
517 | return sprintf(buf, "%ld\n", fan_from_reg(data->fan[nr])); | |
518 | } | |
519 | ||
520 | static ssize_t show_fan_min(struct device *dev, struct device_attribute | |
521 | *devattr, char *buf) | |
522 | { | |
523 | struct f71805f_data *data = f71805f_update_device(dev); | |
524 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
525 | int nr = attr->index; | |
526 | ||
527 | return sprintf(buf, "%ld\n", fan_from_reg(data->fan_low[nr])); | |
528 | } | |
529 | ||
315c7113 JD |
530 | static ssize_t show_fan_target(struct device *dev, struct device_attribute |
531 | *devattr, char *buf) | |
532 | { | |
533 | struct f71805f_data *data = f71805f_update_device(dev); | |
534 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
535 | int nr = attr->index; | |
536 | ||
537 | return sprintf(buf, "%ld\n", fan_from_reg(data->fan_target[nr])); | |
538 | } | |
539 | ||
e53004e2 JD |
540 | static ssize_t set_fan_min(struct device *dev, struct device_attribute |
541 | *devattr, const char *buf, size_t count) | |
542 | { | |
543 | struct f71805f_data *data = dev_get_drvdata(dev); | |
544 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
545 | int nr = attr->index; | |
546 | long val = simple_strtol(buf, NULL, 10); | |
547 | ||
f0819184 | 548 | mutex_lock(&data->update_lock); |
e53004e2 JD |
549 | data->fan_low[nr] = fan_to_reg(val); |
550 | f71805f_write16(data, F71805F_REG_FAN_LOW(nr), data->fan_low[nr]); | |
f0819184 | 551 | mutex_unlock(&data->update_lock); |
e53004e2 JD |
552 | |
553 | return count; | |
554 | } | |
555 | ||
315c7113 JD |
556 | static ssize_t set_fan_target(struct device *dev, struct device_attribute |
557 | *devattr, const char *buf, size_t count) | |
558 | { | |
559 | struct f71805f_data *data = dev_get_drvdata(dev); | |
560 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
561 | int nr = attr->index; | |
562 | long val = simple_strtol(buf, NULL, 10); | |
563 | ||
564 | mutex_lock(&data->update_lock); | |
565 | data->fan_target[nr] = fan_to_reg(val); | |
566 | f71805f_write16(data, F71805F_REG_FAN_TARGET(nr), | |
567 | data->fan_target[nr]); | |
568 | mutex_unlock(&data->update_lock); | |
569 | ||
570 | return count; | |
571 | } | |
572 | ||
95e35312 JD |
573 | static ssize_t show_pwm(struct device *dev, struct device_attribute *devattr, |
574 | char *buf) | |
575 | { | |
576 | struct f71805f_data *data = f71805f_update_device(dev); | |
577 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
578 | int nr = attr->index; | |
579 | ||
580 | return sprintf(buf, "%d\n", (int)data->pwm[nr]); | |
581 | } | |
582 | ||
583 | static ssize_t show_pwm_enable(struct device *dev, struct device_attribute | |
584 | *devattr, char *buf) | |
585 | { | |
586 | struct f71805f_data *data = f71805f_update_device(dev); | |
587 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
588 | int nr = attr->index; | |
589 | int mode; | |
590 | ||
591 | switch (data->fan_ctrl[nr] & FAN_CTRL_MODE_MASK) { | |
592 | case FAN_CTRL_MODE_SPEED: | |
593 | mode = 3; | |
594 | break; | |
595 | case FAN_CTRL_MODE_TEMPERATURE: | |
596 | mode = 2; | |
597 | break; | |
598 | default: /* MANUAL */ | |
599 | mode = 1; | |
600 | } | |
601 | ||
602 | return sprintf(buf, "%d\n", mode); | |
603 | } | |
604 | ||
6e2bc17b JD |
605 | static ssize_t show_pwm_freq(struct device *dev, struct device_attribute |
606 | *devattr, char *buf) | |
607 | { | |
608 | struct f71805f_data *data = f71805f_update_device(dev); | |
609 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
610 | int nr = attr->index; | |
611 | ||
612 | return sprintf(buf, "%lu\n", pwm_freq_from_reg(data->pwm_freq[nr])); | |
613 | } | |
614 | ||
e196783d JD |
615 | static ssize_t show_pwm_mode(struct device *dev, struct device_attribute |
616 | *devattr, char *buf) | |
617 | { | |
618 | struct f71805f_data *data = f71805f_update_device(dev); | |
619 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
620 | int nr = attr->index; | |
621 | ||
622 | return sprintf(buf, "%d\n", pwm_mode_from_reg(data->fan_ctrl[nr])); | |
623 | } | |
624 | ||
95e35312 JD |
625 | static ssize_t set_pwm(struct device *dev, struct device_attribute *devattr, |
626 | const char *buf, size_t count) | |
627 | { | |
628 | struct f71805f_data *data = dev_get_drvdata(dev); | |
629 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
630 | int nr = attr->index; | |
631 | unsigned long val = simple_strtoul(buf, NULL, 10); | |
632 | ||
633 | if (val > 255) | |
634 | return -EINVAL; | |
635 | ||
636 | mutex_lock(&data->update_lock); | |
637 | data->pwm[nr] = val; | |
638 | f71805f_write8(data, F71805F_REG_PWM_DUTY(nr), data->pwm[nr]); | |
639 | mutex_unlock(&data->update_lock); | |
640 | ||
641 | return count; | |
642 | } | |
643 | ||
644 | static struct attribute *f71805f_attr_pwm[]; | |
645 | ||
646 | static ssize_t set_pwm_enable(struct device *dev, struct device_attribute | |
647 | *devattr, const char *buf, size_t count) | |
648 | { | |
649 | struct f71805f_data *data = dev_get_drvdata(dev); | |
650 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
651 | int nr = attr->index; | |
652 | unsigned long val = simple_strtoul(buf, NULL, 10); | |
653 | u8 reg; | |
654 | ||
655 | if (val < 1 || val > 3) | |
656 | return -EINVAL; | |
657 | ||
658 | if (val > 1) { /* Automatic mode, user can't set PWM value */ | |
659 | if (sysfs_chmod_file(&dev->kobj, f71805f_attr_pwm[nr], | |
660 | S_IRUGO)) | |
661 | dev_dbg(dev, "chmod -w pwm%d failed\n", nr + 1); | |
662 | } | |
663 | ||
664 | mutex_lock(&data->update_lock); | |
665 | reg = f71805f_read8(data, F71805F_REG_FAN_CTRL(nr)) | |
666 | & ~FAN_CTRL_MODE_MASK; | |
667 | switch (val) { | |
668 | case 1: | |
669 | reg |= FAN_CTRL_MODE_MANUAL; | |
670 | break; | |
671 | case 2: | |
672 | reg |= FAN_CTRL_MODE_TEMPERATURE; | |
673 | break; | |
674 | case 3: | |
675 | reg |= FAN_CTRL_MODE_SPEED; | |
676 | break; | |
677 | } | |
678 | data->fan_ctrl[nr] = reg; | |
679 | f71805f_write8(data, F71805F_REG_FAN_CTRL(nr), reg); | |
680 | mutex_unlock(&data->update_lock); | |
681 | ||
682 | if (val == 1) { /* Manual mode, user can set PWM value */ | |
683 | if (sysfs_chmod_file(&dev->kobj, f71805f_attr_pwm[nr], | |
684 | S_IRUGO | S_IWUSR)) | |
685 | dev_dbg(dev, "chmod +w pwm%d failed\n", nr + 1); | |
686 | } | |
687 | ||
688 | return count; | |
689 | } | |
690 | ||
6e2bc17b JD |
691 | static ssize_t set_pwm_freq(struct device *dev, struct device_attribute |
692 | *devattr, const char *buf, size_t count) | |
693 | { | |
694 | struct f71805f_data *data = dev_get_drvdata(dev); | |
695 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
696 | int nr = attr->index; | |
697 | unsigned long val = simple_strtoul(buf, NULL, 10); | |
698 | ||
699 | mutex_lock(&data->update_lock); | |
700 | data->pwm_freq[nr] = pwm_freq_to_reg(val); | |
701 | f71805f_write8(data, F71805F_REG_PWM_FREQ(nr), data->pwm_freq[nr]); | |
702 | mutex_unlock(&data->update_lock); | |
703 | ||
704 | return count; | |
705 | } | |
706 | ||
e53004e2 JD |
707 | static ssize_t show_temp(struct device *dev, struct device_attribute *devattr, |
708 | char *buf) | |
709 | { | |
710 | struct f71805f_data *data = f71805f_update_device(dev); | |
711 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
712 | int nr = attr->index; | |
713 | ||
714 | return sprintf(buf, "%ld\n", temp_from_reg(data->temp[nr])); | |
715 | } | |
716 | ||
717 | static ssize_t show_temp_max(struct device *dev, struct device_attribute | |
718 | *devattr, char *buf) | |
719 | { | |
720 | struct f71805f_data *data = f71805f_update_device(dev); | |
721 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
722 | int nr = attr->index; | |
723 | ||
724 | return sprintf(buf, "%ld\n", temp_from_reg(data->temp_high[nr])); | |
725 | } | |
726 | ||
727 | static ssize_t show_temp_hyst(struct device *dev, struct device_attribute | |
728 | *devattr, char *buf) | |
729 | { | |
730 | struct f71805f_data *data = f71805f_update_device(dev); | |
731 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
732 | int nr = attr->index; | |
733 | ||
734 | return sprintf(buf, "%ld\n", temp_from_reg(data->temp_hyst[nr])); | |
735 | } | |
736 | ||
737 | static ssize_t show_temp_type(struct device *dev, struct device_attribute | |
738 | *devattr, char *buf) | |
739 | { | |
740 | struct f71805f_data *data = f71805f_update_device(dev); | |
741 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
742 | int nr = attr->index; | |
743 | ||
744 | /* 3 is diode, 4 is thermistor */ | |
745 | return sprintf(buf, "%u\n", (data->temp_mode & (1 << nr)) ? 3 : 4); | |
746 | } | |
747 | ||
748 | static ssize_t set_temp_max(struct device *dev, struct device_attribute | |
749 | *devattr, const char *buf, size_t count) | |
750 | { | |
751 | struct f71805f_data *data = dev_get_drvdata(dev); | |
752 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
753 | int nr = attr->index; | |
754 | long val = simple_strtol(buf, NULL, 10); | |
755 | ||
f0819184 | 756 | mutex_lock(&data->update_lock); |
e53004e2 JD |
757 | data->temp_high[nr] = temp_to_reg(val); |
758 | f71805f_write8(data, F71805F_REG_TEMP_HIGH(nr), data->temp_high[nr]); | |
f0819184 | 759 | mutex_unlock(&data->update_lock); |
e53004e2 JD |
760 | |
761 | return count; | |
762 | } | |
763 | ||
764 | static ssize_t set_temp_hyst(struct device *dev, struct device_attribute | |
765 | *devattr, const char *buf, size_t count) | |
766 | { | |
767 | struct f71805f_data *data = dev_get_drvdata(dev); | |
768 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
769 | int nr = attr->index; | |
770 | long val = simple_strtol(buf, NULL, 10); | |
771 | ||
f0819184 | 772 | mutex_lock(&data->update_lock); |
e53004e2 JD |
773 | data->temp_hyst[nr] = temp_to_reg(val); |
774 | f71805f_write8(data, F71805F_REG_TEMP_HYST(nr), data->temp_hyst[nr]); | |
f0819184 | 775 | mutex_unlock(&data->update_lock); |
e53004e2 JD |
776 | |
777 | return count; | |
778 | } | |
779 | ||
e53004e2 JD |
780 | static ssize_t show_alarms_in(struct device *dev, struct device_attribute |
781 | *devattr, char *buf) | |
782 | { | |
783 | struct f71805f_data *data = f71805f_update_device(dev); | |
784 | ||
51c997d8 | 785 | return sprintf(buf, "%lu\n", data->alarms & 0x7ff); |
e53004e2 JD |
786 | } |
787 | ||
788 | static ssize_t show_alarms_fan(struct device *dev, struct device_attribute | |
789 | *devattr, char *buf) | |
790 | { | |
791 | struct f71805f_data *data = f71805f_update_device(dev); | |
792 | ||
2d45771e | 793 | return sprintf(buf, "%lu\n", (data->alarms >> 16) & 0x07); |
e53004e2 JD |
794 | } |
795 | ||
796 | static ssize_t show_alarms_temp(struct device *dev, struct device_attribute | |
797 | *devattr, char *buf) | |
798 | { | |
799 | struct f71805f_data *data = f71805f_update_device(dev); | |
800 | ||
2d45771e JD |
801 | return sprintf(buf, "%lu\n", (data->alarms >> 11) & 0x07); |
802 | } | |
803 | ||
804 | static ssize_t show_alarm(struct device *dev, struct device_attribute | |
805 | *devattr, char *buf) | |
806 | { | |
807 | struct f71805f_data *data = f71805f_update_device(dev); | |
808 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
809 | int bitnr = attr->index; | |
810 | ||
811 | return sprintf(buf, "%lu\n", (data->alarms >> bitnr) & 1); | |
e53004e2 JD |
812 | } |
813 | ||
e53004e2 JD |
814 | static ssize_t show_name(struct device *dev, struct device_attribute |
815 | *devattr, char *buf) | |
816 | { | |
817 | struct f71805f_data *data = dev_get_drvdata(dev); | |
818 | ||
819 | return sprintf(buf, "%s\n", data->name); | |
820 | } | |
821 | ||
51c997d8 JD |
822 | static SENSOR_DEVICE_ATTR(in0_input, S_IRUGO, show_in0, NULL, 0); |
823 | static SENSOR_DEVICE_ATTR(in0_max, S_IRUGO| S_IWUSR, | |
824 | show_in0_max, set_in0_max, 0); | |
825 | static SENSOR_DEVICE_ATTR(in0_min, S_IRUGO| S_IWUSR, | |
826 | show_in0_min, set_in0_min, 0); | |
0e39e01c JD |
827 | static SENSOR_DEVICE_ATTR(in1_input, S_IRUGO, show_in, NULL, 1); |
828 | static SENSOR_DEVICE_ATTR(in1_max, S_IRUGO | S_IWUSR, | |
829 | show_in_max, set_in_max, 1); | |
830 | static SENSOR_DEVICE_ATTR(in1_min, S_IRUGO | S_IWUSR, | |
831 | show_in_min, set_in_min, 1); | |
832 | static SENSOR_DEVICE_ATTR(in2_input, S_IRUGO, show_in, NULL, 2); | |
833 | static SENSOR_DEVICE_ATTR(in2_max, S_IRUGO | S_IWUSR, | |
834 | show_in_max, set_in_max, 2); | |
835 | static SENSOR_DEVICE_ATTR(in2_min, S_IRUGO | S_IWUSR, | |
836 | show_in_min, set_in_min, 2); | |
837 | static SENSOR_DEVICE_ATTR(in3_input, S_IRUGO, show_in, NULL, 3); | |
838 | static SENSOR_DEVICE_ATTR(in3_max, S_IRUGO | S_IWUSR, | |
839 | show_in_max, set_in_max, 3); | |
840 | static SENSOR_DEVICE_ATTR(in3_min, S_IRUGO | S_IWUSR, | |
841 | show_in_min, set_in_min, 3); | |
842 | static SENSOR_DEVICE_ATTR(in4_input, S_IRUGO, show_in, NULL, 4); | |
843 | static SENSOR_DEVICE_ATTR(in4_max, S_IRUGO | S_IWUSR, | |
844 | show_in_max, set_in_max, 4); | |
845 | static SENSOR_DEVICE_ATTR(in4_min, S_IRUGO | S_IWUSR, | |
846 | show_in_min, set_in_min, 4); | |
847 | static SENSOR_DEVICE_ATTR(in5_input, S_IRUGO, show_in, NULL, 5); | |
848 | static SENSOR_DEVICE_ATTR(in5_max, S_IRUGO | S_IWUSR, | |
849 | show_in_max, set_in_max, 5); | |
850 | static SENSOR_DEVICE_ATTR(in5_min, S_IRUGO | S_IWUSR, | |
851 | show_in_min, set_in_min, 5); | |
852 | static SENSOR_DEVICE_ATTR(in6_input, S_IRUGO, show_in, NULL, 6); | |
853 | static SENSOR_DEVICE_ATTR(in6_max, S_IRUGO | S_IWUSR, | |
854 | show_in_max, set_in_max, 6); | |
855 | static SENSOR_DEVICE_ATTR(in6_min, S_IRUGO | S_IWUSR, | |
856 | show_in_min, set_in_min, 6); | |
857 | static SENSOR_DEVICE_ATTR(in7_input, S_IRUGO, show_in, NULL, 7); | |
858 | static SENSOR_DEVICE_ATTR(in7_max, S_IRUGO | S_IWUSR, | |
859 | show_in_max, set_in_max, 7); | |
860 | static SENSOR_DEVICE_ATTR(in7_min, S_IRUGO | S_IWUSR, | |
861 | show_in_min, set_in_min, 7); | |
862 | static SENSOR_DEVICE_ATTR(in8_input, S_IRUGO, show_in, NULL, 8); | |
863 | static SENSOR_DEVICE_ATTR(in8_max, S_IRUGO | S_IWUSR, | |
864 | show_in_max, set_in_max, 8); | |
865 | static SENSOR_DEVICE_ATTR(in8_min, S_IRUGO | S_IWUSR, | |
866 | show_in_min, set_in_min, 8); | |
51c997d8 JD |
867 | static SENSOR_DEVICE_ATTR(in9_input, S_IRUGO, show_in0, NULL, 9); |
868 | static SENSOR_DEVICE_ATTR(in9_max, S_IRUGO | S_IWUSR, | |
869 | show_in0_max, set_in0_max, 9); | |
870 | static SENSOR_DEVICE_ATTR(in9_min, S_IRUGO | S_IWUSR, | |
871 | show_in0_min, set_in0_min, 9); | |
872 | static SENSOR_DEVICE_ATTR(in10_input, S_IRUGO, show_in0, NULL, 10); | |
873 | static SENSOR_DEVICE_ATTR(in10_max, S_IRUGO | S_IWUSR, | |
874 | show_in0_max, set_in0_max, 10); | |
875 | static SENSOR_DEVICE_ATTR(in10_min, S_IRUGO | S_IWUSR, | |
876 | show_in0_min, set_in0_min, 10); | |
0e39e01c JD |
877 | |
878 | static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0); | |
879 | static SENSOR_DEVICE_ATTR(fan1_min, S_IRUGO | S_IWUSR, | |
880 | show_fan_min, set_fan_min, 0); | |
315c7113 JD |
881 | static SENSOR_DEVICE_ATTR(fan1_target, S_IRUGO | S_IWUSR, |
882 | show_fan_target, set_fan_target, 0); | |
0e39e01c JD |
883 | static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1); |
884 | static SENSOR_DEVICE_ATTR(fan2_min, S_IRUGO | S_IWUSR, | |
885 | show_fan_min, set_fan_min, 1); | |
315c7113 JD |
886 | static SENSOR_DEVICE_ATTR(fan2_target, S_IRUGO | S_IWUSR, |
887 | show_fan_target, set_fan_target, 1); | |
0e39e01c JD |
888 | static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2); |
889 | static SENSOR_DEVICE_ATTR(fan3_min, S_IRUGO | S_IWUSR, | |
890 | show_fan_min, set_fan_min, 2); | |
315c7113 JD |
891 | static SENSOR_DEVICE_ATTR(fan3_target, S_IRUGO | S_IWUSR, |
892 | show_fan_target, set_fan_target, 2); | |
0e39e01c JD |
893 | |
894 | static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_temp, NULL, 0); | |
895 | static SENSOR_DEVICE_ATTR(temp1_max, S_IRUGO | S_IWUSR, | |
896 | show_temp_max, set_temp_max, 0); | |
897 | static SENSOR_DEVICE_ATTR(temp1_max_hyst, S_IRUGO | S_IWUSR, | |
898 | show_temp_hyst, set_temp_hyst, 0); | |
899 | static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO, show_temp_type, NULL, 0); | |
900 | static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO, show_temp, NULL, 1); | |
901 | static SENSOR_DEVICE_ATTR(temp2_max, S_IRUGO | S_IWUSR, | |
902 | show_temp_max, set_temp_max, 1); | |
903 | static SENSOR_DEVICE_ATTR(temp2_max_hyst, S_IRUGO | S_IWUSR, | |
904 | show_temp_hyst, set_temp_hyst, 1); | |
905 | static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO, show_temp_type, NULL, 1); | |
906 | static SENSOR_DEVICE_ATTR(temp3_input, S_IRUGO, show_temp, NULL, 2); | |
907 | static SENSOR_DEVICE_ATTR(temp3_max, S_IRUGO | S_IWUSR, | |
908 | show_temp_max, set_temp_max, 2); | |
909 | static SENSOR_DEVICE_ATTR(temp3_max_hyst, S_IRUGO | S_IWUSR, | |
910 | show_temp_hyst, set_temp_hyst, 2); | |
911 | static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO, show_temp_type, NULL, 2); | |
912 | ||
95e35312 JD |
913 | /* pwm (value) files are created read-only, write permission is |
914 | then added or removed dynamically as needed */ | |
915 | static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO, show_pwm, set_pwm, 0); | |
916 | static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR, | |
917 | show_pwm_enable, set_pwm_enable, 0); | |
6e2bc17b JD |
918 | static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR, |
919 | show_pwm_freq, set_pwm_freq, 0); | |
e196783d | 920 | static SENSOR_DEVICE_ATTR(pwm1_mode, S_IRUGO, show_pwm_mode, NULL, 0); |
95e35312 JD |
921 | static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO, show_pwm, set_pwm, 1); |
922 | static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR, | |
923 | show_pwm_enable, set_pwm_enable, 1); | |
6e2bc17b JD |
924 | static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO | S_IWUSR, |
925 | show_pwm_freq, set_pwm_freq, 1); | |
e196783d | 926 | static SENSOR_DEVICE_ATTR(pwm2_mode, S_IRUGO, show_pwm_mode, NULL, 1); |
95e35312 JD |
927 | static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO, show_pwm, set_pwm, 2); |
928 | static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR, | |
929 | show_pwm_enable, set_pwm_enable, 2); | |
6e2bc17b JD |
930 | static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO | S_IWUSR, |
931 | show_pwm_freq, set_pwm_freq, 2); | |
e196783d | 932 | static SENSOR_DEVICE_ATTR(pwm3_mode, S_IRUGO, show_pwm_mode, NULL, 2); |
95e35312 | 933 | |
0e39e01c JD |
934 | static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0); |
935 | static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1); | |
936 | static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2); | |
937 | static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3); | |
938 | static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 4); | |
939 | static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 5); | |
940 | static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 6); | |
941 | static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 7); | |
942 | static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 8); | |
51c997d8 JD |
943 | static SENSOR_DEVICE_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 9); |
944 | static SENSOR_DEVICE_ATTR(in10_alarm, S_IRUGO, show_alarm, NULL, 10); | |
0e39e01c JD |
945 | static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 11); |
946 | static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 12); | |
947 | static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13); | |
948 | static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 16); | |
949 | static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 17); | |
950 | static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 18); | |
951 | static DEVICE_ATTR(alarms_in, S_IRUGO, show_alarms_in, NULL); | |
952 | static DEVICE_ATTR(alarms_fan, S_IRUGO, show_alarms_fan, NULL); | |
953 | static DEVICE_ATTR(alarms_temp, S_IRUGO, show_alarms_temp, NULL); | |
954 | ||
955 | static DEVICE_ATTR(name, S_IRUGO, show_name, NULL); | |
956 | ||
957 | static struct attribute *f71805f_attributes[] = { | |
51c997d8 JD |
958 | &sensor_dev_attr_in0_input.dev_attr.attr, |
959 | &sensor_dev_attr_in0_max.dev_attr.attr, | |
960 | &sensor_dev_attr_in0_min.dev_attr.attr, | |
0e39e01c JD |
961 | &sensor_dev_attr_in1_input.dev_attr.attr, |
962 | &sensor_dev_attr_in1_max.dev_attr.attr, | |
963 | &sensor_dev_attr_in1_min.dev_attr.attr, | |
964 | &sensor_dev_attr_in2_input.dev_attr.attr, | |
965 | &sensor_dev_attr_in2_max.dev_attr.attr, | |
966 | &sensor_dev_attr_in2_min.dev_attr.attr, | |
967 | &sensor_dev_attr_in3_input.dev_attr.attr, | |
968 | &sensor_dev_attr_in3_max.dev_attr.attr, | |
969 | &sensor_dev_attr_in3_min.dev_attr.attr, | |
0e39e01c JD |
970 | &sensor_dev_attr_in5_input.dev_attr.attr, |
971 | &sensor_dev_attr_in5_max.dev_attr.attr, | |
972 | &sensor_dev_attr_in5_min.dev_attr.attr, | |
973 | &sensor_dev_attr_in6_input.dev_attr.attr, | |
974 | &sensor_dev_attr_in6_max.dev_attr.attr, | |
975 | &sensor_dev_attr_in6_min.dev_attr.attr, | |
976 | &sensor_dev_attr_in7_input.dev_attr.attr, | |
977 | &sensor_dev_attr_in7_max.dev_attr.attr, | |
978 | &sensor_dev_attr_in7_min.dev_attr.attr, | |
0e39e01c | 979 | |
c7176cb5 JD |
980 | &sensor_dev_attr_fan1_input.dev_attr.attr, |
981 | &sensor_dev_attr_fan1_min.dev_attr.attr, | |
982 | &sensor_dev_attr_fan1_alarm.dev_attr.attr, | |
983 | &sensor_dev_attr_fan1_target.dev_attr.attr, | |
984 | &sensor_dev_attr_fan2_input.dev_attr.attr, | |
985 | &sensor_dev_attr_fan2_min.dev_attr.attr, | |
986 | &sensor_dev_attr_fan2_alarm.dev_attr.attr, | |
987 | &sensor_dev_attr_fan2_target.dev_attr.attr, | |
988 | &sensor_dev_attr_fan3_input.dev_attr.attr, | |
989 | &sensor_dev_attr_fan3_min.dev_attr.attr, | |
990 | &sensor_dev_attr_fan3_alarm.dev_attr.attr, | |
991 | &sensor_dev_attr_fan3_target.dev_attr.attr, | |
992 | ||
993 | &sensor_dev_attr_pwm1.dev_attr.attr, | |
994 | &sensor_dev_attr_pwm1_enable.dev_attr.attr, | |
995 | &sensor_dev_attr_pwm1_mode.dev_attr.attr, | |
996 | &sensor_dev_attr_pwm2.dev_attr.attr, | |
997 | &sensor_dev_attr_pwm2_enable.dev_attr.attr, | |
998 | &sensor_dev_attr_pwm2_mode.dev_attr.attr, | |
999 | &sensor_dev_attr_pwm3.dev_attr.attr, | |
1000 | &sensor_dev_attr_pwm3_enable.dev_attr.attr, | |
1001 | &sensor_dev_attr_pwm3_mode.dev_attr.attr, | |
1002 | ||
0e39e01c JD |
1003 | &sensor_dev_attr_temp1_input.dev_attr.attr, |
1004 | &sensor_dev_attr_temp1_max.dev_attr.attr, | |
1005 | &sensor_dev_attr_temp1_max_hyst.dev_attr.attr, | |
1006 | &sensor_dev_attr_temp1_type.dev_attr.attr, | |
1007 | &sensor_dev_attr_temp2_input.dev_attr.attr, | |
1008 | &sensor_dev_attr_temp2_max.dev_attr.attr, | |
1009 | &sensor_dev_attr_temp2_max_hyst.dev_attr.attr, | |
1010 | &sensor_dev_attr_temp2_type.dev_attr.attr, | |
1011 | &sensor_dev_attr_temp3_input.dev_attr.attr, | |
1012 | &sensor_dev_attr_temp3_max.dev_attr.attr, | |
1013 | &sensor_dev_attr_temp3_max_hyst.dev_attr.attr, | |
1014 | &sensor_dev_attr_temp3_type.dev_attr.attr, | |
1015 | ||
1016 | &sensor_dev_attr_in0_alarm.dev_attr.attr, | |
1017 | &sensor_dev_attr_in1_alarm.dev_attr.attr, | |
1018 | &sensor_dev_attr_in2_alarm.dev_attr.attr, | |
1019 | &sensor_dev_attr_in3_alarm.dev_attr.attr, | |
0e39e01c JD |
1020 | &sensor_dev_attr_in5_alarm.dev_attr.attr, |
1021 | &sensor_dev_attr_in6_alarm.dev_attr.attr, | |
1022 | &sensor_dev_attr_in7_alarm.dev_attr.attr, | |
0e39e01c JD |
1023 | &dev_attr_alarms_in.attr, |
1024 | &sensor_dev_attr_temp1_alarm.dev_attr.attr, | |
1025 | &sensor_dev_attr_temp2_alarm.dev_attr.attr, | |
1026 | &sensor_dev_attr_temp3_alarm.dev_attr.attr, | |
1027 | &dev_attr_alarms_temp.attr, | |
1028 | &dev_attr_alarms_fan.attr, | |
1029 | ||
1030 | &dev_attr_name.attr, | |
1031 | NULL | |
2488a39d JD |
1032 | }; |
1033 | ||
0e39e01c JD |
1034 | static const struct attribute_group f71805f_group = { |
1035 | .attrs = f71805f_attributes, | |
2488a39d JD |
1036 | }; |
1037 | ||
51c997d8 JD |
1038 | static struct attribute *f71805f_attributes_optin[4][5] = { |
1039 | { | |
1040 | &sensor_dev_attr_in4_input.dev_attr.attr, | |
1041 | &sensor_dev_attr_in4_max.dev_attr.attr, | |
1042 | &sensor_dev_attr_in4_min.dev_attr.attr, | |
1043 | &sensor_dev_attr_in4_alarm.dev_attr.attr, | |
1044 | NULL | |
1045 | }, { | |
1046 | &sensor_dev_attr_in8_input.dev_attr.attr, | |
1047 | &sensor_dev_attr_in8_max.dev_attr.attr, | |
1048 | &sensor_dev_attr_in8_min.dev_attr.attr, | |
1049 | &sensor_dev_attr_in8_alarm.dev_attr.attr, | |
1050 | NULL | |
1051 | }, { | |
1052 | &sensor_dev_attr_in9_input.dev_attr.attr, | |
1053 | &sensor_dev_attr_in9_max.dev_attr.attr, | |
1054 | &sensor_dev_attr_in9_min.dev_attr.attr, | |
1055 | &sensor_dev_attr_in9_alarm.dev_attr.attr, | |
1056 | NULL | |
1057 | }, { | |
1058 | &sensor_dev_attr_in10_input.dev_attr.attr, | |
1059 | &sensor_dev_attr_in10_max.dev_attr.attr, | |
1060 | &sensor_dev_attr_in10_min.dev_attr.attr, | |
1061 | &sensor_dev_attr_in10_alarm.dev_attr.attr, | |
1062 | NULL | |
1063 | } | |
1064 | }; | |
1065 | ||
1066 | static const struct attribute_group f71805f_group_optin[4] = { | |
1067 | { .attrs = f71805f_attributes_optin[0] }, | |
1068 | { .attrs = f71805f_attributes_optin[1] }, | |
1069 | { .attrs = f71805f_attributes_optin[2] }, | |
1070 | { .attrs = f71805f_attributes_optin[3] }, | |
1071 | }; | |
1072 | ||
e196783d JD |
1073 | /* We don't include pwm_freq files in the arrays above, because they must be |
1074 | created conditionally (only if pwm_mode is 1 == PWM) */ | |
1075 | static struct attribute *f71805f_attributes_pwm_freq[] = { | |
1076 | &sensor_dev_attr_pwm1_freq.dev_attr.attr, | |
1077 | &sensor_dev_attr_pwm2_freq.dev_attr.attr, | |
1078 | &sensor_dev_attr_pwm3_freq.dev_attr.attr, | |
1079 | NULL | |
1080 | }; | |
1081 | ||
1082 | static const struct attribute_group f71805f_group_pwm_freq = { | |
1083 | .attrs = f71805f_attributes_pwm_freq, | |
1084 | }; | |
1085 | ||
95e35312 JD |
1086 | /* We also need an indexed access to pwmN files to toggle writability */ |
1087 | static struct attribute *f71805f_attr_pwm[] = { | |
1088 | &sensor_dev_attr_pwm1.dev_attr.attr, | |
1089 | &sensor_dev_attr_pwm2.dev_attr.attr, | |
1090 | &sensor_dev_attr_pwm3.dev_attr.attr, | |
1091 | }; | |
1092 | ||
e53004e2 JD |
1093 | /* |
1094 | * Device registration and initialization | |
1095 | */ | |
1096 | ||
1097 | static void __devinit f71805f_init_device(struct f71805f_data *data) | |
1098 | { | |
1099 | u8 reg; | |
1100 | int i; | |
1101 | ||
1102 | reg = f71805f_read8(data, F71805F_REG_START); | |
1103 | if ((reg & 0x41) != 0x01) { | |
1104 | printk(KERN_DEBUG DRVNAME ": Starting monitoring " | |
1105 | "operations\n"); | |
1106 | f71805f_write8(data, F71805F_REG_START, (reg | 0x01) & ~0x40); | |
1107 | } | |
1108 | ||
1109 | /* Fan monitoring can be disabled. If it is, we won't be polling | |
1110 | the register values, and won't create the related sysfs files. */ | |
1111 | for (i = 0; i < 3; i++) { | |
6b14a546 JD |
1112 | data->fan_ctrl[i] = f71805f_read8(data, |
1113 | F71805F_REG_FAN_CTRL(i)); | |
315c7113 JD |
1114 | /* Clear latch full bit, else "speed mode" fan speed control |
1115 | doesn't work */ | |
1116 | if (data->fan_ctrl[i] & FAN_CTRL_LATCH_FULL) { | |
1117 | data->fan_ctrl[i] &= ~FAN_CTRL_LATCH_FULL; | |
1118 | f71805f_write8(data, F71805F_REG_FAN_CTRL(i), | |
1119 | data->fan_ctrl[i]); | |
1120 | } | |
e53004e2 JD |
1121 | } |
1122 | } | |
1123 | ||
1124 | static int __devinit f71805f_probe(struct platform_device *pdev) | |
1125 | { | |
51c997d8 | 1126 | struct f71805f_sio_data *sio_data = pdev->dev.platform_data; |
e53004e2 JD |
1127 | struct f71805f_data *data; |
1128 | struct resource *res; | |
2488a39d | 1129 | int i, err; |
e53004e2 | 1130 | |
51c997d8 JD |
1131 | static const char *names[] = { |
1132 | "f71805f", | |
1133 | "f71872f", | |
1134 | }; | |
1135 | ||
e53004e2 JD |
1136 | if (!(data = kzalloc(sizeof(struct f71805f_data), GFP_KERNEL))) { |
1137 | err = -ENOMEM; | |
1138 | printk(KERN_ERR DRVNAME ": Out of memory\n"); | |
1139 | goto exit; | |
1140 | } | |
1141 | ||
1142 | res = platform_get_resource(pdev, IORESOURCE_IO, 0); | |
1143 | data->addr = res->start; | |
51c997d8 | 1144 | data->name = names[sio_data->kind]; |
f0819184 | 1145 | mutex_init(&data->update_lock); |
e53004e2 JD |
1146 | |
1147 | platform_set_drvdata(pdev, data); | |
1148 | ||
51c997d8 JD |
1149 | /* Some voltage inputs depend on chip model and configuration */ |
1150 | switch (sio_data->kind) { | |
1151 | case f71805f: | |
1152 | data->has_in = 0x1ff; | |
1153 | break; | |
1154 | case f71872f: | |
1155 | data->has_in = 0x6ef; | |
1156 | if (sio_data->fnsel1 & 0x01) | |
1157 | data->has_in |= (1 << 4); /* in4 */ | |
1158 | if (sio_data->fnsel1 & 0x02) | |
1159 | data->has_in |= (1 << 8); /* in8 */ | |
1160 | break; | |
1161 | } | |
1162 | ||
e53004e2 JD |
1163 | /* Initialize the F71805F chip */ |
1164 | f71805f_init_device(data); | |
1165 | ||
1166 | /* Register sysfs interface files */ | |
0e39e01c JD |
1167 | if ((err = sysfs_create_group(&pdev->dev.kobj, &f71805f_group))) |
1168 | goto exit_free; | |
51c997d8 JD |
1169 | if (data->has_in & (1 << 4)) { /* in4 */ |
1170 | if ((err = sysfs_create_group(&pdev->dev.kobj, | |
1171 | &f71805f_group_optin[0]))) | |
1172 | goto exit_remove_files; | |
1173 | } | |
1174 | if (data->has_in & (1 << 8)) { /* in8 */ | |
1175 | if ((err = sysfs_create_group(&pdev->dev.kobj, | |
1176 | &f71805f_group_optin[1]))) | |
1177 | goto exit_remove_files; | |
1178 | } | |
1179 | if (data->has_in & (1 << 9)) { /* in9 (F71872F/FG only) */ | |
1180 | if ((err = sysfs_create_group(&pdev->dev.kobj, | |
1181 | &f71805f_group_optin[2]))) | |
1182 | goto exit_remove_files; | |
1183 | } | |
1184 | if (data->has_in & (1 << 10)) { /* in9 (F71872F/FG only) */ | |
1185 | if ((err = sysfs_create_group(&pdev->dev.kobj, | |
1186 | &f71805f_group_optin[3]))) | |
1187 | goto exit_remove_files; | |
1188 | } | |
0e39e01c | 1189 | for (i = 0; i < 3; i++) { |
e196783d JD |
1190 | /* If control mode is PWM, create pwm_freq file */ |
1191 | if (!(data->fan_ctrl[i] & FAN_CTRL_DC_MODE)) { | |
1192 | if ((err = sysfs_create_file(&pdev->dev.kobj, | |
1193 | f71805f_attributes_pwm_freq[i]))) | |
1194 | goto exit_remove_files; | |
1195 | } | |
95e35312 JD |
1196 | /* If PWM is in manual mode, add write permission */ |
1197 | if (data->fan_ctrl[i] & FAN_CTRL_MODE_MANUAL) { | |
1198 | if ((err = sysfs_chmod_file(&pdev->dev.kobj, | |
1199 | f71805f_attr_pwm[i], | |
1200 | S_IRUGO | S_IWUSR))) { | |
1201 | dev_err(&pdev->dev, "chmod +w pwm%d failed\n", | |
1202 | i + 1); | |
1203 | goto exit_remove_files; | |
1204 | } | |
1205 | } | |
0e39e01c JD |
1206 | } |
1207 | ||
1208 | data->class_dev = hwmon_device_register(&pdev->dev); | |
1209 | if (IS_ERR(data->class_dev)) { | |
1210 | err = PTR_ERR(data->class_dev); | |
1211 | dev_err(&pdev->dev, "Class registration failed (%d)\n", err); | |
1212 | goto exit_remove_files; | |
e53004e2 | 1213 | } |
e53004e2 JD |
1214 | |
1215 | return 0; | |
1216 | ||
0e39e01c JD |
1217 | exit_remove_files: |
1218 | sysfs_remove_group(&pdev->dev.kobj, &f71805f_group); | |
51c997d8 JD |
1219 | for (i = 0; i < 4; i++) |
1220 | sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_optin[i]); | |
e196783d | 1221 | sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_pwm_freq); |
e53004e2 | 1222 | exit_free: |
0e39e01c | 1223 | platform_set_drvdata(pdev, NULL); |
e53004e2 JD |
1224 | kfree(data); |
1225 | exit: | |
1226 | return err; | |
1227 | } | |
1228 | ||
1229 | static int __devexit f71805f_remove(struct platform_device *pdev) | |
1230 | { | |
1231 | struct f71805f_data *data = platform_get_drvdata(pdev); | |
0e39e01c | 1232 | int i; |
e53004e2 JD |
1233 | |
1234 | platform_set_drvdata(pdev, NULL); | |
1235 | hwmon_device_unregister(data->class_dev); | |
0e39e01c | 1236 | sysfs_remove_group(&pdev->dev.kobj, &f71805f_group); |
51c997d8 JD |
1237 | for (i = 0; i < 4; i++) |
1238 | sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_optin[i]); | |
e196783d | 1239 | sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_pwm_freq); |
e53004e2 JD |
1240 | kfree(data); |
1241 | ||
1242 | return 0; | |
1243 | } | |
1244 | ||
1245 | static struct platform_driver f71805f_driver = { | |
1246 | .driver = { | |
1247 | .owner = THIS_MODULE, | |
1248 | .name = DRVNAME, | |
1249 | }, | |
1250 | .probe = f71805f_probe, | |
1251 | .remove = __devexit_p(f71805f_remove), | |
1252 | }; | |
1253 | ||
51c997d8 JD |
1254 | static int __init f71805f_device_add(unsigned short address, |
1255 | const struct f71805f_sio_data *sio_data) | |
e53004e2 | 1256 | { |
568825c8 JD |
1257 | struct resource res = { |
1258 | .start = address, | |
1259 | .end = address + REGION_LENGTH - 1, | |
1260 | .flags = IORESOURCE_IO, | |
1261 | }; | |
e53004e2 JD |
1262 | int err; |
1263 | ||
1264 | pdev = platform_device_alloc(DRVNAME, address); | |
1265 | if (!pdev) { | |
1266 | err = -ENOMEM; | |
1267 | printk(KERN_ERR DRVNAME ": Device allocation failed\n"); | |
1268 | goto exit; | |
1269 | } | |
1270 | ||
568825c8 JD |
1271 | res.name = pdev->name; |
1272 | err = platform_device_add_resources(pdev, &res, 1); | |
e53004e2 JD |
1273 | if (err) { |
1274 | printk(KERN_ERR DRVNAME ": Device resource addition failed " | |
1275 | "(%d)\n", err); | |
1276 | goto exit_device_put; | |
1277 | } | |
1278 | ||
51c997d8 JD |
1279 | pdev->dev.platform_data = kmalloc(sizeof(struct f71805f_sio_data), |
1280 | GFP_KERNEL); | |
1281 | if (!pdev->dev.platform_data) { | |
1282 | err = -ENOMEM; | |
1283 | printk(KERN_ERR DRVNAME ": Platform data allocation failed\n"); | |
1284 | goto exit_device_put; | |
1285 | } | |
1286 | memcpy(pdev->dev.platform_data, sio_data, | |
1287 | sizeof(struct f71805f_sio_data)); | |
1288 | ||
e53004e2 JD |
1289 | err = platform_device_add(pdev); |
1290 | if (err) { | |
1291 | printk(KERN_ERR DRVNAME ": Device addition failed (%d)\n", | |
1292 | err); | |
51c997d8 | 1293 | goto exit_kfree_data; |
e53004e2 JD |
1294 | } |
1295 | ||
1296 | return 0; | |
1297 | ||
51c997d8 JD |
1298 | exit_kfree_data: |
1299 | kfree(pdev->dev.platform_data); | |
1300 | pdev->dev.platform_data = NULL; | |
e53004e2 JD |
1301 | exit_device_put: |
1302 | platform_device_put(pdev); | |
1303 | exit: | |
1304 | return err; | |
1305 | } | |
1306 | ||
51c997d8 JD |
1307 | static int __init f71805f_find(int sioaddr, unsigned short *address, |
1308 | struct f71805f_sio_data *sio_data) | |
e53004e2 JD |
1309 | { |
1310 | int err = -ENODEV; | |
1311 | u16 devid; | |
1312 | ||
51c997d8 JD |
1313 | static const char *names[] = { |
1314 | "F71805F/FG", | |
1315 | "F71872F/FG", | |
1316 | }; | |
1317 | ||
e53004e2 JD |
1318 | superio_enter(sioaddr); |
1319 | ||
1320 | devid = superio_inw(sioaddr, SIO_REG_MANID); | |
1321 | if (devid != SIO_FINTEK_ID) | |
1322 | goto exit; | |
1323 | ||
1324 | devid = superio_inw(sioaddr, SIO_REG_DEVID); | |
51c997d8 JD |
1325 | switch (devid) { |
1326 | case SIO_F71805F_ID: | |
1327 | sio_data->kind = f71805f; | |
1328 | break; | |
1329 | case SIO_F71872F_ID: | |
1330 | sio_data->kind = f71872f; | |
1331 | sio_data->fnsel1 = superio_inb(sioaddr, SIO_REG_FNSEL1); | |
1332 | break; | |
1333 | default: | |
e53004e2 JD |
1334 | printk(KERN_INFO DRVNAME ": Unsupported Fintek device, " |
1335 | "skipping\n"); | |
1336 | goto exit; | |
1337 | } | |
1338 | ||
1339 | superio_select(sioaddr, F71805F_LD_HWM); | |
1340 | if (!(superio_inb(sioaddr, SIO_REG_ENABLE) & 0x01)) { | |
1341 | printk(KERN_WARNING DRVNAME ": Device not activated, " | |
1342 | "skipping\n"); | |
1343 | goto exit; | |
1344 | } | |
1345 | ||
1346 | *address = superio_inw(sioaddr, SIO_REG_ADDR); | |
1347 | if (*address == 0) { | |
1348 | printk(KERN_WARNING DRVNAME ": Base address not set, " | |
1349 | "skipping\n"); | |
1350 | goto exit; | |
1351 | } | |
75c99029 | 1352 | *address &= ~(REGION_LENGTH - 1); /* Ignore 3 LSB */ |
e53004e2 JD |
1353 | |
1354 | err = 0; | |
51c997d8 JD |
1355 | printk(KERN_INFO DRVNAME ": Found %s chip at %#x, revision %u\n", |
1356 | names[sio_data->kind], *address, | |
1357 | superio_inb(sioaddr, SIO_REG_DEVREV)); | |
e53004e2 JD |
1358 | |
1359 | exit: | |
1360 | superio_exit(sioaddr); | |
1361 | return err; | |
1362 | } | |
1363 | ||
1364 | static int __init f71805f_init(void) | |
1365 | { | |
1366 | int err; | |
1367 | unsigned short address; | |
51c997d8 | 1368 | struct f71805f_sio_data sio_data; |
e53004e2 | 1369 | |
51c997d8 JD |
1370 | if (f71805f_find(0x2e, &address, &sio_data) |
1371 | && f71805f_find(0x4e, &address, &sio_data)) | |
e53004e2 JD |
1372 | return -ENODEV; |
1373 | ||
1374 | err = platform_driver_register(&f71805f_driver); | |
1375 | if (err) | |
1376 | goto exit; | |
1377 | ||
1378 | /* Sets global pdev as a side effect */ | |
51c997d8 | 1379 | err = f71805f_device_add(address, &sio_data); |
e53004e2 JD |
1380 | if (err) |
1381 | goto exit_driver; | |
1382 | ||
1383 | return 0; | |
1384 | ||
1385 | exit_driver: | |
1386 | platform_driver_unregister(&f71805f_driver); | |
1387 | exit: | |
1388 | return err; | |
1389 | } | |
1390 | ||
1391 | static void __exit f71805f_exit(void) | |
1392 | { | |
51c997d8 JD |
1393 | kfree(pdev->dev.platform_data); |
1394 | pdev->dev.platform_data = NULL; | |
e53004e2 | 1395 | platform_device_unregister(pdev); |
51c997d8 | 1396 | |
e53004e2 JD |
1397 | platform_driver_unregister(&f71805f_driver); |
1398 | } | |
1399 | ||
1400 | MODULE_AUTHOR("Jean Delvare <khali@linux-fr>"); | |
1401 | MODULE_LICENSE("GPL"); | |
51c997d8 | 1402 | MODULE_DESCRIPTION("F71805F/F71872F hardware monitoring driver"); |
e53004e2 JD |
1403 | |
1404 | module_init(f71805f_init); | |
1405 | module_exit(f71805f_exit); |