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e53004e2 | 1 | /* |
51c997d8 JD |
2 | * f71805f.c - driver for the Fintek F71805F/FG and F71872F/FG Super-I/O |
3 | * chips integrated hardware monitoring features | |
2d45771e | 4 | * Copyright (C) 2005-2006 Jean Delvare <khali@linux-fr.org> |
e53004e2 JD |
5 | * |
6 | * The F71805F/FG is a LPC Super-I/O chip made by Fintek. It integrates | |
7 | * complete hardware monitoring features: voltage, fan and temperature | |
8 | * sensors, and manual and automatic fan speed control. | |
9 | * | |
51c997d8 JD |
10 | * The F71872F/FG is almost the same, with two more voltages monitored, |
11 | * and 6 VID inputs. | |
12 | * | |
e53004e2 JD |
13 | * This program is free software; you can redistribute it and/or modify |
14 | * it under the terms of the GNU General Public License as published by | |
15 | * the Free Software Foundation; either version 2 of the License, or | |
16 | * (at your option) any later version. | |
17 | * | |
18 | * This program is distributed in the hope that it will be useful, | |
19 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
20 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
21 | * GNU General Public License for more details. | |
22 | * | |
23 | * You should have received a copy of the GNU General Public License | |
24 | * along with this program; if not, write to the Free Software | |
25 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
26 | */ | |
27 | ||
28 | #include <linux/module.h> | |
29 | #include <linux/init.h> | |
30 | #include <linux/slab.h> | |
31 | #include <linux/jiffies.h> | |
32 | #include <linux/platform_device.h> | |
33 | #include <linux/hwmon.h> | |
34 | #include <linux/hwmon-sysfs.h> | |
35 | #include <linux/err.h> | |
f0819184 | 36 | #include <linux/mutex.h> |
0e39e01c | 37 | #include <linux/sysfs.h> |
e53004e2 JD |
38 | #include <asm/io.h> |
39 | ||
40 | static struct platform_device *pdev; | |
41 | ||
42 | #define DRVNAME "f71805f" | |
51c997d8 | 43 | enum kinds { f71805f, f71872f }; |
e53004e2 JD |
44 | |
45 | /* | |
46 | * Super-I/O constants and functions | |
47 | */ | |
48 | ||
49 | #define F71805F_LD_HWM 0x04 | |
50 | ||
51 | #define SIO_REG_LDSEL 0x07 /* Logical device select */ | |
52 | #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */ | |
53 | #define SIO_REG_DEVREV 0x22 /* Device revision */ | |
54 | #define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */ | |
51c997d8 | 55 | #define SIO_REG_FNSEL1 0x29 /* Multi Function Select 1 (F71872F) */ |
e53004e2 JD |
56 | #define SIO_REG_ENABLE 0x30 /* Logical device enable */ |
57 | #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */ | |
58 | ||
59 | #define SIO_FINTEK_ID 0x1934 | |
60 | #define SIO_F71805F_ID 0x0406 | |
51c997d8 | 61 | #define SIO_F71872F_ID 0x0341 |
e53004e2 JD |
62 | |
63 | static inline int | |
64 | superio_inb(int base, int reg) | |
65 | { | |
66 | outb(reg, base); | |
67 | return inb(base + 1); | |
68 | } | |
69 | ||
70 | static int | |
71 | superio_inw(int base, int reg) | |
72 | { | |
73 | int val; | |
74 | outb(reg++, base); | |
75 | val = inb(base + 1) << 8; | |
76 | outb(reg, base); | |
77 | val |= inb(base + 1); | |
78 | return val; | |
79 | } | |
80 | ||
81 | static inline void | |
82 | superio_select(int base, int ld) | |
83 | { | |
84 | outb(SIO_REG_LDSEL, base); | |
85 | outb(ld, base + 1); | |
86 | } | |
87 | ||
88 | static inline void | |
89 | superio_enter(int base) | |
90 | { | |
91 | outb(0x87, base); | |
92 | outb(0x87, base); | |
93 | } | |
94 | ||
95 | static inline void | |
96 | superio_exit(int base) | |
97 | { | |
98 | outb(0xaa, base); | |
99 | } | |
100 | ||
101 | /* | |
102 | * ISA constants | |
103 | */ | |
104 | ||
105 | #define REGION_LENGTH 2 | |
106 | #define ADDR_REG_OFFSET 0 | |
107 | #define DATA_REG_OFFSET 1 | |
108 | ||
e53004e2 JD |
109 | /* |
110 | * Registers | |
111 | */ | |
112 | ||
51c997d8 | 113 | /* in nr from 0 to 10 (8-bit values) */ |
e53004e2 | 114 | #define F71805F_REG_IN(nr) (0x10 + (nr)) |
51c997d8 JD |
115 | #define F71805F_REG_IN_HIGH(nr) ((nr) < 10 ? 0x40 + 2 * (nr) : 0x2E) |
116 | #define F71805F_REG_IN_LOW(nr) ((nr) < 10 ? 0x41 + 2 * (nr) : 0x2F) | |
e53004e2 JD |
117 | /* fan nr from 0 to 2 (12-bit values, two registers) */ |
118 | #define F71805F_REG_FAN(nr) (0x20 + 2 * (nr)) | |
119 | #define F71805F_REG_FAN_LOW(nr) (0x28 + 2 * (nr)) | |
315c7113 | 120 | #define F71805F_REG_FAN_TARGET(nr) (0x69 + 16 * (nr)) |
e53004e2 | 121 | #define F71805F_REG_FAN_CTRL(nr) (0x60 + 16 * (nr)) |
6e2bc17b | 122 | #define F71805F_REG_PWM_FREQ(nr) (0x63 + 16 * (nr)) |
95e35312 | 123 | #define F71805F_REG_PWM_DUTY(nr) (0x6B + 16 * (nr)) |
e53004e2 JD |
124 | /* temp nr from 0 to 2 (8-bit values) */ |
125 | #define F71805F_REG_TEMP(nr) (0x1B + (nr)) | |
126 | #define F71805F_REG_TEMP_HIGH(nr) (0x54 + 2 * (nr)) | |
127 | #define F71805F_REG_TEMP_HYST(nr) (0x55 + 2 * (nr)) | |
128 | #define F71805F_REG_TEMP_MODE 0x01 | |
129 | ||
130 | #define F71805F_REG_START 0x00 | |
131 | /* status nr from 0 to 2 */ | |
132 | #define F71805F_REG_STATUS(nr) (0x36 + (nr)) | |
133 | ||
6b14a546 | 134 | /* individual register bits */ |
e196783d | 135 | #define FAN_CTRL_DC_MODE 0x10 |
315c7113 | 136 | #define FAN_CTRL_LATCH_FULL 0x08 |
95e35312 JD |
137 | #define FAN_CTRL_MODE_MASK 0x03 |
138 | #define FAN_CTRL_MODE_SPEED 0x00 | |
139 | #define FAN_CTRL_MODE_TEMPERATURE 0x01 | |
140 | #define FAN_CTRL_MODE_MANUAL 0x02 | |
6b14a546 | 141 | |
e53004e2 JD |
142 | /* |
143 | * Data structures and manipulation thereof | |
144 | */ | |
145 | ||
146 | struct f71805f_data { | |
147 | unsigned short addr; | |
148 | const char *name; | |
f0819184 | 149 | struct mutex lock; |
e53004e2 JD |
150 | struct class_device *class_dev; |
151 | ||
f0819184 | 152 | struct mutex update_lock; |
e53004e2 JD |
153 | char valid; /* !=0 if following fields are valid */ |
154 | unsigned long last_updated; /* In jiffies */ | |
155 | unsigned long last_limits; /* In jiffies */ | |
156 | ||
157 | /* Register values */ | |
51c997d8 JD |
158 | u8 in[11]; |
159 | u8 in_high[11]; | |
160 | u8 in_low[11]; | |
161 | u16 has_in; | |
e53004e2 JD |
162 | u16 fan[3]; |
163 | u16 fan_low[3]; | |
315c7113 | 164 | u16 fan_target[3]; |
6b14a546 | 165 | u8 fan_ctrl[3]; |
95e35312 | 166 | u8 pwm[3]; |
6e2bc17b | 167 | u8 pwm_freq[3]; |
e53004e2 JD |
168 | u8 temp[3]; |
169 | u8 temp_high[3]; | |
170 | u8 temp_hyst[3]; | |
171 | u8 temp_mode; | |
2d45771e | 172 | unsigned long alarms; |
e53004e2 JD |
173 | }; |
174 | ||
51c997d8 JD |
175 | struct f71805f_sio_data { |
176 | enum kinds kind; | |
177 | u8 fnsel1; | |
178 | }; | |
179 | ||
e53004e2 JD |
180 | static inline long in_from_reg(u8 reg) |
181 | { | |
182 | return (reg * 8); | |
183 | } | |
184 | ||
185 | /* The 2 least significant bits are not used */ | |
186 | static inline u8 in_to_reg(long val) | |
187 | { | |
188 | if (val <= 0) | |
189 | return 0; | |
190 | if (val >= 2016) | |
191 | return 0xfc; | |
192 | return (((val + 16) / 32) << 2); | |
193 | } | |
194 | ||
195 | /* in0 is downscaled by a factor 2 internally */ | |
196 | static inline long in0_from_reg(u8 reg) | |
197 | { | |
198 | return (reg * 16); | |
199 | } | |
200 | ||
201 | static inline u8 in0_to_reg(long val) | |
202 | { | |
203 | if (val <= 0) | |
204 | return 0; | |
205 | if (val >= 4032) | |
206 | return 0xfc; | |
207 | return (((val + 32) / 64) << 2); | |
208 | } | |
209 | ||
210 | /* The 4 most significant bits are not used */ | |
211 | static inline long fan_from_reg(u16 reg) | |
212 | { | |
213 | reg &= 0xfff; | |
214 | if (!reg || reg == 0xfff) | |
215 | return 0; | |
216 | return (1500000 / reg); | |
217 | } | |
218 | ||
219 | static inline u16 fan_to_reg(long rpm) | |
220 | { | |
221 | /* If the low limit is set below what the chip can measure, | |
222 | store the largest possible 12-bit value in the registers, | |
223 | so that no alarm will ever trigger. */ | |
224 | if (rpm < 367) | |
225 | return 0xfff; | |
226 | return (1500000 / rpm); | |
227 | } | |
228 | ||
6e2bc17b JD |
229 | static inline unsigned long pwm_freq_from_reg(u8 reg) |
230 | { | |
231 | unsigned long clock = (reg & 0x80) ? 48000000UL : 1000000UL; | |
232 | ||
233 | reg &= 0x7f; | |
234 | if (reg == 0) | |
235 | reg++; | |
236 | return clock / (reg << 8); | |
237 | } | |
238 | ||
239 | static inline u8 pwm_freq_to_reg(unsigned long val) | |
240 | { | |
241 | if (val >= 187500) /* The highest we can do */ | |
242 | return 0x80; | |
243 | if (val >= 1475) /* Use 48 MHz clock */ | |
244 | return 0x80 | (48000000UL / (val << 8)); | |
245 | if (val < 31) /* The lowest we can do */ | |
246 | return 0x7f; | |
247 | else /* Use 1 MHz clock */ | |
248 | return 1000000UL / (val << 8); | |
249 | } | |
250 | ||
e196783d JD |
251 | static inline int pwm_mode_from_reg(u8 reg) |
252 | { | |
253 | return !(reg & FAN_CTRL_DC_MODE); | |
254 | } | |
255 | ||
e53004e2 JD |
256 | static inline long temp_from_reg(u8 reg) |
257 | { | |
258 | return (reg * 1000); | |
259 | } | |
260 | ||
261 | static inline u8 temp_to_reg(long val) | |
262 | { | |
263 | if (val < 0) | |
264 | val = 0; | |
265 | else if (val > 1000 * 0xff) | |
266 | val = 0xff; | |
267 | return ((val + 500) / 1000); | |
268 | } | |
269 | ||
270 | /* | |
271 | * Device I/O access | |
272 | */ | |
273 | ||
274 | static u8 f71805f_read8(struct f71805f_data *data, u8 reg) | |
275 | { | |
276 | u8 val; | |
277 | ||
f0819184 | 278 | mutex_lock(&data->lock); |
e53004e2 JD |
279 | outb(reg, data->addr + ADDR_REG_OFFSET); |
280 | val = inb(data->addr + DATA_REG_OFFSET); | |
f0819184 | 281 | mutex_unlock(&data->lock); |
e53004e2 JD |
282 | |
283 | return val; | |
284 | } | |
285 | ||
286 | static void f71805f_write8(struct f71805f_data *data, u8 reg, u8 val) | |
287 | { | |
f0819184 | 288 | mutex_lock(&data->lock); |
e53004e2 JD |
289 | outb(reg, data->addr + ADDR_REG_OFFSET); |
290 | outb(val, data->addr + DATA_REG_OFFSET); | |
f0819184 | 291 | mutex_unlock(&data->lock); |
e53004e2 JD |
292 | } |
293 | ||
294 | /* It is important to read the MSB first, because doing so latches the | |
295 | value of the LSB, so we are sure both bytes belong to the same value. */ | |
296 | static u16 f71805f_read16(struct f71805f_data *data, u8 reg) | |
297 | { | |
298 | u16 val; | |
299 | ||
f0819184 | 300 | mutex_lock(&data->lock); |
e53004e2 JD |
301 | outb(reg, data->addr + ADDR_REG_OFFSET); |
302 | val = inb(data->addr + DATA_REG_OFFSET) << 8; | |
303 | outb(++reg, data->addr + ADDR_REG_OFFSET); | |
304 | val |= inb(data->addr + DATA_REG_OFFSET); | |
f0819184 | 305 | mutex_unlock(&data->lock); |
e53004e2 JD |
306 | |
307 | return val; | |
308 | } | |
309 | ||
310 | static void f71805f_write16(struct f71805f_data *data, u8 reg, u16 val) | |
311 | { | |
f0819184 | 312 | mutex_lock(&data->lock); |
e53004e2 JD |
313 | outb(reg, data->addr + ADDR_REG_OFFSET); |
314 | outb(val >> 8, data->addr + DATA_REG_OFFSET); | |
315 | outb(++reg, data->addr + ADDR_REG_OFFSET); | |
316 | outb(val & 0xff, data->addr + DATA_REG_OFFSET); | |
f0819184 | 317 | mutex_unlock(&data->lock); |
e53004e2 JD |
318 | } |
319 | ||
320 | static struct f71805f_data *f71805f_update_device(struct device *dev) | |
321 | { | |
322 | struct f71805f_data *data = dev_get_drvdata(dev); | |
323 | int nr; | |
324 | ||
f0819184 | 325 | mutex_lock(&data->update_lock); |
e53004e2 JD |
326 | |
327 | /* Limit registers cache is refreshed after 60 seconds */ | |
328 | if (time_after(jiffies, data->last_updated + 60 * HZ) | |
329 | || !data->valid) { | |
51c997d8 JD |
330 | for (nr = 0; nr < 11; nr++) { |
331 | if (!(data->has_in & (1 << nr))) | |
332 | continue; | |
e53004e2 JD |
333 | data->in_high[nr] = f71805f_read8(data, |
334 | F71805F_REG_IN_HIGH(nr)); | |
335 | data->in_low[nr] = f71805f_read8(data, | |
336 | F71805F_REG_IN_LOW(nr)); | |
337 | } | |
338 | for (nr = 0; nr < 3; nr++) { | |
6b14a546 JD |
339 | data->fan_low[nr] = f71805f_read16(data, |
340 | F71805F_REG_FAN_LOW(nr)); | |
315c7113 JD |
341 | data->fan_target[nr] = f71805f_read16(data, |
342 | F71805F_REG_FAN_TARGET(nr)); | |
6e2bc17b JD |
343 | data->pwm_freq[nr] = f71805f_read8(data, |
344 | F71805F_REG_PWM_FREQ(nr)); | |
e53004e2 JD |
345 | } |
346 | for (nr = 0; nr < 3; nr++) { | |
347 | data->temp_high[nr] = f71805f_read8(data, | |
348 | F71805F_REG_TEMP_HIGH(nr)); | |
349 | data->temp_hyst[nr] = f71805f_read8(data, | |
350 | F71805F_REG_TEMP_HYST(nr)); | |
351 | } | |
352 | data->temp_mode = f71805f_read8(data, F71805F_REG_TEMP_MODE); | |
353 | ||
354 | data->last_limits = jiffies; | |
355 | } | |
356 | ||
357 | /* Measurement registers cache is refreshed after 1 second */ | |
358 | if (time_after(jiffies, data->last_updated + HZ) | |
359 | || !data->valid) { | |
51c997d8 JD |
360 | for (nr = 0; nr < 11; nr++) { |
361 | if (!(data->has_in & (1 << nr))) | |
362 | continue; | |
e53004e2 JD |
363 | data->in[nr] = f71805f_read8(data, |
364 | F71805F_REG_IN(nr)); | |
365 | } | |
366 | for (nr = 0; nr < 3; nr++) { | |
6b14a546 JD |
367 | data->fan[nr] = f71805f_read16(data, |
368 | F71805F_REG_FAN(nr)); | |
95e35312 JD |
369 | data->fan_ctrl[nr] = f71805f_read8(data, |
370 | F71805F_REG_FAN_CTRL(nr)); | |
371 | data->pwm[nr] = f71805f_read8(data, | |
372 | F71805F_REG_PWM_DUTY(nr)); | |
e53004e2 JD |
373 | } |
374 | for (nr = 0; nr < 3; nr++) { | |
375 | data->temp[nr] = f71805f_read8(data, | |
376 | F71805F_REG_TEMP(nr)); | |
377 | } | |
2d45771e JD |
378 | data->alarms = f71805f_read8(data, F71805F_REG_STATUS(0)) |
379 | + (f71805f_read8(data, F71805F_REG_STATUS(1)) << 8) | |
380 | + (f71805f_read8(data, F71805F_REG_STATUS(2)) << 16); | |
e53004e2 JD |
381 | |
382 | data->last_updated = jiffies; | |
383 | data->valid = 1; | |
384 | } | |
385 | ||
f0819184 | 386 | mutex_unlock(&data->update_lock); |
e53004e2 JD |
387 | |
388 | return data; | |
389 | } | |
390 | ||
391 | /* | |
392 | * Sysfs interface | |
393 | */ | |
394 | ||
395 | static ssize_t show_in0(struct device *dev, struct device_attribute *devattr, | |
396 | char *buf) | |
397 | { | |
398 | struct f71805f_data *data = f71805f_update_device(dev); | |
51c997d8 JD |
399 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); |
400 | int nr = attr->index; | |
e53004e2 | 401 | |
51c997d8 | 402 | return sprintf(buf, "%ld\n", in0_from_reg(data->in[nr])); |
e53004e2 JD |
403 | } |
404 | ||
405 | static ssize_t show_in0_max(struct device *dev, struct device_attribute | |
406 | *devattr, char *buf) | |
407 | { | |
408 | struct f71805f_data *data = f71805f_update_device(dev); | |
51c997d8 JD |
409 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); |
410 | int nr = attr->index; | |
e53004e2 | 411 | |
51c997d8 | 412 | return sprintf(buf, "%ld\n", in0_from_reg(data->in_high[nr])); |
e53004e2 JD |
413 | } |
414 | ||
415 | static ssize_t show_in0_min(struct device *dev, struct device_attribute | |
416 | *devattr, char *buf) | |
417 | { | |
418 | struct f71805f_data *data = f71805f_update_device(dev); | |
51c997d8 JD |
419 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); |
420 | int nr = attr->index; | |
e53004e2 | 421 | |
51c997d8 | 422 | return sprintf(buf, "%ld\n", in0_from_reg(data->in_low[nr])); |
e53004e2 JD |
423 | } |
424 | ||
425 | static ssize_t set_in0_max(struct device *dev, struct device_attribute | |
426 | *devattr, const char *buf, size_t count) | |
427 | { | |
428 | struct f71805f_data *data = dev_get_drvdata(dev); | |
51c997d8 JD |
429 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); |
430 | int nr = attr->index; | |
e53004e2 JD |
431 | long val = simple_strtol(buf, NULL, 10); |
432 | ||
f0819184 | 433 | mutex_lock(&data->update_lock); |
51c997d8 JD |
434 | data->in_high[nr] = in0_to_reg(val); |
435 | f71805f_write8(data, F71805F_REG_IN_HIGH(nr), data->in_high[nr]); | |
f0819184 | 436 | mutex_unlock(&data->update_lock); |
e53004e2 JD |
437 | |
438 | return count; | |
439 | } | |
440 | ||
441 | static ssize_t set_in0_min(struct device *dev, struct device_attribute | |
442 | *devattr, const char *buf, size_t count) | |
443 | { | |
444 | struct f71805f_data *data = dev_get_drvdata(dev); | |
51c997d8 JD |
445 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); |
446 | int nr = attr->index; | |
e53004e2 JD |
447 | long val = simple_strtol(buf, NULL, 10); |
448 | ||
f0819184 | 449 | mutex_lock(&data->update_lock); |
51c997d8 JD |
450 | data->in_low[nr] = in0_to_reg(val); |
451 | f71805f_write8(data, F71805F_REG_IN_LOW(nr), data->in_low[nr]); | |
f0819184 | 452 | mutex_unlock(&data->update_lock); |
e53004e2 JD |
453 | |
454 | return count; | |
455 | } | |
456 | ||
e53004e2 JD |
457 | static ssize_t show_in(struct device *dev, struct device_attribute *devattr, |
458 | char *buf) | |
459 | { | |
460 | struct f71805f_data *data = f71805f_update_device(dev); | |
461 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
462 | int nr = attr->index; | |
463 | ||
464 | return sprintf(buf, "%ld\n", in_from_reg(data->in[nr])); | |
465 | } | |
466 | ||
467 | static ssize_t show_in_max(struct device *dev, struct device_attribute | |
468 | *devattr, char *buf) | |
469 | { | |
470 | struct f71805f_data *data = f71805f_update_device(dev); | |
471 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
472 | int nr = attr->index; | |
473 | ||
474 | return sprintf(buf, "%ld\n", in_from_reg(data->in_high[nr])); | |
475 | } | |
476 | ||
477 | static ssize_t show_in_min(struct device *dev, struct device_attribute | |
478 | *devattr, char *buf) | |
479 | { | |
480 | struct f71805f_data *data = f71805f_update_device(dev); | |
481 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
482 | int nr = attr->index; | |
483 | ||
484 | return sprintf(buf, "%ld\n", in_from_reg(data->in_low[nr])); | |
485 | } | |
486 | ||
487 | static ssize_t set_in_max(struct device *dev, struct device_attribute | |
488 | *devattr, const char *buf, size_t count) | |
489 | { | |
490 | struct f71805f_data *data = dev_get_drvdata(dev); | |
491 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
492 | int nr = attr->index; | |
493 | long val = simple_strtol(buf, NULL, 10); | |
494 | ||
f0819184 | 495 | mutex_lock(&data->update_lock); |
e53004e2 JD |
496 | data->in_high[nr] = in_to_reg(val); |
497 | f71805f_write8(data, F71805F_REG_IN_HIGH(nr), data->in_high[nr]); | |
f0819184 | 498 | mutex_unlock(&data->update_lock); |
e53004e2 JD |
499 | |
500 | return count; | |
501 | } | |
502 | ||
503 | static ssize_t set_in_min(struct device *dev, struct device_attribute | |
504 | *devattr, const char *buf, size_t count) | |
505 | { | |
506 | struct f71805f_data *data = dev_get_drvdata(dev); | |
507 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
508 | int nr = attr->index; | |
509 | long val = simple_strtol(buf, NULL, 10); | |
510 | ||
f0819184 | 511 | mutex_lock(&data->update_lock); |
e53004e2 JD |
512 | data->in_low[nr] = in_to_reg(val); |
513 | f71805f_write8(data, F71805F_REG_IN_LOW(nr), data->in_low[nr]); | |
f0819184 | 514 | mutex_unlock(&data->update_lock); |
e53004e2 JD |
515 | |
516 | return count; | |
517 | } | |
518 | ||
e53004e2 JD |
519 | static ssize_t show_fan(struct device *dev, struct device_attribute *devattr, |
520 | char *buf) | |
521 | { | |
522 | struct f71805f_data *data = f71805f_update_device(dev); | |
523 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
524 | int nr = attr->index; | |
525 | ||
526 | return sprintf(buf, "%ld\n", fan_from_reg(data->fan[nr])); | |
527 | } | |
528 | ||
529 | static ssize_t show_fan_min(struct device *dev, struct device_attribute | |
530 | *devattr, char *buf) | |
531 | { | |
532 | struct f71805f_data *data = f71805f_update_device(dev); | |
533 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
534 | int nr = attr->index; | |
535 | ||
536 | return sprintf(buf, "%ld\n", fan_from_reg(data->fan_low[nr])); | |
537 | } | |
538 | ||
315c7113 JD |
539 | static ssize_t show_fan_target(struct device *dev, struct device_attribute |
540 | *devattr, char *buf) | |
541 | { | |
542 | struct f71805f_data *data = f71805f_update_device(dev); | |
543 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
544 | int nr = attr->index; | |
545 | ||
546 | return sprintf(buf, "%ld\n", fan_from_reg(data->fan_target[nr])); | |
547 | } | |
548 | ||
e53004e2 JD |
549 | static ssize_t set_fan_min(struct device *dev, struct device_attribute |
550 | *devattr, const char *buf, size_t count) | |
551 | { | |
552 | struct f71805f_data *data = dev_get_drvdata(dev); | |
553 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
554 | int nr = attr->index; | |
555 | long val = simple_strtol(buf, NULL, 10); | |
556 | ||
f0819184 | 557 | mutex_lock(&data->update_lock); |
e53004e2 JD |
558 | data->fan_low[nr] = fan_to_reg(val); |
559 | f71805f_write16(data, F71805F_REG_FAN_LOW(nr), data->fan_low[nr]); | |
f0819184 | 560 | mutex_unlock(&data->update_lock); |
e53004e2 JD |
561 | |
562 | return count; | |
563 | } | |
564 | ||
315c7113 JD |
565 | static ssize_t set_fan_target(struct device *dev, struct device_attribute |
566 | *devattr, const char *buf, size_t count) | |
567 | { | |
568 | struct f71805f_data *data = dev_get_drvdata(dev); | |
569 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
570 | int nr = attr->index; | |
571 | long val = simple_strtol(buf, NULL, 10); | |
572 | ||
573 | mutex_lock(&data->update_lock); | |
574 | data->fan_target[nr] = fan_to_reg(val); | |
575 | f71805f_write16(data, F71805F_REG_FAN_TARGET(nr), | |
576 | data->fan_target[nr]); | |
577 | mutex_unlock(&data->update_lock); | |
578 | ||
579 | return count; | |
580 | } | |
581 | ||
95e35312 JD |
582 | static ssize_t show_pwm(struct device *dev, struct device_attribute *devattr, |
583 | char *buf) | |
584 | { | |
585 | struct f71805f_data *data = f71805f_update_device(dev); | |
586 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
587 | int nr = attr->index; | |
588 | ||
589 | return sprintf(buf, "%d\n", (int)data->pwm[nr]); | |
590 | } | |
591 | ||
592 | static ssize_t show_pwm_enable(struct device *dev, struct device_attribute | |
593 | *devattr, char *buf) | |
594 | { | |
595 | struct f71805f_data *data = f71805f_update_device(dev); | |
596 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
597 | int nr = attr->index; | |
598 | int mode; | |
599 | ||
600 | switch (data->fan_ctrl[nr] & FAN_CTRL_MODE_MASK) { | |
601 | case FAN_CTRL_MODE_SPEED: | |
602 | mode = 3; | |
603 | break; | |
604 | case FAN_CTRL_MODE_TEMPERATURE: | |
605 | mode = 2; | |
606 | break; | |
607 | default: /* MANUAL */ | |
608 | mode = 1; | |
609 | } | |
610 | ||
611 | return sprintf(buf, "%d\n", mode); | |
612 | } | |
613 | ||
6e2bc17b JD |
614 | static ssize_t show_pwm_freq(struct device *dev, struct device_attribute |
615 | *devattr, char *buf) | |
616 | { | |
617 | struct f71805f_data *data = f71805f_update_device(dev); | |
618 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
619 | int nr = attr->index; | |
620 | ||
621 | return sprintf(buf, "%lu\n", pwm_freq_from_reg(data->pwm_freq[nr])); | |
622 | } | |
623 | ||
e196783d JD |
624 | static ssize_t show_pwm_mode(struct device *dev, struct device_attribute |
625 | *devattr, char *buf) | |
626 | { | |
627 | struct f71805f_data *data = f71805f_update_device(dev); | |
628 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
629 | int nr = attr->index; | |
630 | ||
631 | return sprintf(buf, "%d\n", pwm_mode_from_reg(data->fan_ctrl[nr])); | |
632 | } | |
633 | ||
95e35312 JD |
634 | static ssize_t set_pwm(struct device *dev, struct device_attribute *devattr, |
635 | const char *buf, size_t count) | |
636 | { | |
637 | struct f71805f_data *data = dev_get_drvdata(dev); | |
638 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
639 | int nr = attr->index; | |
640 | unsigned long val = simple_strtoul(buf, NULL, 10); | |
641 | ||
642 | if (val > 255) | |
643 | return -EINVAL; | |
644 | ||
645 | mutex_lock(&data->update_lock); | |
646 | data->pwm[nr] = val; | |
647 | f71805f_write8(data, F71805F_REG_PWM_DUTY(nr), data->pwm[nr]); | |
648 | mutex_unlock(&data->update_lock); | |
649 | ||
650 | return count; | |
651 | } | |
652 | ||
653 | static struct attribute *f71805f_attr_pwm[]; | |
654 | ||
655 | static ssize_t set_pwm_enable(struct device *dev, struct device_attribute | |
656 | *devattr, const char *buf, size_t count) | |
657 | { | |
658 | struct f71805f_data *data = dev_get_drvdata(dev); | |
659 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
660 | int nr = attr->index; | |
661 | unsigned long val = simple_strtoul(buf, NULL, 10); | |
662 | u8 reg; | |
663 | ||
664 | if (val < 1 || val > 3) | |
665 | return -EINVAL; | |
666 | ||
667 | if (val > 1) { /* Automatic mode, user can't set PWM value */ | |
668 | if (sysfs_chmod_file(&dev->kobj, f71805f_attr_pwm[nr], | |
669 | S_IRUGO)) | |
670 | dev_dbg(dev, "chmod -w pwm%d failed\n", nr + 1); | |
671 | } | |
672 | ||
673 | mutex_lock(&data->update_lock); | |
674 | reg = f71805f_read8(data, F71805F_REG_FAN_CTRL(nr)) | |
675 | & ~FAN_CTRL_MODE_MASK; | |
676 | switch (val) { | |
677 | case 1: | |
678 | reg |= FAN_CTRL_MODE_MANUAL; | |
679 | break; | |
680 | case 2: | |
681 | reg |= FAN_CTRL_MODE_TEMPERATURE; | |
682 | break; | |
683 | case 3: | |
684 | reg |= FAN_CTRL_MODE_SPEED; | |
685 | break; | |
686 | } | |
687 | data->fan_ctrl[nr] = reg; | |
688 | f71805f_write8(data, F71805F_REG_FAN_CTRL(nr), reg); | |
689 | mutex_unlock(&data->update_lock); | |
690 | ||
691 | if (val == 1) { /* Manual mode, user can set PWM value */ | |
692 | if (sysfs_chmod_file(&dev->kobj, f71805f_attr_pwm[nr], | |
693 | S_IRUGO | S_IWUSR)) | |
694 | dev_dbg(dev, "chmod +w pwm%d failed\n", nr + 1); | |
695 | } | |
696 | ||
697 | return count; | |
698 | } | |
699 | ||
6e2bc17b JD |
700 | static ssize_t set_pwm_freq(struct device *dev, struct device_attribute |
701 | *devattr, const char *buf, size_t count) | |
702 | { | |
703 | struct f71805f_data *data = dev_get_drvdata(dev); | |
704 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
705 | int nr = attr->index; | |
706 | unsigned long val = simple_strtoul(buf, NULL, 10); | |
707 | ||
708 | mutex_lock(&data->update_lock); | |
709 | data->pwm_freq[nr] = pwm_freq_to_reg(val); | |
710 | f71805f_write8(data, F71805F_REG_PWM_FREQ(nr), data->pwm_freq[nr]); | |
711 | mutex_unlock(&data->update_lock); | |
712 | ||
713 | return count; | |
714 | } | |
715 | ||
e53004e2 JD |
716 | static ssize_t show_temp(struct device *dev, struct device_attribute *devattr, |
717 | char *buf) | |
718 | { | |
719 | struct f71805f_data *data = f71805f_update_device(dev); | |
720 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
721 | int nr = attr->index; | |
722 | ||
723 | return sprintf(buf, "%ld\n", temp_from_reg(data->temp[nr])); | |
724 | } | |
725 | ||
726 | static ssize_t show_temp_max(struct device *dev, struct device_attribute | |
727 | *devattr, char *buf) | |
728 | { | |
729 | struct f71805f_data *data = f71805f_update_device(dev); | |
730 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
731 | int nr = attr->index; | |
732 | ||
733 | return sprintf(buf, "%ld\n", temp_from_reg(data->temp_high[nr])); | |
734 | } | |
735 | ||
736 | static ssize_t show_temp_hyst(struct device *dev, struct device_attribute | |
737 | *devattr, char *buf) | |
738 | { | |
739 | struct f71805f_data *data = f71805f_update_device(dev); | |
740 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
741 | int nr = attr->index; | |
742 | ||
743 | return sprintf(buf, "%ld\n", temp_from_reg(data->temp_hyst[nr])); | |
744 | } | |
745 | ||
746 | static ssize_t show_temp_type(struct device *dev, struct device_attribute | |
747 | *devattr, char *buf) | |
748 | { | |
749 | struct f71805f_data *data = f71805f_update_device(dev); | |
750 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
751 | int nr = attr->index; | |
752 | ||
753 | /* 3 is diode, 4 is thermistor */ | |
754 | return sprintf(buf, "%u\n", (data->temp_mode & (1 << nr)) ? 3 : 4); | |
755 | } | |
756 | ||
757 | static ssize_t set_temp_max(struct device *dev, struct device_attribute | |
758 | *devattr, const char *buf, size_t count) | |
759 | { | |
760 | struct f71805f_data *data = dev_get_drvdata(dev); | |
761 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
762 | int nr = attr->index; | |
763 | long val = simple_strtol(buf, NULL, 10); | |
764 | ||
f0819184 | 765 | mutex_lock(&data->update_lock); |
e53004e2 JD |
766 | data->temp_high[nr] = temp_to_reg(val); |
767 | f71805f_write8(data, F71805F_REG_TEMP_HIGH(nr), data->temp_high[nr]); | |
f0819184 | 768 | mutex_unlock(&data->update_lock); |
e53004e2 JD |
769 | |
770 | return count; | |
771 | } | |
772 | ||
773 | static ssize_t set_temp_hyst(struct device *dev, struct device_attribute | |
774 | *devattr, const char *buf, size_t count) | |
775 | { | |
776 | struct f71805f_data *data = dev_get_drvdata(dev); | |
777 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
778 | int nr = attr->index; | |
779 | long val = simple_strtol(buf, NULL, 10); | |
780 | ||
f0819184 | 781 | mutex_lock(&data->update_lock); |
e53004e2 JD |
782 | data->temp_hyst[nr] = temp_to_reg(val); |
783 | f71805f_write8(data, F71805F_REG_TEMP_HYST(nr), data->temp_hyst[nr]); | |
f0819184 | 784 | mutex_unlock(&data->update_lock); |
e53004e2 JD |
785 | |
786 | return count; | |
787 | } | |
788 | ||
e53004e2 JD |
789 | static ssize_t show_alarms_in(struct device *dev, struct device_attribute |
790 | *devattr, char *buf) | |
791 | { | |
792 | struct f71805f_data *data = f71805f_update_device(dev); | |
793 | ||
51c997d8 | 794 | return sprintf(buf, "%lu\n", data->alarms & 0x7ff); |
e53004e2 JD |
795 | } |
796 | ||
797 | static ssize_t show_alarms_fan(struct device *dev, struct device_attribute | |
798 | *devattr, char *buf) | |
799 | { | |
800 | struct f71805f_data *data = f71805f_update_device(dev); | |
801 | ||
2d45771e | 802 | return sprintf(buf, "%lu\n", (data->alarms >> 16) & 0x07); |
e53004e2 JD |
803 | } |
804 | ||
805 | static ssize_t show_alarms_temp(struct device *dev, struct device_attribute | |
806 | *devattr, char *buf) | |
807 | { | |
808 | struct f71805f_data *data = f71805f_update_device(dev); | |
809 | ||
2d45771e JD |
810 | return sprintf(buf, "%lu\n", (data->alarms >> 11) & 0x07); |
811 | } | |
812 | ||
813 | static ssize_t show_alarm(struct device *dev, struct device_attribute | |
814 | *devattr, char *buf) | |
815 | { | |
816 | struct f71805f_data *data = f71805f_update_device(dev); | |
817 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
818 | int bitnr = attr->index; | |
819 | ||
820 | return sprintf(buf, "%lu\n", (data->alarms >> bitnr) & 1); | |
e53004e2 JD |
821 | } |
822 | ||
e53004e2 JD |
823 | static ssize_t show_name(struct device *dev, struct device_attribute |
824 | *devattr, char *buf) | |
825 | { | |
826 | struct f71805f_data *data = dev_get_drvdata(dev); | |
827 | ||
828 | return sprintf(buf, "%s\n", data->name); | |
829 | } | |
830 | ||
51c997d8 JD |
831 | static SENSOR_DEVICE_ATTR(in0_input, S_IRUGO, show_in0, NULL, 0); |
832 | static SENSOR_DEVICE_ATTR(in0_max, S_IRUGO| S_IWUSR, | |
833 | show_in0_max, set_in0_max, 0); | |
834 | static SENSOR_DEVICE_ATTR(in0_min, S_IRUGO| S_IWUSR, | |
835 | show_in0_min, set_in0_min, 0); | |
0e39e01c JD |
836 | static SENSOR_DEVICE_ATTR(in1_input, S_IRUGO, show_in, NULL, 1); |
837 | static SENSOR_DEVICE_ATTR(in1_max, S_IRUGO | S_IWUSR, | |
838 | show_in_max, set_in_max, 1); | |
839 | static SENSOR_DEVICE_ATTR(in1_min, S_IRUGO | S_IWUSR, | |
840 | show_in_min, set_in_min, 1); | |
841 | static SENSOR_DEVICE_ATTR(in2_input, S_IRUGO, show_in, NULL, 2); | |
842 | static SENSOR_DEVICE_ATTR(in2_max, S_IRUGO | S_IWUSR, | |
843 | show_in_max, set_in_max, 2); | |
844 | static SENSOR_DEVICE_ATTR(in2_min, S_IRUGO | S_IWUSR, | |
845 | show_in_min, set_in_min, 2); | |
846 | static SENSOR_DEVICE_ATTR(in3_input, S_IRUGO, show_in, NULL, 3); | |
847 | static SENSOR_DEVICE_ATTR(in3_max, S_IRUGO | S_IWUSR, | |
848 | show_in_max, set_in_max, 3); | |
849 | static SENSOR_DEVICE_ATTR(in3_min, S_IRUGO | S_IWUSR, | |
850 | show_in_min, set_in_min, 3); | |
851 | static SENSOR_DEVICE_ATTR(in4_input, S_IRUGO, show_in, NULL, 4); | |
852 | static SENSOR_DEVICE_ATTR(in4_max, S_IRUGO | S_IWUSR, | |
853 | show_in_max, set_in_max, 4); | |
854 | static SENSOR_DEVICE_ATTR(in4_min, S_IRUGO | S_IWUSR, | |
855 | show_in_min, set_in_min, 4); | |
856 | static SENSOR_DEVICE_ATTR(in5_input, S_IRUGO, show_in, NULL, 5); | |
857 | static SENSOR_DEVICE_ATTR(in5_max, S_IRUGO | S_IWUSR, | |
858 | show_in_max, set_in_max, 5); | |
859 | static SENSOR_DEVICE_ATTR(in5_min, S_IRUGO | S_IWUSR, | |
860 | show_in_min, set_in_min, 5); | |
861 | static SENSOR_DEVICE_ATTR(in6_input, S_IRUGO, show_in, NULL, 6); | |
862 | static SENSOR_DEVICE_ATTR(in6_max, S_IRUGO | S_IWUSR, | |
863 | show_in_max, set_in_max, 6); | |
864 | static SENSOR_DEVICE_ATTR(in6_min, S_IRUGO | S_IWUSR, | |
865 | show_in_min, set_in_min, 6); | |
866 | static SENSOR_DEVICE_ATTR(in7_input, S_IRUGO, show_in, NULL, 7); | |
867 | static SENSOR_DEVICE_ATTR(in7_max, S_IRUGO | S_IWUSR, | |
868 | show_in_max, set_in_max, 7); | |
869 | static SENSOR_DEVICE_ATTR(in7_min, S_IRUGO | S_IWUSR, | |
870 | show_in_min, set_in_min, 7); | |
871 | static SENSOR_DEVICE_ATTR(in8_input, S_IRUGO, show_in, NULL, 8); | |
872 | static SENSOR_DEVICE_ATTR(in8_max, S_IRUGO | S_IWUSR, | |
873 | show_in_max, set_in_max, 8); | |
874 | static SENSOR_DEVICE_ATTR(in8_min, S_IRUGO | S_IWUSR, | |
875 | show_in_min, set_in_min, 8); | |
51c997d8 JD |
876 | static SENSOR_DEVICE_ATTR(in9_input, S_IRUGO, show_in0, NULL, 9); |
877 | static SENSOR_DEVICE_ATTR(in9_max, S_IRUGO | S_IWUSR, | |
878 | show_in0_max, set_in0_max, 9); | |
879 | static SENSOR_DEVICE_ATTR(in9_min, S_IRUGO | S_IWUSR, | |
880 | show_in0_min, set_in0_min, 9); | |
881 | static SENSOR_DEVICE_ATTR(in10_input, S_IRUGO, show_in0, NULL, 10); | |
882 | static SENSOR_DEVICE_ATTR(in10_max, S_IRUGO | S_IWUSR, | |
883 | show_in0_max, set_in0_max, 10); | |
884 | static SENSOR_DEVICE_ATTR(in10_min, S_IRUGO | S_IWUSR, | |
885 | show_in0_min, set_in0_min, 10); | |
0e39e01c JD |
886 | |
887 | static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0); | |
888 | static SENSOR_DEVICE_ATTR(fan1_min, S_IRUGO | S_IWUSR, | |
889 | show_fan_min, set_fan_min, 0); | |
315c7113 JD |
890 | static SENSOR_DEVICE_ATTR(fan1_target, S_IRUGO | S_IWUSR, |
891 | show_fan_target, set_fan_target, 0); | |
0e39e01c JD |
892 | static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1); |
893 | static SENSOR_DEVICE_ATTR(fan2_min, S_IRUGO | S_IWUSR, | |
894 | show_fan_min, set_fan_min, 1); | |
315c7113 JD |
895 | static SENSOR_DEVICE_ATTR(fan2_target, S_IRUGO | S_IWUSR, |
896 | show_fan_target, set_fan_target, 1); | |
0e39e01c JD |
897 | static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2); |
898 | static SENSOR_DEVICE_ATTR(fan3_min, S_IRUGO | S_IWUSR, | |
899 | show_fan_min, set_fan_min, 2); | |
315c7113 JD |
900 | static SENSOR_DEVICE_ATTR(fan3_target, S_IRUGO | S_IWUSR, |
901 | show_fan_target, set_fan_target, 2); | |
0e39e01c JD |
902 | |
903 | static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_temp, NULL, 0); | |
904 | static SENSOR_DEVICE_ATTR(temp1_max, S_IRUGO | S_IWUSR, | |
905 | show_temp_max, set_temp_max, 0); | |
906 | static SENSOR_DEVICE_ATTR(temp1_max_hyst, S_IRUGO | S_IWUSR, | |
907 | show_temp_hyst, set_temp_hyst, 0); | |
908 | static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO, show_temp_type, NULL, 0); | |
909 | static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO, show_temp, NULL, 1); | |
910 | static SENSOR_DEVICE_ATTR(temp2_max, S_IRUGO | S_IWUSR, | |
911 | show_temp_max, set_temp_max, 1); | |
912 | static SENSOR_DEVICE_ATTR(temp2_max_hyst, S_IRUGO | S_IWUSR, | |
913 | show_temp_hyst, set_temp_hyst, 1); | |
914 | static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO, show_temp_type, NULL, 1); | |
915 | static SENSOR_DEVICE_ATTR(temp3_input, S_IRUGO, show_temp, NULL, 2); | |
916 | static SENSOR_DEVICE_ATTR(temp3_max, S_IRUGO | S_IWUSR, | |
917 | show_temp_max, set_temp_max, 2); | |
918 | static SENSOR_DEVICE_ATTR(temp3_max_hyst, S_IRUGO | S_IWUSR, | |
919 | show_temp_hyst, set_temp_hyst, 2); | |
920 | static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO, show_temp_type, NULL, 2); | |
921 | ||
95e35312 JD |
922 | /* pwm (value) files are created read-only, write permission is |
923 | then added or removed dynamically as needed */ | |
924 | static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO, show_pwm, set_pwm, 0); | |
925 | static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR, | |
926 | show_pwm_enable, set_pwm_enable, 0); | |
6e2bc17b JD |
927 | static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR, |
928 | show_pwm_freq, set_pwm_freq, 0); | |
e196783d | 929 | static SENSOR_DEVICE_ATTR(pwm1_mode, S_IRUGO, show_pwm_mode, NULL, 0); |
95e35312 JD |
930 | static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO, show_pwm, set_pwm, 1); |
931 | static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR, | |
932 | show_pwm_enable, set_pwm_enable, 1); | |
6e2bc17b JD |
933 | static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO | S_IWUSR, |
934 | show_pwm_freq, set_pwm_freq, 1); | |
e196783d | 935 | static SENSOR_DEVICE_ATTR(pwm2_mode, S_IRUGO, show_pwm_mode, NULL, 1); |
95e35312 JD |
936 | static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO, show_pwm, set_pwm, 2); |
937 | static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR, | |
938 | show_pwm_enable, set_pwm_enable, 2); | |
6e2bc17b JD |
939 | static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO | S_IWUSR, |
940 | show_pwm_freq, set_pwm_freq, 2); | |
e196783d | 941 | static SENSOR_DEVICE_ATTR(pwm3_mode, S_IRUGO, show_pwm_mode, NULL, 2); |
95e35312 | 942 | |
0e39e01c JD |
943 | static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0); |
944 | static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1); | |
945 | static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2); | |
946 | static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3); | |
947 | static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 4); | |
948 | static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 5); | |
949 | static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 6); | |
950 | static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 7); | |
951 | static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 8); | |
51c997d8 JD |
952 | static SENSOR_DEVICE_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 9); |
953 | static SENSOR_DEVICE_ATTR(in10_alarm, S_IRUGO, show_alarm, NULL, 10); | |
0e39e01c JD |
954 | static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 11); |
955 | static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 12); | |
956 | static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13); | |
957 | static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 16); | |
958 | static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 17); | |
959 | static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 18); | |
960 | static DEVICE_ATTR(alarms_in, S_IRUGO, show_alarms_in, NULL); | |
961 | static DEVICE_ATTR(alarms_fan, S_IRUGO, show_alarms_fan, NULL); | |
962 | static DEVICE_ATTR(alarms_temp, S_IRUGO, show_alarms_temp, NULL); | |
963 | ||
964 | static DEVICE_ATTR(name, S_IRUGO, show_name, NULL); | |
965 | ||
966 | static struct attribute *f71805f_attributes[] = { | |
51c997d8 JD |
967 | &sensor_dev_attr_in0_input.dev_attr.attr, |
968 | &sensor_dev_attr_in0_max.dev_attr.attr, | |
969 | &sensor_dev_attr_in0_min.dev_attr.attr, | |
0e39e01c JD |
970 | &sensor_dev_attr_in1_input.dev_attr.attr, |
971 | &sensor_dev_attr_in1_max.dev_attr.attr, | |
972 | &sensor_dev_attr_in1_min.dev_attr.attr, | |
973 | &sensor_dev_attr_in2_input.dev_attr.attr, | |
974 | &sensor_dev_attr_in2_max.dev_attr.attr, | |
975 | &sensor_dev_attr_in2_min.dev_attr.attr, | |
976 | &sensor_dev_attr_in3_input.dev_attr.attr, | |
977 | &sensor_dev_attr_in3_max.dev_attr.attr, | |
978 | &sensor_dev_attr_in3_min.dev_attr.attr, | |
0e39e01c JD |
979 | &sensor_dev_attr_in5_input.dev_attr.attr, |
980 | &sensor_dev_attr_in5_max.dev_attr.attr, | |
981 | &sensor_dev_attr_in5_min.dev_attr.attr, | |
982 | &sensor_dev_attr_in6_input.dev_attr.attr, | |
983 | &sensor_dev_attr_in6_max.dev_attr.attr, | |
984 | &sensor_dev_attr_in6_min.dev_attr.attr, | |
985 | &sensor_dev_attr_in7_input.dev_attr.attr, | |
986 | &sensor_dev_attr_in7_max.dev_attr.attr, | |
987 | &sensor_dev_attr_in7_min.dev_attr.attr, | |
0e39e01c | 988 | |
c7176cb5 JD |
989 | &sensor_dev_attr_fan1_input.dev_attr.attr, |
990 | &sensor_dev_attr_fan1_min.dev_attr.attr, | |
991 | &sensor_dev_attr_fan1_alarm.dev_attr.attr, | |
992 | &sensor_dev_attr_fan1_target.dev_attr.attr, | |
993 | &sensor_dev_attr_fan2_input.dev_attr.attr, | |
994 | &sensor_dev_attr_fan2_min.dev_attr.attr, | |
995 | &sensor_dev_attr_fan2_alarm.dev_attr.attr, | |
996 | &sensor_dev_attr_fan2_target.dev_attr.attr, | |
997 | &sensor_dev_attr_fan3_input.dev_attr.attr, | |
998 | &sensor_dev_attr_fan3_min.dev_attr.attr, | |
999 | &sensor_dev_attr_fan3_alarm.dev_attr.attr, | |
1000 | &sensor_dev_attr_fan3_target.dev_attr.attr, | |
1001 | ||
1002 | &sensor_dev_attr_pwm1.dev_attr.attr, | |
1003 | &sensor_dev_attr_pwm1_enable.dev_attr.attr, | |
1004 | &sensor_dev_attr_pwm1_mode.dev_attr.attr, | |
1005 | &sensor_dev_attr_pwm2.dev_attr.attr, | |
1006 | &sensor_dev_attr_pwm2_enable.dev_attr.attr, | |
1007 | &sensor_dev_attr_pwm2_mode.dev_attr.attr, | |
1008 | &sensor_dev_attr_pwm3.dev_attr.attr, | |
1009 | &sensor_dev_attr_pwm3_enable.dev_attr.attr, | |
1010 | &sensor_dev_attr_pwm3_mode.dev_attr.attr, | |
1011 | ||
0e39e01c JD |
1012 | &sensor_dev_attr_temp1_input.dev_attr.attr, |
1013 | &sensor_dev_attr_temp1_max.dev_attr.attr, | |
1014 | &sensor_dev_attr_temp1_max_hyst.dev_attr.attr, | |
1015 | &sensor_dev_attr_temp1_type.dev_attr.attr, | |
1016 | &sensor_dev_attr_temp2_input.dev_attr.attr, | |
1017 | &sensor_dev_attr_temp2_max.dev_attr.attr, | |
1018 | &sensor_dev_attr_temp2_max_hyst.dev_attr.attr, | |
1019 | &sensor_dev_attr_temp2_type.dev_attr.attr, | |
1020 | &sensor_dev_attr_temp3_input.dev_attr.attr, | |
1021 | &sensor_dev_attr_temp3_max.dev_attr.attr, | |
1022 | &sensor_dev_attr_temp3_max_hyst.dev_attr.attr, | |
1023 | &sensor_dev_attr_temp3_type.dev_attr.attr, | |
1024 | ||
1025 | &sensor_dev_attr_in0_alarm.dev_attr.attr, | |
1026 | &sensor_dev_attr_in1_alarm.dev_attr.attr, | |
1027 | &sensor_dev_attr_in2_alarm.dev_attr.attr, | |
1028 | &sensor_dev_attr_in3_alarm.dev_attr.attr, | |
0e39e01c JD |
1029 | &sensor_dev_attr_in5_alarm.dev_attr.attr, |
1030 | &sensor_dev_attr_in6_alarm.dev_attr.attr, | |
1031 | &sensor_dev_attr_in7_alarm.dev_attr.attr, | |
0e39e01c JD |
1032 | &dev_attr_alarms_in.attr, |
1033 | &sensor_dev_attr_temp1_alarm.dev_attr.attr, | |
1034 | &sensor_dev_attr_temp2_alarm.dev_attr.attr, | |
1035 | &sensor_dev_attr_temp3_alarm.dev_attr.attr, | |
1036 | &dev_attr_alarms_temp.attr, | |
1037 | &dev_attr_alarms_fan.attr, | |
1038 | ||
1039 | &dev_attr_name.attr, | |
1040 | NULL | |
2488a39d JD |
1041 | }; |
1042 | ||
0e39e01c JD |
1043 | static const struct attribute_group f71805f_group = { |
1044 | .attrs = f71805f_attributes, | |
2488a39d JD |
1045 | }; |
1046 | ||
51c997d8 JD |
1047 | static struct attribute *f71805f_attributes_optin[4][5] = { |
1048 | { | |
1049 | &sensor_dev_attr_in4_input.dev_attr.attr, | |
1050 | &sensor_dev_attr_in4_max.dev_attr.attr, | |
1051 | &sensor_dev_attr_in4_min.dev_attr.attr, | |
1052 | &sensor_dev_attr_in4_alarm.dev_attr.attr, | |
1053 | NULL | |
1054 | }, { | |
1055 | &sensor_dev_attr_in8_input.dev_attr.attr, | |
1056 | &sensor_dev_attr_in8_max.dev_attr.attr, | |
1057 | &sensor_dev_attr_in8_min.dev_attr.attr, | |
1058 | &sensor_dev_attr_in8_alarm.dev_attr.attr, | |
1059 | NULL | |
1060 | }, { | |
1061 | &sensor_dev_attr_in9_input.dev_attr.attr, | |
1062 | &sensor_dev_attr_in9_max.dev_attr.attr, | |
1063 | &sensor_dev_attr_in9_min.dev_attr.attr, | |
1064 | &sensor_dev_attr_in9_alarm.dev_attr.attr, | |
1065 | NULL | |
1066 | }, { | |
1067 | &sensor_dev_attr_in10_input.dev_attr.attr, | |
1068 | &sensor_dev_attr_in10_max.dev_attr.attr, | |
1069 | &sensor_dev_attr_in10_min.dev_attr.attr, | |
1070 | &sensor_dev_attr_in10_alarm.dev_attr.attr, | |
1071 | NULL | |
1072 | } | |
1073 | }; | |
1074 | ||
1075 | static const struct attribute_group f71805f_group_optin[4] = { | |
1076 | { .attrs = f71805f_attributes_optin[0] }, | |
1077 | { .attrs = f71805f_attributes_optin[1] }, | |
1078 | { .attrs = f71805f_attributes_optin[2] }, | |
1079 | { .attrs = f71805f_attributes_optin[3] }, | |
1080 | }; | |
1081 | ||
e196783d JD |
1082 | /* We don't include pwm_freq files in the arrays above, because they must be |
1083 | created conditionally (only if pwm_mode is 1 == PWM) */ | |
1084 | static struct attribute *f71805f_attributes_pwm_freq[] = { | |
1085 | &sensor_dev_attr_pwm1_freq.dev_attr.attr, | |
1086 | &sensor_dev_attr_pwm2_freq.dev_attr.attr, | |
1087 | &sensor_dev_attr_pwm3_freq.dev_attr.attr, | |
1088 | NULL | |
1089 | }; | |
1090 | ||
1091 | static const struct attribute_group f71805f_group_pwm_freq = { | |
1092 | .attrs = f71805f_attributes_pwm_freq, | |
1093 | }; | |
1094 | ||
95e35312 JD |
1095 | /* We also need an indexed access to pwmN files to toggle writability */ |
1096 | static struct attribute *f71805f_attr_pwm[] = { | |
1097 | &sensor_dev_attr_pwm1.dev_attr.attr, | |
1098 | &sensor_dev_attr_pwm2.dev_attr.attr, | |
1099 | &sensor_dev_attr_pwm3.dev_attr.attr, | |
1100 | }; | |
1101 | ||
e53004e2 JD |
1102 | /* |
1103 | * Device registration and initialization | |
1104 | */ | |
1105 | ||
1106 | static void __devinit f71805f_init_device(struct f71805f_data *data) | |
1107 | { | |
1108 | u8 reg; | |
1109 | int i; | |
1110 | ||
1111 | reg = f71805f_read8(data, F71805F_REG_START); | |
1112 | if ((reg & 0x41) != 0x01) { | |
1113 | printk(KERN_DEBUG DRVNAME ": Starting monitoring " | |
1114 | "operations\n"); | |
1115 | f71805f_write8(data, F71805F_REG_START, (reg | 0x01) & ~0x40); | |
1116 | } | |
1117 | ||
1118 | /* Fan monitoring can be disabled. If it is, we won't be polling | |
1119 | the register values, and won't create the related sysfs files. */ | |
1120 | for (i = 0; i < 3; i++) { | |
6b14a546 JD |
1121 | data->fan_ctrl[i] = f71805f_read8(data, |
1122 | F71805F_REG_FAN_CTRL(i)); | |
315c7113 JD |
1123 | /* Clear latch full bit, else "speed mode" fan speed control |
1124 | doesn't work */ | |
1125 | if (data->fan_ctrl[i] & FAN_CTRL_LATCH_FULL) { | |
1126 | data->fan_ctrl[i] &= ~FAN_CTRL_LATCH_FULL; | |
1127 | f71805f_write8(data, F71805F_REG_FAN_CTRL(i), | |
1128 | data->fan_ctrl[i]); | |
1129 | } | |
e53004e2 JD |
1130 | } |
1131 | } | |
1132 | ||
1133 | static int __devinit f71805f_probe(struct platform_device *pdev) | |
1134 | { | |
51c997d8 | 1135 | struct f71805f_sio_data *sio_data = pdev->dev.platform_data; |
e53004e2 JD |
1136 | struct f71805f_data *data; |
1137 | struct resource *res; | |
2488a39d | 1138 | int i, err; |
e53004e2 | 1139 | |
51c997d8 JD |
1140 | static const char *names[] = { |
1141 | "f71805f", | |
1142 | "f71872f", | |
1143 | }; | |
1144 | ||
e53004e2 JD |
1145 | if (!(data = kzalloc(sizeof(struct f71805f_data), GFP_KERNEL))) { |
1146 | err = -ENOMEM; | |
1147 | printk(KERN_ERR DRVNAME ": Out of memory\n"); | |
1148 | goto exit; | |
1149 | } | |
1150 | ||
1151 | res = platform_get_resource(pdev, IORESOURCE_IO, 0); | |
1152 | data->addr = res->start; | |
f0819184 | 1153 | mutex_init(&data->lock); |
51c997d8 | 1154 | data->name = names[sio_data->kind]; |
f0819184 | 1155 | mutex_init(&data->update_lock); |
e53004e2 JD |
1156 | |
1157 | platform_set_drvdata(pdev, data); | |
1158 | ||
51c997d8 JD |
1159 | /* Some voltage inputs depend on chip model and configuration */ |
1160 | switch (sio_data->kind) { | |
1161 | case f71805f: | |
1162 | data->has_in = 0x1ff; | |
1163 | break; | |
1164 | case f71872f: | |
1165 | data->has_in = 0x6ef; | |
1166 | if (sio_data->fnsel1 & 0x01) | |
1167 | data->has_in |= (1 << 4); /* in4 */ | |
1168 | if (sio_data->fnsel1 & 0x02) | |
1169 | data->has_in |= (1 << 8); /* in8 */ | |
1170 | break; | |
1171 | } | |
1172 | ||
e53004e2 JD |
1173 | /* Initialize the F71805F chip */ |
1174 | f71805f_init_device(data); | |
1175 | ||
1176 | /* Register sysfs interface files */ | |
0e39e01c JD |
1177 | if ((err = sysfs_create_group(&pdev->dev.kobj, &f71805f_group))) |
1178 | goto exit_free; | |
51c997d8 JD |
1179 | if (data->has_in & (1 << 4)) { /* in4 */ |
1180 | if ((err = sysfs_create_group(&pdev->dev.kobj, | |
1181 | &f71805f_group_optin[0]))) | |
1182 | goto exit_remove_files; | |
1183 | } | |
1184 | if (data->has_in & (1 << 8)) { /* in8 */ | |
1185 | if ((err = sysfs_create_group(&pdev->dev.kobj, | |
1186 | &f71805f_group_optin[1]))) | |
1187 | goto exit_remove_files; | |
1188 | } | |
1189 | if (data->has_in & (1 << 9)) { /* in9 (F71872F/FG only) */ | |
1190 | if ((err = sysfs_create_group(&pdev->dev.kobj, | |
1191 | &f71805f_group_optin[2]))) | |
1192 | goto exit_remove_files; | |
1193 | } | |
1194 | if (data->has_in & (1 << 10)) { /* in9 (F71872F/FG only) */ | |
1195 | if ((err = sysfs_create_group(&pdev->dev.kobj, | |
1196 | &f71805f_group_optin[3]))) | |
1197 | goto exit_remove_files; | |
1198 | } | |
0e39e01c | 1199 | for (i = 0; i < 3; i++) { |
e196783d JD |
1200 | /* If control mode is PWM, create pwm_freq file */ |
1201 | if (!(data->fan_ctrl[i] & FAN_CTRL_DC_MODE)) { | |
1202 | if ((err = sysfs_create_file(&pdev->dev.kobj, | |
1203 | f71805f_attributes_pwm_freq[i]))) | |
1204 | goto exit_remove_files; | |
1205 | } | |
95e35312 JD |
1206 | /* If PWM is in manual mode, add write permission */ |
1207 | if (data->fan_ctrl[i] & FAN_CTRL_MODE_MANUAL) { | |
1208 | if ((err = sysfs_chmod_file(&pdev->dev.kobj, | |
1209 | f71805f_attr_pwm[i], | |
1210 | S_IRUGO | S_IWUSR))) { | |
1211 | dev_err(&pdev->dev, "chmod +w pwm%d failed\n", | |
1212 | i + 1); | |
1213 | goto exit_remove_files; | |
1214 | } | |
1215 | } | |
0e39e01c JD |
1216 | } |
1217 | ||
1218 | data->class_dev = hwmon_device_register(&pdev->dev); | |
1219 | if (IS_ERR(data->class_dev)) { | |
1220 | err = PTR_ERR(data->class_dev); | |
1221 | dev_err(&pdev->dev, "Class registration failed (%d)\n", err); | |
1222 | goto exit_remove_files; | |
e53004e2 | 1223 | } |
e53004e2 JD |
1224 | |
1225 | return 0; | |
1226 | ||
0e39e01c JD |
1227 | exit_remove_files: |
1228 | sysfs_remove_group(&pdev->dev.kobj, &f71805f_group); | |
51c997d8 JD |
1229 | for (i = 0; i < 4; i++) |
1230 | sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_optin[i]); | |
e196783d | 1231 | sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_pwm_freq); |
e53004e2 | 1232 | exit_free: |
0e39e01c | 1233 | platform_set_drvdata(pdev, NULL); |
e53004e2 JD |
1234 | kfree(data); |
1235 | exit: | |
1236 | return err; | |
1237 | } | |
1238 | ||
1239 | static int __devexit f71805f_remove(struct platform_device *pdev) | |
1240 | { | |
1241 | struct f71805f_data *data = platform_get_drvdata(pdev); | |
0e39e01c | 1242 | int i; |
e53004e2 JD |
1243 | |
1244 | platform_set_drvdata(pdev, NULL); | |
1245 | hwmon_device_unregister(data->class_dev); | |
0e39e01c | 1246 | sysfs_remove_group(&pdev->dev.kobj, &f71805f_group); |
51c997d8 JD |
1247 | for (i = 0; i < 4; i++) |
1248 | sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_optin[i]); | |
e196783d | 1249 | sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_pwm_freq); |
e53004e2 JD |
1250 | kfree(data); |
1251 | ||
1252 | return 0; | |
1253 | } | |
1254 | ||
1255 | static struct platform_driver f71805f_driver = { | |
1256 | .driver = { | |
1257 | .owner = THIS_MODULE, | |
1258 | .name = DRVNAME, | |
1259 | }, | |
1260 | .probe = f71805f_probe, | |
1261 | .remove = __devexit_p(f71805f_remove), | |
1262 | }; | |
1263 | ||
51c997d8 JD |
1264 | static int __init f71805f_device_add(unsigned short address, |
1265 | const struct f71805f_sio_data *sio_data) | |
e53004e2 | 1266 | { |
568825c8 JD |
1267 | struct resource res = { |
1268 | .start = address, | |
1269 | .end = address + REGION_LENGTH - 1, | |
1270 | .flags = IORESOURCE_IO, | |
1271 | }; | |
e53004e2 JD |
1272 | int err; |
1273 | ||
1274 | pdev = platform_device_alloc(DRVNAME, address); | |
1275 | if (!pdev) { | |
1276 | err = -ENOMEM; | |
1277 | printk(KERN_ERR DRVNAME ": Device allocation failed\n"); | |
1278 | goto exit; | |
1279 | } | |
1280 | ||
568825c8 JD |
1281 | res.name = pdev->name; |
1282 | err = platform_device_add_resources(pdev, &res, 1); | |
e53004e2 JD |
1283 | if (err) { |
1284 | printk(KERN_ERR DRVNAME ": Device resource addition failed " | |
1285 | "(%d)\n", err); | |
1286 | goto exit_device_put; | |
1287 | } | |
1288 | ||
51c997d8 JD |
1289 | pdev->dev.platform_data = kmalloc(sizeof(struct f71805f_sio_data), |
1290 | GFP_KERNEL); | |
1291 | if (!pdev->dev.platform_data) { | |
1292 | err = -ENOMEM; | |
1293 | printk(KERN_ERR DRVNAME ": Platform data allocation failed\n"); | |
1294 | goto exit_device_put; | |
1295 | } | |
1296 | memcpy(pdev->dev.platform_data, sio_data, | |
1297 | sizeof(struct f71805f_sio_data)); | |
1298 | ||
e53004e2 JD |
1299 | err = platform_device_add(pdev); |
1300 | if (err) { | |
1301 | printk(KERN_ERR DRVNAME ": Device addition failed (%d)\n", | |
1302 | err); | |
51c997d8 | 1303 | goto exit_kfree_data; |
e53004e2 JD |
1304 | } |
1305 | ||
1306 | return 0; | |
1307 | ||
51c997d8 JD |
1308 | exit_kfree_data: |
1309 | kfree(pdev->dev.platform_data); | |
1310 | pdev->dev.platform_data = NULL; | |
e53004e2 JD |
1311 | exit_device_put: |
1312 | platform_device_put(pdev); | |
1313 | exit: | |
1314 | return err; | |
1315 | } | |
1316 | ||
51c997d8 JD |
1317 | static int __init f71805f_find(int sioaddr, unsigned short *address, |
1318 | struct f71805f_sio_data *sio_data) | |
e53004e2 JD |
1319 | { |
1320 | int err = -ENODEV; | |
1321 | u16 devid; | |
1322 | ||
51c997d8 JD |
1323 | static const char *names[] = { |
1324 | "F71805F/FG", | |
1325 | "F71872F/FG", | |
1326 | }; | |
1327 | ||
e53004e2 JD |
1328 | superio_enter(sioaddr); |
1329 | ||
1330 | devid = superio_inw(sioaddr, SIO_REG_MANID); | |
1331 | if (devid != SIO_FINTEK_ID) | |
1332 | goto exit; | |
1333 | ||
1334 | devid = superio_inw(sioaddr, SIO_REG_DEVID); | |
51c997d8 JD |
1335 | switch (devid) { |
1336 | case SIO_F71805F_ID: | |
1337 | sio_data->kind = f71805f; | |
1338 | break; | |
1339 | case SIO_F71872F_ID: | |
1340 | sio_data->kind = f71872f; | |
1341 | sio_data->fnsel1 = superio_inb(sioaddr, SIO_REG_FNSEL1); | |
1342 | break; | |
1343 | default: | |
e53004e2 JD |
1344 | printk(KERN_INFO DRVNAME ": Unsupported Fintek device, " |
1345 | "skipping\n"); | |
1346 | goto exit; | |
1347 | } | |
1348 | ||
1349 | superio_select(sioaddr, F71805F_LD_HWM); | |
1350 | if (!(superio_inb(sioaddr, SIO_REG_ENABLE) & 0x01)) { | |
1351 | printk(KERN_WARNING DRVNAME ": Device not activated, " | |
1352 | "skipping\n"); | |
1353 | goto exit; | |
1354 | } | |
1355 | ||
1356 | *address = superio_inw(sioaddr, SIO_REG_ADDR); | |
1357 | if (*address == 0) { | |
1358 | printk(KERN_WARNING DRVNAME ": Base address not set, " | |
1359 | "skipping\n"); | |
1360 | goto exit; | |
1361 | } | |
1362 | ||
1363 | err = 0; | |
51c997d8 JD |
1364 | printk(KERN_INFO DRVNAME ": Found %s chip at %#x, revision %u\n", |
1365 | names[sio_data->kind], *address, | |
1366 | superio_inb(sioaddr, SIO_REG_DEVREV)); | |
e53004e2 JD |
1367 | |
1368 | exit: | |
1369 | superio_exit(sioaddr); | |
1370 | return err; | |
1371 | } | |
1372 | ||
1373 | static int __init f71805f_init(void) | |
1374 | { | |
1375 | int err; | |
1376 | unsigned short address; | |
51c997d8 | 1377 | struct f71805f_sio_data sio_data; |
e53004e2 | 1378 | |
51c997d8 JD |
1379 | if (f71805f_find(0x2e, &address, &sio_data) |
1380 | && f71805f_find(0x4e, &address, &sio_data)) | |
e53004e2 JD |
1381 | return -ENODEV; |
1382 | ||
1383 | err = platform_driver_register(&f71805f_driver); | |
1384 | if (err) | |
1385 | goto exit; | |
1386 | ||
1387 | /* Sets global pdev as a side effect */ | |
51c997d8 | 1388 | err = f71805f_device_add(address, &sio_data); |
e53004e2 JD |
1389 | if (err) |
1390 | goto exit_driver; | |
1391 | ||
1392 | return 0; | |
1393 | ||
1394 | exit_driver: | |
1395 | platform_driver_unregister(&f71805f_driver); | |
1396 | exit: | |
1397 | return err; | |
1398 | } | |
1399 | ||
1400 | static void __exit f71805f_exit(void) | |
1401 | { | |
51c997d8 JD |
1402 | kfree(pdev->dev.platform_data); |
1403 | pdev->dev.platform_data = NULL; | |
e53004e2 | 1404 | platform_device_unregister(pdev); |
51c997d8 | 1405 | |
e53004e2 JD |
1406 | platform_driver_unregister(&f71805f_driver); |
1407 | } | |
1408 | ||
1409 | MODULE_AUTHOR("Jean Delvare <khali@linux-fr>"); | |
1410 | MODULE_LICENSE("GPL"); | |
51c997d8 | 1411 | MODULE_DESCRIPTION("F71805F/F71872F hardware monitoring driver"); |
e53004e2 JD |
1412 | |
1413 | module_init(f71805f_init); | |
1414 | module_exit(f71805f_exit); |