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hwmon: (f71882fg) Remove the fan_mode module option
[mirror_ubuntu-bionic-kernel.git] / drivers / hwmon / f71882fg.c
CommitLineData
45fb3669
HG		 1/***************************************************************************
2 * Copyright (C) 2006 by Hans Edgington <hans@edgington.nl> *
c13548c5 3 * Copyright (C) 2007,2008 by Hans de Goede <hdegoede@redhat.com> *
45fb3669
HG		 4 * *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
9 * *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
14 * *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program; if not, write to the *
17 * Free Software Foundation, Inc., *
18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
19 ***************************************************************************/
20
21#include <linux/module.h>
22#include <linux/init.h>
23#include <linux/slab.h>
24#include <linux/jiffies.h>
25#include <linux/platform_device.h>
26#include <linux/hwmon.h>
27#include <linux/hwmon-sysfs.h>
28#include <linux/err.h>
29#include <linux/mutex.h>
77a4a3e2 30#include <linux/io.h>
45fb3669
HG		 31
32#define DRVNAME "f71882fg"
33
77a4a3e2 34#define SIO_F71882FG_LD_HWM 0x04 /* Hardware monitor logical device */
45fb3669
HG		 35#define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */
36#define SIO_LOCK_KEY 0xAA /* Key to diasble Super-I/O */
37
38#define SIO_REG_LDSEL 0x07 /* Logical device select */
39#define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
40#define SIO_REG_DEVREV 0x22 /* Device revision */
41#define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */
42#define SIO_REG_ENABLE 0x30 /* Logical device enable */
43#define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
44
45#define SIO_FINTEK_ID 0x1934 /* Manufacturers ID */
498be968 46#define SIO_F71862_ID 0x0601 /* Chipset ID */
45fb3669
HG		 47#define SIO_F71882_ID 0x0541 /* Chipset ID */
48
49#define REGION_LENGTH 8
50#define ADDR_REG_OFFSET 5
51#define DATA_REG_OFFSET 6
52
53#define F71882FG_REG_PECI 0x0A
54
498be968
HG		 55#define F71882FG_REG_IN_STATUS 0x12 /* f71882fg only */
56#define F71882FG_REG_IN_BEEP 0x13 /* f71882fg only */
45fb3669 57#define F71882FG_REG_IN(nr) (0x20 + (nr))
498be968 58#define F71882FG_REG_IN1_HIGH 0x32 /* f71882fg only */
45fb3669
HG		 59
60#define F71882FG_REG_FAN(nr) (0xA0 + (16 * (nr)))
9ab796eb
MD		 61#define F71882FG_REG_FAN_TARGET(nr) (0xA2 + (16 * (nr)))
62#define F71882FG_REG_FAN_FULL_SPEED(nr) (0xA4 + (16 * (nr)))
45fb3669
HG		 63#define F71882FG_REG_FAN_STATUS 0x92
64#define F71882FG_REG_FAN_BEEP 0x93
65
7567a043
HG		 66#define F71882FG_REG_TEMP(nr) (0x70 + 2 * (nr))
67#define F71882FG_REG_TEMP_OVT(nr) (0x80 + 2 * (nr))
68#define F71882FG_REG_TEMP_HIGH(nr) (0x81 + 2 * (nr))
45fb3669
HG		 69#define F71882FG_REG_TEMP_STATUS 0x62
70#define F71882FG_REG_TEMP_BEEP 0x63
bc27490f 71#define F71882FG_REG_TEMP_HYST(nr) (0x6C + (nr))
45fb3669
HG		 72#define F71882FG_REG_TEMP_TYPE 0x6B
73#define F71882FG_REG_TEMP_DIODE_OPEN 0x6F
74
9ab796eb
MD		 75#define F71882FG_REG_PWM(nr) (0xA3 + (16 * (nr)))
76#define F71882FG_REG_PWM_TYPE 0x94
77#define F71882FG_REG_PWM_ENABLE 0x96
78
bc27490f 79#define F71882FG_REG_FAN_HYST(nr) (0x98 + (nr))
9ab796eb
MD		 80
81#define F71882FG_REG_POINT_PWM(pwm, point) (0xAA + (point) + (16 * (pwm)))
82#define F71882FG_REG_POINT_TEMP(pwm, point) (0xA6 + (point) + (16 * (pwm)))
83#define F71882FG_REG_POINT_MAPPING(nr) (0xAF + 16 * (nr))
84
45fb3669
HG		 85#define F71882FG_REG_START 0x01
86
87#define FAN_MIN_DETECT 366 /* Lowest detectable fanspeed */
88
67b671bc
JD		 89static unsigned short force_id;
90module_param(force_id, ushort, 0);
91MODULE_PARM_DESC(force_id, "Override the detected device ID");
92
498be968
HG		 93enum chips { f71862fg, f71882fg };
94
95static const char *f71882fg_names[] = {
96 "f71862fg",
97 "f71882fg",
98};
99
77a4a3e2 100static struct platform_device *f71882fg_pdev;
45fb3669
HG		 101
102/* Super-I/O Function prototypes */
103static inline int superio_inb(int base, int reg);
104static inline int superio_inw(int base, int reg);
105static inline void superio_enter(int base);
106static inline void superio_select(int base, int ld);
107static inline void superio_exit(int base);
108
498be968
HG		 109struct f71882fg_sio_data {
110 enum chips type;
111};
112
45fb3669
HG		 113struct f71882fg_data {
114 unsigned short addr;
498be968 115 enum chips type;
1beeffe4 116 struct device *hwmon_dev;
45fb3669
HG		 117
118 struct mutex update_lock;
119 char valid; /* !=0 if following fields are valid */
120 unsigned long last_updated; /* In jiffies */
121 unsigned long last_limits; /* In jiffies */
122
123 /* Register Values */
124 u8 in[9];
125 u8 in1_max;
126 u8 in_status;
127 u8 in_beep;
128 u16 fan[4];
9ab796eb
MD		 129 u16 fan_target[4];
130 u16 fan_full_speed[4];
45fb3669
HG		 131 u8 fan_status;
132 u8 fan_beep;
7567a043
HG		 133 /* Note: all models have only 3 temperature channels, but on some
134 they are addressed as 0-2 and on others as 1-3, so for coding
135 convenience we reserve space for 4 channels */
136 u8 temp[4];
137 u8 temp_ovt[4];
138 u8 temp_high[4];
bc27490f 139 u8 temp_hyst[2]; /* 2 hysts stored per reg */
7567a043 140 u8 temp_type[4];
45fb3669
HG		 141 u8 temp_status;
142 u8 temp_beep;
143 u8 temp_diode_open;
9ab796eb
MD		 144 u8 pwm[4];
145 u8 pwm_enable;
146 u8 pwm_auto_point_hyst[2];
147 u8 pwm_auto_point_mapping[4];
148 u8 pwm_auto_point_pwm[4][5];
149 u8 pwm_auto_point_temp[4][4];
45fb3669
HG		 150};
151
77a4a3e2 152/* Sysfs in */
45fb3669
HG		 153static ssize_t show_in(struct device *dev, struct device_attribute *devattr,
154 char *buf);
155static ssize_t show_in_max(struct device *dev, struct device_attribute
156 *devattr, char *buf);
157static ssize_t store_in_max(struct device *dev, struct device_attribute
158 *devattr, const char *buf, size_t count);
159static ssize_t show_in_beep(struct device *dev, struct device_attribute
160 *devattr, char *buf);
161static ssize_t store_in_beep(struct device *dev, struct device_attribute
162 *devattr, const char *buf, size_t count);
163static ssize_t show_in_alarm(struct device *dev, struct device_attribute
164 *devattr, char *buf);
165/* Sysfs Fan */
166static ssize_t show_fan(struct device *dev, struct device_attribute *devattr,
167 char *buf);
9ab796eb
MD		 168static ssize_t show_fan_full_speed(struct device *dev,
169 struct device_attribute *devattr, char *buf);
170static ssize_t store_fan_full_speed(struct device *dev,
171 struct device_attribute *devattr, const char *buf, size_t count);
45fb3669
HG		 172static ssize_t show_fan_beep(struct device *dev, struct device_attribute
173 *devattr, char *buf);
174static ssize_t store_fan_beep(struct device *dev, struct device_attribute
175 *devattr, const char *buf, size_t count);
176static ssize_t show_fan_alarm(struct device *dev, struct device_attribute
177 *devattr, char *buf);
178/* Sysfs Temp */
179static ssize_t show_temp(struct device *dev, struct device_attribute
180 *devattr, char *buf);
181static ssize_t show_temp_max(struct device *dev, struct device_attribute
182 *devattr, char *buf);
183static ssize_t store_temp_max(struct device *dev, struct device_attribute
184 *devattr, const char *buf, size_t count);
185static ssize_t show_temp_max_hyst(struct device *dev, struct device_attribute
186 *devattr, char *buf);
187static ssize_t store_temp_max_hyst(struct device *dev, struct device_attribute
188 *devattr, const char *buf, size_t count);
189static ssize_t show_temp_crit(struct device *dev, struct device_attribute
190 *devattr, char *buf);
191static ssize_t store_temp_crit(struct device *dev, struct device_attribute
192 *devattr, const char *buf, size_t count);
193static ssize_t show_temp_crit_hyst(struct device *dev, struct device_attribute
194 *devattr, char *buf);
195static ssize_t show_temp_type(struct device *dev, struct device_attribute
196 *devattr, char *buf);
197static ssize_t show_temp_beep(struct device *dev, struct device_attribute
198 *devattr, char *buf);
199static ssize_t store_temp_beep(struct device *dev, struct device_attribute
200 *devattr, const char *buf, size_t count);
201static ssize_t show_temp_alarm(struct device *dev, struct device_attribute
202 *devattr, char *buf);
203static ssize_t show_temp_fault(struct device *dev, struct device_attribute
204 *devattr, char *buf);
9ab796eb
MD		 205/* PWM and Auto point control */
206static ssize_t show_pwm(struct device *dev, struct device_attribute *devattr,
207 char *buf);
208static ssize_t store_pwm(struct device *dev, struct device_attribute *devattr,
209 const char *buf, size_t count);
210static ssize_t show_pwm_enable(struct device *dev,
211 struct device_attribute *devattr, char *buf);
212static ssize_t store_pwm_enable(struct device *dev,
213 struct device_attribute *devattr, const char *buf, size_t count);
214static ssize_t show_pwm_interpolate(struct device *dev,
215 struct device_attribute *devattr, char *buf);
216static ssize_t store_pwm_interpolate(struct device *dev,
217 struct device_attribute *devattr, const char *buf, size_t count);
218static ssize_t show_pwm_auto_point_channel(struct device *dev,
219 struct device_attribute *devattr, char *buf);
220static ssize_t store_pwm_auto_point_channel(struct device *dev,
221 struct device_attribute *devattr, const char *buf, size_t count);
222static ssize_t show_pwm_auto_point_temp_hyst(struct device *dev,
223 struct device_attribute *devattr, char *buf);
224static ssize_t store_pwm_auto_point_temp_hyst(struct device *dev,
225 struct device_attribute *devattr, const char *buf, size_t count);
226static ssize_t show_pwm_auto_point_pwm(struct device *dev,
227 struct device_attribute *devattr, char *buf);
228static ssize_t store_pwm_auto_point_pwm(struct device *dev,
229 struct device_attribute *devattr, const char *buf, size_t count);
230static ssize_t show_pwm_auto_point_temp(struct device *dev,
231 struct device_attribute *devattr, char *buf);
232static ssize_t store_pwm_auto_point_temp(struct device *dev,
233 struct device_attribute *devattr, const char *buf, size_t count);
45fb3669
HG		 234/* Sysfs misc */
235static ssize_t show_name(struct device *dev, struct device_attribute *devattr,
236 char *buf);
237
238static int __devinit f71882fg_probe(struct platform_device * pdev);
c13548c5 239static int f71882fg_remove(struct platform_device *pdev);
45fb3669
HG		 240
241static struct platform_driver f71882fg_driver = {
242 .driver = {
243 .owner = THIS_MODULE,
244 .name = DRVNAME,
245 },
246 .probe = f71882fg_probe,
247 .remove = __devexit_p(f71882fg_remove),
248};
249
c13548c5 250static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
45fb3669 251
498be968 252static struct sensor_device_attribute_2 f718x2fg_in_temp_attr[] = {
bc37ae71
MD		 253 SENSOR_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0),
254 SENSOR_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 0, 1),
bc37ae71
MD		 255 SENSOR_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 0, 2),
256 SENSOR_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 0, 3),
257 SENSOR_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 0, 4),
258 SENSOR_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 0, 5),
259 SENSOR_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 0, 6),
260 SENSOR_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 0, 7),
261 SENSOR_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 0, 8),
7567a043 262 SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 1),
bc37ae71 263 SENSOR_ATTR_2(temp1_max, S_IRUGO|S_IWUSR, show_temp_max,
7567a043 264 store_temp_max, 0, 1),
bc37ae71 265 SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
7567a043 266 store_temp_max_hyst, 0, 1),
754a5907
HG		 267 /* Should really be temp1_max_alarm, but older versions did not handle
268 the max and crit alarms separately and lm_sensors v2 depends on the
269 presence of temp#_alarm files. The same goes for temp2/3 _alarm. */
270 SENSOR_ATTR_2(temp1_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 1),
271 SENSOR_ATTR_2(temp1_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
272 store_temp_beep, 0, 1),
bc37ae71 273 SENSOR_ATTR_2(temp1_crit, S_IRUGO|S_IWUSR, show_temp_crit,
7567a043 274 store_temp_crit, 0, 1),
bc37ae71 275 SENSOR_ATTR_2(temp1_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
7567a043 276 0, 1),
754a5907
HG		 277 SENSOR_ATTR_2(temp1_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 5),
278 SENSOR_ATTR_2(temp1_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
279 store_temp_beep, 0, 5),
7567a043 280 SENSOR_ATTR_2(temp1_type, S_IRUGO, show_temp_type, NULL, 0, 1),
7567a043
HG		 281 SENSOR_ATTR_2(temp1_fault, S_IRUGO, show_temp_fault, NULL, 0, 1),
282 SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 2),
bc37ae71 283 SENSOR_ATTR_2(temp2_max, S_IRUGO|S_IWUSR, show_temp_max,
7567a043 284 store_temp_max, 0, 2),
bc37ae71 285 SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
7567a043 286 store_temp_max_hyst, 0, 2),
754a5907
HG		 287 /* Should be temp2_max_alarm, see temp1_alarm note */
288 SENSOR_ATTR_2(temp2_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 2),
289 SENSOR_ATTR_2(temp2_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
290 store_temp_beep, 0, 2),
bc37ae71 291 SENSOR_ATTR_2(temp2_crit, S_IRUGO|S_IWUSR, show_temp_crit,
7567a043 292 store_temp_crit, 0, 2),
bc37ae71 293 SENSOR_ATTR_2(temp2_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
7567a043 294 0, 2),
754a5907
HG		 295 SENSOR_ATTR_2(temp2_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 6),
296 SENSOR_ATTR_2(temp2_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
297 store_temp_beep, 0, 6),
7567a043 298 SENSOR_ATTR_2(temp2_type, S_IRUGO, show_temp_type, NULL, 0, 2),
7567a043
HG		 299 SENSOR_ATTR_2(temp2_fault, S_IRUGO, show_temp_fault, NULL, 0, 2),
300 SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 3),
bc37ae71 301 SENSOR_ATTR_2(temp3_max, S_IRUGO|S_IWUSR, show_temp_max,
7567a043 302 store_temp_max, 0, 3),
bc37ae71 303 SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
7567a043 304 store_temp_max_hyst, 0, 3),
754a5907
HG		 305 /* Should be temp3_max_alarm, see temp1_alarm note */
306 SENSOR_ATTR_2(temp3_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 3),
307 SENSOR_ATTR_2(temp3_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
308 store_temp_beep, 0, 3),
bc37ae71 309 SENSOR_ATTR_2(temp3_crit, S_IRUGO|S_IWUSR, show_temp_crit,
7567a043 310 store_temp_crit, 0, 3),
bc37ae71 311 SENSOR_ATTR_2(temp3_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
7567a043 312 0, 3),
754a5907
HG		 313 SENSOR_ATTR_2(temp3_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 7),
314 SENSOR_ATTR_2(temp3_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
315 store_temp_beep, 0, 7),
7567a043 316 SENSOR_ATTR_2(temp3_type, S_IRUGO, show_temp_type, NULL, 0, 3),
7567a043 317 SENSOR_ATTR_2(temp3_fault, S_IRUGO, show_temp_fault, NULL, 0, 3),
45fb3669
HG		 318};
319
498be968
HG		 320static struct sensor_device_attribute_2 f71882fg_in_temp_attr[] = {
321 SENSOR_ATTR_2(in1_max, S_IRUGO|S_IWUSR, show_in_max, store_in_max,
322 0, 1),
323 SENSOR_ATTR_2(in1_beep, S_IRUGO|S_IWUSR, show_in_beep, store_in_beep,
324 0, 1),
325 SENSOR_ATTR_2(in1_alarm, S_IRUGO, show_in_alarm, NULL, 0, 1),
326};
327
328static struct sensor_device_attribute_2 f718x2fg_fan_attr[] = {
bc37ae71 329 SENSOR_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0),
9ab796eb
MD		 330 SENSOR_ATTR_2(fan1_full_speed, S_IRUGO|S_IWUSR,
331 show_fan_full_speed,
332 store_fan_full_speed, 0, 0),
bc37ae71
MD		 333 SENSOR_ATTR_2(fan1_beep, S_IRUGO|S_IWUSR, show_fan_beep,
334 store_fan_beep, 0, 0),
335 SENSOR_ATTR_2(fan1_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 0),
336 SENSOR_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 0, 1),
9ab796eb
MD		 337 SENSOR_ATTR_2(fan2_full_speed, S_IRUGO|S_IWUSR,
338 show_fan_full_speed,
339 store_fan_full_speed, 0, 1),
bc37ae71
MD		 340 SENSOR_ATTR_2(fan2_beep, S_IRUGO|S_IWUSR, show_fan_beep,
341 store_fan_beep, 0, 1),
342 SENSOR_ATTR_2(fan2_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 1),
343 SENSOR_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 0, 2),
9ab796eb
MD		 344 SENSOR_ATTR_2(fan3_full_speed, S_IRUGO|S_IWUSR,
345 show_fan_full_speed,
346 store_fan_full_speed, 0, 2),
bc37ae71
MD		 347 SENSOR_ATTR_2(fan3_beep, S_IRUGO|S_IWUSR, show_fan_beep,
348 store_fan_beep, 0, 2),
349 SENSOR_ATTR_2(fan3_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 2),
9ab796eb
MD		 350
351 SENSOR_ATTR_2(pwm1, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 0),
352 SENSOR_ATTR_2(pwm1_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
353 store_pwm_enable, 0, 0),
354 SENSOR_ATTR_2(pwm1_interpolate, S_IRUGO|S_IWUSR,
355 show_pwm_interpolate, store_pwm_interpolate, 0, 0),
356 SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR,
357 show_pwm_auto_point_channel,
358 store_pwm_auto_point_channel, 0, 0),
498be968
HG		 359
360 SENSOR_ATTR_2(pwm2, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 1),
361 SENSOR_ATTR_2(pwm2_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
362 store_pwm_enable, 0, 1),
363 SENSOR_ATTR_2(pwm2_interpolate, S_IRUGO|S_IWUSR,
364 show_pwm_interpolate, store_pwm_interpolate, 0, 1),
365 SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR,
366 show_pwm_auto_point_channel,
367 store_pwm_auto_point_channel, 0, 1),
368
369 SENSOR_ATTR_2(pwm3, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 2),
370 SENSOR_ATTR_2(pwm3_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
371 store_pwm_enable, 0, 2),
372 SENSOR_ATTR_2(pwm3_interpolate, S_IRUGO|S_IWUSR,
373 show_pwm_interpolate, store_pwm_interpolate, 0, 2),
374 SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR,
375 show_pwm_auto_point_channel,
376 store_pwm_auto_point_channel, 0, 2),
377};
378
379static struct sensor_device_attribute_2 f71862fg_fan_attr[] = {
380 SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO|S_IWUSR,
381 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
382 1, 0),
383 SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO|S_IWUSR,
384 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
385 4, 0),
386 SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IRUGO|S_IWUSR,
387 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
388 0, 0),
389 SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IRUGO|S_IWUSR,
390 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
391 3, 0),
392 SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
393 show_pwm_auto_point_temp_hyst,
394 store_pwm_auto_point_temp_hyst,
395 0, 0),
396 SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IRUGO,
397 show_pwm_auto_point_temp_hyst, NULL, 3, 0),
398
399 SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO|S_IWUSR,
400 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
401 1, 1),
402 SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO|S_IWUSR,
403 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
404 4, 1),
405 SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IRUGO|S_IWUSR,
406 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
407 0, 1),
408 SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IRUGO|S_IWUSR,
409 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
410 3, 1),
411 SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
412 show_pwm_auto_point_temp_hyst,
413 store_pwm_auto_point_temp_hyst,
414 0, 1),
415 SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IRUGO,
416 show_pwm_auto_point_temp_hyst, NULL, 3, 1),
417};
418
419static struct sensor_device_attribute_2 f71882fg_fan_attr[] = {
420 SENSOR_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 0, 3),
421 SENSOR_ATTR_2(fan4_full_speed, S_IRUGO|S_IWUSR,
422 show_fan_full_speed,
423 store_fan_full_speed, 0, 3),
424 SENSOR_ATTR_2(fan4_beep, S_IRUGO|S_IWUSR, show_fan_beep,
425 store_fan_beep, 0, 3),
426 SENSOR_ATTR_2(fan4_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 3),
427
9ab796eb
MD		 428 SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO|S_IWUSR,
429 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
430 0, 0),
431 SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO|S_IWUSR,
432 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
433 1, 0),
434 SENSOR_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO|S_IWUSR,
435 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
436 2, 0),
437 SENSOR_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO|S_IWUSR,
438 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
439 3, 0),
440 SENSOR_ATTR_2(pwm1_auto_point5_pwm, S_IRUGO|S_IWUSR,
441 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
442 4, 0),
443 SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IRUGO|S_IWUSR,
444 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
445 0, 0),
446 SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IRUGO|S_IWUSR,
447 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
448 1, 0),
449 SENSOR_ATTR_2(pwm1_auto_point3_temp, S_IRUGO|S_IWUSR,
450 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
451 2, 0),
452 SENSOR_ATTR_2(pwm1_auto_point4_temp, S_IRUGO|S_IWUSR,
453 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
454 3, 0),
455 SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
456 show_pwm_auto_point_temp_hyst,
457 store_pwm_auto_point_temp_hyst,
458 0, 0),
459 SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IRUGO,
460 show_pwm_auto_point_temp_hyst, NULL, 1, 0),
461 SENSOR_ATTR_2(pwm1_auto_point3_temp_hyst, S_IRUGO,
462 show_pwm_auto_point_temp_hyst, NULL, 2, 0),
463 SENSOR_ATTR_2(pwm1_auto_point4_temp_hyst, S_IRUGO,
464 show_pwm_auto_point_temp_hyst, NULL, 3, 0),
465
9ab796eb
MD		 466 SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO|S_IWUSR,
467 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
468 0, 1),
469 SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO|S_IWUSR,
470 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
471 1, 1),
472 SENSOR_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO|S_IWUSR,
473 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
474 2, 1),
475 SENSOR_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO|S_IWUSR,
476 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
477 3, 1),
478 SENSOR_ATTR_2(pwm2_auto_point5_pwm, S_IRUGO|S_IWUSR,
479 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
480 4, 1),
481 SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IRUGO|S_IWUSR,
482 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
483 0, 1),
484 SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IRUGO|S_IWUSR,
485 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
486 1, 1),
487 SENSOR_ATTR_2(pwm2_auto_point3_temp, S_IRUGO|S_IWUSR,
488 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
489 2, 1),
490 SENSOR_ATTR_2(pwm2_auto_point4_temp, S_IRUGO|S_IWUSR,
491 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
492 3, 1),
493 SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
494 show_pwm_auto_point_temp_hyst,
495 store_pwm_auto_point_temp_hyst,
496 0, 1),
497 SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IRUGO,
498 show_pwm_auto_point_temp_hyst, NULL, 1, 1),
499 SENSOR_ATTR_2(pwm2_auto_point3_temp_hyst, S_IRUGO,
500 show_pwm_auto_point_temp_hyst, NULL, 2, 1),
501 SENSOR_ATTR_2(pwm2_auto_point4_temp_hyst, S_IRUGO,
502 show_pwm_auto_point_temp_hyst, NULL, 3, 1),
503
9ab796eb
MD		 504 SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO|S_IWUSR,
505 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
506 0, 2),
507 SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO|S_IWUSR,
508 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
509 1, 2),
510 SENSOR_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO|S_IWUSR,
511 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
512 2, 2),
513 SENSOR_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO|S_IWUSR,
514 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
515 3, 2),
516 SENSOR_ATTR_2(pwm3_auto_point5_pwm, S_IRUGO|S_IWUSR,
517 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
518 4, 2),
519 SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IRUGO|S_IWUSR,
520 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
521 0, 2),
522 SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IRUGO|S_IWUSR,
523 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
524 1, 2),
525 SENSOR_ATTR_2(pwm3_auto_point3_temp, S_IRUGO|S_IWUSR,
526 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
527 2, 2),
528 SENSOR_ATTR_2(pwm3_auto_point4_temp, S_IRUGO|S_IWUSR,
529 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
530 3, 2),
531 SENSOR_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
532 show_pwm_auto_point_temp_hyst,
533 store_pwm_auto_point_temp_hyst,
534 0, 2),
535 SENSOR_ATTR_2(pwm3_auto_point2_temp_hyst, S_IRUGO,
536 show_pwm_auto_point_temp_hyst, NULL, 1, 2),
537 SENSOR_ATTR_2(pwm3_auto_point3_temp_hyst, S_IRUGO,
538 show_pwm_auto_point_temp_hyst, NULL, 2, 2),
539 SENSOR_ATTR_2(pwm3_auto_point4_temp_hyst, S_IRUGO,
540 show_pwm_auto_point_temp_hyst, NULL, 3, 2),
541
542 SENSOR_ATTR_2(pwm4, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 3),
543 SENSOR_ATTR_2(pwm4_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
544 store_pwm_enable, 0, 3),
545 SENSOR_ATTR_2(pwm4_interpolate, S_IRUGO|S_IWUSR,
546 show_pwm_interpolate, store_pwm_interpolate, 0, 3),
547 SENSOR_ATTR_2(pwm4_auto_channels_temp, S_IRUGO|S_IWUSR,
548 show_pwm_auto_point_channel,
549 store_pwm_auto_point_channel, 0, 3),
550 SENSOR_ATTR_2(pwm4_auto_point1_pwm, S_IRUGO|S_IWUSR,
551 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
552 0, 3),
553 SENSOR_ATTR_2(pwm4_auto_point2_pwm, S_IRUGO|S_IWUSR,
554 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
555 1, 3),
556 SENSOR_ATTR_2(pwm4_auto_point3_pwm, S_IRUGO|S_IWUSR,
557 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
558 2, 3),
559 SENSOR_ATTR_2(pwm4_auto_point4_pwm, S_IRUGO|S_IWUSR,
560 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
561 3, 3),
562 SENSOR_ATTR_2(pwm4_auto_point5_pwm, S_IRUGO|S_IWUSR,
563 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
564 4, 3),
565 SENSOR_ATTR_2(pwm4_auto_point1_temp, S_IRUGO|S_IWUSR,
566 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
567 0, 3),
568 SENSOR_ATTR_2(pwm4_auto_point2_temp, S_IRUGO|S_IWUSR,
569 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
570 1, 3),
571 SENSOR_ATTR_2(pwm4_auto_point3_temp, S_IRUGO|S_IWUSR,
572 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
573 2, 3),
574 SENSOR_ATTR_2(pwm4_auto_point4_temp, S_IRUGO|S_IWUSR,
575 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
576 3, 3),
577 SENSOR_ATTR_2(pwm4_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
578 show_pwm_auto_point_temp_hyst,
579 store_pwm_auto_point_temp_hyst,
580 0, 3),
581 SENSOR_ATTR_2(pwm4_auto_point2_temp_hyst, S_IRUGO,
582 show_pwm_auto_point_temp_hyst, NULL, 1, 3),
583 SENSOR_ATTR_2(pwm4_auto_point3_temp_hyst, S_IRUGO,
584 show_pwm_auto_point_temp_hyst, NULL, 2, 3),
585 SENSOR_ATTR_2(pwm4_auto_point4_temp_hyst, S_IRUGO,
586 show_pwm_auto_point_temp_hyst, NULL, 3, 3),
45fb3669
HG		 587};
588
589
590/* Super I/O functions */
591static inline int superio_inb(int base, int reg)
592{
593 outb(reg, base);
594 return inb(base + 1);
595}
596
597static int superio_inw(int base, int reg)
598{
599 int val;
600 outb(reg++, base);
601 val = inb(base + 1) << 8;
602 outb(reg, base);
603 val |= inb(base + 1);
604 return val;
605}
606
607static inline void superio_enter(int base)
608{
609 /* according to the datasheet the key must be send twice! */
610 outb( SIO_UNLOCK_KEY, base);
611 outb( SIO_UNLOCK_KEY, base);
612}
613
614static inline void superio_select( int base, int ld)
615{
616 outb(SIO_REG_LDSEL, base);
617 outb(ld, base + 1);
618}
619
620static inline void superio_exit(int base)
621{
622 outb(SIO_LOCK_KEY, base);
623}
624
625static inline u16 fan_from_reg(u16 reg)
626{
627 return reg ? (1500000 / reg) : 0;
628}
629
9ab796eb
MD		 630static inline u16 fan_to_reg(u16 fan)
631{
632 return fan ? (1500000 / fan) : 0;
633}
634
45fb3669
HG		 635static u8 f71882fg_read8(struct f71882fg_data *data, u8 reg)
636{
637 u8 val;
638
639 outb(reg, data->addr + ADDR_REG_OFFSET);
640 val = inb(data->addr + DATA_REG_OFFSET);
641
642 return val;
643}
644
645static u16 f71882fg_read16(struct f71882fg_data *data, u8 reg)
646{
647 u16 val;
648
649 outb(reg++, data->addr + ADDR_REG_OFFSET);
650 val = inb(data->addr + DATA_REG_OFFSET) << 8;
651 outb(reg, data->addr + ADDR_REG_OFFSET);
652 val |= inb(data->addr + DATA_REG_OFFSET);
653
654 return val;
655}
656
657static void f71882fg_write8(struct f71882fg_data *data, u8 reg, u8 val)
658{
659 outb(reg, data->addr + ADDR_REG_OFFSET);
660 outb(val, data->addr + DATA_REG_OFFSET);
661}
662
9ab796eb
MD		 663static void f71882fg_write16(struct f71882fg_data *data, u8 reg, u16 val)
664{
665 outb(reg++, data->addr + ADDR_REG_OFFSET);
666 outb(val >> 8, data->addr + DATA_REG_OFFSET);
667 outb(reg, data->addr + ADDR_REG_OFFSET);
668 outb(val & 255, data->addr + DATA_REG_OFFSET);
669}
670
77a4a3e2 671static struct f71882fg_data *f71882fg_update_device(struct device *dev)
45fb3669
HG		 672{
673 struct f71882fg_data *data = dev_get_drvdata(dev);
674 int nr, reg, reg2;
498be968 675 int nr_fans = (data->type == f71862fg) ? 3 : 4;
45fb3669
HG		 676
677 mutex_lock(&data->update_lock);
678
679 /* Update once every 60 seconds */
680 if ( time_after(jiffies, data->last_limits + 60 * HZ ) ||
681 !data->valid) {
498be968
HG		 682 if (data->type == f71882fg) {
683 data->in1_max =
684 f71882fg_read8(data, F71882FG_REG_IN1_HIGH);
685 data->in_beep =
686 f71882fg_read8(data, F71882FG_REG_IN_BEEP);
687 }
45fb3669
HG		 688
689 /* Get High & boundary temps*/
7567a043 690 for (nr = 1; nr < 4; nr++) {
45fb3669
HG		 691 data->temp_ovt[nr] = f71882fg_read8(data,
692 F71882FG_REG_TEMP_OVT(nr));
693 data->temp_high[nr] = f71882fg_read8(data,
694 F71882FG_REG_TEMP_HIGH(nr));
695 }
696
bc27490f
HG		 697 /* hyst */
698 data->temp_hyst[0] =
699 f71882fg_read8(data, F71882FG_REG_TEMP_HYST(0));
700 data->temp_hyst[1] =
701 f71882fg_read8(data, F71882FG_REG_TEMP_HYST(1));
45fb3669
HG		 702
703 /* Have to hardcode type, because temp1 is special */
704 reg = f71882fg_read8(data, F71882FG_REG_TEMP_TYPE);
705 reg2 = f71882fg_read8(data, F71882FG_REG_PECI);
706 if ((reg2 & 0x03) == 0x01)
7567a043 707 data->temp_type[1] = 6 /* PECI */;
45fb3669 708 else if ((reg2 & 0x03) == 0x02)
7567a043 709 data->temp_type[1] = 5 /* AMDSI */;
45fb3669 710 else
7567a043 711 data->temp_type[1] = (reg & 0x02) ? 2 : 4;
45fb3669 712
7567a043
HG		 713 data->temp_type[2] = (reg & 0x04) ? 2 : 4;
714 data->temp_type[3] = (reg & 0x08) ? 2 : 4;
45fb3669
HG		 715
716 data->temp_beep = f71882fg_read8(data, F71882FG_REG_TEMP_BEEP);
717
718 data->fan_beep = f71882fg_read8(data, F71882FG_REG_FAN_BEEP);
719
9ab796eb
MD		 720 data->pwm_enable = f71882fg_read8(data,
721 F71882FG_REG_PWM_ENABLE);
bc27490f
HG		 722 data->pwm_auto_point_hyst[0] =
723 f71882fg_read8(data, F71882FG_REG_FAN_HYST(0));
724 data->pwm_auto_point_hyst[1] =
725 f71882fg_read8(data, F71882FG_REG_FAN_HYST(1));
726
498be968 727 for (nr = 0; nr < nr_fans; nr++) {
9ab796eb
MD		 728 data->pwm_auto_point_mapping[nr] =
729 f71882fg_read8(data,
730 F71882FG_REG_POINT_MAPPING(nr));
731
498be968
HG		 732 if (data->type == f71882fg) {
733 int point;
734 for (point = 0; point < 5; point++) {
735 data->pwm_auto_point_pwm[nr][point] =
736 f71882fg_read8(data,
737 F71882FG_REG_POINT_PWM
738 (nr, point));
739 }
740 for (point = 0; point < 4; point++) {
741 data->pwm_auto_point_temp[nr][point] =
742 f71882fg_read8(data,
743 F71882FG_REG_POINT_TEMP
744 (nr, point));
745 }
746 } else {
747 data->pwm_auto_point_pwm[nr][1] =
748 f71882fg_read8(data,
749 F71882FG_REG_POINT_PWM
750 (nr, 1));
751 data->pwm_auto_point_pwm[nr][4] =
752 f71882fg_read8(data,
753 F71882FG_REG_POINT_PWM
754 (nr, 4));
755 data->pwm_auto_point_temp[nr][0] =
756 f71882fg_read8(data,
757 F71882FG_REG_POINT_TEMP
758 (nr, 0));
759 data->pwm_auto_point_temp[nr][3] =
760 f71882fg_read8(data,
761 F71882FG_REG_POINT_TEMP
762 (nr, 3));
9ab796eb
MD		 763 }
764 }
45fb3669
HG		 765 data->last_limits = jiffies;
766 }
767
768 /* Update every second */
8afb1049 769 if (time_after(jiffies, data->last_updated + HZ) || !data->valid) {
45fb3669
HG		 770 data->temp_status = f71882fg_read8(data,
771 F71882FG_REG_TEMP_STATUS);
772 data->temp_diode_open = f71882fg_read8(data,
773 F71882FG_REG_TEMP_DIODE_OPEN);
7567a043 774 for (nr = 1; nr < 4; nr++)
45fb3669
HG		 775 data->temp[nr] = f71882fg_read8(data,
776 F71882FG_REG_TEMP(nr));
777
778 data->fan_status = f71882fg_read8(data,
779 F71882FG_REG_FAN_STATUS);
498be968 780 for (nr = 0; nr < nr_fans; nr++) {
45fb3669
HG		 781 data->fan[nr] = f71882fg_read16(data,
782 F71882FG_REG_FAN(nr));
9ab796eb
MD		 783 data->fan_target[nr] =
784 f71882fg_read16(data, F71882FG_REG_FAN_TARGET(nr));
785 data->fan_full_speed[nr] =
786 f71882fg_read16(data,
787 F71882FG_REG_FAN_FULL_SPEED(nr));
788 data->pwm[nr] =
789 f71882fg_read8(data, F71882FG_REG_PWM(nr));
790 }
45fb3669 791
498be968
HG		 792 if (data->type == f71882fg)
793 data->in_status = f71882fg_read8(data,
45fb3669
HG		 794 F71882FG_REG_IN_STATUS);
795 for (nr = 0; nr < 9; nr++)
796 data->in[nr] = f71882fg_read8(data,
797 F71882FG_REG_IN(nr));
798
799 data->last_updated = jiffies;
800 data->valid = 1;
801 }
802
803 mutex_unlock(&data->update_lock);
804
805 return data;
806}
807
808/* Sysfs Interface */
809static ssize_t show_fan(struct device *dev, struct device_attribute *devattr,
810 char *buf)
811{
812 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 813 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669
HG		 814 int speed = fan_from_reg(data->fan[nr]);
815
816 if (speed == FAN_MIN_DETECT)
817 speed = 0;
818
819 return sprintf(buf, "%d\n", speed);
820}
821
9ab796eb
MD		 822static ssize_t show_fan_full_speed(struct device *dev,
823 struct device_attribute *devattr, char *buf)
824{
825 struct f71882fg_data *data = f71882fg_update_device(dev);
826 int nr = to_sensor_dev_attr_2(devattr)->index;
827 int speed = fan_from_reg(data->fan_full_speed[nr]);
828 return sprintf(buf, "%d\n", speed);
829}
830
831static ssize_t store_fan_full_speed(struct device *dev,
832 struct device_attribute *devattr,
833 const char *buf, size_t count)
834{
835 struct f71882fg_data *data = dev_get_drvdata(dev);
836 int nr = to_sensor_dev_attr_2(devattr)->index;
837 long val = simple_strtol(buf, NULL, 10);
838
839 val = SENSORS_LIMIT(val, 23, 1500000);
840 val = fan_to_reg(val);
841
842 mutex_lock(&data->update_lock);
4c82c38a
HG		 843 f71882fg_write16(data, F71882FG_REG_FAN_FULL_SPEED(nr), val);
844 data->fan_full_speed[nr] = val;
9ab796eb
MD		 845 mutex_unlock(&data->update_lock);
846
847 return count;
848}
849
45fb3669
HG		 850static ssize_t show_fan_beep(struct device *dev, struct device_attribute
851 *devattr, char *buf)
852{
853 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 854 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669
HG		 855
856 if (data->fan_beep & (1 << nr))
857 return sprintf(buf, "1\n");
858 else
859 return sprintf(buf, "0\n");
860}
861
862static ssize_t store_fan_beep(struct device *dev, struct device_attribute
863 *devattr, const char *buf, size_t count)
864{
865 struct f71882fg_data *data = dev_get_drvdata(dev);
bc37ae71 866 int nr = to_sensor_dev_attr_2(devattr)->index;
ce0bfa5e 867 unsigned long val = simple_strtoul(buf, NULL, 10);
45fb3669
HG		 868
869 mutex_lock(&data->update_lock);
ce0bfa5e 870 data->fan_beep = f71882fg_read8(data, F71882FG_REG_FAN_BEEP);
45fb3669
HG		 871 if (val)
872 data->fan_beep |= 1 << nr;
873 else
874 data->fan_beep &= ~(1 << nr);
875
876 f71882fg_write8(data, F71882FG_REG_FAN_BEEP, data->fan_beep);
877 mutex_unlock(&data->update_lock);
878
879 return count;
880}
881
882static ssize_t show_fan_alarm(struct device *dev, struct device_attribute
883 *devattr, char *buf)
884{
885 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 886 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669
HG		 887
888 if (data->fan_status & (1 << nr))
889 return sprintf(buf, "1\n");
890 else
891 return sprintf(buf, "0\n");
892}
893
894static ssize_t show_in(struct device *dev, struct device_attribute *devattr,
895 char *buf)
896{
897 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 898 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669
HG		 899
900 return sprintf(buf, "%d\n", data->in[nr] * 8);
901}
902
903static ssize_t show_in_max(struct device *dev, struct device_attribute
904 *devattr, char *buf)
905{
906 struct f71882fg_data *data = f71882fg_update_device(dev);
907
908 return sprintf(buf, "%d\n", data->in1_max * 8);
909}
910
911static ssize_t store_in_max(struct device *dev, struct device_attribute
912 *devattr, const char *buf, size_t count)
913{
914 struct f71882fg_data *data = dev_get_drvdata(dev);
ce0bfa5e
HG		 915 long val = simple_strtol(buf, NULL, 10) / 8;
916 val = SENSORS_LIMIT(val, 0, 255);
45fb3669
HG		 917
918 mutex_lock(&data->update_lock);
919 f71882fg_write8(data, F71882FG_REG_IN1_HIGH, val);
920 data->in1_max = val;
921 mutex_unlock(&data->update_lock);
922
923 return count;
924}
925
926static ssize_t show_in_beep(struct device *dev, struct device_attribute
927 *devattr, char *buf)
928{
929 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 930 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669
HG		 931
932 if (data->in_beep & (1 << nr))
933 return sprintf(buf, "1\n");
934 else
935 return sprintf(buf, "0\n");
936}
937
938static ssize_t store_in_beep(struct device *dev, struct device_attribute
939 *devattr, const char *buf, size_t count)
940{
941 struct f71882fg_data *data = dev_get_drvdata(dev);
bc37ae71 942 int nr = to_sensor_dev_attr_2(devattr)->index;
ce0bfa5e 943 unsigned long val = simple_strtoul(buf, NULL, 10);
45fb3669
HG		 944
945 mutex_lock(&data->update_lock);
ce0bfa5e 946 data->in_beep = f71882fg_read8(data, F71882FG_REG_IN_BEEP);
45fb3669
HG		 947 if (val)
948 data->in_beep |= 1 << nr;
949 else
950 data->in_beep &= ~(1 << nr);
951
952 f71882fg_write8(data, F71882FG_REG_IN_BEEP, data->in_beep);
953 mutex_unlock(&data->update_lock);
954
955 return count;
956}
957
958static ssize_t show_in_alarm(struct device *dev, struct device_attribute
959 *devattr, char *buf)
960{
961 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 962 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669
HG		 963
964 if (data->in_status & (1 << nr))
965 return sprintf(buf, "1\n");
966 else
967 return sprintf(buf, "0\n");
968}
969
970static ssize_t show_temp(struct device *dev, struct device_attribute *devattr,
971 char *buf)
972{
973 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 974 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669
HG		 975
976 return sprintf(buf, "%d\n", data->temp[nr] * 1000);
977}
978
979static ssize_t show_temp_max(struct device *dev, struct device_attribute
980 *devattr, char *buf)
981{
982 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 983 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669
HG		 984
985 return sprintf(buf, "%d\n", data->temp_high[nr] * 1000);
986}
987
988static ssize_t store_temp_max(struct device *dev, struct device_attribute
989 *devattr, const char *buf, size_t count)
990{
991 struct f71882fg_data *data = dev_get_drvdata(dev);
bc37ae71 992 int nr = to_sensor_dev_attr_2(devattr)->index;
ce0bfa5e
HG		 993 long val = simple_strtol(buf, NULL, 10) / 1000;
994 val = SENSORS_LIMIT(val, 0, 255);
45fb3669
HG		 995
996 mutex_lock(&data->update_lock);
997 f71882fg_write8(data, F71882FG_REG_TEMP_HIGH(nr), val);
998 data->temp_high[nr] = val;
999 mutex_unlock(&data->update_lock);
1000
1001 return count;
1002}
1003
1004static ssize_t show_temp_max_hyst(struct device *dev, struct device_attribute
1005 *devattr, char *buf)
1006{
1007 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 1008 int nr = to_sensor_dev_attr_2(devattr)->index;
ce0bfa5e 1009 int temp_max_hyst;
45fb3669 1010
ce0bfa5e 1011 mutex_lock(&data->update_lock);
bc27490f
HG		 1012 if (nr & 1)
1013 temp_max_hyst = data->temp_hyst[nr / 2] >> 4;
1014 else
1015 temp_max_hyst = data->temp_hyst[nr / 2] & 0x0f;
1016 temp_max_hyst = (data->temp_high[nr] - temp_max_hyst) * 1000;
ce0bfa5e
HG		 1017 mutex_unlock(&data->update_lock);
1018
1019 return sprintf(buf, "%d\n", temp_max_hyst);
45fb3669
HG		 1020}
1021
1022static ssize_t store_temp_max_hyst(struct device *dev, struct device_attribute
1023 *devattr, const char *buf, size_t count)
1024{
1025 struct f71882fg_data *data = dev_get_drvdata(dev);
bc37ae71 1026 int nr = to_sensor_dev_attr_2(devattr)->index;
ce0bfa5e 1027 long val = simple_strtol(buf, NULL, 10) / 1000;
45fb3669 1028 ssize_t ret = count;
ce0bfa5e 1029 u8 reg;
45fb3669
HG		 1030
1031 mutex_lock(&data->update_lock);
1032
1033 /* convert abs to relative and check */
ce0bfa5e
HG		 1034 data->temp_high[nr] = f71882fg_read8(data, F71882FG_REG_TEMP_HIGH(nr));
1035 val = SENSORS_LIMIT(val, data->temp_high[nr] - 15,
1036 data->temp_high[nr]);
45fb3669 1037 val = data->temp_high[nr] - val;
45fb3669
HG		 1038
1039 /* convert value to register contents */
bc27490f
HG		 1040 reg = f71882fg_read8(data, F71882FG_REG_TEMP_HYST(nr / 2));
1041 if (nr & 1)
1042 reg = (reg & 0x0f) | (val << 4);
1043 else
1044 reg = (reg & 0xf0) | val;
1045 f71882fg_write8(data, F71882FG_REG_TEMP_HYST(nr / 2), reg);
1046 data->temp_hyst[nr / 2] = reg;
45fb3669 1047
45fb3669
HG		 1048 mutex_unlock(&data->update_lock);
1049 return ret;
1050}
1051
1052static ssize_t show_temp_crit(struct device *dev, struct device_attribute
1053 *devattr, char *buf)
1054{
1055 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 1056 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669
HG		 1057
1058 return sprintf(buf, "%d\n", data->temp_ovt[nr] * 1000);
1059}
1060
1061static ssize_t store_temp_crit(struct device *dev, struct device_attribute
1062 *devattr, const char *buf, size_t count)
1063{
1064 struct f71882fg_data *data = dev_get_drvdata(dev);
bc37ae71 1065 int nr = to_sensor_dev_attr_2(devattr)->index;
ce0bfa5e
HG		 1066 long val = simple_strtol(buf, NULL, 10) / 1000;
1067 val = SENSORS_LIMIT(val, 0, 255);
45fb3669
HG		 1068
1069 mutex_lock(&data->update_lock);
1070 f71882fg_write8(data, F71882FG_REG_TEMP_OVT(nr), val);
1071 data->temp_ovt[nr] = val;
1072 mutex_unlock(&data->update_lock);
1073
1074 return count;
1075}
1076
1077static ssize_t show_temp_crit_hyst(struct device *dev, struct device_attribute
1078 *devattr, char *buf)
1079{
1080 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 1081 int nr = to_sensor_dev_attr_2(devattr)->index;
ce0bfa5e 1082 int temp_crit_hyst;
45fb3669 1083
ce0bfa5e 1084 mutex_lock(&data->update_lock);
bc27490f
HG		 1085 if (nr & 1)
1086 temp_crit_hyst = data->temp_hyst[nr / 2] >> 4;
1087 else
1088 temp_crit_hyst = data->temp_hyst[nr / 2] & 0x0f;
1089 temp_crit_hyst = (data->temp_ovt[nr] - temp_crit_hyst) * 1000;
ce0bfa5e
HG		 1090 mutex_unlock(&data->update_lock);
1091
1092 return sprintf(buf, "%d\n", temp_crit_hyst);
45fb3669
HG		 1093}
1094
1095static ssize_t show_temp_type(struct device *dev, struct device_attribute
1096 *devattr, char *buf)
1097{
1098 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 1099 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669
HG		 1100
1101 return sprintf(buf, "%d\n", data->temp_type[nr]);
1102}
1103
1104static ssize_t show_temp_beep(struct device *dev, struct device_attribute
1105 *devattr, char *buf)
1106{
1107 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 1108 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669 1109
7567a043 1110 if (data->temp_beep & (1 << nr))
45fb3669
HG		 1111 return sprintf(buf, "1\n");
1112 else
1113 return sprintf(buf, "0\n");
1114}
1115
1116static ssize_t store_temp_beep(struct device *dev, struct device_attribute
1117 *devattr, const char *buf, size_t count)
1118{
1119 struct f71882fg_data *data = dev_get_drvdata(dev);
bc37ae71 1120 int nr = to_sensor_dev_attr_2(devattr)->index;
ce0bfa5e 1121 unsigned long val = simple_strtoul(buf, NULL, 10);
45fb3669
HG		 1122
1123 mutex_lock(&data->update_lock);
ce0bfa5e 1124 data->temp_beep = f71882fg_read8(data, F71882FG_REG_TEMP_BEEP);
45fb3669 1125 if (val)
7567a043 1126 data->temp_beep |= 1 << nr;
45fb3669 1127 else
7567a043 1128 data->temp_beep &= ~(1 << nr);
45fb3669
HG		 1129
1130 f71882fg_write8(data, F71882FG_REG_TEMP_BEEP, data->temp_beep);
1131 mutex_unlock(&data->update_lock);
1132
1133 return count;
1134}
1135
1136static ssize_t show_temp_alarm(struct device *dev, struct device_attribute
1137 *devattr, char *buf)
1138{
1139 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 1140 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669 1141
7567a043 1142 if (data->temp_status & (1 << nr))
45fb3669
HG		 1143 return sprintf(buf, "1\n");
1144 else
1145 return sprintf(buf, "0\n");
1146}
1147
1148static ssize_t show_temp_fault(struct device *dev, struct device_attribute
1149 *devattr, char *buf)
1150{
1151 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 1152 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669 1153
7567a043 1154 if (data->temp_diode_open & (1 << nr))
45fb3669
HG		 1155 return sprintf(buf, "1\n");
1156 else
1157 return sprintf(buf, "0\n");
1158}
1159
9ab796eb
MD		 1160static ssize_t show_pwm(struct device *dev,
1161 struct device_attribute *devattr, char *buf)
1162{
1163 struct f71882fg_data *data = f71882fg_update_device(dev);
1164 int val, nr = to_sensor_dev_attr_2(devattr)->index;
ce0bfa5e 1165 mutex_lock(&data->update_lock);
9ab796eb
MD		 1166 if (data->pwm_enable & (1 << (2 * nr)))
1167 /* PWM mode */
1168 val = data->pwm[nr];
1169 else {
1170 /* RPM mode */
9ab796eb
MD		 1171 val = 255 * fan_from_reg(data->fan_target[nr])
1172 / fan_from_reg(data->fan_full_speed[nr]);
9ab796eb 1173 }
ce0bfa5e 1174 mutex_unlock(&data->update_lock);
9ab796eb
MD		 1175 return sprintf(buf, "%d\n", val);
1176}
1177
1178static ssize_t store_pwm(struct device *dev,
1179 struct device_attribute *devattr, const char *buf,
1180 size_t count)
1181{
ce0bfa5e 1182 struct f71882fg_data *data = dev_get_drvdata(dev);
9ab796eb
MD		 1183 int nr = to_sensor_dev_attr_2(devattr)->index;
1184 long val = simple_strtol(buf, NULL, 10);
1185 val = SENSORS_LIMIT(val, 0, 255);
1186
1187 mutex_lock(&data->update_lock);
ce0bfa5e 1188 data->pwm_enable = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
9ab796eb
MD		 1189 if (data->pwm_enable & (1 << (2 * nr))) {
1190 /* PWM mode */
1191 f71882fg_write8(data, F71882FG_REG_PWM(nr), val);
1192 data->pwm[nr] = val;
1193 } else {
1194 /* RPM mode */
ce0bfa5e
HG		 1195 int target, full_speed;
1196 full_speed = f71882fg_read16(data,
1197 F71882FG_REG_FAN_FULL_SPEED(nr));
1198 target = fan_to_reg(val * fan_from_reg(full_speed) / 255);
1199 f71882fg_write16(data, F71882FG_REG_FAN_TARGET(nr), target);
1200 data->fan_target[nr] = target;
1201 data->fan_full_speed[nr] = full_speed;
9ab796eb
MD		 1202 }
1203 mutex_unlock(&data->update_lock);
1204
1205 return count;
1206}
1207
1208static ssize_t show_pwm_enable(struct device *dev,
1209 struct device_attribute *devattr, char *buf)
1210{
1211 int result;
1212 struct f71882fg_data *data = f71882fg_update_device(dev);
1213 int nr = to_sensor_dev_attr_2(devattr)->index;
1214
1215 if (data->pwm_enable & (2 << (2 * nr)))
1216 result = 1;
1217 else
1218 result = 2;
1219
1220 return sprintf(buf, "%d\n", result);
1221}
1222
1223static ssize_t store_pwm_enable(struct device *dev, struct device_attribute
1224 *devattr, const char *buf, size_t count)
1225{
1226 struct f71882fg_data *data = dev_get_drvdata(dev);
1227 int nr = to_sensor_dev_attr_2(devattr)->index;
1228 long val = simple_strtol(buf, NULL, 10);
1229 if (val < 1 || val > 2)
1230 return -EINVAL;
1231
1232 mutex_lock(&data->update_lock);
ce0bfa5e 1233 data->pwm_enable = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
9ab796eb
MD		 1234 switch (val) {
1235 case 1:
1236 data->pwm_enable |= 2 << (2 * nr);
1237 break; /* Manual */
1238 case 2:
1239 data->pwm_enable &= ~(2 << (2 * nr));
1240 break; /* Temperature ctrl */
1241 }
9ab796eb
MD		 1242 f71882fg_write8(data, F71882FG_REG_PWM_ENABLE, data->pwm_enable);
1243 mutex_unlock(&data->update_lock);
1244
1245 return count;
1246}
1247
1248static ssize_t show_pwm_auto_point_pwm(struct device *dev,
1249 struct device_attribute *devattr,
1250 char *buf)
1251{
1252 int result;
1253 struct f71882fg_data *data = f71882fg_update_device(dev);
1254 int pwm = to_sensor_dev_attr_2(devattr)->index;
1255 int point = to_sensor_dev_attr_2(devattr)->nr;
1256
ce0bfa5e 1257 mutex_lock(&data->update_lock);
9ab796eb
MD		 1258 if (data->pwm_enable & (1 << (2 * pwm))) {
1259 /* PWM mode */
1260 result = data->pwm_auto_point_pwm[pwm][point];
1261 } else {
1262 /* RPM mode */
1263 result = 32 * 255 / (32 + data->pwm_auto_point_pwm[pwm][point]);
1264 }
ce0bfa5e 1265 mutex_unlock(&data->update_lock);
9ab796eb
MD		 1266
1267 return sprintf(buf, "%d\n", result);
1268}
1269
1270static ssize_t store_pwm_auto_point_pwm(struct device *dev,
1271 struct device_attribute *devattr,
1272 const char *buf, size_t count)
1273{
ce0bfa5e 1274 struct f71882fg_data *data = dev_get_drvdata(dev);
9ab796eb
MD		 1275 int pwm = to_sensor_dev_attr_2(devattr)->index;
1276 int point = to_sensor_dev_attr_2(devattr)->nr;
ce0bfa5e 1277 long val = simple_strtol(buf, NULL, 10);
9ab796eb
MD		 1278 val = SENSORS_LIMIT(val, 0, 255);
1279
1280 mutex_lock(&data->update_lock);
ce0bfa5e 1281 data->pwm_enable = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
9ab796eb
MD		 1282 if (data->pwm_enable & (1 << (2 * pwm))) {
1283 /* PWM mode */
1284 } else {
1285 /* RPM mode */
1286 if (val < 29) /* Prevent negative numbers */
1287 val = 255;
1288 else
1289 val = (255 - val) * 32 / val;
1290 }
1291 f71882fg_write8(data, F71882FG_REG_POINT_PWM(pwm, point), val);
1292 data->pwm_auto_point_pwm[pwm][point] = val;
1293 mutex_unlock(&data->update_lock);
1294
1295 return count;
1296}
1297
1298static ssize_t show_pwm_auto_point_temp_hyst(struct device *dev,
1299 struct device_attribute *devattr,
1300 char *buf)
1301{
1302 int result = 0;
1303 struct f71882fg_data *data = f71882fg_update_device(dev);
1304 int nr = to_sensor_dev_attr_2(devattr)->index;
1305 int point = to_sensor_dev_attr_2(devattr)->nr;
1306
1307 mutex_lock(&data->update_lock);
bc27490f
HG		 1308 if (nr & 1)
1309 result = data->pwm_auto_point_hyst[nr / 2] >> 4;
1310 else
1311 result = data->pwm_auto_point_hyst[nr / 2] & 0x0f;
9ab796eb
MD		 1312 result = 1000 * (data->pwm_auto_point_temp[nr][point] - result);
1313 mutex_unlock(&data->update_lock);
1314
1315 return sprintf(buf, "%d\n", result);
1316}
1317
1318static ssize_t store_pwm_auto_point_temp_hyst(struct device *dev,
1319 struct device_attribute *devattr,
1320 const char *buf, size_t count)
1321{
ce0bfa5e 1322 struct f71882fg_data *data = dev_get_drvdata(dev);
9ab796eb
MD		 1323 int nr = to_sensor_dev_attr_2(devattr)->index;
1324 int point = to_sensor_dev_attr_2(devattr)->nr;
1325 long val = simple_strtol(buf, NULL, 10) / 1000;
bc27490f 1326 u8 reg;
9ab796eb
MD		 1327
1328 mutex_lock(&data->update_lock);
ce0bfa5e
HG		 1329 data->pwm_auto_point_temp[nr][point] =
1330 f71882fg_read8(data, F71882FG_REG_POINT_TEMP(nr, point));
9ab796eb
MD		 1331 val = SENSORS_LIMIT(val, data->pwm_auto_point_temp[nr][point] - 15,
1332 data->pwm_auto_point_temp[nr][point]);
1333 val = data->pwm_auto_point_temp[nr][point] - val;
1334
bc27490f
HG		 1335 reg = f71882fg_read8(data, F71882FG_REG_FAN_HYST(nr / 2));
1336 if (nr & 1)
1337 reg = (reg & 0x0f) | (val << 4);
1338 else
1339 reg = (reg & 0xf0) | val;
1340
1341 f71882fg_write8(data, F71882FG_REG_FAN_HYST(nr / 2), reg);
1342 data->pwm_auto_point_hyst[nr / 2] = reg;
9ab796eb
MD		 1343 mutex_unlock(&data->update_lock);
1344
1345 return count;
1346}
1347
1348static ssize_t show_pwm_interpolate(struct device *dev,
1349 struct device_attribute *devattr, char *buf)
1350{
1351 int result;
1352 struct f71882fg_data *data = f71882fg_update_device(dev);
1353 int nr = to_sensor_dev_attr_2(devattr)->index;
1354
1355 result = (data->pwm_auto_point_mapping[nr] >> 4) & 1;
1356
1357 return sprintf(buf, "%d\n", result);
1358}
1359
1360static ssize_t store_pwm_interpolate(struct device *dev,
1361 struct device_attribute *devattr,
1362 const char *buf, size_t count)
1363{
ce0bfa5e 1364 struct f71882fg_data *data = dev_get_drvdata(dev);
9ab796eb 1365 int nr = to_sensor_dev_attr_2(devattr)->index;
ce0bfa5e
HG		 1366 unsigned long val = simple_strtoul(buf, NULL, 10);
1367
9ab796eb 1368 mutex_lock(&data->update_lock);
ce0bfa5e
HG		 1369 data->pwm_auto_point_mapping[nr] =
1370 f71882fg_read8(data, F71882FG_REG_POINT_MAPPING(nr));
9ab796eb
MD		 1371 if (val)
1372 val = data->pwm_auto_point_mapping[nr] | (1 << 4);
1373 else
1374 val = data->pwm_auto_point_mapping[nr] & (~(1 << 4));
1375 f71882fg_write8(data, F71882FG_REG_POINT_MAPPING(nr), val);
1376 data->pwm_auto_point_mapping[nr] = val;
1377 mutex_unlock(&data->update_lock);
1378
1379 return count;
1380}
1381
1382static ssize_t show_pwm_auto_point_channel(struct device *dev,
1383 struct device_attribute *devattr,
1384 char *buf)
1385{
1386 int result;
1387 struct f71882fg_data *data = f71882fg_update_device(dev);
1388 int nr = to_sensor_dev_attr_2(devattr)->index;
1389
1390 result = 1 << ((data->pwm_auto_point_mapping[nr] & 3) - 1);
1391
1392 return sprintf(buf, "%d\n", result);
1393}
1394
1395static ssize_t store_pwm_auto_point_channel(struct device *dev,
1396 struct device_attribute *devattr,
1397 const char *buf, size_t count)
1398{
ce0bfa5e 1399 struct f71882fg_data *data = dev_get_drvdata(dev);
9ab796eb
MD		 1400 int nr = to_sensor_dev_attr_2(devattr)->index;
1401 long val = simple_strtol(buf, NULL, 10);
1402 switch (val) {
1403 case 1:
1404 val = 1;
1405 break;
1406 case 2:
1407 val = 2;
1408 break;
1409 case 4:
1410 val = 3;
1411 break;
1412 default:
1413 return -EINVAL;
1414 }
1415 mutex_lock(&data->update_lock);
ce0bfa5e
HG		 1416 data->pwm_auto_point_mapping[nr] =
1417 f71882fg_read8(data, F71882FG_REG_POINT_MAPPING(nr));
9ab796eb
MD		 1418 val = (data->pwm_auto_point_mapping[nr] & 0xfc) | val;
1419 f71882fg_write8(data, F71882FG_REG_POINT_MAPPING(nr), val);
1420 data->pwm_auto_point_mapping[nr] = val;
1421 mutex_unlock(&data->update_lock);
1422
1423 return count;
1424}
1425
1426static ssize_t show_pwm_auto_point_temp(struct device *dev,
1427 struct device_attribute *devattr,
1428 char *buf)
1429{
1430 int result;
1431 struct f71882fg_data *data = f71882fg_update_device(dev);
1432 int pwm = to_sensor_dev_attr_2(devattr)->index;
1433 int point = to_sensor_dev_attr_2(devattr)->nr;
1434
1435 result = data->pwm_auto_point_temp[pwm][point];
1436 return sprintf(buf, "%d\n", 1000 * result);
1437}
1438
1439static ssize_t store_pwm_auto_point_temp(struct device *dev,
1440 struct device_attribute *devattr,
1441 const char *buf, size_t count)
1442{
ce0bfa5e 1443 struct f71882fg_data *data = dev_get_drvdata(dev);
9ab796eb
MD		 1444 int pwm = to_sensor_dev_attr_2(devattr)->index;
1445 int point = to_sensor_dev_attr_2(devattr)->nr;
1446 long val = simple_strtol(buf, NULL, 10) / 1000;
1447 val = SENSORS_LIMIT(val, 0, 255);
1448
1449 mutex_lock(&data->update_lock);
1450 f71882fg_write8(data, F71882FG_REG_POINT_TEMP(pwm, point), val);
1451 data->pwm_auto_point_temp[pwm][point] = val;
1452 mutex_unlock(&data->update_lock);
1453
1454 return count;
1455}
1456
45fb3669
HG		 1457static ssize_t show_name(struct device *dev, struct device_attribute *devattr,
1458 char *buf)
1459{
498be968
HG		 1460 struct f71882fg_data *data = dev_get_drvdata(dev);
1461 return sprintf(buf, "%s\n", f71882fg_names[data->type]);
45fb3669
HG		 1462}
1463
c13548c5
HG		 1464static int __devinit f71882fg_create_sysfs_files(struct platform_device *pdev,
1465 struct sensor_device_attribute_2 *attr, int count)
1466{
1467 int err, i;
1468
1469 for (i = 0; i < count; i++) {
1470 err = device_create_file(&pdev->dev, &attr[i].dev_attr);
1471 if (err)
1472 return err;
1473 }
1474 return 0;
1475}
45fb3669 1476
c13548c5 1477static int __devinit f71882fg_probe(struct platform_device *pdev)
45fb3669
HG		 1478{
1479 struct f71882fg_data *data;
498be968 1480 struct f71882fg_sio_data *sio_data = pdev->dev.platform_data;
c13548c5 1481 int err;
45fb3669
HG		 1482 u8 start_reg;
1483
c13548c5
HG		 1484 data = kzalloc(sizeof(struct f71882fg_data), GFP_KERNEL);
1485 if (!data)
45fb3669
HG		 1486 return -ENOMEM;
1487
1488 data->addr = platform_get_resource(pdev, IORESOURCE_IO, 0)->start;
498be968 1489 data->type = sio_data->type;
45fb3669
HG		 1490 mutex_init(&data->update_lock);
1491 platform_set_drvdata(pdev, data);
1492
3cc74758 1493 start_reg = f71882fg_read8(data, F71882FG_REG_START);
12d66e84
HG		 1494 if (start_reg & 0x04) {
1495 dev_warn(&pdev->dev, "Hardware monitor is powered down\n");
1496 err = -ENODEV;
1497 goto exit_free;
1498 }
3cc74758
HG		 1499 if (!(start_reg & 0x03)) {
1500 dev_warn(&pdev->dev, "Hardware monitoring not activated\n");
1501 err = -ENODEV;
1502 goto exit_free;
1503 }
1504
1505 /* If it is a 71862 and the fan / pwm part is enabled sanity check
1506 the pwm settings */
1507 if (data->type == f71862fg && (start_reg & 0x02)) {
1508 u8 reg = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
1509 if ((reg & 0x15) != 0x15) {
1510 dev_err(&pdev->dev,
1511 "Invalid (reserved) pwm settings: 0x%02x\n",
1512 (unsigned int)reg);
1513 err = -ENODEV;
1514 goto exit_free;
1515 }
1516 }
1517
45fb3669 1518 /* Register sysfs interface files */
c13548c5
HG		 1519 err = device_create_file(&pdev->dev, &dev_attr_name);
1520 if (err)
1521 goto exit_unregister_sysfs;
45fb3669 1522
45fb3669 1523 if (start_reg & 0x01) {
498be968
HG		 1524 err = f71882fg_create_sysfs_files(pdev, f718x2fg_in_temp_attr,
1525 ARRAY_SIZE(f718x2fg_in_temp_attr));
c13548c5
HG		 1526 if (err)
1527 goto exit_unregister_sysfs;
498be968
HG		 1528
1529 if (data->type == f71882fg) {
1530 err = f71882fg_create_sysfs_files(pdev,
1531 f71882fg_in_temp_attr,
1532 ARRAY_SIZE(f71882fg_in_temp_attr));
1533 if (err)
1534 goto exit_unregister_sysfs;
1535 }
45fb3669
HG		 1536 }
1537
1538 if (start_reg & 0x02) {
498be968
HG		 1539 err = f71882fg_create_sysfs_files(pdev, f718x2fg_fan_attr,
1540 ARRAY_SIZE(f718x2fg_fan_attr));
1541 if (err)
1542 goto exit_unregister_sysfs;
1543
1544 if (data->type == f71862fg) {
1545 err = f71882fg_create_sysfs_files(pdev,
1546 f71862fg_fan_attr,
1547 ARRAY_SIZE(f71862fg_fan_attr));
1548 } else {
1549 err = f71882fg_create_sysfs_files(pdev,
1550 f71882fg_fan_attr,
c13548c5 1551 ARRAY_SIZE(f71882fg_fan_attr));
498be968 1552 }
c13548c5
HG		 1553 if (err)
1554 goto exit_unregister_sysfs;
45fb3669
HG		 1555 }
1556
1beeffe4
TJ		 1557 data->hwmon_dev = hwmon_device_register(&pdev->dev);
1558 if (IS_ERR(data->hwmon_dev)) {
1559 err = PTR_ERR(data->hwmon_dev);
c13548c5 1560 data->hwmon_dev = NULL;
45fb3669
HG		 1561 goto exit_unregister_sysfs;
1562 }
1563
1564 return 0;
1565
1566exit_unregister_sysfs:
c13548c5 1567 f71882fg_remove(pdev); /* Will unregister the sysfs files for us */
3cc74758
HG		 1568 return err; /* f71882fg_remove() also frees our data */
1569exit_free:
1570 kfree(data);
45fb3669
HG		 1571 return err;
1572}
1573
c13548c5 1574static int f71882fg_remove(struct platform_device *pdev)
45fb3669
HG		 1575{
1576 int i;
1577 struct f71882fg_data *data = platform_get_drvdata(pdev);
1578
1579 platform_set_drvdata(pdev, NULL);
c13548c5
HG		 1580 if (data->hwmon_dev)
1581 hwmon_device_unregister(data->hwmon_dev);
45fb3669 1582
c13548c5 1583 device_remove_file(&pdev->dev, &dev_attr_name);
45fb3669 1584
498be968
HG		 1585 for (i = 0; i < ARRAY_SIZE(f718x2fg_in_temp_attr); i++)
1586 device_remove_file(&pdev->dev,
1587 &f718x2fg_in_temp_attr[i].dev_attr);
1588
45fb3669
HG		 1589 for (i = 0; i < ARRAY_SIZE(f71882fg_in_temp_attr); i++)
1590 device_remove_file(&pdev->dev,
1591 &f71882fg_in_temp_attr[i].dev_attr);
1592
498be968
HG		 1593 for (i = 0; i < ARRAY_SIZE(f718x2fg_fan_attr); i++)
1594 device_remove_file(&pdev->dev, &f718x2fg_fan_attr[i].dev_attr);
1595
1596 for (i = 0; i < ARRAY_SIZE(f71862fg_fan_attr); i++)
1597 device_remove_file(&pdev->dev, &f71862fg_fan_attr[i].dev_attr);
1598
45fb3669
HG		 1599 for (i = 0; i < ARRAY_SIZE(f71882fg_fan_attr); i++)
1600 device_remove_file(&pdev->dev, &f71882fg_fan_attr[i].dev_attr);
1601
1602 kfree(data);
1603
1604 return 0;
1605}
1606
498be968
HG		 1607static int __init f71882fg_find(int sioaddr, unsigned short *address,
1608 struct f71882fg_sio_data *sio_data)
45fb3669
HG		 1609{
1610 int err = -ENODEV;
1611 u16 devid;
45fb3669
HG		 1612
1613 superio_enter(sioaddr);
1614
1615 devid = superio_inw(sioaddr, SIO_REG_MANID);
1616 if (devid != SIO_FINTEK_ID) {
1617 printk(KERN_INFO DRVNAME ": Not a Fintek device\n");
1618 goto exit;
1619 }
1620
67b671bc 1621 devid = force_id ? force_id : superio_inw(sioaddr, SIO_REG_DEVID);
498be968
HG		 1622 switch (devid) {
1623 case SIO_F71862_ID:
1624 sio_data->type = f71862fg;
1625 break;
1626 case SIO_F71882_ID:
1627 sio_data->type = f71882fg;
1628 break;
1629 default:
45fb3669
HG		 1630 printk(KERN_INFO DRVNAME ": Unsupported Fintek device\n");
1631 goto exit;
1632 }
1633
1634 superio_select(sioaddr, SIO_F71882FG_LD_HWM);
8afb1049 1635 if (!(superio_inb(sioaddr, SIO_REG_ENABLE) & 0x01)) {
45fb3669
HG		 1636 printk(KERN_WARNING DRVNAME ": Device not activated\n");
1637 goto exit;
1638 }
1639
1640 *address = superio_inw(sioaddr, SIO_REG_ADDR);
1641 if (*address == 0)
1642 {
1643 printk(KERN_WARNING DRVNAME ": Base address not set\n");
1644 goto exit;
1645 }
1646 *address &= ~(REGION_LENGTH - 1); /* Ignore 3 LSB */
1647
45fb3669 1648 err = 0;
498be968
HG		 1649 printk(KERN_INFO DRVNAME ": Found %s chip at %#x, revision %d\n",
1650 f71882fg_names[sio_data->type], (unsigned int)*address,
45fb3669
HG		 1651 (int)superio_inb(sioaddr, SIO_REG_DEVREV));
1652exit:
1653 superio_exit(sioaddr);
1654 return err;
1655}
1656
498be968
HG		 1657static int __init f71882fg_device_add(unsigned short address,
1658 const struct f71882fg_sio_data *sio_data)
45fb3669
HG		 1659{
1660 struct resource res = {
1661 .start = address,
1662 .end = address + REGION_LENGTH - 1,
1663 .flags = IORESOURCE_IO,
1664 };
1665 int err;
1666
1667 f71882fg_pdev = platform_device_alloc(DRVNAME, address);
8afb1049 1668 if (!f71882fg_pdev)
45fb3669
HG		 1669 return -ENOMEM;
1670
1671 res.name = f71882fg_pdev->name;
1672 err = platform_device_add_resources(f71882fg_pdev, &res, 1);
8afb1049 1673 if (err) {
45fb3669
HG		 1674 printk(KERN_ERR DRVNAME ": Device resource addition failed\n");
1675 goto exit_device_put;
1676 }
1677
498be968
HG		 1678 err = platform_device_add_data(f71882fg_pdev, sio_data,
1679 sizeof(struct f71882fg_sio_data));
1680 if (err) {
1681 printk(KERN_ERR DRVNAME ": Platform data allocation failed\n");
1682 goto exit_device_put;
1683 }
1684
45fb3669 1685 err = platform_device_add(f71882fg_pdev);
8afb1049 1686 if (err) {
45fb3669
HG		 1687 printk(KERN_ERR DRVNAME ": Device addition failed\n");
1688 goto exit_device_put;
1689 }
1690
1691 return 0;
1692
1693exit_device_put:
1694 platform_device_put(f71882fg_pdev);
1695
1696 return err;
1697}
1698
1699static int __init f71882fg_init(void)
1700{
1701 int err = -ENODEV;
1702 unsigned short address;
498be968
HG		 1703 struct f71882fg_sio_data sio_data;
1704
1705 memset(&sio_data, 0, sizeof(sio_data));
45fb3669 1706
498be968
HG		 1707 if (f71882fg_find(0x2e, &address, &sio_data) &&
1708 f71882fg_find(0x4e, &address, &sio_data))
45fb3669
HG		 1709 goto exit;
1710
c13548c5
HG		 1711 err = platform_driver_register(&f71882fg_driver);
1712 if (err)
45fb3669
HG		 1713 goto exit;
1714
498be968 1715 err = f71882fg_device_add(address, &sio_data);
c13548c5 1716 if (err)
45fb3669
HG		 1717 goto exit_driver;
1718
1719 return 0;
1720
1721exit_driver:
1722 platform_driver_unregister(&f71882fg_driver);
1723exit:
1724 return err;
1725}
1726
1727static void __exit f71882fg_exit(void)
1728{
1729 platform_device_unregister(f71882fg_pdev);
1730 platform_driver_unregister(&f71882fg_driver);
1731}
1732
1733MODULE_DESCRIPTION("F71882FG Hardware Monitoring Driver");
c13548c5 1734MODULE_AUTHOR("Hans Edgington, Hans de Goede (hdegoede@redhat.com)");
45fb3669
HG		 1735MODULE_LICENSE("GPL");
1736
1737module_init(f71882fg_init);
1738module_exit(f71882fg_exit);
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