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Commit | Line | Data |
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1da177e4 | 1 | /* |
5f2dc798 JD |
2 | * it87.c - Part of lm_sensors, Linux kernel modules for hardware |
3 | * monitoring. | |
4 | * | |
5 | * The IT8705F is an LPC-based Super I/O part that contains UARTs, a | |
6 | * parallel port, an IR port, a MIDI port, a floppy controller, etc., in | |
7 | * addition to an Environment Controller (Enhanced Hardware Monitor and | |
8 | * Fan Controller) | |
9 | * | |
10 | * This driver supports only the Environment Controller in the IT8705F and | |
11 | * similar parts. The other devices are supported by different drivers. | |
12 | * | |
c145d5c6 | 13 | * Supports: IT8603E Super I/O chip w/LPC interface |
574e9bd8 | 14 | * IT8623E Super I/O chip w/LPC interface |
c145d5c6 | 15 | * IT8705F Super I/O chip w/LPC interface |
5f2dc798 JD |
16 | * IT8712F Super I/O chip w/LPC interface |
17 | * IT8716F Super I/O chip w/LPC interface | |
18 | * IT8718F Super I/O chip w/LPC interface | |
19 | * IT8720F Super I/O chip w/LPC interface | |
44c1bcd4 | 20 | * IT8721F Super I/O chip w/LPC interface |
5f2dc798 | 21 | * IT8726F Super I/O chip w/LPC interface |
16b5dda2 | 22 | * IT8728F Super I/O chip w/LPC interface |
44c1bcd4 | 23 | * IT8758E Super I/O chip w/LPC interface |
b0636707 GR |
24 | * IT8771E Super I/O chip w/LPC interface |
25 | * IT8772E Super I/O chip w/LPC interface | |
0531d98b GR |
26 | * IT8782F Super I/O chip w/LPC interface |
27 | * IT8783E/F Super I/O chip w/LPC interface | |
5f2dc798 JD |
28 | * Sis950 A clone of the IT8705F |
29 | * | |
30 | * Copyright (C) 2001 Chris Gauthron | |
7c81c60f | 31 | * Copyright (C) 2005-2010 Jean Delvare <jdelvare@suse.de> |
5f2dc798 JD |
32 | * |
33 | * This program is free software; you can redistribute it and/or modify | |
34 | * it under the terms of the GNU General Public License as published by | |
35 | * the Free Software Foundation; either version 2 of the License, or | |
36 | * (at your option) any later version. | |
37 | * | |
38 | * This program is distributed in the hope that it will be useful, | |
39 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
40 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
41 | * GNU General Public License for more details. | |
42 | * | |
43 | * You should have received a copy of the GNU General Public License | |
44 | * along with this program; if not, write to the Free Software | |
45 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
46 | */ | |
1da177e4 | 47 | |
a8ca1037 JP |
48 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
49 | ||
1da177e4 LT |
50 | #include <linux/module.h> |
51 | #include <linux/init.h> | |
52 | #include <linux/slab.h> | |
53 | #include <linux/jiffies.h> | |
b74f3fdd | 54 | #include <linux/platform_device.h> |
943b0830 | 55 | #include <linux/hwmon.h> |
303760b4 JD |
56 | #include <linux/hwmon-sysfs.h> |
57 | #include <linux/hwmon-vid.h> | |
943b0830 | 58 | #include <linux/err.h> |
9a61bf63 | 59 | #include <linux/mutex.h> |
87808be4 | 60 | #include <linux/sysfs.h> |
98dd22c3 JD |
61 | #include <linux/string.h> |
62 | #include <linux/dmi.h> | |
b9acb64a | 63 | #include <linux/acpi.h> |
6055fae8 | 64 | #include <linux/io.h> |
1da177e4 | 65 | |
b74f3fdd | 66 | #define DRVNAME "it87" |
1da177e4 | 67 | |
b0636707 | 68 | enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8771, |
c145d5c6 | 69 | it8772, it8782, it8783, it8603 }; |
1da177e4 | 70 | |
67b671bc JD |
71 | static unsigned short force_id; |
72 | module_param(force_id, ushort, 0); | |
73 | MODULE_PARM_DESC(force_id, "Override the detected device ID"); | |
74 | ||
b74f3fdd | 75 | static struct platform_device *pdev; |
76 | ||
1da177e4 LT |
77 | #define REG 0x2e /* The register to read/write */ |
78 | #define DEV 0x07 /* Register: Logical device select */ | |
79 | #define VAL 0x2f /* The value to read/write */ | |
80 | #define PME 0x04 /* The device with the fan registers in it */ | |
b4da93e4 JMS |
81 | |
82 | /* The device with the IT8718F/IT8720F VID value in it */ | |
83 | #define GPIO 0x07 | |
84 | ||
1da177e4 LT |
85 | #define DEVID 0x20 /* Register: Device ID */ |
86 | #define DEVREV 0x22 /* Register: Device Revision */ | |
87 | ||
5b0380c9 | 88 | static inline int superio_inb(int reg) |
1da177e4 LT |
89 | { |
90 | outb(reg, REG); | |
91 | return inb(VAL); | |
92 | } | |
93 | ||
5b0380c9 | 94 | static inline void superio_outb(int reg, int val) |
436cad2a JD |
95 | { |
96 | outb(reg, REG); | |
97 | outb(val, VAL); | |
98 | } | |
99 | ||
1da177e4 LT |
100 | static int superio_inw(int reg) |
101 | { | |
102 | int val; | |
103 | outb(reg++, REG); | |
104 | val = inb(VAL) << 8; | |
105 | outb(reg, REG); | |
106 | val |= inb(VAL); | |
107 | return val; | |
108 | } | |
109 | ||
5b0380c9 | 110 | static inline void superio_select(int ldn) |
1da177e4 LT |
111 | { |
112 | outb(DEV, REG); | |
87673dd7 | 113 | outb(ldn, VAL); |
1da177e4 LT |
114 | } |
115 | ||
5b0380c9 | 116 | static inline int superio_enter(void) |
1da177e4 | 117 | { |
5b0380c9 NG |
118 | /* |
119 | * Try to reserve REG and REG + 1 for exclusive access. | |
120 | */ | |
121 | if (!request_muxed_region(REG, 2, DRVNAME)) | |
122 | return -EBUSY; | |
123 | ||
1da177e4 LT |
124 | outb(0x87, REG); |
125 | outb(0x01, REG); | |
126 | outb(0x55, REG); | |
127 | outb(0x55, REG); | |
5b0380c9 | 128 | return 0; |
1da177e4 LT |
129 | } |
130 | ||
5b0380c9 | 131 | static inline void superio_exit(void) |
1da177e4 LT |
132 | { |
133 | outb(0x02, REG); | |
134 | outb(0x02, VAL); | |
5b0380c9 | 135 | release_region(REG, 2); |
1da177e4 LT |
136 | } |
137 | ||
87673dd7 | 138 | /* Logical device 4 registers */ |
1da177e4 LT |
139 | #define IT8712F_DEVID 0x8712 |
140 | #define IT8705F_DEVID 0x8705 | |
17d648bf | 141 | #define IT8716F_DEVID 0x8716 |
87673dd7 | 142 | #define IT8718F_DEVID 0x8718 |
b4da93e4 | 143 | #define IT8720F_DEVID 0x8720 |
44c1bcd4 | 144 | #define IT8721F_DEVID 0x8721 |
08a8f6e9 | 145 | #define IT8726F_DEVID 0x8726 |
16b5dda2 | 146 | #define IT8728F_DEVID 0x8728 |
b0636707 GR |
147 | #define IT8771E_DEVID 0x8771 |
148 | #define IT8772E_DEVID 0x8772 | |
0531d98b GR |
149 | #define IT8782F_DEVID 0x8782 |
150 | #define IT8783E_DEVID 0x8783 | |
7183ae8c | 151 | #define IT8603E_DEVID 0x8603 |
574e9bd8 | 152 | #define IT8623E_DEVID 0x8623 |
1da177e4 LT |
153 | #define IT87_ACT_REG 0x30 |
154 | #define IT87_BASE_REG 0x60 | |
155 | ||
87673dd7 | 156 | /* Logical device 7 registers (IT8712F and later) */ |
0531d98b | 157 | #define IT87_SIO_GPIO1_REG 0x25 |
895ff267 | 158 | #define IT87_SIO_GPIO3_REG 0x27 |
591ec650 | 159 | #define IT87_SIO_GPIO5_REG 0x29 |
0531d98b | 160 | #define IT87_SIO_PINX1_REG 0x2a /* Pin selection */ |
87673dd7 | 161 | #define IT87_SIO_PINX2_REG 0x2c /* Pin selection */ |
0531d98b | 162 | #define IT87_SIO_SPI_REG 0xef /* SPI function pin select */ |
87673dd7 | 163 | #define IT87_SIO_VID_REG 0xfc /* VID value */ |
d9b327c3 | 164 | #define IT87_SIO_BEEP_PIN_REG 0xf6 /* Beep pin mapping */ |
87673dd7 | 165 | |
1da177e4 | 166 | /* Update battery voltage after every reading if true */ |
90ab5ee9 | 167 | static bool update_vbat; |
1da177e4 LT |
168 | |
169 | /* Not all BIOSes properly configure the PWM registers */ | |
90ab5ee9 | 170 | static bool fix_pwm_polarity; |
1da177e4 | 171 | |
1da177e4 LT |
172 | /* Many IT87 constants specified below */ |
173 | ||
174 | /* Length of ISA address segment */ | |
175 | #define IT87_EXTENT 8 | |
176 | ||
87b4b663 BH |
177 | /* Length of ISA address segment for Environmental Controller */ |
178 | #define IT87_EC_EXTENT 2 | |
179 | ||
180 | /* Offset of EC registers from ISA base address */ | |
181 | #define IT87_EC_OFFSET 5 | |
182 | ||
183 | /* Where are the ISA address/data registers relative to the EC base address */ | |
184 | #define IT87_ADDR_REG_OFFSET 0 | |
185 | #define IT87_DATA_REG_OFFSET 1 | |
1da177e4 LT |
186 | |
187 | /*----- The IT87 registers -----*/ | |
188 | ||
189 | #define IT87_REG_CONFIG 0x00 | |
190 | ||
191 | #define IT87_REG_ALARM1 0x01 | |
192 | #define IT87_REG_ALARM2 0x02 | |
193 | #define IT87_REG_ALARM3 0x03 | |
194 | ||
4a0d71cf GR |
195 | /* |
196 | * The IT8718F and IT8720F have the VID value in a different register, in | |
197 | * Super-I/O configuration space. | |
198 | */ | |
1da177e4 | 199 | #define IT87_REG_VID 0x0a |
4a0d71cf GR |
200 | /* |
201 | * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b | |
202 | * for fan divisors. Later IT8712F revisions must use 16-bit tachometer | |
203 | * mode. | |
204 | */ | |
1da177e4 | 205 | #define IT87_REG_FAN_DIV 0x0b |
17d648bf | 206 | #define IT87_REG_FAN_16BIT 0x0c |
1da177e4 LT |
207 | |
208 | /* Monitors: 9 voltage (0 to 7, battery), 3 temp (1 to 3), 3 fan (1 to 3) */ | |
209 | ||
c7f1f716 JD |
210 | static const u8 IT87_REG_FAN[] = { 0x0d, 0x0e, 0x0f, 0x80, 0x82 }; |
211 | static const u8 IT87_REG_FAN_MIN[] = { 0x10, 0x11, 0x12, 0x84, 0x86 }; | |
212 | static const u8 IT87_REG_FANX[] = { 0x18, 0x19, 0x1a, 0x81, 0x83 }; | |
213 | static const u8 IT87_REG_FANX_MIN[] = { 0x1b, 0x1c, 0x1d, 0x85, 0x87 }; | |
161d898a GR |
214 | static const u8 IT87_REG_TEMP_OFFSET[] = { 0x56, 0x57, 0x59 }; |
215 | ||
1da177e4 LT |
216 | #define IT87_REG_FAN_MAIN_CTRL 0x13 |
217 | #define IT87_REG_FAN_CTL 0x14 | |
218 | #define IT87_REG_PWM(nr) (0x15 + (nr)) | |
6229cdb2 | 219 | #define IT87_REG_PWM_DUTY(nr) (0x63 + (nr) * 8) |
1da177e4 LT |
220 | |
221 | #define IT87_REG_VIN(nr) (0x20 + (nr)) | |
222 | #define IT87_REG_TEMP(nr) (0x29 + (nr)) | |
223 | ||
224 | #define IT87_REG_VIN_MAX(nr) (0x30 + (nr) * 2) | |
225 | #define IT87_REG_VIN_MIN(nr) (0x31 + (nr) * 2) | |
226 | #define IT87_REG_TEMP_HIGH(nr) (0x40 + (nr) * 2) | |
227 | #define IT87_REG_TEMP_LOW(nr) (0x41 + (nr) * 2) | |
228 | ||
1da177e4 LT |
229 | #define IT87_REG_VIN_ENABLE 0x50 |
230 | #define IT87_REG_TEMP_ENABLE 0x51 | |
4573acbc | 231 | #define IT87_REG_TEMP_EXTRA 0x55 |
d9b327c3 | 232 | #define IT87_REG_BEEP_ENABLE 0x5c |
1da177e4 LT |
233 | |
234 | #define IT87_REG_CHIPID 0x58 | |
235 | ||
4f3f51bc JD |
236 | #define IT87_REG_AUTO_TEMP(nr, i) (0x60 + (nr) * 8 + (i)) |
237 | #define IT87_REG_AUTO_PWM(nr, i) (0x65 + (nr) * 8 + (i)) | |
238 | ||
483db43e GR |
239 | struct it87_devices { |
240 | const char *name; | |
241 | u16 features; | |
19529784 GR |
242 | u8 peci_mask; |
243 | u8 old_peci_mask; | |
483db43e GR |
244 | }; |
245 | ||
246 | #define FEAT_12MV_ADC (1 << 0) | |
247 | #define FEAT_NEWER_AUTOPWM (1 << 1) | |
248 | #define FEAT_OLD_AUTOPWM (1 << 2) | |
249 | #define FEAT_16BIT_FANS (1 << 3) | |
250 | #define FEAT_TEMP_OFFSET (1 << 4) | |
5d8d2f2b | 251 | #define FEAT_TEMP_PECI (1 << 5) |
19529784 | 252 | #define FEAT_TEMP_OLD_PECI (1 << 6) |
483db43e GR |
253 | |
254 | static const struct it87_devices it87_devices[] = { | |
255 | [it87] = { | |
256 | .name = "it87", | |
257 | .features = FEAT_OLD_AUTOPWM, /* may need to overwrite */ | |
258 | }, | |
259 | [it8712] = { | |
260 | .name = "it8712", | |
261 | .features = FEAT_OLD_AUTOPWM, /* may need to overwrite */ | |
262 | }, | |
263 | [it8716] = { | |
264 | .name = "it8716", | |
265 | .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET, | |
266 | }, | |
267 | [it8718] = { | |
268 | .name = "it8718", | |
19529784 GR |
269 | .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET |
270 | | FEAT_TEMP_OLD_PECI, | |
271 | .old_peci_mask = 0x4, | |
483db43e GR |
272 | }, |
273 | [it8720] = { | |
274 | .name = "it8720", | |
19529784 GR |
275 | .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET |
276 | | FEAT_TEMP_OLD_PECI, | |
277 | .old_peci_mask = 0x4, | |
483db43e GR |
278 | }, |
279 | [it8721] = { | |
280 | .name = "it8721", | |
281 | .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS | |
19529784 | 282 | | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI, |
5d8d2f2b | 283 | .peci_mask = 0x05, |
19529784 | 284 | .old_peci_mask = 0x02, /* Actually reports PCH */ |
483db43e GR |
285 | }, |
286 | [it8728] = { | |
287 | .name = "it8728", | |
288 | .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS | |
5d8d2f2b GR |
289 | | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI, |
290 | .peci_mask = 0x07, | |
483db43e | 291 | }, |
b0636707 GR |
292 | [it8771] = { |
293 | .name = "it8771", | |
294 | .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS | |
295 | | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI, | |
296 | /* PECI: guesswork */ | |
297 | /* 12mV ADC (OHM) */ | |
298 | /* 16 bit fans (OHM) */ | |
299 | .peci_mask = 0x07, | |
300 | }, | |
301 | [it8772] = { | |
302 | .name = "it8772", | |
303 | .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS | |
304 | | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI, | |
305 | /* PECI (coreboot) */ | |
306 | /* 12mV ADC (HWSensors4, OHM) */ | |
307 | /* 16 bit fans (HWSensors4, OHM) */ | |
308 | .peci_mask = 0x07, | |
309 | }, | |
483db43e GR |
310 | [it8782] = { |
311 | .name = "it8782", | |
19529784 GR |
312 | .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET |
313 | | FEAT_TEMP_OLD_PECI, | |
314 | .old_peci_mask = 0x4, | |
483db43e GR |
315 | }, |
316 | [it8783] = { | |
317 | .name = "it8783", | |
19529784 GR |
318 | .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET |
319 | | FEAT_TEMP_OLD_PECI, | |
320 | .old_peci_mask = 0x4, | |
483db43e | 321 | }, |
c145d5c6 RM |
322 | [it8603] = { |
323 | .name = "it8603", | |
324 | .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS | |
325 | | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI, | |
326 | .peci_mask = 0x07, | |
327 | }, | |
483db43e GR |
328 | }; |
329 | ||
330 | #define has_16bit_fans(data) ((data)->features & FEAT_16BIT_FANS) | |
331 | #define has_12mv_adc(data) ((data)->features & FEAT_12MV_ADC) | |
332 | #define has_newer_autopwm(data) ((data)->features & FEAT_NEWER_AUTOPWM) | |
333 | #define has_old_autopwm(data) ((data)->features & FEAT_OLD_AUTOPWM) | |
334 | #define has_temp_offset(data) ((data)->features & FEAT_TEMP_OFFSET) | |
5d8d2f2b GR |
335 | #define has_temp_peci(data, nr) (((data)->features & FEAT_TEMP_PECI) && \ |
336 | ((data)->peci_mask & (1 << nr))) | |
19529784 GR |
337 | #define has_temp_old_peci(data, nr) \ |
338 | (((data)->features & FEAT_TEMP_OLD_PECI) && \ | |
339 | ((data)->old_peci_mask & (1 << nr))) | |
1da177e4 | 340 | |
b74f3fdd | 341 | struct it87_sio_data { |
342 | enum chips type; | |
343 | /* Values read from Super-I/O config space */ | |
0475169c | 344 | u8 revision; |
b74f3fdd | 345 | u8 vid_value; |
d9b327c3 | 346 | u8 beep_pin; |
738e5e05 | 347 | u8 internal; /* Internal sensors can be labeled */ |
591ec650 | 348 | /* Features skipped based on config or DMI */ |
9172b5d1 | 349 | u16 skip_in; |
895ff267 | 350 | u8 skip_vid; |
591ec650 | 351 | u8 skip_fan; |
98dd22c3 | 352 | u8 skip_pwm; |
4573acbc | 353 | u8 skip_temp; |
b74f3fdd | 354 | }; |
355 | ||
4a0d71cf GR |
356 | /* |
357 | * For each registered chip, we need to keep some data in memory. | |
358 | * The structure is dynamically allocated. | |
359 | */ | |
1da177e4 | 360 | struct it87_data { |
1beeffe4 | 361 | struct device *hwmon_dev; |
1da177e4 | 362 | enum chips type; |
483db43e | 363 | u16 features; |
19529784 GR |
364 | u8 peci_mask; |
365 | u8 old_peci_mask; | |
1da177e4 | 366 | |
b74f3fdd | 367 | unsigned short addr; |
368 | const char *name; | |
9a61bf63 | 369 | struct mutex update_lock; |
1da177e4 LT |
370 | char valid; /* !=0 if following fields are valid */ |
371 | unsigned long last_updated; /* In jiffies */ | |
372 | ||
44c1bcd4 | 373 | u16 in_scaled; /* Internal voltage sensors are scaled */ |
c145d5c6 | 374 | u8 in[10][3]; /* [nr][0]=in, [1]=min, [2]=max */ |
9060f8bd | 375 | u8 has_fan; /* Bitfield, fans enabled */ |
e1169ba0 | 376 | u16 fan[5][2]; /* Register values, [nr][0]=fan, [1]=min */ |
4573acbc | 377 | u8 has_temp; /* Bitfield, temp sensors enabled */ |
161d898a | 378 | s8 temp[3][4]; /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */ |
19529784 GR |
379 | u8 sensor; /* Register value (IT87_REG_TEMP_ENABLE) */ |
380 | u8 extra; /* Register value (IT87_REG_TEMP_EXTRA) */ | |
1da177e4 LT |
381 | u8 fan_div[3]; /* Register encoding, shifted right */ |
382 | u8 vid; /* Register encoding, combined */ | |
a7be58a1 | 383 | u8 vrm; |
1da177e4 | 384 | u32 alarms; /* Register encoding, combined */ |
d9b327c3 | 385 | u8 beeps; /* Register encoding */ |
1da177e4 | 386 | u8 fan_main_ctrl; /* Register value */ |
f8d0c19a | 387 | u8 fan_ctl; /* Register value */ |
b99883dc | 388 | |
4a0d71cf GR |
389 | /* |
390 | * The following 3 arrays correspond to the same registers up to | |
6229cdb2 JD |
391 | * the IT8720F. The meaning of bits 6-0 depends on the value of bit |
392 | * 7, and we want to preserve settings on mode changes, so we have | |
393 | * to track all values separately. | |
394 | * Starting with the IT8721F, the manual PWM duty cycles are stored | |
395 | * in separate registers (8-bit values), so the separate tracking | |
396 | * is no longer needed, but it is still done to keep the driver | |
4a0d71cf GR |
397 | * simple. |
398 | */ | |
b99883dc | 399 | u8 pwm_ctrl[3]; /* Register value */ |
6229cdb2 | 400 | u8 pwm_duty[3]; /* Manual PWM value set by user */ |
b99883dc | 401 | u8 pwm_temp_map[3]; /* PWM to temp. chan. mapping (bits 1-0) */ |
4f3f51bc JD |
402 | |
403 | /* Automatic fan speed control registers */ | |
404 | u8 auto_pwm[3][4]; /* [nr][3] is hard-coded */ | |
405 | s8 auto_temp[3][5]; /* [nr][0] is point1_temp_hyst */ | |
1da177e4 | 406 | }; |
0df6454d | 407 | |
0531d98b | 408 | static int adc_lsb(const struct it87_data *data, int nr) |
44c1bcd4 | 409 | { |
0531d98b GR |
410 | int lsb = has_12mv_adc(data) ? 12 : 16; |
411 | if (data->in_scaled & (1 << nr)) | |
412 | lsb <<= 1; | |
413 | return lsb; | |
414 | } | |
44c1bcd4 | 415 | |
0531d98b GR |
416 | static u8 in_to_reg(const struct it87_data *data, int nr, long val) |
417 | { | |
418 | val = DIV_ROUND_CLOSEST(val, adc_lsb(data, nr)); | |
2a844c14 | 419 | return clamp_val(val, 0, 255); |
44c1bcd4 JD |
420 | } |
421 | ||
422 | static int in_from_reg(const struct it87_data *data, int nr, int val) | |
423 | { | |
0531d98b | 424 | return val * adc_lsb(data, nr); |
44c1bcd4 | 425 | } |
0df6454d JD |
426 | |
427 | static inline u8 FAN_TO_REG(long rpm, int div) | |
428 | { | |
429 | if (rpm == 0) | |
430 | return 255; | |
2a844c14 GR |
431 | rpm = clamp_val(rpm, 1, 1000000); |
432 | return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254); | |
0df6454d JD |
433 | } |
434 | ||
435 | static inline u16 FAN16_TO_REG(long rpm) | |
436 | { | |
437 | if (rpm == 0) | |
438 | return 0xffff; | |
2a844c14 | 439 | return clamp_val((1350000 + rpm) / (rpm * 2), 1, 0xfffe); |
0df6454d JD |
440 | } |
441 | ||
442 | #define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \ | |
443 | 1350000 / ((val) * (div))) | |
444 | /* The divider is fixed to 2 in 16-bit mode */ | |
445 | #define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \ | |
446 | 1350000 / ((val) * 2)) | |
447 | ||
2a844c14 GR |
448 | #define TEMP_TO_REG(val) (clamp_val(((val) < 0 ? (((val) - 500) / 1000) : \ |
449 | ((val) + 500) / 1000), -128, 127)) | |
0df6454d JD |
450 | #define TEMP_FROM_REG(val) ((val) * 1000) |
451 | ||
44c1bcd4 JD |
452 | static u8 pwm_to_reg(const struct it87_data *data, long val) |
453 | { | |
16b5dda2 | 454 | if (has_newer_autopwm(data)) |
44c1bcd4 JD |
455 | return val; |
456 | else | |
457 | return val >> 1; | |
458 | } | |
459 | ||
460 | static int pwm_from_reg(const struct it87_data *data, u8 reg) | |
461 | { | |
16b5dda2 | 462 | if (has_newer_autopwm(data)) |
44c1bcd4 JD |
463 | return reg; |
464 | else | |
465 | return (reg & 0x7f) << 1; | |
466 | } | |
467 | ||
0df6454d JD |
468 | |
469 | static int DIV_TO_REG(int val) | |
470 | { | |
471 | int answer = 0; | |
472 | while (answer < 7 && (val >>= 1)) | |
473 | answer++; | |
474 | return answer; | |
475 | } | |
476 | #define DIV_FROM_REG(val) (1 << (val)) | |
477 | ||
478 | static const unsigned int pwm_freq[8] = { | |
479 | 48000000 / 128, | |
480 | 24000000 / 128, | |
481 | 12000000 / 128, | |
482 | 8000000 / 128, | |
483 | 6000000 / 128, | |
484 | 3000000 / 128, | |
485 | 1500000 / 128, | |
486 | 750000 / 128, | |
487 | }; | |
1da177e4 | 488 | |
b74f3fdd | 489 | static int it87_probe(struct platform_device *pdev); |
281dfd0b | 490 | static int it87_remove(struct platform_device *pdev); |
1da177e4 | 491 | |
b74f3fdd | 492 | static int it87_read_value(struct it87_data *data, u8 reg); |
493 | static void it87_write_value(struct it87_data *data, u8 reg, u8 value); | |
1da177e4 | 494 | static struct it87_data *it87_update_device(struct device *dev); |
b74f3fdd | 495 | static int it87_check_pwm(struct device *dev); |
496 | static void it87_init_device(struct platform_device *pdev); | |
1da177e4 LT |
497 | |
498 | ||
b74f3fdd | 499 | static struct platform_driver it87_driver = { |
cdaf7934 | 500 | .driver = { |
87218842 | 501 | .owner = THIS_MODULE, |
b74f3fdd | 502 | .name = DRVNAME, |
cdaf7934 | 503 | }, |
b74f3fdd | 504 | .probe = it87_probe, |
9e5e9b7a | 505 | .remove = it87_remove, |
fde09509 JD |
506 | }; |
507 | ||
20ad93d4 | 508 | static ssize_t show_in(struct device *dev, struct device_attribute *attr, |
929c6a56 | 509 | char *buf) |
1da177e4 | 510 | { |
929c6a56 GR |
511 | struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); |
512 | int nr = sattr->nr; | |
513 | int index = sattr->index; | |
20ad93d4 | 514 | |
1da177e4 | 515 | struct it87_data *data = it87_update_device(dev); |
929c6a56 | 516 | return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr][index])); |
1da177e4 LT |
517 | } |
518 | ||
929c6a56 GR |
519 | static ssize_t set_in(struct device *dev, struct device_attribute *attr, |
520 | const char *buf, size_t count) | |
1da177e4 | 521 | { |
929c6a56 GR |
522 | struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); |
523 | int nr = sattr->nr; | |
524 | int index = sattr->index; | |
20ad93d4 | 525 | |
b74f3fdd | 526 | struct it87_data *data = dev_get_drvdata(dev); |
f5f64501 JD |
527 | unsigned long val; |
528 | ||
179c4fdb | 529 | if (kstrtoul(buf, 10, &val) < 0) |
f5f64501 | 530 | return -EINVAL; |
1da177e4 | 531 | |
9a61bf63 | 532 | mutex_lock(&data->update_lock); |
929c6a56 GR |
533 | data->in[nr][index] = in_to_reg(data, nr, val); |
534 | it87_write_value(data, | |
535 | index == 1 ? IT87_REG_VIN_MIN(nr) | |
536 | : IT87_REG_VIN_MAX(nr), | |
537 | data->in[nr][index]); | |
9a61bf63 | 538 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
539 | return count; |
540 | } | |
20ad93d4 | 541 | |
929c6a56 GR |
542 | static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0); |
543 | static SENSOR_DEVICE_ATTR_2(in0_min, S_IRUGO | S_IWUSR, show_in, set_in, | |
544 | 0, 1); | |
545 | static SENSOR_DEVICE_ATTR_2(in0_max, S_IRUGO | S_IWUSR, show_in, set_in, | |
546 | 0, 2); | |
f5f64501 | 547 | |
929c6a56 GR |
548 | static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 1, 0); |
549 | static SENSOR_DEVICE_ATTR_2(in1_min, S_IRUGO | S_IWUSR, show_in, set_in, | |
550 | 1, 1); | |
551 | static SENSOR_DEVICE_ATTR_2(in1_max, S_IRUGO | S_IWUSR, show_in, set_in, | |
552 | 1, 2); | |
1da177e4 | 553 | |
929c6a56 GR |
554 | static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 2, 0); |
555 | static SENSOR_DEVICE_ATTR_2(in2_min, S_IRUGO | S_IWUSR, show_in, set_in, | |
556 | 2, 1); | |
557 | static SENSOR_DEVICE_ATTR_2(in2_max, S_IRUGO | S_IWUSR, show_in, set_in, | |
558 | 2, 2); | |
1da177e4 | 559 | |
929c6a56 GR |
560 | static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 3, 0); |
561 | static SENSOR_DEVICE_ATTR_2(in3_min, S_IRUGO | S_IWUSR, show_in, set_in, | |
562 | 3, 1); | |
563 | static SENSOR_DEVICE_ATTR_2(in3_max, S_IRUGO | S_IWUSR, show_in, set_in, | |
564 | 3, 2); | |
565 | ||
566 | static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 4, 0); | |
567 | static SENSOR_DEVICE_ATTR_2(in4_min, S_IRUGO | S_IWUSR, show_in, set_in, | |
568 | 4, 1); | |
569 | static SENSOR_DEVICE_ATTR_2(in4_max, S_IRUGO | S_IWUSR, show_in, set_in, | |
570 | 4, 2); | |
571 | ||
572 | static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 5, 0); | |
573 | static SENSOR_DEVICE_ATTR_2(in5_min, S_IRUGO | S_IWUSR, show_in, set_in, | |
574 | 5, 1); | |
575 | static SENSOR_DEVICE_ATTR_2(in5_max, S_IRUGO | S_IWUSR, show_in, set_in, | |
576 | 5, 2); | |
577 | ||
578 | static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 6, 0); | |
579 | static SENSOR_DEVICE_ATTR_2(in6_min, S_IRUGO | S_IWUSR, show_in, set_in, | |
580 | 6, 1); | |
581 | static SENSOR_DEVICE_ATTR_2(in6_max, S_IRUGO | S_IWUSR, show_in, set_in, | |
582 | 6, 2); | |
583 | ||
584 | static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 7, 0); | |
585 | static SENSOR_DEVICE_ATTR_2(in7_min, S_IRUGO | S_IWUSR, show_in, set_in, | |
586 | 7, 1); | |
587 | static SENSOR_DEVICE_ATTR_2(in7_max, S_IRUGO | S_IWUSR, show_in, set_in, | |
588 | 7, 2); | |
589 | ||
590 | static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 8, 0); | |
c145d5c6 | 591 | static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in, NULL, 9, 0); |
1da177e4 LT |
592 | |
593 | /* 3 temperatures */ | |
20ad93d4 | 594 | static ssize_t show_temp(struct device *dev, struct device_attribute *attr, |
60ca385a | 595 | char *buf) |
1da177e4 | 596 | { |
60ca385a GR |
597 | struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); |
598 | int nr = sattr->nr; | |
599 | int index = sattr->index; | |
1da177e4 | 600 | struct it87_data *data = it87_update_device(dev); |
20ad93d4 | 601 | |
60ca385a | 602 | return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index])); |
1da177e4 | 603 | } |
20ad93d4 | 604 | |
60ca385a GR |
605 | static ssize_t set_temp(struct device *dev, struct device_attribute *attr, |
606 | const char *buf, size_t count) | |
1da177e4 | 607 | { |
60ca385a GR |
608 | struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); |
609 | int nr = sattr->nr; | |
610 | int index = sattr->index; | |
b74f3fdd | 611 | struct it87_data *data = dev_get_drvdata(dev); |
f5f64501 | 612 | long val; |
161d898a | 613 | u8 reg, regval; |
f5f64501 | 614 | |
179c4fdb | 615 | if (kstrtol(buf, 10, &val) < 0) |
f5f64501 | 616 | return -EINVAL; |
1da177e4 | 617 | |
9a61bf63 | 618 | mutex_lock(&data->update_lock); |
161d898a GR |
619 | |
620 | switch (index) { | |
621 | default: | |
622 | case 1: | |
623 | reg = IT87_REG_TEMP_LOW(nr); | |
624 | break; | |
625 | case 2: | |
626 | reg = IT87_REG_TEMP_HIGH(nr); | |
627 | break; | |
628 | case 3: | |
629 | regval = it87_read_value(data, IT87_REG_BEEP_ENABLE); | |
630 | if (!(regval & 0x80)) { | |
631 | regval |= 0x80; | |
632 | it87_write_value(data, IT87_REG_BEEP_ENABLE, regval); | |
633 | } | |
634 | data->valid = 0; | |
635 | reg = IT87_REG_TEMP_OFFSET[nr]; | |
636 | break; | |
637 | } | |
638 | ||
60ca385a | 639 | data->temp[nr][index] = TEMP_TO_REG(val); |
161d898a | 640 | it87_write_value(data, reg, data->temp[nr][index]); |
9a61bf63 | 641 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
642 | return count; |
643 | } | |
1da177e4 | 644 | |
60ca385a GR |
645 | static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0); |
646 | static SENSOR_DEVICE_ATTR_2(temp1_min, S_IRUGO | S_IWUSR, show_temp, set_temp, | |
647 | 0, 1); | |
648 | static SENSOR_DEVICE_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, set_temp, | |
649 | 0, 2); | |
161d898a GR |
650 | static SENSOR_DEVICE_ATTR_2(temp1_offset, S_IRUGO | S_IWUSR, show_temp, |
651 | set_temp, 0, 3); | |
60ca385a GR |
652 | static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0); |
653 | static SENSOR_DEVICE_ATTR_2(temp2_min, S_IRUGO | S_IWUSR, show_temp, set_temp, | |
654 | 1, 1); | |
655 | static SENSOR_DEVICE_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, set_temp, | |
656 | 1, 2); | |
161d898a GR |
657 | static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IRUGO | S_IWUSR, show_temp, |
658 | set_temp, 1, 3); | |
60ca385a GR |
659 | static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0); |
660 | static SENSOR_DEVICE_ATTR_2(temp3_min, S_IRUGO | S_IWUSR, show_temp, set_temp, | |
661 | 2, 1); | |
662 | static SENSOR_DEVICE_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, set_temp, | |
663 | 2, 2); | |
161d898a GR |
664 | static SENSOR_DEVICE_ATTR_2(temp3_offset, S_IRUGO | S_IWUSR, show_temp, |
665 | set_temp, 2, 3); | |
1da177e4 | 666 | |
2cece01f GR |
667 | static ssize_t show_temp_type(struct device *dev, struct device_attribute *attr, |
668 | char *buf) | |
1da177e4 | 669 | { |
20ad93d4 JD |
670 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); |
671 | int nr = sensor_attr->index; | |
1da177e4 | 672 | struct it87_data *data = it87_update_device(dev); |
4a0d71cf | 673 | u8 reg = data->sensor; /* In case value is updated while used */ |
19529784 | 674 | u8 extra = data->extra; |
5f2dc798 | 675 | |
19529784 GR |
676 | if ((has_temp_peci(data, nr) && (reg >> 6 == nr + 1)) |
677 | || (has_temp_old_peci(data, nr) && (extra & 0x80))) | |
5d8d2f2b | 678 | return sprintf(buf, "6\n"); /* Intel PECI */ |
1da177e4 LT |
679 | if (reg & (1 << nr)) |
680 | return sprintf(buf, "3\n"); /* thermal diode */ | |
681 | if (reg & (8 << nr)) | |
4ed10779 | 682 | return sprintf(buf, "4\n"); /* thermistor */ |
1da177e4 LT |
683 | return sprintf(buf, "0\n"); /* disabled */ |
684 | } | |
2cece01f GR |
685 | |
686 | static ssize_t set_temp_type(struct device *dev, struct device_attribute *attr, | |
687 | const char *buf, size_t count) | |
1da177e4 | 688 | { |
20ad93d4 JD |
689 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); |
690 | int nr = sensor_attr->index; | |
691 | ||
b74f3fdd | 692 | struct it87_data *data = dev_get_drvdata(dev); |
f5f64501 | 693 | long val; |
19529784 | 694 | u8 reg, extra; |
f5f64501 | 695 | |
179c4fdb | 696 | if (kstrtol(buf, 10, &val) < 0) |
f5f64501 | 697 | return -EINVAL; |
1da177e4 | 698 | |
8acf07c5 JD |
699 | reg = it87_read_value(data, IT87_REG_TEMP_ENABLE); |
700 | reg &= ~(1 << nr); | |
701 | reg &= ~(8 << nr); | |
5d8d2f2b GR |
702 | if (has_temp_peci(data, nr) && (reg >> 6 == nr + 1 || val == 6)) |
703 | reg &= 0x3f; | |
19529784 GR |
704 | extra = it87_read_value(data, IT87_REG_TEMP_EXTRA); |
705 | if (has_temp_old_peci(data, nr) && ((extra & 0x80) || val == 6)) | |
706 | extra &= 0x7f; | |
4ed10779 | 707 | if (val == 2) { /* backwards compatibility */ |
1d9bcf6a GR |
708 | dev_warn(dev, |
709 | "Sensor type 2 is deprecated, please use 4 instead\n"); | |
4ed10779 JD |
710 | val = 4; |
711 | } | |
5d8d2f2b | 712 | /* 3 = thermal diode; 4 = thermistor; 6 = Intel PECI; 0 = disabled */ |
1da177e4 | 713 | if (val == 3) |
8acf07c5 | 714 | reg |= 1 << nr; |
4ed10779 | 715 | else if (val == 4) |
8acf07c5 | 716 | reg |= 8 << nr; |
5d8d2f2b GR |
717 | else if (has_temp_peci(data, nr) && val == 6) |
718 | reg |= (nr + 1) << 6; | |
19529784 GR |
719 | else if (has_temp_old_peci(data, nr) && val == 6) |
720 | extra |= 0x80; | |
8acf07c5 | 721 | else if (val != 0) |
1da177e4 | 722 | return -EINVAL; |
8acf07c5 JD |
723 | |
724 | mutex_lock(&data->update_lock); | |
725 | data->sensor = reg; | |
19529784 | 726 | data->extra = extra; |
b74f3fdd | 727 | it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor); |
19529784 GR |
728 | if (has_temp_old_peci(data, nr)) |
729 | it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra); | |
2b3d1d87 | 730 | data->valid = 0; /* Force cache refresh */ |
9a61bf63 | 731 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
732 | return count; |
733 | } | |
1da177e4 | 734 | |
2cece01f GR |
735 | static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type, |
736 | set_temp_type, 0); | |
737 | static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type, | |
738 | set_temp_type, 1); | |
739 | static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type, | |
740 | set_temp_type, 2); | |
1da177e4 LT |
741 | |
742 | /* 3 Fans */ | |
b99883dc JD |
743 | |
744 | static int pwm_mode(const struct it87_data *data, int nr) | |
745 | { | |
746 | int ctrl = data->fan_main_ctrl & (1 << nr); | |
747 | ||
c145d5c6 | 748 | if (ctrl == 0 && data->type != it8603) /* Full speed */ |
b99883dc JD |
749 | return 0; |
750 | if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */ | |
751 | return 2; | |
752 | else /* Manual mode */ | |
753 | return 1; | |
754 | } | |
755 | ||
20ad93d4 | 756 | static ssize_t show_fan(struct device *dev, struct device_attribute *attr, |
e1169ba0 | 757 | char *buf) |
1da177e4 | 758 | { |
e1169ba0 GR |
759 | struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); |
760 | int nr = sattr->nr; | |
761 | int index = sattr->index; | |
762 | int speed; | |
1da177e4 | 763 | struct it87_data *data = it87_update_device(dev); |
20ad93d4 | 764 | |
e1169ba0 GR |
765 | speed = has_16bit_fans(data) ? |
766 | FAN16_FROM_REG(data->fan[nr][index]) : | |
767 | FAN_FROM_REG(data->fan[nr][index], | |
768 | DIV_FROM_REG(data->fan_div[nr])); | |
769 | return sprintf(buf, "%d\n", speed); | |
1da177e4 | 770 | } |
e1169ba0 | 771 | |
20ad93d4 JD |
772 | static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr, |
773 | char *buf) | |
1da177e4 | 774 | { |
20ad93d4 JD |
775 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); |
776 | int nr = sensor_attr->index; | |
777 | ||
1da177e4 LT |
778 | struct it87_data *data = it87_update_device(dev); |
779 | return sprintf(buf, "%d\n", DIV_FROM_REG(data->fan_div[nr])); | |
780 | } | |
5f2dc798 JD |
781 | static ssize_t show_pwm_enable(struct device *dev, |
782 | struct device_attribute *attr, char *buf) | |
1da177e4 | 783 | { |
20ad93d4 JD |
784 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); |
785 | int nr = sensor_attr->index; | |
786 | ||
1da177e4 | 787 | struct it87_data *data = it87_update_device(dev); |
b99883dc | 788 | return sprintf(buf, "%d\n", pwm_mode(data, nr)); |
1da177e4 | 789 | } |
20ad93d4 JD |
790 | static ssize_t show_pwm(struct device *dev, struct device_attribute *attr, |
791 | char *buf) | |
1da177e4 | 792 | { |
20ad93d4 JD |
793 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); |
794 | int nr = sensor_attr->index; | |
795 | ||
1da177e4 | 796 | struct it87_data *data = it87_update_device(dev); |
44c1bcd4 JD |
797 | return sprintf(buf, "%d\n", |
798 | pwm_from_reg(data, data->pwm_duty[nr])); | |
1da177e4 | 799 | } |
f8d0c19a JD |
800 | static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr, |
801 | char *buf) | |
802 | { | |
803 | struct it87_data *data = it87_update_device(dev); | |
804 | int index = (data->fan_ctl >> 4) & 0x07; | |
805 | ||
806 | return sprintf(buf, "%u\n", pwm_freq[index]); | |
807 | } | |
e1169ba0 GR |
808 | |
809 | static ssize_t set_fan(struct device *dev, struct device_attribute *attr, | |
810 | const char *buf, size_t count) | |
1da177e4 | 811 | { |
e1169ba0 GR |
812 | struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); |
813 | int nr = sattr->nr; | |
814 | int index = sattr->index; | |
20ad93d4 | 815 | |
b74f3fdd | 816 | struct it87_data *data = dev_get_drvdata(dev); |
f5f64501 | 817 | long val; |
7f999aa7 | 818 | u8 reg; |
1da177e4 | 819 | |
179c4fdb | 820 | if (kstrtol(buf, 10, &val) < 0) |
f5f64501 JD |
821 | return -EINVAL; |
822 | ||
9a61bf63 | 823 | mutex_lock(&data->update_lock); |
e1169ba0 GR |
824 | |
825 | if (has_16bit_fans(data)) { | |
826 | data->fan[nr][index] = FAN16_TO_REG(val); | |
827 | it87_write_value(data, IT87_REG_FAN_MIN[nr], | |
828 | data->fan[nr][index] & 0xff); | |
829 | it87_write_value(data, IT87_REG_FANX_MIN[nr], | |
830 | data->fan[nr][index] >> 8); | |
831 | } else { | |
832 | reg = it87_read_value(data, IT87_REG_FAN_DIV); | |
833 | switch (nr) { | |
834 | case 0: | |
835 | data->fan_div[nr] = reg & 0x07; | |
836 | break; | |
837 | case 1: | |
838 | data->fan_div[nr] = (reg >> 3) & 0x07; | |
839 | break; | |
840 | case 2: | |
841 | data->fan_div[nr] = (reg & 0x40) ? 3 : 1; | |
842 | break; | |
843 | } | |
844 | data->fan[nr][index] = | |
845 | FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr])); | |
846 | it87_write_value(data, IT87_REG_FAN_MIN[nr], | |
847 | data->fan[nr][index]); | |
07eab46d JD |
848 | } |
849 | ||
9a61bf63 | 850 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
851 | return count; |
852 | } | |
e1169ba0 | 853 | |
20ad93d4 JD |
854 | static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr, |
855 | const char *buf, size_t count) | |
1da177e4 | 856 | { |
20ad93d4 JD |
857 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); |
858 | int nr = sensor_attr->index; | |
859 | ||
b74f3fdd | 860 | struct it87_data *data = dev_get_drvdata(dev); |
f5f64501 | 861 | unsigned long val; |
8ab4ec3e | 862 | int min; |
1da177e4 LT |
863 | u8 old; |
864 | ||
179c4fdb | 865 | if (kstrtoul(buf, 10, &val) < 0) |
f5f64501 JD |
866 | return -EINVAL; |
867 | ||
9a61bf63 | 868 | mutex_lock(&data->update_lock); |
b74f3fdd | 869 | old = it87_read_value(data, IT87_REG_FAN_DIV); |
1da177e4 | 870 | |
8ab4ec3e | 871 | /* Save fan min limit */ |
e1169ba0 | 872 | min = FAN_FROM_REG(data->fan[nr][1], DIV_FROM_REG(data->fan_div[nr])); |
1da177e4 LT |
873 | |
874 | switch (nr) { | |
875 | case 0: | |
876 | case 1: | |
877 | data->fan_div[nr] = DIV_TO_REG(val); | |
878 | break; | |
879 | case 2: | |
880 | if (val < 8) | |
881 | data->fan_div[nr] = 1; | |
882 | else | |
883 | data->fan_div[nr] = 3; | |
884 | } | |
885 | val = old & 0x80; | |
886 | val |= (data->fan_div[0] & 0x07); | |
887 | val |= (data->fan_div[1] & 0x07) << 3; | |
888 | if (data->fan_div[2] == 3) | |
889 | val |= 0x1 << 6; | |
b74f3fdd | 890 | it87_write_value(data, IT87_REG_FAN_DIV, val); |
1da177e4 | 891 | |
8ab4ec3e | 892 | /* Restore fan min limit */ |
e1169ba0 GR |
893 | data->fan[nr][1] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr])); |
894 | it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan[nr][1]); | |
8ab4ec3e | 895 | |
9a61bf63 | 896 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
897 | return count; |
898 | } | |
cccfc9c4 JD |
899 | |
900 | /* Returns 0 if OK, -EINVAL otherwise */ | |
901 | static int check_trip_points(struct device *dev, int nr) | |
902 | { | |
903 | const struct it87_data *data = dev_get_drvdata(dev); | |
904 | int i, err = 0; | |
905 | ||
906 | if (has_old_autopwm(data)) { | |
907 | for (i = 0; i < 3; i++) { | |
908 | if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1]) | |
909 | err = -EINVAL; | |
910 | } | |
911 | for (i = 0; i < 2; i++) { | |
912 | if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1]) | |
913 | err = -EINVAL; | |
914 | } | |
915 | } | |
916 | ||
917 | if (err) { | |
1d9bcf6a GR |
918 | dev_err(dev, |
919 | "Inconsistent trip points, not switching to automatic mode\n"); | |
cccfc9c4 JD |
920 | dev_err(dev, "Adjust the trip points and try again\n"); |
921 | } | |
922 | return err; | |
923 | } | |
924 | ||
20ad93d4 JD |
925 | static ssize_t set_pwm_enable(struct device *dev, |
926 | struct device_attribute *attr, const char *buf, size_t count) | |
1da177e4 | 927 | { |
20ad93d4 JD |
928 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); |
929 | int nr = sensor_attr->index; | |
930 | ||
b74f3fdd | 931 | struct it87_data *data = dev_get_drvdata(dev); |
f5f64501 | 932 | long val; |
1da177e4 | 933 | |
179c4fdb | 934 | if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2) |
b99883dc JD |
935 | return -EINVAL; |
936 | ||
cccfc9c4 JD |
937 | /* Check trip points before switching to automatic mode */ |
938 | if (val == 2) { | |
939 | if (check_trip_points(dev, nr) < 0) | |
940 | return -EINVAL; | |
941 | } | |
942 | ||
c145d5c6 RM |
943 | /* IT8603E does not have on/off mode */ |
944 | if (val == 0 && data->type == it8603) | |
945 | return -EINVAL; | |
946 | ||
9a61bf63 | 947 | mutex_lock(&data->update_lock); |
1da177e4 LT |
948 | |
949 | if (val == 0) { | |
950 | int tmp; | |
951 | /* make sure the fan is on when in on/off mode */ | |
b74f3fdd | 952 | tmp = it87_read_value(data, IT87_REG_FAN_CTL); |
953 | it87_write_value(data, IT87_REG_FAN_CTL, tmp | (1 << nr)); | |
1da177e4 LT |
954 | /* set on/off mode */ |
955 | data->fan_main_ctrl &= ~(1 << nr); | |
5f2dc798 JD |
956 | it87_write_value(data, IT87_REG_FAN_MAIN_CTRL, |
957 | data->fan_main_ctrl); | |
b99883dc JD |
958 | } else { |
959 | if (val == 1) /* Manual mode */ | |
16b5dda2 | 960 | data->pwm_ctrl[nr] = has_newer_autopwm(data) ? |
6229cdb2 JD |
961 | data->pwm_temp_map[nr] : |
962 | data->pwm_duty[nr]; | |
b99883dc JD |
963 | else /* Automatic mode */ |
964 | data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr]; | |
965 | it87_write_value(data, IT87_REG_PWM(nr), data->pwm_ctrl[nr]); | |
c145d5c6 RM |
966 | |
967 | if (data->type != it8603) { | |
968 | /* set SmartGuardian mode */ | |
969 | data->fan_main_ctrl |= (1 << nr); | |
970 | it87_write_value(data, IT87_REG_FAN_MAIN_CTRL, | |
971 | data->fan_main_ctrl); | |
972 | } | |
1da177e4 LT |
973 | } |
974 | ||
9a61bf63 | 975 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
976 | return count; |
977 | } | |
20ad93d4 JD |
978 | static ssize_t set_pwm(struct device *dev, struct device_attribute *attr, |
979 | const char *buf, size_t count) | |
1da177e4 | 980 | { |
20ad93d4 JD |
981 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); |
982 | int nr = sensor_attr->index; | |
983 | ||
b74f3fdd | 984 | struct it87_data *data = dev_get_drvdata(dev); |
f5f64501 | 985 | long val; |
1da177e4 | 986 | |
179c4fdb | 987 | if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255) |
1da177e4 LT |
988 | return -EINVAL; |
989 | ||
9a61bf63 | 990 | mutex_lock(&data->update_lock); |
16b5dda2 | 991 | if (has_newer_autopwm(data)) { |
4a0d71cf GR |
992 | /* |
993 | * If we are in automatic mode, the PWM duty cycle register | |
994 | * is read-only so we can't write the value. | |
995 | */ | |
6229cdb2 JD |
996 | if (data->pwm_ctrl[nr] & 0x80) { |
997 | mutex_unlock(&data->update_lock); | |
998 | return -EBUSY; | |
999 | } | |
1000 | data->pwm_duty[nr] = pwm_to_reg(data, val); | |
1001 | it87_write_value(data, IT87_REG_PWM_DUTY(nr), | |
1002 | data->pwm_duty[nr]); | |
1003 | } else { | |
1004 | data->pwm_duty[nr] = pwm_to_reg(data, val); | |
4a0d71cf GR |
1005 | /* |
1006 | * If we are in manual mode, write the duty cycle immediately; | |
1007 | * otherwise, just store it for later use. | |
1008 | */ | |
6229cdb2 JD |
1009 | if (!(data->pwm_ctrl[nr] & 0x80)) { |
1010 | data->pwm_ctrl[nr] = data->pwm_duty[nr]; | |
1011 | it87_write_value(data, IT87_REG_PWM(nr), | |
1012 | data->pwm_ctrl[nr]); | |
1013 | } | |
b99883dc | 1014 | } |
9a61bf63 | 1015 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
1016 | return count; |
1017 | } | |
f8d0c19a JD |
1018 | static ssize_t set_pwm_freq(struct device *dev, |
1019 | struct device_attribute *attr, const char *buf, size_t count) | |
1020 | { | |
b74f3fdd | 1021 | struct it87_data *data = dev_get_drvdata(dev); |
f5f64501 | 1022 | unsigned long val; |
f8d0c19a JD |
1023 | int i; |
1024 | ||
179c4fdb | 1025 | if (kstrtoul(buf, 10, &val) < 0) |
f5f64501 JD |
1026 | return -EINVAL; |
1027 | ||
f8d0c19a JD |
1028 | /* Search for the nearest available frequency */ |
1029 | for (i = 0; i < 7; i++) { | |
1030 | if (val > (pwm_freq[i] + pwm_freq[i+1]) / 2) | |
1031 | break; | |
1032 | } | |
1033 | ||
1034 | mutex_lock(&data->update_lock); | |
b74f3fdd | 1035 | data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f; |
f8d0c19a | 1036 | data->fan_ctl |= i << 4; |
b74f3fdd | 1037 | it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl); |
f8d0c19a JD |
1038 | mutex_unlock(&data->update_lock); |
1039 | ||
1040 | return count; | |
1041 | } | |
94ac7ee6 JD |
1042 | static ssize_t show_pwm_temp_map(struct device *dev, |
1043 | struct device_attribute *attr, char *buf) | |
1044 | { | |
1045 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); | |
1046 | int nr = sensor_attr->index; | |
1047 | ||
1048 | struct it87_data *data = it87_update_device(dev); | |
1049 | int map; | |
1050 | ||
1051 | if (data->pwm_temp_map[nr] < 3) | |
1052 | map = 1 << data->pwm_temp_map[nr]; | |
1053 | else | |
1054 | map = 0; /* Should never happen */ | |
1055 | return sprintf(buf, "%d\n", map); | |
1056 | } | |
1057 | static ssize_t set_pwm_temp_map(struct device *dev, | |
1058 | struct device_attribute *attr, const char *buf, size_t count) | |
1059 | { | |
1060 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); | |
1061 | int nr = sensor_attr->index; | |
1062 | ||
1063 | struct it87_data *data = dev_get_drvdata(dev); | |
1064 | long val; | |
1065 | u8 reg; | |
1066 | ||
4a0d71cf GR |
1067 | /* |
1068 | * This check can go away if we ever support automatic fan speed | |
1069 | * control on newer chips. | |
1070 | */ | |
4f3f51bc JD |
1071 | if (!has_old_autopwm(data)) { |
1072 | dev_notice(dev, "Mapping change disabled for safety reasons\n"); | |
1073 | return -EINVAL; | |
1074 | } | |
1075 | ||
179c4fdb | 1076 | if (kstrtol(buf, 10, &val) < 0) |
94ac7ee6 JD |
1077 | return -EINVAL; |
1078 | ||
1079 | switch (val) { | |
1080 | case (1 << 0): | |
1081 | reg = 0x00; | |
1082 | break; | |
1083 | case (1 << 1): | |
1084 | reg = 0x01; | |
1085 | break; | |
1086 | case (1 << 2): | |
1087 | reg = 0x02; | |
1088 | break; | |
1089 | default: | |
1090 | return -EINVAL; | |
1091 | } | |
1092 | ||
1093 | mutex_lock(&data->update_lock); | |
1094 | data->pwm_temp_map[nr] = reg; | |
4a0d71cf GR |
1095 | /* |
1096 | * If we are in automatic mode, write the temp mapping immediately; | |
1097 | * otherwise, just store it for later use. | |
1098 | */ | |
94ac7ee6 JD |
1099 | if (data->pwm_ctrl[nr] & 0x80) { |
1100 | data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr]; | |
1101 | it87_write_value(data, IT87_REG_PWM(nr), data->pwm_ctrl[nr]); | |
1102 | } | |
1103 | mutex_unlock(&data->update_lock); | |
1104 | return count; | |
1105 | } | |
1da177e4 | 1106 | |
4f3f51bc JD |
1107 | static ssize_t show_auto_pwm(struct device *dev, |
1108 | struct device_attribute *attr, char *buf) | |
1109 | { | |
1110 | struct it87_data *data = it87_update_device(dev); | |
1111 | struct sensor_device_attribute_2 *sensor_attr = | |
1112 | to_sensor_dev_attr_2(attr); | |
1113 | int nr = sensor_attr->nr; | |
1114 | int point = sensor_attr->index; | |
1115 | ||
44c1bcd4 JD |
1116 | return sprintf(buf, "%d\n", |
1117 | pwm_from_reg(data, data->auto_pwm[nr][point])); | |
4f3f51bc JD |
1118 | } |
1119 | ||
1120 | static ssize_t set_auto_pwm(struct device *dev, | |
1121 | struct device_attribute *attr, const char *buf, size_t count) | |
1122 | { | |
1123 | struct it87_data *data = dev_get_drvdata(dev); | |
1124 | struct sensor_device_attribute_2 *sensor_attr = | |
1125 | to_sensor_dev_attr_2(attr); | |
1126 | int nr = sensor_attr->nr; | |
1127 | int point = sensor_attr->index; | |
1128 | long val; | |
1129 | ||
179c4fdb | 1130 | if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255) |
4f3f51bc JD |
1131 | return -EINVAL; |
1132 | ||
1133 | mutex_lock(&data->update_lock); | |
44c1bcd4 | 1134 | data->auto_pwm[nr][point] = pwm_to_reg(data, val); |
4f3f51bc JD |
1135 | it87_write_value(data, IT87_REG_AUTO_PWM(nr, point), |
1136 | data->auto_pwm[nr][point]); | |
1137 | mutex_unlock(&data->update_lock); | |
1138 | return count; | |
1139 | } | |
1140 | ||
1141 | static ssize_t show_auto_temp(struct device *dev, | |
1142 | struct device_attribute *attr, char *buf) | |
1143 | { | |
1144 | struct it87_data *data = it87_update_device(dev); | |
1145 | struct sensor_device_attribute_2 *sensor_attr = | |
1146 | to_sensor_dev_attr_2(attr); | |
1147 | int nr = sensor_attr->nr; | |
1148 | int point = sensor_attr->index; | |
1149 | ||
1150 | return sprintf(buf, "%d\n", TEMP_FROM_REG(data->auto_temp[nr][point])); | |
1151 | } | |
1152 | ||
1153 | static ssize_t set_auto_temp(struct device *dev, | |
1154 | struct device_attribute *attr, const char *buf, size_t count) | |
1155 | { | |
1156 | struct it87_data *data = dev_get_drvdata(dev); | |
1157 | struct sensor_device_attribute_2 *sensor_attr = | |
1158 | to_sensor_dev_attr_2(attr); | |
1159 | int nr = sensor_attr->nr; | |
1160 | int point = sensor_attr->index; | |
1161 | long val; | |
1162 | ||
179c4fdb | 1163 | if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000) |
4f3f51bc JD |
1164 | return -EINVAL; |
1165 | ||
1166 | mutex_lock(&data->update_lock); | |
1167 | data->auto_temp[nr][point] = TEMP_TO_REG(val); | |
1168 | it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point), | |
1169 | data->auto_temp[nr][point]); | |
1170 | mutex_unlock(&data->update_lock); | |
1171 | return count; | |
1172 | } | |
1173 | ||
e1169ba0 GR |
1174 | static SENSOR_DEVICE_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0); |
1175 | static SENSOR_DEVICE_ATTR_2(fan1_min, S_IRUGO | S_IWUSR, show_fan, set_fan, | |
1176 | 0, 1); | |
1177 | static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, show_fan_div, | |
1178 | set_fan_div, 0); | |
1179 | ||
1180 | static SENSOR_DEVICE_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 1, 0); | |
1181 | static SENSOR_DEVICE_ATTR_2(fan2_min, S_IRUGO | S_IWUSR, show_fan, set_fan, | |
1182 | 1, 1); | |
1183 | static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, show_fan_div, | |
1184 | set_fan_div, 1); | |
1185 | ||
1186 | static SENSOR_DEVICE_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 2, 0); | |
1187 | static SENSOR_DEVICE_ATTR_2(fan3_min, S_IRUGO | S_IWUSR, show_fan, set_fan, | |
1188 | 2, 1); | |
1189 | static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, show_fan_div, | |
1190 | set_fan_div, 2); | |
1191 | ||
1192 | static SENSOR_DEVICE_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 3, 0); | |
1193 | static SENSOR_DEVICE_ATTR_2(fan4_min, S_IRUGO | S_IWUSR, show_fan, set_fan, | |
1194 | 3, 1); | |
1da177e4 | 1195 | |
e1169ba0 GR |
1196 | static SENSOR_DEVICE_ATTR_2(fan5_input, S_IRUGO, show_fan, NULL, 4, 0); |
1197 | static SENSOR_DEVICE_ATTR_2(fan5_min, S_IRUGO | S_IWUSR, show_fan, set_fan, | |
1198 | 4, 1); | |
1da177e4 | 1199 | |
c4458db3 GR |
1200 | static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR, |
1201 | show_pwm_enable, set_pwm_enable, 0); | |
1202 | static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 0); | |
1203 | static DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR, show_pwm_freq, set_pwm_freq); | |
1204 | static SENSOR_DEVICE_ATTR(pwm1_auto_channels_temp, S_IRUGO | S_IWUSR, | |
1205 | show_pwm_temp_map, set_pwm_temp_map, 0); | |
1206 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO | S_IWUSR, | |
1207 | show_auto_pwm, set_auto_pwm, 0, 0); | |
1208 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO | S_IWUSR, | |
1209 | show_auto_pwm, set_auto_pwm, 0, 1); | |
1210 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO | S_IWUSR, | |
1211 | show_auto_pwm, set_auto_pwm, 0, 2); | |
1212 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO, | |
1213 | show_auto_pwm, NULL, 0, 3); | |
1214 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR, | |
1215 | show_auto_temp, set_auto_temp, 0, 1); | |
1216 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO | S_IWUSR, | |
1217 | show_auto_temp, set_auto_temp, 0, 0); | |
1218 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR, | |
1219 | show_auto_temp, set_auto_temp, 0, 2); | |
1220 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR, | |
1221 | show_auto_temp, set_auto_temp, 0, 3); | |
1222 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_temp, S_IRUGO | S_IWUSR, | |
1223 | show_auto_temp, set_auto_temp, 0, 4); | |
1224 | ||
1225 | static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR, | |
1226 | show_pwm_enable, set_pwm_enable, 1); | |
1227 | static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 1); | |
1228 | static DEVICE_ATTR(pwm2_freq, S_IRUGO, show_pwm_freq, NULL); | |
1229 | static SENSOR_DEVICE_ATTR(pwm2_auto_channels_temp, S_IRUGO | S_IWUSR, | |
1230 | show_pwm_temp_map, set_pwm_temp_map, 1); | |
1231 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO | S_IWUSR, | |
1232 | show_auto_pwm, set_auto_pwm, 1, 0); | |
1233 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO | S_IWUSR, | |
1234 | show_auto_pwm, set_auto_pwm, 1, 1); | |
1235 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO | S_IWUSR, | |
1236 | show_auto_pwm, set_auto_pwm, 1, 2); | |
1237 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO, | |
1238 | show_auto_pwm, NULL, 1, 3); | |
1239 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR, | |
1240 | show_auto_temp, set_auto_temp, 1, 1); | |
1241 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO | S_IWUSR, | |
1242 | show_auto_temp, set_auto_temp, 1, 0); | |
1243 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR, | |
1244 | show_auto_temp, set_auto_temp, 1, 2); | |
1245 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR, | |
1246 | show_auto_temp, set_auto_temp, 1, 3); | |
1247 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_temp, S_IRUGO | S_IWUSR, | |
1248 | show_auto_temp, set_auto_temp, 1, 4); | |
1249 | ||
1250 | static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR, | |
1251 | show_pwm_enable, set_pwm_enable, 2); | |
1252 | static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 2); | |
1253 | static DEVICE_ATTR(pwm3_freq, S_IRUGO, show_pwm_freq, NULL); | |
1254 | static SENSOR_DEVICE_ATTR(pwm3_auto_channels_temp, S_IRUGO | S_IWUSR, | |
1255 | show_pwm_temp_map, set_pwm_temp_map, 2); | |
1256 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO | S_IWUSR, | |
1257 | show_auto_pwm, set_auto_pwm, 2, 0); | |
1258 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO | S_IWUSR, | |
1259 | show_auto_pwm, set_auto_pwm, 2, 1); | |
1260 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO | S_IWUSR, | |
1261 | show_auto_pwm, set_auto_pwm, 2, 2); | |
1262 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO, | |
1263 | show_auto_pwm, NULL, 2, 3); | |
1264 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR, | |
1265 | show_auto_temp, set_auto_temp, 2, 1); | |
1266 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO | S_IWUSR, | |
1267 | show_auto_temp, set_auto_temp, 2, 0); | |
1268 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR, | |
1269 | show_auto_temp, set_auto_temp, 2, 2); | |
1270 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR, | |
1271 | show_auto_temp, set_auto_temp, 2, 3); | |
1272 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_temp, S_IRUGO | S_IWUSR, | |
1273 | show_auto_temp, set_auto_temp, 2, 4); | |
1da177e4 LT |
1274 | |
1275 | /* Alarms */ | |
5f2dc798 JD |
1276 | static ssize_t show_alarms(struct device *dev, struct device_attribute *attr, |
1277 | char *buf) | |
1da177e4 LT |
1278 | { |
1279 | struct it87_data *data = it87_update_device(dev); | |
68188ba7 | 1280 | return sprintf(buf, "%u\n", data->alarms); |
1da177e4 | 1281 | } |
1d66c64c | 1282 | static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL); |
1da177e4 | 1283 | |
0124dd78 JD |
1284 | static ssize_t show_alarm(struct device *dev, struct device_attribute *attr, |
1285 | char *buf) | |
1286 | { | |
1287 | int bitnr = to_sensor_dev_attr(attr)->index; | |
1288 | struct it87_data *data = it87_update_device(dev); | |
1289 | return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1); | |
1290 | } | |
3d30f9e6 JD |
1291 | |
1292 | static ssize_t clear_intrusion(struct device *dev, struct device_attribute | |
1293 | *attr, const char *buf, size_t count) | |
1294 | { | |
1295 | struct it87_data *data = dev_get_drvdata(dev); | |
1296 | long val; | |
1297 | int config; | |
1298 | ||
179c4fdb | 1299 | if (kstrtol(buf, 10, &val) < 0 || val != 0) |
3d30f9e6 JD |
1300 | return -EINVAL; |
1301 | ||
1302 | mutex_lock(&data->update_lock); | |
1303 | config = it87_read_value(data, IT87_REG_CONFIG); | |
1304 | if (config < 0) { | |
1305 | count = config; | |
1306 | } else { | |
1307 | config |= 1 << 5; | |
1308 | it87_write_value(data, IT87_REG_CONFIG, config); | |
1309 | /* Invalidate cache to force re-read */ | |
1310 | data->valid = 0; | |
1311 | } | |
1312 | mutex_unlock(&data->update_lock); | |
1313 | ||
1314 | return count; | |
1315 | } | |
1316 | ||
0124dd78 JD |
1317 | static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8); |
1318 | static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9); | |
1319 | static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10); | |
1320 | static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11); | |
1321 | static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12); | |
1322 | static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13); | |
1323 | static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14); | |
1324 | static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15); | |
1325 | static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0); | |
1326 | static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1); | |
1327 | static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2); | |
1328 | static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3); | |
1329 | static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6); | |
1330 | static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16); | |
1331 | static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17); | |
1332 | static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18); | |
3d30f9e6 JD |
1333 | static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR, |
1334 | show_alarm, clear_intrusion, 4); | |
0124dd78 | 1335 | |
d9b327c3 JD |
1336 | static ssize_t show_beep(struct device *dev, struct device_attribute *attr, |
1337 | char *buf) | |
1338 | { | |
1339 | int bitnr = to_sensor_dev_attr(attr)->index; | |
1340 | struct it87_data *data = it87_update_device(dev); | |
1341 | return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1); | |
1342 | } | |
1343 | static ssize_t set_beep(struct device *dev, struct device_attribute *attr, | |
1344 | const char *buf, size_t count) | |
1345 | { | |
1346 | int bitnr = to_sensor_dev_attr(attr)->index; | |
1347 | struct it87_data *data = dev_get_drvdata(dev); | |
1348 | long val; | |
1349 | ||
179c4fdb | 1350 | if (kstrtol(buf, 10, &val) < 0 |
d9b327c3 JD |
1351 | || (val != 0 && val != 1)) |
1352 | return -EINVAL; | |
1353 | ||
1354 | mutex_lock(&data->update_lock); | |
1355 | data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE); | |
1356 | if (val) | |
1357 | data->beeps |= (1 << bitnr); | |
1358 | else | |
1359 | data->beeps &= ~(1 << bitnr); | |
1360 | it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps); | |
1361 | mutex_unlock(&data->update_lock); | |
1362 | return count; | |
1363 | } | |
1364 | ||
1365 | static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR, | |
1366 | show_beep, set_beep, 1); | |
1367 | static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1); | |
1368 | static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1); | |
1369 | static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1); | |
1370 | static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1); | |
1371 | static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1); | |
1372 | static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1); | |
1373 | static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1); | |
1374 | /* fanX_beep writability is set later */ | |
1375 | static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0); | |
1376 | static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0); | |
1377 | static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0); | |
1378 | static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0); | |
1379 | static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0); | |
1380 | static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR, | |
1381 | show_beep, set_beep, 2); | |
1382 | static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2); | |
1383 | static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2); | |
1384 | ||
5f2dc798 JD |
1385 | static ssize_t show_vrm_reg(struct device *dev, struct device_attribute *attr, |
1386 | char *buf) | |
1da177e4 | 1387 | { |
90d6619a | 1388 | struct it87_data *data = dev_get_drvdata(dev); |
a7be58a1 | 1389 | return sprintf(buf, "%u\n", data->vrm); |
1da177e4 | 1390 | } |
5f2dc798 JD |
1391 | static ssize_t store_vrm_reg(struct device *dev, struct device_attribute *attr, |
1392 | const char *buf, size_t count) | |
1da177e4 | 1393 | { |
b74f3fdd | 1394 | struct it87_data *data = dev_get_drvdata(dev); |
f5f64501 JD |
1395 | unsigned long val; |
1396 | ||
179c4fdb | 1397 | if (kstrtoul(buf, 10, &val) < 0) |
f5f64501 | 1398 | return -EINVAL; |
1da177e4 | 1399 | |
1da177e4 LT |
1400 | data->vrm = val; |
1401 | ||
1402 | return count; | |
1403 | } | |
1404 | static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg); | |
1da177e4 | 1405 | |
5f2dc798 JD |
1406 | static ssize_t show_vid_reg(struct device *dev, struct device_attribute *attr, |
1407 | char *buf) | |
1da177e4 LT |
1408 | { |
1409 | struct it87_data *data = it87_update_device(dev); | |
1410 | return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm)); | |
1411 | } | |
1412 | static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL); | |
87808be4 | 1413 | |
738e5e05 JD |
1414 | static ssize_t show_label(struct device *dev, struct device_attribute *attr, |
1415 | char *buf) | |
1416 | { | |
3c4c4971 | 1417 | static const char * const labels[] = { |
738e5e05 JD |
1418 | "+5V", |
1419 | "5VSB", | |
1420 | "Vbat", | |
1421 | }; | |
3c4c4971 | 1422 | static const char * const labels_it8721[] = { |
44c1bcd4 JD |
1423 | "+3.3V", |
1424 | "3VSB", | |
1425 | "Vbat", | |
1426 | }; | |
1427 | struct it87_data *data = dev_get_drvdata(dev); | |
738e5e05 JD |
1428 | int nr = to_sensor_dev_attr(attr)->index; |
1429 | ||
16b5dda2 JD |
1430 | return sprintf(buf, "%s\n", has_12mv_adc(data) ? labels_it8721[nr] |
1431 | : labels[nr]); | |
738e5e05 JD |
1432 | } |
1433 | static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0); | |
1434 | static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1); | |
1435 | static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2); | |
7183ae8c | 1436 | /* special AVCC3 IT8603E in9 */ |
c145d5c6 | 1437 | static SENSOR_DEVICE_ATTR(in9_label, S_IRUGO, show_label, NULL, 0); |
738e5e05 | 1438 | |
b74f3fdd | 1439 | static ssize_t show_name(struct device *dev, struct device_attribute |
1440 | *devattr, char *buf) | |
1441 | { | |
1442 | struct it87_data *data = dev_get_drvdata(dev); | |
1443 | return sprintf(buf, "%s\n", data->name); | |
1444 | } | |
1445 | static DEVICE_ATTR(name, S_IRUGO, show_name, NULL); | |
1446 | ||
c145d5c6 | 1447 | static struct attribute *it87_attributes_in[10][5] = { |
9172b5d1 | 1448 | { |
87808be4 | 1449 | &sensor_dev_attr_in0_input.dev_attr.attr, |
87808be4 | 1450 | &sensor_dev_attr_in0_min.dev_attr.attr, |
87808be4 | 1451 | &sensor_dev_attr_in0_max.dev_attr.attr, |
0124dd78 | 1452 | &sensor_dev_attr_in0_alarm.dev_attr.attr, |
9172b5d1 GR |
1453 | NULL |
1454 | }, { | |
1455 | &sensor_dev_attr_in1_input.dev_attr.attr, | |
1456 | &sensor_dev_attr_in1_min.dev_attr.attr, | |
1457 | &sensor_dev_attr_in1_max.dev_attr.attr, | |
0124dd78 | 1458 | &sensor_dev_attr_in1_alarm.dev_attr.attr, |
9172b5d1 GR |
1459 | NULL |
1460 | }, { | |
1461 | &sensor_dev_attr_in2_input.dev_attr.attr, | |
1462 | &sensor_dev_attr_in2_min.dev_attr.attr, | |
1463 | &sensor_dev_attr_in2_max.dev_attr.attr, | |
0124dd78 | 1464 | &sensor_dev_attr_in2_alarm.dev_attr.attr, |
9172b5d1 GR |
1465 | NULL |
1466 | }, { | |
1467 | &sensor_dev_attr_in3_input.dev_attr.attr, | |
1468 | &sensor_dev_attr_in3_min.dev_attr.attr, | |
1469 | &sensor_dev_attr_in3_max.dev_attr.attr, | |
0124dd78 | 1470 | &sensor_dev_attr_in3_alarm.dev_attr.attr, |
9172b5d1 GR |
1471 | NULL |
1472 | }, { | |
1473 | &sensor_dev_attr_in4_input.dev_attr.attr, | |
1474 | &sensor_dev_attr_in4_min.dev_attr.attr, | |
1475 | &sensor_dev_attr_in4_max.dev_attr.attr, | |
0124dd78 | 1476 | &sensor_dev_attr_in4_alarm.dev_attr.attr, |
9172b5d1 GR |
1477 | NULL |
1478 | }, { | |
1479 | &sensor_dev_attr_in5_input.dev_attr.attr, | |
1480 | &sensor_dev_attr_in5_min.dev_attr.attr, | |
1481 | &sensor_dev_attr_in5_max.dev_attr.attr, | |
0124dd78 | 1482 | &sensor_dev_attr_in5_alarm.dev_attr.attr, |
9172b5d1 GR |
1483 | NULL |
1484 | }, { | |
1485 | &sensor_dev_attr_in6_input.dev_attr.attr, | |
1486 | &sensor_dev_attr_in6_min.dev_attr.attr, | |
1487 | &sensor_dev_attr_in6_max.dev_attr.attr, | |
0124dd78 | 1488 | &sensor_dev_attr_in6_alarm.dev_attr.attr, |
9172b5d1 GR |
1489 | NULL |
1490 | }, { | |
1491 | &sensor_dev_attr_in7_input.dev_attr.attr, | |
1492 | &sensor_dev_attr_in7_min.dev_attr.attr, | |
1493 | &sensor_dev_attr_in7_max.dev_attr.attr, | |
0124dd78 | 1494 | &sensor_dev_attr_in7_alarm.dev_attr.attr, |
9172b5d1 GR |
1495 | NULL |
1496 | }, { | |
1497 | &sensor_dev_attr_in8_input.dev_attr.attr, | |
1498 | NULL | |
c145d5c6 RM |
1499 | }, { |
1500 | &sensor_dev_attr_in9_input.dev_attr.attr, | |
1501 | NULL | |
9172b5d1 | 1502 | } }; |
87808be4 | 1503 | |
c145d5c6 | 1504 | static const struct attribute_group it87_group_in[10] = { |
9172b5d1 GR |
1505 | { .attrs = it87_attributes_in[0] }, |
1506 | { .attrs = it87_attributes_in[1] }, | |
1507 | { .attrs = it87_attributes_in[2] }, | |
1508 | { .attrs = it87_attributes_in[3] }, | |
1509 | { .attrs = it87_attributes_in[4] }, | |
1510 | { .attrs = it87_attributes_in[5] }, | |
1511 | { .attrs = it87_attributes_in[6] }, | |
1512 | { .attrs = it87_attributes_in[7] }, | |
1513 | { .attrs = it87_attributes_in[8] }, | |
c145d5c6 | 1514 | { .attrs = it87_attributes_in[9] }, |
9172b5d1 GR |
1515 | }; |
1516 | ||
4573acbc GR |
1517 | static struct attribute *it87_attributes_temp[3][6] = { |
1518 | { | |
87808be4 | 1519 | &sensor_dev_attr_temp1_input.dev_attr.attr, |
87808be4 | 1520 | &sensor_dev_attr_temp1_max.dev_attr.attr, |
87808be4 | 1521 | &sensor_dev_attr_temp1_min.dev_attr.attr, |
87808be4 | 1522 | &sensor_dev_attr_temp1_type.dev_attr.attr, |
0124dd78 | 1523 | &sensor_dev_attr_temp1_alarm.dev_attr.attr, |
4573acbc GR |
1524 | NULL |
1525 | } , { | |
1526 | &sensor_dev_attr_temp2_input.dev_attr.attr, | |
1527 | &sensor_dev_attr_temp2_max.dev_attr.attr, | |
1528 | &sensor_dev_attr_temp2_min.dev_attr.attr, | |
1529 | &sensor_dev_attr_temp2_type.dev_attr.attr, | |
0124dd78 | 1530 | &sensor_dev_attr_temp2_alarm.dev_attr.attr, |
4573acbc GR |
1531 | NULL |
1532 | } , { | |
1533 | &sensor_dev_attr_temp3_input.dev_attr.attr, | |
1534 | &sensor_dev_attr_temp3_max.dev_attr.attr, | |
1535 | &sensor_dev_attr_temp3_min.dev_attr.attr, | |
1536 | &sensor_dev_attr_temp3_type.dev_attr.attr, | |
0124dd78 | 1537 | &sensor_dev_attr_temp3_alarm.dev_attr.attr, |
4573acbc GR |
1538 | NULL |
1539 | } }; | |
1540 | ||
1541 | static const struct attribute_group it87_group_temp[3] = { | |
1542 | { .attrs = it87_attributes_temp[0] }, | |
1543 | { .attrs = it87_attributes_temp[1] }, | |
1544 | { .attrs = it87_attributes_temp[2] }, | |
1545 | }; | |
87808be4 | 1546 | |
161d898a GR |
1547 | static struct attribute *it87_attributes_temp_offset[] = { |
1548 | &sensor_dev_attr_temp1_offset.dev_attr.attr, | |
1549 | &sensor_dev_attr_temp2_offset.dev_attr.attr, | |
1550 | &sensor_dev_attr_temp3_offset.dev_attr.attr, | |
1551 | }; | |
1552 | ||
4573acbc | 1553 | static struct attribute *it87_attributes[] = { |
87808be4 | 1554 | &dev_attr_alarms.attr, |
3d30f9e6 | 1555 | &sensor_dev_attr_intrusion0_alarm.dev_attr.attr, |
b74f3fdd | 1556 | &dev_attr_name.attr, |
87808be4 JD |
1557 | NULL |
1558 | }; | |
1559 | ||
1560 | static const struct attribute_group it87_group = { | |
1561 | .attrs = it87_attributes, | |
1562 | }; | |
1563 | ||
9172b5d1 | 1564 | static struct attribute *it87_attributes_in_beep[] = { |
d9b327c3 JD |
1565 | &sensor_dev_attr_in0_beep.dev_attr.attr, |
1566 | &sensor_dev_attr_in1_beep.dev_attr.attr, | |
1567 | &sensor_dev_attr_in2_beep.dev_attr.attr, | |
1568 | &sensor_dev_attr_in3_beep.dev_attr.attr, | |
1569 | &sensor_dev_attr_in4_beep.dev_attr.attr, | |
1570 | &sensor_dev_attr_in5_beep.dev_attr.attr, | |
1571 | &sensor_dev_attr_in6_beep.dev_attr.attr, | |
1572 | &sensor_dev_attr_in7_beep.dev_attr.attr, | |
c145d5c6 RM |
1573 | NULL, |
1574 | NULL, | |
9172b5d1 | 1575 | }; |
d9b327c3 | 1576 | |
4573acbc | 1577 | static struct attribute *it87_attributes_temp_beep[] = { |
d9b327c3 JD |
1578 | &sensor_dev_attr_temp1_beep.dev_attr.attr, |
1579 | &sensor_dev_attr_temp2_beep.dev_attr.attr, | |
1580 | &sensor_dev_attr_temp3_beep.dev_attr.attr, | |
d9b327c3 JD |
1581 | }; |
1582 | ||
e1169ba0 GR |
1583 | static struct attribute *it87_attributes_fan[5][3+1] = { { |
1584 | &sensor_dev_attr_fan1_input.dev_attr.attr, | |
1585 | &sensor_dev_attr_fan1_min.dev_attr.attr, | |
723a0aa0 JD |
1586 | &sensor_dev_attr_fan1_alarm.dev_attr.attr, |
1587 | NULL | |
1588 | }, { | |
e1169ba0 GR |
1589 | &sensor_dev_attr_fan2_input.dev_attr.attr, |
1590 | &sensor_dev_attr_fan2_min.dev_attr.attr, | |
723a0aa0 JD |
1591 | &sensor_dev_attr_fan2_alarm.dev_attr.attr, |
1592 | NULL | |
1593 | }, { | |
e1169ba0 GR |
1594 | &sensor_dev_attr_fan3_input.dev_attr.attr, |
1595 | &sensor_dev_attr_fan3_min.dev_attr.attr, | |
723a0aa0 JD |
1596 | &sensor_dev_attr_fan3_alarm.dev_attr.attr, |
1597 | NULL | |
1598 | }, { | |
e1169ba0 GR |
1599 | &sensor_dev_attr_fan4_input.dev_attr.attr, |
1600 | &sensor_dev_attr_fan4_min.dev_attr.attr, | |
723a0aa0 JD |
1601 | &sensor_dev_attr_fan4_alarm.dev_attr.attr, |
1602 | NULL | |
1603 | }, { | |
e1169ba0 GR |
1604 | &sensor_dev_attr_fan5_input.dev_attr.attr, |
1605 | &sensor_dev_attr_fan5_min.dev_attr.attr, | |
723a0aa0 JD |
1606 | &sensor_dev_attr_fan5_alarm.dev_attr.attr, |
1607 | NULL | |
1608 | } }; | |
1609 | ||
e1169ba0 GR |
1610 | static const struct attribute_group it87_group_fan[5] = { |
1611 | { .attrs = it87_attributes_fan[0] }, | |
1612 | { .attrs = it87_attributes_fan[1] }, | |
1613 | { .attrs = it87_attributes_fan[2] }, | |
1614 | { .attrs = it87_attributes_fan[3] }, | |
1615 | { .attrs = it87_attributes_fan[4] }, | |
723a0aa0 | 1616 | }; |
87808be4 | 1617 | |
e1169ba0 | 1618 | static const struct attribute *it87_attributes_fan_div[] = { |
87808be4 | 1619 | &sensor_dev_attr_fan1_div.dev_attr.attr, |
87808be4 | 1620 | &sensor_dev_attr_fan2_div.dev_attr.attr, |
87808be4 | 1621 | &sensor_dev_attr_fan3_div.dev_attr.attr, |
723a0aa0 JD |
1622 | }; |
1623 | ||
723a0aa0 | 1624 | static struct attribute *it87_attributes_pwm[3][4+1] = { { |
87808be4 | 1625 | &sensor_dev_attr_pwm1_enable.dev_attr.attr, |
87808be4 | 1626 | &sensor_dev_attr_pwm1.dev_attr.attr, |
d5b0b5d6 | 1627 | &dev_attr_pwm1_freq.attr, |
94ac7ee6 | 1628 | &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr, |
723a0aa0 JD |
1629 | NULL |
1630 | }, { | |
1631 | &sensor_dev_attr_pwm2_enable.dev_attr.attr, | |
1632 | &sensor_dev_attr_pwm2.dev_attr.attr, | |
1633 | &dev_attr_pwm2_freq.attr, | |
94ac7ee6 | 1634 | &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr, |
723a0aa0 JD |
1635 | NULL |
1636 | }, { | |
1637 | &sensor_dev_attr_pwm3_enable.dev_attr.attr, | |
1638 | &sensor_dev_attr_pwm3.dev_attr.attr, | |
1639 | &dev_attr_pwm3_freq.attr, | |
94ac7ee6 | 1640 | &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr, |
723a0aa0 JD |
1641 | NULL |
1642 | } }; | |
87808be4 | 1643 | |
723a0aa0 JD |
1644 | static const struct attribute_group it87_group_pwm[3] = { |
1645 | { .attrs = it87_attributes_pwm[0] }, | |
1646 | { .attrs = it87_attributes_pwm[1] }, | |
1647 | { .attrs = it87_attributes_pwm[2] }, | |
1648 | }; | |
1649 | ||
4f3f51bc JD |
1650 | static struct attribute *it87_attributes_autopwm[3][9+1] = { { |
1651 | &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr, | |
1652 | &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr, | |
1653 | &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr, | |
1654 | &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr, | |
1655 | &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr, | |
1656 | &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr, | |
1657 | &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr, | |
1658 | &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr, | |
1659 | &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr, | |
1660 | NULL | |
1661 | }, { | |
1662 | &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr, | |
1663 | &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr, | |
1664 | &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr, | |
1665 | &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr, | |
1666 | &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr, | |
1667 | &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr, | |
1668 | &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr, | |
1669 | &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr, | |
1670 | &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr, | |
1671 | NULL | |
1672 | }, { | |
1673 | &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr, | |
1674 | &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr, | |
1675 | &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr, | |
1676 | &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr, | |
1677 | &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr, | |
1678 | &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr, | |
1679 | &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr, | |
1680 | &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr, | |
1681 | &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr, | |
1682 | NULL | |
1683 | } }; | |
1684 | ||
1685 | static const struct attribute_group it87_group_autopwm[3] = { | |
1686 | { .attrs = it87_attributes_autopwm[0] }, | |
1687 | { .attrs = it87_attributes_autopwm[1] }, | |
1688 | { .attrs = it87_attributes_autopwm[2] }, | |
1689 | }; | |
1690 | ||
d9b327c3 JD |
1691 | static struct attribute *it87_attributes_fan_beep[] = { |
1692 | &sensor_dev_attr_fan1_beep.dev_attr.attr, | |
1693 | &sensor_dev_attr_fan2_beep.dev_attr.attr, | |
1694 | &sensor_dev_attr_fan3_beep.dev_attr.attr, | |
1695 | &sensor_dev_attr_fan4_beep.dev_attr.attr, | |
1696 | &sensor_dev_attr_fan5_beep.dev_attr.attr, | |
1697 | }; | |
1698 | ||
6a8d7acf | 1699 | static struct attribute *it87_attributes_vid[] = { |
87808be4 JD |
1700 | &dev_attr_vrm.attr, |
1701 | &dev_attr_cpu0_vid.attr, | |
1702 | NULL | |
1703 | }; | |
1704 | ||
6a8d7acf JD |
1705 | static const struct attribute_group it87_group_vid = { |
1706 | .attrs = it87_attributes_vid, | |
87808be4 | 1707 | }; |
1da177e4 | 1708 | |
738e5e05 JD |
1709 | static struct attribute *it87_attributes_label[] = { |
1710 | &sensor_dev_attr_in3_label.dev_attr.attr, | |
1711 | &sensor_dev_attr_in7_label.dev_attr.attr, | |
1712 | &sensor_dev_attr_in8_label.dev_attr.attr, | |
c145d5c6 | 1713 | &sensor_dev_attr_in9_label.dev_attr.attr, |
738e5e05 JD |
1714 | NULL |
1715 | }; | |
1716 | ||
1717 | static const struct attribute_group it87_group_label = { | |
fa8b6975 | 1718 | .attrs = it87_attributes_label, |
738e5e05 JD |
1719 | }; |
1720 | ||
2d8672c5 | 1721 | /* SuperIO detection - will change isa_address if a chip is found */ |
b74f3fdd | 1722 | static int __init it87_find(unsigned short *address, |
1723 | struct it87_sio_data *sio_data) | |
1da177e4 | 1724 | { |
5b0380c9 | 1725 | int err; |
b74f3fdd | 1726 | u16 chip_type; |
98dd22c3 | 1727 | const char *board_vendor, *board_name; |
1da177e4 | 1728 | |
5b0380c9 NG |
1729 | err = superio_enter(); |
1730 | if (err) | |
1731 | return err; | |
1732 | ||
1733 | err = -ENODEV; | |
67b671bc | 1734 | chip_type = force_id ? force_id : superio_inw(DEVID); |
b74f3fdd | 1735 | |
1736 | switch (chip_type) { | |
1737 | case IT8705F_DEVID: | |
1738 | sio_data->type = it87; | |
1739 | break; | |
1740 | case IT8712F_DEVID: | |
1741 | sio_data->type = it8712; | |
1742 | break; | |
1743 | case IT8716F_DEVID: | |
1744 | case IT8726F_DEVID: | |
1745 | sio_data->type = it8716; | |
1746 | break; | |
1747 | case IT8718F_DEVID: | |
1748 | sio_data->type = it8718; | |
1749 | break; | |
b4da93e4 JMS |
1750 | case IT8720F_DEVID: |
1751 | sio_data->type = it8720; | |
1752 | break; | |
44c1bcd4 JD |
1753 | case IT8721F_DEVID: |
1754 | sio_data->type = it8721; | |
1755 | break; | |
16b5dda2 JD |
1756 | case IT8728F_DEVID: |
1757 | sio_data->type = it8728; | |
1758 | break; | |
b0636707 GR |
1759 | case IT8771E_DEVID: |
1760 | sio_data->type = it8771; | |
1761 | break; | |
1762 | case IT8772E_DEVID: | |
1763 | sio_data->type = it8772; | |
1764 | break; | |
0531d98b GR |
1765 | case IT8782F_DEVID: |
1766 | sio_data->type = it8782; | |
1767 | break; | |
1768 | case IT8783E_DEVID: | |
1769 | sio_data->type = it8783; | |
1770 | break; | |
7183ae8c | 1771 | case IT8603E_DEVID: |
574e9bd8 | 1772 | case IT8623E_DEVID: |
c145d5c6 RM |
1773 | sio_data->type = it8603; |
1774 | break; | |
b74f3fdd | 1775 | case 0xffff: /* No device at all */ |
1776 | goto exit; | |
1777 | default: | |
a8ca1037 | 1778 | pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type); |
b74f3fdd | 1779 | goto exit; |
1780 | } | |
1da177e4 | 1781 | |
87673dd7 | 1782 | superio_select(PME); |
1da177e4 | 1783 | if (!(superio_inb(IT87_ACT_REG) & 0x01)) { |
a8ca1037 | 1784 | pr_info("Device not activated, skipping\n"); |
1da177e4 LT |
1785 | goto exit; |
1786 | } | |
1787 | ||
1788 | *address = superio_inw(IT87_BASE_REG) & ~(IT87_EXTENT - 1); | |
1789 | if (*address == 0) { | |
a8ca1037 | 1790 | pr_info("Base address not set, skipping\n"); |
1da177e4 LT |
1791 | goto exit; |
1792 | } | |
1793 | ||
1794 | err = 0; | |
0475169c | 1795 | sio_data->revision = superio_inb(DEVREV) & 0x0f; |
c145d5c6 | 1796 | pr_info("Found IT%04x%c chip at 0x%x, revision %d\n", chip_type, |
b523bb75 | 1797 | chip_type == 0x8771 || chip_type == 0x8772 || |
c145d5c6 RM |
1798 | chip_type == 0x8603 ? 'E' : 'F', *address, |
1799 | sio_data->revision); | |
1da177e4 | 1800 | |
738e5e05 JD |
1801 | /* in8 (Vbat) is always internal */ |
1802 | sio_data->internal = (1 << 2); | |
c145d5c6 RM |
1803 | /* Only the IT8603E has in9 */ |
1804 | if (sio_data->type != it8603) | |
1805 | sio_data->skip_in |= (1 << 9); | |
738e5e05 | 1806 | |
87673dd7 | 1807 | /* Read GPIO config and VID value from LDN 7 (GPIO) */ |
895ff267 JD |
1808 | if (sio_data->type == it87) { |
1809 | /* The IT8705F doesn't have VID pins at all */ | |
1810 | sio_data->skip_vid = 1; | |
d9b327c3 JD |
1811 | |
1812 | /* The IT8705F has a different LD number for GPIO */ | |
1813 | superio_select(5); | |
1814 | sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f; | |
0531d98b | 1815 | } else if (sio_data->type == it8783) { |
088ce2ac | 1816 | int reg25, reg27, reg2a, reg2c, regef; |
0531d98b GR |
1817 | |
1818 | sio_data->skip_vid = 1; /* No VID */ | |
1819 | ||
1820 | superio_select(GPIO); | |
1821 | ||
1822 | reg25 = superio_inb(IT87_SIO_GPIO1_REG); | |
1823 | reg27 = superio_inb(IT87_SIO_GPIO3_REG); | |
088ce2ac GR |
1824 | reg2a = superio_inb(IT87_SIO_PINX1_REG); |
1825 | reg2c = superio_inb(IT87_SIO_PINX2_REG); | |
1826 | regef = superio_inb(IT87_SIO_SPI_REG); | |
0531d98b | 1827 | |
0531d98b | 1828 | /* Check if fan3 is there or not */ |
088ce2ac | 1829 | if ((reg27 & (1 << 0)) || !(reg2c & (1 << 2))) |
0531d98b GR |
1830 | sio_data->skip_fan |= (1 << 2); |
1831 | if ((reg25 & (1 << 4)) | |
088ce2ac | 1832 | || (!(reg2a & (1 << 1)) && (regef & (1 << 0)))) |
0531d98b GR |
1833 | sio_data->skip_pwm |= (1 << 2); |
1834 | ||
1835 | /* Check if fan2 is there or not */ | |
1836 | if (reg27 & (1 << 7)) | |
1837 | sio_data->skip_fan |= (1 << 1); | |
1838 | if (reg27 & (1 << 3)) | |
1839 | sio_data->skip_pwm |= (1 << 1); | |
1840 | ||
1841 | /* VIN5 */ | |
088ce2ac | 1842 | if ((reg27 & (1 << 0)) || (reg2c & (1 << 2))) |
9172b5d1 | 1843 | sio_data->skip_in |= (1 << 5); /* No VIN5 */ |
0531d98b GR |
1844 | |
1845 | /* VIN6 */ | |
9172b5d1 GR |
1846 | if (reg27 & (1 << 1)) |
1847 | sio_data->skip_in |= (1 << 6); /* No VIN6 */ | |
0531d98b GR |
1848 | |
1849 | /* | |
1850 | * VIN7 | |
1851 | * Does not depend on bit 2 of Reg2C, contrary to datasheet. | |
1852 | */ | |
9172b5d1 GR |
1853 | if (reg27 & (1 << 2)) { |
1854 | /* | |
1855 | * The data sheet is a bit unclear regarding the | |
1856 | * internal voltage divider for VCCH5V. It says | |
1857 | * "This bit enables and switches VIN7 (pin 91) to the | |
1858 | * internal voltage divider for VCCH5V". | |
1859 | * This is different to other chips, where the internal | |
1860 | * voltage divider would connect VIN7 to an internal | |
1861 | * voltage source. Maybe that is the case here as well. | |
1862 | * | |
1863 | * Since we don't know for sure, re-route it if that is | |
1864 | * not the case, and ask the user to report if the | |
1865 | * resulting voltage is sane. | |
1866 | */ | |
088ce2ac GR |
1867 | if (!(reg2c & (1 << 1))) { |
1868 | reg2c |= (1 << 1); | |
1869 | superio_outb(IT87_SIO_PINX2_REG, reg2c); | |
9172b5d1 GR |
1870 | pr_notice("Routing internal VCCH5V to in7.\n"); |
1871 | } | |
1872 | pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n"); | |
1873 | pr_notice("Please report if it displays a reasonable voltage.\n"); | |
1874 | } | |
0531d98b | 1875 | |
088ce2ac | 1876 | if (reg2c & (1 << 0)) |
0531d98b | 1877 | sio_data->internal |= (1 << 0); |
088ce2ac | 1878 | if (reg2c & (1 << 1)) |
0531d98b GR |
1879 | sio_data->internal |= (1 << 1); |
1880 | ||
1881 | sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f; | |
c145d5c6 RM |
1882 | } else if (sio_data->type == it8603) { |
1883 | int reg27, reg29; | |
1884 | ||
1885 | sio_data->skip_vid = 1; /* No VID */ | |
1886 | superio_select(GPIO); | |
0531d98b | 1887 | |
c145d5c6 RM |
1888 | reg27 = superio_inb(IT87_SIO_GPIO3_REG); |
1889 | ||
1890 | /* Check if fan3 is there or not */ | |
1891 | if (reg27 & (1 << 6)) | |
1892 | sio_data->skip_pwm |= (1 << 2); | |
1893 | if (reg27 & (1 << 7)) | |
1894 | sio_data->skip_fan |= (1 << 2); | |
1895 | ||
1896 | /* Check if fan2 is there or not */ | |
1897 | reg29 = superio_inb(IT87_SIO_GPIO5_REG); | |
1898 | if (reg29 & (1 << 1)) | |
1899 | sio_data->skip_pwm |= (1 << 1); | |
1900 | if (reg29 & (1 << 2)) | |
1901 | sio_data->skip_fan |= (1 << 1); | |
1902 | ||
1903 | sio_data->skip_in |= (1 << 5); /* No VIN5 */ | |
1904 | sio_data->skip_in |= (1 << 6); /* No VIN6 */ | |
1905 | ||
1906 | /* no fan4 */ | |
1907 | sio_data->skip_pwm |= (1 << 3); | |
1908 | sio_data->skip_fan |= (1 << 3); | |
1909 | ||
1910 | sio_data->internal |= (1 << 1); /* in7 is VSB */ | |
1911 | sio_data->internal |= (1 << 3); /* in9 is AVCC */ | |
1912 | ||
1913 | sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f; | |
895ff267 | 1914 | } else { |
87673dd7 | 1915 | int reg; |
9172b5d1 | 1916 | bool uart6; |
87673dd7 JD |
1917 | |
1918 | superio_select(GPIO); | |
44c1bcd4 | 1919 | |
895ff267 | 1920 | reg = superio_inb(IT87_SIO_GPIO3_REG); |
0531d98b | 1921 | if (sio_data->type == it8721 || sio_data->type == it8728 || |
b0636707 | 1922 | sio_data->type == it8771 || sio_data->type == it8772 || |
0531d98b | 1923 | sio_data->type == it8782) { |
16b5dda2 | 1924 | /* |
0531d98b | 1925 | * IT8721F/IT8758E, and IT8782F don't have VID pins |
b0636707 | 1926 | * at all, not sure about the IT8728F and compatibles. |
16b5dda2 | 1927 | */ |
895ff267 | 1928 | sio_data->skip_vid = 1; |
44c1bcd4 JD |
1929 | } else { |
1930 | /* We need at least 4 VID pins */ | |
1931 | if (reg & 0x0f) { | |
a8ca1037 | 1932 | pr_info("VID is disabled (pins used for GPIO)\n"); |
44c1bcd4 JD |
1933 | sio_data->skip_vid = 1; |
1934 | } | |
895ff267 JD |
1935 | } |
1936 | ||
591ec650 JD |
1937 | /* Check if fan3 is there or not */ |
1938 | if (reg & (1 << 6)) | |
1939 | sio_data->skip_pwm |= (1 << 2); | |
1940 | if (reg & (1 << 7)) | |
1941 | sio_data->skip_fan |= (1 << 2); | |
1942 | ||
1943 | /* Check if fan2 is there or not */ | |
1944 | reg = superio_inb(IT87_SIO_GPIO5_REG); | |
1945 | if (reg & (1 << 1)) | |
1946 | sio_data->skip_pwm |= (1 << 1); | |
1947 | if (reg & (1 << 2)) | |
1948 | sio_data->skip_fan |= (1 << 1); | |
1949 | ||
895ff267 JD |
1950 | if ((sio_data->type == it8718 || sio_data->type == it8720) |
1951 | && !(sio_data->skip_vid)) | |
b74f3fdd | 1952 | sio_data->vid_value = superio_inb(IT87_SIO_VID_REG); |
87673dd7 JD |
1953 | |
1954 | reg = superio_inb(IT87_SIO_PINX2_REG); | |
9172b5d1 GR |
1955 | |
1956 | uart6 = sio_data->type == it8782 && (reg & (1 << 2)); | |
1957 | ||
436cad2a JD |
1958 | /* |
1959 | * The IT8720F has no VIN7 pin, so VCCH should always be | |
1960 | * routed internally to VIN7 with an internal divider. | |
1961 | * Curiously, there still is a configuration bit to control | |
1962 | * this, which means it can be set incorrectly. And even | |
1963 | * more curiously, many boards out there are improperly | |
1964 | * configured, even though the IT8720F datasheet claims | |
1965 | * that the internal routing of VCCH to VIN7 is the default | |
1966 | * setting. So we force the internal routing in this case. | |
0531d98b GR |
1967 | * |
1968 | * On IT8782F, VIN7 is multiplexed with one of the UART6 pins. | |
9172b5d1 GR |
1969 | * If UART6 is enabled, re-route VIN7 to the internal divider |
1970 | * if that is not already the case. | |
436cad2a | 1971 | */ |
9172b5d1 | 1972 | if ((sio_data->type == it8720 || uart6) && !(reg & (1 << 1))) { |
436cad2a JD |
1973 | reg |= (1 << 1); |
1974 | superio_outb(IT87_SIO_PINX2_REG, reg); | |
a8ca1037 | 1975 | pr_notice("Routing internal VCCH to in7\n"); |
436cad2a | 1976 | } |
87673dd7 | 1977 | if (reg & (1 << 0)) |
738e5e05 | 1978 | sio_data->internal |= (1 << 0); |
16b5dda2 | 1979 | if ((reg & (1 << 1)) || sio_data->type == it8721 || |
b0636707 GR |
1980 | sio_data->type == it8728 || |
1981 | sio_data->type == it8771 || | |
1982 | sio_data->type == it8772) | |
738e5e05 | 1983 | sio_data->internal |= (1 << 1); |
d9b327c3 | 1984 | |
9172b5d1 GR |
1985 | /* |
1986 | * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7. | |
1987 | * While VIN7 can be routed to the internal voltage divider, | |
1988 | * VIN5 and VIN6 are not available if UART6 is enabled. | |
4573acbc GR |
1989 | * |
1990 | * Also, temp3 is not available if UART6 is enabled and TEMPIN3 | |
1991 | * is the temperature source. Since we can not read the | |
1992 | * temperature source here, skip_temp is preliminary. | |
9172b5d1 | 1993 | */ |
4573acbc | 1994 | if (uart6) { |
9172b5d1 | 1995 | sio_data->skip_in |= (1 << 5) | (1 << 6); |
4573acbc GR |
1996 | sio_data->skip_temp |= (1 << 2); |
1997 | } | |
9172b5d1 | 1998 | |
d9b327c3 | 1999 | sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f; |
87673dd7 | 2000 | } |
d9b327c3 | 2001 | if (sio_data->beep_pin) |
a8ca1037 | 2002 | pr_info("Beeping is supported\n"); |
87673dd7 | 2003 | |
98dd22c3 JD |
2004 | /* Disable specific features based on DMI strings */ |
2005 | board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR); | |
2006 | board_name = dmi_get_system_info(DMI_BOARD_NAME); | |
2007 | if (board_vendor && board_name) { | |
2008 | if (strcmp(board_vendor, "nVIDIA") == 0 | |
2009 | && strcmp(board_name, "FN68PT") == 0) { | |
4a0d71cf GR |
2010 | /* |
2011 | * On the Shuttle SN68PT, FAN_CTL2 is apparently not | |
2012 | * connected to a fan, but to something else. One user | |
2013 | * has reported instant system power-off when changing | |
2014 | * the PWM2 duty cycle, so we disable it. | |
2015 | * I use the board name string as the trigger in case | |
2016 | * the same board is ever used in other systems. | |
2017 | */ | |
a8ca1037 | 2018 | pr_info("Disabling pwm2 due to hardware constraints\n"); |
98dd22c3 JD |
2019 | sio_data->skip_pwm = (1 << 1); |
2020 | } | |
2021 | } | |
2022 | ||
1da177e4 LT |
2023 | exit: |
2024 | superio_exit(); | |
2025 | return err; | |
2026 | } | |
2027 | ||
723a0aa0 JD |
2028 | static void it87_remove_files(struct device *dev) |
2029 | { | |
2030 | struct it87_data *data = platform_get_drvdata(pdev); | |
a8b3a3a5 | 2031 | struct it87_sio_data *sio_data = dev_get_platdata(dev); |
723a0aa0 JD |
2032 | int i; |
2033 | ||
2034 | sysfs_remove_group(&dev->kobj, &it87_group); | |
c145d5c6 | 2035 | for (i = 0; i < 10; i++) { |
9172b5d1 GR |
2036 | if (sio_data->skip_in & (1 << i)) |
2037 | continue; | |
2038 | sysfs_remove_group(&dev->kobj, &it87_group_in[i]); | |
2039 | if (it87_attributes_in_beep[i]) | |
2040 | sysfs_remove_file(&dev->kobj, | |
2041 | it87_attributes_in_beep[i]); | |
2042 | } | |
4573acbc GR |
2043 | for (i = 0; i < 3; i++) { |
2044 | if (!(data->has_temp & (1 << i))) | |
2045 | continue; | |
2046 | sysfs_remove_group(&dev->kobj, &it87_group_temp[i]); | |
161d898a GR |
2047 | if (has_temp_offset(data)) |
2048 | sysfs_remove_file(&dev->kobj, | |
2049 | it87_attributes_temp_offset[i]); | |
4573acbc GR |
2050 | if (sio_data->beep_pin) |
2051 | sysfs_remove_file(&dev->kobj, | |
2052 | it87_attributes_temp_beep[i]); | |
2053 | } | |
723a0aa0 JD |
2054 | for (i = 0; i < 5; i++) { |
2055 | if (!(data->has_fan & (1 << i))) | |
2056 | continue; | |
e1169ba0 | 2057 | sysfs_remove_group(&dev->kobj, &it87_group_fan[i]); |
d9b327c3 JD |
2058 | if (sio_data->beep_pin) |
2059 | sysfs_remove_file(&dev->kobj, | |
2060 | it87_attributes_fan_beep[i]); | |
e1169ba0 GR |
2061 | if (i < 3 && !has_16bit_fans(data)) |
2062 | sysfs_remove_file(&dev->kobj, | |
2063 | it87_attributes_fan_div[i]); | |
723a0aa0 JD |
2064 | } |
2065 | for (i = 0; i < 3; i++) { | |
2066 | if (sio_data->skip_pwm & (1 << 0)) | |
2067 | continue; | |
2068 | sysfs_remove_group(&dev->kobj, &it87_group_pwm[i]); | |
4f3f51bc JD |
2069 | if (has_old_autopwm(data)) |
2070 | sysfs_remove_group(&dev->kobj, | |
2071 | &it87_group_autopwm[i]); | |
723a0aa0 | 2072 | } |
6a8d7acf JD |
2073 | if (!sio_data->skip_vid) |
2074 | sysfs_remove_group(&dev->kobj, &it87_group_vid); | |
738e5e05 | 2075 | sysfs_remove_group(&dev->kobj, &it87_group_label); |
723a0aa0 JD |
2076 | } |
2077 | ||
6c931ae1 | 2078 | static int it87_probe(struct platform_device *pdev) |
1da177e4 | 2079 | { |
1da177e4 | 2080 | struct it87_data *data; |
b74f3fdd | 2081 | struct resource *res; |
2082 | struct device *dev = &pdev->dev; | |
a8b3a3a5 | 2083 | struct it87_sio_data *sio_data = dev_get_platdata(dev); |
723a0aa0 | 2084 | int err = 0, i; |
1da177e4 | 2085 | int enable_pwm_interface; |
d9b327c3 | 2086 | int fan_beep_need_rw; |
b74f3fdd | 2087 | |
2088 | res = platform_get_resource(pdev, IORESOURCE_IO, 0); | |
62a1d05f GR |
2089 | if (!devm_request_region(&pdev->dev, res->start, IT87_EC_EXTENT, |
2090 | DRVNAME)) { | |
b74f3fdd | 2091 | dev_err(dev, "Failed to request region 0x%lx-0x%lx\n", |
2092 | (unsigned long)res->start, | |
87b4b663 | 2093 | (unsigned long)(res->start + IT87_EC_EXTENT - 1)); |
62a1d05f | 2094 | return -EBUSY; |
8e9afcbb | 2095 | } |
1da177e4 | 2096 | |
62a1d05f GR |
2097 | data = devm_kzalloc(&pdev->dev, sizeof(struct it87_data), GFP_KERNEL); |
2098 | if (!data) | |
2099 | return -ENOMEM; | |
1da177e4 | 2100 | |
b74f3fdd | 2101 | data->addr = res->start; |
2102 | data->type = sio_data->type; | |
483db43e | 2103 | data->features = it87_devices[sio_data->type].features; |
5d8d2f2b | 2104 | data->peci_mask = it87_devices[sio_data->type].peci_mask; |
19529784 | 2105 | data->old_peci_mask = it87_devices[sio_data->type].old_peci_mask; |
483db43e GR |
2106 | data->name = it87_devices[sio_data->type].name; |
2107 | /* | |
2108 | * IT8705F Datasheet 0.4.1, 3h == Version G. | |
2109 | * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J. | |
2110 | * These are the first revisions with 16-bit tachometer support. | |
2111 | */ | |
2112 | switch (data->type) { | |
2113 | case it87: | |
2114 | if (sio_data->revision >= 0x03) { | |
2115 | data->features &= ~FEAT_OLD_AUTOPWM; | |
2116 | data->features |= FEAT_16BIT_FANS; | |
2117 | } | |
2118 | break; | |
2119 | case it8712: | |
2120 | if (sio_data->revision >= 0x08) { | |
2121 | data->features &= ~FEAT_OLD_AUTOPWM; | |
2122 | data->features |= FEAT_16BIT_FANS; | |
2123 | } | |
2124 | break; | |
2125 | default: | |
2126 | break; | |
2127 | } | |
1da177e4 LT |
2128 | |
2129 | /* Now, we do the remaining detection. */ | |
b74f3fdd | 2130 | if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80) |
62a1d05f GR |
2131 | || it87_read_value(data, IT87_REG_CHIPID) != 0x90) |
2132 | return -ENODEV; | |
1da177e4 | 2133 | |
b74f3fdd | 2134 | platform_set_drvdata(pdev, data); |
1da177e4 | 2135 | |
9a61bf63 | 2136 | mutex_init(&data->update_lock); |
1da177e4 | 2137 | |
1da177e4 | 2138 | /* Check PWM configuration */ |
b74f3fdd | 2139 | enable_pwm_interface = it87_check_pwm(dev); |
1da177e4 | 2140 | |
44c1bcd4 | 2141 | /* Starting with IT8721F, we handle scaling of internal voltages */ |
16b5dda2 | 2142 | if (has_12mv_adc(data)) { |
44c1bcd4 JD |
2143 | if (sio_data->internal & (1 << 0)) |
2144 | data->in_scaled |= (1 << 3); /* in3 is AVCC */ | |
2145 | if (sio_data->internal & (1 << 1)) | |
2146 | data->in_scaled |= (1 << 7); /* in7 is VSB */ | |
2147 | if (sio_data->internal & (1 << 2)) | |
2148 | data->in_scaled |= (1 << 8); /* in8 is Vbat */ | |
c145d5c6 RM |
2149 | if (sio_data->internal & (1 << 3)) |
2150 | data->in_scaled |= (1 << 9); /* in9 is AVCC */ | |
0531d98b GR |
2151 | } else if (sio_data->type == it8782 || sio_data->type == it8783) { |
2152 | if (sio_data->internal & (1 << 0)) | |
2153 | data->in_scaled |= (1 << 3); /* in3 is VCC5V */ | |
2154 | if (sio_data->internal & (1 << 1)) | |
2155 | data->in_scaled |= (1 << 7); /* in7 is VCCH5V */ | |
44c1bcd4 JD |
2156 | } |
2157 | ||
4573acbc GR |
2158 | data->has_temp = 0x07; |
2159 | if (sio_data->skip_temp & (1 << 2)) { | |
2160 | if (sio_data->type == it8782 | |
2161 | && !(it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x80)) | |
2162 | data->has_temp &= ~(1 << 2); | |
2163 | } | |
2164 | ||
1da177e4 | 2165 | /* Initialize the IT87 chip */ |
b74f3fdd | 2166 | it87_init_device(pdev); |
1da177e4 LT |
2167 | |
2168 | /* Register sysfs hooks */ | |
5f2dc798 JD |
2169 | err = sysfs_create_group(&dev->kobj, &it87_group); |
2170 | if (err) | |
62a1d05f | 2171 | return err; |
17d648bf | 2172 | |
c145d5c6 | 2173 | for (i = 0; i < 10; i++) { |
9172b5d1 GR |
2174 | if (sio_data->skip_in & (1 << i)) |
2175 | continue; | |
2176 | err = sysfs_create_group(&dev->kobj, &it87_group_in[i]); | |
2177 | if (err) | |
62a1d05f | 2178 | goto error; |
9172b5d1 GR |
2179 | if (sio_data->beep_pin && it87_attributes_in_beep[i]) { |
2180 | err = sysfs_create_file(&dev->kobj, | |
2181 | it87_attributes_in_beep[i]); | |
2182 | if (err) | |
62a1d05f | 2183 | goto error; |
9172b5d1 GR |
2184 | } |
2185 | } | |
2186 | ||
4573acbc GR |
2187 | for (i = 0; i < 3; i++) { |
2188 | if (!(data->has_temp & (1 << i))) | |
2189 | continue; | |
2190 | err = sysfs_create_group(&dev->kobj, &it87_group_temp[i]); | |
d9b327c3 | 2191 | if (err) |
62a1d05f | 2192 | goto error; |
161d898a GR |
2193 | if (has_temp_offset(data)) { |
2194 | err = sysfs_create_file(&dev->kobj, | |
2195 | it87_attributes_temp_offset[i]); | |
2196 | if (err) | |
2197 | goto error; | |
2198 | } | |
4573acbc GR |
2199 | if (sio_data->beep_pin) { |
2200 | err = sysfs_create_file(&dev->kobj, | |
2201 | it87_attributes_temp_beep[i]); | |
2202 | if (err) | |
2203 | goto error; | |
2204 | } | |
d9b327c3 JD |
2205 | } |
2206 | ||
9060f8bd | 2207 | /* Do not create fan files for disabled fans */ |
d9b327c3 | 2208 | fan_beep_need_rw = 1; |
723a0aa0 JD |
2209 | for (i = 0; i < 5; i++) { |
2210 | if (!(data->has_fan & (1 << i))) | |
2211 | continue; | |
e1169ba0 | 2212 | err = sysfs_create_group(&dev->kobj, &it87_group_fan[i]); |
723a0aa0 | 2213 | if (err) |
62a1d05f | 2214 | goto error; |
d9b327c3 | 2215 | |
e1169ba0 GR |
2216 | if (i < 3 && !has_16bit_fans(data)) { |
2217 | err = sysfs_create_file(&dev->kobj, | |
2218 | it87_attributes_fan_div[i]); | |
2219 | if (err) | |
2220 | goto error; | |
2221 | } | |
2222 | ||
d9b327c3 JD |
2223 | if (sio_data->beep_pin) { |
2224 | err = sysfs_create_file(&dev->kobj, | |
2225 | it87_attributes_fan_beep[i]); | |
2226 | if (err) | |
62a1d05f | 2227 | goto error; |
d9b327c3 JD |
2228 | if (!fan_beep_need_rw) |
2229 | continue; | |
2230 | ||
4a0d71cf GR |
2231 | /* |
2232 | * As we have a single beep enable bit for all fans, | |
d9b327c3 | 2233 | * only the first enabled fan has a writable attribute |
4a0d71cf GR |
2234 | * for it. |
2235 | */ | |
d9b327c3 JD |
2236 | if (sysfs_chmod_file(&dev->kobj, |
2237 | it87_attributes_fan_beep[i], | |
2238 | S_IRUGO | S_IWUSR)) | |
2239 | dev_dbg(dev, "chmod +w fan%d_beep failed\n", | |
2240 | i + 1); | |
2241 | fan_beep_need_rw = 0; | |
2242 | } | |
17d648bf JD |
2243 | } |
2244 | ||
1da177e4 | 2245 | if (enable_pwm_interface) { |
723a0aa0 JD |
2246 | for (i = 0; i < 3; i++) { |
2247 | if (sio_data->skip_pwm & (1 << i)) | |
2248 | continue; | |
2249 | err = sysfs_create_group(&dev->kobj, | |
2250 | &it87_group_pwm[i]); | |
2251 | if (err) | |
62a1d05f | 2252 | goto error; |
4f3f51bc JD |
2253 | |
2254 | if (!has_old_autopwm(data)) | |
2255 | continue; | |
2256 | err = sysfs_create_group(&dev->kobj, | |
2257 | &it87_group_autopwm[i]); | |
2258 | if (err) | |
62a1d05f | 2259 | goto error; |
98dd22c3 | 2260 | } |
1da177e4 LT |
2261 | } |
2262 | ||
895ff267 | 2263 | if (!sio_data->skip_vid) { |
303760b4 | 2264 | data->vrm = vid_which_vrm(); |
87673dd7 | 2265 | /* VID reading from Super-I/O config space if available */ |
b74f3fdd | 2266 | data->vid = sio_data->vid_value; |
6a8d7acf JD |
2267 | err = sysfs_create_group(&dev->kobj, &it87_group_vid); |
2268 | if (err) | |
62a1d05f | 2269 | goto error; |
87808be4 JD |
2270 | } |
2271 | ||
738e5e05 | 2272 | /* Export labels for internal sensors */ |
c145d5c6 | 2273 | for (i = 0; i < 4; i++) { |
738e5e05 JD |
2274 | if (!(sio_data->internal & (1 << i))) |
2275 | continue; | |
2276 | err = sysfs_create_file(&dev->kobj, | |
2277 | it87_attributes_label[i]); | |
2278 | if (err) | |
62a1d05f | 2279 | goto error; |
738e5e05 JD |
2280 | } |
2281 | ||
1beeffe4 TJ |
2282 | data->hwmon_dev = hwmon_device_register(dev); |
2283 | if (IS_ERR(data->hwmon_dev)) { | |
2284 | err = PTR_ERR(data->hwmon_dev); | |
62a1d05f | 2285 | goto error; |
1da177e4 LT |
2286 | } |
2287 | ||
2288 | return 0; | |
2289 | ||
62a1d05f | 2290 | error: |
723a0aa0 | 2291 | it87_remove_files(dev); |
1da177e4 LT |
2292 | return err; |
2293 | } | |
2294 | ||
281dfd0b | 2295 | static int it87_remove(struct platform_device *pdev) |
1da177e4 | 2296 | { |
b74f3fdd | 2297 | struct it87_data *data = platform_get_drvdata(pdev); |
1da177e4 | 2298 | |
1beeffe4 | 2299 | hwmon_device_unregister(data->hwmon_dev); |
723a0aa0 | 2300 | it87_remove_files(&pdev->dev); |
943b0830 | 2301 | |
1da177e4 LT |
2302 | return 0; |
2303 | } | |
2304 | ||
4a0d71cf GR |
2305 | /* |
2306 | * Must be called with data->update_lock held, except during initialization. | |
2307 | * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks, | |
2308 | * would slow down the IT87 access and should not be necessary. | |
2309 | */ | |
b74f3fdd | 2310 | static int it87_read_value(struct it87_data *data, u8 reg) |
1da177e4 | 2311 | { |
b74f3fdd | 2312 | outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET); |
2313 | return inb_p(data->addr + IT87_DATA_REG_OFFSET); | |
1da177e4 LT |
2314 | } |
2315 | ||
4a0d71cf GR |
2316 | /* |
2317 | * Must be called with data->update_lock held, except during initialization. | |
2318 | * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks, | |
2319 | * would slow down the IT87 access and should not be necessary. | |
2320 | */ | |
b74f3fdd | 2321 | static void it87_write_value(struct it87_data *data, u8 reg, u8 value) |
1da177e4 | 2322 | { |
b74f3fdd | 2323 | outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET); |
2324 | outb_p(value, data->addr + IT87_DATA_REG_OFFSET); | |
1da177e4 LT |
2325 | } |
2326 | ||
2327 | /* Return 1 if and only if the PWM interface is safe to use */ | |
6c931ae1 | 2328 | static int it87_check_pwm(struct device *dev) |
1da177e4 | 2329 | { |
b74f3fdd | 2330 | struct it87_data *data = dev_get_drvdata(dev); |
4a0d71cf GR |
2331 | /* |
2332 | * Some BIOSes fail to correctly configure the IT87 fans. All fans off | |
1da177e4 | 2333 | * and polarity set to active low is sign that this is the case so we |
4a0d71cf GR |
2334 | * disable pwm control to protect the user. |
2335 | */ | |
b74f3fdd | 2336 | int tmp = it87_read_value(data, IT87_REG_FAN_CTL); |
1da177e4 LT |
2337 | if ((tmp & 0x87) == 0) { |
2338 | if (fix_pwm_polarity) { | |
4a0d71cf GR |
2339 | /* |
2340 | * The user asks us to attempt a chip reconfiguration. | |
1da177e4 | 2341 | * This means switching to active high polarity and |
4a0d71cf GR |
2342 | * inverting all fan speed values. |
2343 | */ | |
1da177e4 LT |
2344 | int i; |
2345 | u8 pwm[3]; | |
2346 | ||
2347 | for (i = 0; i < 3; i++) | |
b74f3fdd | 2348 | pwm[i] = it87_read_value(data, |
1da177e4 LT |
2349 | IT87_REG_PWM(i)); |
2350 | ||
4a0d71cf GR |
2351 | /* |
2352 | * If any fan is in automatic pwm mode, the polarity | |
1da177e4 LT |
2353 | * might be correct, as suspicious as it seems, so we |
2354 | * better don't change anything (but still disable the | |
4a0d71cf GR |
2355 | * PWM interface). |
2356 | */ | |
1da177e4 | 2357 | if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) { |
1d9bcf6a GR |
2358 | dev_info(dev, |
2359 | "Reconfiguring PWM to active high polarity\n"); | |
b74f3fdd | 2360 | it87_write_value(data, IT87_REG_FAN_CTL, |
1da177e4 LT |
2361 | tmp | 0x87); |
2362 | for (i = 0; i < 3; i++) | |
b74f3fdd | 2363 | it87_write_value(data, |
1da177e4 LT |
2364 | IT87_REG_PWM(i), |
2365 | 0x7f & ~pwm[i]); | |
2366 | return 1; | |
2367 | } | |
2368 | ||
1d9bcf6a GR |
2369 | dev_info(dev, |
2370 | "PWM configuration is too broken to be fixed\n"); | |
1da177e4 LT |
2371 | } |
2372 | ||
1d9bcf6a GR |
2373 | dev_info(dev, |
2374 | "Detected broken BIOS defaults, disabling PWM interface\n"); | |
1da177e4 LT |
2375 | return 0; |
2376 | } else if (fix_pwm_polarity) { | |
1d9bcf6a GR |
2377 | dev_info(dev, |
2378 | "PWM configuration looks sane, won't touch\n"); | |
1da177e4 LT |
2379 | } |
2380 | ||
2381 | return 1; | |
2382 | } | |
2383 | ||
2384 | /* Called when we have found a new IT87. */ | |
6c931ae1 | 2385 | static void it87_init_device(struct platform_device *pdev) |
1da177e4 | 2386 | { |
a8b3a3a5 | 2387 | struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev); |
b74f3fdd | 2388 | struct it87_data *data = platform_get_drvdata(pdev); |
1da177e4 | 2389 | int tmp, i; |
591ec650 | 2390 | u8 mask; |
1da177e4 | 2391 | |
4a0d71cf GR |
2392 | /* |
2393 | * For each PWM channel: | |
b99883dc JD |
2394 | * - If it is in automatic mode, setting to manual mode should set |
2395 | * the fan to full speed by default. | |
2396 | * - If it is in manual mode, we need a mapping to temperature | |
2397 | * channels to use when later setting to automatic mode later. | |
2398 | * Use a 1:1 mapping by default (we are clueless.) | |
2399 | * In both cases, the value can (and should) be changed by the user | |
6229cdb2 JD |
2400 | * prior to switching to a different mode. |
2401 | * Note that this is no longer needed for the IT8721F and later, as | |
2402 | * these have separate registers for the temperature mapping and the | |
4a0d71cf GR |
2403 | * manual duty cycle. |
2404 | */ | |
1da177e4 | 2405 | for (i = 0; i < 3; i++) { |
b99883dc JD |
2406 | data->pwm_temp_map[i] = i; |
2407 | data->pwm_duty[i] = 0x7f; /* Full speed */ | |
4f3f51bc | 2408 | data->auto_pwm[i][3] = 0x7f; /* Full speed, hard-coded */ |
1da177e4 LT |
2409 | } |
2410 | ||
4a0d71cf GR |
2411 | /* |
2412 | * Some chips seem to have default value 0xff for all limit | |
c5df9b7a JD |
2413 | * registers. For low voltage limits it makes no sense and triggers |
2414 | * alarms, so change to 0 instead. For high temperature limits, it | |
2415 | * means -1 degree C, which surprisingly doesn't trigger an alarm, | |
4a0d71cf GR |
2416 | * but is still confusing, so change to 127 degrees C. |
2417 | */ | |
c5df9b7a | 2418 | for (i = 0; i < 8; i++) { |
b74f3fdd | 2419 | tmp = it87_read_value(data, IT87_REG_VIN_MIN(i)); |
c5df9b7a | 2420 | if (tmp == 0xff) |
b74f3fdd | 2421 | it87_write_value(data, IT87_REG_VIN_MIN(i), 0); |
c5df9b7a JD |
2422 | } |
2423 | for (i = 0; i < 3; i++) { | |
b74f3fdd | 2424 | tmp = it87_read_value(data, IT87_REG_TEMP_HIGH(i)); |
c5df9b7a | 2425 | if (tmp == 0xff) |
b74f3fdd | 2426 | it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127); |
c5df9b7a JD |
2427 | } |
2428 | ||
4a0d71cf GR |
2429 | /* |
2430 | * Temperature channels are not forcibly enabled, as they can be | |
a00afb97 JD |
2431 | * set to two different sensor types and we can't guess which one |
2432 | * is correct for a given system. These channels can be enabled at | |
4a0d71cf GR |
2433 | * run-time through the temp{1-3}_type sysfs accessors if needed. |
2434 | */ | |
1da177e4 LT |
2435 | |
2436 | /* Check if voltage monitors are reset manually or by some reason */ | |
b74f3fdd | 2437 | tmp = it87_read_value(data, IT87_REG_VIN_ENABLE); |
1da177e4 LT |
2438 | if ((tmp & 0xff) == 0) { |
2439 | /* Enable all voltage monitors */ | |
b74f3fdd | 2440 | it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff); |
1da177e4 LT |
2441 | } |
2442 | ||
2443 | /* Check if tachometers are reset manually or by some reason */ | |
591ec650 | 2444 | mask = 0x70 & ~(sio_data->skip_fan << 4); |
b74f3fdd | 2445 | data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL); |
591ec650 | 2446 | if ((data->fan_main_ctrl & mask) == 0) { |
1da177e4 | 2447 | /* Enable all fan tachometers */ |
591ec650 | 2448 | data->fan_main_ctrl |= mask; |
5f2dc798 JD |
2449 | it87_write_value(data, IT87_REG_FAN_MAIN_CTRL, |
2450 | data->fan_main_ctrl); | |
1da177e4 | 2451 | } |
9060f8bd | 2452 | data->has_fan = (data->fan_main_ctrl >> 4) & 0x07; |
1da177e4 | 2453 | |
c145d5c6 RM |
2454 | /* Set tachometers to 16-bit mode if needed, IT8603E (and IT8728F?) |
2455 | * has it by default */ | |
2456 | if (has_16bit_fans(data) && data->type != it8603) { | |
b74f3fdd | 2457 | tmp = it87_read_value(data, IT87_REG_FAN_16BIT); |
9060f8bd | 2458 | if (~tmp & 0x07 & data->has_fan) { |
b74f3fdd | 2459 | dev_dbg(&pdev->dev, |
17d648bf | 2460 | "Setting fan1-3 to 16-bit mode\n"); |
b74f3fdd | 2461 | it87_write_value(data, IT87_REG_FAN_16BIT, |
17d648bf JD |
2462 | tmp | 0x07); |
2463 | } | |
0531d98b GR |
2464 | /* IT8705F, IT8782F, and IT8783E/F only support three fans. */ |
2465 | if (data->type != it87 && data->type != it8782 && | |
2466 | data->type != it8783) { | |
816d8c6a AP |
2467 | if (tmp & (1 << 4)) |
2468 | data->has_fan |= (1 << 3); /* fan4 enabled */ | |
2469 | if (tmp & (1 << 5)) | |
2470 | data->has_fan |= (1 << 4); /* fan5 enabled */ | |
2471 | } | |
17d648bf JD |
2472 | } |
2473 | ||
591ec650 JD |
2474 | /* Fan input pins may be used for alternative functions */ |
2475 | data->has_fan &= ~sio_data->skip_fan; | |
2476 | ||
1da177e4 | 2477 | /* Start monitoring */ |
b74f3fdd | 2478 | it87_write_value(data, IT87_REG_CONFIG, |
41002f8d | 2479 | (it87_read_value(data, IT87_REG_CONFIG) & 0x3e) |
1da177e4 LT |
2480 | | (update_vbat ? 0x41 : 0x01)); |
2481 | } | |
2482 | ||
b99883dc JD |
2483 | static void it87_update_pwm_ctrl(struct it87_data *data, int nr) |
2484 | { | |
2485 | data->pwm_ctrl[nr] = it87_read_value(data, IT87_REG_PWM(nr)); | |
16b5dda2 | 2486 | if (has_newer_autopwm(data)) { |
b99883dc | 2487 | data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03; |
6229cdb2 JD |
2488 | data->pwm_duty[nr] = it87_read_value(data, |
2489 | IT87_REG_PWM_DUTY(nr)); | |
2490 | } else { | |
2491 | if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */ | |
2492 | data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03; | |
2493 | else /* Manual mode */ | |
2494 | data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f; | |
2495 | } | |
4f3f51bc JD |
2496 | |
2497 | if (has_old_autopwm(data)) { | |
2498 | int i; | |
2499 | ||
2500 | for (i = 0; i < 5 ; i++) | |
2501 | data->auto_temp[nr][i] = it87_read_value(data, | |
2502 | IT87_REG_AUTO_TEMP(nr, i)); | |
2503 | for (i = 0; i < 3 ; i++) | |
2504 | data->auto_pwm[nr][i] = it87_read_value(data, | |
2505 | IT87_REG_AUTO_PWM(nr, i)); | |
2506 | } | |
b99883dc JD |
2507 | } |
2508 | ||
1da177e4 LT |
2509 | static struct it87_data *it87_update_device(struct device *dev) |
2510 | { | |
b74f3fdd | 2511 | struct it87_data *data = dev_get_drvdata(dev); |
1da177e4 LT |
2512 | int i; |
2513 | ||
9a61bf63 | 2514 | mutex_lock(&data->update_lock); |
1da177e4 LT |
2515 | |
2516 | if (time_after(jiffies, data->last_updated + HZ + HZ / 2) | |
2517 | || !data->valid) { | |
1da177e4 | 2518 | if (update_vbat) { |
4a0d71cf GR |
2519 | /* |
2520 | * Cleared after each update, so reenable. Value | |
2521 | * returned by this read will be previous value | |
2522 | */ | |
b74f3fdd | 2523 | it87_write_value(data, IT87_REG_CONFIG, |
5f2dc798 | 2524 | it87_read_value(data, IT87_REG_CONFIG) | 0x40); |
1da177e4 LT |
2525 | } |
2526 | for (i = 0; i <= 7; i++) { | |
929c6a56 | 2527 | data->in[i][0] = |
5f2dc798 | 2528 | it87_read_value(data, IT87_REG_VIN(i)); |
929c6a56 | 2529 | data->in[i][1] = |
5f2dc798 | 2530 | it87_read_value(data, IT87_REG_VIN_MIN(i)); |
929c6a56 | 2531 | data->in[i][2] = |
5f2dc798 | 2532 | it87_read_value(data, IT87_REG_VIN_MAX(i)); |
1da177e4 | 2533 | } |
3543a53f | 2534 | /* in8 (battery) has no limit registers */ |
929c6a56 | 2535 | data->in[8][0] = it87_read_value(data, IT87_REG_VIN(8)); |
c145d5c6 RM |
2536 | if (data->type == it8603) |
2537 | data->in[9][0] = it87_read_value(data, 0x2f); | |
1da177e4 | 2538 | |
c7f1f716 | 2539 | for (i = 0; i < 5; i++) { |
9060f8bd JD |
2540 | /* Skip disabled fans */ |
2541 | if (!(data->has_fan & (1 << i))) | |
2542 | continue; | |
2543 | ||
e1169ba0 | 2544 | data->fan[i][1] = |
5f2dc798 | 2545 | it87_read_value(data, IT87_REG_FAN_MIN[i]); |
e1169ba0 | 2546 | data->fan[i][0] = it87_read_value(data, |
c7f1f716 | 2547 | IT87_REG_FAN[i]); |
17d648bf | 2548 | /* Add high byte if in 16-bit mode */ |
0475169c | 2549 | if (has_16bit_fans(data)) { |
e1169ba0 | 2550 | data->fan[i][0] |= it87_read_value(data, |
c7f1f716 | 2551 | IT87_REG_FANX[i]) << 8; |
e1169ba0 | 2552 | data->fan[i][1] |= it87_read_value(data, |
c7f1f716 | 2553 | IT87_REG_FANX_MIN[i]) << 8; |
17d648bf | 2554 | } |
1da177e4 LT |
2555 | } |
2556 | for (i = 0; i < 3; i++) { | |
4573acbc GR |
2557 | if (!(data->has_temp & (1 << i))) |
2558 | continue; | |
60ca385a | 2559 | data->temp[i][0] = |
5f2dc798 | 2560 | it87_read_value(data, IT87_REG_TEMP(i)); |
60ca385a | 2561 | data->temp[i][1] = |
5f2dc798 | 2562 | it87_read_value(data, IT87_REG_TEMP_LOW(i)); |
60ca385a GR |
2563 | data->temp[i][2] = |
2564 | it87_read_value(data, IT87_REG_TEMP_HIGH(i)); | |
161d898a GR |
2565 | if (has_temp_offset(data)) |
2566 | data->temp[i][3] = | |
2567 | it87_read_value(data, | |
2568 | IT87_REG_TEMP_OFFSET[i]); | |
1da177e4 LT |
2569 | } |
2570 | ||
17d648bf | 2571 | /* Newer chips don't have clock dividers */ |
0475169c | 2572 | if ((data->has_fan & 0x07) && !has_16bit_fans(data)) { |
b74f3fdd | 2573 | i = it87_read_value(data, IT87_REG_FAN_DIV); |
17d648bf JD |
2574 | data->fan_div[0] = i & 0x07; |
2575 | data->fan_div[1] = (i >> 3) & 0x07; | |
2576 | data->fan_div[2] = (i & 0x40) ? 3 : 1; | |
2577 | } | |
1da177e4 LT |
2578 | |
2579 | data->alarms = | |
b74f3fdd | 2580 | it87_read_value(data, IT87_REG_ALARM1) | |
2581 | (it87_read_value(data, IT87_REG_ALARM2) << 8) | | |
2582 | (it87_read_value(data, IT87_REG_ALARM3) << 16); | |
d9b327c3 | 2583 | data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE); |
b99883dc | 2584 | |
b74f3fdd | 2585 | data->fan_main_ctrl = it87_read_value(data, |
2586 | IT87_REG_FAN_MAIN_CTRL); | |
2587 | data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL); | |
b99883dc JD |
2588 | for (i = 0; i < 3; i++) |
2589 | it87_update_pwm_ctrl(data, i); | |
b74f3fdd | 2590 | |
2591 | data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE); | |
19529784 | 2592 | data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA); |
4a0d71cf GR |
2593 | /* |
2594 | * The IT8705F does not have VID capability. | |
2595 | * The IT8718F and later don't use IT87_REG_VID for the | |
2596 | * same purpose. | |
2597 | */ | |
17d648bf | 2598 | if (data->type == it8712 || data->type == it8716) { |
b74f3fdd | 2599 | data->vid = it87_read_value(data, IT87_REG_VID); |
4a0d71cf GR |
2600 | /* |
2601 | * The older IT8712F revisions had only 5 VID pins, | |
2602 | * but we assume it is always safe to read 6 bits. | |
2603 | */ | |
17d648bf | 2604 | data->vid &= 0x3f; |
1da177e4 LT |
2605 | } |
2606 | data->last_updated = jiffies; | |
2607 | data->valid = 1; | |
2608 | } | |
2609 | ||
9a61bf63 | 2610 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
2611 | |
2612 | return data; | |
2613 | } | |
2614 | ||
b74f3fdd | 2615 | static int __init it87_device_add(unsigned short address, |
2616 | const struct it87_sio_data *sio_data) | |
2617 | { | |
2618 | struct resource res = { | |
87b4b663 BH |
2619 | .start = address + IT87_EC_OFFSET, |
2620 | .end = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1, | |
b74f3fdd | 2621 | .name = DRVNAME, |
2622 | .flags = IORESOURCE_IO, | |
2623 | }; | |
2624 | int err; | |
2625 | ||
b9acb64a JD |
2626 | err = acpi_check_resource_conflict(&res); |
2627 | if (err) | |
2628 | goto exit; | |
2629 | ||
b74f3fdd | 2630 | pdev = platform_device_alloc(DRVNAME, address); |
2631 | if (!pdev) { | |
2632 | err = -ENOMEM; | |
a8ca1037 | 2633 | pr_err("Device allocation failed\n"); |
b74f3fdd | 2634 | goto exit; |
2635 | } | |
2636 | ||
2637 | err = platform_device_add_resources(pdev, &res, 1); | |
2638 | if (err) { | |
a8ca1037 | 2639 | pr_err("Device resource addition failed (%d)\n", err); |
b74f3fdd | 2640 | goto exit_device_put; |
2641 | } | |
2642 | ||
2643 | err = platform_device_add_data(pdev, sio_data, | |
2644 | sizeof(struct it87_sio_data)); | |
2645 | if (err) { | |
a8ca1037 | 2646 | pr_err("Platform data allocation failed\n"); |
b74f3fdd | 2647 | goto exit_device_put; |
2648 | } | |
2649 | ||
2650 | err = platform_device_add(pdev); | |
2651 | if (err) { | |
a8ca1037 | 2652 | pr_err("Device addition failed (%d)\n", err); |
b74f3fdd | 2653 | goto exit_device_put; |
2654 | } | |
2655 | ||
2656 | return 0; | |
2657 | ||
2658 | exit_device_put: | |
2659 | platform_device_put(pdev); | |
2660 | exit: | |
2661 | return err; | |
2662 | } | |
2663 | ||
1da177e4 LT |
2664 | static int __init sm_it87_init(void) |
2665 | { | |
b74f3fdd | 2666 | int err; |
5f2dc798 | 2667 | unsigned short isa_address = 0; |
b74f3fdd | 2668 | struct it87_sio_data sio_data; |
2669 | ||
98dd22c3 | 2670 | memset(&sio_data, 0, sizeof(struct it87_sio_data)); |
b74f3fdd | 2671 | err = it87_find(&isa_address, &sio_data); |
2672 | if (err) | |
2673 | return err; | |
2674 | err = platform_driver_register(&it87_driver); | |
2675 | if (err) | |
2676 | return err; | |
fde09509 | 2677 | |
b74f3fdd | 2678 | err = it87_device_add(isa_address, &sio_data); |
5f2dc798 | 2679 | if (err) { |
b74f3fdd | 2680 | platform_driver_unregister(&it87_driver); |
2681 | return err; | |
2682 | } | |
2683 | ||
2684 | return 0; | |
1da177e4 LT |
2685 | } |
2686 | ||
2687 | static void __exit sm_it87_exit(void) | |
2688 | { | |
b74f3fdd | 2689 | platform_device_unregister(pdev); |
2690 | platform_driver_unregister(&it87_driver); | |
1da177e4 LT |
2691 | } |
2692 | ||
2693 | ||
7c81c60f | 2694 | MODULE_AUTHOR("Chris Gauthron, Jean Delvare <jdelvare@suse.de>"); |
44c1bcd4 | 2695 | MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver"); |
1da177e4 LT |
2696 | module_param(update_vbat, bool, 0); |
2697 | MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value"); | |
2698 | module_param(fix_pwm_polarity, bool, 0); | |
5f2dc798 JD |
2699 | MODULE_PARM_DESC(fix_pwm_polarity, |
2700 | "Force PWM polarity to active high (DANGEROUS)"); | |
1da177e4 LT |
2701 | MODULE_LICENSE("GPL"); |
2702 | ||
2703 | module_init(sm_it87_init); | |
2704 | module_exit(sm_it87_exit); |