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Commit | Line | Data |
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1da177e4 | 1 | /* |
5f2dc798 JD |
2 | * it87.c - Part of lm_sensors, Linux kernel modules for hardware |
3 | * monitoring. | |
4 | * | |
5 | * The IT8705F is an LPC-based Super I/O part that contains UARTs, a | |
6 | * parallel port, an IR port, a MIDI port, a floppy controller, etc., in | |
7 | * addition to an Environment Controller (Enhanced Hardware Monitor and | |
8 | * Fan Controller) | |
9 | * | |
10 | * This driver supports only the Environment Controller in the IT8705F and | |
11 | * similar parts. The other devices are supported by different drivers. | |
12 | * | |
c145d5c6 | 13 | * Supports: IT8603E Super I/O chip w/LPC interface |
574e9bd8 | 14 | * IT8623E Super I/O chip w/LPC interface |
c145d5c6 | 15 | * IT8705F Super I/O chip w/LPC interface |
5f2dc798 JD |
16 | * IT8712F Super I/O chip w/LPC interface |
17 | * IT8716F Super I/O chip w/LPC interface | |
18 | * IT8718F Super I/O chip w/LPC interface | |
19 | * IT8720F Super I/O chip w/LPC interface | |
44c1bcd4 | 20 | * IT8721F Super I/O chip w/LPC interface |
5f2dc798 | 21 | * IT8726F Super I/O chip w/LPC interface |
16b5dda2 | 22 | * IT8728F Super I/O chip w/LPC interface |
44c1bcd4 | 23 | * IT8758E Super I/O chip w/LPC interface |
b0636707 GR |
24 | * IT8771E Super I/O chip w/LPC interface |
25 | * IT8772E Super I/O chip w/LPC interface | |
7bc32d29 | 26 | * IT8781F Super I/O chip w/LPC interface |
0531d98b GR |
27 | * IT8782F Super I/O chip w/LPC interface |
28 | * IT8783E/F Super I/O chip w/LPC interface | |
a0c1424a | 29 | * IT8786E Super I/O chip w/LPC interface |
4ee07157 | 30 | * IT8790E Super I/O chip w/LPC interface |
5f2dc798 JD |
31 | * Sis950 A clone of the IT8705F |
32 | * | |
33 | * Copyright (C) 2001 Chris Gauthron | |
7c81c60f | 34 | * Copyright (C) 2005-2010 Jean Delvare <jdelvare@suse.de> |
5f2dc798 JD |
35 | * |
36 | * This program is free software; you can redistribute it and/or modify | |
37 | * it under the terms of the GNU General Public License as published by | |
38 | * the Free Software Foundation; either version 2 of the License, or | |
39 | * (at your option) any later version. | |
40 | * | |
41 | * This program is distributed in the hope that it will be useful, | |
42 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
43 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
44 | * GNU General Public License for more details. | |
45 | * | |
46 | * You should have received a copy of the GNU General Public License | |
47 | * along with this program; if not, write to the Free Software | |
48 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
49 | */ | |
1da177e4 | 50 | |
a8ca1037 JP |
51 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
52 | ||
1da177e4 LT |
53 | #include <linux/module.h> |
54 | #include <linux/init.h> | |
55 | #include <linux/slab.h> | |
56 | #include <linux/jiffies.h> | |
b74f3fdd | 57 | #include <linux/platform_device.h> |
943b0830 | 58 | #include <linux/hwmon.h> |
303760b4 JD |
59 | #include <linux/hwmon-sysfs.h> |
60 | #include <linux/hwmon-vid.h> | |
943b0830 | 61 | #include <linux/err.h> |
9a61bf63 | 62 | #include <linux/mutex.h> |
87808be4 | 63 | #include <linux/sysfs.h> |
98dd22c3 JD |
64 | #include <linux/string.h> |
65 | #include <linux/dmi.h> | |
b9acb64a | 66 | #include <linux/acpi.h> |
6055fae8 | 67 | #include <linux/io.h> |
1da177e4 | 68 | |
b74f3fdd | 69 | #define DRVNAME "it87" |
1da177e4 | 70 | |
b0636707 | 71 | enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8771, |
4ee07157 | 72 | it8772, it8781, it8782, it8783, it8786, it8790, it8603 }; |
1da177e4 | 73 | |
67b671bc JD |
74 | static unsigned short force_id; |
75 | module_param(force_id, ushort, 0); | |
76 | MODULE_PARM_DESC(force_id, "Override the detected device ID"); | |
77 | ||
b74f3fdd | 78 | static struct platform_device *pdev; |
79 | ||
1da177e4 LT |
80 | #define REG 0x2e /* The register to read/write */ |
81 | #define DEV 0x07 /* Register: Logical device select */ | |
82 | #define VAL 0x2f /* The value to read/write */ | |
83 | #define PME 0x04 /* The device with the fan registers in it */ | |
b4da93e4 JMS |
84 | |
85 | /* The device with the IT8718F/IT8720F VID value in it */ | |
86 | #define GPIO 0x07 | |
87 | ||
1da177e4 LT |
88 | #define DEVID 0x20 /* Register: Device ID */ |
89 | #define DEVREV 0x22 /* Register: Device Revision */ | |
90 | ||
5b0380c9 | 91 | static inline int superio_inb(int reg) |
1da177e4 LT |
92 | { |
93 | outb(reg, REG); | |
94 | return inb(VAL); | |
95 | } | |
96 | ||
5b0380c9 | 97 | static inline void superio_outb(int reg, int val) |
436cad2a JD |
98 | { |
99 | outb(reg, REG); | |
100 | outb(val, VAL); | |
101 | } | |
102 | ||
1da177e4 LT |
103 | static int superio_inw(int reg) |
104 | { | |
105 | int val; | |
106 | outb(reg++, REG); | |
107 | val = inb(VAL) << 8; | |
108 | outb(reg, REG); | |
109 | val |= inb(VAL); | |
110 | return val; | |
111 | } | |
112 | ||
5b0380c9 | 113 | static inline void superio_select(int ldn) |
1da177e4 LT |
114 | { |
115 | outb(DEV, REG); | |
87673dd7 | 116 | outb(ldn, VAL); |
1da177e4 LT |
117 | } |
118 | ||
5b0380c9 | 119 | static inline int superio_enter(void) |
1da177e4 | 120 | { |
5b0380c9 NG |
121 | /* |
122 | * Try to reserve REG and REG + 1 for exclusive access. | |
123 | */ | |
124 | if (!request_muxed_region(REG, 2, DRVNAME)) | |
125 | return -EBUSY; | |
126 | ||
1da177e4 LT |
127 | outb(0x87, REG); |
128 | outb(0x01, REG); | |
129 | outb(0x55, REG); | |
130 | outb(0x55, REG); | |
5b0380c9 | 131 | return 0; |
1da177e4 LT |
132 | } |
133 | ||
5b0380c9 | 134 | static inline void superio_exit(void) |
1da177e4 LT |
135 | { |
136 | outb(0x02, REG); | |
137 | outb(0x02, VAL); | |
5b0380c9 | 138 | release_region(REG, 2); |
1da177e4 LT |
139 | } |
140 | ||
87673dd7 | 141 | /* Logical device 4 registers */ |
1da177e4 LT |
142 | #define IT8712F_DEVID 0x8712 |
143 | #define IT8705F_DEVID 0x8705 | |
17d648bf | 144 | #define IT8716F_DEVID 0x8716 |
87673dd7 | 145 | #define IT8718F_DEVID 0x8718 |
b4da93e4 | 146 | #define IT8720F_DEVID 0x8720 |
44c1bcd4 | 147 | #define IT8721F_DEVID 0x8721 |
08a8f6e9 | 148 | #define IT8726F_DEVID 0x8726 |
16b5dda2 | 149 | #define IT8728F_DEVID 0x8728 |
b0636707 GR |
150 | #define IT8771E_DEVID 0x8771 |
151 | #define IT8772E_DEVID 0x8772 | |
7bc32d29 | 152 | #define IT8781F_DEVID 0x8781 |
0531d98b GR |
153 | #define IT8782F_DEVID 0x8782 |
154 | #define IT8783E_DEVID 0x8783 | |
a0c1424a | 155 | #define IT8786E_DEVID 0x8786 |
4ee07157 | 156 | #define IT8790E_DEVID 0x8790 |
7183ae8c | 157 | #define IT8603E_DEVID 0x8603 |
574e9bd8 | 158 | #define IT8623E_DEVID 0x8623 |
1da177e4 LT |
159 | #define IT87_ACT_REG 0x30 |
160 | #define IT87_BASE_REG 0x60 | |
161 | ||
87673dd7 | 162 | /* Logical device 7 registers (IT8712F and later) */ |
0531d98b | 163 | #define IT87_SIO_GPIO1_REG 0x25 |
895ff267 | 164 | #define IT87_SIO_GPIO3_REG 0x27 |
591ec650 | 165 | #define IT87_SIO_GPIO5_REG 0x29 |
0531d98b | 166 | #define IT87_SIO_PINX1_REG 0x2a /* Pin selection */ |
87673dd7 | 167 | #define IT87_SIO_PINX2_REG 0x2c /* Pin selection */ |
0531d98b | 168 | #define IT87_SIO_SPI_REG 0xef /* SPI function pin select */ |
87673dd7 | 169 | #define IT87_SIO_VID_REG 0xfc /* VID value */ |
d9b327c3 | 170 | #define IT87_SIO_BEEP_PIN_REG 0xf6 /* Beep pin mapping */ |
87673dd7 | 171 | |
1da177e4 | 172 | /* Update battery voltage after every reading if true */ |
90ab5ee9 | 173 | static bool update_vbat; |
1da177e4 LT |
174 | |
175 | /* Not all BIOSes properly configure the PWM registers */ | |
90ab5ee9 | 176 | static bool fix_pwm_polarity; |
1da177e4 | 177 | |
1da177e4 LT |
178 | /* Many IT87 constants specified below */ |
179 | ||
180 | /* Length of ISA address segment */ | |
181 | #define IT87_EXTENT 8 | |
182 | ||
87b4b663 BH |
183 | /* Length of ISA address segment for Environmental Controller */ |
184 | #define IT87_EC_EXTENT 2 | |
185 | ||
186 | /* Offset of EC registers from ISA base address */ | |
187 | #define IT87_EC_OFFSET 5 | |
188 | ||
189 | /* Where are the ISA address/data registers relative to the EC base address */ | |
190 | #define IT87_ADDR_REG_OFFSET 0 | |
191 | #define IT87_DATA_REG_OFFSET 1 | |
1da177e4 LT |
192 | |
193 | /*----- The IT87 registers -----*/ | |
194 | ||
195 | #define IT87_REG_CONFIG 0x00 | |
196 | ||
197 | #define IT87_REG_ALARM1 0x01 | |
198 | #define IT87_REG_ALARM2 0x02 | |
199 | #define IT87_REG_ALARM3 0x03 | |
200 | ||
4a0d71cf GR |
201 | /* |
202 | * The IT8718F and IT8720F have the VID value in a different register, in | |
203 | * Super-I/O configuration space. | |
204 | */ | |
1da177e4 | 205 | #define IT87_REG_VID 0x0a |
4a0d71cf GR |
206 | /* |
207 | * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b | |
208 | * for fan divisors. Later IT8712F revisions must use 16-bit tachometer | |
209 | * mode. | |
210 | */ | |
1da177e4 | 211 | #define IT87_REG_FAN_DIV 0x0b |
17d648bf | 212 | #define IT87_REG_FAN_16BIT 0x0c |
1da177e4 LT |
213 | |
214 | /* Monitors: 9 voltage (0 to 7, battery), 3 temp (1 to 3), 3 fan (1 to 3) */ | |
215 | ||
c7f1f716 JD |
216 | static const u8 IT87_REG_FAN[] = { 0x0d, 0x0e, 0x0f, 0x80, 0x82 }; |
217 | static const u8 IT87_REG_FAN_MIN[] = { 0x10, 0x11, 0x12, 0x84, 0x86 }; | |
218 | static const u8 IT87_REG_FANX[] = { 0x18, 0x19, 0x1a, 0x81, 0x83 }; | |
219 | static const u8 IT87_REG_FANX_MIN[] = { 0x1b, 0x1c, 0x1d, 0x85, 0x87 }; | |
161d898a GR |
220 | static const u8 IT87_REG_TEMP_OFFSET[] = { 0x56, 0x57, 0x59 }; |
221 | ||
1da177e4 LT |
222 | #define IT87_REG_FAN_MAIN_CTRL 0x13 |
223 | #define IT87_REG_FAN_CTL 0x14 | |
224 | #define IT87_REG_PWM(nr) (0x15 + (nr)) | |
6229cdb2 | 225 | #define IT87_REG_PWM_DUTY(nr) (0x63 + (nr) * 8) |
1da177e4 LT |
226 | |
227 | #define IT87_REG_VIN(nr) (0x20 + (nr)) | |
228 | #define IT87_REG_TEMP(nr) (0x29 + (nr)) | |
229 | ||
230 | #define IT87_REG_VIN_MAX(nr) (0x30 + (nr) * 2) | |
231 | #define IT87_REG_VIN_MIN(nr) (0x31 + (nr) * 2) | |
232 | #define IT87_REG_TEMP_HIGH(nr) (0x40 + (nr) * 2) | |
233 | #define IT87_REG_TEMP_LOW(nr) (0x41 + (nr) * 2) | |
234 | ||
1da177e4 LT |
235 | #define IT87_REG_VIN_ENABLE 0x50 |
236 | #define IT87_REG_TEMP_ENABLE 0x51 | |
4573acbc | 237 | #define IT87_REG_TEMP_EXTRA 0x55 |
d9b327c3 | 238 | #define IT87_REG_BEEP_ENABLE 0x5c |
1da177e4 LT |
239 | |
240 | #define IT87_REG_CHIPID 0x58 | |
241 | ||
4f3f51bc JD |
242 | #define IT87_REG_AUTO_TEMP(nr, i) (0x60 + (nr) * 8 + (i)) |
243 | #define IT87_REG_AUTO_PWM(nr, i) (0x65 + (nr) * 8 + (i)) | |
244 | ||
483db43e GR |
245 | struct it87_devices { |
246 | const char *name; | |
faf392fb | 247 | const char * const suffix; |
483db43e | 248 | u16 features; |
19529784 GR |
249 | u8 peci_mask; |
250 | u8 old_peci_mask; | |
483db43e GR |
251 | }; |
252 | ||
253 | #define FEAT_12MV_ADC (1 << 0) | |
254 | #define FEAT_NEWER_AUTOPWM (1 << 1) | |
255 | #define FEAT_OLD_AUTOPWM (1 << 2) | |
256 | #define FEAT_16BIT_FANS (1 << 3) | |
257 | #define FEAT_TEMP_OFFSET (1 << 4) | |
5d8d2f2b | 258 | #define FEAT_TEMP_PECI (1 << 5) |
19529784 | 259 | #define FEAT_TEMP_OLD_PECI (1 << 6) |
9faf28ca GR |
260 | #define FEAT_FAN16_CONFIG (1 << 7) /* Need to enable 16-bit fans */ |
261 | #define FEAT_FIVE_FANS (1 << 8) /* Supports five fans */ | |
32dd7c40 | 262 | #define FEAT_VID (1 << 9) /* Set if chip supports VID */ |
7f5726c3 | 263 | #define FEAT_IN7_INTERNAL (1 << 10) /* Set if in7 is internal */ |
483db43e GR |
264 | |
265 | static const struct it87_devices it87_devices[] = { | |
266 | [it87] = { | |
267 | .name = "it87", | |
faf392fb | 268 | .suffix = "F", |
483db43e GR |
269 | .features = FEAT_OLD_AUTOPWM, /* may need to overwrite */ |
270 | }, | |
271 | [it8712] = { | |
272 | .name = "it8712", | |
faf392fb | 273 | .suffix = "F", |
32dd7c40 GR |
274 | .features = FEAT_OLD_AUTOPWM | FEAT_VID, |
275 | /* may need to overwrite */ | |
483db43e GR |
276 | }, |
277 | [it8716] = { | |
278 | .name = "it8716", | |
faf392fb | 279 | .suffix = "F", |
32dd7c40 | 280 | .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID |
9faf28ca | 281 | | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS, |
483db43e GR |
282 | }, |
283 | [it8718] = { | |
284 | .name = "it8718", | |
faf392fb | 285 | .suffix = "F", |
32dd7c40 | 286 | .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID |
9faf28ca | 287 | | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS, |
19529784 | 288 | .old_peci_mask = 0x4, |
483db43e GR |
289 | }, |
290 | [it8720] = { | |
291 | .name = "it8720", | |
faf392fb | 292 | .suffix = "F", |
32dd7c40 | 293 | .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID |
9faf28ca | 294 | | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS, |
19529784 | 295 | .old_peci_mask = 0x4, |
483db43e GR |
296 | }, |
297 | [it8721] = { | |
298 | .name = "it8721", | |
faf392fb | 299 | .suffix = "F", |
483db43e | 300 | .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS |
9faf28ca | 301 | | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI |
7f5726c3 | 302 | | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_IN7_INTERNAL, |
5d8d2f2b | 303 | .peci_mask = 0x05, |
19529784 | 304 | .old_peci_mask = 0x02, /* Actually reports PCH */ |
483db43e GR |
305 | }, |
306 | [it8728] = { | |
307 | .name = "it8728", | |
faf392fb | 308 | .suffix = "F", |
483db43e | 309 | .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS |
7f5726c3 GR |
310 | | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS |
311 | | FEAT_IN7_INTERNAL, | |
5d8d2f2b | 312 | .peci_mask = 0x07, |
483db43e | 313 | }, |
b0636707 GR |
314 | [it8771] = { |
315 | .name = "it8771", | |
faf392fb | 316 | .suffix = "E", |
b0636707 | 317 | .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS |
7f5726c3 | 318 | | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL, |
9faf28ca GR |
319 | /* PECI: guesswork */ |
320 | /* 12mV ADC (OHM) */ | |
321 | /* 16 bit fans (OHM) */ | |
322 | /* three fans, always 16 bit (guesswork) */ | |
b0636707 GR |
323 | .peci_mask = 0x07, |
324 | }, | |
325 | [it8772] = { | |
326 | .name = "it8772", | |
faf392fb | 327 | .suffix = "E", |
b0636707 | 328 | .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS |
7f5726c3 | 329 | | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL, |
9faf28ca GR |
330 | /* PECI (coreboot) */ |
331 | /* 12mV ADC (HWSensors4, OHM) */ | |
332 | /* 16 bit fans (HWSensors4, OHM) */ | |
333 | /* three fans, always 16 bit (datasheet) */ | |
b0636707 GR |
334 | .peci_mask = 0x07, |
335 | }, | |
7bc32d29 GR |
336 | [it8781] = { |
337 | .name = "it8781", | |
faf392fb | 338 | .suffix = "F", |
7bc32d29 | 339 | .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET |
9faf28ca | 340 | | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG, |
7bc32d29 GR |
341 | .old_peci_mask = 0x4, |
342 | }, | |
483db43e GR |
343 | [it8782] = { |
344 | .name = "it8782", | |
faf392fb | 345 | .suffix = "F", |
19529784 | 346 | .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET |
9faf28ca | 347 | | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG, |
19529784 | 348 | .old_peci_mask = 0x4, |
483db43e GR |
349 | }, |
350 | [it8783] = { | |
351 | .name = "it8783", | |
faf392fb | 352 | .suffix = "E/F", |
19529784 | 353 | .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET |
9faf28ca | 354 | | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG, |
19529784 | 355 | .old_peci_mask = 0x4, |
483db43e | 356 | }, |
a0c1424a TL |
357 | [it8786] = { |
358 | .name = "it8786", | |
faf392fb | 359 | .suffix = "E", |
a0c1424a | 360 | .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS |
7f5726c3 | 361 | | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL, |
a0c1424a TL |
362 | .peci_mask = 0x07, |
363 | }, | |
4ee07157 GR |
364 | [it8790] = { |
365 | .name = "it8790", | |
366 | .suffix = "E", | |
367 | .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS | |
368 | | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL, | |
369 | .peci_mask = 0x07, | |
370 | }, | |
c145d5c6 RM |
371 | [it8603] = { |
372 | .name = "it8603", | |
faf392fb | 373 | .suffix = "E", |
c145d5c6 | 374 | .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS |
7f5726c3 | 375 | | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL, |
c145d5c6 RM |
376 | .peci_mask = 0x07, |
377 | }, | |
483db43e GR |
378 | }; |
379 | ||
380 | #define has_16bit_fans(data) ((data)->features & FEAT_16BIT_FANS) | |
381 | #define has_12mv_adc(data) ((data)->features & FEAT_12MV_ADC) | |
382 | #define has_newer_autopwm(data) ((data)->features & FEAT_NEWER_AUTOPWM) | |
383 | #define has_old_autopwm(data) ((data)->features & FEAT_OLD_AUTOPWM) | |
384 | #define has_temp_offset(data) ((data)->features & FEAT_TEMP_OFFSET) | |
5d8d2f2b GR |
385 | #define has_temp_peci(data, nr) (((data)->features & FEAT_TEMP_PECI) && \ |
386 | ((data)->peci_mask & (1 << nr))) | |
19529784 GR |
387 | #define has_temp_old_peci(data, nr) \ |
388 | (((data)->features & FEAT_TEMP_OLD_PECI) && \ | |
389 | ((data)->old_peci_mask & (1 << nr))) | |
9faf28ca GR |
390 | #define has_fan16_config(data) ((data)->features & FEAT_FAN16_CONFIG) |
391 | #define has_five_fans(data) ((data)->features & FEAT_FIVE_FANS) | |
32dd7c40 | 392 | #define has_vid(data) ((data)->features & FEAT_VID) |
7f5726c3 | 393 | #define has_in7_internal(data) ((data)->features & FEAT_IN7_INTERNAL) |
1da177e4 | 394 | |
b74f3fdd | 395 | struct it87_sio_data { |
396 | enum chips type; | |
397 | /* Values read from Super-I/O config space */ | |
0475169c | 398 | u8 revision; |
b74f3fdd | 399 | u8 vid_value; |
d9b327c3 | 400 | u8 beep_pin; |
738e5e05 | 401 | u8 internal; /* Internal sensors can be labeled */ |
591ec650 | 402 | /* Features skipped based on config or DMI */ |
9172b5d1 | 403 | u16 skip_in; |
895ff267 | 404 | u8 skip_vid; |
591ec650 | 405 | u8 skip_fan; |
98dd22c3 | 406 | u8 skip_pwm; |
4573acbc | 407 | u8 skip_temp; |
b74f3fdd | 408 | }; |
409 | ||
4a0d71cf GR |
410 | /* |
411 | * For each registered chip, we need to keep some data in memory. | |
412 | * The structure is dynamically allocated. | |
413 | */ | |
1da177e4 | 414 | struct it87_data { |
1beeffe4 | 415 | struct device *hwmon_dev; |
1da177e4 | 416 | enum chips type; |
483db43e | 417 | u16 features; |
19529784 GR |
418 | u8 peci_mask; |
419 | u8 old_peci_mask; | |
1da177e4 | 420 | |
b74f3fdd | 421 | unsigned short addr; |
422 | const char *name; | |
9a61bf63 | 423 | struct mutex update_lock; |
1da177e4 LT |
424 | char valid; /* !=0 if following fields are valid */ |
425 | unsigned long last_updated; /* In jiffies */ | |
426 | ||
44c1bcd4 | 427 | u16 in_scaled; /* Internal voltage sensors are scaled */ |
c145d5c6 | 428 | u8 in[10][3]; /* [nr][0]=in, [1]=min, [2]=max */ |
9060f8bd | 429 | u8 has_fan; /* Bitfield, fans enabled */ |
e1169ba0 | 430 | u16 fan[5][2]; /* Register values, [nr][0]=fan, [1]=min */ |
4573acbc | 431 | u8 has_temp; /* Bitfield, temp sensors enabled */ |
161d898a | 432 | s8 temp[3][4]; /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */ |
19529784 GR |
433 | u8 sensor; /* Register value (IT87_REG_TEMP_ENABLE) */ |
434 | u8 extra; /* Register value (IT87_REG_TEMP_EXTRA) */ | |
1da177e4 LT |
435 | u8 fan_div[3]; /* Register encoding, shifted right */ |
436 | u8 vid; /* Register encoding, combined */ | |
a7be58a1 | 437 | u8 vrm; |
1da177e4 | 438 | u32 alarms; /* Register encoding, combined */ |
d9b327c3 | 439 | u8 beeps; /* Register encoding */ |
1da177e4 | 440 | u8 fan_main_ctrl; /* Register value */ |
f8d0c19a | 441 | u8 fan_ctl; /* Register value */ |
b99883dc | 442 | |
4a0d71cf GR |
443 | /* |
444 | * The following 3 arrays correspond to the same registers up to | |
6229cdb2 JD |
445 | * the IT8720F. The meaning of bits 6-0 depends on the value of bit |
446 | * 7, and we want to preserve settings on mode changes, so we have | |
447 | * to track all values separately. | |
448 | * Starting with the IT8721F, the manual PWM duty cycles are stored | |
449 | * in separate registers (8-bit values), so the separate tracking | |
450 | * is no longer needed, but it is still done to keep the driver | |
4a0d71cf GR |
451 | * simple. |
452 | */ | |
b99883dc | 453 | u8 pwm_ctrl[3]; /* Register value */ |
6229cdb2 | 454 | u8 pwm_duty[3]; /* Manual PWM value set by user */ |
b99883dc | 455 | u8 pwm_temp_map[3]; /* PWM to temp. chan. mapping (bits 1-0) */ |
4f3f51bc JD |
456 | |
457 | /* Automatic fan speed control registers */ | |
458 | u8 auto_pwm[3][4]; /* [nr][3] is hard-coded */ | |
459 | s8 auto_temp[3][5]; /* [nr][0] is point1_temp_hyst */ | |
1da177e4 | 460 | }; |
0df6454d | 461 | |
0531d98b | 462 | static int adc_lsb(const struct it87_data *data, int nr) |
44c1bcd4 | 463 | { |
0531d98b GR |
464 | int lsb = has_12mv_adc(data) ? 12 : 16; |
465 | if (data->in_scaled & (1 << nr)) | |
466 | lsb <<= 1; | |
467 | return lsb; | |
468 | } | |
44c1bcd4 | 469 | |
0531d98b GR |
470 | static u8 in_to_reg(const struct it87_data *data, int nr, long val) |
471 | { | |
472 | val = DIV_ROUND_CLOSEST(val, adc_lsb(data, nr)); | |
2a844c14 | 473 | return clamp_val(val, 0, 255); |
44c1bcd4 JD |
474 | } |
475 | ||
476 | static int in_from_reg(const struct it87_data *data, int nr, int val) | |
477 | { | |
0531d98b | 478 | return val * adc_lsb(data, nr); |
44c1bcd4 | 479 | } |
0df6454d JD |
480 | |
481 | static inline u8 FAN_TO_REG(long rpm, int div) | |
482 | { | |
483 | if (rpm == 0) | |
484 | return 255; | |
2a844c14 GR |
485 | rpm = clamp_val(rpm, 1, 1000000); |
486 | return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254); | |
0df6454d JD |
487 | } |
488 | ||
489 | static inline u16 FAN16_TO_REG(long rpm) | |
490 | { | |
491 | if (rpm == 0) | |
492 | return 0xffff; | |
2a844c14 | 493 | return clamp_val((1350000 + rpm) / (rpm * 2), 1, 0xfffe); |
0df6454d JD |
494 | } |
495 | ||
496 | #define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \ | |
497 | 1350000 / ((val) * (div))) | |
498 | /* The divider is fixed to 2 in 16-bit mode */ | |
499 | #define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \ | |
500 | 1350000 / ((val) * 2)) | |
501 | ||
2a844c14 GR |
502 | #define TEMP_TO_REG(val) (clamp_val(((val) < 0 ? (((val) - 500) / 1000) : \ |
503 | ((val) + 500) / 1000), -128, 127)) | |
0df6454d JD |
504 | #define TEMP_FROM_REG(val) ((val) * 1000) |
505 | ||
44c1bcd4 JD |
506 | static u8 pwm_to_reg(const struct it87_data *data, long val) |
507 | { | |
16b5dda2 | 508 | if (has_newer_autopwm(data)) |
44c1bcd4 JD |
509 | return val; |
510 | else | |
511 | return val >> 1; | |
512 | } | |
513 | ||
514 | static int pwm_from_reg(const struct it87_data *data, u8 reg) | |
515 | { | |
16b5dda2 | 516 | if (has_newer_autopwm(data)) |
44c1bcd4 JD |
517 | return reg; |
518 | else | |
519 | return (reg & 0x7f) << 1; | |
520 | } | |
521 | ||
0df6454d JD |
522 | |
523 | static int DIV_TO_REG(int val) | |
524 | { | |
525 | int answer = 0; | |
526 | while (answer < 7 && (val >>= 1)) | |
527 | answer++; | |
528 | return answer; | |
529 | } | |
530 | #define DIV_FROM_REG(val) (1 << (val)) | |
531 | ||
f56c9c0a GR |
532 | /* |
533 | * PWM base frequencies. The frequency has to be divided by either 128 or 256, | |
534 | * depending on the chip type, to calculate the actual PWM frequency. | |
535 | * | |
536 | * Some of the chip datasheets suggest a base frequency of 51 kHz instead | |
537 | * of 750 kHz for the slowest base frequency, resulting in a PWM frequency | |
538 | * of 200 Hz. Sometimes both PWM frequency select registers are affected, | |
539 | * sometimes just one. It is unknown if this is a datasheet error or real, | |
540 | * so this is ignored for now. | |
541 | */ | |
0df6454d | 542 | static const unsigned int pwm_freq[8] = { |
f56c9c0a GR |
543 | 48000000, |
544 | 24000000, | |
545 | 12000000, | |
546 | 8000000, | |
547 | 6000000, | |
548 | 3000000, | |
549 | 1500000, | |
550 | 750000, | |
0df6454d | 551 | }; |
1da177e4 | 552 | |
b74f3fdd | 553 | static int it87_probe(struct platform_device *pdev); |
281dfd0b | 554 | static int it87_remove(struct platform_device *pdev); |
1da177e4 | 555 | |
b74f3fdd | 556 | static int it87_read_value(struct it87_data *data, u8 reg); |
557 | static void it87_write_value(struct it87_data *data, u8 reg, u8 value); | |
1da177e4 | 558 | static struct it87_data *it87_update_device(struct device *dev); |
b74f3fdd | 559 | static int it87_check_pwm(struct device *dev); |
560 | static void it87_init_device(struct platform_device *pdev); | |
1da177e4 LT |
561 | |
562 | ||
b74f3fdd | 563 | static struct platform_driver it87_driver = { |
cdaf7934 | 564 | .driver = { |
b74f3fdd | 565 | .name = DRVNAME, |
cdaf7934 | 566 | }, |
b74f3fdd | 567 | .probe = it87_probe, |
9e5e9b7a | 568 | .remove = it87_remove, |
fde09509 JD |
569 | }; |
570 | ||
20ad93d4 | 571 | static ssize_t show_in(struct device *dev, struct device_attribute *attr, |
929c6a56 | 572 | char *buf) |
1da177e4 | 573 | { |
929c6a56 GR |
574 | struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); |
575 | int nr = sattr->nr; | |
576 | int index = sattr->index; | |
20ad93d4 | 577 | |
1da177e4 | 578 | struct it87_data *data = it87_update_device(dev); |
929c6a56 | 579 | return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr][index])); |
1da177e4 LT |
580 | } |
581 | ||
929c6a56 GR |
582 | static ssize_t set_in(struct device *dev, struct device_attribute *attr, |
583 | const char *buf, size_t count) | |
1da177e4 | 584 | { |
929c6a56 GR |
585 | struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); |
586 | int nr = sattr->nr; | |
587 | int index = sattr->index; | |
20ad93d4 | 588 | |
b74f3fdd | 589 | struct it87_data *data = dev_get_drvdata(dev); |
f5f64501 JD |
590 | unsigned long val; |
591 | ||
179c4fdb | 592 | if (kstrtoul(buf, 10, &val) < 0) |
f5f64501 | 593 | return -EINVAL; |
1da177e4 | 594 | |
9a61bf63 | 595 | mutex_lock(&data->update_lock); |
929c6a56 GR |
596 | data->in[nr][index] = in_to_reg(data, nr, val); |
597 | it87_write_value(data, | |
598 | index == 1 ? IT87_REG_VIN_MIN(nr) | |
599 | : IT87_REG_VIN_MAX(nr), | |
600 | data->in[nr][index]); | |
9a61bf63 | 601 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
602 | return count; |
603 | } | |
20ad93d4 | 604 | |
929c6a56 GR |
605 | static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0); |
606 | static SENSOR_DEVICE_ATTR_2(in0_min, S_IRUGO | S_IWUSR, show_in, set_in, | |
607 | 0, 1); | |
608 | static SENSOR_DEVICE_ATTR_2(in0_max, S_IRUGO | S_IWUSR, show_in, set_in, | |
609 | 0, 2); | |
f5f64501 | 610 | |
929c6a56 GR |
611 | static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 1, 0); |
612 | static SENSOR_DEVICE_ATTR_2(in1_min, S_IRUGO | S_IWUSR, show_in, set_in, | |
613 | 1, 1); | |
614 | static SENSOR_DEVICE_ATTR_2(in1_max, S_IRUGO | S_IWUSR, show_in, set_in, | |
615 | 1, 2); | |
1da177e4 | 616 | |
929c6a56 GR |
617 | static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 2, 0); |
618 | static SENSOR_DEVICE_ATTR_2(in2_min, S_IRUGO | S_IWUSR, show_in, set_in, | |
619 | 2, 1); | |
620 | static SENSOR_DEVICE_ATTR_2(in2_max, S_IRUGO | S_IWUSR, show_in, set_in, | |
621 | 2, 2); | |
1da177e4 | 622 | |
929c6a56 GR |
623 | static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 3, 0); |
624 | static SENSOR_DEVICE_ATTR_2(in3_min, S_IRUGO | S_IWUSR, show_in, set_in, | |
625 | 3, 1); | |
626 | static SENSOR_DEVICE_ATTR_2(in3_max, S_IRUGO | S_IWUSR, show_in, set_in, | |
627 | 3, 2); | |
628 | ||
629 | static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 4, 0); | |
630 | static SENSOR_DEVICE_ATTR_2(in4_min, S_IRUGO | S_IWUSR, show_in, set_in, | |
631 | 4, 1); | |
632 | static SENSOR_DEVICE_ATTR_2(in4_max, S_IRUGO | S_IWUSR, show_in, set_in, | |
633 | 4, 2); | |
634 | ||
635 | static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 5, 0); | |
636 | static SENSOR_DEVICE_ATTR_2(in5_min, S_IRUGO | S_IWUSR, show_in, set_in, | |
637 | 5, 1); | |
638 | static SENSOR_DEVICE_ATTR_2(in5_max, S_IRUGO | S_IWUSR, show_in, set_in, | |
639 | 5, 2); | |
640 | ||
641 | static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 6, 0); | |
642 | static SENSOR_DEVICE_ATTR_2(in6_min, S_IRUGO | S_IWUSR, show_in, set_in, | |
643 | 6, 1); | |
644 | static SENSOR_DEVICE_ATTR_2(in6_max, S_IRUGO | S_IWUSR, show_in, set_in, | |
645 | 6, 2); | |
646 | ||
647 | static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 7, 0); | |
648 | static SENSOR_DEVICE_ATTR_2(in7_min, S_IRUGO | S_IWUSR, show_in, set_in, | |
649 | 7, 1); | |
650 | static SENSOR_DEVICE_ATTR_2(in7_max, S_IRUGO | S_IWUSR, show_in, set_in, | |
651 | 7, 2); | |
652 | ||
653 | static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 8, 0); | |
c145d5c6 | 654 | static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in, NULL, 9, 0); |
1da177e4 LT |
655 | |
656 | /* 3 temperatures */ | |
20ad93d4 | 657 | static ssize_t show_temp(struct device *dev, struct device_attribute *attr, |
60ca385a | 658 | char *buf) |
1da177e4 | 659 | { |
60ca385a GR |
660 | struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); |
661 | int nr = sattr->nr; | |
662 | int index = sattr->index; | |
1da177e4 | 663 | struct it87_data *data = it87_update_device(dev); |
20ad93d4 | 664 | |
60ca385a | 665 | return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index])); |
1da177e4 | 666 | } |
20ad93d4 | 667 | |
60ca385a GR |
668 | static ssize_t set_temp(struct device *dev, struct device_attribute *attr, |
669 | const char *buf, size_t count) | |
1da177e4 | 670 | { |
60ca385a GR |
671 | struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); |
672 | int nr = sattr->nr; | |
673 | int index = sattr->index; | |
b74f3fdd | 674 | struct it87_data *data = dev_get_drvdata(dev); |
f5f64501 | 675 | long val; |
161d898a | 676 | u8 reg, regval; |
f5f64501 | 677 | |
179c4fdb | 678 | if (kstrtol(buf, 10, &val) < 0) |
f5f64501 | 679 | return -EINVAL; |
1da177e4 | 680 | |
9a61bf63 | 681 | mutex_lock(&data->update_lock); |
161d898a GR |
682 | |
683 | switch (index) { | |
684 | default: | |
685 | case 1: | |
686 | reg = IT87_REG_TEMP_LOW(nr); | |
687 | break; | |
688 | case 2: | |
689 | reg = IT87_REG_TEMP_HIGH(nr); | |
690 | break; | |
691 | case 3: | |
692 | regval = it87_read_value(data, IT87_REG_BEEP_ENABLE); | |
693 | if (!(regval & 0x80)) { | |
694 | regval |= 0x80; | |
695 | it87_write_value(data, IT87_REG_BEEP_ENABLE, regval); | |
696 | } | |
697 | data->valid = 0; | |
698 | reg = IT87_REG_TEMP_OFFSET[nr]; | |
699 | break; | |
700 | } | |
701 | ||
60ca385a | 702 | data->temp[nr][index] = TEMP_TO_REG(val); |
161d898a | 703 | it87_write_value(data, reg, data->temp[nr][index]); |
9a61bf63 | 704 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
705 | return count; |
706 | } | |
1da177e4 | 707 | |
60ca385a GR |
708 | static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0); |
709 | static SENSOR_DEVICE_ATTR_2(temp1_min, S_IRUGO | S_IWUSR, show_temp, set_temp, | |
710 | 0, 1); | |
711 | static SENSOR_DEVICE_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, set_temp, | |
712 | 0, 2); | |
161d898a GR |
713 | static SENSOR_DEVICE_ATTR_2(temp1_offset, S_IRUGO | S_IWUSR, show_temp, |
714 | set_temp, 0, 3); | |
60ca385a GR |
715 | static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0); |
716 | static SENSOR_DEVICE_ATTR_2(temp2_min, S_IRUGO | S_IWUSR, show_temp, set_temp, | |
717 | 1, 1); | |
718 | static SENSOR_DEVICE_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, set_temp, | |
719 | 1, 2); | |
161d898a GR |
720 | static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IRUGO | S_IWUSR, show_temp, |
721 | set_temp, 1, 3); | |
60ca385a GR |
722 | static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0); |
723 | static SENSOR_DEVICE_ATTR_2(temp3_min, S_IRUGO | S_IWUSR, show_temp, set_temp, | |
724 | 2, 1); | |
725 | static SENSOR_DEVICE_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, set_temp, | |
726 | 2, 2); | |
161d898a GR |
727 | static SENSOR_DEVICE_ATTR_2(temp3_offset, S_IRUGO | S_IWUSR, show_temp, |
728 | set_temp, 2, 3); | |
1da177e4 | 729 | |
2cece01f GR |
730 | static ssize_t show_temp_type(struct device *dev, struct device_attribute *attr, |
731 | char *buf) | |
1da177e4 | 732 | { |
20ad93d4 JD |
733 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); |
734 | int nr = sensor_attr->index; | |
1da177e4 | 735 | struct it87_data *data = it87_update_device(dev); |
4a0d71cf | 736 | u8 reg = data->sensor; /* In case value is updated while used */ |
19529784 | 737 | u8 extra = data->extra; |
5f2dc798 | 738 | |
19529784 GR |
739 | if ((has_temp_peci(data, nr) && (reg >> 6 == nr + 1)) |
740 | || (has_temp_old_peci(data, nr) && (extra & 0x80))) | |
5d8d2f2b | 741 | return sprintf(buf, "6\n"); /* Intel PECI */ |
1da177e4 LT |
742 | if (reg & (1 << nr)) |
743 | return sprintf(buf, "3\n"); /* thermal diode */ | |
744 | if (reg & (8 << nr)) | |
4ed10779 | 745 | return sprintf(buf, "4\n"); /* thermistor */ |
1da177e4 LT |
746 | return sprintf(buf, "0\n"); /* disabled */ |
747 | } | |
2cece01f GR |
748 | |
749 | static ssize_t set_temp_type(struct device *dev, struct device_attribute *attr, | |
750 | const char *buf, size_t count) | |
1da177e4 | 751 | { |
20ad93d4 JD |
752 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); |
753 | int nr = sensor_attr->index; | |
754 | ||
b74f3fdd | 755 | struct it87_data *data = dev_get_drvdata(dev); |
f5f64501 | 756 | long val; |
19529784 | 757 | u8 reg, extra; |
f5f64501 | 758 | |
179c4fdb | 759 | if (kstrtol(buf, 10, &val) < 0) |
f5f64501 | 760 | return -EINVAL; |
1da177e4 | 761 | |
8acf07c5 JD |
762 | reg = it87_read_value(data, IT87_REG_TEMP_ENABLE); |
763 | reg &= ~(1 << nr); | |
764 | reg &= ~(8 << nr); | |
5d8d2f2b GR |
765 | if (has_temp_peci(data, nr) && (reg >> 6 == nr + 1 || val == 6)) |
766 | reg &= 0x3f; | |
19529784 GR |
767 | extra = it87_read_value(data, IT87_REG_TEMP_EXTRA); |
768 | if (has_temp_old_peci(data, nr) && ((extra & 0x80) || val == 6)) | |
769 | extra &= 0x7f; | |
4ed10779 | 770 | if (val == 2) { /* backwards compatibility */ |
1d9bcf6a GR |
771 | dev_warn(dev, |
772 | "Sensor type 2 is deprecated, please use 4 instead\n"); | |
4ed10779 JD |
773 | val = 4; |
774 | } | |
5d8d2f2b | 775 | /* 3 = thermal diode; 4 = thermistor; 6 = Intel PECI; 0 = disabled */ |
1da177e4 | 776 | if (val == 3) |
8acf07c5 | 777 | reg |= 1 << nr; |
4ed10779 | 778 | else if (val == 4) |
8acf07c5 | 779 | reg |= 8 << nr; |
5d8d2f2b GR |
780 | else if (has_temp_peci(data, nr) && val == 6) |
781 | reg |= (nr + 1) << 6; | |
19529784 GR |
782 | else if (has_temp_old_peci(data, nr) && val == 6) |
783 | extra |= 0x80; | |
8acf07c5 | 784 | else if (val != 0) |
1da177e4 | 785 | return -EINVAL; |
8acf07c5 JD |
786 | |
787 | mutex_lock(&data->update_lock); | |
788 | data->sensor = reg; | |
19529784 | 789 | data->extra = extra; |
b74f3fdd | 790 | it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor); |
19529784 GR |
791 | if (has_temp_old_peci(data, nr)) |
792 | it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra); | |
2b3d1d87 | 793 | data->valid = 0; /* Force cache refresh */ |
9a61bf63 | 794 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
795 | return count; |
796 | } | |
1da177e4 | 797 | |
2cece01f GR |
798 | static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type, |
799 | set_temp_type, 0); | |
800 | static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type, | |
801 | set_temp_type, 1); | |
802 | static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type, | |
803 | set_temp_type, 2); | |
1da177e4 LT |
804 | |
805 | /* 3 Fans */ | |
b99883dc JD |
806 | |
807 | static int pwm_mode(const struct it87_data *data, int nr) | |
808 | { | |
809 | int ctrl = data->fan_main_ctrl & (1 << nr); | |
810 | ||
c145d5c6 | 811 | if (ctrl == 0 && data->type != it8603) /* Full speed */ |
b99883dc JD |
812 | return 0; |
813 | if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */ | |
814 | return 2; | |
815 | else /* Manual mode */ | |
816 | return 1; | |
817 | } | |
818 | ||
20ad93d4 | 819 | static ssize_t show_fan(struct device *dev, struct device_attribute *attr, |
e1169ba0 | 820 | char *buf) |
1da177e4 | 821 | { |
e1169ba0 GR |
822 | struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); |
823 | int nr = sattr->nr; | |
824 | int index = sattr->index; | |
825 | int speed; | |
1da177e4 | 826 | struct it87_data *data = it87_update_device(dev); |
20ad93d4 | 827 | |
e1169ba0 GR |
828 | speed = has_16bit_fans(data) ? |
829 | FAN16_FROM_REG(data->fan[nr][index]) : | |
830 | FAN_FROM_REG(data->fan[nr][index], | |
831 | DIV_FROM_REG(data->fan_div[nr])); | |
832 | return sprintf(buf, "%d\n", speed); | |
1da177e4 | 833 | } |
e1169ba0 | 834 | |
20ad93d4 JD |
835 | static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr, |
836 | char *buf) | |
1da177e4 | 837 | { |
20ad93d4 JD |
838 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); |
839 | int nr = sensor_attr->index; | |
840 | ||
1da177e4 LT |
841 | struct it87_data *data = it87_update_device(dev); |
842 | return sprintf(buf, "%d\n", DIV_FROM_REG(data->fan_div[nr])); | |
843 | } | |
5f2dc798 JD |
844 | static ssize_t show_pwm_enable(struct device *dev, |
845 | struct device_attribute *attr, char *buf) | |
1da177e4 | 846 | { |
20ad93d4 JD |
847 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); |
848 | int nr = sensor_attr->index; | |
849 | ||
1da177e4 | 850 | struct it87_data *data = it87_update_device(dev); |
b99883dc | 851 | return sprintf(buf, "%d\n", pwm_mode(data, nr)); |
1da177e4 | 852 | } |
20ad93d4 JD |
853 | static ssize_t show_pwm(struct device *dev, struct device_attribute *attr, |
854 | char *buf) | |
1da177e4 | 855 | { |
20ad93d4 JD |
856 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); |
857 | int nr = sensor_attr->index; | |
858 | ||
1da177e4 | 859 | struct it87_data *data = it87_update_device(dev); |
44c1bcd4 JD |
860 | return sprintf(buf, "%d\n", |
861 | pwm_from_reg(data, data->pwm_duty[nr])); | |
1da177e4 | 862 | } |
f8d0c19a JD |
863 | static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr, |
864 | char *buf) | |
865 | { | |
866 | struct it87_data *data = it87_update_device(dev); | |
867 | int index = (data->fan_ctl >> 4) & 0x07; | |
f56c9c0a | 868 | unsigned int freq; |
f8d0c19a | 869 | |
f56c9c0a GR |
870 | freq = pwm_freq[index] / (has_newer_autopwm(data) ? 256 : 128); |
871 | ||
872 | return sprintf(buf, "%u\n", freq); | |
f8d0c19a | 873 | } |
e1169ba0 GR |
874 | |
875 | static ssize_t set_fan(struct device *dev, struct device_attribute *attr, | |
876 | const char *buf, size_t count) | |
1da177e4 | 877 | { |
e1169ba0 GR |
878 | struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); |
879 | int nr = sattr->nr; | |
880 | int index = sattr->index; | |
20ad93d4 | 881 | |
b74f3fdd | 882 | struct it87_data *data = dev_get_drvdata(dev); |
f5f64501 | 883 | long val; |
7f999aa7 | 884 | u8 reg; |
1da177e4 | 885 | |
179c4fdb | 886 | if (kstrtol(buf, 10, &val) < 0) |
f5f64501 JD |
887 | return -EINVAL; |
888 | ||
9a61bf63 | 889 | mutex_lock(&data->update_lock); |
e1169ba0 GR |
890 | |
891 | if (has_16bit_fans(data)) { | |
892 | data->fan[nr][index] = FAN16_TO_REG(val); | |
893 | it87_write_value(data, IT87_REG_FAN_MIN[nr], | |
894 | data->fan[nr][index] & 0xff); | |
895 | it87_write_value(data, IT87_REG_FANX_MIN[nr], | |
896 | data->fan[nr][index] >> 8); | |
897 | } else { | |
898 | reg = it87_read_value(data, IT87_REG_FAN_DIV); | |
899 | switch (nr) { | |
900 | case 0: | |
901 | data->fan_div[nr] = reg & 0x07; | |
902 | break; | |
903 | case 1: | |
904 | data->fan_div[nr] = (reg >> 3) & 0x07; | |
905 | break; | |
906 | case 2: | |
907 | data->fan_div[nr] = (reg & 0x40) ? 3 : 1; | |
908 | break; | |
909 | } | |
910 | data->fan[nr][index] = | |
911 | FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr])); | |
912 | it87_write_value(data, IT87_REG_FAN_MIN[nr], | |
913 | data->fan[nr][index]); | |
07eab46d JD |
914 | } |
915 | ||
9a61bf63 | 916 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
917 | return count; |
918 | } | |
e1169ba0 | 919 | |
20ad93d4 JD |
920 | static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr, |
921 | const char *buf, size_t count) | |
1da177e4 | 922 | { |
20ad93d4 JD |
923 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); |
924 | int nr = sensor_attr->index; | |
925 | ||
b74f3fdd | 926 | struct it87_data *data = dev_get_drvdata(dev); |
f5f64501 | 927 | unsigned long val; |
8ab4ec3e | 928 | int min; |
1da177e4 LT |
929 | u8 old; |
930 | ||
179c4fdb | 931 | if (kstrtoul(buf, 10, &val) < 0) |
f5f64501 JD |
932 | return -EINVAL; |
933 | ||
9a61bf63 | 934 | mutex_lock(&data->update_lock); |
b74f3fdd | 935 | old = it87_read_value(data, IT87_REG_FAN_DIV); |
1da177e4 | 936 | |
8ab4ec3e | 937 | /* Save fan min limit */ |
e1169ba0 | 938 | min = FAN_FROM_REG(data->fan[nr][1], DIV_FROM_REG(data->fan_div[nr])); |
1da177e4 LT |
939 | |
940 | switch (nr) { | |
941 | case 0: | |
942 | case 1: | |
943 | data->fan_div[nr] = DIV_TO_REG(val); | |
944 | break; | |
945 | case 2: | |
946 | if (val < 8) | |
947 | data->fan_div[nr] = 1; | |
948 | else | |
949 | data->fan_div[nr] = 3; | |
950 | } | |
951 | val = old & 0x80; | |
952 | val |= (data->fan_div[0] & 0x07); | |
953 | val |= (data->fan_div[1] & 0x07) << 3; | |
954 | if (data->fan_div[2] == 3) | |
955 | val |= 0x1 << 6; | |
b74f3fdd | 956 | it87_write_value(data, IT87_REG_FAN_DIV, val); |
1da177e4 | 957 | |
8ab4ec3e | 958 | /* Restore fan min limit */ |
e1169ba0 GR |
959 | data->fan[nr][1] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr])); |
960 | it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan[nr][1]); | |
8ab4ec3e | 961 | |
9a61bf63 | 962 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
963 | return count; |
964 | } | |
cccfc9c4 JD |
965 | |
966 | /* Returns 0 if OK, -EINVAL otherwise */ | |
967 | static int check_trip_points(struct device *dev, int nr) | |
968 | { | |
969 | const struct it87_data *data = dev_get_drvdata(dev); | |
970 | int i, err = 0; | |
971 | ||
972 | if (has_old_autopwm(data)) { | |
973 | for (i = 0; i < 3; i++) { | |
974 | if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1]) | |
975 | err = -EINVAL; | |
976 | } | |
977 | for (i = 0; i < 2; i++) { | |
978 | if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1]) | |
979 | err = -EINVAL; | |
980 | } | |
981 | } | |
982 | ||
983 | if (err) { | |
1d9bcf6a GR |
984 | dev_err(dev, |
985 | "Inconsistent trip points, not switching to automatic mode\n"); | |
cccfc9c4 JD |
986 | dev_err(dev, "Adjust the trip points and try again\n"); |
987 | } | |
988 | return err; | |
989 | } | |
990 | ||
20ad93d4 JD |
991 | static ssize_t set_pwm_enable(struct device *dev, |
992 | struct device_attribute *attr, const char *buf, size_t count) | |
1da177e4 | 993 | { |
20ad93d4 JD |
994 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); |
995 | int nr = sensor_attr->index; | |
996 | ||
b74f3fdd | 997 | struct it87_data *data = dev_get_drvdata(dev); |
f5f64501 | 998 | long val; |
1da177e4 | 999 | |
179c4fdb | 1000 | if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2) |
b99883dc JD |
1001 | return -EINVAL; |
1002 | ||
cccfc9c4 JD |
1003 | /* Check trip points before switching to automatic mode */ |
1004 | if (val == 2) { | |
1005 | if (check_trip_points(dev, nr) < 0) | |
1006 | return -EINVAL; | |
1007 | } | |
1008 | ||
c145d5c6 RM |
1009 | /* IT8603E does not have on/off mode */ |
1010 | if (val == 0 && data->type == it8603) | |
1011 | return -EINVAL; | |
1012 | ||
9a61bf63 | 1013 | mutex_lock(&data->update_lock); |
1da177e4 LT |
1014 | |
1015 | if (val == 0) { | |
1016 | int tmp; | |
1017 | /* make sure the fan is on when in on/off mode */ | |
b74f3fdd | 1018 | tmp = it87_read_value(data, IT87_REG_FAN_CTL); |
1019 | it87_write_value(data, IT87_REG_FAN_CTL, tmp | (1 << nr)); | |
1da177e4 LT |
1020 | /* set on/off mode */ |
1021 | data->fan_main_ctrl &= ~(1 << nr); | |
5f2dc798 JD |
1022 | it87_write_value(data, IT87_REG_FAN_MAIN_CTRL, |
1023 | data->fan_main_ctrl); | |
b99883dc JD |
1024 | } else { |
1025 | if (val == 1) /* Manual mode */ | |
16b5dda2 | 1026 | data->pwm_ctrl[nr] = has_newer_autopwm(data) ? |
6229cdb2 JD |
1027 | data->pwm_temp_map[nr] : |
1028 | data->pwm_duty[nr]; | |
b99883dc JD |
1029 | else /* Automatic mode */ |
1030 | data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr]; | |
1031 | it87_write_value(data, IT87_REG_PWM(nr), data->pwm_ctrl[nr]); | |
c145d5c6 RM |
1032 | |
1033 | if (data->type != it8603) { | |
1034 | /* set SmartGuardian mode */ | |
1035 | data->fan_main_ctrl |= (1 << nr); | |
1036 | it87_write_value(data, IT87_REG_FAN_MAIN_CTRL, | |
1037 | data->fan_main_ctrl); | |
1038 | } | |
1da177e4 LT |
1039 | } |
1040 | ||
9a61bf63 | 1041 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
1042 | return count; |
1043 | } | |
20ad93d4 JD |
1044 | static ssize_t set_pwm(struct device *dev, struct device_attribute *attr, |
1045 | const char *buf, size_t count) | |
1da177e4 | 1046 | { |
20ad93d4 JD |
1047 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); |
1048 | int nr = sensor_attr->index; | |
1049 | ||
b74f3fdd | 1050 | struct it87_data *data = dev_get_drvdata(dev); |
f5f64501 | 1051 | long val; |
1da177e4 | 1052 | |
179c4fdb | 1053 | if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255) |
1da177e4 LT |
1054 | return -EINVAL; |
1055 | ||
9a61bf63 | 1056 | mutex_lock(&data->update_lock); |
16b5dda2 | 1057 | if (has_newer_autopwm(data)) { |
4a0d71cf GR |
1058 | /* |
1059 | * If we are in automatic mode, the PWM duty cycle register | |
1060 | * is read-only so we can't write the value. | |
1061 | */ | |
6229cdb2 JD |
1062 | if (data->pwm_ctrl[nr] & 0x80) { |
1063 | mutex_unlock(&data->update_lock); | |
1064 | return -EBUSY; | |
1065 | } | |
1066 | data->pwm_duty[nr] = pwm_to_reg(data, val); | |
1067 | it87_write_value(data, IT87_REG_PWM_DUTY(nr), | |
1068 | data->pwm_duty[nr]); | |
1069 | } else { | |
1070 | data->pwm_duty[nr] = pwm_to_reg(data, val); | |
4a0d71cf GR |
1071 | /* |
1072 | * If we are in manual mode, write the duty cycle immediately; | |
1073 | * otherwise, just store it for later use. | |
1074 | */ | |
6229cdb2 JD |
1075 | if (!(data->pwm_ctrl[nr] & 0x80)) { |
1076 | data->pwm_ctrl[nr] = data->pwm_duty[nr]; | |
1077 | it87_write_value(data, IT87_REG_PWM(nr), | |
1078 | data->pwm_ctrl[nr]); | |
1079 | } | |
b99883dc | 1080 | } |
9a61bf63 | 1081 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
1082 | return count; |
1083 | } | |
f8d0c19a JD |
1084 | static ssize_t set_pwm_freq(struct device *dev, |
1085 | struct device_attribute *attr, const char *buf, size_t count) | |
1086 | { | |
b74f3fdd | 1087 | struct it87_data *data = dev_get_drvdata(dev); |
f5f64501 | 1088 | unsigned long val; |
f8d0c19a JD |
1089 | int i; |
1090 | ||
179c4fdb | 1091 | if (kstrtoul(buf, 10, &val) < 0) |
f5f64501 | 1092 | return -EINVAL; |
f56c9c0a GR |
1093 | |
1094 | val = clamp_val(val, 0, 1000000); | |
1095 | val *= has_newer_autopwm(data) ? 256 : 128; | |
f5f64501 | 1096 | |
f8d0c19a JD |
1097 | /* Search for the nearest available frequency */ |
1098 | for (i = 0; i < 7; i++) { | |
1099 | if (val > (pwm_freq[i] + pwm_freq[i+1]) / 2) | |
1100 | break; | |
1101 | } | |
1102 | ||
1103 | mutex_lock(&data->update_lock); | |
b74f3fdd | 1104 | data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f; |
f8d0c19a | 1105 | data->fan_ctl |= i << 4; |
b74f3fdd | 1106 | it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl); |
f8d0c19a JD |
1107 | mutex_unlock(&data->update_lock); |
1108 | ||
1109 | return count; | |
1110 | } | |
94ac7ee6 JD |
1111 | static ssize_t show_pwm_temp_map(struct device *dev, |
1112 | struct device_attribute *attr, char *buf) | |
1113 | { | |
1114 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); | |
1115 | int nr = sensor_attr->index; | |
1116 | ||
1117 | struct it87_data *data = it87_update_device(dev); | |
1118 | int map; | |
1119 | ||
1120 | if (data->pwm_temp_map[nr] < 3) | |
1121 | map = 1 << data->pwm_temp_map[nr]; | |
1122 | else | |
1123 | map = 0; /* Should never happen */ | |
1124 | return sprintf(buf, "%d\n", map); | |
1125 | } | |
1126 | static ssize_t set_pwm_temp_map(struct device *dev, | |
1127 | struct device_attribute *attr, const char *buf, size_t count) | |
1128 | { | |
1129 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); | |
1130 | int nr = sensor_attr->index; | |
1131 | ||
1132 | struct it87_data *data = dev_get_drvdata(dev); | |
1133 | long val; | |
1134 | u8 reg; | |
1135 | ||
4a0d71cf GR |
1136 | /* |
1137 | * This check can go away if we ever support automatic fan speed | |
1138 | * control on newer chips. | |
1139 | */ | |
4f3f51bc JD |
1140 | if (!has_old_autopwm(data)) { |
1141 | dev_notice(dev, "Mapping change disabled for safety reasons\n"); | |
1142 | return -EINVAL; | |
1143 | } | |
1144 | ||
179c4fdb | 1145 | if (kstrtol(buf, 10, &val) < 0) |
94ac7ee6 JD |
1146 | return -EINVAL; |
1147 | ||
1148 | switch (val) { | |
1149 | case (1 << 0): | |
1150 | reg = 0x00; | |
1151 | break; | |
1152 | case (1 << 1): | |
1153 | reg = 0x01; | |
1154 | break; | |
1155 | case (1 << 2): | |
1156 | reg = 0x02; | |
1157 | break; | |
1158 | default: | |
1159 | return -EINVAL; | |
1160 | } | |
1161 | ||
1162 | mutex_lock(&data->update_lock); | |
1163 | data->pwm_temp_map[nr] = reg; | |
4a0d71cf GR |
1164 | /* |
1165 | * If we are in automatic mode, write the temp mapping immediately; | |
1166 | * otherwise, just store it for later use. | |
1167 | */ | |
94ac7ee6 JD |
1168 | if (data->pwm_ctrl[nr] & 0x80) { |
1169 | data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr]; | |
1170 | it87_write_value(data, IT87_REG_PWM(nr), data->pwm_ctrl[nr]); | |
1171 | } | |
1172 | mutex_unlock(&data->update_lock); | |
1173 | return count; | |
1174 | } | |
1da177e4 | 1175 | |
4f3f51bc JD |
1176 | static ssize_t show_auto_pwm(struct device *dev, |
1177 | struct device_attribute *attr, char *buf) | |
1178 | { | |
1179 | struct it87_data *data = it87_update_device(dev); | |
1180 | struct sensor_device_attribute_2 *sensor_attr = | |
1181 | to_sensor_dev_attr_2(attr); | |
1182 | int nr = sensor_attr->nr; | |
1183 | int point = sensor_attr->index; | |
1184 | ||
44c1bcd4 JD |
1185 | return sprintf(buf, "%d\n", |
1186 | pwm_from_reg(data, data->auto_pwm[nr][point])); | |
4f3f51bc JD |
1187 | } |
1188 | ||
1189 | static ssize_t set_auto_pwm(struct device *dev, | |
1190 | struct device_attribute *attr, const char *buf, size_t count) | |
1191 | { | |
1192 | struct it87_data *data = dev_get_drvdata(dev); | |
1193 | struct sensor_device_attribute_2 *sensor_attr = | |
1194 | to_sensor_dev_attr_2(attr); | |
1195 | int nr = sensor_attr->nr; | |
1196 | int point = sensor_attr->index; | |
1197 | long val; | |
1198 | ||
179c4fdb | 1199 | if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255) |
4f3f51bc JD |
1200 | return -EINVAL; |
1201 | ||
1202 | mutex_lock(&data->update_lock); | |
44c1bcd4 | 1203 | data->auto_pwm[nr][point] = pwm_to_reg(data, val); |
4f3f51bc JD |
1204 | it87_write_value(data, IT87_REG_AUTO_PWM(nr, point), |
1205 | data->auto_pwm[nr][point]); | |
1206 | mutex_unlock(&data->update_lock); | |
1207 | return count; | |
1208 | } | |
1209 | ||
1210 | static ssize_t show_auto_temp(struct device *dev, | |
1211 | struct device_attribute *attr, char *buf) | |
1212 | { | |
1213 | struct it87_data *data = it87_update_device(dev); | |
1214 | struct sensor_device_attribute_2 *sensor_attr = | |
1215 | to_sensor_dev_attr_2(attr); | |
1216 | int nr = sensor_attr->nr; | |
1217 | int point = sensor_attr->index; | |
1218 | ||
1219 | return sprintf(buf, "%d\n", TEMP_FROM_REG(data->auto_temp[nr][point])); | |
1220 | } | |
1221 | ||
1222 | static ssize_t set_auto_temp(struct device *dev, | |
1223 | struct device_attribute *attr, const char *buf, size_t count) | |
1224 | { | |
1225 | struct it87_data *data = dev_get_drvdata(dev); | |
1226 | struct sensor_device_attribute_2 *sensor_attr = | |
1227 | to_sensor_dev_attr_2(attr); | |
1228 | int nr = sensor_attr->nr; | |
1229 | int point = sensor_attr->index; | |
1230 | long val; | |
1231 | ||
179c4fdb | 1232 | if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000) |
4f3f51bc JD |
1233 | return -EINVAL; |
1234 | ||
1235 | mutex_lock(&data->update_lock); | |
1236 | data->auto_temp[nr][point] = TEMP_TO_REG(val); | |
1237 | it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point), | |
1238 | data->auto_temp[nr][point]); | |
1239 | mutex_unlock(&data->update_lock); | |
1240 | return count; | |
1241 | } | |
1242 | ||
e1169ba0 GR |
1243 | static SENSOR_DEVICE_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0); |
1244 | static SENSOR_DEVICE_ATTR_2(fan1_min, S_IRUGO | S_IWUSR, show_fan, set_fan, | |
1245 | 0, 1); | |
1246 | static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, show_fan_div, | |
1247 | set_fan_div, 0); | |
1248 | ||
1249 | static SENSOR_DEVICE_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 1, 0); | |
1250 | static SENSOR_DEVICE_ATTR_2(fan2_min, S_IRUGO | S_IWUSR, show_fan, set_fan, | |
1251 | 1, 1); | |
1252 | static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, show_fan_div, | |
1253 | set_fan_div, 1); | |
1254 | ||
1255 | static SENSOR_DEVICE_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 2, 0); | |
1256 | static SENSOR_DEVICE_ATTR_2(fan3_min, S_IRUGO | S_IWUSR, show_fan, set_fan, | |
1257 | 2, 1); | |
1258 | static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, show_fan_div, | |
1259 | set_fan_div, 2); | |
1260 | ||
1261 | static SENSOR_DEVICE_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 3, 0); | |
1262 | static SENSOR_DEVICE_ATTR_2(fan4_min, S_IRUGO | S_IWUSR, show_fan, set_fan, | |
1263 | 3, 1); | |
1da177e4 | 1264 | |
e1169ba0 GR |
1265 | static SENSOR_DEVICE_ATTR_2(fan5_input, S_IRUGO, show_fan, NULL, 4, 0); |
1266 | static SENSOR_DEVICE_ATTR_2(fan5_min, S_IRUGO | S_IWUSR, show_fan, set_fan, | |
1267 | 4, 1); | |
1da177e4 | 1268 | |
c4458db3 GR |
1269 | static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR, |
1270 | show_pwm_enable, set_pwm_enable, 0); | |
1271 | static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 0); | |
1272 | static DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR, show_pwm_freq, set_pwm_freq); | |
1273 | static SENSOR_DEVICE_ATTR(pwm1_auto_channels_temp, S_IRUGO | S_IWUSR, | |
1274 | show_pwm_temp_map, set_pwm_temp_map, 0); | |
1275 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO | S_IWUSR, | |
1276 | show_auto_pwm, set_auto_pwm, 0, 0); | |
1277 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO | S_IWUSR, | |
1278 | show_auto_pwm, set_auto_pwm, 0, 1); | |
1279 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO | S_IWUSR, | |
1280 | show_auto_pwm, set_auto_pwm, 0, 2); | |
1281 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO, | |
1282 | show_auto_pwm, NULL, 0, 3); | |
1283 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR, | |
1284 | show_auto_temp, set_auto_temp, 0, 1); | |
1285 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO | S_IWUSR, | |
1286 | show_auto_temp, set_auto_temp, 0, 0); | |
1287 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR, | |
1288 | show_auto_temp, set_auto_temp, 0, 2); | |
1289 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR, | |
1290 | show_auto_temp, set_auto_temp, 0, 3); | |
1291 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_temp, S_IRUGO | S_IWUSR, | |
1292 | show_auto_temp, set_auto_temp, 0, 4); | |
1293 | ||
1294 | static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR, | |
1295 | show_pwm_enable, set_pwm_enable, 1); | |
1296 | static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 1); | |
1297 | static DEVICE_ATTR(pwm2_freq, S_IRUGO, show_pwm_freq, NULL); | |
1298 | static SENSOR_DEVICE_ATTR(pwm2_auto_channels_temp, S_IRUGO | S_IWUSR, | |
1299 | show_pwm_temp_map, set_pwm_temp_map, 1); | |
1300 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO | S_IWUSR, | |
1301 | show_auto_pwm, set_auto_pwm, 1, 0); | |
1302 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO | S_IWUSR, | |
1303 | show_auto_pwm, set_auto_pwm, 1, 1); | |
1304 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO | S_IWUSR, | |
1305 | show_auto_pwm, set_auto_pwm, 1, 2); | |
1306 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO, | |
1307 | show_auto_pwm, NULL, 1, 3); | |
1308 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR, | |
1309 | show_auto_temp, set_auto_temp, 1, 1); | |
1310 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO | S_IWUSR, | |
1311 | show_auto_temp, set_auto_temp, 1, 0); | |
1312 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR, | |
1313 | show_auto_temp, set_auto_temp, 1, 2); | |
1314 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR, | |
1315 | show_auto_temp, set_auto_temp, 1, 3); | |
1316 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_temp, S_IRUGO | S_IWUSR, | |
1317 | show_auto_temp, set_auto_temp, 1, 4); | |
1318 | ||
1319 | static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR, | |
1320 | show_pwm_enable, set_pwm_enable, 2); | |
1321 | static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 2); | |
1322 | static DEVICE_ATTR(pwm3_freq, S_IRUGO, show_pwm_freq, NULL); | |
1323 | static SENSOR_DEVICE_ATTR(pwm3_auto_channels_temp, S_IRUGO | S_IWUSR, | |
1324 | show_pwm_temp_map, set_pwm_temp_map, 2); | |
1325 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO | S_IWUSR, | |
1326 | show_auto_pwm, set_auto_pwm, 2, 0); | |
1327 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO | S_IWUSR, | |
1328 | show_auto_pwm, set_auto_pwm, 2, 1); | |
1329 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO | S_IWUSR, | |
1330 | show_auto_pwm, set_auto_pwm, 2, 2); | |
1331 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO, | |
1332 | show_auto_pwm, NULL, 2, 3); | |
1333 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR, | |
1334 | show_auto_temp, set_auto_temp, 2, 1); | |
1335 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO | S_IWUSR, | |
1336 | show_auto_temp, set_auto_temp, 2, 0); | |
1337 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR, | |
1338 | show_auto_temp, set_auto_temp, 2, 2); | |
1339 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR, | |
1340 | show_auto_temp, set_auto_temp, 2, 3); | |
1341 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_temp, S_IRUGO | S_IWUSR, | |
1342 | show_auto_temp, set_auto_temp, 2, 4); | |
1da177e4 LT |
1343 | |
1344 | /* Alarms */ | |
5f2dc798 JD |
1345 | static ssize_t show_alarms(struct device *dev, struct device_attribute *attr, |
1346 | char *buf) | |
1da177e4 LT |
1347 | { |
1348 | struct it87_data *data = it87_update_device(dev); | |
68188ba7 | 1349 | return sprintf(buf, "%u\n", data->alarms); |
1da177e4 | 1350 | } |
1d66c64c | 1351 | static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL); |
1da177e4 | 1352 | |
0124dd78 JD |
1353 | static ssize_t show_alarm(struct device *dev, struct device_attribute *attr, |
1354 | char *buf) | |
1355 | { | |
1356 | int bitnr = to_sensor_dev_attr(attr)->index; | |
1357 | struct it87_data *data = it87_update_device(dev); | |
1358 | return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1); | |
1359 | } | |
3d30f9e6 JD |
1360 | |
1361 | static ssize_t clear_intrusion(struct device *dev, struct device_attribute | |
1362 | *attr, const char *buf, size_t count) | |
1363 | { | |
1364 | struct it87_data *data = dev_get_drvdata(dev); | |
1365 | long val; | |
1366 | int config; | |
1367 | ||
179c4fdb | 1368 | if (kstrtol(buf, 10, &val) < 0 || val != 0) |
3d30f9e6 JD |
1369 | return -EINVAL; |
1370 | ||
1371 | mutex_lock(&data->update_lock); | |
1372 | config = it87_read_value(data, IT87_REG_CONFIG); | |
1373 | if (config < 0) { | |
1374 | count = config; | |
1375 | } else { | |
1376 | config |= 1 << 5; | |
1377 | it87_write_value(data, IT87_REG_CONFIG, config); | |
1378 | /* Invalidate cache to force re-read */ | |
1379 | data->valid = 0; | |
1380 | } | |
1381 | mutex_unlock(&data->update_lock); | |
1382 | ||
1383 | return count; | |
1384 | } | |
1385 | ||
0124dd78 JD |
1386 | static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8); |
1387 | static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9); | |
1388 | static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10); | |
1389 | static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11); | |
1390 | static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12); | |
1391 | static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13); | |
1392 | static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14); | |
1393 | static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15); | |
1394 | static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0); | |
1395 | static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1); | |
1396 | static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2); | |
1397 | static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3); | |
1398 | static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6); | |
1399 | static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16); | |
1400 | static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17); | |
1401 | static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18); | |
3d30f9e6 JD |
1402 | static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR, |
1403 | show_alarm, clear_intrusion, 4); | |
0124dd78 | 1404 | |
d9b327c3 JD |
1405 | static ssize_t show_beep(struct device *dev, struct device_attribute *attr, |
1406 | char *buf) | |
1407 | { | |
1408 | int bitnr = to_sensor_dev_attr(attr)->index; | |
1409 | struct it87_data *data = it87_update_device(dev); | |
1410 | return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1); | |
1411 | } | |
1412 | static ssize_t set_beep(struct device *dev, struct device_attribute *attr, | |
1413 | const char *buf, size_t count) | |
1414 | { | |
1415 | int bitnr = to_sensor_dev_attr(attr)->index; | |
1416 | struct it87_data *data = dev_get_drvdata(dev); | |
1417 | long val; | |
1418 | ||
179c4fdb | 1419 | if (kstrtol(buf, 10, &val) < 0 |
d9b327c3 JD |
1420 | || (val != 0 && val != 1)) |
1421 | return -EINVAL; | |
1422 | ||
1423 | mutex_lock(&data->update_lock); | |
1424 | data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE); | |
1425 | if (val) | |
1426 | data->beeps |= (1 << bitnr); | |
1427 | else | |
1428 | data->beeps &= ~(1 << bitnr); | |
1429 | it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps); | |
1430 | mutex_unlock(&data->update_lock); | |
1431 | return count; | |
1432 | } | |
1433 | ||
1434 | static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR, | |
1435 | show_beep, set_beep, 1); | |
1436 | static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1); | |
1437 | static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1); | |
1438 | static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1); | |
1439 | static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1); | |
1440 | static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1); | |
1441 | static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1); | |
1442 | static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1); | |
1443 | /* fanX_beep writability is set later */ | |
1444 | static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0); | |
1445 | static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0); | |
1446 | static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0); | |
1447 | static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0); | |
1448 | static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0); | |
1449 | static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR, | |
1450 | show_beep, set_beep, 2); | |
1451 | static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2); | |
1452 | static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2); | |
1453 | ||
5f2dc798 JD |
1454 | static ssize_t show_vrm_reg(struct device *dev, struct device_attribute *attr, |
1455 | char *buf) | |
1da177e4 | 1456 | { |
90d6619a | 1457 | struct it87_data *data = dev_get_drvdata(dev); |
a7be58a1 | 1458 | return sprintf(buf, "%u\n", data->vrm); |
1da177e4 | 1459 | } |
5f2dc798 JD |
1460 | static ssize_t store_vrm_reg(struct device *dev, struct device_attribute *attr, |
1461 | const char *buf, size_t count) | |
1da177e4 | 1462 | { |
b74f3fdd | 1463 | struct it87_data *data = dev_get_drvdata(dev); |
f5f64501 JD |
1464 | unsigned long val; |
1465 | ||
179c4fdb | 1466 | if (kstrtoul(buf, 10, &val) < 0) |
f5f64501 | 1467 | return -EINVAL; |
1da177e4 | 1468 | |
1da177e4 LT |
1469 | data->vrm = val; |
1470 | ||
1471 | return count; | |
1472 | } | |
1473 | static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg); | |
1da177e4 | 1474 | |
5f2dc798 JD |
1475 | static ssize_t show_vid_reg(struct device *dev, struct device_attribute *attr, |
1476 | char *buf) | |
1da177e4 LT |
1477 | { |
1478 | struct it87_data *data = it87_update_device(dev); | |
1479 | return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm)); | |
1480 | } | |
1481 | static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL); | |
87808be4 | 1482 | |
738e5e05 JD |
1483 | static ssize_t show_label(struct device *dev, struct device_attribute *attr, |
1484 | char *buf) | |
1485 | { | |
3c4c4971 | 1486 | static const char * const labels[] = { |
738e5e05 JD |
1487 | "+5V", |
1488 | "5VSB", | |
1489 | "Vbat", | |
1490 | }; | |
3c4c4971 | 1491 | static const char * const labels_it8721[] = { |
44c1bcd4 JD |
1492 | "+3.3V", |
1493 | "3VSB", | |
1494 | "Vbat", | |
1495 | }; | |
1496 | struct it87_data *data = dev_get_drvdata(dev); | |
738e5e05 JD |
1497 | int nr = to_sensor_dev_attr(attr)->index; |
1498 | ||
16b5dda2 JD |
1499 | return sprintf(buf, "%s\n", has_12mv_adc(data) ? labels_it8721[nr] |
1500 | : labels[nr]); | |
738e5e05 JD |
1501 | } |
1502 | static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0); | |
1503 | static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1); | |
1504 | static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2); | |
7183ae8c | 1505 | /* special AVCC3 IT8603E in9 */ |
c145d5c6 | 1506 | static SENSOR_DEVICE_ATTR(in9_label, S_IRUGO, show_label, NULL, 0); |
738e5e05 | 1507 | |
b74f3fdd | 1508 | static ssize_t show_name(struct device *dev, struct device_attribute |
1509 | *devattr, char *buf) | |
1510 | { | |
1511 | struct it87_data *data = dev_get_drvdata(dev); | |
1512 | return sprintf(buf, "%s\n", data->name); | |
1513 | } | |
1514 | static DEVICE_ATTR(name, S_IRUGO, show_name, NULL); | |
1515 | ||
c145d5c6 | 1516 | static struct attribute *it87_attributes_in[10][5] = { |
9172b5d1 | 1517 | { |
87808be4 | 1518 | &sensor_dev_attr_in0_input.dev_attr.attr, |
87808be4 | 1519 | &sensor_dev_attr_in0_min.dev_attr.attr, |
87808be4 | 1520 | &sensor_dev_attr_in0_max.dev_attr.attr, |
0124dd78 | 1521 | &sensor_dev_attr_in0_alarm.dev_attr.attr, |
9172b5d1 GR |
1522 | NULL |
1523 | }, { | |
1524 | &sensor_dev_attr_in1_input.dev_attr.attr, | |
1525 | &sensor_dev_attr_in1_min.dev_attr.attr, | |
1526 | &sensor_dev_attr_in1_max.dev_attr.attr, | |
0124dd78 | 1527 | &sensor_dev_attr_in1_alarm.dev_attr.attr, |
9172b5d1 GR |
1528 | NULL |
1529 | }, { | |
1530 | &sensor_dev_attr_in2_input.dev_attr.attr, | |
1531 | &sensor_dev_attr_in2_min.dev_attr.attr, | |
1532 | &sensor_dev_attr_in2_max.dev_attr.attr, | |
0124dd78 | 1533 | &sensor_dev_attr_in2_alarm.dev_attr.attr, |
9172b5d1 GR |
1534 | NULL |
1535 | }, { | |
1536 | &sensor_dev_attr_in3_input.dev_attr.attr, | |
1537 | &sensor_dev_attr_in3_min.dev_attr.attr, | |
1538 | &sensor_dev_attr_in3_max.dev_attr.attr, | |
0124dd78 | 1539 | &sensor_dev_attr_in3_alarm.dev_attr.attr, |
9172b5d1 GR |
1540 | NULL |
1541 | }, { | |
1542 | &sensor_dev_attr_in4_input.dev_attr.attr, | |
1543 | &sensor_dev_attr_in4_min.dev_attr.attr, | |
1544 | &sensor_dev_attr_in4_max.dev_attr.attr, | |
0124dd78 | 1545 | &sensor_dev_attr_in4_alarm.dev_attr.attr, |
9172b5d1 GR |
1546 | NULL |
1547 | }, { | |
1548 | &sensor_dev_attr_in5_input.dev_attr.attr, | |
1549 | &sensor_dev_attr_in5_min.dev_attr.attr, | |
1550 | &sensor_dev_attr_in5_max.dev_attr.attr, | |
0124dd78 | 1551 | &sensor_dev_attr_in5_alarm.dev_attr.attr, |
9172b5d1 GR |
1552 | NULL |
1553 | }, { | |
1554 | &sensor_dev_attr_in6_input.dev_attr.attr, | |
1555 | &sensor_dev_attr_in6_min.dev_attr.attr, | |
1556 | &sensor_dev_attr_in6_max.dev_attr.attr, | |
0124dd78 | 1557 | &sensor_dev_attr_in6_alarm.dev_attr.attr, |
9172b5d1 GR |
1558 | NULL |
1559 | }, { | |
1560 | &sensor_dev_attr_in7_input.dev_attr.attr, | |
1561 | &sensor_dev_attr_in7_min.dev_attr.attr, | |
1562 | &sensor_dev_attr_in7_max.dev_attr.attr, | |
0124dd78 | 1563 | &sensor_dev_attr_in7_alarm.dev_attr.attr, |
9172b5d1 GR |
1564 | NULL |
1565 | }, { | |
1566 | &sensor_dev_attr_in8_input.dev_attr.attr, | |
1567 | NULL | |
c145d5c6 RM |
1568 | }, { |
1569 | &sensor_dev_attr_in9_input.dev_attr.attr, | |
1570 | NULL | |
9172b5d1 | 1571 | } }; |
87808be4 | 1572 | |
c145d5c6 | 1573 | static const struct attribute_group it87_group_in[10] = { |
9172b5d1 GR |
1574 | { .attrs = it87_attributes_in[0] }, |
1575 | { .attrs = it87_attributes_in[1] }, | |
1576 | { .attrs = it87_attributes_in[2] }, | |
1577 | { .attrs = it87_attributes_in[3] }, | |
1578 | { .attrs = it87_attributes_in[4] }, | |
1579 | { .attrs = it87_attributes_in[5] }, | |
1580 | { .attrs = it87_attributes_in[6] }, | |
1581 | { .attrs = it87_attributes_in[7] }, | |
1582 | { .attrs = it87_attributes_in[8] }, | |
c145d5c6 | 1583 | { .attrs = it87_attributes_in[9] }, |
9172b5d1 GR |
1584 | }; |
1585 | ||
4573acbc GR |
1586 | static struct attribute *it87_attributes_temp[3][6] = { |
1587 | { | |
87808be4 | 1588 | &sensor_dev_attr_temp1_input.dev_attr.attr, |
87808be4 | 1589 | &sensor_dev_attr_temp1_max.dev_attr.attr, |
87808be4 | 1590 | &sensor_dev_attr_temp1_min.dev_attr.attr, |
87808be4 | 1591 | &sensor_dev_attr_temp1_type.dev_attr.attr, |
0124dd78 | 1592 | &sensor_dev_attr_temp1_alarm.dev_attr.attr, |
4573acbc GR |
1593 | NULL |
1594 | } , { | |
1595 | &sensor_dev_attr_temp2_input.dev_attr.attr, | |
1596 | &sensor_dev_attr_temp2_max.dev_attr.attr, | |
1597 | &sensor_dev_attr_temp2_min.dev_attr.attr, | |
1598 | &sensor_dev_attr_temp2_type.dev_attr.attr, | |
0124dd78 | 1599 | &sensor_dev_attr_temp2_alarm.dev_attr.attr, |
4573acbc GR |
1600 | NULL |
1601 | } , { | |
1602 | &sensor_dev_attr_temp3_input.dev_attr.attr, | |
1603 | &sensor_dev_attr_temp3_max.dev_attr.attr, | |
1604 | &sensor_dev_attr_temp3_min.dev_attr.attr, | |
1605 | &sensor_dev_attr_temp3_type.dev_attr.attr, | |
0124dd78 | 1606 | &sensor_dev_attr_temp3_alarm.dev_attr.attr, |
4573acbc GR |
1607 | NULL |
1608 | } }; | |
1609 | ||
1610 | static const struct attribute_group it87_group_temp[3] = { | |
1611 | { .attrs = it87_attributes_temp[0] }, | |
1612 | { .attrs = it87_attributes_temp[1] }, | |
1613 | { .attrs = it87_attributes_temp[2] }, | |
1614 | }; | |
87808be4 | 1615 | |
161d898a GR |
1616 | static struct attribute *it87_attributes_temp_offset[] = { |
1617 | &sensor_dev_attr_temp1_offset.dev_attr.attr, | |
1618 | &sensor_dev_attr_temp2_offset.dev_attr.attr, | |
1619 | &sensor_dev_attr_temp3_offset.dev_attr.attr, | |
1620 | }; | |
1621 | ||
4573acbc | 1622 | static struct attribute *it87_attributes[] = { |
87808be4 | 1623 | &dev_attr_alarms.attr, |
3d30f9e6 | 1624 | &sensor_dev_attr_intrusion0_alarm.dev_attr.attr, |
b74f3fdd | 1625 | &dev_attr_name.attr, |
87808be4 JD |
1626 | NULL |
1627 | }; | |
1628 | ||
1629 | static const struct attribute_group it87_group = { | |
1630 | .attrs = it87_attributes, | |
1631 | }; | |
1632 | ||
9172b5d1 | 1633 | static struct attribute *it87_attributes_in_beep[] = { |
d9b327c3 JD |
1634 | &sensor_dev_attr_in0_beep.dev_attr.attr, |
1635 | &sensor_dev_attr_in1_beep.dev_attr.attr, | |
1636 | &sensor_dev_attr_in2_beep.dev_attr.attr, | |
1637 | &sensor_dev_attr_in3_beep.dev_attr.attr, | |
1638 | &sensor_dev_attr_in4_beep.dev_attr.attr, | |
1639 | &sensor_dev_attr_in5_beep.dev_attr.attr, | |
1640 | &sensor_dev_attr_in6_beep.dev_attr.attr, | |
1641 | &sensor_dev_attr_in7_beep.dev_attr.attr, | |
c145d5c6 RM |
1642 | NULL, |
1643 | NULL, | |
9172b5d1 | 1644 | }; |
d9b327c3 | 1645 | |
4573acbc | 1646 | static struct attribute *it87_attributes_temp_beep[] = { |
d9b327c3 JD |
1647 | &sensor_dev_attr_temp1_beep.dev_attr.attr, |
1648 | &sensor_dev_attr_temp2_beep.dev_attr.attr, | |
1649 | &sensor_dev_attr_temp3_beep.dev_attr.attr, | |
d9b327c3 JD |
1650 | }; |
1651 | ||
e1169ba0 GR |
1652 | static struct attribute *it87_attributes_fan[5][3+1] = { { |
1653 | &sensor_dev_attr_fan1_input.dev_attr.attr, | |
1654 | &sensor_dev_attr_fan1_min.dev_attr.attr, | |
723a0aa0 JD |
1655 | &sensor_dev_attr_fan1_alarm.dev_attr.attr, |
1656 | NULL | |
1657 | }, { | |
e1169ba0 GR |
1658 | &sensor_dev_attr_fan2_input.dev_attr.attr, |
1659 | &sensor_dev_attr_fan2_min.dev_attr.attr, | |
723a0aa0 JD |
1660 | &sensor_dev_attr_fan2_alarm.dev_attr.attr, |
1661 | NULL | |
1662 | }, { | |
e1169ba0 GR |
1663 | &sensor_dev_attr_fan3_input.dev_attr.attr, |
1664 | &sensor_dev_attr_fan3_min.dev_attr.attr, | |
723a0aa0 JD |
1665 | &sensor_dev_attr_fan3_alarm.dev_attr.attr, |
1666 | NULL | |
1667 | }, { | |
e1169ba0 GR |
1668 | &sensor_dev_attr_fan4_input.dev_attr.attr, |
1669 | &sensor_dev_attr_fan4_min.dev_attr.attr, | |
723a0aa0 JD |
1670 | &sensor_dev_attr_fan4_alarm.dev_attr.attr, |
1671 | NULL | |
1672 | }, { | |
e1169ba0 GR |
1673 | &sensor_dev_attr_fan5_input.dev_attr.attr, |
1674 | &sensor_dev_attr_fan5_min.dev_attr.attr, | |
723a0aa0 JD |
1675 | &sensor_dev_attr_fan5_alarm.dev_attr.attr, |
1676 | NULL | |
1677 | } }; | |
1678 | ||
e1169ba0 GR |
1679 | static const struct attribute_group it87_group_fan[5] = { |
1680 | { .attrs = it87_attributes_fan[0] }, | |
1681 | { .attrs = it87_attributes_fan[1] }, | |
1682 | { .attrs = it87_attributes_fan[2] }, | |
1683 | { .attrs = it87_attributes_fan[3] }, | |
1684 | { .attrs = it87_attributes_fan[4] }, | |
723a0aa0 | 1685 | }; |
87808be4 | 1686 | |
e1169ba0 | 1687 | static const struct attribute *it87_attributes_fan_div[] = { |
87808be4 | 1688 | &sensor_dev_attr_fan1_div.dev_attr.attr, |
87808be4 | 1689 | &sensor_dev_attr_fan2_div.dev_attr.attr, |
87808be4 | 1690 | &sensor_dev_attr_fan3_div.dev_attr.attr, |
723a0aa0 JD |
1691 | }; |
1692 | ||
723a0aa0 | 1693 | static struct attribute *it87_attributes_pwm[3][4+1] = { { |
87808be4 | 1694 | &sensor_dev_attr_pwm1_enable.dev_attr.attr, |
87808be4 | 1695 | &sensor_dev_attr_pwm1.dev_attr.attr, |
d5b0b5d6 | 1696 | &dev_attr_pwm1_freq.attr, |
94ac7ee6 | 1697 | &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr, |
723a0aa0 JD |
1698 | NULL |
1699 | }, { | |
1700 | &sensor_dev_attr_pwm2_enable.dev_attr.attr, | |
1701 | &sensor_dev_attr_pwm2.dev_attr.attr, | |
1702 | &dev_attr_pwm2_freq.attr, | |
94ac7ee6 | 1703 | &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr, |
723a0aa0 JD |
1704 | NULL |
1705 | }, { | |
1706 | &sensor_dev_attr_pwm3_enable.dev_attr.attr, | |
1707 | &sensor_dev_attr_pwm3.dev_attr.attr, | |
1708 | &dev_attr_pwm3_freq.attr, | |
94ac7ee6 | 1709 | &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr, |
723a0aa0 JD |
1710 | NULL |
1711 | } }; | |
87808be4 | 1712 | |
723a0aa0 JD |
1713 | static const struct attribute_group it87_group_pwm[3] = { |
1714 | { .attrs = it87_attributes_pwm[0] }, | |
1715 | { .attrs = it87_attributes_pwm[1] }, | |
1716 | { .attrs = it87_attributes_pwm[2] }, | |
1717 | }; | |
1718 | ||
4f3f51bc JD |
1719 | static struct attribute *it87_attributes_autopwm[3][9+1] = { { |
1720 | &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr, | |
1721 | &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr, | |
1722 | &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr, | |
1723 | &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr, | |
1724 | &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr, | |
1725 | &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr, | |
1726 | &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr, | |
1727 | &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr, | |
1728 | &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr, | |
1729 | NULL | |
1730 | }, { | |
1731 | &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr, | |
1732 | &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr, | |
1733 | &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr, | |
1734 | &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr, | |
1735 | &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr, | |
1736 | &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr, | |
1737 | &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr, | |
1738 | &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr, | |
1739 | &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr, | |
1740 | NULL | |
1741 | }, { | |
1742 | &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr, | |
1743 | &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr, | |
1744 | &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr, | |
1745 | &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr, | |
1746 | &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr, | |
1747 | &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr, | |
1748 | &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr, | |
1749 | &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr, | |
1750 | &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr, | |
1751 | NULL | |
1752 | } }; | |
1753 | ||
1754 | static const struct attribute_group it87_group_autopwm[3] = { | |
1755 | { .attrs = it87_attributes_autopwm[0] }, | |
1756 | { .attrs = it87_attributes_autopwm[1] }, | |
1757 | { .attrs = it87_attributes_autopwm[2] }, | |
1758 | }; | |
1759 | ||
d9b327c3 JD |
1760 | static struct attribute *it87_attributes_fan_beep[] = { |
1761 | &sensor_dev_attr_fan1_beep.dev_attr.attr, | |
1762 | &sensor_dev_attr_fan2_beep.dev_attr.attr, | |
1763 | &sensor_dev_attr_fan3_beep.dev_attr.attr, | |
1764 | &sensor_dev_attr_fan4_beep.dev_attr.attr, | |
1765 | &sensor_dev_attr_fan5_beep.dev_attr.attr, | |
1766 | }; | |
1767 | ||
6a8d7acf | 1768 | static struct attribute *it87_attributes_vid[] = { |
87808be4 JD |
1769 | &dev_attr_vrm.attr, |
1770 | &dev_attr_cpu0_vid.attr, | |
1771 | NULL | |
1772 | }; | |
1773 | ||
6a8d7acf JD |
1774 | static const struct attribute_group it87_group_vid = { |
1775 | .attrs = it87_attributes_vid, | |
87808be4 | 1776 | }; |
1da177e4 | 1777 | |
738e5e05 JD |
1778 | static struct attribute *it87_attributes_label[] = { |
1779 | &sensor_dev_attr_in3_label.dev_attr.attr, | |
1780 | &sensor_dev_attr_in7_label.dev_attr.attr, | |
1781 | &sensor_dev_attr_in8_label.dev_attr.attr, | |
c145d5c6 | 1782 | &sensor_dev_attr_in9_label.dev_attr.attr, |
738e5e05 JD |
1783 | NULL |
1784 | }; | |
1785 | ||
1786 | static const struct attribute_group it87_group_label = { | |
fa8b6975 | 1787 | .attrs = it87_attributes_label, |
738e5e05 JD |
1788 | }; |
1789 | ||
2d8672c5 | 1790 | /* SuperIO detection - will change isa_address if a chip is found */ |
b74f3fdd | 1791 | static int __init it87_find(unsigned short *address, |
1792 | struct it87_sio_data *sio_data) | |
1da177e4 | 1793 | { |
5b0380c9 | 1794 | int err; |
b74f3fdd | 1795 | u16 chip_type; |
98dd22c3 | 1796 | const char *board_vendor, *board_name; |
1da177e4 | 1797 | |
5b0380c9 NG |
1798 | err = superio_enter(); |
1799 | if (err) | |
1800 | return err; | |
1801 | ||
1802 | err = -ENODEV; | |
67b671bc | 1803 | chip_type = force_id ? force_id : superio_inw(DEVID); |
b74f3fdd | 1804 | |
1805 | switch (chip_type) { | |
1806 | case IT8705F_DEVID: | |
1807 | sio_data->type = it87; | |
1808 | break; | |
1809 | case IT8712F_DEVID: | |
1810 | sio_data->type = it8712; | |
1811 | break; | |
1812 | case IT8716F_DEVID: | |
1813 | case IT8726F_DEVID: | |
1814 | sio_data->type = it8716; | |
1815 | break; | |
1816 | case IT8718F_DEVID: | |
1817 | sio_data->type = it8718; | |
1818 | break; | |
b4da93e4 JMS |
1819 | case IT8720F_DEVID: |
1820 | sio_data->type = it8720; | |
1821 | break; | |
44c1bcd4 JD |
1822 | case IT8721F_DEVID: |
1823 | sio_data->type = it8721; | |
1824 | break; | |
16b5dda2 JD |
1825 | case IT8728F_DEVID: |
1826 | sio_data->type = it8728; | |
1827 | break; | |
b0636707 GR |
1828 | case IT8771E_DEVID: |
1829 | sio_data->type = it8771; | |
1830 | break; | |
1831 | case IT8772E_DEVID: | |
1832 | sio_data->type = it8772; | |
1833 | break; | |
7bc32d29 GR |
1834 | case IT8781F_DEVID: |
1835 | sio_data->type = it8781; | |
1836 | break; | |
0531d98b GR |
1837 | case IT8782F_DEVID: |
1838 | sio_data->type = it8782; | |
1839 | break; | |
1840 | case IT8783E_DEVID: | |
1841 | sio_data->type = it8783; | |
1842 | break; | |
a0c1424a TL |
1843 | case IT8786E_DEVID: |
1844 | sio_data->type = it8786; | |
1845 | break; | |
4ee07157 GR |
1846 | case IT8790E_DEVID: |
1847 | sio_data->type = it8790; | |
1848 | break; | |
7183ae8c | 1849 | case IT8603E_DEVID: |
574e9bd8 | 1850 | case IT8623E_DEVID: |
c145d5c6 RM |
1851 | sio_data->type = it8603; |
1852 | break; | |
b74f3fdd | 1853 | case 0xffff: /* No device at all */ |
1854 | goto exit; | |
1855 | default: | |
a8ca1037 | 1856 | pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type); |
b74f3fdd | 1857 | goto exit; |
1858 | } | |
1da177e4 | 1859 | |
87673dd7 | 1860 | superio_select(PME); |
1da177e4 | 1861 | if (!(superio_inb(IT87_ACT_REG) & 0x01)) { |
a8ca1037 | 1862 | pr_info("Device not activated, skipping\n"); |
1da177e4 LT |
1863 | goto exit; |
1864 | } | |
1865 | ||
1866 | *address = superio_inw(IT87_BASE_REG) & ~(IT87_EXTENT - 1); | |
1867 | if (*address == 0) { | |
a8ca1037 | 1868 | pr_info("Base address not set, skipping\n"); |
1da177e4 LT |
1869 | goto exit; |
1870 | } | |
1871 | ||
1872 | err = 0; | |
0475169c | 1873 | sio_data->revision = superio_inb(DEVREV) & 0x0f; |
faf392fb GR |
1874 | pr_info("Found IT%04x%s chip at 0x%x, revision %d\n", chip_type, |
1875 | it87_devices[sio_data->type].suffix, | |
a0c1424a | 1876 | *address, sio_data->revision); |
1da177e4 | 1877 | |
7f5726c3 GR |
1878 | /* in7 (VSB or VCCH5V) is always internal on some chips */ |
1879 | if (it87_devices[sio_data->type].features & FEAT_IN7_INTERNAL) | |
1880 | sio_data->internal |= (1 << 1); | |
1881 | ||
738e5e05 | 1882 | /* in8 (Vbat) is always internal */ |
7f5726c3 GR |
1883 | sio_data->internal |= (1 << 2); |
1884 | ||
c145d5c6 RM |
1885 | /* Only the IT8603E has in9 */ |
1886 | if (sio_data->type != it8603) | |
1887 | sio_data->skip_in |= (1 << 9); | |
738e5e05 | 1888 | |
32dd7c40 | 1889 | if (!(it87_devices[sio_data->type].features & FEAT_VID)) |
895ff267 | 1890 | sio_data->skip_vid = 1; |
d9b327c3 | 1891 | |
32dd7c40 GR |
1892 | /* Read GPIO config and VID value from LDN 7 (GPIO) */ |
1893 | if (sio_data->type == it87) { | |
d9b327c3 JD |
1894 | /* The IT8705F has a different LD number for GPIO */ |
1895 | superio_select(5); | |
1896 | sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f; | |
0531d98b | 1897 | } else if (sio_data->type == it8783) { |
088ce2ac | 1898 | int reg25, reg27, reg2a, reg2c, regef; |
0531d98b | 1899 | |
0531d98b GR |
1900 | superio_select(GPIO); |
1901 | ||
1902 | reg25 = superio_inb(IT87_SIO_GPIO1_REG); | |
1903 | reg27 = superio_inb(IT87_SIO_GPIO3_REG); | |
088ce2ac GR |
1904 | reg2a = superio_inb(IT87_SIO_PINX1_REG); |
1905 | reg2c = superio_inb(IT87_SIO_PINX2_REG); | |
1906 | regef = superio_inb(IT87_SIO_SPI_REG); | |
0531d98b | 1907 | |
0531d98b | 1908 | /* Check if fan3 is there or not */ |
088ce2ac | 1909 | if ((reg27 & (1 << 0)) || !(reg2c & (1 << 2))) |
0531d98b GR |
1910 | sio_data->skip_fan |= (1 << 2); |
1911 | if ((reg25 & (1 << 4)) | |
088ce2ac | 1912 | || (!(reg2a & (1 << 1)) && (regef & (1 << 0)))) |
0531d98b GR |
1913 | sio_data->skip_pwm |= (1 << 2); |
1914 | ||
1915 | /* Check if fan2 is there or not */ | |
1916 | if (reg27 & (1 << 7)) | |
1917 | sio_data->skip_fan |= (1 << 1); | |
1918 | if (reg27 & (1 << 3)) | |
1919 | sio_data->skip_pwm |= (1 << 1); | |
1920 | ||
1921 | /* VIN5 */ | |
088ce2ac | 1922 | if ((reg27 & (1 << 0)) || (reg2c & (1 << 2))) |
9172b5d1 | 1923 | sio_data->skip_in |= (1 << 5); /* No VIN5 */ |
0531d98b GR |
1924 | |
1925 | /* VIN6 */ | |
9172b5d1 GR |
1926 | if (reg27 & (1 << 1)) |
1927 | sio_data->skip_in |= (1 << 6); /* No VIN6 */ | |
0531d98b GR |
1928 | |
1929 | /* | |
1930 | * VIN7 | |
1931 | * Does not depend on bit 2 of Reg2C, contrary to datasheet. | |
1932 | */ | |
9172b5d1 GR |
1933 | if (reg27 & (1 << 2)) { |
1934 | /* | |
1935 | * The data sheet is a bit unclear regarding the | |
1936 | * internal voltage divider for VCCH5V. It says | |
1937 | * "This bit enables and switches VIN7 (pin 91) to the | |
1938 | * internal voltage divider for VCCH5V". | |
1939 | * This is different to other chips, where the internal | |
1940 | * voltage divider would connect VIN7 to an internal | |
1941 | * voltage source. Maybe that is the case here as well. | |
1942 | * | |
1943 | * Since we don't know for sure, re-route it if that is | |
1944 | * not the case, and ask the user to report if the | |
1945 | * resulting voltage is sane. | |
1946 | */ | |
088ce2ac GR |
1947 | if (!(reg2c & (1 << 1))) { |
1948 | reg2c |= (1 << 1); | |
1949 | superio_outb(IT87_SIO_PINX2_REG, reg2c); | |
9172b5d1 GR |
1950 | pr_notice("Routing internal VCCH5V to in7.\n"); |
1951 | } | |
1952 | pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n"); | |
1953 | pr_notice("Please report if it displays a reasonable voltage.\n"); | |
1954 | } | |
0531d98b | 1955 | |
088ce2ac | 1956 | if (reg2c & (1 << 0)) |
0531d98b | 1957 | sio_data->internal |= (1 << 0); |
088ce2ac | 1958 | if (reg2c & (1 << 1)) |
0531d98b GR |
1959 | sio_data->internal |= (1 << 1); |
1960 | ||
1961 | sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f; | |
c145d5c6 RM |
1962 | } else if (sio_data->type == it8603) { |
1963 | int reg27, reg29; | |
1964 | ||
c145d5c6 | 1965 | superio_select(GPIO); |
0531d98b | 1966 | |
c145d5c6 RM |
1967 | reg27 = superio_inb(IT87_SIO_GPIO3_REG); |
1968 | ||
1969 | /* Check if fan3 is there or not */ | |
1970 | if (reg27 & (1 << 6)) | |
1971 | sio_data->skip_pwm |= (1 << 2); | |
1972 | if (reg27 & (1 << 7)) | |
1973 | sio_data->skip_fan |= (1 << 2); | |
1974 | ||
1975 | /* Check if fan2 is there or not */ | |
1976 | reg29 = superio_inb(IT87_SIO_GPIO5_REG); | |
1977 | if (reg29 & (1 << 1)) | |
1978 | sio_data->skip_pwm |= (1 << 1); | |
1979 | if (reg29 & (1 << 2)) | |
1980 | sio_data->skip_fan |= (1 << 1); | |
1981 | ||
1982 | sio_data->skip_in |= (1 << 5); /* No VIN5 */ | |
1983 | sio_data->skip_in |= (1 << 6); /* No VIN6 */ | |
1984 | ||
c145d5c6 RM |
1985 | sio_data->internal |= (1 << 3); /* in9 is AVCC */ |
1986 | ||
1987 | sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f; | |
895ff267 | 1988 | } else { |
87673dd7 | 1989 | int reg; |
9172b5d1 | 1990 | bool uart6; |
87673dd7 JD |
1991 | |
1992 | superio_select(GPIO); | |
44c1bcd4 | 1993 | |
895ff267 | 1994 | reg = superio_inb(IT87_SIO_GPIO3_REG); |
32dd7c40 | 1995 | if (!sio_data->skip_vid) { |
44c1bcd4 JD |
1996 | /* We need at least 4 VID pins */ |
1997 | if (reg & 0x0f) { | |
a8ca1037 | 1998 | pr_info("VID is disabled (pins used for GPIO)\n"); |
44c1bcd4 JD |
1999 | sio_data->skip_vid = 1; |
2000 | } | |
895ff267 JD |
2001 | } |
2002 | ||
591ec650 JD |
2003 | /* Check if fan3 is there or not */ |
2004 | if (reg & (1 << 6)) | |
2005 | sio_data->skip_pwm |= (1 << 2); | |
2006 | if (reg & (1 << 7)) | |
2007 | sio_data->skip_fan |= (1 << 2); | |
2008 | ||
2009 | /* Check if fan2 is there or not */ | |
2010 | reg = superio_inb(IT87_SIO_GPIO5_REG); | |
2011 | if (reg & (1 << 1)) | |
2012 | sio_data->skip_pwm |= (1 << 1); | |
2013 | if (reg & (1 << 2)) | |
2014 | sio_data->skip_fan |= (1 << 1); | |
2015 | ||
895ff267 JD |
2016 | if ((sio_data->type == it8718 || sio_data->type == it8720) |
2017 | && !(sio_data->skip_vid)) | |
b74f3fdd | 2018 | sio_data->vid_value = superio_inb(IT87_SIO_VID_REG); |
87673dd7 JD |
2019 | |
2020 | reg = superio_inb(IT87_SIO_PINX2_REG); | |
9172b5d1 GR |
2021 | |
2022 | uart6 = sio_data->type == it8782 && (reg & (1 << 2)); | |
2023 | ||
436cad2a JD |
2024 | /* |
2025 | * The IT8720F has no VIN7 pin, so VCCH should always be | |
2026 | * routed internally to VIN7 with an internal divider. | |
2027 | * Curiously, there still is a configuration bit to control | |
2028 | * this, which means it can be set incorrectly. And even | |
2029 | * more curiously, many boards out there are improperly | |
2030 | * configured, even though the IT8720F datasheet claims | |
2031 | * that the internal routing of VCCH to VIN7 is the default | |
2032 | * setting. So we force the internal routing in this case. | |
0531d98b GR |
2033 | * |
2034 | * On IT8782F, VIN7 is multiplexed with one of the UART6 pins. | |
9172b5d1 GR |
2035 | * If UART6 is enabled, re-route VIN7 to the internal divider |
2036 | * if that is not already the case. | |
436cad2a | 2037 | */ |
9172b5d1 | 2038 | if ((sio_data->type == it8720 || uart6) && !(reg & (1 << 1))) { |
436cad2a JD |
2039 | reg |= (1 << 1); |
2040 | superio_outb(IT87_SIO_PINX2_REG, reg); | |
a8ca1037 | 2041 | pr_notice("Routing internal VCCH to in7\n"); |
436cad2a | 2042 | } |
87673dd7 | 2043 | if (reg & (1 << 0)) |
738e5e05 | 2044 | sio_data->internal |= (1 << 0); |
7f5726c3 | 2045 | if (reg & (1 << 1)) |
738e5e05 | 2046 | sio_data->internal |= (1 << 1); |
d9b327c3 | 2047 | |
9172b5d1 GR |
2048 | /* |
2049 | * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7. | |
2050 | * While VIN7 can be routed to the internal voltage divider, | |
2051 | * VIN5 and VIN6 are not available if UART6 is enabled. | |
4573acbc GR |
2052 | * |
2053 | * Also, temp3 is not available if UART6 is enabled and TEMPIN3 | |
2054 | * is the temperature source. Since we can not read the | |
2055 | * temperature source here, skip_temp is preliminary. | |
9172b5d1 | 2056 | */ |
4573acbc | 2057 | if (uart6) { |
9172b5d1 | 2058 | sio_data->skip_in |= (1 << 5) | (1 << 6); |
4573acbc GR |
2059 | sio_data->skip_temp |= (1 << 2); |
2060 | } | |
9172b5d1 | 2061 | |
d9b327c3 | 2062 | sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f; |
87673dd7 | 2063 | } |
d9b327c3 | 2064 | if (sio_data->beep_pin) |
a8ca1037 | 2065 | pr_info("Beeping is supported\n"); |
87673dd7 | 2066 | |
98dd22c3 JD |
2067 | /* Disable specific features based on DMI strings */ |
2068 | board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR); | |
2069 | board_name = dmi_get_system_info(DMI_BOARD_NAME); | |
2070 | if (board_vendor && board_name) { | |
2071 | if (strcmp(board_vendor, "nVIDIA") == 0 | |
2072 | && strcmp(board_name, "FN68PT") == 0) { | |
4a0d71cf GR |
2073 | /* |
2074 | * On the Shuttle SN68PT, FAN_CTL2 is apparently not | |
2075 | * connected to a fan, but to something else. One user | |
2076 | * has reported instant system power-off when changing | |
2077 | * the PWM2 duty cycle, so we disable it. | |
2078 | * I use the board name string as the trigger in case | |
2079 | * the same board is ever used in other systems. | |
2080 | */ | |
a8ca1037 | 2081 | pr_info("Disabling pwm2 due to hardware constraints\n"); |
98dd22c3 JD |
2082 | sio_data->skip_pwm = (1 << 1); |
2083 | } | |
2084 | } | |
2085 | ||
1da177e4 LT |
2086 | exit: |
2087 | superio_exit(); | |
2088 | return err; | |
2089 | } | |
2090 | ||
723a0aa0 JD |
2091 | static void it87_remove_files(struct device *dev) |
2092 | { | |
2093 | struct it87_data *data = platform_get_drvdata(pdev); | |
a8b3a3a5 | 2094 | struct it87_sio_data *sio_data = dev_get_platdata(dev); |
723a0aa0 JD |
2095 | int i; |
2096 | ||
2097 | sysfs_remove_group(&dev->kobj, &it87_group); | |
c145d5c6 | 2098 | for (i = 0; i < 10; i++) { |
9172b5d1 GR |
2099 | if (sio_data->skip_in & (1 << i)) |
2100 | continue; | |
2101 | sysfs_remove_group(&dev->kobj, &it87_group_in[i]); | |
2102 | if (it87_attributes_in_beep[i]) | |
2103 | sysfs_remove_file(&dev->kobj, | |
2104 | it87_attributes_in_beep[i]); | |
2105 | } | |
4573acbc GR |
2106 | for (i = 0; i < 3; i++) { |
2107 | if (!(data->has_temp & (1 << i))) | |
2108 | continue; | |
2109 | sysfs_remove_group(&dev->kobj, &it87_group_temp[i]); | |
161d898a GR |
2110 | if (has_temp_offset(data)) |
2111 | sysfs_remove_file(&dev->kobj, | |
2112 | it87_attributes_temp_offset[i]); | |
4573acbc GR |
2113 | if (sio_data->beep_pin) |
2114 | sysfs_remove_file(&dev->kobj, | |
2115 | it87_attributes_temp_beep[i]); | |
2116 | } | |
723a0aa0 JD |
2117 | for (i = 0; i < 5; i++) { |
2118 | if (!(data->has_fan & (1 << i))) | |
2119 | continue; | |
e1169ba0 | 2120 | sysfs_remove_group(&dev->kobj, &it87_group_fan[i]); |
d9b327c3 JD |
2121 | if (sio_data->beep_pin) |
2122 | sysfs_remove_file(&dev->kobj, | |
2123 | it87_attributes_fan_beep[i]); | |
e1169ba0 GR |
2124 | if (i < 3 && !has_16bit_fans(data)) |
2125 | sysfs_remove_file(&dev->kobj, | |
2126 | it87_attributes_fan_div[i]); | |
723a0aa0 JD |
2127 | } |
2128 | for (i = 0; i < 3; i++) { | |
1696d1de | 2129 | if (sio_data->skip_pwm & (1 << i)) |
723a0aa0 JD |
2130 | continue; |
2131 | sysfs_remove_group(&dev->kobj, &it87_group_pwm[i]); | |
4f3f51bc JD |
2132 | if (has_old_autopwm(data)) |
2133 | sysfs_remove_group(&dev->kobj, | |
2134 | &it87_group_autopwm[i]); | |
723a0aa0 | 2135 | } |
6a8d7acf JD |
2136 | if (!sio_data->skip_vid) |
2137 | sysfs_remove_group(&dev->kobj, &it87_group_vid); | |
738e5e05 | 2138 | sysfs_remove_group(&dev->kobj, &it87_group_label); |
723a0aa0 JD |
2139 | } |
2140 | ||
6c931ae1 | 2141 | static int it87_probe(struct platform_device *pdev) |
1da177e4 | 2142 | { |
1da177e4 | 2143 | struct it87_data *data; |
b74f3fdd | 2144 | struct resource *res; |
2145 | struct device *dev = &pdev->dev; | |
a8b3a3a5 | 2146 | struct it87_sio_data *sio_data = dev_get_platdata(dev); |
723a0aa0 | 2147 | int err = 0, i; |
1da177e4 | 2148 | int enable_pwm_interface; |
d9b327c3 | 2149 | int fan_beep_need_rw; |
b74f3fdd | 2150 | |
2151 | res = platform_get_resource(pdev, IORESOURCE_IO, 0); | |
62a1d05f GR |
2152 | if (!devm_request_region(&pdev->dev, res->start, IT87_EC_EXTENT, |
2153 | DRVNAME)) { | |
b74f3fdd | 2154 | dev_err(dev, "Failed to request region 0x%lx-0x%lx\n", |
2155 | (unsigned long)res->start, | |
87b4b663 | 2156 | (unsigned long)(res->start + IT87_EC_EXTENT - 1)); |
62a1d05f | 2157 | return -EBUSY; |
8e9afcbb | 2158 | } |
1da177e4 | 2159 | |
62a1d05f GR |
2160 | data = devm_kzalloc(&pdev->dev, sizeof(struct it87_data), GFP_KERNEL); |
2161 | if (!data) | |
2162 | return -ENOMEM; | |
1da177e4 | 2163 | |
b74f3fdd | 2164 | data->addr = res->start; |
2165 | data->type = sio_data->type; | |
483db43e | 2166 | data->features = it87_devices[sio_data->type].features; |
5d8d2f2b | 2167 | data->peci_mask = it87_devices[sio_data->type].peci_mask; |
19529784 | 2168 | data->old_peci_mask = it87_devices[sio_data->type].old_peci_mask; |
483db43e GR |
2169 | data->name = it87_devices[sio_data->type].name; |
2170 | /* | |
2171 | * IT8705F Datasheet 0.4.1, 3h == Version G. | |
2172 | * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J. | |
2173 | * These are the first revisions with 16-bit tachometer support. | |
2174 | */ | |
2175 | switch (data->type) { | |
2176 | case it87: | |
2177 | if (sio_data->revision >= 0x03) { | |
2178 | data->features &= ~FEAT_OLD_AUTOPWM; | |
9faf28ca | 2179 | data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS; |
483db43e GR |
2180 | } |
2181 | break; | |
2182 | case it8712: | |
2183 | if (sio_data->revision >= 0x08) { | |
2184 | data->features &= ~FEAT_OLD_AUTOPWM; | |
9faf28ca GR |
2185 | data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS | |
2186 | FEAT_FIVE_FANS; | |
483db43e GR |
2187 | } |
2188 | break; | |
2189 | default: | |
2190 | break; | |
2191 | } | |
1da177e4 LT |
2192 | |
2193 | /* Now, we do the remaining detection. */ | |
b74f3fdd | 2194 | if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80) |
62a1d05f GR |
2195 | || it87_read_value(data, IT87_REG_CHIPID) != 0x90) |
2196 | return -ENODEV; | |
1da177e4 | 2197 | |
b74f3fdd | 2198 | platform_set_drvdata(pdev, data); |
1da177e4 | 2199 | |
9a61bf63 | 2200 | mutex_init(&data->update_lock); |
1da177e4 | 2201 | |
1da177e4 | 2202 | /* Check PWM configuration */ |
b74f3fdd | 2203 | enable_pwm_interface = it87_check_pwm(dev); |
1da177e4 | 2204 | |
44c1bcd4 | 2205 | /* Starting with IT8721F, we handle scaling of internal voltages */ |
16b5dda2 | 2206 | if (has_12mv_adc(data)) { |
44c1bcd4 JD |
2207 | if (sio_data->internal & (1 << 0)) |
2208 | data->in_scaled |= (1 << 3); /* in3 is AVCC */ | |
2209 | if (sio_data->internal & (1 << 1)) | |
2210 | data->in_scaled |= (1 << 7); /* in7 is VSB */ | |
2211 | if (sio_data->internal & (1 << 2)) | |
2212 | data->in_scaled |= (1 << 8); /* in8 is Vbat */ | |
c145d5c6 RM |
2213 | if (sio_data->internal & (1 << 3)) |
2214 | data->in_scaled |= (1 << 9); /* in9 is AVCC */ | |
7bc32d29 GR |
2215 | } else if (sio_data->type == it8781 || sio_data->type == it8782 || |
2216 | sio_data->type == it8783) { | |
0531d98b GR |
2217 | if (sio_data->internal & (1 << 0)) |
2218 | data->in_scaled |= (1 << 3); /* in3 is VCC5V */ | |
2219 | if (sio_data->internal & (1 << 1)) | |
2220 | data->in_scaled |= (1 << 7); /* in7 is VCCH5V */ | |
44c1bcd4 JD |
2221 | } |
2222 | ||
4573acbc GR |
2223 | data->has_temp = 0x07; |
2224 | if (sio_data->skip_temp & (1 << 2)) { | |
2225 | if (sio_data->type == it8782 | |
2226 | && !(it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x80)) | |
2227 | data->has_temp &= ~(1 << 2); | |
2228 | } | |
2229 | ||
1da177e4 | 2230 | /* Initialize the IT87 chip */ |
b74f3fdd | 2231 | it87_init_device(pdev); |
1da177e4 LT |
2232 | |
2233 | /* Register sysfs hooks */ | |
5f2dc798 JD |
2234 | err = sysfs_create_group(&dev->kobj, &it87_group); |
2235 | if (err) | |
62a1d05f | 2236 | return err; |
17d648bf | 2237 | |
c145d5c6 | 2238 | for (i = 0; i < 10; i++) { |
9172b5d1 GR |
2239 | if (sio_data->skip_in & (1 << i)) |
2240 | continue; | |
2241 | err = sysfs_create_group(&dev->kobj, &it87_group_in[i]); | |
2242 | if (err) | |
62a1d05f | 2243 | goto error; |
9172b5d1 GR |
2244 | if (sio_data->beep_pin && it87_attributes_in_beep[i]) { |
2245 | err = sysfs_create_file(&dev->kobj, | |
2246 | it87_attributes_in_beep[i]); | |
2247 | if (err) | |
62a1d05f | 2248 | goto error; |
9172b5d1 GR |
2249 | } |
2250 | } | |
2251 | ||
4573acbc GR |
2252 | for (i = 0; i < 3; i++) { |
2253 | if (!(data->has_temp & (1 << i))) | |
2254 | continue; | |
2255 | err = sysfs_create_group(&dev->kobj, &it87_group_temp[i]); | |
d9b327c3 | 2256 | if (err) |
62a1d05f | 2257 | goto error; |
161d898a GR |
2258 | if (has_temp_offset(data)) { |
2259 | err = sysfs_create_file(&dev->kobj, | |
2260 | it87_attributes_temp_offset[i]); | |
2261 | if (err) | |
2262 | goto error; | |
2263 | } | |
4573acbc GR |
2264 | if (sio_data->beep_pin) { |
2265 | err = sysfs_create_file(&dev->kobj, | |
2266 | it87_attributes_temp_beep[i]); | |
2267 | if (err) | |
2268 | goto error; | |
2269 | } | |
d9b327c3 JD |
2270 | } |
2271 | ||
9060f8bd | 2272 | /* Do not create fan files for disabled fans */ |
d9b327c3 | 2273 | fan_beep_need_rw = 1; |
723a0aa0 JD |
2274 | for (i = 0; i < 5; i++) { |
2275 | if (!(data->has_fan & (1 << i))) | |
2276 | continue; | |
e1169ba0 | 2277 | err = sysfs_create_group(&dev->kobj, &it87_group_fan[i]); |
723a0aa0 | 2278 | if (err) |
62a1d05f | 2279 | goto error; |
d9b327c3 | 2280 | |
e1169ba0 GR |
2281 | if (i < 3 && !has_16bit_fans(data)) { |
2282 | err = sysfs_create_file(&dev->kobj, | |
2283 | it87_attributes_fan_div[i]); | |
2284 | if (err) | |
2285 | goto error; | |
2286 | } | |
2287 | ||
d9b327c3 JD |
2288 | if (sio_data->beep_pin) { |
2289 | err = sysfs_create_file(&dev->kobj, | |
2290 | it87_attributes_fan_beep[i]); | |
2291 | if (err) | |
62a1d05f | 2292 | goto error; |
d9b327c3 JD |
2293 | if (!fan_beep_need_rw) |
2294 | continue; | |
2295 | ||
4a0d71cf GR |
2296 | /* |
2297 | * As we have a single beep enable bit for all fans, | |
d9b327c3 | 2298 | * only the first enabled fan has a writable attribute |
4a0d71cf GR |
2299 | * for it. |
2300 | */ | |
d9b327c3 JD |
2301 | if (sysfs_chmod_file(&dev->kobj, |
2302 | it87_attributes_fan_beep[i], | |
2303 | S_IRUGO | S_IWUSR)) | |
2304 | dev_dbg(dev, "chmod +w fan%d_beep failed\n", | |
2305 | i + 1); | |
2306 | fan_beep_need_rw = 0; | |
2307 | } | |
17d648bf JD |
2308 | } |
2309 | ||
1da177e4 | 2310 | if (enable_pwm_interface) { |
723a0aa0 JD |
2311 | for (i = 0; i < 3; i++) { |
2312 | if (sio_data->skip_pwm & (1 << i)) | |
2313 | continue; | |
2314 | err = sysfs_create_group(&dev->kobj, | |
2315 | &it87_group_pwm[i]); | |
2316 | if (err) | |
62a1d05f | 2317 | goto error; |
4f3f51bc JD |
2318 | |
2319 | if (!has_old_autopwm(data)) | |
2320 | continue; | |
2321 | err = sysfs_create_group(&dev->kobj, | |
2322 | &it87_group_autopwm[i]); | |
2323 | if (err) | |
62a1d05f | 2324 | goto error; |
98dd22c3 | 2325 | } |
1da177e4 LT |
2326 | } |
2327 | ||
895ff267 | 2328 | if (!sio_data->skip_vid) { |
303760b4 | 2329 | data->vrm = vid_which_vrm(); |
87673dd7 | 2330 | /* VID reading from Super-I/O config space if available */ |
b74f3fdd | 2331 | data->vid = sio_data->vid_value; |
6a8d7acf JD |
2332 | err = sysfs_create_group(&dev->kobj, &it87_group_vid); |
2333 | if (err) | |
62a1d05f | 2334 | goto error; |
87808be4 JD |
2335 | } |
2336 | ||
738e5e05 | 2337 | /* Export labels for internal sensors */ |
c145d5c6 | 2338 | for (i = 0; i < 4; i++) { |
738e5e05 JD |
2339 | if (!(sio_data->internal & (1 << i))) |
2340 | continue; | |
2341 | err = sysfs_create_file(&dev->kobj, | |
2342 | it87_attributes_label[i]); | |
2343 | if (err) | |
62a1d05f | 2344 | goto error; |
738e5e05 JD |
2345 | } |
2346 | ||
1beeffe4 TJ |
2347 | data->hwmon_dev = hwmon_device_register(dev); |
2348 | if (IS_ERR(data->hwmon_dev)) { | |
2349 | err = PTR_ERR(data->hwmon_dev); | |
62a1d05f | 2350 | goto error; |
1da177e4 LT |
2351 | } |
2352 | ||
2353 | return 0; | |
2354 | ||
62a1d05f | 2355 | error: |
723a0aa0 | 2356 | it87_remove_files(dev); |
1da177e4 LT |
2357 | return err; |
2358 | } | |
2359 | ||
281dfd0b | 2360 | static int it87_remove(struct platform_device *pdev) |
1da177e4 | 2361 | { |
b74f3fdd | 2362 | struct it87_data *data = platform_get_drvdata(pdev); |
1da177e4 | 2363 | |
1beeffe4 | 2364 | hwmon_device_unregister(data->hwmon_dev); |
723a0aa0 | 2365 | it87_remove_files(&pdev->dev); |
943b0830 | 2366 | |
1da177e4 LT |
2367 | return 0; |
2368 | } | |
2369 | ||
4a0d71cf GR |
2370 | /* |
2371 | * Must be called with data->update_lock held, except during initialization. | |
2372 | * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks, | |
2373 | * would slow down the IT87 access and should not be necessary. | |
2374 | */ | |
b74f3fdd | 2375 | static int it87_read_value(struct it87_data *data, u8 reg) |
1da177e4 | 2376 | { |
b74f3fdd | 2377 | outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET); |
2378 | return inb_p(data->addr + IT87_DATA_REG_OFFSET); | |
1da177e4 LT |
2379 | } |
2380 | ||
4a0d71cf GR |
2381 | /* |
2382 | * Must be called with data->update_lock held, except during initialization. | |
2383 | * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks, | |
2384 | * would slow down the IT87 access and should not be necessary. | |
2385 | */ | |
b74f3fdd | 2386 | static void it87_write_value(struct it87_data *data, u8 reg, u8 value) |
1da177e4 | 2387 | { |
b74f3fdd | 2388 | outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET); |
2389 | outb_p(value, data->addr + IT87_DATA_REG_OFFSET); | |
1da177e4 LT |
2390 | } |
2391 | ||
2392 | /* Return 1 if and only if the PWM interface is safe to use */ | |
6c931ae1 | 2393 | static int it87_check_pwm(struct device *dev) |
1da177e4 | 2394 | { |
b74f3fdd | 2395 | struct it87_data *data = dev_get_drvdata(dev); |
4a0d71cf GR |
2396 | /* |
2397 | * Some BIOSes fail to correctly configure the IT87 fans. All fans off | |
1da177e4 | 2398 | * and polarity set to active low is sign that this is the case so we |
4a0d71cf GR |
2399 | * disable pwm control to protect the user. |
2400 | */ | |
b74f3fdd | 2401 | int tmp = it87_read_value(data, IT87_REG_FAN_CTL); |
1da177e4 LT |
2402 | if ((tmp & 0x87) == 0) { |
2403 | if (fix_pwm_polarity) { | |
4a0d71cf GR |
2404 | /* |
2405 | * The user asks us to attempt a chip reconfiguration. | |
1da177e4 | 2406 | * This means switching to active high polarity and |
4a0d71cf GR |
2407 | * inverting all fan speed values. |
2408 | */ | |
1da177e4 LT |
2409 | int i; |
2410 | u8 pwm[3]; | |
2411 | ||
2412 | for (i = 0; i < 3; i++) | |
b74f3fdd | 2413 | pwm[i] = it87_read_value(data, |
1da177e4 LT |
2414 | IT87_REG_PWM(i)); |
2415 | ||
4a0d71cf GR |
2416 | /* |
2417 | * If any fan is in automatic pwm mode, the polarity | |
1da177e4 LT |
2418 | * might be correct, as suspicious as it seems, so we |
2419 | * better don't change anything (but still disable the | |
4a0d71cf GR |
2420 | * PWM interface). |
2421 | */ | |
1da177e4 | 2422 | if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) { |
1d9bcf6a GR |
2423 | dev_info(dev, |
2424 | "Reconfiguring PWM to active high polarity\n"); | |
b74f3fdd | 2425 | it87_write_value(data, IT87_REG_FAN_CTL, |
1da177e4 LT |
2426 | tmp | 0x87); |
2427 | for (i = 0; i < 3; i++) | |
b74f3fdd | 2428 | it87_write_value(data, |
1da177e4 LT |
2429 | IT87_REG_PWM(i), |
2430 | 0x7f & ~pwm[i]); | |
2431 | return 1; | |
2432 | } | |
2433 | ||
1d9bcf6a GR |
2434 | dev_info(dev, |
2435 | "PWM configuration is too broken to be fixed\n"); | |
1da177e4 LT |
2436 | } |
2437 | ||
1d9bcf6a GR |
2438 | dev_info(dev, |
2439 | "Detected broken BIOS defaults, disabling PWM interface\n"); | |
1da177e4 LT |
2440 | return 0; |
2441 | } else if (fix_pwm_polarity) { | |
1d9bcf6a GR |
2442 | dev_info(dev, |
2443 | "PWM configuration looks sane, won't touch\n"); | |
1da177e4 LT |
2444 | } |
2445 | ||
2446 | return 1; | |
2447 | } | |
2448 | ||
2449 | /* Called when we have found a new IT87. */ | |
6c931ae1 | 2450 | static void it87_init_device(struct platform_device *pdev) |
1da177e4 | 2451 | { |
a8b3a3a5 | 2452 | struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev); |
b74f3fdd | 2453 | struct it87_data *data = platform_get_drvdata(pdev); |
1da177e4 | 2454 | int tmp, i; |
591ec650 | 2455 | u8 mask; |
1da177e4 | 2456 | |
4a0d71cf GR |
2457 | /* |
2458 | * For each PWM channel: | |
b99883dc JD |
2459 | * - If it is in automatic mode, setting to manual mode should set |
2460 | * the fan to full speed by default. | |
2461 | * - If it is in manual mode, we need a mapping to temperature | |
2462 | * channels to use when later setting to automatic mode later. | |
2463 | * Use a 1:1 mapping by default (we are clueless.) | |
2464 | * In both cases, the value can (and should) be changed by the user | |
6229cdb2 JD |
2465 | * prior to switching to a different mode. |
2466 | * Note that this is no longer needed for the IT8721F and later, as | |
2467 | * these have separate registers for the temperature mapping and the | |
4a0d71cf GR |
2468 | * manual duty cycle. |
2469 | */ | |
1da177e4 | 2470 | for (i = 0; i < 3; i++) { |
b99883dc JD |
2471 | data->pwm_temp_map[i] = i; |
2472 | data->pwm_duty[i] = 0x7f; /* Full speed */ | |
4f3f51bc | 2473 | data->auto_pwm[i][3] = 0x7f; /* Full speed, hard-coded */ |
1da177e4 LT |
2474 | } |
2475 | ||
4a0d71cf GR |
2476 | /* |
2477 | * Some chips seem to have default value 0xff for all limit | |
c5df9b7a JD |
2478 | * registers. For low voltage limits it makes no sense and triggers |
2479 | * alarms, so change to 0 instead. For high temperature limits, it | |
2480 | * means -1 degree C, which surprisingly doesn't trigger an alarm, | |
4a0d71cf GR |
2481 | * but is still confusing, so change to 127 degrees C. |
2482 | */ | |
c5df9b7a | 2483 | for (i = 0; i < 8; i++) { |
b74f3fdd | 2484 | tmp = it87_read_value(data, IT87_REG_VIN_MIN(i)); |
c5df9b7a | 2485 | if (tmp == 0xff) |
b74f3fdd | 2486 | it87_write_value(data, IT87_REG_VIN_MIN(i), 0); |
c5df9b7a JD |
2487 | } |
2488 | for (i = 0; i < 3; i++) { | |
b74f3fdd | 2489 | tmp = it87_read_value(data, IT87_REG_TEMP_HIGH(i)); |
c5df9b7a | 2490 | if (tmp == 0xff) |
b74f3fdd | 2491 | it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127); |
c5df9b7a JD |
2492 | } |
2493 | ||
4a0d71cf GR |
2494 | /* |
2495 | * Temperature channels are not forcibly enabled, as they can be | |
a00afb97 JD |
2496 | * set to two different sensor types and we can't guess which one |
2497 | * is correct for a given system. These channels can be enabled at | |
4a0d71cf GR |
2498 | * run-time through the temp{1-3}_type sysfs accessors if needed. |
2499 | */ | |
1da177e4 LT |
2500 | |
2501 | /* Check if voltage monitors are reset manually or by some reason */ | |
b74f3fdd | 2502 | tmp = it87_read_value(data, IT87_REG_VIN_ENABLE); |
1da177e4 LT |
2503 | if ((tmp & 0xff) == 0) { |
2504 | /* Enable all voltage monitors */ | |
b74f3fdd | 2505 | it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff); |
1da177e4 LT |
2506 | } |
2507 | ||
2508 | /* Check if tachometers are reset manually or by some reason */ | |
591ec650 | 2509 | mask = 0x70 & ~(sio_data->skip_fan << 4); |
b74f3fdd | 2510 | data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL); |
591ec650 | 2511 | if ((data->fan_main_ctrl & mask) == 0) { |
1da177e4 | 2512 | /* Enable all fan tachometers */ |
591ec650 | 2513 | data->fan_main_ctrl |= mask; |
5f2dc798 JD |
2514 | it87_write_value(data, IT87_REG_FAN_MAIN_CTRL, |
2515 | data->fan_main_ctrl); | |
1da177e4 | 2516 | } |
9060f8bd | 2517 | data->has_fan = (data->fan_main_ctrl >> 4) & 0x07; |
1da177e4 | 2518 | |
9faf28ca GR |
2519 | /* Set tachometers to 16-bit mode if needed */ |
2520 | if (has_fan16_config(data)) { | |
b74f3fdd | 2521 | tmp = it87_read_value(data, IT87_REG_FAN_16BIT); |
9060f8bd | 2522 | if (~tmp & 0x07 & data->has_fan) { |
b74f3fdd | 2523 | dev_dbg(&pdev->dev, |
17d648bf | 2524 | "Setting fan1-3 to 16-bit mode\n"); |
b74f3fdd | 2525 | it87_write_value(data, IT87_REG_FAN_16BIT, |
17d648bf JD |
2526 | tmp | 0x07); |
2527 | } | |
9faf28ca GR |
2528 | } |
2529 | ||
2530 | /* Check for additional fans */ | |
2531 | if (has_five_fans(data)) { | |
2532 | tmp = it87_read_value(data, IT87_REG_FAN_16BIT); | |
2533 | if (tmp & (1 << 4)) | |
2534 | data->has_fan |= (1 << 3); /* fan4 enabled */ | |
2535 | if (tmp & (1 << 5)) | |
2536 | data->has_fan |= (1 << 4); /* fan5 enabled */ | |
17d648bf JD |
2537 | } |
2538 | ||
591ec650 JD |
2539 | /* Fan input pins may be used for alternative functions */ |
2540 | data->has_fan &= ~sio_data->skip_fan; | |
2541 | ||
1da177e4 | 2542 | /* Start monitoring */ |
b74f3fdd | 2543 | it87_write_value(data, IT87_REG_CONFIG, |
41002f8d | 2544 | (it87_read_value(data, IT87_REG_CONFIG) & 0x3e) |
1da177e4 LT |
2545 | | (update_vbat ? 0x41 : 0x01)); |
2546 | } | |
2547 | ||
b99883dc JD |
2548 | static void it87_update_pwm_ctrl(struct it87_data *data, int nr) |
2549 | { | |
2550 | data->pwm_ctrl[nr] = it87_read_value(data, IT87_REG_PWM(nr)); | |
16b5dda2 | 2551 | if (has_newer_autopwm(data)) { |
b99883dc | 2552 | data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03; |
6229cdb2 JD |
2553 | data->pwm_duty[nr] = it87_read_value(data, |
2554 | IT87_REG_PWM_DUTY(nr)); | |
2555 | } else { | |
2556 | if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */ | |
2557 | data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03; | |
2558 | else /* Manual mode */ | |
2559 | data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f; | |
2560 | } | |
4f3f51bc JD |
2561 | |
2562 | if (has_old_autopwm(data)) { | |
2563 | int i; | |
2564 | ||
2565 | for (i = 0; i < 5 ; i++) | |
2566 | data->auto_temp[nr][i] = it87_read_value(data, | |
2567 | IT87_REG_AUTO_TEMP(nr, i)); | |
2568 | for (i = 0; i < 3 ; i++) | |
2569 | data->auto_pwm[nr][i] = it87_read_value(data, | |
2570 | IT87_REG_AUTO_PWM(nr, i)); | |
2571 | } | |
b99883dc JD |
2572 | } |
2573 | ||
1da177e4 LT |
2574 | static struct it87_data *it87_update_device(struct device *dev) |
2575 | { | |
b74f3fdd | 2576 | struct it87_data *data = dev_get_drvdata(dev); |
1da177e4 LT |
2577 | int i; |
2578 | ||
9a61bf63 | 2579 | mutex_lock(&data->update_lock); |
1da177e4 LT |
2580 | |
2581 | if (time_after(jiffies, data->last_updated + HZ + HZ / 2) | |
2582 | || !data->valid) { | |
1da177e4 | 2583 | if (update_vbat) { |
4a0d71cf GR |
2584 | /* |
2585 | * Cleared after each update, so reenable. Value | |
2586 | * returned by this read will be previous value | |
2587 | */ | |
b74f3fdd | 2588 | it87_write_value(data, IT87_REG_CONFIG, |
5f2dc798 | 2589 | it87_read_value(data, IT87_REG_CONFIG) | 0x40); |
1da177e4 LT |
2590 | } |
2591 | for (i = 0; i <= 7; i++) { | |
929c6a56 | 2592 | data->in[i][0] = |
5f2dc798 | 2593 | it87_read_value(data, IT87_REG_VIN(i)); |
929c6a56 | 2594 | data->in[i][1] = |
5f2dc798 | 2595 | it87_read_value(data, IT87_REG_VIN_MIN(i)); |
929c6a56 | 2596 | data->in[i][2] = |
5f2dc798 | 2597 | it87_read_value(data, IT87_REG_VIN_MAX(i)); |
1da177e4 | 2598 | } |
3543a53f | 2599 | /* in8 (battery) has no limit registers */ |
929c6a56 | 2600 | data->in[8][0] = it87_read_value(data, IT87_REG_VIN(8)); |
c145d5c6 RM |
2601 | if (data->type == it8603) |
2602 | data->in[9][0] = it87_read_value(data, 0x2f); | |
1da177e4 | 2603 | |
c7f1f716 | 2604 | for (i = 0; i < 5; i++) { |
9060f8bd JD |
2605 | /* Skip disabled fans */ |
2606 | if (!(data->has_fan & (1 << i))) | |
2607 | continue; | |
2608 | ||
e1169ba0 | 2609 | data->fan[i][1] = |
5f2dc798 | 2610 | it87_read_value(data, IT87_REG_FAN_MIN[i]); |
e1169ba0 | 2611 | data->fan[i][0] = it87_read_value(data, |
c7f1f716 | 2612 | IT87_REG_FAN[i]); |
17d648bf | 2613 | /* Add high byte if in 16-bit mode */ |
0475169c | 2614 | if (has_16bit_fans(data)) { |
e1169ba0 | 2615 | data->fan[i][0] |= it87_read_value(data, |
c7f1f716 | 2616 | IT87_REG_FANX[i]) << 8; |
e1169ba0 | 2617 | data->fan[i][1] |= it87_read_value(data, |
c7f1f716 | 2618 | IT87_REG_FANX_MIN[i]) << 8; |
17d648bf | 2619 | } |
1da177e4 LT |
2620 | } |
2621 | for (i = 0; i < 3; i++) { | |
4573acbc GR |
2622 | if (!(data->has_temp & (1 << i))) |
2623 | continue; | |
60ca385a | 2624 | data->temp[i][0] = |
5f2dc798 | 2625 | it87_read_value(data, IT87_REG_TEMP(i)); |
60ca385a | 2626 | data->temp[i][1] = |
5f2dc798 | 2627 | it87_read_value(data, IT87_REG_TEMP_LOW(i)); |
60ca385a GR |
2628 | data->temp[i][2] = |
2629 | it87_read_value(data, IT87_REG_TEMP_HIGH(i)); | |
161d898a GR |
2630 | if (has_temp_offset(data)) |
2631 | data->temp[i][3] = | |
2632 | it87_read_value(data, | |
2633 | IT87_REG_TEMP_OFFSET[i]); | |
1da177e4 LT |
2634 | } |
2635 | ||
17d648bf | 2636 | /* Newer chips don't have clock dividers */ |
0475169c | 2637 | if ((data->has_fan & 0x07) && !has_16bit_fans(data)) { |
b74f3fdd | 2638 | i = it87_read_value(data, IT87_REG_FAN_DIV); |
17d648bf JD |
2639 | data->fan_div[0] = i & 0x07; |
2640 | data->fan_div[1] = (i >> 3) & 0x07; | |
2641 | data->fan_div[2] = (i & 0x40) ? 3 : 1; | |
2642 | } | |
1da177e4 LT |
2643 | |
2644 | data->alarms = | |
b74f3fdd | 2645 | it87_read_value(data, IT87_REG_ALARM1) | |
2646 | (it87_read_value(data, IT87_REG_ALARM2) << 8) | | |
2647 | (it87_read_value(data, IT87_REG_ALARM3) << 16); | |
d9b327c3 | 2648 | data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE); |
b99883dc | 2649 | |
b74f3fdd | 2650 | data->fan_main_ctrl = it87_read_value(data, |
2651 | IT87_REG_FAN_MAIN_CTRL); | |
2652 | data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL); | |
b99883dc JD |
2653 | for (i = 0; i < 3; i++) |
2654 | it87_update_pwm_ctrl(data, i); | |
b74f3fdd | 2655 | |
2656 | data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE); | |
19529784 | 2657 | data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA); |
4a0d71cf GR |
2658 | /* |
2659 | * The IT8705F does not have VID capability. | |
2660 | * The IT8718F and later don't use IT87_REG_VID for the | |
2661 | * same purpose. | |
2662 | */ | |
17d648bf | 2663 | if (data->type == it8712 || data->type == it8716) { |
b74f3fdd | 2664 | data->vid = it87_read_value(data, IT87_REG_VID); |
4a0d71cf GR |
2665 | /* |
2666 | * The older IT8712F revisions had only 5 VID pins, | |
2667 | * but we assume it is always safe to read 6 bits. | |
2668 | */ | |
17d648bf | 2669 | data->vid &= 0x3f; |
1da177e4 LT |
2670 | } |
2671 | data->last_updated = jiffies; | |
2672 | data->valid = 1; | |
2673 | } | |
2674 | ||
9a61bf63 | 2675 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
2676 | |
2677 | return data; | |
2678 | } | |
2679 | ||
b74f3fdd | 2680 | static int __init it87_device_add(unsigned short address, |
2681 | const struct it87_sio_data *sio_data) | |
2682 | { | |
2683 | struct resource res = { | |
87b4b663 BH |
2684 | .start = address + IT87_EC_OFFSET, |
2685 | .end = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1, | |
b74f3fdd | 2686 | .name = DRVNAME, |
2687 | .flags = IORESOURCE_IO, | |
2688 | }; | |
2689 | int err; | |
2690 | ||
b9acb64a JD |
2691 | err = acpi_check_resource_conflict(&res); |
2692 | if (err) | |
2693 | goto exit; | |
2694 | ||
b74f3fdd | 2695 | pdev = platform_device_alloc(DRVNAME, address); |
2696 | if (!pdev) { | |
2697 | err = -ENOMEM; | |
a8ca1037 | 2698 | pr_err("Device allocation failed\n"); |
b74f3fdd | 2699 | goto exit; |
2700 | } | |
2701 | ||
2702 | err = platform_device_add_resources(pdev, &res, 1); | |
2703 | if (err) { | |
a8ca1037 | 2704 | pr_err("Device resource addition failed (%d)\n", err); |
b74f3fdd | 2705 | goto exit_device_put; |
2706 | } | |
2707 | ||
2708 | err = platform_device_add_data(pdev, sio_data, | |
2709 | sizeof(struct it87_sio_data)); | |
2710 | if (err) { | |
a8ca1037 | 2711 | pr_err("Platform data allocation failed\n"); |
b74f3fdd | 2712 | goto exit_device_put; |
2713 | } | |
2714 | ||
2715 | err = platform_device_add(pdev); | |
2716 | if (err) { | |
a8ca1037 | 2717 | pr_err("Device addition failed (%d)\n", err); |
b74f3fdd | 2718 | goto exit_device_put; |
2719 | } | |
2720 | ||
2721 | return 0; | |
2722 | ||
2723 | exit_device_put: | |
2724 | platform_device_put(pdev); | |
2725 | exit: | |
2726 | return err; | |
2727 | } | |
2728 | ||
1da177e4 LT |
2729 | static int __init sm_it87_init(void) |
2730 | { | |
b74f3fdd | 2731 | int err; |
5f2dc798 | 2732 | unsigned short isa_address = 0; |
b74f3fdd | 2733 | struct it87_sio_data sio_data; |
2734 | ||
98dd22c3 | 2735 | memset(&sio_data, 0, sizeof(struct it87_sio_data)); |
b74f3fdd | 2736 | err = it87_find(&isa_address, &sio_data); |
2737 | if (err) | |
2738 | return err; | |
2739 | err = platform_driver_register(&it87_driver); | |
2740 | if (err) | |
2741 | return err; | |
fde09509 | 2742 | |
b74f3fdd | 2743 | err = it87_device_add(isa_address, &sio_data); |
5f2dc798 | 2744 | if (err) { |
b74f3fdd | 2745 | platform_driver_unregister(&it87_driver); |
2746 | return err; | |
2747 | } | |
2748 | ||
2749 | return 0; | |
1da177e4 LT |
2750 | } |
2751 | ||
2752 | static void __exit sm_it87_exit(void) | |
2753 | { | |
b74f3fdd | 2754 | platform_device_unregister(pdev); |
2755 | platform_driver_unregister(&it87_driver); | |
1da177e4 LT |
2756 | } |
2757 | ||
2758 | ||
7c81c60f | 2759 | MODULE_AUTHOR("Chris Gauthron, Jean Delvare <jdelvare@suse.de>"); |
44c1bcd4 | 2760 | MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver"); |
1da177e4 LT |
2761 | module_param(update_vbat, bool, 0); |
2762 | MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value"); | |
2763 | module_param(fix_pwm_polarity, bool, 0); | |
5f2dc798 JD |
2764 | MODULE_PARM_DESC(fix_pwm_polarity, |
2765 | "Force PWM polarity to active high (DANGEROUS)"); | |
1da177e4 LT |
2766 | MODULE_LICENSE("GPL"); |
2767 | ||
2768 | module_init(sm_it87_init); | |
2769 | module_exit(sm_it87_exit); |