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hwmon: (it87) Convert to use devm_kzalloc and devm_request_region
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1da177e4 1/*
5f2dc798
JD
2 * it87.c - Part of lm_sensors, Linux kernel modules for hardware
3 * monitoring.
4 *
5 * The IT8705F is an LPC-based Super I/O part that contains UARTs, a
6 * parallel port, an IR port, a MIDI port, a floppy controller, etc., in
7 * addition to an Environment Controller (Enhanced Hardware Monitor and
8 * Fan Controller)
9 *
10 * This driver supports only the Environment Controller in the IT8705F and
11 * similar parts. The other devices are supported by different drivers.
12 *
13 * Supports: IT8705F Super I/O chip w/LPC interface
14 * IT8712F Super I/O chip w/LPC interface
15 * IT8716F Super I/O chip w/LPC interface
16 * IT8718F Super I/O chip w/LPC interface
17 * IT8720F Super I/O chip w/LPC interface
44c1bcd4 18 * IT8721F Super I/O chip w/LPC interface
5f2dc798 19 * IT8726F Super I/O chip w/LPC interface
16b5dda2 20 * IT8728F Super I/O chip w/LPC interface
44c1bcd4 21 * IT8758E Super I/O chip w/LPC interface
0531d98b
GR
22 * IT8782F Super I/O chip w/LPC interface
23 * IT8783E/F Super I/O chip w/LPC interface
5f2dc798
JD
24 * Sis950 A clone of the IT8705F
25 *
26 * Copyright (C) 2001 Chris Gauthron
27 * Copyright (C) 2005-2010 Jean Delvare <khali@linux-fr.org>
28 *
29 * This program is free software; you can redistribute it and/or modify
30 * it under the terms of the GNU General Public License as published by
31 * the Free Software Foundation; either version 2 of the License, or
32 * (at your option) any later version.
33 *
34 * This program is distributed in the hope that it will be useful,
35 * but WITHOUT ANY WARRANTY; without even the implied warranty of
36 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
37 * GNU General Public License for more details.
38 *
39 * You should have received a copy of the GNU General Public License
40 * along with this program; if not, write to the Free Software
41 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
42 */
1da177e4 43
a8ca1037
JP
44#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
45
1da177e4
LT
46#include <linux/module.h>
47#include <linux/init.h>
48#include <linux/slab.h>
49#include <linux/jiffies.h>
b74f3fdd 50#include <linux/platform_device.h>
943b0830 51#include <linux/hwmon.h>
303760b4
JD
52#include <linux/hwmon-sysfs.h>
53#include <linux/hwmon-vid.h>
943b0830 54#include <linux/err.h>
9a61bf63 55#include <linux/mutex.h>
87808be4 56#include <linux/sysfs.h>
98dd22c3
JD
57#include <linux/string.h>
58#include <linux/dmi.h>
b9acb64a 59#include <linux/acpi.h>
6055fae8 60#include <linux/io.h>
1da177e4 61
b74f3fdd 62#define DRVNAME "it87"
1da177e4 63
0531d98b
GR
64enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8782,
65 it8783 };
1da177e4 66
67b671bc
JD
67static unsigned short force_id;
68module_param(force_id, ushort, 0);
69MODULE_PARM_DESC(force_id, "Override the detected device ID");
70
b74f3fdd 71static struct platform_device *pdev;
72
1da177e4
LT
73#define REG 0x2e /* The register to read/write */
74#define DEV 0x07 /* Register: Logical device select */
75#define VAL 0x2f /* The value to read/write */
76#define PME 0x04 /* The device with the fan registers in it */
b4da93e4
JMS
77
78/* The device with the IT8718F/IT8720F VID value in it */
79#define GPIO 0x07
80
1da177e4
LT
81#define DEVID 0x20 /* Register: Device ID */
82#define DEVREV 0x22 /* Register: Device Revision */
83
5b0380c9 84static inline int superio_inb(int reg)
1da177e4
LT
85{
86 outb(reg, REG);
87 return inb(VAL);
88}
89
5b0380c9 90static inline void superio_outb(int reg, int val)
436cad2a
JD
91{
92 outb(reg, REG);
93 outb(val, VAL);
94}
95
1da177e4
LT
96static int superio_inw(int reg)
97{
98 int val;
99 outb(reg++, REG);
100 val = inb(VAL) << 8;
101 outb(reg, REG);
102 val |= inb(VAL);
103 return val;
104}
105
5b0380c9 106static inline void superio_select(int ldn)
1da177e4
LT
107{
108 outb(DEV, REG);
87673dd7 109 outb(ldn, VAL);
1da177e4
LT
110}
111
5b0380c9 112static inline int superio_enter(void)
1da177e4 113{
5b0380c9
NG
114 /*
115 * Try to reserve REG and REG + 1 for exclusive access.
116 */
117 if (!request_muxed_region(REG, 2, DRVNAME))
118 return -EBUSY;
119
1da177e4
LT
120 outb(0x87, REG);
121 outb(0x01, REG);
122 outb(0x55, REG);
123 outb(0x55, REG);
5b0380c9 124 return 0;
1da177e4
LT
125}
126
5b0380c9 127static inline void superio_exit(void)
1da177e4
LT
128{
129 outb(0x02, REG);
130 outb(0x02, VAL);
5b0380c9 131 release_region(REG, 2);
1da177e4
LT
132}
133
87673dd7 134/* Logical device 4 registers */
1da177e4
LT
135#define IT8712F_DEVID 0x8712
136#define IT8705F_DEVID 0x8705
17d648bf 137#define IT8716F_DEVID 0x8716
87673dd7 138#define IT8718F_DEVID 0x8718
b4da93e4 139#define IT8720F_DEVID 0x8720
44c1bcd4 140#define IT8721F_DEVID 0x8721
08a8f6e9 141#define IT8726F_DEVID 0x8726
16b5dda2 142#define IT8728F_DEVID 0x8728
0531d98b
GR
143#define IT8782F_DEVID 0x8782
144#define IT8783E_DEVID 0x8783
1da177e4
LT
145#define IT87_ACT_REG 0x30
146#define IT87_BASE_REG 0x60
147
87673dd7 148/* Logical device 7 registers (IT8712F and later) */
0531d98b 149#define IT87_SIO_GPIO1_REG 0x25
895ff267 150#define IT87_SIO_GPIO3_REG 0x27
591ec650 151#define IT87_SIO_GPIO5_REG 0x29
0531d98b 152#define IT87_SIO_PINX1_REG 0x2a /* Pin selection */
87673dd7 153#define IT87_SIO_PINX2_REG 0x2c /* Pin selection */
0531d98b 154#define IT87_SIO_SPI_REG 0xef /* SPI function pin select */
87673dd7 155#define IT87_SIO_VID_REG 0xfc /* VID value */
d9b327c3 156#define IT87_SIO_BEEP_PIN_REG 0xf6 /* Beep pin mapping */
87673dd7 157
1da177e4 158/* Update battery voltage after every reading if true */
90ab5ee9 159static bool update_vbat;
1da177e4
LT
160
161/* Not all BIOSes properly configure the PWM registers */
90ab5ee9 162static bool fix_pwm_polarity;
1da177e4 163
1da177e4
LT
164/* Many IT87 constants specified below */
165
166/* Length of ISA address segment */
167#define IT87_EXTENT 8
168
87b4b663
BH
169/* Length of ISA address segment for Environmental Controller */
170#define IT87_EC_EXTENT 2
171
172/* Offset of EC registers from ISA base address */
173#define IT87_EC_OFFSET 5
174
175/* Where are the ISA address/data registers relative to the EC base address */
176#define IT87_ADDR_REG_OFFSET 0
177#define IT87_DATA_REG_OFFSET 1
1da177e4
LT
178
179/*----- The IT87 registers -----*/
180
181#define IT87_REG_CONFIG 0x00
182
183#define IT87_REG_ALARM1 0x01
184#define IT87_REG_ALARM2 0x02
185#define IT87_REG_ALARM3 0x03
186
4a0d71cf
GR
187/*
188 * The IT8718F and IT8720F have the VID value in a different register, in
189 * Super-I/O configuration space.
190 */
1da177e4 191#define IT87_REG_VID 0x0a
4a0d71cf
GR
192/*
193 * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
194 * for fan divisors. Later IT8712F revisions must use 16-bit tachometer
195 * mode.
196 */
1da177e4 197#define IT87_REG_FAN_DIV 0x0b
17d648bf 198#define IT87_REG_FAN_16BIT 0x0c
1da177e4
LT
199
200/* Monitors: 9 voltage (0 to 7, battery), 3 temp (1 to 3), 3 fan (1 to 3) */
201
c7f1f716
JD
202static const u8 IT87_REG_FAN[] = { 0x0d, 0x0e, 0x0f, 0x80, 0x82 };
203static const u8 IT87_REG_FAN_MIN[] = { 0x10, 0x11, 0x12, 0x84, 0x86 };
204static const u8 IT87_REG_FANX[] = { 0x18, 0x19, 0x1a, 0x81, 0x83 };
205static const u8 IT87_REG_FANX_MIN[] = { 0x1b, 0x1c, 0x1d, 0x85, 0x87 };
1da177e4
LT
206#define IT87_REG_FAN_MAIN_CTRL 0x13
207#define IT87_REG_FAN_CTL 0x14
208#define IT87_REG_PWM(nr) (0x15 + (nr))
6229cdb2 209#define IT87_REG_PWM_DUTY(nr) (0x63 + (nr) * 8)
1da177e4
LT
210
211#define IT87_REG_VIN(nr) (0x20 + (nr))
212#define IT87_REG_TEMP(nr) (0x29 + (nr))
213
214#define IT87_REG_VIN_MAX(nr) (0x30 + (nr) * 2)
215#define IT87_REG_VIN_MIN(nr) (0x31 + (nr) * 2)
216#define IT87_REG_TEMP_HIGH(nr) (0x40 + (nr) * 2)
217#define IT87_REG_TEMP_LOW(nr) (0x41 + (nr) * 2)
218
1da177e4
LT
219#define IT87_REG_VIN_ENABLE 0x50
220#define IT87_REG_TEMP_ENABLE 0x51
d9b327c3 221#define IT87_REG_BEEP_ENABLE 0x5c
1da177e4
LT
222
223#define IT87_REG_CHIPID 0x58
224
4f3f51bc
JD
225#define IT87_REG_AUTO_TEMP(nr, i) (0x60 + (nr) * 8 + (i))
226#define IT87_REG_AUTO_PWM(nr, i) (0x65 + (nr) * 8 + (i))
227
1da177e4 228
b74f3fdd 229struct it87_sio_data {
230 enum chips type;
231 /* Values read from Super-I/O config space */
0475169c 232 u8 revision;
b74f3fdd 233 u8 vid_value;
d9b327c3 234 u8 beep_pin;
738e5e05 235 u8 internal; /* Internal sensors can be labeled */
591ec650 236 /* Features skipped based on config or DMI */
9172b5d1 237 u16 skip_in;
895ff267 238 u8 skip_vid;
591ec650 239 u8 skip_fan;
98dd22c3 240 u8 skip_pwm;
b74f3fdd 241};
242
4a0d71cf
GR
243/*
244 * For each registered chip, we need to keep some data in memory.
245 * The structure is dynamically allocated.
246 */
1da177e4 247struct it87_data {
1beeffe4 248 struct device *hwmon_dev;
1da177e4 249 enum chips type;
0475169c 250 u8 revision;
1da177e4 251
b74f3fdd 252 unsigned short addr;
253 const char *name;
9a61bf63 254 struct mutex update_lock;
1da177e4
LT
255 char valid; /* !=0 if following fields are valid */
256 unsigned long last_updated; /* In jiffies */
257
44c1bcd4 258 u16 in_scaled; /* Internal voltage sensors are scaled */
1da177e4 259 u8 in[9]; /* Register value */
3543a53f
JD
260 u8 in_max[8]; /* Register value */
261 u8 in_min[8]; /* Register value */
9060f8bd 262 u8 has_fan; /* Bitfield, fans enabled */
c7f1f716
JD
263 u16 fan[5]; /* Register values, possibly combined */
264 u16 fan_min[5]; /* Register values, possibly combined */
e267d250
JD
265 s8 temp[3]; /* Register value */
266 s8 temp_high[3]; /* Register value */
267 s8 temp_low[3]; /* Register value */
1da177e4
LT
268 u8 sensor; /* Register value */
269 u8 fan_div[3]; /* Register encoding, shifted right */
270 u8 vid; /* Register encoding, combined */
a7be58a1 271 u8 vrm;
1da177e4 272 u32 alarms; /* Register encoding, combined */
d9b327c3 273 u8 beeps; /* Register encoding */
1da177e4 274 u8 fan_main_ctrl; /* Register value */
f8d0c19a 275 u8 fan_ctl; /* Register value */
b99883dc 276
4a0d71cf
GR
277 /*
278 * The following 3 arrays correspond to the same registers up to
6229cdb2
JD
279 * the IT8720F. The meaning of bits 6-0 depends on the value of bit
280 * 7, and we want to preserve settings on mode changes, so we have
281 * to track all values separately.
282 * Starting with the IT8721F, the manual PWM duty cycles are stored
283 * in separate registers (8-bit values), so the separate tracking
284 * is no longer needed, but it is still done to keep the driver
4a0d71cf
GR
285 * simple.
286 */
b99883dc 287 u8 pwm_ctrl[3]; /* Register value */
6229cdb2 288 u8 pwm_duty[3]; /* Manual PWM value set by user */
b99883dc 289 u8 pwm_temp_map[3]; /* PWM to temp. chan. mapping (bits 1-0) */
4f3f51bc
JD
290
291 /* Automatic fan speed control registers */
292 u8 auto_pwm[3][4]; /* [nr][3] is hard-coded */
293 s8 auto_temp[3][5]; /* [nr][0] is point1_temp_hyst */
1da177e4 294};
0df6454d 295
16b5dda2
JD
296static inline int has_12mv_adc(const struct it87_data *data)
297{
298 /*
299 * IT8721F and later have a 12 mV ADC, also with internal scaling
300 * on selected inputs.
301 */
302 return data->type == it8721
303 || data->type == it8728;
304}
305
306static inline int has_newer_autopwm(const struct it87_data *data)
307{
308 /*
309 * IT8721F and later have separate registers for the temperature
310 * mapping and the manual duty cycle.
311 */
312 return data->type == it8721
313 || data->type == it8728;
314}
315
0531d98b 316static int adc_lsb(const struct it87_data *data, int nr)
44c1bcd4 317{
0531d98b
GR
318 int lsb = has_12mv_adc(data) ? 12 : 16;
319 if (data->in_scaled & (1 << nr))
320 lsb <<= 1;
321 return lsb;
322}
44c1bcd4 323
0531d98b
GR
324static u8 in_to_reg(const struct it87_data *data, int nr, long val)
325{
326 val = DIV_ROUND_CLOSEST(val, adc_lsb(data, nr));
44c1bcd4
JD
327 return SENSORS_LIMIT(val, 0, 255);
328}
329
330static int in_from_reg(const struct it87_data *data, int nr, int val)
331{
0531d98b 332 return val * adc_lsb(data, nr);
44c1bcd4 333}
0df6454d
JD
334
335static inline u8 FAN_TO_REG(long rpm, int div)
336{
337 if (rpm == 0)
338 return 255;
339 rpm = SENSORS_LIMIT(rpm, 1, 1000000);
340 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1,
341 254);
342}
343
344static inline u16 FAN16_TO_REG(long rpm)
345{
346 if (rpm == 0)
347 return 0xffff;
348 return SENSORS_LIMIT((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
349}
350
351#define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \
352 1350000 / ((val) * (div)))
353/* The divider is fixed to 2 in 16-bit mode */
354#define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \
355 1350000 / ((val) * 2))
356
357#define TEMP_TO_REG(val) (SENSORS_LIMIT(((val) < 0 ? (((val) - 500) / 1000) : \
358 ((val) + 500) / 1000), -128, 127))
359#define TEMP_FROM_REG(val) ((val) * 1000)
360
44c1bcd4
JD
361static u8 pwm_to_reg(const struct it87_data *data, long val)
362{
16b5dda2 363 if (has_newer_autopwm(data))
44c1bcd4
JD
364 return val;
365 else
366 return val >> 1;
367}
368
369static int pwm_from_reg(const struct it87_data *data, u8 reg)
370{
16b5dda2 371 if (has_newer_autopwm(data))
44c1bcd4
JD
372 return reg;
373 else
374 return (reg & 0x7f) << 1;
375}
376
0df6454d
JD
377
378static int DIV_TO_REG(int val)
379{
380 int answer = 0;
381 while (answer < 7 && (val >>= 1))
382 answer++;
383 return answer;
384}
385#define DIV_FROM_REG(val) (1 << (val))
386
387static const unsigned int pwm_freq[8] = {
388 48000000 / 128,
389 24000000 / 128,
390 12000000 / 128,
391 8000000 / 128,
392 6000000 / 128,
393 3000000 / 128,
394 1500000 / 128,
395 750000 / 128,
396};
1da177e4 397
0475169c
AP
398static inline int has_16bit_fans(const struct it87_data *data)
399{
4a0d71cf
GR
400 /*
401 * IT8705F Datasheet 0.4.1, 3h == Version G.
402 * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
403 * These are the first revisions with 16-bit tachometer support.
404 */
816d8c6a 405 return (data->type == it87 && data->revision >= 0x03)
859b9ef3 406 || (data->type == it8712 && data->revision >= 0x08)
0475169c 407 || data->type == it8716
b4da93e4 408 || data->type == it8718
44c1bcd4 409 || data->type == it8720
16b5dda2 410 || data->type == it8721
0531d98b
GR
411 || data->type == it8728
412 || data->type == it8782
413 || data->type == it8783;
0475169c 414}
1da177e4 415
4f3f51bc
JD
416static inline int has_old_autopwm(const struct it87_data *data)
417{
4a0d71cf
GR
418 /*
419 * The old automatic fan speed control interface is implemented
420 * by IT8705F chips up to revision F and IT8712F chips up to
421 * revision G.
422 */
4f3f51bc
JD
423 return (data->type == it87 && data->revision < 0x03)
424 || (data->type == it8712 && data->revision < 0x08);
425}
426
b74f3fdd 427static int it87_probe(struct platform_device *pdev);
d0546128 428static int __devexit it87_remove(struct platform_device *pdev);
1da177e4 429
b74f3fdd 430static int it87_read_value(struct it87_data *data, u8 reg);
431static void it87_write_value(struct it87_data *data, u8 reg, u8 value);
1da177e4 432static struct it87_data *it87_update_device(struct device *dev);
b74f3fdd 433static int it87_check_pwm(struct device *dev);
434static void it87_init_device(struct platform_device *pdev);
1da177e4
LT
435
436
b74f3fdd 437static struct platform_driver it87_driver = {
cdaf7934 438 .driver = {
87218842 439 .owner = THIS_MODULE,
b74f3fdd 440 .name = DRVNAME,
cdaf7934 441 },
b74f3fdd 442 .probe = it87_probe,
443 .remove = __devexit_p(it87_remove),
fde09509
JD
444};
445
20ad93d4
JD
446static ssize_t show_in(struct device *dev, struct device_attribute *attr,
447 char *buf)
1da177e4 448{
20ad93d4
JD
449 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
450 int nr = sensor_attr->index;
451
1da177e4 452 struct it87_data *data = it87_update_device(dev);
44c1bcd4 453 return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr]));
1da177e4
LT
454}
455
20ad93d4
JD
456static ssize_t show_in_min(struct device *dev, struct device_attribute *attr,
457 char *buf)
1da177e4 458{
20ad93d4
JD
459 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
460 int nr = sensor_attr->index;
461
1da177e4 462 struct it87_data *data = it87_update_device(dev);
44c1bcd4 463 return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in_min[nr]));
1da177e4
LT
464}
465
20ad93d4
JD
466static ssize_t show_in_max(struct device *dev, struct device_attribute *attr,
467 char *buf)
1da177e4 468{
20ad93d4
JD
469 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
470 int nr = sensor_attr->index;
471
1da177e4 472 struct it87_data *data = it87_update_device(dev);
44c1bcd4 473 return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in_max[nr]));
1da177e4
LT
474}
475
20ad93d4
JD
476static ssize_t set_in_min(struct device *dev, struct device_attribute *attr,
477 const char *buf, size_t count)
1da177e4 478{
20ad93d4
JD
479 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
480 int nr = sensor_attr->index;
481
b74f3fdd 482 struct it87_data *data = dev_get_drvdata(dev);
f5f64501
JD
483 unsigned long val;
484
179c4fdb 485 if (kstrtoul(buf, 10, &val) < 0)
f5f64501 486 return -EINVAL;
1da177e4 487
9a61bf63 488 mutex_lock(&data->update_lock);
44c1bcd4 489 data->in_min[nr] = in_to_reg(data, nr, val);
b74f3fdd 490 it87_write_value(data, IT87_REG_VIN_MIN(nr),
1da177e4 491 data->in_min[nr]);
9a61bf63 492 mutex_unlock(&data->update_lock);
1da177e4
LT
493 return count;
494}
20ad93d4
JD
495static ssize_t set_in_max(struct device *dev, struct device_attribute *attr,
496 const char *buf, size_t count)
1da177e4 497{
20ad93d4
JD
498 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
499 int nr = sensor_attr->index;
500
b74f3fdd 501 struct it87_data *data = dev_get_drvdata(dev);
f5f64501
JD
502 unsigned long val;
503
179c4fdb 504 if (kstrtoul(buf, 10, &val) < 0)
f5f64501 505 return -EINVAL;
1da177e4 506
9a61bf63 507 mutex_lock(&data->update_lock);
44c1bcd4 508 data->in_max[nr] = in_to_reg(data, nr, val);
b74f3fdd 509 it87_write_value(data, IT87_REG_VIN_MAX(nr),
1da177e4 510 data->in_max[nr]);
9a61bf63 511 mutex_unlock(&data->update_lock);
1da177e4
LT
512 return count;
513}
514
515#define show_in_offset(offset) \
20ad93d4
JD
516static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \
517 show_in, NULL, offset);
1da177e4
LT
518
519#define limit_in_offset(offset) \
20ad93d4
JD
520static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO | S_IWUSR, \
521 show_in_min, set_in_min, offset); \
522static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO | S_IWUSR, \
523 show_in_max, set_in_max, offset);
1da177e4
LT
524
525show_in_offset(0);
526limit_in_offset(0);
527show_in_offset(1);
528limit_in_offset(1);
529show_in_offset(2);
530limit_in_offset(2);
531show_in_offset(3);
532limit_in_offset(3);
533show_in_offset(4);
534limit_in_offset(4);
535show_in_offset(5);
536limit_in_offset(5);
537show_in_offset(6);
538limit_in_offset(6);
539show_in_offset(7);
540limit_in_offset(7);
541show_in_offset(8);
542
543/* 3 temperatures */
20ad93d4
JD
544static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
545 char *buf)
1da177e4 546{
20ad93d4
JD
547 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
548 int nr = sensor_attr->index;
549
1da177e4
LT
550 struct it87_data *data = it87_update_device(dev);
551 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr]));
552}
20ad93d4
JD
553static ssize_t show_temp_max(struct device *dev, struct device_attribute *attr,
554 char *buf)
1da177e4 555{
20ad93d4
JD
556 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
557 int nr = sensor_attr->index;
558
1da177e4
LT
559 struct it87_data *data = it87_update_device(dev);
560 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp_high[nr]));
561}
20ad93d4
JD
562static ssize_t show_temp_min(struct device *dev, struct device_attribute *attr,
563 char *buf)
1da177e4 564{
20ad93d4
JD
565 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
566 int nr = sensor_attr->index;
567
1da177e4
LT
568 struct it87_data *data = it87_update_device(dev);
569 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp_low[nr]));
570}
20ad93d4
JD
571static ssize_t set_temp_max(struct device *dev, struct device_attribute *attr,
572 const char *buf, size_t count)
1da177e4 573{
20ad93d4
JD
574 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
575 int nr = sensor_attr->index;
576
b74f3fdd 577 struct it87_data *data = dev_get_drvdata(dev);
f5f64501
JD
578 long val;
579
179c4fdb 580 if (kstrtol(buf, 10, &val) < 0)
f5f64501 581 return -EINVAL;
1da177e4 582
9a61bf63 583 mutex_lock(&data->update_lock);
1da177e4 584 data->temp_high[nr] = TEMP_TO_REG(val);
b74f3fdd 585 it87_write_value(data, IT87_REG_TEMP_HIGH(nr), data->temp_high[nr]);
9a61bf63 586 mutex_unlock(&data->update_lock);
1da177e4
LT
587 return count;
588}
20ad93d4
JD
589static ssize_t set_temp_min(struct device *dev, struct device_attribute *attr,
590 const char *buf, size_t count)
1da177e4 591{
20ad93d4
JD
592 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
593 int nr = sensor_attr->index;
594
b74f3fdd 595 struct it87_data *data = dev_get_drvdata(dev);
f5f64501
JD
596 long val;
597
179c4fdb 598 if (kstrtol(buf, 10, &val) < 0)
f5f64501 599 return -EINVAL;
1da177e4 600
9a61bf63 601 mutex_lock(&data->update_lock);
1da177e4 602 data->temp_low[nr] = TEMP_TO_REG(val);
b74f3fdd 603 it87_write_value(data, IT87_REG_TEMP_LOW(nr), data->temp_low[nr]);
9a61bf63 604 mutex_unlock(&data->update_lock);
1da177e4
LT
605 return count;
606}
607#define show_temp_offset(offset) \
20ad93d4
JD
608static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, \
609 show_temp, NULL, offset - 1); \
610static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO | S_IWUSR, \
611 show_temp_max, set_temp_max, offset - 1); \
612static SENSOR_DEVICE_ATTR(temp##offset##_min, S_IRUGO | S_IWUSR, \
613 show_temp_min, set_temp_min, offset - 1);
1da177e4
LT
614
615show_temp_offset(1);
616show_temp_offset(2);
617show_temp_offset(3);
618
20ad93d4
JD
619static ssize_t show_sensor(struct device *dev, struct device_attribute *attr,
620 char *buf)
1da177e4 621{
20ad93d4
JD
622 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
623 int nr = sensor_attr->index;
1da177e4 624 struct it87_data *data = it87_update_device(dev);
4a0d71cf 625 u8 reg = data->sensor; /* In case value is updated while used */
5f2dc798 626
1da177e4
LT
627 if (reg & (1 << nr))
628 return sprintf(buf, "3\n"); /* thermal diode */
629 if (reg & (8 << nr))
4ed10779 630 return sprintf(buf, "4\n"); /* thermistor */
1da177e4
LT
631 return sprintf(buf, "0\n"); /* disabled */
632}
20ad93d4
JD
633static ssize_t set_sensor(struct device *dev, struct device_attribute *attr,
634 const char *buf, size_t count)
1da177e4 635{
20ad93d4
JD
636 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
637 int nr = sensor_attr->index;
638
b74f3fdd 639 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 640 long val;
8acf07c5 641 u8 reg;
f5f64501 642
179c4fdb 643 if (kstrtol(buf, 10, &val) < 0)
f5f64501 644 return -EINVAL;
1da177e4 645
8acf07c5
JD
646 reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
647 reg &= ~(1 << nr);
648 reg &= ~(8 << nr);
4ed10779
JD
649 if (val == 2) { /* backwards compatibility */
650 dev_warn(dev, "Sensor type 2 is deprecated, please use 4 "
651 "instead\n");
652 val = 4;
653 }
654 /* 3 = thermal diode; 4 = thermistor; 0 = disabled */
1da177e4 655 if (val == 3)
8acf07c5 656 reg |= 1 << nr;
4ed10779 657 else if (val == 4)
8acf07c5
JD
658 reg |= 8 << nr;
659 else if (val != 0)
1da177e4 660 return -EINVAL;
8acf07c5
JD
661
662 mutex_lock(&data->update_lock);
663 data->sensor = reg;
b74f3fdd 664 it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor);
2b3d1d87 665 data->valid = 0; /* Force cache refresh */
9a61bf63 666 mutex_unlock(&data->update_lock);
1da177e4
LT
667 return count;
668}
669#define show_sensor_offset(offset) \
20ad93d4
JD
670static SENSOR_DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, \
671 show_sensor, set_sensor, offset - 1);
1da177e4
LT
672
673show_sensor_offset(1);
674show_sensor_offset(2);
675show_sensor_offset(3);
676
677/* 3 Fans */
b99883dc
JD
678
679static int pwm_mode(const struct it87_data *data, int nr)
680{
681 int ctrl = data->fan_main_ctrl & (1 << nr);
682
683 if (ctrl == 0) /* Full speed */
684 return 0;
685 if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */
686 return 2;
687 else /* Manual mode */
688 return 1;
689}
690
20ad93d4
JD
691static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
692 char *buf)
1da177e4 693{
20ad93d4
JD
694 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
695 int nr = sensor_attr->index;
696
1da177e4 697 struct it87_data *data = it87_update_device(dev);
5f2dc798 698 return sprintf(buf, "%d\n", FAN_FROM_REG(data->fan[nr],
1da177e4
LT
699 DIV_FROM_REG(data->fan_div[nr])));
700}
20ad93d4
JD
701static ssize_t show_fan_min(struct device *dev, struct device_attribute *attr,
702 char *buf)
1da177e4 703{
20ad93d4
JD
704 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
705 int nr = sensor_attr->index;
706
1da177e4 707 struct it87_data *data = it87_update_device(dev);
5f2dc798
JD
708 return sprintf(buf, "%d\n", FAN_FROM_REG(data->fan_min[nr],
709 DIV_FROM_REG(data->fan_div[nr])));
1da177e4 710}
20ad93d4
JD
711static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
712 char *buf)
1da177e4 713{
20ad93d4
JD
714 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
715 int nr = sensor_attr->index;
716
1da177e4
LT
717 struct it87_data *data = it87_update_device(dev);
718 return sprintf(buf, "%d\n", DIV_FROM_REG(data->fan_div[nr]));
719}
5f2dc798
JD
720static ssize_t show_pwm_enable(struct device *dev,
721 struct device_attribute *attr, char *buf)
1da177e4 722{
20ad93d4
JD
723 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
724 int nr = sensor_attr->index;
725
1da177e4 726 struct it87_data *data = it87_update_device(dev);
b99883dc 727 return sprintf(buf, "%d\n", pwm_mode(data, nr));
1da177e4 728}
20ad93d4
JD
729static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
730 char *buf)
1da177e4 731{
20ad93d4
JD
732 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
733 int nr = sensor_attr->index;
734
1da177e4 735 struct it87_data *data = it87_update_device(dev);
44c1bcd4
JD
736 return sprintf(buf, "%d\n",
737 pwm_from_reg(data, data->pwm_duty[nr]));
1da177e4 738}
f8d0c19a
JD
739static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
740 char *buf)
741{
742 struct it87_data *data = it87_update_device(dev);
743 int index = (data->fan_ctl >> 4) & 0x07;
744
745 return sprintf(buf, "%u\n", pwm_freq[index]);
746}
20ad93d4
JD
747static ssize_t set_fan_min(struct device *dev, struct device_attribute *attr,
748 const char *buf, size_t count)
1da177e4 749{
20ad93d4
JD
750 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
751 int nr = sensor_attr->index;
752
b74f3fdd 753 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 754 long val;
7f999aa7 755 u8 reg;
1da177e4 756
179c4fdb 757 if (kstrtol(buf, 10, &val) < 0)
f5f64501
JD
758 return -EINVAL;
759
9a61bf63 760 mutex_lock(&data->update_lock);
b74f3fdd 761 reg = it87_read_value(data, IT87_REG_FAN_DIV);
07eab46d 762 switch (nr) {
5f2dc798
JD
763 case 0:
764 data->fan_div[nr] = reg & 0x07;
765 break;
766 case 1:
767 data->fan_div[nr] = (reg >> 3) & 0x07;
768 break;
769 case 2:
770 data->fan_div[nr] = (reg & 0x40) ? 3 : 1;
771 break;
07eab46d
JD
772 }
773
1da177e4 774 data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
c7f1f716 775 it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan_min[nr]);
9a61bf63 776 mutex_unlock(&data->update_lock);
1da177e4
LT
777 return count;
778}
20ad93d4
JD
779static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
780 const char *buf, size_t count)
1da177e4 781{
20ad93d4
JD
782 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
783 int nr = sensor_attr->index;
784
b74f3fdd 785 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 786 unsigned long val;
8ab4ec3e 787 int min;
1da177e4
LT
788 u8 old;
789
179c4fdb 790 if (kstrtoul(buf, 10, &val) < 0)
f5f64501
JD
791 return -EINVAL;
792
9a61bf63 793 mutex_lock(&data->update_lock);
b74f3fdd 794 old = it87_read_value(data, IT87_REG_FAN_DIV);
1da177e4 795
8ab4ec3e
JD
796 /* Save fan min limit */
797 min = FAN_FROM_REG(data->fan_min[nr], DIV_FROM_REG(data->fan_div[nr]));
1da177e4
LT
798
799 switch (nr) {
800 case 0:
801 case 1:
802 data->fan_div[nr] = DIV_TO_REG(val);
803 break;
804 case 2:
805 if (val < 8)
806 data->fan_div[nr] = 1;
807 else
808 data->fan_div[nr] = 3;
809 }
810 val = old & 0x80;
811 val |= (data->fan_div[0] & 0x07);
812 val |= (data->fan_div[1] & 0x07) << 3;
813 if (data->fan_div[2] == 3)
814 val |= 0x1 << 6;
b74f3fdd 815 it87_write_value(data, IT87_REG_FAN_DIV, val);
1da177e4 816
8ab4ec3e
JD
817 /* Restore fan min limit */
818 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
c7f1f716 819 it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan_min[nr]);
8ab4ec3e 820
9a61bf63 821 mutex_unlock(&data->update_lock);
1da177e4
LT
822 return count;
823}
cccfc9c4
JD
824
825/* Returns 0 if OK, -EINVAL otherwise */
826static int check_trip_points(struct device *dev, int nr)
827{
828 const struct it87_data *data = dev_get_drvdata(dev);
829 int i, err = 0;
830
831 if (has_old_autopwm(data)) {
832 for (i = 0; i < 3; i++) {
833 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
834 err = -EINVAL;
835 }
836 for (i = 0; i < 2; i++) {
837 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
838 err = -EINVAL;
839 }
840 }
841
842 if (err) {
843 dev_err(dev, "Inconsistent trip points, not switching to "
844 "automatic mode\n");
845 dev_err(dev, "Adjust the trip points and try again\n");
846 }
847 return err;
848}
849
20ad93d4
JD
850static ssize_t set_pwm_enable(struct device *dev,
851 struct device_attribute *attr, const char *buf, size_t count)
1da177e4 852{
20ad93d4
JD
853 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
854 int nr = sensor_attr->index;
855
b74f3fdd 856 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 857 long val;
1da177e4 858
179c4fdb 859 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2)
b99883dc
JD
860 return -EINVAL;
861
cccfc9c4
JD
862 /* Check trip points before switching to automatic mode */
863 if (val == 2) {
864 if (check_trip_points(dev, nr) < 0)
865 return -EINVAL;
866 }
867
9a61bf63 868 mutex_lock(&data->update_lock);
1da177e4
LT
869
870 if (val == 0) {
871 int tmp;
872 /* make sure the fan is on when in on/off mode */
b74f3fdd 873 tmp = it87_read_value(data, IT87_REG_FAN_CTL);
874 it87_write_value(data, IT87_REG_FAN_CTL, tmp | (1 << nr));
1da177e4
LT
875 /* set on/off mode */
876 data->fan_main_ctrl &= ~(1 << nr);
5f2dc798
JD
877 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
878 data->fan_main_ctrl);
b99883dc
JD
879 } else {
880 if (val == 1) /* Manual mode */
16b5dda2 881 data->pwm_ctrl[nr] = has_newer_autopwm(data) ?
6229cdb2
JD
882 data->pwm_temp_map[nr] :
883 data->pwm_duty[nr];
b99883dc
JD
884 else /* Automatic mode */
885 data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr];
886 it87_write_value(data, IT87_REG_PWM(nr), data->pwm_ctrl[nr]);
1da177e4
LT
887 /* set SmartGuardian mode */
888 data->fan_main_ctrl |= (1 << nr);
5f2dc798
JD
889 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
890 data->fan_main_ctrl);
1da177e4
LT
891 }
892
9a61bf63 893 mutex_unlock(&data->update_lock);
1da177e4
LT
894 return count;
895}
20ad93d4
JD
896static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
897 const char *buf, size_t count)
1da177e4 898{
20ad93d4
JD
899 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
900 int nr = sensor_attr->index;
901
b74f3fdd 902 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 903 long val;
1da177e4 904
179c4fdb 905 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1da177e4
LT
906 return -EINVAL;
907
9a61bf63 908 mutex_lock(&data->update_lock);
16b5dda2 909 if (has_newer_autopwm(data)) {
4a0d71cf
GR
910 /*
911 * If we are in automatic mode, the PWM duty cycle register
912 * is read-only so we can't write the value.
913 */
6229cdb2
JD
914 if (data->pwm_ctrl[nr] & 0x80) {
915 mutex_unlock(&data->update_lock);
916 return -EBUSY;
917 }
918 data->pwm_duty[nr] = pwm_to_reg(data, val);
919 it87_write_value(data, IT87_REG_PWM_DUTY(nr),
920 data->pwm_duty[nr]);
921 } else {
922 data->pwm_duty[nr] = pwm_to_reg(data, val);
4a0d71cf
GR
923 /*
924 * If we are in manual mode, write the duty cycle immediately;
925 * otherwise, just store it for later use.
926 */
6229cdb2
JD
927 if (!(data->pwm_ctrl[nr] & 0x80)) {
928 data->pwm_ctrl[nr] = data->pwm_duty[nr];
929 it87_write_value(data, IT87_REG_PWM(nr),
930 data->pwm_ctrl[nr]);
931 }
b99883dc 932 }
9a61bf63 933 mutex_unlock(&data->update_lock);
1da177e4
LT
934 return count;
935}
f8d0c19a
JD
936static ssize_t set_pwm_freq(struct device *dev,
937 struct device_attribute *attr, const char *buf, size_t count)
938{
b74f3fdd 939 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 940 unsigned long val;
f8d0c19a
JD
941 int i;
942
179c4fdb 943 if (kstrtoul(buf, 10, &val) < 0)
f5f64501
JD
944 return -EINVAL;
945
f8d0c19a
JD
946 /* Search for the nearest available frequency */
947 for (i = 0; i < 7; i++) {
948 if (val > (pwm_freq[i] + pwm_freq[i+1]) / 2)
949 break;
950 }
951
952 mutex_lock(&data->update_lock);
b74f3fdd 953 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f;
f8d0c19a 954 data->fan_ctl |= i << 4;
b74f3fdd 955 it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl);
f8d0c19a
JD
956 mutex_unlock(&data->update_lock);
957
958 return count;
959}
94ac7ee6
JD
960static ssize_t show_pwm_temp_map(struct device *dev,
961 struct device_attribute *attr, char *buf)
962{
963 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
964 int nr = sensor_attr->index;
965
966 struct it87_data *data = it87_update_device(dev);
967 int map;
968
969 if (data->pwm_temp_map[nr] < 3)
970 map = 1 << data->pwm_temp_map[nr];
971 else
972 map = 0; /* Should never happen */
973 return sprintf(buf, "%d\n", map);
974}
975static ssize_t set_pwm_temp_map(struct device *dev,
976 struct device_attribute *attr, const char *buf, size_t count)
977{
978 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
979 int nr = sensor_attr->index;
980
981 struct it87_data *data = dev_get_drvdata(dev);
982 long val;
983 u8 reg;
984
4a0d71cf
GR
985 /*
986 * This check can go away if we ever support automatic fan speed
987 * control on newer chips.
988 */
4f3f51bc
JD
989 if (!has_old_autopwm(data)) {
990 dev_notice(dev, "Mapping change disabled for safety reasons\n");
991 return -EINVAL;
992 }
993
179c4fdb 994 if (kstrtol(buf, 10, &val) < 0)
94ac7ee6
JD
995 return -EINVAL;
996
997 switch (val) {
998 case (1 << 0):
999 reg = 0x00;
1000 break;
1001 case (1 << 1):
1002 reg = 0x01;
1003 break;
1004 case (1 << 2):
1005 reg = 0x02;
1006 break;
1007 default:
1008 return -EINVAL;
1009 }
1010
1011 mutex_lock(&data->update_lock);
1012 data->pwm_temp_map[nr] = reg;
4a0d71cf
GR
1013 /*
1014 * If we are in automatic mode, write the temp mapping immediately;
1015 * otherwise, just store it for later use.
1016 */
94ac7ee6
JD
1017 if (data->pwm_ctrl[nr] & 0x80) {
1018 data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr];
1019 it87_write_value(data, IT87_REG_PWM(nr), data->pwm_ctrl[nr]);
1020 }
1021 mutex_unlock(&data->update_lock);
1022 return count;
1023}
1da177e4 1024
4f3f51bc
JD
1025static ssize_t show_auto_pwm(struct device *dev,
1026 struct device_attribute *attr, char *buf)
1027{
1028 struct it87_data *data = it87_update_device(dev);
1029 struct sensor_device_attribute_2 *sensor_attr =
1030 to_sensor_dev_attr_2(attr);
1031 int nr = sensor_attr->nr;
1032 int point = sensor_attr->index;
1033
44c1bcd4
JD
1034 return sprintf(buf, "%d\n",
1035 pwm_from_reg(data, data->auto_pwm[nr][point]));
4f3f51bc
JD
1036}
1037
1038static ssize_t set_auto_pwm(struct device *dev,
1039 struct device_attribute *attr, const char *buf, size_t count)
1040{
1041 struct it87_data *data = dev_get_drvdata(dev);
1042 struct sensor_device_attribute_2 *sensor_attr =
1043 to_sensor_dev_attr_2(attr);
1044 int nr = sensor_attr->nr;
1045 int point = sensor_attr->index;
1046 long val;
1047
179c4fdb 1048 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
4f3f51bc
JD
1049 return -EINVAL;
1050
1051 mutex_lock(&data->update_lock);
44c1bcd4 1052 data->auto_pwm[nr][point] = pwm_to_reg(data, val);
4f3f51bc
JD
1053 it87_write_value(data, IT87_REG_AUTO_PWM(nr, point),
1054 data->auto_pwm[nr][point]);
1055 mutex_unlock(&data->update_lock);
1056 return count;
1057}
1058
1059static ssize_t show_auto_temp(struct device *dev,
1060 struct device_attribute *attr, char *buf)
1061{
1062 struct it87_data *data = it87_update_device(dev);
1063 struct sensor_device_attribute_2 *sensor_attr =
1064 to_sensor_dev_attr_2(attr);
1065 int nr = sensor_attr->nr;
1066 int point = sensor_attr->index;
1067
1068 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->auto_temp[nr][point]));
1069}
1070
1071static ssize_t set_auto_temp(struct device *dev,
1072 struct device_attribute *attr, const char *buf, size_t count)
1073{
1074 struct it87_data *data = dev_get_drvdata(dev);
1075 struct sensor_device_attribute_2 *sensor_attr =
1076 to_sensor_dev_attr_2(attr);
1077 int nr = sensor_attr->nr;
1078 int point = sensor_attr->index;
1079 long val;
1080
179c4fdb 1081 if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000)
4f3f51bc
JD
1082 return -EINVAL;
1083
1084 mutex_lock(&data->update_lock);
1085 data->auto_temp[nr][point] = TEMP_TO_REG(val);
1086 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point),
1087 data->auto_temp[nr][point]);
1088 mutex_unlock(&data->update_lock);
1089 return count;
1090}
1091
20ad93d4
JD
1092#define show_fan_offset(offset) \
1093static SENSOR_DEVICE_ATTR(fan##offset##_input, S_IRUGO, \
1094 show_fan, NULL, offset - 1); \
1095static SENSOR_DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
1096 show_fan_min, set_fan_min, offset - 1); \
1097static SENSOR_DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, \
1098 show_fan_div, set_fan_div, offset - 1);
1da177e4
LT
1099
1100show_fan_offset(1);
1101show_fan_offset(2);
1102show_fan_offset(3);
1103
1104#define show_pwm_offset(offset) \
20ad93d4
JD
1105static SENSOR_DEVICE_ATTR(pwm##offset##_enable, S_IRUGO | S_IWUSR, \
1106 show_pwm_enable, set_pwm_enable, offset - 1); \
1107static SENSOR_DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, \
f8d0c19a
JD
1108 show_pwm, set_pwm, offset - 1); \
1109static DEVICE_ATTR(pwm##offset##_freq, \
1110 (offset == 1 ? S_IRUGO | S_IWUSR : S_IRUGO), \
94ac7ee6
JD
1111 show_pwm_freq, (offset == 1 ? set_pwm_freq : NULL)); \
1112static SENSOR_DEVICE_ATTR(pwm##offset##_auto_channels_temp, \
4f3f51bc
JD
1113 S_IRUGO | S_IWUSR, show_pwm_temp_map, set_pwm_temp_map, \
1114 offset - 1); \
1115static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point1_pwm, \
1116 S_IRUGO | S_IWUSR, show_auto_pwm, set_auto_pwm, \
1117 offset - 1, 0); \
1118static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point2_pwm, \
1119 S_IRUGO | S_IWUSR, show_auto_pwm, set_auto_pwm, \
1120 offset - 1, 1); \
1121static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point3_pwm, \
1122 S_IRUGO | S_IWUSR, show_auto_pwm, set_auto_pwm, \
1123 offset - 1, 2); \
1124static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point4_pwm, \
1125 S_IRUGO, show_auto_pwm, NULL, offset - 1, 3); \
1126static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point1_temp, \
1127 S_IRUGO | S_IWUSR, show_auto_temp, set_auto_temp, \
1128 offset - 1, 1); \
1129static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point1_temp_hyst, \
1130 S_IRUGO | S_IWUSR, show_auto_temp, set_auto_temp, \
1131 offset - 1, 0); \
1132static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point2_temp, \
1133 S_IRUGO | S_IWUSR, show_auto_temp, set_auto_temp, \
1134 offset - 1, 2); \
1135static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point3_temp, \
1136 S_IRUGO | S_IWUSR, show_auto_temp, set_auto_temp, \
1137 offset - 1, 3); \
1138static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point4_temp, \
1139 S_IRUGO | S_IWUSR, show_auto_temp, set_auto_temp, \
1140 offset - 1, 4);
1da177e4
LT
1141
1142show_pwm_offset(1);
1143show_pwm_offset(2);
1144show_pwm_offset(3);
1145
17d648bf
JD
1146/* A different set of callbacks for 16-bit fans */
1147static ssize_t show_fan16(struct device *dev, struct device_attribute *attr,
1148 char *buf)
1149{
1150 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1151 int nr = sensor_attr->index;
1152 struct it87_data *data = it87_update_device(dev);
1153 return sprintf(buf, "%d\n", FAN16_FROM_REG(data->fan[nr]));
1154}
1155
1156static ssize_t show_fan16_min(struct device *dev, struct device_attribute *attr,
1157 char *buf)
1158{
1159 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1160 int nr = sensor_attr->index;
1161 struct it87_data *data = it87_update_device(dev);
1162 return sprintf(buf, "%d\n", FAN16_FROM_REG(data->fan_min[nr]));
1163}
1164
1165static ssize_t set_fan16_min(struct device *dev, struct device_attribute *attr,
1166 const char *buf, size_t count)
1167{
1168 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1169 int nr = sensor_attr->index;
b74f3fdd 1170 struct it87_data *data = dev_get_drvdata(dev);
f5f64501
JD
1171 long val;
1172
179c4fdb 1173 if (kstrtol(buf, 10, &val) < 0)
f5f64501 1174 return -EINVAL;
17d648bf
JD
1175
1176 mutex_lock(&data->update_lock);
1177 data->fan_min[nr] = FAN16_TO_REG(val);
c7f1f716 1178 it87_write_value(data, IT87_REG_FAN_MIN[nr],
17d648bf 1179 data->fan_min[nr] & 0xff);
c7f1f716 1180 it87_write_value(data, IT87_REG_FANX_MIN[nr],
17d648bf
JD
1181 data->fan_min[nr] >> 8);
1182 mutex_unlock(&data->update_lock);
1183 return count;
1184}
1185
4a0d71cf
GR
1186/*
1187 * We want to use the same sysfs file names as 8-bit fans, but we need
1188 * different variable names, so we have to use SENSOR_ATTR instead of
1189 * SENSOR_DEVICE_ATTR.
1190 */
17d648bf
JD
1191#define show_fan16_offset(offset) \
1192static struct sensor_device_attribute sensor_dev_attr_fan##offset##_input16 \
1193 = SENSOR_ATTR(fan##offset##_input, S_IRUGO, \
1194 show_fan16, NULL, offset - 1); \
1195static struct sensor_device_attribute sensor_dev_attr_fan##offset##_min16 \
1196 = SENSOR_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
1197 show_fan16_min, set_fan16_min, offset - 1)
1198
1199show_fan16_offset(1);
1200show_fan16_offset(2);
1201show_fan16_offset(3);
c7f1f716
JD
1202show_fan16_offset(4);
1203show_fan16_offset(5);
17d648bf 1204
1da177e4 1205/* Alarms */
5f2dc798
JD
1206static ssize_t show_alarms(struct device *dev, struct device_attribute *attr,
1207 char *buf)
1da177e4
LT
1208{
1209 struct it87_data *data = it87_update_device(dev);
68188ba7 1210 return sprintf(buf, "%u\n", data->alarms);
1da177e4 1211}
1d66c64c 1212static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL);
1da177e4 1213
0124dd78
JD
1214static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
1215 char *buf)
1216{
1217 int bitnr = to_sensor_dev_attr(attr)->index;
1218 struct it87_data *data = it87_update_device(dev);
1219 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
1220}
3d30f9e6
JD
1221
1222static ssize_t clear_intrusion(struct device *dev, struct device_attribute
1223 *attr, const char *buf, size_t count)
1224{
1225 struct it87_data *data = dev_get_drvdata(dev);
1226 long val;
1227 int config;
1228
179c4fdb 1229 if (kstrtol(buf, 10, &val) < 0 || val != 0)
3d30f9e6
JD
1230 return -EINVAL;
1231
1232 mutex_lock(&data->update_lock);
1233 config = it87_read_value(data, IT87_REG_CONFIG);
1234 if (config < 0) {
1235 count = config;
1236 } else {
1237 config |= 1 << 5;
1238 it87_write_value(data, IT87_REG_CONFIG, config);
1239 /* Invalidate cache to force re-read */
1240 data->valid = 0;
1241 }
1242 mutex_unlock(&data->update_lock);
1243
1244 return count;
1245}
1246
0124dd78
JD
1247static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8);
1248static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9);
1249static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10);
1250static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11);
1251static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12);
1252static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13);
1253static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14);
1254static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15);
1255static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0);
1256static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1);
1257static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2);
1258static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3);
1259static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6);
1260static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16);
1261static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17);
1262static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18);
3d30f9e6
JD
1263static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR,
1264 show_alarm, clear_intrusion, 4);
0124dd78 1265
d9b327c3
JD
1266static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
1267 char *buf)
1268{
1269 int bitnr = to_sensor_dev_attr(attr)->index;
1270 struct it87_data *data = it87_update_device(dev);
1271 return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1);
1272}
1273static ssize_t set_beep(struct device *dev, struct device_attribute *attr,
1274 const char *buf, size_t count)
1275{
1276 int bitnr = to_sensor_dev_attr(attr)->index;
1277 struct it87_data *data = dev_get_drvdata(dev);
1278 long val;
1279
179c4fdb 1280 if (kstrtol(buf, 10, &val) < 0
d9b327c3
JD
1281 || (val != 0 && val != 1))
1282 return -EINVAL;
1283
1284 mutex_lock(&data->update_lock);
1285 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1286 if (val)
1287 data->beeps |= (1 << bitnr);
1288 else
1289 data->beeps &= ~(1 << bitnr);
1290 it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps);
1291 mutex_unlock(&data->update_lock);
1292 return count;
1293}
1294
1295static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
1296 show_beep, set_beep, 1);
1297static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1);
1298static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1);
1299static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1);
1300static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1);
1301static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1);
1302static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1);
1303static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1);
1304/* fanX_beep writability is set later */
1305static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0);
1306static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0);
1307static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0);
1308static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0);
1309static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0);
1310static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
1311 show_beep, set_beep, 2);
1312static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2);
1313static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2);
1314
5f2dc798
JD
1315static ssize_t show_vrm_reg(struct device *dev, struct device_attribute *attr,
1316 char *buf)
1da177e4 1317{
90d6619a 1318 struct it87_data *data = dev_get_drvdata(dev);
a7be58a1 1319 return sprintf(buf, "%u\n", data->vrm);
1da177e4 1320}
5f2dc798
JD
1321static ssize_t store_vrm_reg(struct device *dev, struct device_attribute *attr,
1322 const char *buf, size_t count)
1da177e4 1323{
b74f3fdd 1324 struct it87_data *data = dev_get_drvdata(dev);
f5f64501
JD
1325 unsigned long val;
1326
179c4fdb 1327 if (kstrtoul(buf, 10, &val) < 0)
f5f64501 1328 return -EINVAL;
1da177e4 1329
1da177e4
LT
1330 data->vrm = val;
1331
1332 return count;
1333}
1334static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
1da177e4 1335
5f2dc798
JD
1336static ssize_t show_vid_reg(struct device *dev, struct device_attribute *attr,
1337 char *buf)
1da177e4
LT
1338{
1339 struct it87_data *data = it87_update_device(dev);
1340 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
1341}
1342static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
87808be4 1343
738e5e05
JD
1344static ssize_t show_label(struct device *dev, struct device_attribute *attr,
1345 char *buf)
1346{
3c4c4971 1347 static const char * const labels[] = {
738e5e05
JD
1348 "+5V",
1349 "5VSB",
1350 "Vbat",
1351 };
3c4c4971 1352 static const char * const labels_it8721[] = {
44c1bcd4
JD
1353 "+3.3V",
1354 "3VSB",
1355 "Vbat",
1356 };
1357 struct it87_data *data = dev_get_drvdata(dev);
738e5e05
JD
1358 int nr = to_sensor_dev_attr(attr)->index;
1359
16b5dda2
JD
1360 return sprintf(buf, "%s\n", has_12mv_adc(data) ? labels_it8721[nr]
1361 : labels[nr]);
738e5e05
JD
1362}
1363static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0);
1364static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1);
1365static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2);
1366
b74f3fdd 1367static ssize_t show_name(struct device *dev, struct device_attribute
1368 *devattr, char *buf)
1369{
1370 struct it87_data *data = dev_get_drvdata(dev);
1371 return sprintf(buf, "%s\n", data->name);
1372}
1373static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1374
9172b5d1
GR
1375static struct attribute *it87_attributes_in[9][5] = {
1376{
87808be4 1377 &sensor_dev_attr_in0_input.dev_attr.attr,
87808be4 1378 &sensor_dev_attr_in0_min.dev_attr.attr,
87808be4 1379 &sensor_dev_attr_in0_max.dev_attr.attr,
0124dd78 1380 &sensor_dev_attr_in0_alarm.dev_attr.attr,
9172b5d1
GR
1381 NULL
1382}, {
1383 &sensor_dev_attr_in1_input.dev_attr.attr,
1384 &sensor_dev_attr_in1_min.dev_attr.attr,
1385 &sensor_dev_attr_in1_max.dev_attr.attr,
0124dd78 1386 &sensor_dev_attr_in1_alarm.dev_attr.attr,
9172b5d1
GR
1387 NULL
1388}, {
1389 &sensor_dev_attr_in2_input.dev_attr.attr,
1390 &sensor_dev_attr_in2_min.dev_attr.attr,
1391 &sensor_dev_attr_in2_max.dev_attr.attr,
0124dd78 1392 &sensor_dev_attr_in2_alarm.dev_attr.attr,
9172b5d1
GR
1393 NULL
1394}, {
1395 &sensor_dev_attr_in3_input.dev_attr.attr,
1396 &sensor_dev_attr_in3_min.dev_attr.attr,
1397 &sensor_dev_attr_in3_max.dev_attr.attr,
0124dd78 1398 &sensor_dev_attr_in3_alarm.dev_attr.attr,
9172b5d1
GR
1399 NULL
1400}, {
1401 &sensor_dev_attr_in4_input.dev_attr.attr,
1402 &sensor_dev_attr_in4_min.dev_attr.attr,
1403 &sensor_dev_attr_in4_max.dev_attr.attr,
0124dd78 1404 &sensor_dev_attr_in4_alarm.dev_attr.attr,
9172b5d1
GR
1405 NULL
1406}, {
1407 &sensor_dev_attr_in5_input.dev_attr.attr,
1408 &sensor_dev_attr_in5_min.dev_attr.attr,
1409 &sensor_dev_attr_in5_max.dev_attr.attr,
0124dd78 1410 &sensor_dev_attr_in5_alarm.dev_attr.attr,
9172b5d1
GR
1411 NULL
1412}, {
1413 &sensor_dev_attr_in6_input.dev_attr.attr,
1414 &sensor_dev_attr_in6_min.dev_attr.attr,
1415 &sensor_dev_attr_in6_max.dev_attr.attr,
0124dd78 1416 &sensor_dev_attr_in6_alarm.dev_attr.attr,
9172b5d1
GR
1417 NULL
1418}, {
1419 &sensor_dev_attr_in7_input.dev_attr.attr,
1420 &sensor_dev_attr_in7_min.dev_attr.attr,
1421 &sensor_dev_attr_in7_max.dev_attr.attr,
0124dd78 1422 &sensor_dev_attr_in7_alarm.dev_attr.attr,
9172b5d1
GR
1423 NULL
1424}, {
1425 &sensor_dev_attr_in8_input.dev_attr.attr,
1426 NULL
1427} };
87808be4 1428
9172b5d1
GR
1429static const struct attribute_group it87_group_in[9] = {
1430 { .attrs = it87_attributes_in[0] },
1431 { .attrs = it87_attributes_in[1] },
1432 { .attrs = it87_attributes_in[2] },
1433 { .attrs = it87_attributes_in[3] },
1434 { .attrs = it87_attributes_in[4] },
1435 { .attrs = it87_attributes_in[5] },
1436 { .attrs = it87_attributes_in[6] },
1437 { .attrs = it87_attributes_in[7] },
1438 { .attrs = it87_attributes_in[8] },
1439};
1440
1441static struct attribute *it87_attributes[] = {
87808be4
JD
1442 &sensor_dev_attr_temp1_input.dev_attr.attr,
1443 &sensor_dev_attr_temp2_input.dev_attr.attr,
1444 &sensor_dev_attr_temp3_input.dev_attr.attr,
1445 &sensor_dev_attr_temp1_max.dev_attr.attr,
1446 &sensor_dev_attr_temp2_max.dev_attr.attr,
1447 &sensor_dev_attr_temp3_max.dev_attr.attr,
1448 &sensor_dev_attr_temp1_min.dev_attr.attr,
1449 &sensor_dev_attr_temp2_min.dev_attr.attr,
1450 &sensor_dev_attr_temp3_min.dev_attr.attr,
1451 &sensor_dev_attr_temp1_type.dev_attr.attr,
1452 &sensor_dev_attr_temp2_type.dev_attr.attr,
1453 &sensor_dev_attr_temp3_type.dev_attr.attr,
0124dd78
JD
1454 &sensor_dev_attr_temp1_alarm.dev_attr.attr,
1455 &sensor_dev_attr_temp2_alarm.dev_attr.attr,
1456 &sensor_dev_attr_temp3_alarm.dev_attr.attr,
87808be4
JD
1457
1458 &dev_attr_alarms.attr,
3d30f9e6 1459 &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,
b74f3fdd 1460 &dev_attr_name.attr,
87808be4
JD
1461 NULL
1462};
1463
1464static const struct attribute_group it87_group = {
1465 .attrs = it87_attributes,
1466};
1467
9172b5d1 1468static struct attribute *it87_attributes_in_beep[] = {
d9b327c3
JD
1469 &sensor_dev_attr_in0_beep.dev_attr.attr,
1470 &sensor_dev_attr_in1_beep.dev_attr.attr,
1471 &sensor_dev_attr_in2_beep.dev_attr.attr,
1472 &sensor_dev_attr_in3_beep.dev_attr.attr,
1473 &sensor_dev_attr_in4_beep.dev_attr.attr,
1474 &sensor_dev_attr_in5_beep.dev_attr.attr,
1475 &sensor_dev_attr_in6_beep.dev_attr.attr,
1476 &sensor_dev_attr_in7_beep.dev_attr.attr,
9172b5d1
GR
1477 NULL
1478};
d9b327c3 1479
9172b5d1 1480static struct attribute *it87_attributes_beep[] = {
d9b327c3
JD
1481 &sensor_dev_attr_temp1_beep.dev_attr.attr,
1482 &sensor_dev_attr_temp2_beep.dev_attr.attr,
1483 &sensor_dev_attr_temp3_beep.dev_attr.attr,
1484 NULL
1485};
1486
1487static const struct attribute_group it87_group_beep = {
1488 .attrs = it87_attributes_beep,
1489};
1490
723a0aa0 1491static struct attribute *it87_attributes_fan16[5][3+1] = { {
87808be4
JD
1492 &sensor_dev_attr_fan1_input16.dev_attr.attr,
1493 &sensor_dev_attr_fan1_min16.dev_attr.attr,
723a0aa0
JD
1494 &sensor_dev_attr_fan1_alarm.dev_attr.attr,
1495 NULL
1496}, {
87808be4
JD
1497 &sensor_dev_attr_fan2_input16.dev_attr.attr,
1498 &sensor_dev_attr_fan2_min16.dev_attr.attr,
723a0aa0
JD
1499 &sensor_dev_attr_fan2_alarm.dev_attr.attr,
1500 NULL
1501}, {
87808be4
JD
1502 &sensor_dev_attr_fan3_input16.dev_attr.attr,
1503 &sensor_dev_attr_fan3_min16.dev_attr.attr,
723a0aa0
JD
1504 &sensor_dev_attr_fan3_alarm.dev_attr.attr,
1505 NULL
1506}, {
c7f1f716
JD
1507 &sensor_dev_attr_fan4_input16.dev_attr.attr,
1508 &sensor_dev_attr_fan4_min16.dev_attr.attr,
723a0aa0
JD
1509 &sensor_dev_attr_fan4_alarm.dev_attr.attr,
1510 NULL
1511}, {
c7f1f716
JD
1512 &sensor_dev_attr_fan5_input16.dev_attr.attr,
1513 &sensor_dev_attr_fan5_min16.dev_attr.attr,
723a0aa0
JD
1514 &sensor_dev_attr_fan5_alarm.dev_attr.attr,
1515 NULL
1516} };
1517
1518static const struct attribute_group it87_group_fan16[5] = {
1519 { .attrs = it87_attributes_fan16[0] },
1520 { .attrs = it87_attributes_fan16[1] },
1521 { .attrs = it87_attributes_fan16[2] },
1522 { .attrs = it87_attributes_fan16[3] },
1523 { .attrs = it87_attributes_fan16[4] },
1524};
87808be4 1525
723a0aa0 1526static struct attribute *it87_attributes_fan[3][4+1] = { {
87808be4
JD
1527 &sensor_dev_attr_fan1_input.dev_attr.attr,
1528 &sensor_dev_attr_fan1_min.dev_attr.attr,
1529 &sensor_dev_attr_fan1_div.dev_attr.attr,
723a0aa0
JD
1530 &sensor_dev_attr_fan1_alarm.dev_attr.attr,
1531 NULL
1532}, {
87808be4
JD
1533 &sensor_dev_attr_fan2_input.dev_attr.attr,
1534 &sensor_dev_attr_fan2_min.dev_attr.attr,
1535 &sensor_dev_attr_fan2_div.dev_attr.attr,
723a0aa0
JD
1536 &sensor_dev_attr_fan2_alarm.dev_attr.attr,
1537 NULL
1538}, {
87808be4
JD
1539 &sensor_dev_attr_fan3_input.dev_attr.attr,
1540 &sensor_dev_attr_fan3_min.dev_attr.attr,
1541 &sensor_dev_attr_fan3_div.dev_attr.attr,
0124dd78 1542 &sensor_dev_attr_fan3_alarm.dev_attr.attr,
723a0aa0
JD
1543 NULL
1544} };
1545
1546static const struct attribute_group it87_group_fan[3] = {
1547 { .attrs = it87_attributes_fan[0] },
1548 { .attrs = it87_attributes_fan[1] },
1549 { .attrs = it87_attributes_fan[2] },
1550};
1551
1552static const struct attribute_group *
1553it87_get_fan_group(const struct it87_data *data)
1554{
1555 return has_16bit_fans(data) ? it87_group_fan16 : it87_group_fan;
1556}
0124dd78 1557
723a0aa0 1558static struct attribute *it87_attributes_pwm[3][4+1] = { {
87808be4 1559 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
87808be4 1560 &sensor_dev_attr_pwm1.dev_attr.attr,
d5b0b5d6 1561 &dev_attr_pwm1_freq.attr,
94ac7ee6 1562 &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
723a0aa0
JD
1563 NULL
1564}, {
1565 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
1566 &sensor_dev_attr_pwm2.dev_attr.attr,
1567 &dev_attr_pwm2_freq.attr,
94ac7ee6 1568 &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
723a0aa0
JD
1569 NULL
1570}, {
1571 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
1572 &sensor_dev_attr_pwm3.dev_attr.attr,
1573 &dev_attr_pwm3_freq.attr,
94ac7ee6 1574 &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
723a0aa0
JD
1575 NULL
1576} };
87808be4 1577
723a0aa0
JD
1578static const struct attribute_group it87_group_pwm[3] = {
1579 { .attrs = it87_attributes_pwm[0] },
1580 { .attrs = it87_attributes_pwm[1] },
1581 { .attrs = it87_attributes_pwm[2] },
1582};
1583
4f3f51bc
JD
1584static struct attribute *it87_attributes_autopwm[3][9+1] = { {
1585 &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
1586 &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
1587 &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
1588 &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
1589 &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
1590 &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
1591 &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
1592 &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
1593 &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
1594 NULL
1595}, {
1596 &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,
1597 &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
1598 &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr,
1599 &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr,
1600 &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
1601 &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr,
1602 &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
1603 &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
1604 &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr,
1605 NULL
1606}, {
1607 &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,
1608 &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
1609 &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr,
1610 &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr,
1611 &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
1612 &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr,
1613 &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
1614 &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
1615 &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr,
1616 NULL
1617} };
1618
1619static const struct attribute_group it87_group_autopwm[3] = {
1620 { .attrs = it87_attributes_autopwm[0] },
1621 { .attrs = it87_attributes_autopwm[1] },
1622 { .attrs = it87_attributes_autopwm[2] },
1623};
1624
d9b327c3
JD
1625static struct attribute *it87_attributes_fan_beep[] = {
1626 &sensor_dev_attr_fan1_beep.dev_attr.attr,
1627 &sensor_dev_attr_fan2_beep.dev_attr.attr,
1628 &sensor_dev_attr_fan3_beep.dev_attr.attr,
1629 &sensor_dev_attr_fan4_beep.dev_attr.attr,
1630 &sensor_dev_attr_fan5_beep.dev_attr.attr,
1631};
1632
6a8d7acf 1633static struct attribute *it87_attributes_vid[] = {
87808be4
JD
1634 &dev_attr_vrm.attr,
1635 &dev_attr_cpu0_vid.attr,
1636 NULL
1637};
1638
6a8d7acf
JD
1639static const struct attribute_group it87_group_vid = {
1640 .attrs = it87_attributes_vid,
87808be4 1641};
1da177e4 1642
738e5e05
JD
1643static struct attribute *it87_attributes_label[] = {
1644 &sensor_dev_attr_in3_label.dev_attr.attr,
1645 &sensor_dev_attr_in7_label.dev_attr.attr,
1646 &sensor_dev_attr_in8_label.dev_attr.attr,
1647 NULL
1648};
1649
1650static const struct attribute_group it87_group_label = {
fa8b6975 1651 .attrs = it87_attributes_label,
738e5e05
JD
1652};
1653
2d8672c5 1654/* SuperIO detection - will change isa_address if a chip is found */
b74f3fdd 1655static int __init it87_find(unsigned short *address,
1656 struct it87_sio_data *sio_data)
1da177e4 1657{
5b0380c9 1658 int err;
b74f3fdd 1659 u16 chip_type;
98dd22c3 1660 const char *board_vendor, *board_name;
1da177e4 1661
5b0380c9
NG
1662 err = superio_enter();
1663 if (err)
1664 return err;
1665
1666 err = -ENODEV;
67b671bc 1667 chip_type = force_id ? force_id : superio_inw(DEVID);
b74f3fdd 1668
1669 switch (chip_type) {
1670 case IT8705F_DEVID:
1671 sio_data->type = it87;
1672 break;
1673 case IT8712F_DEVID:
1674 sio_data->type = it8712;
1675 break;
1676 case IT8716F_DEVID:
1677 case IT8726F_DEVID:
1678 sio_data->type = it8716;
1679 break;
1680 case IT8718F_DEVID:
1681 sio_data->type = it8718;
1682 break;
b4da93e4
JMS
1683 case IT8720F_DEVID:
1684 sio_data->type = it8720;
1685 break;
44c1bcd4
JD
1686 case IT8721F_DEVID:
1687 sio_data->type = it8721;
1688 break;
16b5dda2
JD
1689 case IT8728F_DEVID:
1690 sio_data->type = it8728;
1691 break;
0531d98b
GR
1692 case IT8782F_DEVID:
1693 sio_data->type = it8782;
1694 break;
1695 case IT8783E_DEVID:
1696 sio_data->type = it8783;
1697 break;
b74f3fdd 1698 case 0xffff: /* No device at all */
1699 goto exit;
1700 default:
a8ca1037 1701 pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type);
b74f3fdd 1702 goto exit;
1703 }
1da177e4 1704
87673dd7 1705 superio_select(PME);
1da177e4 1706 if (!(superio_inb(IT87_ACT_REG) & 0x01)) {
a8ca1037 1707 pr_info("Device not activated, skipping\n");
1da177e4
LT
1708 goto exit;
1709 }
1710
1711 *address = superio_inw(IT87_BASE_REG) & ~(IT87_EXTENT - 1);
1712 if (*address == 0) {
a8ca1037 1713 pr_info("Base address not set, skipping\n");
1da177e4
LT
1714 goto exit;
1715 }
1716
1717 err = 0;
0475169c 1718 sio_data->revision = superio_inb(DEVREV) & 0x0f;
a8ca1037 1719 pr_info("Found IT%04xF chip at 0x%x, revision %d\n",
0475169c 1720 chip_type, *address, sio_data->revision);
1da177e4 1721
738e5e05
JD
1722 /* in8 (Vbat) is always internal */
1723 sio_data->internal = (1 << 2);
1724
87673dd7 1725 /* Read GPIO config and VID value from LDN 7 (GPIO) */
895ff267
JD
1726 if (sio_data->type == it87) {
1727 /* The IT8705F doesn't have VID pins at all */
1728 sio_data->skip_vid = 1;
d9b327c3
JD
1729
1730 /* The IT8705F has a different LD number for GPIO */
1731 superio_select(5);
1732 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
0531d98b
GR
1733 } else if (sio_data->type == it8783) {
1734 int reg25, reg27, reg2A, reg2C, regEF;
0531d98b
GR
1735
1736 sio_data->skip_vid = 1; /* No VID */
1737
1738 superio_select(GPIO);
1739
1740 reg25 = superio_inb(IT87_SIO_GPIO1_REG);
1741 reg27 = superio_inb(IT87_SIO_GPIO3_REG);
1742 reg2A = superio_inb(IT87_SIO_PINX1_REG);
1743 reg2C = superio_inb(IT87_SIO_PINX2_REG);
1744 regEF = superio_inb(IT87_SIO_SPI_REG);
1745
0531d98b 1746 /* Check if fan3 is there or not */
9172b5d1 1747 if ((reg27 & (1 << 0)) || !(reg2C & (1 << 2)))
0531d98b
GR
1748 sio_data->skip_fan |= (1 << 2);
1749 if ((reg25 & (1 << 4))
1750 || (!(reg2A & (1 << 1)) && (regEF & (1 << 0))))
1751 sio_data->skip_pwm |= (1 << 2);
1752
1753 /* Check if fan2 is there or not */
1754 if (reg27 & (1 << 7))
1755 sio_data->skip_fan |= (1 << 1);
1756 if (reg27 & (1 << 3))
1757 sio_data->skip_pwm |= (1 << 1);
1758
1759 /* VIN5 */
9172b5d1
GR
1760 if ((reg27 & (1 << 0)) || (reg2C & (1 << 2)))
1761 sio_data->skip_in |= (1 << 5); /* No VIN5 */
0531d98b
GR
1762
1763 /* VIN6 */
9172b5d1
GR
1764 if (reg27 & (1 << 1))
1765 sio_data->skip_in |= (1 << 6); /* No VIN6 */
0531d98b
GR
1766
1767 /*
1768 * VIN7
1769 * Does not depend on bit 2 of Reg2C, contrary to datasheet.
1770 */
9172b5d1
GR
1771 if (reg27 & (1 << 2)) {
1772 /*
1773 * The data sheet is a bit unclear regarding the
1774 * internal voltage divider for VCCH5V. It says
1775 * "This bit enables and switches VIN7 (pin 91) to the
1776 * internal voltage divider for VCCH5V".
1777 * This is different to other chips, where the internal
1778 * voltage divider would connect VIN7 to an internal
1779 * voltage source. Maybe that is the case here as well.
1780 *
1781 * Since we don't know for sure, re-route it if that is
1782 * not the case, and ask the user to report if the
1783 * resulting voltage is sane.
1784 */
1785 if (!(reg2C & (1 << 1))) {
1786 reg2C |= (1 << 1);
1787 superio_outb(IT87_SIO_PINX2_REG, reg2C);
1788 pr_notice("Routing internal VCCH5V to in7.\n");
1789 }
1790 pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n");
1791 pr_notice("Please report if it displays a reasonable voltage.\n");
1792 }
0531d98b
GR
1793
1794 if (reg2C & (1 << 0))
1795 sio_data->internal |= (1 << 0);
1796 if (reg2C & (1 << 1))
1797 sio_data->internal |= (1 << 1);
1798
1799 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
1800
895ff267 1801 } else {
87673dd7 1802 int reg;
9172b5d1 1803 bool uart6;
87673dd7
JD
1804
1805 superio_select(GPIO);
44c1bcd4 1806
895ff267 1807 reg = superio_inb(IT87_SIO_GPIO3_REG);
0531d98b
GR
1808 if (sio_data->type == it8721 || sio_data->type == it8728 ||
1809 sio_data->type == it8782) {
16b5dda2 1810 /*
0531d98b
GR
1811 * IT8721F/IT8758E, and IT8782F don't have VID pins
1812 * at all, not sure about the IT8728F.
16b5dda2 1813 */
895ff267 1814 sio_data->skip_vid = 1;
44c1bcd4
JD
1815 } else {
1816 /* We need at least 4 VID pins */
1817 if (reg & 0x0f) {
a8ca1037 1818 pr_info("VID is disabled (pins used for GPIO)\n");
44c1bcd4
JD
1819 sio_data->skip_vid = 1;
1820 }
895ff267
JD
1821 }
1822
591ec650
JD
1823 /* Check if fan3 is there or not */
1824 if (reg & (1 << 6))
1825 sio_data->skip_pwm |= (1 << 2);
1826 if (reg & (1 << 7))
1827 sio_data->skip_fan |= (1 << 2);
1828
1829 /* Check if fan2 is there or not */
1830 reg = superio_inb(IT87_SIO_GPIO5_REG);
1831 if (reg & (1 << 1))
1832 sio_data->skip_pwm |= (1 << 1);
1833 if (reg & (1 << 2))
1834 sio_data->skip_fan |= (1 << 1);
1835
895ff267
JD
1836 if ((sio_data->type == it8718 || sio_data->type == it8720)
1837 && !(sio_data->skip_vid))
b74f3fdd 1838 sio_data->vid_value = superio_inb(IT87_SIO_VID_REG);
87673dd7
JD
1839
1840 reg = superio_inb(IT87_SIO_PINX2_REG);
9172b5d1
GR
1841
1842 uart6 = sio_data->type == it8782 && (reg & (1 << 2));
1843
436cad2a
JD
1844 /*
1845 * The IT8720F has no VIN7 pin, so VCCH should always be
1846 * routed internally to VIN7 with an internal divider.
1847 * Curiously, there still is a configuration bit to control
1848 * this, which means it can be set incorrectly. And even
1849 * more curiously, many boards out there are improperly
1850 * configured, even though the IT8720F datasheet claims
1851 * that the internal routing of VCCH to VIN7 is the default
1852 * setting. So we force the internal routing in this case.
0531d98b
GR
1853 *
1854 * On IT8782F, VIN7 is multiplexed with one of the UART6 pins.
9172b5d1
GR
1855 * If UART6 is enabled, re-route VIN7 to the internal divider
1856 * if that is not already the case.
436cad2a 1857 */
9172b5d1 1858 if ((sio_data->type == it8720 || uart6) && !(reg & (1 << 1))) {
436cad2a
JD
1859 reg |= (1 << 1);
1860 superio_outb(IT87_SIO_PINX2_REG, reg);
a8ca1037 1861 pr_notice("Routing internal VCCH to in7\n");
436cad2a 1862 }
87673dd7 1863 if (reg & (1 << 0))
738e5e05 1864 sio_data->internal |= (1 << 0);
16b5dda2
JD
1865 if ((reg & (1 << 1)) || sio_data->type == it8721 ||
1866 sio_data->type == it8728)
738e5e05 1867 sio_data->internal |= (1 << 1);
d9b327c3 1868
9172b5d1
GR
1869 /*
1870 * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7.
1871 * While VIN7 can be routed to the internal voltage divider,
1872 * VIN5 and VIN6 are not available if UART6 is enabled.
1873 */
1874 if (uart6)
1875 sio_data->skip_in |= (1 << 5) | (1 << 6);
1876
d9b327c3 1877 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
87673dd7 1878 }
d9b327c3 1879 if (sio_data->beep_pin)
a8ca1037 1880 pr_info("Beeping is supported\n");
87673dd7 1881
98dd22c3
JD
1882 /* Disable specific features based on DMI strings */
1883 board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
1884 board_name = dmi_get_system_info(DMI_BOARD_NAME);
1885 if (board_vendor && board_name) {
1886 if (strcmp(board_vendor, "nVIDIA") == 0
1887 && strcmp(board_name, "FN68PT") == 0) {
4a0d71cf
GR
1888 /*
1889 * On the Shuttle SN68PT, FAN_CTL2 is apparently not
1890 * connected to a fan, but to something else. One user
1891 * has reported instant system power-off when changing
1892 * the PWM2 duty cycle, so we disable it.
1893 * I use the board name string as the trigger in case
1894 * the same board is ever used in other systems.
1895 */
a8ca1037 1896 pr_info("Disabling pwm2 due to hardware constraints\n");
98dd22c3
JD
1897 sio_data->skip_pwm = (1 << 1);
1898 }
1899 }
1900
1da177e4
LT
1901exit:
1902 superio_exit();
1903 return err;
1904}
1905
723a0aa0
JD
1906static void it87_remove_files(struct device *dev)
1907{
1908 struct it87_data *data = platform_get_drvdata(pdev);
1909 struct it87_sio_data *sio_data = dev->platform_data;
1910 const struct attribute_group *fan_group = it87_get_fan_group(data);
1911 int i;
1912
1913 sysfs_remove_group(&dev->kobj, &it87_group);
9172b5d1
GR
1914 for (i = 0; i < 9; i++) {
1915 if (sio_data->skip_in & (1 << i))
1916 continue;
1917 sysfs_remove_group(&dev->kobj, &it87_group_in[i]);
1918 if (it87_attributes_in_beep[i])
1919 sysfs_remove_file(&dev->kobj,
1920 it87_attributes_in_beep[i]);
1921 }
d9b327c3
JD
1922 if (sio_data->beep_pin)
1923 sysfs_remove_group(&dev->kobj, &it87_group_beep);
723a0aa0
JD
1924 for (i = 0; i < 5; i++) {
1925 if (!(data->has_fan & (1 << i)))
1926 continue;
1927 sysfs_remove_group(&dev->kobj, &fan_group[i]);
d9b327c3
JD
1928 if (sio_data->beep_pin)
1929 sysfs_remove_file(&dev->kobj,
1930 it87_attributes_fan_beep[i]);
723a0aa0
JD
1931 }
1932 for (i = 0; i < 3; i++) {
1933 if (sio_data->skip_pwm & (1 << 0))
1934 continue;
1935 sysfs_remove_group(&dev->kobj, &it87_group_pwm[i]);
4f3f51bc
JD
1936 if (has_old_autopwm(data))
1937 sysfs_remove_group(&dev->kobj,
1938 &it87_group_autopwm[i]);
723a0aa0 1939 }
6a8d7acf
JD
1940 if (!sio_data->skip_vid)
1941 sysfs_remove_group(&dev->kobj, &it87_group_vid);
738e5e05 1942 sysfs_remove_group(&dev->kobj, &it87_group_label);
723a0aa0
JD
1943}
1944
b74f3fdd 1945static int __devinit it87_probe(struct platform_device *pdev)
1da177e4 1946{
1da177e4 1947 struct it87_data *data;
b74f3fdd 1948 struct resource *res;
1949 struct device *dev = &pdev->dev;
1950 struct it87_sio_data *sio_data = dev->platform_data;
723a0aa0
JD
1951 const struct attribute_group *fan_group;
1952 int err = 0, i;
1da177e4 1953 int enable_pwm_interface;
d9b327c3 1954 int fan_beep_need_rw;
3c4c4971 1955 static const char * const names[] = {
b74f3fdd 1956 "it87",
1957 "it8712",
1958 "it8716",
1959 "it8718",
b4da93e4 1960 "it8720",
44c1bcd4 1961 "it8721",
16b5dda2 1962 "it8728",
0531d98b
GR
1963 "it8782",
1964 "it8783",
b74f3fdd 1965 };
1966
1967 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
62a1d05f
GR
1968 if (!devm_request_region(&pdev->dev, res->start, IT87_EC_EXTENT,
1969 DRVNAME)) {
b74f3fdd 1970 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
1971 (unsigned long)res->start,
87b4b663 1972 (unsigned long)(res->start + IT87_EC_EXTENT - 1));
62a1d05f 1973 return -EBUSY;
8e9afcbb 1974 }
1da177e4 1975
62a1d05f
GR
1976 data = devm_kzalloc(&pdev->dev, sizeof(struct it87_data), GFP_KERNEL);
1977 if (!data)
1978 return -ENOMEM;
1da177e4 1979
b74f3fdd 1980 data->addr = res->start;
1981 data->type = sio_data->type;
0475169c 1982 data->revision = sio_data->revision;
b74f3fdd 1983 data->name = names[sio_data->type];
1da177e4
LT
1984
1985 /* Now, we do the remaining detection. */
b74f3fdd 1986 if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80)
62a1d05f
GR
1987 || it87_read_value(data, IT87_REG_CHIPID) != 0x90)
1988 return -ENODEV;
1da177e4 1989
b74f3fdd 1990 platform_set_drvdata(pdev, data);
1da177e4 1991
9a61bf63 1992 mutex_init(&data->update_lock);
1da177e4 1993
1da177e4 1994 /* Check PWM configuration */
b74f3fdd 1995 enable_pwm_interface = it87_check_pwm(dev);
1da177e4 1996
44c1bcd4 1997 /* Starting with IT8721F, we handle scaling of internal voltages */
16b5dda2 1998 if (has_12mv_adc(data)) {
44c1bcd4
JD
1999 if (sio_data->internal & (1 << 0))
2000 data->in_scaled |= (1 << 3); /* in3 is AVCC */
2001 if (sio_data->internal & (1 << 1))
2002 data->in_scaled |= (1 << 7); /* in7 is VSB */
2003 if (sio_data->internal & (1 << 2))
2004 data->in_scaled |= (1 << 8); /* in8 is Vbat */
0531d98b
GR
2005 } else if (sio_data->type == it8782 || sio_data->type == it8783) {
2006 if (sio_data->internal & (1 << 0))
2007 data->in_scaled |= (1 << 3); /* in3 is VCC5V */
2008 if (sio_data->internal & (1 << 1))
2009 data->in_scaled |= (1 << 7); /* in7 is VCCH5V */
44c1bcd4
JD
2010 }
2011
1da177e4 2012 /* Initialize the IT87 chip */
b74f3fdd 2013 it87_init_device(pdev);
1da177e4
LT
2014
2015 /* Register sysfs hooks */
5f2dc798
JD
2016 err = sysfs_create_group(&dev->kobj, &it87_group);
2017 if (err)
62a1d05f 2018 return err;
17d648bf 2019
9172b5d1
GR
2020 for (i = 0; i < 9; i++) {
2021 if (sio_data->skip_in & (1 << i))
2022 continue;
2023 err = sysfs_create_group(&dev->kobj, &it87_group_in[i]);
2024 if (err)
62a1d05f 2025 goto error;
9172b5d1
GR
2026 if (sio_data->beep_pin && it87_attributes_in_beep[i]) {
2027 err = sysfs_create_file(&dev->kobj,
2028 it87_attributes_in_beep[i]);
2029 if (err)
62a1d05f 2030 goto error;
9172b5d1
GR
2031 }
2032 }
2033
d9b327c3
JD
2034 if (sio_data->beep_pin) {
2035 err = sysfs_create_group(&dev->kobj, &it87_group_beep);
2036 if (err)
62a1d05f 2037 goto error;
d9b327c3
JD
2038 }
2039
9060f8bd 2040 /* Do not create fan files for disabled fans */
723a0aa0 2041 fan_group = it87_get_fan_group(data);
d9b327c3 2042 fan_beep_need_rw = 1;
723a0aa0
JD
2043 for (i = 0; i < 5; i++) {
2044 if (!(data->has_fan & (1 << i)))
2045 continue;
2046 err = sysfs_create_group(&dev->kobj, &fan_group[i]);
2047 if (err)
62a1d05f 2048 goto error;
d9b327c3
JD
2049
2050 if (sio_data->beep_pin) {
2051 err = sysfs_create_file(&dev->kobj,
2052 it87_attributes_fan_beep[i]);
2053 if (err)
62a1d05f 2054 goto error;
d9b327c3
JD
2055 if (!fan_beep_need_rw)
2056 continue;
2057
4a0d71cf
GR
2058 /*
2059 * As we have a single beep enable bit for all fans,
d9b327c3 2060 * only the first enabled fan has a writable attribute
4a0d71cf
GR
2061 * for it.
2062 */
d9b327c3
JD
2063 if (sysfs_chmod_file(&dev->kobj,
2064 it87_attributes_fan_beep[i],
2065 S_IRUGO | S_IWUSR))
2066 dev_dbg(dev, "chmod +w fan%d_beep failed\n",
2067 i + 1);
2068 fan_beep_need_rw = 0;
2069 }
17d648bf
JD
2070 }
2071
1da177e4 2072 if (enable_pwm_interface) {
723a0aa0
JD
2073 for (i = 0; i < 3; i++) {
2074 if (sio_data->skip_pwm & (1 << i))
2075 continue;
2076 err = sysfs_create_group(&dev->kobj,
2077 &it87_group_pwm[i]);
2078 if (err)
62a1d05f 2079 goto error;
4f3f51bc
JD
2080
2081 if (!has_old_autopwm(data))
2082 continue;
2083 err = sysfs_create_group(&dev->kobj,
2084 &it87_group_autopwm[i]);
2085 if (err)
62a1d05f 2086 goto error;
98dd22c3 2087 }
1da177e4
LT
2088 }
2089
895ff267 2090 if (!sio_data->skip_vid) {
303760b4 2091 data->vrm = vid_which_vrm();
87673dd7 2092 /* VID reading from Super-I/O config space if available */
b74f3fdd 2093 data->vid = sio_data->vid_value;
6a8d7acf
JD
2094 err = sysfs_create_group(&dev->kobj, &it87_group_vid);
2095 if (err)
62a1d05f 2096 goto error;
87808be4
JD
2097 }
2098
738e5e05
JD
2099 /* Export labels for internal sensors */
2100 for (i = 0; i < 3; i++) {
2101 if (!(sio_data->internal & (1 << i)))
2102 continue;
2103 err = sysfs_create_file(&dev->kobj,
2104 it87_attributes_label[i]);
2105 if (err)
62a1d05f 2106 goto error;
738e5e05
JD
2107 }
2108
1beeffe4
TJ
2109 data->hwmon_dev = hwmon_device_register(dev);
2110 if (IS_ERR(data->hwmon_dev)) {
2111 err = PTR_ERR(data->hwmon_dev);
62a1d05f 2112 goto error;
1da177e4
LT
2113 }
2114
2115 return 0;
2116
62a1d05f 2117error:
723a0aa0 2118 it87_remove_files(dev);
1da177e4
LT
2119 return err;
2120}
2121
b74f3fdd 2122static int __devexit it87_remove(struct platform_device *pdev)
1da177e4 2123{
b74f3fdd 2124 struct it87_data *data = platform_get_drvdata(pdev);
1da177e4 2125
1beeffe4 2126 hwmon_device_unregister(data->hwmon_dev);
723a0aa0 2127 it87_remove_files(&pdev->dev);
943b0830 2128
1da177e4
LT
2129 return 0;
2130}
2131
4a0d71cf
GR
2132/*
2133 * Must be called with data->update_lock held, except during initialization.
2134 * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
2135 * would slow down the IT87 access and should not be necessary.
2136 */
b74f3fdd 2137static int it87_read_value(struct it87_data *data, u8 reg)
1da177e4 2138{
b74f3fdd 2139 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
2140 return inb_p(data->addr + IT87_DATA_REG_OFFSET);
1da177e4
LT
2141}
2142
4a0d71cf
GR
2143/*
2144 * Must be called with data->update_lock held, except during initialization.
2145 * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
2146 * would slow down the IT87 access and should not be necessary.
2147 */
b74f3fdd 2148static void it87_write_value(struct it87_data *data, u8 reg, u8 value)
1da177e4 2149{
b74f3fdd 2150 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
2151 outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
1da177e4
LT
2152}
2153
2154/* Return 1 if and only if the PWM interface is safe to use */
b74f3fdd 2155static int __devinit it87_check_pwm(struct device *dev)
1da177e4 2156{
b74f3fdd 2157 struct it87_data *data = dev_get_drvdata(dev);
4a0d71cf
GR
2158 /*
2159 * Some BIOSes fail to correctly configure the IT87 fans. All fans off
1da177e4 2160 * and polarity set to active low is sign that this is the case so we
4a0d71cf
GR
2161 * disable pwm control to protect the user.
2162 */
b74f3fdd 2163 int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
1da177e4
LT
2164 if ((tmp & 0x87) == 0) {
2165 if (fix_pwm_polarity) {
4a0d71cf
GR
2166 /*
2167 * The user asks us to attempt a chip reconfiguration.
1da177e4 2168 * This means switching to active high polarity and
4a0d71cf
GR
2169 * inverting all fan speed values.
2170 */
1da177e4
LT
2171 int i;
2172 u8 pwm[3];
2173
2174 for (i = 0; i < 3; i++)
b74f3fdd 2175 pwm[i] = it87_read_value(data,
1da177e4
LT
2176 IT87_REG_PWM(i));
2177
4a0d71cf
GR
2178 /*
2179 * If any fan is in automatic pwm mode, the polarity
1da177e4
LT
2180 * might be correct, as suspicious as it seems, so we
2181 * better don't change anything (but still disable the
4a0d71cf
GR
2182 * PWM interface).
2183 */
1da177e4 2184 if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
b74f3fdd 2185 dev_info(dev, "Reconfiguring PWM to "
1da177e4 2186 "active high polarity\n");
b74f3fdd 2187 it87_write_value(data, IT87_REG_FAN_CTL,
1da177e4
LT
2188 tmp | 0x87);
2189 for (i = 0; i < 3; i++)
b74f3fdd 2190 it87_write_value(data,
1da177e4
LT
2191 IT87_REG_PWM(i),
2192 0x7f & ~pwm[i]);
2193 return 1;
2194 }
2195
b74f3fdd 2196 dev_info(dev, "PWM configuration is "
1da177e4
LT
2197 "too broken to be fixed\n");
2198 }
2199
b74f3fdd 2200 dev_info(dev, "Detected broken BIOS "
1da177e4
LT
2201 "defaults, disabling PWM interface\n");
2202 return 0;
2203 } else if (fix_pwm_polarity) {
b74f3fdd 2204 dev_info(dev, "PWM configuration looks "
1da177e4
LT
2205 "sane, won't touch\n");
2206 }
2207
2208 return 1;
2209}
2210
2211/* Called when we have found a new IT87. */
b74f3fdd 2212static void __devinit it87_init_device(struct platform_device *pdev)
1da177e4 2213{
591ec650 2214 struct it87_sio_data *sio_data = pdev->dev.platform_data;
b74f3fdd 2215 struct it87_data *data = platform_get_drvdata(pdev);
1da177e4 2216 int tmp, i;
591ec650 2217 u8 mask;
1da177e4 2218
4a0d71cf
GR
2219 /*
2220 * For each PWM channel:
b99883dc
JD
2221 * - If it is in automatic mode, setting to manual mode should set
2222 * the fan to full speed by default.
2223 * - If it is in manual mode, we need a mapping to temperature
2224 * channels to use when later setting to automatic mode later.
2225 * Use a 1:1 mapping by default (we are clueless.)
2226 * In both cases, the value can (and should) be changed by the user
6229cdb2
JD
2227 * prior to switching to a different mode.
2228 * Note that this is no longer needed for the IT8721F and later, as
2229 * these have separate registers for the temperature mapping and the
4a0d71cf
GR
2230 * manual duty cycle.
2231 */
1da177e4 2232 for (i = 0; i < 3; i++) {
b99883dc
JD
2233 data->pwm_temp_map[i] = i;
2234 data->pwm_duty[i] = 0x7f; /* Full speed */
4f3f51bc 2235 data->auto_pwm[i][3] = 0x7f; /* Full speed, hard-coded */
1da177e4
LT
2236 }
2237
4a0d71cf
GR
2238 /*
2239 * Some chips seem to have default value 0xff for all limit
c5df9b7a
JD
2240 * registers. For low voltage limits it makes no sense and triggers
2241 * alarms, so change to 0 instead. For high temperature limits, it
2242 * means -1 degree C, which surprisingly doesn't trigger an alarm,
4a0d71cf
GR
2243 * but is still confusing, so change to 127 degrees C.
2244 */
c5df9b7a 2245 for (i = 0; i < 8; i++) {
b74f3fdd 2246 tmp = it87_read_value(data, IT87_REG_VIN_MIN(i));
c5df9b7a 2247 if (tmp == 0xff)
b74f3fdd 2248 it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
c5df9b7a
JD
2249 }
2250 for (i = 0; i < 3; i++) {
b74f3fdd 2251 tmp = it87_read_value(data, IT87_REG_TEMP_HIGH(i));
c5df9b7a 2252 if (tmp == 0xff)
b74f3fdd 2253 it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127);
c5df9b7a
JD
2254 }
2255
4a0d71cf
GR
2256 /*
2257 * Temperature channels are not forcibly enabled, as they can be
a00afb97
JD
2258 * set to two different sensor types and we can't guess which one
2259 * is correct for a given system. These channels can be enabled at
4a0d71cf
GR
2260 * run-time through the temp{1-3}_type sysfs accessors if needed.
2261 */
1da177e4
LT
2262
2263 /* Check if voltage monitors are reset manually or by some reason */
b74f3fdd 2264 tmp = it87_read_value(data, IT87_REG_VIN_ENABLE);
1da177e4
LT
2265 if ((tmp & 0xff) == 0) {
2266 /* Enable all voltage monitors */
b74f3fdd 2267 it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
1da177e4
LT
2268 }
2269
2270 /* Check if tachometers are reset manually or by some reason */
591ec650 2271 mask = 0x70 & ~(sio_data->skip_fan << 4);
b74f3fdd 2272 data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
591ec650 2273 if ((data->fan_main_ctrl & mask) == 0) {
1da177e4 2274 /* Enable all fan tachometers */
591ec650 2275 data->fan_main_ctrl |= mask;
5f2dc798
JD
2276 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
2277 data->fan_main_ctrl);
1da177e4 2278 }
9060f8bd 2279 data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
1da177e4 2280
17d648bf 2281 /* Set tachometers to 16-bit mode if needed */
0475169c 2282 if (has_16bit_fans(data)) {
b74f3fdd 2283 tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
9060f8bd 2284 if (~tmp & 0x07 & data->has_fan) {
b74f3fdd 2285 dev_dbg(&pdev->dev,
17d648bf 2286 "Setting fan1-3 to 16-bit mode\n");
b74f3fdd 2287 it87_write_value(data, IT87_REG_FAN_16BIT,
17d648bf
JD
2288 tmp | 0x07);
2289 }
0531d98b
GR
2290 /* IT8705F, IT8782F, and IT8783E/F only support three fans. */
2291 if (data->type != it87 && data->type != it8782 &&
2292 data->type != it8783) {
816d8c6a
AP
2293 if (tmp & (1 << 4))
2294 data->has_fan |= (1 << 3); /* fan4 enabled */
2295 if (tmp & (1 << 5))
2296 data->has_fan |= (1 << 4); /* fan5 enabled */
2297 }
17d648bf
JD
2298 }
2299
591ec650
JD
2300 /* Fan input pins may be used for alternative functions */
2301 data->has_fan &= ~sio_data->skip_fan;
2302
1da177e4 2303 /* Start monitoring */
b74f3fdd 2304 it87_write_value(data, IT87_REG_CONFIG,
2305 (it87_read_value(data, IT87_REG_CONFIG) & 0x36)
1da177e4
LT
2306 | (update_vbat ? 0x41 : 0x01));
2307}
2308
b99883dc
JD
2309static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
2310{
2311 data->pwm_ctrl[nr] = it87_read_value(data, IT87_REG_PWM(nr));
16b5dda2 2312 if (has_newer_autopwm(data)) {
b99883dc 2313 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
6229cdb2
JD
2314 data->pwm_duty[nr] = it87_read_value(data,
2315 IT87_REG_PWM_DUTY(nr));
2316 } else {
2317 if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */
2318 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
2319 else /* Manual mode */
2320 data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f;
2321 }
4f3f51bc
JD
2322
2323 if (has_old_autopwm(data)) {
2324 int i;
2325
2326 for (i = 0; i < 5 ; i++)
2327 data->auto_temp[nr][i] = it87_read_value(data,
2328 IT87_REG_AUTO_TEMP(nr, i));
2329 for (i = 0; i < 3 ; i++)
2330 data->auto_pwm[nr][i] = it87_read_value(data,
2331 IT87_REG_AUTO_PWM(nr, i));
2332 }
b99883dc
JD
2333}
2334
1da177e4
LT
2335static struct it87_data *it87_update_device(struct device *dev)
2336{
b74f3fdd 2337 struct it87_data *data = dev_get_drvdata(dev);
1da177e4
LT
2338 int i;
2339
9a61bf63 2340 mutex_lock(&data->update_lock);
1da177e4
LT
2341
2342 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
2343 || !data->valid) {
1da177e4 2344 if (update_vbat) {
4a0d71cf
GR
2345 /*
2346 * Cleared after each update, so reenable. Value
2347 * returned by this read will be previous value
2348 */
b74f3fdd 2349 it87_write_value(data, IT87_REG_CONFIG,
5f2dc798 2350 it87_read_value(data, IT87_REG_CONFIG) | 0x40);
1da177e4
LT
2351 }
2352 for (i = 0; i <= 7; i++) {
2353 data->in[i] =
5f2dc798 2354 it87_read_value(data, IT87_REG_VIN(i));
1da177e4 2355 data->in_min[i] =
5f2dc798 2356 it87_read_value(data, IT87_REG_VIN_MIN(i));
1da177e4 2357 data->in_max[i] =
5f2dc798 2358 it87_read_value(data, IT87_REG_VIN_MAX(i));
1da177e4 2359 }
3543a53f 2360 /* in8 (battery) has no limit registers */
5f2dc798 2361 data->in[8] = it87_read_value(data, IT87_REG_VIN(8));
1da177e4 2362
c7f1f716 2363 for (i = 0; i < 5; i++) {
9060f8bd
JD
2364 /* Skip disabled fans */
2365 if (!(data->has_fan & (1 << i)))
2366 continue;
2367
1da177e4 2368 data->fan_min[i] =
5f2dc798 2369 it87_read_value(data, IT87_REG_FAN_MIN[i]);
b74f3fdd 2370 data->fan[i] = it87_read_value(data,
c7f1f716 2371 IT87_REG_FAN[i]);
17d648bf 2372 /* Add high byte if in 16-bit mode */
0475169c 2373 if (has_16bit_fans(data)) {
b74f3fdd 2374 data->fan[i] |= it87_read_value(data,
c7f1f716 2375 IT87_REG_FANX[i]) << 8;
b74f3fdd 2376 data->fan_min[i] |= it87_read_value(data,
c7f1f716 2377 IT87_REG_FANX_MIN[i]) << 8;
17d648bf 2378 }
1da177e4
LT
2379 }
2380 for (i = 0; i < 3; i++) {
2381 data->temp[i] =
5f2dc798 2382 it87_read_value(data, IT87_REG_TEMP(i));
1da177e4 2383 data->temp_high[i] =
5f2dc798 2384 it87_read_value(data, IT87_REG_TEMP_HIGH(i));
1da177e4 2385 data->temp_low[i] =
5f2dc798 2386 it87_read_value(data, IT87_REG_TEMP_LOW(i));
1da177e4
LT
2387 }
2388
17d648bf 2389 /* Newer chips don't have clock dividers */
0475169c 2390 if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
b74f3fdd 2391 i = it87_read_value(data, IT87_REG_FAN_DIV);
17d648bf
JD
2392 data->fan_div[0] = i & 0x07;
2393 data->fan_div[1] = (i >> 3) & 0x07;
2394 data->fan_div[2] = (i & 0x40) ? 3 : 1;
2395 }
1da177e4
LT
2396
2397 data->alarms =
b74f3fdd 2398 it87_read_value(data, IT87_REG_ALARM1) |
2399 (it87_read_value(data, IT87_REG_ALARM2) << 8) |
2400 (it87_read_value(data, IT87_REG_ALARM3) << 16);
d9b327c3 2401 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
b99883dc 2402
b74f3fdd 2403 data->fan_main_ctrl = it87_read_value(data,
2404 IT87_REG_FAN_MAIN_CTRL);
2405 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
b99883dc
JD
2406 for (i = 0; i < 3; i++)
2407 it87_update_pwm_ctrl(data, i);
b74f3fdd 2408
2409 data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
4a0d71cf
GR
2410 /*
2411 * The IT8705F does not have VID capability.
2412 * The IT8718F and later don't use IT87_REG_VID for the
2413 * same purpose.
2414 */
17d648bf 2415 if (data->type == it8712 || data->type == it8716) {
b74f3fdd 2416 data->vid = it87_read_value(data, IT87_REG_VID);
4a0d71cf
GR
2417 /*
2418 * The older IT8712F revisions had only 5 VID pins,
2419 * but we assume it is always safe to read 6 bits.
2420 */
17d648bf 2421 data->vid &= 0x3f;
1da177e4
LT
2422 }
2423 data->last_updated = jiffies;
2424 data->valid = 1;
2425 }
2426
9a61bf63 2427 mutex_unlock(&data->update_lock);
1da177e4
LT
2428
2429 return data;
2430}
2431
b74f3fdd 2432static int __init it87_device_add(unsigned short address,
2433 const struct it87_sio_data *sio_data)
2434{
2435 struct resource res = {
87b4b663
BH
2436 .start = address + IT87_EC_OFFSET,
2437 .end = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1,
b74f3fdd 2438 .name = DRVNAME,
2439 .flags = IORESOURCE_IO,
2440 };
2441 int err;
2442
b9acb64a
JD
2443 err = acpi_check_resource_conflict(&res);
2444 if (err)
2445 goto exit;
2446
b74f3fdd 2447 pdev = platform_device_alloc(DRVNAME, address);
2448 if (!pdev) {
2449 err = -ENOMEM;
a8ca1037 2450 pr_err("Device allocation failed\n");
b74f3fdd 2451 goto exit;
2452 }
2453
2454 err = platform_device_add_resources(pdev, &res, 1);
2455 if (err) {
a8ca1037 2456 pr_err("Device resource addition failed (%d)\n", err);
b74f3fdd 2457 goto exit_device_put;
2458 }
2459
2460 err = platform_device_add_data(pdev, sio_data,
2461 sizeof(struct it87_sio_data));
2462 if (err) {
a8ca1037 2463 pr_err("Platform data allocation failed\n");
b74f3fdd 2464 goto exit_device_put;
2465 }
2466
2467 err = platform_device_add(pdev);
2468 if (err) {
a8ca1037 2469 pr_err("Device addition failed (%d)\n", err);
b74f3fdd 2470 goto exit_device_put;
2471 }
2472
2473 return 0;
2474
2475exit_device_put:
2476 platform_device_put(pdev);
2477exit:
2478 return err;
2479}
2480
1da177e4
LT
2481static int __init sm_it87_init(void)
2482{
b74f3fdd 2483 int err;
5f2dc798 2484 unsigned short isa_address = 0;
b74f3fdd 2485 struct it87_sio_data sio_data;
2486
98dd22c3 2487 memset(&sio_data, 0, sizeof(struct it87_sio_data));
b74f3fdd 2488 err = it87_find(&isa_address, &sio_data);
2489 if (err)
2490 return err;
2491 err = platform_driver_register(&it87_driver);
2492 if (err)
2493 return err;
fde09509 2494
b74f3fdd 2495 err = it87_device_add(isa_address, &sio_data);
5f2dc798 2496 if (err) {
b74f3fdd 2497 platform_driver_unregister(&it87_driver);
2498 return err;
2499 }
2500
2501 return 0;
1da177e4
LT
2502}
2503
2504static void __exit sm_it87_exit(void)
2505{
b74f3fdd 2506 platform_device_unregister(pdev);
2507 platform_driver_unregister(&it87_driver);
1da177e4
LT
2508}
2509
2510
f1d8e332 2511MODULE_AUTHOR("Chris Gauthron, "
b19367c6 2512 "Jean Delvare <khali@linux-fr.org>");
44c1bcd4 2513MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver");
1da177e4
LT
2514module_param(update_vbat, bool, 0);
2515MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
2516module_param(fix_pwm_polarity, bool, 0);
5f2dc798
JD
2517MODULE_PARM_DESC(fix_pwm_polarity,
2518 "Force PWM polarity to active high (DANGEROUS)");
1da177e4
LT
2519MODULE_LICENSE("GPL");
2520
2521module_init(sm_it87_init);
2522module_exit(sm_it87_exit);