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Commit | Line | Data |
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1da177e4 | 1 | /* |
5f2dc798 JD |
2 | * it87.c - Part of lm_sensors, Linux kernel modules for hardware |
3 | * monitoring. | |
4 | * | |
5 | * The IT8705F is an LPC-based Super I/O part that contains UARTs, a | |
6 | * parallel port, an IR port, a MIDI port, a floppy controller, etc., in | |
7 | * addition to an Environment Controller (Enhanced Hardware Monitor and | |
8 | * Fan Controller) | |
9 | * | |
10 | * This driver supports only the Environment Controller in the IT8705F and | |
11 | * similar parts. The other devices are supported by different drivers. | |
12 | * | |
c145d5c6 | 13 | * Supports: IT8603E Super I/O chip w/LPC interface |
3ba9d977 | 14 | * IT8620E Super I/O chip w/LPC interface |
574e9bd8 | 15 | * IT8623E Super I/O chip w/LPC interface |
c145d5c6 | 16 | * IT8705F Super I/O chip w/LPC interface |
5f2dc798 JD |
17 | * IT8712F Super I/O chip w/LPC interface |
18 | * IT8716F Super I/O chip w/LPC interface | |
19 | * IT8718F Super I/O chip w/LPC interface | |
20 | * IT8720F Super I/O chip w/LPC interface | |
44c1bcd4 | 21 | * IT8721F Super I/O chip w/LPC interface |
5f2dc798 | 22 | * IT8726F Super I/O chip w/LPC interface |
16b5dda2 | 23 | * IT8728F Super I/O chip w/LPC interface |
ead80803 | 24 | * IT8732F Super I/O chip w/LPC interface |
44c1bcd4 | 25 | * IT8758E Super I/O chip w/LPC interface |
b0636707 GR |
26 | * IT8771E Super I/O chip w/LPC interface |
27 | * IT8772E Super I/O chip w/LPC interface | |
7bc32d29 | 28 | * IT8781F Super I/O chip w/LPC interface |
0531d98b GR |
29 | * IT8782F Super I/O chip w/LPC interface |
30 | * IT8783E/F Super I/O chip w/LPC interface | |
a0c1424a | 31 | * IT8786E Super I/O chip w/LPC interface |
4ee07157 | 32 | * IT8790E Super I/O chip w/LPC interface |
5f2dc798 JD |
33 | * Sis950 A clone of the IT8705F |
34 | * | |
35 | * Copyright (C) 2001 Chris Gauthron | |
7c81c60f | 36 | * Copyright (C) 2005-2010 Jean Delvare <jdelvare@suse.de> |
5f2dc798 JD |
37 | * |
38 | * This program is free software; you can redistribute it and/or modify | |
39 | * it under the terms of the GNU General Public License as published by | |
40 | * the Free Software Foundation; either version 2 of the License, or | |
41 | * (at your option) any later version. | |
42 | * | |
43 | * This program is distributed in the hope that it will be useful, | |
44 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
45 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
46 | * GNU General Public License for more details. | |
47 | * | |
48 | * You should have received a copy of the GNU General Public License | |
49 | * along with this program; if not, write to the Free Software | |
50 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
51 | */ | |
1da177e4 | 52 | |
a8ca1037 JP |
53 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
54 | ||
1da177e4 LT |
55 | #include <linux/module.h> |
56 | #include <linux/init.h> | |
57 | #include <linux/slab.h> | |
58 | #include <linux/jiffies.h> | |
b74f3fdd | 59 | #include <linux/platform_device.h> |
943b0830 | 60 | #include <linux/hwmon.h> |
303760b4 JD |
61 | #include <linux/hwmon-sysfs.h> |
62 | #include <linux/hwmon-vid.h> | |
943b0830 | 63 | #include <linux/err.h> |
9a61bf63 | 64 | #include <linux/mutex.h> |
87808be4 | 65 | #include <linux/sysfs.h> |
98dd22c3 JD |
66 | #include <linux/string.h> |
67 | #include <linux/dmi.h> | |
b9acb64a | 68 | #include <linux/acpi.h> |
6055fae8 | 69 | #include <linux/io.h> |
1da177e4 | 70 | |
b74f3fdd | 71 | #define DRVNAME "it87" |
1da177e4 | 72 | |
ead80803 JM |
73 | enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8732, |
74 | it8771, it8772, it8781, it8782, it8783, it8786, it8790, it8603, | |
75 | it8620 }; | |
1da177e4 | 76 | |
67b671bc JD |
77 | static unsigned short force_id; |
78 | module_param(force_id, ushort, 0); | |
79 | MODULE_PARM_DESC(force_id, "Override the detected device ID"); | |
80 | ||
b74f3fdd | 81 | static struct platform_device *pdev; |
82 | ||
1da177e4 LT |
83 | #define REG 0x2e /* The register to read/write */ |
84 | #define DEV 0x07 /* Register: Logical device select */ | |
85 | #define VAL 0x2f /* The value to read/write */ | |
86 | #define PME 0x04 /* The device with the fan registers in it */ | |
b4da93e4 JMS |
87 | |
88 | /* The device with the IT8718F/IT8720F VID value in it */ | |
89 | #define GPIO 0x07 | |
90 | ||
1da177e4 LT |
91 | #define DEVID 0x20 /* Register: Device ID */ |
92 | #define DEVREV 0x22 /* Register: Device Revision */ | |
93 | ||
5b0380c9 | 94 | static inline int superio_inb(int reg) |
1da177e4 LT |
95 | { |
96 | outb(reg, REG); | |
97 | return inb(VAL); | |
98 | } | |
99 | ||
5b0380c9 | 100 | static inline void superio_outb(int reg, int val) |
436cad2a JD |
101 | { |
102 | outb(reg, REG); | |
103 | outb(val, VAL); | |
104 | } | |
105 | ||
1da177e4 LT |
106 | static int superio_inw(int reg) |
107 | { | |
108 | int val; | |
109 | outb(reg++, REG); | |
110 | val = inb(VAL) << 8; | |
111 | outb(reg, REG); | |
112 | val |= inb(VAL); | |
113 | return val; | |
114 | } | |
115 | ||
5b0380c9 | 116 | static inline void superio_select(int ldn) |
1da177e4 LT |
117 | { |
118 | outb(DEV, REG); | |
87673dd7 | 119 | outb(ldn, VAL); |
1da177e4 LT |
120 | } |
121 | ||
5b0380c9 | 122 | static inline int superio_enter(void) |
1da177e4 | 123 | { |
5b0380c9 NG |
124 | /* |
125 | * Try to reserve REG and REG + 1 for exclusive access. | |
126 | */ | |
127 | if (!request_muxed_region(REG, 2, DRVNAME)) | |
128 | return -EBUSY; | |
129 | ||
1da177e4 LT |
130 | outb(0x87, REG); |
131 | outb(0x01, REG); | |
132 | outb(0x55, REG); | |
133 | outb(0x55, REG); | |
5b0380c9 | 134 | return 0; |
1da177e4 LT |
135 | } |
136 | ||
5b0380c9 | 137 | static inline void superio_exit(void) |
1da177e4 LT |
138 | { |
139 | outb(0x02, REG); | |
140 | outb(0x02, VAL); | |
5b0380c9 | 141 | release_region(REG, 2); |
1da177e4 LT |
142 | } |
143 | ||
87673dd7 | 144 | /* Logical device 4 registers */ |
1da177e4 LT |
145 | #define IT8712F_DEVID 0x8712 |
146 | #define IT8705F_DEVID 0x8705 | |
17d648bf | 147 | #define IT8716F_DEVID 0x8716 |
87673dd7 | 148 | #define IT8718F_DEVID 0x8718 |
b4da93e4 | 149 | #define IT8720F_DEVID 0x8720 |
44c1bcd4 | 150 | #define IT8721F_DEVID 0x8721 |
08a8f6e9 | 151 | #define IT8726F_DEVID 0x8726 |
16b5dda2 | 152 | #define IT8728F_DEVID 0x8728 |
ead80803 | 153 | #define IT8732F_DEVID 0x8732 |
b0636707 GR |
154 | #define IT8771E_DEVID 0x8771 |
155 | #define IT8772E_DEVID 0x8772 | |
7bc32d29 | 156 | #define IT8781F_DEVID 0x8781 |
0531d98b GR |
157 | #define IT8782F_DEVID 0x8782 |
158 | #define IT8783E_DEVID 0x8783 | |
a0c1424a | 159 | #define IT8786E_DEVID 0x8786 |
4ee07157 | 160 | #define IT8790E_DEVID 0x8790 |
7183ae8c | 161 | #define IT8603E_DEVID 0x8603 |
3ba9d977 | 162 | #define IT8620E_DEVID 0x8620 |
574e9bd8 | 163 | #define IT8623E_DEVID 0x8623 |
1da177e4 LT |
164 | #define IT87_ACT_REG 0x30 |
165 | #define IT87_BASE_REG 0x60 | |
166 | ||
87673dd7 | 167 | /* Logical device 7 registers (IT8712F and later) */ |
0531d98b | 168 | #define IT87_SIO_GPIO1_REG 0x25 |
3ba9d977 | 169 | #define IT87_SIO_GPIO2_REG 0x26 |
895ff267 | 170 | #define IT87_SIO_GPIO3_REG 0x27 |
591ec650 | 171 | #define IT87_SIO_GPIO5_REG 0x29 |
0531d98b | 172 | #define IT87_SIO_PINX1_REG 0x2a /* Pin selection */ |
87673dd7 | 173 | #define IT87_SIO_PINX2_REG 0x2c /* Pin selection */ |
0531d98b | 174 | #define IT87_SIO_SPI_REG 0xef /* SPI function pin select */ |
87673dd7 | 175 | #define IT87_SIO_VID_REG 0xfc /* VID value */ |
d9b327c3 | 176 | #define IT87_SIO_BEEP_PIN_REG 0xf6 /* Beep pin mapping */ |
87673dd7 | 177 | |
1da177e4 | 178 | /* Update battery voltage after every reading if true */ |
90ab5ee9 | 179 | static bool update_vbat; |
1da177e4 LT |
180 | |
181 | /* Not all BIOSes properly configure the PWM registers */ | |
90ab5ee9 | 182 | static bool fix_pwm_polarity; |
1da177e4 | 183 | |
1da177e4 LT |
184 | /* Many IT87 constants specified below */ |
185 | ||
186 | /* Length of ISA address segment */ | |
187 | #define IT87_EXTENT 8 | |
188 | ||
87b4b663 BH |
189 | /* Length of ISA address segment for Environmental Controller */ |
190 | #define IT87_EC_EXTENT 2 | |
191 | ||
192 | /* Offset of EC registers from ISA base address */ | |
193 | #define IT87_EC_OFFSET 5 | |
194 | ||
195 | /* Where are the ISA address/data registers relative to the EC base address */ | |
196 | #define IT87_ADDR_REG_OFFSET 0 | |
197 | #define IT87_DATA_REG_OFFSET 1 | |
1da177e4 LT |
198 | |
199 | /*----- The IT87 registers -----*/ | |
200 | ||
201 | #define IT87_REG_CONFIG 0x00 | |
202 | ||
203 | #define IT87_REG_ALARM1 0x01 | |
204 | #define IT87_REG_ALARM2 0x02 | |
205 | #define IT87_REG_ALARM3 0x03 | |
206 | ||
4a0d71cf GR |
207 | /* |
208 | * The IT8718F and IT8720F have the VID value in a different register, in | |
209 | * Super-I/O configuration space. | |
210 | */ | |
1da177e4 | 211 | #define IT87_REG_VID 0x0a |
4a0d71cf GR |
212 | /* |
213 | * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b | |
214 | * for fan divisors. Later IT8712F revisions must use 16-bit tachometer | |
215 | * mode. | |
216 | */ | |
1da177e4 | 217 | #define IT87_REG_FAN_DIV 0x0b |
17d648bf | 218 | #define IT87_REG_FAN_16BIT 0x0c |
1da177e4 LT |
219 | |
220 | /* Monitors: 9 voltage (0 to 7, battery), 3 temp (1 to 3), 3 fan (1 to 3) */ | |
221 | ||
fa3f70d6 GR |
222 | static const u8 IT87_REG_FAN[] = { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x4c }; |
223 | static const u8 IT87_REG_FAN_MIN[] = { 0x10, 0x11, 0x12, 0x84, 0x86, 0x4e }; | |
224 | static const u8 IT87_REG_FANX[] = { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x4d }; | |
225 | static const u8 IT87_REG_FANX_MIN[] = { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0x4f }; | |
226 | static const u8 IT87_REG_TEMP_OFFSET[] = { 0x56, 0x57, 0x59 }; | |
161d898a | 227 | |
1da177e4 LT |
228 | #define IT87_REG_FAN_MAIN_CTRL 0x13 |
229 | #define IT87_REG_FAN_CTL 0x14 | |
230 | #define IT87_REG_PWM(nr) (0x15 + (nr)) | |
6229cdb2 | 231 | #define IT87_REG_PWM_DUTY(nr) (0x63 + (nr) * 8) |
1da177e4 LT |
232 | |
233 | #define IT87_REG_VIN(nr) (0x20 + (nr)) | |
234 | #define IT87_REG_TEMP(nr) (0x29 + (nr)) | |
235 | ||
73055405 GR |
236 | #define IT87_REG_AVCC3 0x2f |
237 | ||
1da177e4 LT |
238 | #define IT87_REG_VIN_MAX(nr) (0x30 + (nr) * 2) |
239 | #define IT87_REG_VIN_MIN(nr) (0x31 + (nr) * 2) | |
240 | #define IT87_REG_TEMP_HIGH(nr) (0x40 + (nr) * 2) | |
241 | #define IT87_REG_TEMP_LOW(nr) (0x41 + (nr) * 2) | |
242 | ||
1da177e4 LT |
243 | #define IT87_REG_VIN_ENABLE 0x50 |
244 | #define IT87_REG_TEMP_ENABLE 0x51 | |
4573acbc | 245 | #define IT87_REG_TEMP_EXTRA 0x55 |
d9b327c3 | 246 | #define IT87_REG_BEEP_ENABLE 0x5c |
1da177e4 LT |
247 | |
248 | #define IT87_REG_CHIPID 0x58 | |
249 | ||
4f3f51bc JD |
250 | #define IT87_REG_AUTO_TEMP(nr, i) (0x60 + (nr) * 8 + (i)) |
251 | #define IT87_REG_AUTO_PWM(nr, i) (0x65 + (nr) * 8 + (i)) | |
252 | ||
483db43e GR |
253 | struct it87_devices { |
254 | const char *name; | |
faf392fb | 255 | const char * const suffix; |
483db43e | 256 | u16 features; |
19529784 GR |
257 | u8 peci_mask; |
258 | u8 old_peci_mask; | |
483db43e GR |
259 | }; |
260 | ||
261 | #define FEAT_12MV_ADC (1 << 0) | |
262 | #define FEAT_NEWER_AUTOPWM (1 << 1) | |
263 | #define FEAT_OLD_AUTOPWM (1 << 2) | |
264 | #define FEAT_16BIT_FANS (1 << 3) | |
265 | #define FEAT_TEMP_OFFSET (1 << 4) | |
5d8d2f2b | 266 | #define FEAT_TEMP_PECI (1 << 5) |
19529784 | 267 | #define FEAT_TEMP_OLD_PECI (1 << 6) |
9faf28ca GR |
268 | #define FEAT_FAN16_CONFIG (1 << 7) /* Need to enable 16-bit fans */ |
269 | #define FEAT_FIVE_FANS (1 << 8) /* Supports five fans */ | |
32dd7c40 | 270 | #define FEAT_VID (1 << 9) /* Set if chip supports VID */ |
7f5726c3 | 271 | #define FEAT_IN7_INTERNAL (1 << 10) /* Set if in7 is internal */ |
fa3f70d6 | 272 | #define FEAT_SIX_FANS (1 << 11) /* Supports six fans */ |
ead80803 | 273 | #define FEAT_10_9MV_ADC (1 << 12) |
73055405 | 274 | #define FEAT_AVCC3 (1 << 13) /* Chip supports in9/AVCC3 */ |
483db43e GR |
275 | |
276 | static const struct it87_devices it87_devices[] = { | |
277 | [it87] = { | |
278 | .name = "it87", | |
faf392fb | 279 | .suffix = "F", |
483db43e GR |
280 | .features = FEAT_OLD_AUTOPWM, /* may need to overwrite */ |
281 | }, | |
282 | [it8712] = { | |
283 | .name = "it8712", | |
faf392fb | 284 | .suffix = "F", |
32dd7c40 GR |
285 | .features = FEAT_OLD_AUTOPWM | FEAT_VID, |
286 | /* may need to overwrite */ | |
483db43e GR |
287 | }, |
288 | [it8716] = { | |
289 | .name = "it8716", | |
faf392fb | 290 | .suffix = "F", |
32dd7c40 | 291 | .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID |
9faf28ca | 292 | | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS, |
483db43e GR |
293 | }, |
294 | [it8718] = { | |
295 | .name = "it8718", | |
faf392fb | 296 | .suffix = "F", |
32dd7c40 | 297 | .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID |
9faf28ca | 298 | | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS, |
19529784 | 299 | .old_peci_mask = 0x4, |
483db43e GR |
300 | }, |
301 | [it8720] = { | |
302 | .name = "it8720", | |
faf392fb | 303 | .suffix = "F", |
32dd7c40 | 304 | .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID |
9faf28ca | 305 | | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS, |
19529784 | 306 | .old_peci_mask = 0x4, |
483db43e GR |
307 | }, |
308 | [it8721] = { | |
309 | .name = "it8721", | |
faf392fb | 310 | .suffix = "F", |
483db43e | 311 | .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS |
9faf28ca | 312 | | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI |
7f5726c3 | 313 | | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_IN7_INTERNAL, |
5d8d2f2b | 314 | .peci_mask = 0x05, |
19529784 | 315 | .old_peci_mask = 0x02, /* Actually reports PCH */ |
483db43e GR |
316 | }, |
317 | [it8728] = { | |
318 | .name = "it8728", | |
faf392fb | 319 | .suffix = "F", |
483db43e | 320 | .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS |
7f5726c3 GR |
321 | | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS |
322 | | FEAT_IN7_INTERNAL, | |
5d8d2f2b | 323 | .peci_mask = 0x07, |
483db43e | 324 | }, |
ead80803 JM |
325 | [it8732] = { |
326 | .name = "it8732", | |
327 | .suffix = "F", | |
328 | .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS | |
329 | | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI | |
330 | | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL, | |
331 | .peci_mask = 0x07, | |
332 | .old_peci_mask = 0x02, /* Actually reports PCH */ | |
333 | }, | |
b0636707 GR |
334 | [it8771] = { |
335 | .name = "it8771", | |
faf392fb | 336 | .suffix = "E", |
b0636707 | 337 | .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS |
7f5726c3 | 338 | | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL, |
9faf28ca GR |
339 | /* PECI: guesswork */ |
340 | /* 12mV ADC (OHM) */ | |
341 | /* 16 bit fans (OHM) */ | |
342 | /* three fans, always 16 bit (guesswork) */ | |
b0636707 GR |
343 | .peci_mask = 0x07, |
344 | }, | |
345 | [it8772] = { | |
346 | .name = "it8772", | |
faf392fb | 347 | .suffix = "E", |
b0636707 | 348 | .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS |
7f5726c3 | 349 | | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL, |
9faf28ca GR |
350 | /* PECI (coreboot) */ |
351 | /* 12mV ADC (HWSensors4, OHM) */ | |
352 | /* 16 bit fans (HWSensors4, OHM) */ | |
353 | /* three fans, always 16 bit (datasheet) */ | |
b0636707 GR |
354 | .peci_mask = 0x07, |
355 | }, | |
7bc32d29 GR |
356 | [it8781] = { |
357 | .name = "it8781", | |
faf392fb | 358 | .suffix = "F", |
7bc32d29 | 359 | .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET |
9faf28ca | 360 | | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG, |
7bc32d29 GR |
361 | .old_peci_mask = 0x4, |
362 | }, | |
483db43e GR |
363 | [it8782] = { |
364 | .name = "it8782", | |
faf392fb | 365 | .suffix = "F", |
19529784 | 366 | .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET |
9faf28ca | 367 | | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG, |
19529784 | 368 | .old_peci_mask = 0x4, |
483db43e GR |
369 | }, |
370 | [it8783] = { | |
371 | .name = "it8783", | |
faf392fb | 372 | .suffix = "E/F", |
19529784 | 373 | .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET |
9faf28ca | 374 | | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG, |
19529784 | 375 | .old_peci_mask = 0x4, |
483db43e | 376 | }, |
a0c1424a TL |
377 | [it8786] = { |
378 | .name = "it8786", | |
faf392fb | 379 | .suffix = "E", |
a0c1424a | 380 | .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS |
7f5726c3 | 381 | | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL, |
a0c1424a TL |
382 | .peci_mask = 0x07, |
383 | }, | |
4ee07157 GR |
384 | [it8790] = { |
385 | .name = "it8790", | |
386 | .suffix = "E", | |
387 | .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS | |
388 | | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL, | |
389 | .peci_mask = 0x07, | |
390 | }, | |
c145d5c6 RM |
391 | [it8603] = { |
392 | .name = "it8603", | |
faf392fb | 393 | .suffix = "E", |
c145d5c6 | 394 | .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS |
73055405 GR |
395 | | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL |
396 | | FEAT_AVCC3, | |
c145d5c6 RM |
397 | .peci_mask = 0x07, |
398 | }, | |
3ba9d977 GR |
399 | [it8620] = { |
400 | .name = "it8620", | |
401 | .suffix = "E", | |
402 | .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS | |
fa3f70d6 | 403 | | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS |
3ba9d977 GR |
404 | | FEAT_IN7_INTERNAL, |
405 | .peci_mask = 0x07, | |
406 | }, | |
483db43e GR |
407 | }; |
408 | ||
409 | #define has_16bit_fans(data) ((data)->features & FEAT_16BIT_FANS) | |
410 | #define has_12mv_adc(data) ((data)->features & FEAT_12MV_ADC) | |
ead80803 | 411 | #define has_10_9mv_adc(data) ((data)->features & FEAT_10_9MV_ADC) |
483db43e GR |
412 | #define has_newer_autopwm(data) ((data)->features & FEAT_NEWER_AUTOPWM) |
413 | #define has_old_autopwm(data) ((data)->features & FEAT_OLD_AUTOPWM) | |
414 | #define has_temp_offset(data) ((data)->features & FEAT_TEMP_OFFSET) | |
5d8d2f2b GR |
415 | #define has_temp_peci(data, nr) (((data)->features & FEAT_TEMP_PECI) && \ |
416 | ((data)->peci_mask & (1 << nr))) | |
19529784 GR |
417 | #define has_temp_old_peci(data, nr) \ |
418 | (((data)->features & FEAT_TEMP_OLD_PECI) && \ | |
419 | ((data)->old_peci_mask & (1 << nr))) | |
9faf28ca | 420 | #define has_fan16_config(data) ((data)->features & FEAT_FAN16_CONFIG) |
fa3f70d6 GR |
421 | #define has_five_fans(data) ((data)->features & (FEAT_FIVE_FANS | \ |
422 | FEAT_SIX_FANS)) | |
32dd7c40 | 423 | #define has_vid(data) ((data)->features & FEAT_VID) |
7f5726c3 | 424 | #define has_in7_internal(data) ((data)->features & FEAT_IN7_INTERNAL) |
fa3f70d6 | 425 | #define has_six_fans(data) ((data)->features & FEAT_SIX_FANS) |
73055405 | 426 | #define has_avcc3(data) ((data)->features & FEAT_AVCC3) |
1da177e4 | 427 | |
b74f3fdd | 428 | struct it87_sio_data { |
429 | enum chips type; | |
430 | /* Values read from Super-I/O config space */ | |
0475169c | 431 | u8 revision; |
b74f3fdd | 432 | u8 vid_value; |
d9b327c3 | 433 | u8 beep_pin; |
738e5e05 | 434 | u8 internal; /* Internal sensors can be labeled */ |
591ec650 | 435 | /* Features skipped based on config or DMI */ |
9172b5d1 | 436 | u16 skip_in; |
895ff267 | 437 | u8 skip_vid; |
591ec650 | 438 | u8 skip_fan; |
98dd22c3 | 439 | u8 skip_pwm; |
4573acbc | 440 | u8 skip_temp; |
b74f3fdd | 441 | }; |
442 | ||
4a0d71cf GR |
443 | /* |
444 | * For each registered chip, we need to keep some data in memory. | |
445 | * The structure is dynamically allocated. | |
446 | */ | |
1da177e4 | 447 | struct it87_data { |
1beeffe4 | 448 | struct device *hwmon_dev; |
1da177e4 | 449 | enum chips type; |
483db43e | 450 | u16 features; |
19529784 GR |
451 | u8 peci_mask; |
452 | u8 old_peci_mask; | |
1da177e4 | 453 | |
b74f3fdd | 454 | unsigned short addr; |
455 | const char *name; | |
9a61bf63 | 456 | struct mutex update_lock; |
1da177e4 LT |
457 | char valid; /* !=0 if following fields are valid */ |
458 | unsigned long last_updated; /* In jiffies */ | |
459 | ||
44c1bcd4 | 460 | u16 in_scaled; /* Internal voltage sensors are scaled */ |
c145d5c6 | 461 | u8 in[10][3]; /* [nr][0]=in, [1]=min, [2]=max */ |
9060f8bd | 462 | u8 has_fan; /* Bitfield, fans enabled */ |
fa3f70d6 | 463 | u16 fan[6][2]; /* Register values, [nr][0]=fan, [1]=min */ |
4573acbc | 464 | u8 has_temp; /* Bitfield, temp sensors enabled */ |
161d898a | 465 | s8 temp[3][4]; /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */ |
19529784 GR |
466 | u8 sensor; /* Register value (IT87_REG_TEMP_ENABLE) */ |
467 | u8 extra; /* Register value (IT87_REG_TEMP_EXTRA) */ | |
1da177e4 LT |
468 | u8 fan_div[3]; /* Register encoding, shifted right */ |
469 | u8 vid; /* Register encoding, combined */ | |
a7be58a1 | 470 | u8 vrm; |
1da177e4 | 471 | u32 alarms; /* Register encoding, combined */ |
d9b327c3 | 472 | u8 beeps; /* Register encoding */ |
1da177e4 | 473 | u8 fan_main_ctrl; /* Register value */ |
f8d0c19a | 474 | u8 fan_ctl; /* Register value */ |
b99883dc | 475 | |
4a0d71cf GR |
476 | /* |
477 | * The following 3 arrays correspond to the same registers up to | |
6229cdb2 JD |
478 | * the IT8720F. The meaning of bits 6-0 depends on the value of bit |
479 | * 7, and we want to preserve settings on mode changes, so we have | |
480 | * to track all values separately. | |
481 | * Starting with the IT8721F, the manual PWM duty cycles are stored | |
482 | * in separate registers (8-bit values), so the separate tracking | |
483 | * is no longer needed, but it is still done to keep the driver | |
4a0d71cf GR |
484 | * simple. |
485 | */ | |
b99883dc | 486 | u8 pwm_ctrl[3]; /* Register value */ |
6229cdb2 | 487 | u8 pwm_duty[3]; /* Manual PWM value set by user */ |
b99883dc | 488 | u8 pwm_temp_map[3]; /* PWM to temp. chan. mapping (bits 1-0) */ |
4f3f51bc JD |
489 | |
490 | /* Automatic fan speed control registers */ | |
491 | u8 auto_pwm[3][4]; /* [nr][3] is hard-coded */ | |
492 | s8 auto_temp[3][5]; /* [nr][0] is point1_temp_hyst */ | |
1da177e4 | 493 | }; |
0df6454d | 494 | |
0531d98b | 495 | static int adc_lsb(const struct it87_data *data, int nr) |
44c1bcd4 | 496 | { |
ead80803 JM |
497 | int lsb; |
498 | ||
499 | if (has_12mv_adc(data)) | |
500 | lsb = 120; | |
501 | else if (has_10_9mv_adc(data)) | |
502 | lsb = 109; | |
503 | else | |
504 | lsb = 160; | |
0531d98b GR |
505 | if (data->in_scaled & (1 << nr)) |
506 | lsb <<= 1; | |
507 | return lsb; | |
508 | } | |
44c1bcd4 | 509 | |
0531d98b GR |
510 | static u8 in_to_reg(const struct it87_data *data, int nr, long val) |
511 | { | |
ead80803 | 512 | val = DIV_ROUND_CLOSEST(val * 10, adc_lsb(data, nr)); |
2a844c14 | 513 | return clamp_val(val, 0, 255); |
44c1bcd4 JD |
514 | } |
515 | ||
516 | static int in_from_reg(const struct it87_data *data, int nr, int val) | |
517 | { | |
ead80803 | 518 | return DIV_ROUND_CLOSEST(val * adc_lsb(data, nr), 10); |
44c1bcd4 | 519 | } |
0df6454d JD |
520 | |
521 | static inline u8 FAN_TO_REG(long rpm, int div) | |
522 | { | |
523 | if (rpm == 0) | |
524 | return 255; | |
2a844c14 GR |
525 | rpm = clamp_val(rpm, 1, 1000000); |
526 | return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254); | |
0df6454d JD |
527 | } |
528 | ||
529 | static inline u16 FAN16_TO_REG(long rpm) | |
530 | { | |
531 | if (rpm == 0) | |
532 | return 0xffff; | |
2a844c14 | 533 | return clamp_val((1350000 + rpm) / (rpm * 2), 1, 0xfffe); |
0df6454d JD |
534 | } |
535 | ||
536 | #define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \ | |
537 | 1350000 / ((val) * (div))) | |
538 | /* The divider is fixed to 2 in 16-bit mode */ | |
539 | #define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \ | |
540 | 1350000 / ((val) * 2)) | |
541 | ||
2a844c14 GR |
542 | #define TEMP_TO_REG(val) (clamp_val(((val) < 0 ? (((val) - 500) / 1000) : \ |
543 | ((val) + 500) / 1000), -128, 127)) | |
0df6454d JD |
544 | #define TEMP_FROM_REG(val) ((val) * 1000) |
545 | ||
44c1bcd4 JD |
546 | static u8 pwm_to_reg(const struct it87_data *data, long val) |
547 | { | |
16b5dda2 | 548 | if (has_newer_autopwm(data)) |
44c1bcd4 JD |
549 | return val; |
550 | else | |
551 | return val >> 1; | |
552 | } | |
553 | ||
554 | static int pwm_from_reg(const struct it87_data *data, u8 reg) | |
555 | { | |
16b5dda2 | 556 | if (has_newer_autopwm(data)) |
44c1bcd4 JD |
557 | return reg; |
558 | else | |
559 | return (reg & 0x7f) << 1; | |
560 | } | |
561 | ||
0df6454d JD |
562 | |
563 | static int DIV_TO_REG(int val) | |
564 | { | |
565 | int answer = 0; | |
566 | while (answer < 7 && (val >>= 1)) | |
567 | answer++; | |
568 | return answer; | |
569 | } | |
570 | #define DIV_FROM_REG(val) (1 << (val)) | |
571 | ||
f56c9c0a GR |
572 | /* |
573 | * PWM base frequencies. The frequency has to be divided by either 128 or 256, | |
574 | * depending on the chip type, to calculate the actual PWM frequency. | |
575 | * | |
576 | * Some of the chip datasheets suggest a base frequency of 51 kHz instead | |
577 | * of 750 kHz for the slowest base frequency, resulting in a PWM frequency | |
578 | * of 200 Hz. Sometimes both PWM frequency select registers are affected, | |
579 | * sometimes just one. It is unknown if this is a datasheet error or real, | |
580 | * so this is ignored for now. | |
581 | */ | |
0df6454d | 582 | static const unsigned int pwm_freq[8] = { |
f56c9c0a GR |
583 | 48000000, |
584 | 24000000, | |
585 | 12000000, | |
586 | 8000000, | |
587 | 6000000, | |
588 | 3000000, | |
589 | 1500000, | |
590 | 750000, | |
0df6454d | 591 | }; |
1da177e4 | 592 | |
b74f3fdd | 593 | static int it87_probe(struct platform_device *pdev); |
281dfd0b | 594 | static int it87_remove(struct platform_device *pdev); |
1da177e4 | 595 | |
b74f3fdd | 596 | static int it87_read_value(struct it87_data *data, u8 reg); |
597 | static void it87_write_value(struct it87_data *data, u8 reg, u8 value); | |
1da177e4 | 598 | static struct it87_data *it87_update_device(struct device *dev); |
b74f3fdd | 599 | static int it87_check_pwm(struct device *dev); |
600 | static void it87_init_device(struct platform_device *pdev); | |
1da177e4 LT |
601 | |
602 | ||
b74f3fdd | 603 | static struct platform_driver it87_driver = { |
cdaf7934 | 604 | .driver = { |
b74f3fdd | 605 | .name = DRVNAME, |
cdaf7934 | 606 | }, |
b74f3fdd | 607 | .probe = it87_probe, |
9e5e9b7a | 608 | .remove = it87_remove, |
fde09509 JD |
609 | }; |
610 | ||
20ad93d4 | 611 | static ssize_t show_in(struct device *dev, struct device_attribute *attr, |
929c6a56 | 612 | char *buf) |
1da177e4 | 613 | { |
929c6a56 GR |
614 | struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); |
615 | int nr = sattr->nr; | |
616 | int index = sattr->index; | |
20ad93d4 | 617 | |
1da177e4 | 618 | struct it87_data *data = it87_update_device(dev); |
929c6a56 | 619 | return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr][index])); |
1da177e4 LT |
620 | } |
621 | ||
929c6a56 GR |
622 | static ssize_t set_in(struct device *dev, struct device_attribute *attr, |
623 | const char *buf, size_t count) | |
1da177e4 | 624 | { |
929c6a56 GR |
625 | struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); |
626 | int nr = sattr->nr; | |
627 | int index = sattr->index; | |
20ad93d4 | 628 | |
b74f3fdd | 629 | struct it87_data *data = dev_get_drvdata(dev); |
f5f64501 JD |
630 | unsigned long val; |
631 | ||
179c4fdb | 632 | if (kstrtoul(buf, 10, &val) < 0) |
f5f64501 | 633 | return -EINVAL; |
1da177e4 | 634 | |
9a61bf63 | 635 | mutex_lock(&data->update_lock); |
929c6a56 GR |
636 | data->in[nr][index] = in_to_reg(data, nr, val); |
637 | it87_write_value(data, | |
638 | index == 1 ? IT87_REG_VIN_MIN(nr) | |
639 | : IT87_REG_VIN_MAX(nr), | |
640 | data->in[nr][index]); | |
9a61bf63 | 641 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
642 | return count; |
643 | } | |
20ad93d4 | 644 | |
929c6a56 GR |
645 | static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0); |
646 | static SENSOR_DEVICE_ATTR_2(in0_min, S_IRUGO | S_IWUSR, show_in, set_in, | |
647 | 0, 1); | |
648 | static SENSOR_DEVICE_ATTR_2(in0_max, S_IRUGO | S_IWUSR, show_in, set_in, | |
649 | 0, 2); | |
f5f64501 | 650 | |
929c6a56 GR |
651 | static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 1, 0); |
652 | static SENSOR_DEVICE_ATTR_2(in1_min, S_IRUGO | S_IWUSR, show_in, set_in, | |
653 | 1, 1); | |
654 | static SENSOR_DEVICE_ATTR_2(in1_max, S_IRUGO | S_IWUSR, show_in, set_in, | |
655 | 1, 2); | |
1da177e4 | 656 | |
929c6a56 GR |
657 | static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 2, 0); |
658 | static SENSOR_DEVICE_ATTR_2(in2_min, S_IRUGO | S_IWUSR, show_in, set_in, | |
659 | 2, 1); | |
660 | static SENSOR_DEVICE_ATTR_2(in2_max, S_IRUGO | S_IWUSR, show_in, set_in, | |
661 | 2, 2); | |
1da177e4 | 662 | |
929c6a56 GR |
663 | static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 3, 0); |
664 | static SENSOR_DEVICE_ATTR_2(in3_min, S_IRUGO | S_IWUSR, show_in, set_in, | |
665 | 3, 1); | |
666 | static SENSOR_DEVICE_ATTR_2(in3_max, S_IRUGO | S_IWUSR, show_in, set_in, | |
667 | 3, 2); | |
668 | ||
669 | static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 4, 0); | |
670 | static SENSOR_DEVICE_ATTR_2(in4_min, S_IRUGO | S_IWUSR, show_in, set_in, | |
671 | 4, 1); | |
672 | static SENSOR_DEVICE_ATTR_2(in4_max, S_IRUGO | S_IWUSR, show_in, set_in, | |
673 | 4, 2); | |
674 | ||
675 | static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 5, 0); | |
676 | static SENSOR_DEVICE_ATTR_2(in5_min, S_IRUGO | S_IWUSR, show_in, set_in, | |
677 | 5, 1); | |
678 | static SENSOR_DEVICE_ATTR_2(in5_max, S_IRUGO | S_IWUSR, show_in, set_in, | |
679 | 5, 2); | |
680 | ||
681 | static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 6, 0); | |
682 | static SENSOR_DEVICE_ATTR_2(in6_min, S_IRUGO | S_IWUSR, show_in, set_in, | |
683 | 6, 1); | |
684 | static SENSOR_DEVICE_ATTR_2(in6_max, S_IRUGO | S_IWUSR, show_in, set_in, | |
685 | 6, 2); | |
686 | ||
687 | static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 7, 0); | |
688 | static SENSOR_DEVICE_ATTR_2(in7_min, S_IRUGO | S_IWUSR, show_in, set_in, | |
689 | 7, 1); | |
690 | static SENSOR_DEVICE_ATTR_2(in7_max, S_IRUGO | S_IWUSR, show_in, set_in, | |
691 | 7, 2); | |
692 | ||
693 | static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 8, 0); | |
c145d5c6 | 694 | static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in, NULL, 9, 0); |
1da177e4 LT |
695 | |
696 | /* 3 temperatures */ | |
20ad93d4 | 697 | static ssize_t show_temp(struct device *dev, struct device_attribute *attr, |
60ca385a | 698 | char *buf) |
1da177e4 | 699 | { |
60ca385a GR |
700 | struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); |
701 | int nr = sattr->nr; | |
702 | int index = sattr->index; | |
1da177e4 | 703 | struct it87_data *data = it87_update_device(dev); |
20ad93d4 | 704 | |
60ca385a | 705 | return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index])); |
1da177e4 | 706 | } |
20ad93d4 | 707 | |
60ca385a GR |
708 | static ssize_t set_temp(struct device *dev, struct device_attribute *attr, |
709 | const char *buf, size_t count) | |
1da177e4 | 710 | { |
60ca385a GR |
711 | struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); |
712 | int nr = sattr->nr; | |
713 | int index = sattr->index; | |
b74f3fdd | 714 | struct it87_data *data = dev_get_drvdata(dev); |
f5f64501 | 715 | long val; |
161d898a | 716 | u8 reg, regval; |
f5f64501 | 717 | |
179c4fdb | 718 | if (kstrtol(buf, 10, &val) < 0) |
f5f64501 | 719 | return -EINVAL; |
1da177e4 | 720 | |
9a61bf63 | 721 | mutex_lock(&data->update_lock); |
161d898a GR |
722 | |
723 | switch (index) { | |
724 | default: | |
725 | case 1: | |
726 | reg = IT87_REG_TEMP_LOW(nr); | |
727 | break; | |
728 | case 2: | |
729 | reg = IT87_REG_TEMP_HIGH(nr); | |
730 | break; | |
731 | case 3: | |
732 | regval = it87_read_value(data, IT87_REG_BEEP_ENABLE); | |
733 | if (!(regval & 0x80)) { | |
734 | regval |= 0x80; | |
735 | it87_write_value(data, IT87_REG_BEEP_ENABLE, regval); | |
736 | } | |
737 | data->valid = 0; | |
738 | reg = IT87_REG_TEMP_OFFSET[nr]; | |
739 | break; | |
740 | } | |
741 | ||
60ca385a | 742 | data->temp[nr][index] = TEMP_TO_REG(val); |
161d898a | 743 | it87_write_value(data, reg, data->temp[nr][index]); |
9a61bf63 | 744 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
745 | return count; |
746 | } | |
1da177e4 | 747 | |
60ca385a GR |
748 | static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0); |
749 | static SENSOR_DEVICE_ATTR_2(temp1_min, S_IRUGO | S_IWUSR, show_temp, set_temp, | |
750 | 0, 1); | |
751 | static SENSOR_DEVICE_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, set_temp, | |
752 | 0, 2); | |
161d898a GR |
753 | static SENSOR_DEVICE_ATTR_2(temp1_offset, S_IRUGO | S_IWUSR, show_temp, |
754 | set_temp, 0, 3); | |
60ca385a GR |
755 | static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0); |
756 | static SENSOR_DEVICE_ATTR_2(temp2_min, S_IRUGO | S_IWUSR, show_temp, set_temp, | |
757 | 1, 1); | |
758 | static SENSOR_DEVICE_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, set_temp, | |
759 | 1, 2); | |
161d898a GR |
760 | static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IRUGO | S_IWUSR, show_temp, |
761 | set_temp, 1, 3); | |
60ca385a GR |
762 | static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0); |
763 | static SENSOR_DEVICE_ATTR_2(temp3_min, S_IRUGO | S_IWUSR, show_temp, set_temp, | |
764 | 2, 1); | |
765 | static SENSOR_DEVICE_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, set_temp, | |
766 | 2, 2); | |
161d898a GR |
767 | static SENSOR_DEVICE_ATTR_2(temp3_offset, S_IRUGO | S_IWUSR, show_temp, |
768 | set_temp, 2, 3); | |
1da177e4 | 769 | |
2cece01f GR |
770 | static ssize_t show_temp_type(struct device *dev, struct device_attribute *attr, |
771 | char *buf) | |
1da177e4 | 772 | { |
20ad93d4 JD |
773 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); |
774 | int nr = sensor_attr->index; | |
1da177e4 | 775 | struct it87_data *data = it87_update_device(dev); |
4a0d71cf | 776 | u8 reg = data->sensor; /* In case value is updated while used */ |
19529784 | 777 | u8 extra = data->extra; |
5f2dc798 | 778 | |
19529784 GR |
779 | if ((has_temp_peci(data, nr) && (reg >> 6 == nr + 1)) |
780 | || (has_temp_old_peci(data, nr) && (extra & 0x80))) | |
5d8d2f2b | 781 | return sprintf(buf, "6\n"); /* Intel PECI */ |
1da177e4 LT |
782 | if (reg & (1 << nr)) |
783 | return sprintf(buf, "3\n"); /* thermal diode */ | |
784 | if (reg & (8 << nr)) | |
4ed10779 | 785 | return sprintf(buf, "4\n"); /* thermistor */ |
1da177e4 LT |
786 | return sprintf(buf, "0\n"); /* disabled */ |
787 | } | |
2cece01f GR |
788 | |
789 | static ssize_t set_temp_type(struct device *dev, struct device_attribute *attr, | |
790 | const char *buf, size_t count) | |
1da177e4 | 791 | { |
20ad93d4 JD |
792 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); |
793 | int nr = sensor_attr->index; | |
794 | ||
b74f3fdd | 795 | struct it87_data *data = dev_get_drvdata(dev); |
f5f64501 | 796 | long val; |
19529784 | 797 | u8 reg, extra; |
f5f64501 | 798 | |
179c4fdb | 799 | if (kstrtol(buf, 10, &val) < 0) |
f5f64501 | 800 | return -EINVAL; |
1da177e4 | 801 | |
8acf07c5 JD |
802 | reg = it87_read_value(data, IT87_REG_TEMP_ENABLE); |
803 | reg &= ~(1 << nr); | |
804 | reg &= ~(8 << nr); | |
5d8d2f2b GR |
805 | if (has_temp_peci(data, nr) && (reg >> 6 == nr + 1 || val == 6)) |
806 | reg &= 0x3f; | |
19529784 GR |
807 | extra = it87_read_value(data, IT87_REG_TEMP_EXTRA); |
808 | if (has_temp_old_peci(data, nr) && ((extra & 0x80) || val == 6)) | |
809 | extra &= 0x7f; | |
4ed10779 | 810 | if (val == 2) { /* backwards compatibility */ |
1d9bcf6a GR |
811 | dev_warn(dev, |
812 | "Sensor type 2 is deprecated, please use 4 instead\n"); | |
4ed10779 JD |
813 | val = 4; |
814 | } | |
5d8d2f2b | 815 | /* 3 = thermal diode; 4 = thermistor; 6 = Intel PECI; 0 = disabled */ |
1da177e4 | 816 | if (val == 3) |
8acf07c5 | 817 | reg |= 1 << nr; |
4ed10779 | 818 | else if (val == 4) |
8acf07c5 | 819 | reg |= 8 << nr; |
5d8d2f2b GR |
820 | else if (has_temp_peci(data, nr) && val == 6) |
821 | reg |= (nr + 1) << 6; | |
19529784 GR |
822 | else if (has_temp_old_peci(data, nr) && val == 6) |
823 | extra |= 0x80; | |
8acf07c5 | 824 | else if (val != 0) |
1da177e4 | 825 | return -EINVAL; |
8acf07c5 JD |
826 | |
827 | mutex_lock(&data->update_lock); | |
828 | data->sensor = reg; | |
19529784 | 829 | data->extra = extra; |
b74f3fdd | 830 | it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor); |
19529784 GR |
831 | if (has_temp_old_peci(data, nr)) |
832 | it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra); | |
2b3d1d87 | 833 | data->valid = 0; /* Force cache refresh */ |
9a61bf63 | 834 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
835 | return count; |
836 | } | |
1da177e4 | 837 | |
2cece01f GR |
838 | static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type, |
839 | set_temp_type, 0); | |
840 | static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type, | |
841 | set_temp_type, 1); | |
842 | static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type, | |
843 | set_temp_type, 2); | |
1da177e4 LT |
844 | |
845 | /* 3 Fans */ | |
b99883dc JD |
846 | |
847 | static int pwm_mode(const struct it87_data *data, int nr) | |
848 | { | |
849 | int ctrl = data->fan_main_ctrl & (1 << nr); | |
850 | ||
c145d5c6 | 851 | if (ctrl == 0 && data->type != it8603) /* Full speed */ |
b99883dc JD |
852 | return 0; |
853 | if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */ | |
854 | return 2; | |
855 | else /* Manual mode */ | |
856 | return 1; | |
857 | } | |
858 | ||
20ad93d4 | 859 | static ssize_t show_fan(struct device *dev, struct device_attribute *attr, |
e1169ba0 | 860 | char *buf) |
1da177e4 | 861 | { |
e1169ba0 GR |
862 | struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); |
863 | int nr = sattr->nr; | |
864 | int index = sattr->index; | |
865 | int speed; | |
1da177e4 | 866 | struct it87_data *data = it87_update_device(dev); |
20ad93d4 | 867 | |
e1169ba0 GR |
868 | speed = has_16bit_fans(data) ? |
869 | FAN16_FROM_REG(data->fan[nr][index]) : | |
870 | FAN_FROM_REG(data->fan[nr][index], | |
871 | DIV_FROM_REG(data->fan_div[nr])); | |
872 | return sprintf(buf, "%d\n", speed); | |
1da177e4 | 873 | } |
e1169ba0 | 874 | |
20ad93d4 JD |
875 | static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr, |
876 | char *buf) | |
1da177e4 | 877 | { |
20ad93d4 JD |
878 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); |
879 | int nr = sensor_attr->index; | |
880 | ||
1da177e4 LT |
881 | struct it87_data *data = it87_update_device(dev); |
882 | return sprintf(buf, "%d\n", DIV_FROM_REG(data->fan_div[nr])); | |
883 | } | |
5f2dc798 JD |
884 | static ssize_t show_pwm_enable(struct device *dev, |
885 | struct device_attribute *attr, char *buf) | |
1da177e4 | 886 | { |
20ad93d4 JD |
887 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); |
888 | int nr = sensor_attr->index; | |
889 | ||
1da177e4 | 890 | struct it87_data *data = it87_update_device(dev); |
b99883dc | 891 | return sprintf(buf, "%d\n", pwm_mode(data, nr)); |
1da177e4 | 892 | } |
20ad93d4 JD |
893 | static ssize_t show_pwm(struct device *dev, struct device_attribute *attr, |
894 | char *buf) | |
1da177e4 | 895 | { |
20ad93d4 JD |
896 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); |
897 | int nr = sensor_attr->index; | |
898 | ||
1da177e4 | 899 | struct it87_data *data = it87_update_device(dev); |
44c1bcd4 JD |
900 | return sprintf(buf, "%d\n", |
901 | pwm_from_reg(data, data->pwm_duty[nr])); | |
1da177e4 | 902 | } |
f8d0c19a JD |
903 | static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr, |
904 | char *buf) | |
905 | { | |
906 | struct it87_data *data = it87_update_device(dev); | |
907 | int index = (data->fan_ctl >> 4) & 0x07; | |
f56c9c0a | 908 | unsigned int freq; |
f8d0c19a | 909 | |
f56c9c0a GR |
910 | freq = pwm_freq[index] / (has_newer_autopwm(data) ? 256 : 128); |
911 | ||
912 | return sprintf(buf, "%u\n", freq); | |
f8d0c19a | 913 | } |
e1169ba0 GR |
914 | |
915 | static ssize_t set_fan(struct device *dev, struct device_attribute *attr, | |
916 | const char *buf, size_t count) | |
1da177e4 | 917 | { |
e1169ba0 GR |
918 | struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); |
919 | int nr = sattr->nr; | |
920 | int index = sattr->index; | |
20ad93d4 | 921 | |
b74f3fdd | 922 | struct it87_data *data = dev_get_drvdata(dev); |
f5f64501 | 923 | long val; |
7f999aa7 | 924 | u8 reg; |
1da177e4 | 925 | |
179c4fdb | 926 | if (kstrtol(buf, 10, &val) < 0) |
f5f64501 JD |
927 | return -EINVAL; |
928 | ||
9a61bf63 | 929 | mutex_lock(&data->update_lock); |
e1169ba0 GR |
930 | |
931 | if (has_16bit_fans(data)) { | |
932 | data->fan[nr][index] = FAN16_TO_REG(val); | |
933 | it87_write_value(data, IT87_REG_FAN_MIN[nr], | |
934 | data->fan[nr][index] & 0xff); | |
935 | it87_write_value(data, IT87_REG_FANX_MIN[nr], | |
936 | data->fan[nr][index] >> 8); | |
937 | } else { | |
938 | reg = it87_read_value(data, IT87_REG_FAN_DIV); | |
939 | switch (nr) { | |
940 | case 0: | |
941 | data->fan_div[nr] = reg & 0x07; | |
942 | break; | |
943 | case 1: | |
944 | data->fan_div[nr] = (reg >> 3) & 0x07; | |
945 | break; | |
946 | case 2: | |
947 | data->fan_div[nr] = (reg & 0x40) ? 3 : 1; | |
948 | break; | |
949 | } | |
950 | data->fan[nr][index] = | |
951 | FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr])); | |
952 | it87_write_value(data, IT87_REG_FAN_MIN[nr], | |
953 | data->fan[nr][index]); | |
07eab46d JD |
954 | } |
955 | ||
9a61bf63 | 956 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
957 | return count; |
958 | } | |
e1169ba0 | 959 | |
20ad93d4 JD |
960 | static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr, |
961 | const char *buf, size_t count) | |
1da177e4 | 962 | { |
20ad93d4 JD |
963 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); |
964 | int nr = sensor_attr->index; | |
965 | ||
b74f3fdd | 966 | struct it87_data *data = dev_get_drvdata(dev); |
f5f64501 | 967 | unsigned long val; |
8ab4ec3e | 968 | int min; |
1da177e4 LT |
969 | u8 old; |
970 | ||
179c4fdb | 971 | if (kstrtoul(buf, 10, &val) < 0) |
f5f64501 JD |
972 | return -EINVAL; |
973 | ||
9a61bf63 | 974 | mutex_lock(&data->update_lock); |
b74f3fdd | 975 | old = it87_read_value(data, IT87_REG_FAN_DIV); |
1da177e4 | 976 | |
8ab4ec3e | 977 | /* Save fan min limit */ |
e1169ba0 | 978 | min = FAN_FROM_REG(data->fan[nr][1], DIV_FROM_REG(data->fan_div[nr])); |
1da177e4 LT |
979 | |
980 | switch (nr) { | |
981 | case 0: | |
982 | case 1: | |
983 | data->fan_div[nr] = DIV_TO_REG(val); | |
984 | break; | |
985 | case 2: | |
986 | if (val < 8) | |
987 | data->fan_div[nr] = 1; | |
988 | else | |
989 | data->fan_div[nr] = 3; | |
990 | } | |
991 | val = old & 0x80; | |
992 | val |= (data->fan_div[0] & 0x07); | |
993 | val |= (data->fan_div[1] & 0x07) << 3; | |
994 | if (data->fan_div[2] == 3) | |
995 | val |= 0x1 << 6; | |
b74f3fdd | 996 | it87_write_value(data, IT87_REG_FAN_DIV, val); |
1da177e4 | 997 | |
8ab4ec3e | 998 | /* Restore fan min limit */ |
e1169ba0 GR |
999 | data->fan[nr][1] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr])); |
1000 | it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan[nr][1]); | |
8ab4ec3e | 1001 | |
9a61bf63 | 1002 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
1003 | return count; |
1004 | } | |
cccfc9c4 JD |
1005 | |
1006 | /* Returns 0 if OK, -EINVAL otherwise */ | |
1007 | static int check_trip_points(struct device *dev, int nr) | |
1008 | { | |
1009 | const struct it87_data *data = dev_get_drvdata(dev); | |
1010 | int i, err = 0; | |
1011 | ||
1012 | if (has_old_autopwm(data)) { | |
1013 | for (i = 0; i < 3; i++) { | |
1014 | if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1]) | |
1015 | err = -EINVAL; | |
1016 | } | |
1017 | for (i = 0; i < 2; i++) { | |
1018 | if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1]) | |
1019 | err = -EINVAL; | |
1020 | } | |
1021 | } | |
1022 | ||
1023 | if (err) { | |
1d9bcf6a GR |
1024 | dev_err(dev, |
1025 | "Inconsistent trip points, not switching to automatic mode\n"); | |
cccfc9c4 JD |
1026 | dev_err(dev, "Adjust the trip points and try again\n"); |
1027 | } | |
1028 | return err; | |
1029 | } | |
1030 | ||
20ad93d4 JD |
1031 | static ssize_t set_pwm_enable(struct device *dev, |
1032 | struct device_attribute *attr, const char *buf, size_t count) | |
1da177e4 | 1033 | { |
20ad93d4 JD |
1034 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); |
1035 | int nr = sensor_attr->index; | |
1036 | ||
b74f3fdd | 1037 | struct it87_data *data = dev_get_drvdata(dev); |
f5f64501 | 1038 | long val; |
1da177e4 | 1039 | |
179c4fdb | 1040 | if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2) |
b99883dc JD |
1041 | return -EINVAL; |
1042 | ||
cccfc9c4 JD |
1043 | /* Check trip points before switching to automatic mode */ |
1044 | if (val == 2) { | |
1045 | if (check_trip_points(dev, nr) < 0) | |
1046 | return -EINVAL; | |
1047 | } | |
1048 | ||
c145d5c6 RM |
1049 | /* IT8603E does not have on/off mode */ |
1050 | if (val == 0 && data->type == it8603) | |
1051 | return -EINVAL; | |
1052 | ||
9a61bf63 | 1053 | mutex_lock(&data->update_lock); |
1da177e4 LT |
1054 | |
1055 | if (val == 0) { | |
1056 | int tmp; | |
1057 | /* make sure the fan is on when in on/off mode */ | |
b74f3fdd | 1058 | tmp = it87_read_value(data, IT87_REG_FAN_CTL); |
1059 | it87_write_value(data, IT87_REG_FAN_CTL, tmp | (1 << nr)); | |
1da177e4 LT |
1060 | /* set on/off mode */ |
1061 | data->fan_main_ctrl &= ~(1 << nr); | |
5f2dc798 JD |
1062 | it87_write_value(data, IT87_REG_FAN_MAIN_CTRL, |
1063 | data->fan_main_ctrl); | |
b99883dc JD |
1064 | } else { |
1065 | if (val == 1) /* Manual mode */ | |
16b5dda2 | 1066 | data->pwm_ctrl[nr] = has_newer_autopwm(data) ? |
6229cdb2 JD |
1067 | data->pwm_temp_map[nr] : |
1068 | data->pwm_duty[nr]; | |
b99883dc JD |
1069 | else /* Automatic mode */ |
1070 | data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr]; | |
1071 | it87_write_value(data, IT87_REG_PWM(nr), data->pwm_ctrl[nr]); | |
c145d5c6 RM |
1072 | |
1073 | if (data->type != it8603) { | |
1074 | /* set SmartGuardian mode */ | |
1075 | data->fan_main_ctrl |= (1 << nr); | |
1076 | it87_write_value(data, IT87_REG_FAN_MAIN_CTRL, | |
1077 | data->fan_main_ctrl); | |
1078 | } | |
1da177e4 LT |
1079 | } |
1080 | ||
9a61bf63 | 1081 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
1082 | return count; |
1083 | } | |
20ad93d4 JD |
1084 | static ssize_t set_pwm(struct device *dev, struct device_attribute *attr, |
1085 | const char *buf, size_t count) | |
1da177e4 | 1086 | { |
20ad93d4 JD |
1087 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); |
1088 | int nr = sensor_attr->index; | |
1089 | ||
b74f3fdd | 1090 | struct it87_data *data = dev_get_drvdata(dev); |
f5f64501 | 1091 | long val; |
1da177e4 | 1092 | |
179c4fdb | 1093 | if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255) |
1da177e4 LT |
1094 | return -EINVAL; |
1095 | ||
9a61bf63 | 1096 | mutex_lock(&data->update_lock); |
16b5dda2 | 1097 | if (has_newer_autopwm(data)) { |
4a0d71cf GR |
1098 | /* |
1099 | * If we are in automatic mode, the PWM duty cycle register | |
1100 | * is read-only so we can't write the value. | |
1101 | */ | |
6229cdb2 JD |
1102 | if (data->pwm_ctrl[nr] & 0x80) { |
1103 | mutex_unlock(&data->update_lock); | |
1104 | return -EBUSY; | |
1105 | } | |
1106 | data->pwm_duty[nr] = pwm_to_reg(data, val); | |
1107 | it87_write_value(data, IT87_REG_PWM_DUTY(nr), | |
1108 | data->pwm_duty[nr]); | |
1109 | } else { | |
1110 | data->pwm_duty[nr] = pwm_to_reg(data, val); | |
4a0d71cf GR |
1111 | /* |
1112 | * If we are in manual mode, write the duty cycle immediately; | |
1113 | * otherwise, just store it for later use. | |
1114 | */ | |
6229cdb2 JD |
1115 | if (!(data->pwm_ctrl[nr] & 0x80)) { |
1116 | data->pwm_ctrl[nr] = data->pwm_duty[nr]; | |
1117 | it87_write_value(data, IT87_REG_PWM(nr), | |
1118 | data->pwm_ctrl[nr]); | |
1119 | } | |
b99883dc | 1120 | } |
9a61bf63 | 1121 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
1122 | return count; |
1123 | } | |
f8d0c19a JD |
1124 | static ssize_t set_pwm_freq(struct device *dev, |
1125 | struct device_attribute *attr, const char *buf, size_t count) | |
1126 | { | |
b74f3fdd | 1127 | struct it87_data *data = dev_get_drvdata(dev); |
f5f64501 | 1128 | unsigned long val; |
f8d0c19a JD |
1129 | int i; |
1130 | ||
179c4fdb | 1131 | if (kstrtoul(buf, 10, &val) < 0) |
f5f64501 | 1132 | return -EINVAL; |
f56c9c0a GR |
1133 | |
1134 | val = clamp_val(val, 0, 1000000); | |
1135 | val *= has_newer_autopwm(data) ? 256 : 128; | |
f5f64501 | 1136 | |
f8d0c19a JD |
1137 | /* Search for the nearest available frequency */ |
1138 | for (i = 0; i < 7; i++) { | |
1139 | if (val > (pwm_freq[i] + pwm_freq[i+1]) / 2) | |
1140 | break; | |
1141 | } | |
1142 | ||
1143 | mutex_lock(&data->update_lock); | |
b74f3fdd | 1144 | data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f; |
f8d0c19a | 1145 | data->fan_ctl |= i << 4; |
b74f3fdd | 1146 | it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl); |
f8d0c19a JD |
1147 | mutex_unlock(&data->update_lock); |
1148 | ||
1149 | return count; | |
1150 | } | |
94ac7ee6 JD |
1151 | static ssize_t show_pwm_temp_map(struct device *dev, |
1152 | struct device_attribute *attr, char *buf) | |
1153 | { | |
1154 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); | |
1155 | int nr = sensor_attr->index; | |
1156 | ||
1157 | struct it87_data *data = it87_update_device(dev); | |
1158 | int map; | |
1159 | ||
1160 | if (data->pwm_temp_map[nr] < 3) | |
1161 | map = 1 << data->pwm_temp_map[nr]; | |
1162 | else | |
1163 | map = 0; /* Should never happen */ | |
1164 | return sprintf(buf, "%d\n", map); | |
1165 | } | |
1166 | static ssize_t set_pwm_temp_map(struct device *dev, | |
1167 | struct device_attribute *attr, const char *buf, size_t count) | |
1168 | { | |
1169 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); | |
1170 | int nr = sensor_attr->index; | |
1171 | ||
1172 | struct it87_data *data = dev_get_drvdata(dev); | |
1173 | long val; | |
1174 | u8 reg; | |
1175 | ||
4a0d71cf GR |
1176 | /* |
1177 | * This check can go away if we ever support automatic fan speed | |
1178 | * control on newer chips. | |
1179 | */ | |
4f3f51bc JD |
1180 | if (!has_old_autopwm(data)) { |
1181 | dev_notice(dev, "Mapping change disabled for safety reasons\n"); | |
1182 | return -EINVAL; | |
1183 | } | |
1184 | ||
179c4fdb | 1185 | if (kstrtol(buf, 10, &val) < 0) |
94ac7ee6 JD |
1186 | return -EINVAL; |
1187 | ||
1188 | switch (val) { | |
1189 | case (1 << 0): | |
1190 | reg = 0x00; | |
1191 | break; | |
1192 | case (1 << 1): | |
1193 | reg = 0x01; | |
1194 | break; | |
1195 | case (1 << 2): | |
1196 | reg = 0x02; | |
1197 | break; | |
1198 | default: | |
1199 | return -EINVAL; | |
1200 | } | |
1201 | ||
1202 | mutex_lock(&data->update_lock); | |
1203 | data->pwm_temp_map[nr] = reg; | |
4a0d71cf GR |
1204 | /* |
1205 | * If we are in automatic mode, write the temp mapping immediately; | |
1206 | * otherwise, just store it for later use. | |
1207 | */ | |
94ac7ee6 JD |
1208 | if (data->pwm_ctrl[nr] & 0x80) { |
1209 | data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr]; | |
1210 | it87_write_value(data, IT87_REG_PWM(nr), data->pwm_ctrl[nr]); | |
1211 | } | |
1212 | mutex_unlock(&data->update_lock); | |
1213 | return count; | |
1214 | } | |
1da177e4 | 1215 | |
4f3f51bc JD |
1216 | static ssize_t show_auto_pwm(struct device *dev, |
1217 | struct device_attribute *attr, char *buf) | |
1218 | { | |
1219 | struct it87_data *data = it87_update_device(dev); | |
1220 | struct sensor_device_attribute_2 *sensor_attr = | |
1221 | to_sensor_dev_attr_2(attr); | |
1222 | int nr = sensor_attr->nr; | |
1223 | int point = sensor_attr->index; | |
1224 | ||
44c1bcd4 JD |
1225 | return sprintf(buf, "%d\n", |
1226 | pwm_from_reg(data, data->auto_pwm[nr][point])); | |
4f3f51bc JD |
1227 | } |
1228 | ||
1229 | static ssize_t set_auto_pwm(struct device *dev, | |
1230 | struct device_attribute *attr, const char *buf, size_t count) | |
1231 | { | |
1232 | struct it87_data *data = dev_get_drvdata(dev); | |
1233 | struct sensor_device_attribute_2 *sensor_attr = | |
1234 | to_sensor_dev_attr_2(attr); | |
1235 | int nr = sensor_attr->nr; | |
1236 | int point = sensor_attr->index; | |
1237 | long val; | |
1238 | ||
179c4fdb | 1239 | if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255) |
4f3f51bc JD |
1240 | return -EINVAL; |
1241 | ||
1242 | mutex_lock(&data->update_lock); | |
44c1bcd4 | 1243 | data->auto_pwm[nr][point] = pwm_to_reg(data, val); |
4f3f51bc JD |
1244 | it87_write_value(data, IT87_REG_AUTO_PWM(nr, point), |
1245 | data->auto_pwm[nr][point]); | |
1246 | mutex_unlock(&data->update_lock); | |
1247 | return count; | |
1248 | } | |
1249 | ||
1250 | static ssize_t show_auto_temp(struct device *dev, | |
1251 | struct device_attribute *attr, char *buf) | |
1252 | { | |
1253 | struct it87_data *data = it87_update_device(dev); | |
1254 | struct sensor_device_attribute_2 *sensor_attr = | |
1255 | to_sensor_dev_attr_2(attr); | |
1256 | int nr = sensor_attr->nr; | |
1257 | int point = sensor_attr->index; | |
1258 | ||
1259 | return sprintf(buf, "%d\n", TEMP_FROM_REG(data->auto_temp[nr][point])); | |
1260 | } | |
1261 | ||
1262 | static ssize_t set_auto_temp(struct device *dev, | |
1263 | struct device_attribute *attr, const char *buf, size_t count) | |
1264 | { | |
1265 | struct it87_data *data = dev_get_drvdata(dev); | |
1266 | struct sensor_device_attribute_2 *sensor_attr = | |
1267 | to_sensor_dev_attr_2(attr); | |
1268 | int nr = sensor_attr->nr; | |
1269 | int point = sensor_attr->index; | |
1270 | long val; | |
1271 | ||
179c4fdb | 1272 | if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000) |
4f3f51bc JD |
1273 | return -EINVAL; |
1274 | ||
1275 | mutex_lock(&data->update_lock); | |
1276 | data->auto_temp[nr][point] = TEMP_TO_REG(val); | |
1277 | it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point), | |
1278 | data->auto_temp[nr][point]); | |
1279 | mutex_unlock(&data->update_lock); | |
1280 | return count; | |
1281 | } | |
1282 | ||
e1169ba0 GR |
1283 | static SENSOR_DEVICE_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0); |
1284 | static SENSOR_DEVICE_ATTR_2(fan1_min, S_IRUGO | S_IWUSR, show_fan, set_fan, | |
1285 | 0, 1); | |
1286 | static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, show_fan_div, | |
1287 | set_fan_div, 0); | |
1288 | ||
1289 | static SENSOR_DEVICE_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 1, 0); | |
1290 | static SENSOR_DEVICE_ATTR_2(fan2_min, S_IRUGO | S_IWUSR, show_fan, set_fan, | |
1291 | 1, 1); | |
1292 | static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, show_fan_div, | |
1293 | set_fan_div, 1); | |
1294 | ||
1295 | static SENSOR_DEVICE_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 2, 0); | |
1296 | static SENSOR_DEVICE_ATTR_2(fan3_min, S_IRUGO | S_IWUSR, show_fan, set_fan, | |
1297 | 2, 1); | |
1298 | static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, show_fan_div, | |
1299 | set_fan_div, 2); | |
1300 | ||
1301 | static SENSOR_DEVICE_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 3, 0); | |
1302 | static SENSOR_DEVICE_ATTR_2(fan4_min, S_IRUGO | S_IWUSR, show_fan, set_fan, | |
1303 | 3, 1); | |
1da177e4 | 1304 | |
e1169ba0 GR |
1305 | static SENSOR_DEVICE_ATTR_2(fan5_input, S_IRUGO, show_fan, NULL, 4, 0); |
1306 | static SENSOR_DEVICE_ATTR_2(fan5_min, S_IRUGO | S_IWUSR, show_fan, set_fan, | |
1307 | 4, 1); | |
1da177e4 | 1308 | |
fa3f70d6 GR |
1309 | static SENSOR_DEVICE_ATTR_2(fan6_input, S_IRUGO, show_fan, NULL, 5, 0); |
1310 | static SENSOR_DEVICE_ATTR_2(fan6_min, S_IRUGO | S_IWUSR, show_fan, set_fan, | |
1311 | 5, 1); | |
1312 | ||
c4458db3 GR |
1313 | static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR, |
1314 | show_pwm_enable, set_pwm_enable, 0); | |
1315 | static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 0); | |
1316 | static DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR, show_pwm_freq, set_pwm_freq); | |
1317 | static SENSOR_DEVICE_ATTR(pwm1_auto_channels_temp, S_IRUGO | S_IWUSR, | |
1318 | show_pwm_temp_map, set_pwm_temp_map, 0); | |
1319 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO | S_IWUSR, | |
1320 | show_auto_pwm, set_auto_pwm, 0, 0); | |
1321 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO | S_IWUSR, | |
1322 | show_auto_pwm, set_auto_pwm, 0, 1); | |
1323 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO | S_IWUSR, | |
1324 | show_auto_pwm, set_auto_pwm, 0, 2); | |
1325 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO, | |
1326 | show_auto_pwm, NULL, 0, 3); | |
1327 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR, | |
1328 | show_auto_temp, set_auto_temp, 0, 1); | |
1329 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO | S_IWUSR, | |
1330 | show_auto_temp, set_auto_temp, 0, 0); | |
1331 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR, | |
1332 | show_auto_temp, set_auto_temp, 0, 2); | |
1333 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR, | |
1334 | show_auto_temp, set_auto_temp, 0, 3); | |
1335 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_temp, S_IRUGO | S_IWUSR, | |
1336 | show_auto_temp, set_auto_temp, 0, 4); | |
1337 | ||
1338 | static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR, | |
1339 | show_pwm_enable, set_pwm_enable, 1); | |
1340 | static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 1); | |
1341 | static DEVICE_ATTR(pwm2_freq, S_IRUGO, show_pwm_freq, NULL); | |
1342 | static SENSOR_DEVICE_ATTR(pwm2_auto_channels_temp, S_IRUGO | S_IWUSR, | |
1343 | show_pwm_temp_map, set_pwm_temp_map, 1); | |
1344 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO | S_IWUSR, | |
1345 | show_auto_pwm, set_auto_pwm, 1, 0); | |
1346 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO | S_IWUSR, | |
1347 | show_auto_pwm, set_auto_pwm, 1, 1); | |
1348 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO | S_IWUSR, | |
1349 | show_auto_pwm, set_auto_pwm, 1, 2); | |
1350 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO, | |
1351 | show_auto_pwm, NULL, 1, 3); | |
1352 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR, | |
1353 | show_auto_temp, set_auto_temp, 1, 1); | |
1354 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO | S_IWUSR, | |
1355 | show_auto_temp, set_auto_temp, 1, 0); | |
1356 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR, | |
1357 | show_auto_temp, set_auto_temp, 1, 2); | |
1358 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR, | |
1359 | show_auto_temp, set_auto_temp, 1, 3); | |
1360 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_temp, S_IRUGO | S_IWUSR, | |
1361 | show_auto_temp, set_auto_temp, 1, 4); | |
1362 | ||
1363 | static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR, | |
1364 | show_pwm_enable, set_pwm_enable, 2); | |
1365 | static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 2); | |
1366 | static DEVICE_ATTR(pwm3_freq, S_IRUGO, show_pwm_freq, NULL); | |
1367 | static SENSOR_DEVICE_ATTR(pwm3_auto_channels_temp, S_IRUGO | S_IWUSR, | |
1368 | show_pwm_temp_map, set_pwm_temp_map, 2); | |
1369 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO | S_IWUSR, | |
1370 | show_auto_pwm, set_auto_pwm, 2, 0); | |
1371 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO | S_IWUSR, | |
1372 | show_auto_pwm, set_auto_pwm, 2, 1); | |
1373 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO | S_IWUSR, | |
1374 | show_auto_pwm, set_auto_pwm, 2, 2); | |
1375 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO, | |
1376 | show_auto_pwm, NULL, 2, 3); | |
1377 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR, | |
1378 | show_auto_temp, set_auto_temp, 2, 1); | |
1379 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO | S_IWUSR, | |
1380 | show_auto_temp, set_auto_temp, 2, 0); | |
1381 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR, | |
1382 | show_auto_temp, set_auto_temp, 2, 2); | |
1383 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR, | |
1384 | show_auto_temp, set_auto_temp, 2, 3); | |
1385 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_temp, S_IRUGO | S_IWUSR, | |
1386 | show_auto_temp, set_auto_temp, 2, 4); | |
1da177e4 LT |
1387 | |
1388 | /* Alarms */ | |
5f2dc798 JD |
1389 | static ssize_t show_alarms(struct device *dev, struct device_attribute *attr, |
1390 | char *buf) | |
1da177e4 LT |
1391 | { |
1392 | struct it87_data *data = it87_update_device(dev); | |
68188ba7 | 1393 | return sprintf(buf, "%u\n", data->alarms); |
1da177e4 | 1394 | } |
1d66c64c | 1395 | static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL); |
1da177e4 | 1396 | |
0124dd78 JD |
1397 | static ssize_t show_alarm(struct device *dev, struct device_attribute *attr, |
1398 | char *buf) | |
1399 | { | |
1400 | int bitnr = to_sensor_dev_attr(attr)->index; | |
1401 | struct it87_data *data = it87_update_device(dev); | |
1402 | return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1); | |
1403 | } | |
3d30f9e6 JD |
1404 | |
1405 | static ssize_t clear_intrusion(struct device *dev, struct device_attribute | |
1406 | *attr, const char *buf, size_t count) | |
1407 | { | |
1408 | struct it87_data *data = dev_get_drvdata(dev); | |
1409 | long val; | |
1410 | int config; | |
1411 | ||
179c4fdb | 1412 | if (kstrtol(buf, 10, &val) < 0 || val != 0) |
3d30f9e6 JD |
1413 | return -EINVAL; |
1414 | ||
1415 | mutex_lock(&data->update_lock); | |
1416 | config = it87_read_value(data, IT87_REG_CONFIG); | |
1417 | if (config < 0) { | |
1418 | count = config; | |
1419 | } else { | |
1420 | config |= 1 << 5; | |
1421 | it87_write_value(data, IT87_REG_CONFIG, config); | |
1422 | /* Invalidate cache to force re-read */ | |
1423 | data->valid = 0; | |
1424 | } | |
1425 | mutex_unlock(&data->update_lock); | |
1426 | ||
1427 | return count; | |
1428 | } | |
1429 | ||
0124dd78 JD |
1430 | static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8); |
1431 | static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9); | |
1432 | static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10); | |
1433 | static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11); | |
1434 | static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12); | |
1435 | static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13); | |
1436 | static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14); | |
1437 | static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15); | |
1438 | static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0); | |
1439 | static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1); | |
1440 | static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2); | |
1441 | static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3); | |
1442 | static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6); | |
fa3f70d6 | 1443 | static SENSOR_DEVICE_ATTR(fan6_alarm, S_IRUGO, show_alarm, NULL, 7); |
0124dd78 JD |
1444 | static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16); |
1445 | static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17); | |
1446 | static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18); | |
3d30f9e6 JD |
1447 | static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR, |
1448 | show_alarm, clear_intrusion, 4); | |
0124dd78 | 1449 | |
d9b327c3 JD |
1450 | static ssize_t show_beep(struct device *dev, struct device_attribute *attr, |
1451 | char *buf) | |
1452 | { | |
1453 | int bitnr = to_sensor_dev_attr(attr)->index; | |
1454 | struct it87_data *data = it87_update_device(dev); | |
1455 | return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1); | |
1456 | } | |
1457 | static ssize_t set_beep(struct device *dev, struct device_attribute *attr, | |
1458 | const char *buf, size_t count) | |
1459 | { | |
1460 | int bitnr = to_sensor_dev_attr(attr)->index; | |
1461 | struct it87_data *data = dev_get_drvdata(dev); | |
1462 | long val; | |
1463 | ||
179c4fdb | 1464 | if (kstrtol(buf, 10, &val) < 0 |
d9b327c3 JD |
1465 | || (val != 0 && val != 1)) |
1466 | return -EINVAL; | |
1467 | ||
1468 | mutex_lock(&data->update_lock); | |
1469 | data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE); | |
1470 | if (val) | |
1471 | data->beeps |= (1 << bitnr); | |
1472 | else | |
1473 | data->beeps &= ~(1 << bitnr); | |
1474 | it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps); | |
1475 | mutex_unlock(&data->update_lock); | |
1476 | return count; | |
1477 | } | |
1478 | ||
1479 | static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR, | |
1480 | show_beep, set_beep, 1); | |
1481 | static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1); | |
1482 | static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1); | |
1483 | static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1); | |
1484 | static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1); | |
1485 | static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1); | |
1486 | static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1); | |
1487 | static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1); | |
1488 | /* fanX_beep writability is set later */ | |
1489 | static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0); | |
1490 | static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0); | |
1491 | static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0); | |
1492 | static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0); | |
1493 | static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0); | |
fa3f70d6 | 1494 | static SENSOR_DEVICE_ATTR(fan6_beep, S_IRUGO, show_beep, set_beep, 0); |
d9b327c3 JD |
1495 | static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR, |
1496 | show_beep, set_beep, 2); | |
1497 | static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2); | |
1498 | static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2); | |
1499 | ||
5f2dc798 JD |
1500 | static ssize_t show_vrm_reg(struct device *dev, struct device_attribute *attr, |
1501 | char *buf) | |
1da177e4 | 1502 | { |
90d6619a | 1503 | struct it87_data *data = dev_get_drvdata(dev); |
a7be58a1 | 1504 | return sprintf(buf, "%u\n", data->vrm); |
1da177e4 | 1505 | } |
5f2dc798 JD |
1506 | static ssize_t store_vrm_reg(struct device *dev, struct device_attribute *attr, |
1507 | const char *buf, size_t count) | |
1da177e4 | 1508 | { |
b74f3fdd | 1509 | struct it87_data *data = dev_get_drvdata(dev); |
f5f64501 JD |
1510 | unsigned long val; |
1511 | ||
179c4fdb | 1512 | if (kstrtoul(buf, 10, &val) < 0) |
f5f64501 | 1513 | return -EINVAL; |
1da177e4 | 1514 | |
1da177e4 LT |
1515 | data->vrm = val; |
1516 | ||
1517 | return count; | |
1518 | } | |
1519 | static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg); | |
1da177e4 | 1520 | |
5f2dc798 JD |
1521 | static ssize_t show_vid_reg(struct device *dev, struct device_attribute *attr, |
1522 | char *buf) | |
1da177e4 LT |
1523 | { |
1524 | struct it87_data *data = it87_update_device(dev); | |
1525 | return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm)); | |
1526 | } | |
1527 | static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL); | |
87808be4 | 1528 | |
738e5e05 JD |
1529 | static ssize_t show_label(struct device *dev, struct device_attribute *attr, |
1530 | char *buf) | |
1531 | { | |
3c4c4971 | 1532 | static const char * const labels[] = { |
738e5e05 JD |
1533 | "+5V", |
1534 | "5VSB", | |
1535 | "Vbat", | |
1536 | }; | |
3c4c4971 | 1537 | static const char * const labels_it8721[] = { |
44c1bcd4 JD |
1538 | "+3.3V", |
1539 | "3VSB", | |
1540 | "Vbat", | |
1541 | }; | |
1542 | struct it87_data *data = dev_get_drvdata(dev); | |
738e5e05 | 1543 | int nr = to_sensor_dev_attr(attr)->index; |
ead80803 | 1544 | const char *label; |
738e5e05 | 1545 | |
ead80803 JM |
1546 | if (has_12mv_adc(data) || has_10_9mv_adc(data)) |
1547 | label = labels_it8721[nr]; | |
1548 | else | |
1549 | label = labels[nr]; | |
1550 | ||
1551 | return sprintf(buf, "%s\n", label); | |
738e5e05 JD |
1552 | } |
1553 | static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0); | |
1554 | static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1); | |
1555 | static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2); | |
73055405 | 1556 | /* AVCC3 */ |
c145d5c6 | 1557 | static SENSOR_DEVICE_ATTR(in9_label, S_IRUGO, show_label, NULL, 0); |
738e5e05 | 1558 | |
b74f3fdd | 1559 | static ssize_t show_name(struct device *dev, struct device_attribute |
1560 | *devattr, char *buf) | |
1561 | { | |
1562 | struct it87_data *data = dev_get_drvdata(dev); | |
1563 | return sprintf(buf, "%s\n", data->name); | |
1564 | } | |
1565 | static DEVICE_ATTR(name, S_IRUGO, show_name, NULL); | |
1566 | ||
c145d5c6 | 1567 | static struct attribute *it87_attributes_in[10][5] = { |
9172b5d1 | 1568 | { |
87808be4 | 1569 | &sensor_dev_attr_in0_input.dev_attr.attr, |
87808be4 | 1570 | &sensor_dev_attr_in0_min.dev_attr.attr, |
87808be4 | 1571 | &sensor_dev_attr_in0_max.dev_attr.attr, |
0124dd78 | 1572 | &sensor_dev_attr_in0_alarm.dev_attr.attr, |
9172b5d1 GR |
1573 | NULL |
1574 | }, { | |
1575 | &sensor_dev_attr_in1_input.dev_attr.attr, | |
1576 | &sensor_dev_attr_in1_min.dev_attr.attr, | |
1577 | &sensor_dev_attr_in1_max.dev_attr.attr, | |
0124dd78 | 1578 | &sensor_dev_attr_in1_alarm.dev_attr.attr, |
9172b5d1 GR |
1579 | NULL |
1580 | }, { | |
1581 | &sensor_dev_attr_in2_input.dev_attr.attr, | |
1582 | &sensor_dev_attr_in2_min.dev_attr.attr, | |
1583 | &sensor_dev_attr_in2_max.dev_attr.attr, | |
0124dd78 | 1584 | &sensor_dev_attr_in2_alarm.dev_attr.attr, |
9172b5d1 GR |
1585 | NULL |
1586 | }, { | |
1587 | &sensor_dev_attr_in3_input.dev_attr.attr, | |
1588 | &sensor_dev_attr_in3_min.dev_attr.attr, | |
1589 | &sensor_dev_attr_in3_max.dev_attr.attr, | |
0124dd78 | 1590 | &sensor_dev_attr_in3_alarm.dev_attr.attr, |
9172b5d1 GR |
1591 | NULL |
1592 | }, { | |
1593 | &sensor_dev_attr_in4_input.dev_attr.attr, | |
1594 | &sensor_dev_attr_in4_min.dev_attr.attr, | |
1595 | &sensor_dev_attr_in4_max.dev_attr.attr, | |
0124dd78 | 1596 | &sensor_dev_attr_in4_alarm.dev_attr.attr, |
9172b5d1 GR |
1597 | NULL |
1598 | }, { | |
1599 | &sensor_dev_attr_in5_input.dev_attr.attr, | |
1600 | &sensor_dev_attr_in5_min.dev_attr.attr, | |
1601 | &sensor_dev_attr_in5_max.dev_attr.attr, | |
0124dd78 | 1602 | &sensor_dev_attr_in5_alarm.dev_attr.attr, |
9172b5d1 GR |
1603 | NULL |
1604 | }, { | |
1605 | &sensor_dev_attr_in6_input.dev_attr.attr, | |
1606 | &sensor_dev_attr_in6_min.dev_attr.attr, | |
1607 | &sensor_dev_attr_in6_max.dev_attr.attr, | |
0124dd78 | 1608 | &sensor_dev_attr_in6_alarm.dev_attr.attr, |
9172b5d1 GR |
1609 | NULL |
1610 | }, { | |
1611 | &sensor_dev_attr_in7_input.dev_attr.attr, | |
1612 | &sensor_dev_attr_in7_min.dev_attr.attr, | |
1613 | &sensor_dev_attr_in7_max.dev_attr.attr, | |
0124dd78 | 1614 | &sensor_dev_attr_in7_alarm.dev_attr.attr, |
9172b5d1 GR |
1615 | NULL |
1616 | }, { | |
1617 | &sensor_dev_attr_in8_input.dev_attr.attr, | |
1618 | NULL | |
c145d5c6 RM |
1619 | }, { |
1620 | &sensor_dev_attr_in9_input.dev_attr.attr, | |
1621 | NULL | |
9172b5d1 | 1622 | } }; |
87808be4 | 1623 | |
c145d5c6 | 1624 | static const struct attribute_group it87_group_in[10] = { |
9172b5d1 GR |
1625 | { .attrs = it87_attributes_in[0] }, |
1626 | { .attrs = it87_attributes_in[1] }, | |
1627 | { .attrs = it87_attributes_in[2] }, | |
1628 | { .attrs = it87_attributes_in[3] }, | |
1629 | { .attrs = it87_attributes_in[4] }, | |
1630 | { .attrs = it87_attributes_in[5] }, | |
1631 | { .attrs = it87_attributes_in[6] }, | |
1632 | { .attrs = it87_attributes_in[7] }, | |
1633 | { .attrs = it87_attributes_in[8] }, | |
c145d5c6 | 1634 | { .attrs = it87_attributes_in[9] }, |
9172b5d1 GR |
1635 | }; |
1636 | ||
4573acbc GR |
1637 | static struct attribute *it87_attributes_temp[3][6] = { |
1638 | { | |
87808be4 | 1639 | &sensor_dev_attr_temp1_input.dev_attr.attr, |
87808be4 | 1640 | &sensor_dev_attr_temp1_max.dev_attr.attr, |
87808be4 | 1641 | &sensor_dev_attr_temp1_min.dev_attr.attr, |
87808be4 | 1642 | &sensor_dev_attr_temp1_type.dev_attr.attr, |
0124dd78 | 1643 | &sensor_dev_attr_temp1_alarm.dev_attr.attr, |
4573acbc GR |
1644 | NULL |
1645 | } , { | |
1646 | &sensor_dev_attr_temp2_input.dev_attr.attr, | |
1647 | &sensor_dev_attr_temp2_max.dev_attr.attr, | |
1648 | &sensor_dev_attr_temp2_min.dev_attr.attr, | |
1649 | &sensor_dev_attr_temp2_type.dev_attr.attr, | |
0124dd78 | 1650 | &sensor_dev_attr_temp2_alarm.dev_attr.attr, |
4573acbc GR |
1651 | NULL |
1652 | } , { | |
1653 | &sensor_dev_attr_temp3_input.dev_attr.attr, | |
1654 | &sensor_dev_attr_temp3_max.dev_attr.attr, | |
1655 | &sensor_dev_attr_temp3_min.dev_attr.attr, | |
1656 | &sensor_dev_attr_temp3_type.dev_attr.attr, | |
0124dd78 | 1657 | &sensor_dev_attr_temp3_alarm.dev_attr.attr, |
4573acbc GR |
1658 | NULL |
1659 | } }; | |
1660 | ||
1661 | static const struct attribute_group it87_group_temp[3] = { | |
1662 | { .attrs = it87_attributes_temp[0] }, | |
1663 | { .attrs = it87_attributes_temp[1] }, | |
1664 | { .attrs = it87_attributes_temp[2] }, | |
1665 | }; | |
87808be4 | 1666 | |
161d898a GR |
1667 | static struct attribute *it87_attributes_temp_offset[] = { |
1668 | &sensor_dev_attr_temp1_offset.dev_attr.attr, | |
1669 | &sensor_dev_attr_temp2_offset.dev_attr.attr, | |
1670 | &sensor_dev_attr_temp3_offset.dev_attr.attr, | |
1671 | }; | |
1672 | ||
4573acbc | 1673 | static struct attribute *it87_attributes[] = { |
87808be4 | 1674 | &dev_attr_alarms.attr, |
3d30f9e6 | 1675 | &sensor_dev_attr_intrusion0_alarm.dev_attr.attr, |
b74f3fdd | 1676 | &dev_attr_name.attr, |
87808be4 JD |
1677 | NULL |
1678 | }; | |
1679 | ||
1680 | static const struct attribute_group it87_group = { | |
1681 | .attrs = it87_attributes, | |
1682 | }; | |
1683 | ||
9172b5d1 | 1684 | static struct attribute *it87_attributes_in_beep[] = { |
d9b327c3 JD |
1685 | &sensor_dev_attr_in0_beep.dev_attr.attr, |
1686 | &sensor_dev_attr_in1_beep.dev_attr.attr, | |
1687 | &sensor_dev_attr_in2_beep.dev_attr.attr, | |
1688 | &sensor_dev_attr_in3_beep.dev_attr.attr, | |
1689 | &sensor_dev_attr_in4_beep.dev_attr.attr, | |
1690 | &sensor_dev_attr_in5_beep.dev_attr.attr, | |
1691 | &sensor_dev_attr_in6_beep.dev_attr.attr, | |
1692 | &sensor_dev_attr_in7_beep.dev_attr.attr, | |
c145d5c6 RM |
1693 | NULL, |
1694 | NULL, | |
9172b5d1 | 1695 | }; |
d9b327c3 | 1696 | |
4573acbc | 1697 | static struct attribute *it87_attributes_temp_beep[] = { |
d9b327c3 JD |
1698 | &sensor_dev_attr_temp1_beep.dev_attr.attr, |
1699 | &sensor_dev_attr_temp2_beep.dev_attr.attr, | |
1700 | &sensor_dev_attr_temp3_beep.dev_attr.attr, | |
d9b327c3 JD |
1701 | }; |
1702 | ||
fa3f70d6 | 1703 | static struct attribute *it87_attributes_fan[6][3+1] = { { |
e1169ba0 GR |
1704 | &sensor_dev_attr_fan1_input.dev_attr.attr, |
1705 | &sensor_dev_attr_fan1_min.dev_attr.attr, | |
723a0aa0 JD |
1706 | &sensor_dev_attr_fan1_alarm.dev_attr.attr, |
1707 | NULL | |
1708 | }, { | |
e1169ba0 GR |
1709 | &sensor_dev_attr_fan2_input.dev_attr.attr, |
1710 | &sensor_dev_attr_fan2_min.dev_attr.attr, | |
723a0aa0 JD |
1711 | &sensor_dev_attr_fan2_alarm.dev_attr.attr, |
1712 | NULL | |
1713 | }, { | |
e1169ba0 GR |
1714 | &sensor_dev_attr_fan3_input.dev_attr.attr, |
1715 | &sensor_dev_attr_fan3_min.dev_attr.attr, | |
723a0aa0 JD |
1716 | &sensor_dev_attr_fan3_alarm.dev_attr.attr, |
1717 | NULL | |
1718 | }, { | |
e1169ba0 GR |
1719 | &sensor_dev_attr_fan4_input.dev_attr.attr, |
1720 | &sensor_dev_attr_fan4_min.dev_attr.attr, | |
723a0aa0 JD |
1721 | &sensor_dev_attr_fan4_alarm.dev_attr.attr, |
1722 | NULL | |
1723 | }, { | |
e1169ba0 GR |
1724 | &sensor_dev_attr_fan5_input.dev_attr.attr, |
1725 | &sensor_dev_attr_fan5_min.dev_attr.attr, | |
723a0aa0 JD |
1726 | &sensor_dev_attr_fan5_alarm.dev_attr.attr, |
1727 | NULL | |
fa3f70d6 GR |
1728 | }, { |
1729 | &sensor_dev_attr_fan6_input.dev_attr.attr, | |
1730 | &sensor_dev_attr_fan6_min.dev_attr.attr, | |
1731 | &sensor_dev_attr_fan6_alarm.dev_attr.attr, | |
1732 | NULL | |
723a0aa0 JD |
1733 | } }; |
1734 | ||
fa3f70d6 | 1735 | static const struct attribute_group it87_group_fan[6] = { |
e1169ba0 GR |
1736 | { .attrs = it87_attributes_fan[0] }, |
1737 | { .attrs = it87_attributes_fan[1] }, | |
1738 | { .attrs = it87_attributes_fan[2] }, | |
1739 | { .attrs = it87_attributes_fan[3] }, | |
1740 | { .attrs = it87_attributes_fan[4] }, | |
fa3f70d6 | 1741 | { .attrs = it87_attributes_fan[5] }, |
723a0aa0 | 1742 | }; |
87808be4 | 1743 | |
e1169ba0 | 1744 | static const struct attribute *it87_attributes_fan_div[] = { |
87808be4 | 1745 | &sensor_dev_attr_fan1_div.dev_attr.attr, |
87808be4 | 1746 | &sensor_dev_attr_fan2_div.dev_attr.attr, |
87808be4 | 1747 | &sensor_dev_attr_fan3_div.dev_attr.attr, |
723a0aa0 JD |
1748 | }; |
1749 | ||
723a0aa0 | 1750 | static struct attribute *it87_attributes_pwm[3][4+1] = { { |
87808be4 | 1751 | &sensor_dev_attr_pwm1_enable.dev_attr.attr, |
87808be4 | 1752 | &sensor_dev_attr_pwm1.dev_attr.attr, |
d5b0b5d6 | 1753 | &dev_attr_pwm1_freq.attr, |
94ac7ee6 | 1754 | &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr, |
723a0aa0 JD |
1755 | NULL |
1756 | }, { | |
1757 | &sensor_dev_attr_pwm2_enable.dev_attr.attr, | |
1758 | &sensor_dev_attr_pwm2.dev_attr.attr, | |
1759 | &dev_attr_pwm2_freq.attr, | |
94ac7ee6 | 1760 | &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr, |
723a0aa0 JD |
1761 | NULL |
1762 | }, { | |
1763 | &sensor_dev_attr_pwm3_enable.dev_attr.attr, | |
1764 | &sensor_dev_attr_pwm3.dev_attr.attr, | |
1765 | &dev_attr_pwm3_freq.attr, | |
94ac7ee6 | 1766 | &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr, |
723a0aa0 JD |
1767 | NULL |
1768 | } }; | |
87808be4 | 1769 | |
723a0aa0 JD |
1770 | static const struct attribute_group it87_group_pwm[3] = { |
1771 | { .attrs = it87_attributes_pwm[0] }, | |
1772 | { .attrs = it87_attributes_pwm[1] }, | |
1773 | { .attrs = it87_attributes_pwm[2] }, | |
1774 | }; | |
1775 | ||
4f3f51bc JD |
1776 | static struct attribute *it87_attributes_autopwm[3][9+1] = { { |
1777 | &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr, | |
1778 | &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr, | |
1779 | &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr, | |
1780 | &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr, | |
1781 | &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr, | |
1782 | &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr, | |
1783 | &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr, | |
1784 | &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr, | |
1785 | &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr, | |
1786 | NULL | |
1787 | }, { | |
1788 | &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr, | |
1789 | &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr, | |
1790 | &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr, | |
1791 | &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr, | |
1792 | &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr, | |
1793 | &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr, | |
1794 | &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr, | |
1795 | &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr, | |
1796 | &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr, | |
1797 | NULL | |
1798 | }, { | |
1799 | &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr, | |
1800 | &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr, | |
1801 | &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr, | |
1802 | &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr, | |
1803 | &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr, | |
1804 | &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr, | |
1805 | &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr, | |
1806 | &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr, | |
1807 | &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr, | |
1808 | NULL | |
1809 | } }; | |
1810 | ||
1811 | static const struct attribute_group it87_group_autopwm[3] = { | |
1812 | { .attrs = it87_attributes_autopwm[0] }, | |
1813 | { .attrs = it87_attributes_autopwm[1] }, | |
1814 | { .attrs = it87_attributes_autopwm[2] }, | |
1815 | }; | |
1816 | ||
d9b327c3 JD |
1817 | static struct attribute *it87_attributes_fan_beep[] = { |
1818 | &sensor_dev_attr_fan1_beep.dev_attr.attr, | |
1819 | &sensor_dev_attr_fan2_beep.dev_attr.attr, | |
1820 | &sensor_dev_attr_fan3_beep.dev_attr.attr, | |
1821 | &sensor_dev_attr_fan4_beep.dev_attr.attr, | |
1822 | &sensor_dev_attr_fan5_beep.dev_attr.attr, | |
fa3f70d6 | 1823 | &sensor_dev_attr_fan6_beep.dev_attr.attr, |
d9b327c3 JD |
1824 | }; |
1825 | ||
6a8d7acf | 1826 | static struct attribute *it87_attributes_vid[] = { |
87808be4 JD |
1827 | &dev_attr_vrm.attr, |
1828 | &dev_attr_cpu0_vid.attr, | |
1829 | NULL | |
1830 | }; | |
1831 | ||
6a8d7acf JD |
1832 | static const struct attribute_group it87_group_vid = { |
1833 | .attrs = it87_attributes_vid, | |
87808be4 | 1834 | }; |
1da177e4 | 1835 | |
738e5e05 JD |
1836 | static struct attribute *it87_attributes_label[] = { |
1837 | &sensor_dev_attr_in3_label.dev_attr.attr, | |
1838 | &sensor_dev_attr_in7_label.dev_attr.attr, | |
1839 | &sensor_dev_attr_in8_label.dev_attr.attr, | |
c145d5c6 | 1840 | &sensor_dev_attr_in9_label.dev_attr.attr, |
738e5e05 JD |
1841 | NULL |
1842 | }; | |
1843 | ||
1844 | static const struct attribute_group it87_group_label = { | |
fa8b6975 | 1845 | .attrs = it87_attributes_label, |
738e5e05 JD |
1846 | }; |
1847 | ||
2d8672c5 | 1848 | /* SuperIO detection - will change isa_address if a chip is found */ |
b74f3fdd | 1849 | static int __init it87_find(unsigned short *address, |
1850 | struct it87_sio_data *sio_data) | |
1da177e4 | 1851 | { |
5b0380c9 | 1852 | int err; |
b74f3fdd | 1853 | u16 chip_type; |
98dd22c3 | 1854 | const char *board_vendor, *board_name; |
f83a9cb6 | 1855 | const struct it87_devices *config; |
1da177e4 | 1856 | |
5b0380c9 NG |
1857 | err = superio_enter(); |
1858 | if (err) | |
1859 | return err; | |
1860 | ||
1861 | err = -ENODEV; | |
67b671bc | 1862 | chip_type = force_id ? force_id : superio_inw(DEVID); |
b74f3fdd | 1863 | |
1864 | switch (chip_type) { | |
1865 | case IT8705F_DEVID: | |
1866 | sio_data->type = it87; | |
1867 | break; | |
1868 | case IT8712F_DEVID: | |
1869 | sio_data->type = it8712; | |
1870 | break; | |
1871 | case IT8716F_DEVID: | |
1872 | case IT8726F_DEVID: | |
1873 | sio_data->type = it8716; | |
1874 | break; | |
1875 | case IT8718F_DEVID: | |
1876 | sio_data->type = it8718; | |
1877 | break; | |
b4da93e4 JMS |
1878 | case IT8720F_DEVID: |
1879 | sio_data->type = it8720; | |
1880 | break; | |
44c1bcd4 JD |
1881 | case IT8721F_DEVID: |
1882 | sio_data->type = it8721; | |
1883 | break; | |
16b5dda2 JD |
1884 | case IT8728F_DEVID: |
1885 | sio_data->type = it8728; | |
1886 | break; | |
ead80803 JM |
1887 | case IT8732F_DEVID: |
1888 | sio_data->type = it8732; | |
1889 | break; | |
b0636707 GR |
1890 | case IT8771E_DEVID: |
1891 | sio_data->type = it8771; | |
1892 | break; | |
1893 | case IT8772E_DEVID: | |
1894 | sio_data->type = it8772; | |
1895 | break; | |
7bc32d29 GR |
1896 | case IT8781F_DEVID: |
1897 | sio_data->type = it8781; | |
1898 | break; | |
0531d98b GR |
1899 | case IT8782F_DEVID: |
1900 | sio_data->type = it8782; | |
1901 | break; | |
1902 | case IT8783E_DEVID: | |
1903 | sio_data->type = it8783; | |
1904 | break; | |
a0c1424a TL |
1905 | case IT8786E_DEVID: |
1906 | sio_data->type = it8786; | |
1907 | break; | |
4ee07157 GR |
1908 | case IT8790E_DEVID: |
1909 | sio_data->type = it8790; | |
1910 | break; | |
7183ae8c | 1911 | case IT8603E_DEVID: |
574e9bd8 | 1912 | case IT8623E_DEVID: |
c145d5c6 RM |
1913 | sio_data->type = it8603; |
1914 | break; | |
3ba9d977 GR |
1915 | case IT8620E_DEVID: |
1916 | sio_data->type = it8620; | |
1917 | break; | |
b74f3fdd | 1918 | case 0xffff: /* No device at all */ |
1919 | goto exit; | |
1920 | default: | |
a8ca1037 | 1921 | pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type); |
b74f3fdd | 1922 | goto exit; |
1923 | } | |
1da177e4 | 1924 | |
87673dd7 | 1925 | superio_select(PME); |
1da177e4 | 1926 | if (!(superio_inb(IT87_ACT_REG) & 0x01)) { |
a8ca1037 | 1927 | pr_info("Device not activated, skipping\n"); |
1da177e4 LT |
1928 | goto exit; |
1929 | } | |
1930 | ||
1931 | *address = superio_inw(IT87_BASE_REG) & ~(IT87_EXTENT - 1); | |
1932 | if (*address == 0) { | |
a8ca1037 | 1933 | pr_info("Base address not set, skipping\n"); |
1da177e4 LT |
1934 | goto exit; |
1935 | } | |
1936 | ||
1937 | err = 0; | |
0475169c | 1938 | sio_data->revision = superio_inb(DEVREV) & 0x0f; |
faf392fb GR |
1939 | pr_info("Found IT%04x%s chip at 0x%x, revision %d\n", chip_type, |
1940 | it87_devices[sio_data->type].suffix, | |
a0c1424a | 1941 | *address, sio_data->revision); |
1da177e4 | 1942 | |
f83a9cb6 GR |
1943 | config = &it87_devices[sio_data->type]; |
1944 | ||
7f5726c3 | 1945 | /* in7 (VSB or VCCH5V) is always internal on some chips */ |
f83a9cb6 | 1946 | if (has_in7_internal(config)) |
7f5726c3 GR |
1947 | sio_data->internal |= (1 << 1); |
1948 | ||
738e5e05 | 1949 | /* in8 (Vbat) is always internal */ |
7f5726c3 GR |
1950 | sio_data->internal |= (1 << 2); |
1951 | ||
73055405 GR |
1952 | /* in9 (AVCC3), always internal if supported */ |
1953 | if (has_avcc3(config)) | |
1954 | sio_data->internal |= (1 << 3); /* in9 is AVCC */ | |
1955 | else | |
c145d5c6 | 1956 | sio_data->skip_in |= (1 << 9); |
738e5e05 | 1957 | |
f83a9cb6 | 1958 | if (!has_vid(config)) |
895ff267 | 1959 | sio_data->skip_vid = 1; |
d9b327c3 | 1960 | |
32dd7c40 GR |
1961 | /* Read GPIO config and VID value from LDN 7 (GPIO) */ |
1962 | if (sio_data->type == it87) { | |
d9b327c3 JD |
1963 | /* The IT8705F has a different LD number for GPIO */ |
1964 | superio_select(5); | |
1965 | sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f; | |
0531d98b | 1966 | } else if (sio_data->type == it8783) { |
088ce2ac | 1967 | int reg25, reg27, reg2a, reg2c, regef; |
0531d98b | 1968 | |
0531d98b GR |
1969 | superio_select(GPIO); |
1970 | ||
1971 | reg25 = superio_inb(IT87_SIO_GPIO1_REG); | |
1972 | reg27 = superio_inb(IT87_SIO_GPIO3_REG); | |
088ce2ac GR |
1973 | reg2a = superio_inb(IT87_SIO_PINX1_REG); |
1974 | reg2c = superio_inb(IT87_SIO_PINX2_REG); | |
1975 | regef = superio_inb(IT87_SIO_SPI_REG); | |
0531d98b | 1976 | |
0531d98b | 1977 | /* Check if fan3 is there or not */ |
088ce2ac | 1978 | if ((reg27 & (1 << 0)) || !(reg2c & (1 << 2))) |
0531d98b GR |
1979 | sio_data->skip_fan |= (1 << 2); |
1980 | if ((reg25 & (1 << 4)) | |
088ce2ac | 1981 | || (!(reg2a & (1 << 1)) && (regef & (1 << 0)))) |
0531d98b GR |
1982 | sio_data->skip_pwm |= (1 << 2); |
1983 | ||
1984 | /* Check if fan2 is there or not */ | |
1985 | if (reg27 & (1 << 7)) | |
1986 | sio_data->skip_fan |= (1 << 1); | |
1987 | if (reg27 & (1 << 3)) | |
1988 | sio_data->skip_pwm |= (1 << 1); | |
1989 | ||
1990 | /* VIN5 */ | |
088ce2ac | 1991 | if ((reg27 & (1 << 0)) || (reg2c & (1 << 2))) |
9172b5d1 | 1992 | sio_data->skip_in |= (1 << 5); /* No VIN5 */ |
0531d98b GR |
1993 | |
1994 | /* VIN6 */ | |
9172b5d1 GR |
1995 | if (reg27 & (1 << 1)) |
1996 | sio_data->skip_in |= (1 << 6); /* No VIN6 */ | |
0531d98b GR |
1997 | |
1998 | /* | |
1999 | * VIN7 | |
2000 | * Does not depend on bit 2 of Reg2C, contrary to datasheet. | |
2001 | */ | |
9172b5d1 GR |
2002 | if (reg27 & (1 << 2)) { |
2003 | /* | |
2004 | * The data sheet is a bit unclear regarding the | |
2005 | * internal voltage divider for VCCH5V. It says | |
2006 | * "This bit enables and switches VIN7 (pin 91) to the | |
2007 | * internal voltage divider for VCCH5V". | |
2008 | * This is different to other chips, where the internal | |
2009 | * voltage divider would connect VIN7 to an internal | |
2010 | * voltage source. Maybe that is the case here as well. | |
2011 | * | |
2012 | * Since we don't know for sure, re-route it if that is | |
2013 | * not the case, and ask the user to report if the | |
2014 | * resulting voltage is sane. | |
2015 | */ | |
088ce2ac GR |
2016 | if (!(reg2c & (1 << 1))) { |
2017 | reg2c |= (1 << 1); | |
2018 | superio_outb(IT87_SIO_PINX2_REG, reg2c); | |
9172b5d1 GR |
2019 | pr_notice("Routing internal VCCH5V to in7.\n"); |
2020 | } | |
2021 | pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n"); | |
2022 | pr_notice("Please report if it displays a reasonable voltage.\n"); | |
2023 | } | |
0531d98b | 2024 | |
088ce2ac | 2025 | if (reg2c & (1 << 0)) |
0531d98b | 2026 | sio_data->internal |= (1 << 0); |
088ce2ac | 2027 | if (reg2c & (1 << 1)) |
0531d98b GR |
2028 | sio_data->internal |= (1 << 1); |
2029 | ||
2030 | sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f; | |
c145d5c6 RM |
2031 | } else if (sio_data->type == it8603) { |
2032 | int reg27, reg29; | |
2033 | ||
c145d5c6 | 2034 | superio_select(GPIO); |
0531d98b | 2035 | |
c145d5c6 RM |
2036 | reg27 = superio_inb(IT87_SIO_GPIO3_REG); |
2037 | ||
2038 | /* Check if fan3 is there or not */ | |
2039 | if (reg27 & (1 << 6)) | |
2040 | sio_data->skip_pwm |= (1 << 2); | |
2041 | if (reg27 & (1 << 7)) | |
2042 | sio_data->skip_fan |= (1 << 2); | |
2043 | ||
2044 | /* Check if fan2 is there or not */ | |
2045 | reg29 = superio_inb(IT87_SIO_GPIO5_REG); | |
2046 | if (reg29 & (1 << 1)) | |
2047 | sio_data->skip_pwm |= (1 << 1); | |
2048 | if (reg29 & (1 << 2)) | |
2049 | sio_data->skip_fan |= (1 << 1); | |
2050 | ||
2051 | sio_data->skip_in |= (1 << 5); /* No VIN5 */ | |
2052 | sio_data->skip_in |= (1 << 6); /* No VIN6 */ | |
2053 | ||
3ba9d977 GR |
2054 | sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f; |
2055 | } else if (sio_data->type == it8620) { | |
2056 | int reg; | |
2057 | ||
2058 | superio_select(GPIO); | |
2059 | ||
2060 | /* Check for fan4, fan5 */ | |
2061 | reg = superio_inb(IT87_SIO_GPIO2_REG); | |
2062 | if (!(reg & (1 << 5))) | |
2063 | sio_data->skip_fan |= (1 << 3); | |
2064 | if (!(reg & (1 << 4))) | |
2065 | sio_data->skip_fan |= (1 << 4); | |
2066 | ||
2067 | /* Check for pwm3, fan3 */ | |
2068 | reg = superio_inb(IT87_SIO_GPIO3_REG); | |
2069 | if (reg & (1 << 6)) | |
2070 | sio_data->skip_pwm |= (1 << 2); | |
2071 | if (reg & (1 << 7)) | |
2072 | sio_data->skip_fan |= (1 << 2); | |
2073 | ||
2074 | /* Check for pwm2, fan2 */ | |
2075 | reg = superio_inb(IT87_SIO_GPIO5_REG); | |
2076 | if (reg & (1 << 1)) | |
2077 | sio_data->skip_pwm |= (1 << 1); | |
2078 | if (reg & (1 << 2)) | |
2079 | sio_data->skip_fan |= (1 << 1); | |
2080 | ||
c145d5c6 | 2081 | sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f; |
895ff267 | 2082 | } else { |
87673dd7 | 2083 | int reg; |
9172b5d1 | 2084 | bool uart6; |
87673dd7 JD |
2085 | |
2086 | superio_select(GPIO); | |
44c1bcd4 | 2087 | |
895ff267 | 2088 | reg = superio_inb(IT87_SIO_GPIO3_REG); |
32dd7c40 | 2089 | if (!sio_data->skip_vid) { |
44c1bcd4 JD |
2090 | /* We need at least 4 VID pins */ |
2091 | if (reg & 0x0f) { | |
a8ca1037 | 2092 | pr_info("VID is disabled (pins used for GPIO)\n"); |
44c1bcd4 JD |
2093 | sio_data->skip_vid = 1; |
2094 | } | |
895ff267 JD |
2095 | } |
2096 | ||
591ec650 JD |
2097 | /* Check if fan3 is there or not */ |
2098 | if (reg & (1 << 6)) | |
2099 | sio_data->skip_pwm |= (1 << 2); | |
2100 | if (reg & (1 << 7)) | |
2101 | sio_data->skip_fan |= (1 << 2); | |
2102 | ||
2103 | /* Check if fan2 is there or not */ | |
2104 | reg = superio_inb(IT87_SIO_GPIO5_REG); | |
2105 | if (reg & (1 << 1)) | |
2106 | sio_data->skip_pwm |= (1 << 1); | |
2107 | if (reg & (1 << 2)) | |
2108 | sio_data->skip_fan |= (1 << 1); | |
2109 | ||
895ff267 JD |
2110 | if ((sio_data->type == it8718 || sio_data->type == it8720) |
2111 | && !(sio_data->skip_vid)) | |
b74f3fdd | 2112 | sio_data->vid_value = superio_inb(IT87_SIO_VID_REG); |
87673dd7 JD |
2113 | |
2114 | reg = superio_inb(IT87_SIO_PINX2_REG); | |
9172b5d1 GR |
2115 | |
2116 | uart6 = sio_data->type == it8782 && (reg & (1 << 2)); | |
2117 | ||
436cad2a JD |
2118 | /* |
2119 | * The IT8720F has no VIN7 pin, so VCCH should always be | |
2120 | * routed internally to VIN7 with an internal divider. | |
2121 | * Curiously, there still is a configuration bit to control | |
2122 | * this, which means it can be set incorrectly. And even | |
2123 | * more curiously, many boards out there are improperly | |
2124 | * configured, even though the IT8720F datasheet claims | |
2125 | * that the internal routing of VCCH to VIN7 is the default | |
2126 | * setting. So we force the internal routing in this case. | |
0531d98b GR |
2127 | * |
2128 | * On IT8782F, VIN7 is multiplexed with one of the UART6 pins. | |
9172b5d1 GR |
2129 | * If UART6 is enabled, re-route VIN7 to the internal divider |
2130 | * if that is not already the case. | |
436cad2a | 2131 | */ |
9172b5d1 | 2132 | if ((sio_data->type == it8720 || uart6) && !(reg & (1 << 1))) { |
436cad2a JD |
2133 | reg |= (1 << 1); |
2134 | superio_outb(IT87_SIO_PINX2_REG, reg); | |
a8ca1037 | 2135 | pr_notice("Routing internal VCCH to in7\n"); |
436cad2a | 2136 | } |
87673dd7 | 2137 | if (reg & (1 << 0)) |
738e5e05 | 2138 | sio_data->internal |= (1 << 0); |
7f5726c3 | 2139 | if (reg & (1 << 1)) |
738e5e05 | 2140 | sio_data->internal |= (1 << 1); |
d9b327c3 | 2141 | |
9172b5d1 GR |
2142 | /* |
2143 | * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7. | |
2144 | * While VIN7 can be routed to the internal voltage divider, | |
2145 | * VIN5 and VIN6 are not available if UART6 is enabled. | |
4573acbc GR |
2146 | * |
2147 | * Also, temp3 is not available if UART6 is enabled and TEMPIN3 | |
2148 | * is the temperature source. Since we can not read the | |
2149 | * temperature source here, skip_temp is preliminary. | |
9172b5d1 | 2150 | */ |
4573acbc | 2151 | if (uart6) { |
9172b5d1 | 2152 | sio_data->skip_in |= (1 << 5) | (1 << 6); |
4573acbc GR |
2153 | sio_data->skip_temp |= (1 << 2); |
2154 | } | |
9172b5d1 | 2155 | |
d9b327c3 | 2156 | sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f; |
87673dd7 | 2157 | } |
d9b327c3 | 2158 | if (sio_data->beep_pin) |
a8ca1037 | 2159 | pr_info("Beeping is supported\n"); |
87673dd7 | 2160 | |
98dd22c3 JD |
2161 | /* Disable specific features based on DMI strings */ |
2162 | board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR); | |
2163 | board_name = dmi_get_system_info(DMI_BOARD_NAME); | |
2164 | if (board_vendor && board_name) { | |
2165 | if (strcmp(board_vendor, "nVIDIA") == 0 | |
2166 | && strcmp(board_name, "FN68PT") == 0) { | |
4a0d71cf GR |
2167 | /* |
2168 | * On the Shuttle SN68PT, FAN_CTL2 is apparently not | |
2169 | * connected to a fan, but to something else. One user | |
2170 | * has reported instant system power-off when changing | |
2171 | * the PWM2 duty cycle, so we disable it. | |
2172 | * I use the board name string as the trigger in case | |
2173 | * the same board is ever used in other systems. | |
2174 | */ | |
a8ca1037 | 2175 | pr_info("Disabling pwm2 due to hardware constraints\n"); |
98dd22c3 JD |
2176 | sio_data->skip_pwm = (1 << 1); |
2177 | } | |
2178 | } | |
2179 | ||
1da177e4 LT |
2180 | exit: |
2181 | superio_exit(); | |
2182 | return err; | |
2183 | } | |
2184 | ||
723a0aa0 JD |
2185 | static void it87_remove_files(struct device *dev) |
2186 | { | |
2187 | struct it87_data *data = platform_get_drvdata(pdev); | |
a8b3a3a5 | 2188 | struct it87_sio_data *sio_data = dev_get_platdata(dev); |
723a0aa0 JD |
2189 | int i; |
2190 | ||
2191 | sysfs_remove_group(&dev->kobj, &it87_group); | |
c145d5c6 | 2192 | for (i = 0; i < 10; i++) { |
9172b5d1 GR |
2193 | if (sio_data->skip_in & (1 << i)) |
2194 | continue; | |
2195 | sysfs_remove_group(&dev->kobj, &it87_group_in[i]); | |
2196 | if (it87_attributes_in_beep[i]) | |
2197 | sysfs_remove_file(&dev->kobj, | |
2198 | it87_attributes_in_beep[i]); | |
2199 | } | |
4573acbc GR |
2200 | for (i = 0; i < 3; i++) { |
2201 | if (!(data->has_temp & (1 << i))) | |
2202 | continue; | |
2203 | sysfs_remove_group(&dev->kobj, &it87_group_temp[i]); | |
161d898a GR |
2204 | if (has_temp_offset(data)) |
2205 | sysfs_remove_file(&dev->kobj, | |
2206 | it87_attributes_temp_offset[i]); | |
4573acbc GR |
2207 | if (sio_data->beep_pin) |
2208 | sysfs_remove_file(&dev->kobj, | |
2209 | it87_attributes_temp_beep[i]); | |
2210 | } | |
fa3f70d6 | 2211 | for (i = 0; i < 6; i++) { |
723a0aa0 JD |
2212 | if (!(data->has_fan & (1 << i))) |
2213 | continue; | |
e1169ba0 | 2214 | sysfs_remove_group(&dev->kobj, &it87_group_fan[i]); |
d9b327c3 JD |
2215 | if (sio_data->beep_pin) |
2216 | sysfs_remove_file(&dev->kobj, | |
2217 | it87_attributes_fan_beep[i]); | |
e1169ba0 GR |
2218 | if (i < 3 && !has_16bit_fans(data)) |
2219 | sysfs_remove_file(&dev->kobj, | |
2220 | it87_attributes_fan_div[i]); | |
723a0aa0 JD |
2221 | } |
2222 | for (i = 0; i < 3; i++) { | |
1696d1de | 2223 | if (sio_data->skip_pwm & (1 << i)) |
723a0aa0 JD |
2224 | continue; |
2225 | sysfs_remove_group(&dev->kobj, &it87_group_pwm[i]); | |
4f3f51bc JD |
2226 | if (has_old_autopwm(data)) |
2227 | sysfs_remove_group(&dev->kobj, | |
2228 | &it87_group_autopwm[i]); | |
723a0aa0 | 2229 | } |
6a8d7acf JD |
2230 | if (!sio_data->skip_vid) |
2231 | sysfs_remove_group(&dev->kobj, &it87_group_vid); | |
738e5e05 | 2232 | sysfs_remove_group(&dev->kobj, &it87_group_label); |
723a0aa0 JD |
2233 | } |
2234 | ||
6c931ae1 | 2235 | static int it87_probe(struct platform_device *pdev) |
1da177e4 | 2236 | { |
1da177e4 | 2237 | struct it87_data *data; |
b74f3fdd | 2238 | struct resource *res; |
2239 | struct device *dev = &pdev->dev; | |
a8b3a3a5 | 2240 | struct it87_sio_data *sio_data = dev_get_platdata(dev); |
723a0aa0 | 2241 | int err = 0, i; |
1da177e4 | 2242 | int enable_pwm_interface; |
d9b327c3 | 2243 | int fan_beep_need_rw; |
b74f3fdd | 2244 | |
2245 | res = platform_get_resource(pdev, IORESOURCE_IO, 0); | |
62a1d05f GR |
2246 | if (!devm_request_region(&pdev->dev, res->start, IT87_EC_EXTENT, |
2247 | DRVNAME)) { | |
b74f3fdd | 2248 | dev_err(dev, "Failed to request region 0x%lx-0x%lx\n", |
2249 | (unsigned long)res->start, | |
87b4b663 | 2250 | (unsigned long)(res->start + IT87_EC_EXTENT - 1)); |
62a1d05f | 2251 | return -EBUSY; |
8e9afcbb | 2252 | } |
1da177e4 | 2253 | |
62a1d05f GR |
2254 | data = devm_kzalloc(&pdev->dev, sizeof(struct it87_data), GFP_KERNEL); |
2255 | if (!data) | |
2256 | return -ENOMEM; | |
1da177e4 | 2257 | |
b74f3fdd | 2258 | data->addr = res->start; |
2259 | data->type = sio_data->type; | |
483db43e | 2260 | data->features = it87_devices[sio_data->type].features; |
5d8d2f2b | 2261 | data->peci_mask = it87_devices[sio_data->type].peci_mask; |
19529784 | 2262 | data->old_peci_mask = it87_devices[sio_data->type].old_peci_mask; |
483db43e GR |
2263 | data->name = it87_devices[sio_data->type].name; |
2264 | /* | |
2265 | * IT8705F Datasheet 0.4.1, 3h == Version G. | |
2266 | * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J. | |
2267 | * These are the first revisions with 16-bit tachometer support. | |
2268 | */ | |
2269 | switch (data->type) { | |
2270 | case it87: | |
2271 | if (sio_data->revision >= 0x03) { | |
2272 | data->features &= ~FEAT_OLD_AUTOPWM; | |
9faf28ca | 2273 | data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS; |
483db43e GR |
2274 | } |
2275 | break; | |
2276 | case it8712: | |
2277 | if (sio_data->revision >= 0x08) { | |
2278 | data->features &= ~FEAT_OLD_AUTOPWM; | |
9faf28ca GR |
2279 | data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS | |
2280 | FEAT_FIVE_FANS; | |
483db43e GR |
2281 | } |
2282 | break; | |
2283 | default: | |
2284 | break; | |
2285 | } | |
1da177e4 LT |
2286 | |
2287 | /* Now, we do the remaining detection. */ | |
b74f3fdd | 2288 | if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80) |
62a1d05f GR |
2289 | || it87_read_value(data, IT87_REG_CHIPID) != 0x90) |
2290 | return -ENODEV; | |
1da177e4 | 2291 | |
b74f3fdd | 2292 | platform_set_drvdata(pdev, data); |
1da177e4 | 2293 | |
9a61bf63 | 2294 | mutex_init(&data->update_lock); |
1da177e4 | 2295 | |
1da177e4 | 2296 | /* Check PWM configuration */ |
b74f3fdd | 2297 | enable_pwm_interface = it87_check_pwm(dev); |
1da177e4 | 2298 | |
44c1bcd4 | 2299 | /* Starting with IT8721F, we handle scaling of internal voltages */ |
16b5dda2 | 2300 | if (has_12mv_adc(data)) { |
44c1bcd4 JD |
2301 | if (sio_data->internal & (1 << 0)) |
2302 | data->in_scaled |= (1 << 3); /* in3 is AVCC */ | |
2303 | if (sio_data->internal & (1 << 1)) | |
2304 | data->in_scaled |= (1 << 7); /* in7 is VSB */ | |
2305 | if (sio_data->internal & (1 << 2)) | |
2306 | data->in_scaled |= (1 << 8); /* in8 is Vbat */ | |
c145d5c6 RM |
2307 | if (sio_data->internal & (1 << 3)) |
2308 | data->in_scaled |= (1 << 9); /* in9 is AVCC */ | |
7bc32d29 GR |
2309 | } else if (sio_data->type == it8781 || sio_data->type == it8782 || |
2310 | sio_data->type == it8783) { | |
0531d98b GR |
2311 | if (sio_data->internal & (1 << 0)) |
2312 | data->in_scaled |= (1 << 3); /* in3 is VCC5V */ | |
2313 | if (sio_data->internal & (1 << 1)) | |
2314 | data->in_scaled |= (1 << 7); /* in7 is VCCH5V */ | |
44c1bcd4 JD |
2315 | } |
2316 | ||
4573acbc GR |
2317 | data->has_temp = 0x07; |
2318 | if (sio_data->skip_temp & (1 << 2)) { | |
2319 | if (sio_data->type == it8782 | |
2320 | && !(it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x80)) | |
2321 | data->has_temp &= ~(1 << 2); | |
2322 | } | |
2323 | ||
1da177e4 | 2324 | /* Initialize the IT87 chip */ |
b74f3fdd | 2325 | it87_init_device(pdev); |
1da177e4 LT |
2326 | |
2327 | /* Register sysfs hooks */ | |
5f2dc798 JD |
2328 | err = sysfs_create_group(&dev->kobj, &it87_group); |
2329 | if (err) | |
62a1d05f | 2330 | return err; |
17d648bf | 2331 | |
c145d5c6 | 2332 | for (i = 0; i < 10; i++) { |
9172b5d1 GR |
2333 | if (sio_data->skip_in & (1 << i)) |
2334 | continue; | |
2335 | err = sysfs_create_group(&dev->kobj, &it87_group_in[i]); | |
2336 | if (err) | |
62a1d05f | 2337 | goto error; |
9172b5d1 GR |
2338 | if (sio_data->beep_pin && it87_attributes_in_beep[i]) { |
2339 | err = sysfs_create_file(&dev->kobj, | |
2340 | it87_attributes_in_beep[i]); | |
2341 | if (err) | |
62a1d05f | 2342 | goto error; |
9172b5d1 GR |
2343 | } |
2344 | } | |
2345 | ||
4573acbc GR |
2346 | for (i = 0; i < 3; i++) { |
2347 | if (!(data->has_temp & (1 << i))) | |
2348 | continue; | |
2349 | err = sysfs_create_group(&dev->kobj, &it87_group_temp[i]); | |
d9b327c3 | 2350 | if (err) |
62a1d05f | 2351 | goto error; |
161d898a GR |
2352 | if (has_temp_offset(data)) { |
2353 | err = sysfs_create_file(&dev->kobj, | |
2354 | it87_attributes_temp_offset[i]); | |
2355 | if (err) | |
2356 | goto error; | |
2357 | } | |
4573acbc GR |
2358 | if (sio_data->beep_pin) { |
2359 | err = sysfs_create_file(&dev->kobj, | |
2360 | it87_attributes_temp_beep[i]); | |
2361 | if (err) | |
2362 | goto error; | |
2363 | } | |
d9b327c3 JD |
2364 | } |
2365 | ||
9060f8bd | 2366 | /* Do not create fan files for disabled fans */ |
d9b327c3 | 2367 | fan_beep_need_rw = 1; |
fa3f70d6 | 2368 | for (i = 0; i < 6; i++) { |
723a0aa0 JD |
2369 | if (!(data->has_fan & (1 << i))) |
2370 | continue; | |
e1169ba0 | 2371 | err = sysfs_create_group(&dev->kobj, &it87_group_fan[i]); |
723a0aa0 | 2372 | if (err) |
62a1d05f | 2373 | goto error; |
d9b327c3 | 2374 | |
e1169ba0 GR |
2375 | if (i < 3 && !has_16bit_fans(data)) { |
2376 | err = sysfs_create_file(&dev->kobj, | |
2377 | it87_attributes_fan_div[i]); | |
2378 | if (err) | |
2379 | goto error; | |
2380 | } | |
2381 | ||
d9b327c3 JD |
2382 | if (sio_data->beep_pin) { |
2383 | err = sysfs_create_file(&dev->kobj, | |
2384 | it87_attributes_fan_beep[i]); | |
2385 | if (err) | |
62a1d05f | 2386 | goto error; |
d9b327c3 JD |
2387 | if (!fan_beep_need_rw) |
2388 | continue; | |
2389 | ||
4a0d71cf GR |
2390 | /* |
2391 | * As we have a single beep enable bit for all fans, | |
d9b327c3 | 2392 | * only the first enabled fan has a writable attribute |
4a0d71cf GR |
2393 | * for it. |
2394 | */ | |
d9b327c3 JD |
2395 | if (sysfs_chmod_file(&dev->kobj, |
2396 | it87_attributes_fan_beep[i], | |
2397 | S_IRUGO | S_IWUSR)) | |
2398 | dev_dbg(dev, "chmod +w fan%d_beep failed\n", | |
2399 | i + 1); | |
2400 | fan_beep_need_rw = 0; | |
2401 | } | |
17d648bf JD |
2402 | } |
2403 | ||
1da177e4 | 2404 | if (enable_pwm_interface) { |
723a0aa0 JD |
2405 | for (i = 0; i < 3; i++) { |
2406 | if (sio_data->skip_pwm & (1 << i)) | |
2407 | continue; | |
2408 | err = sysfs_create_group(&dev->kobj, | |
2409 | &it87_group_pwm[i]); | |
2410 | if (err) | |
62a1d05f | 2411 | goto error; |
4f3f51bc JD |
2412 | |
2413 | if (!has_old_autopwm(data)) | |
2414 | continue; | |
2415 | err = sysfs_create_group(&dev->kobj, | |
2416 | &it87_group_autopwm[i]); | |
2417 | if (err) | |
62a1d05f | 2418 | goto error; |
98dd22c3 | 2419 | } |
1da177e4 LT |
2420 | } |
2421 | ||
895ff267 | 2422 | if (!sio_data->skip_vid) { |
303760b4 | 2423 | data->vrm = vid_which_vrm(); |
87673dd7 | 2424 | /* VID reading from Super-I/O config space if available */ |
b74f3fdd | 2425 | data->vid = sio_data->vid_value; |
6a8d7acf JD |
2426 | err = sysfs_create_group(&dev->kobj, &it87_group_vid); |
2427 | if (err) | |
62a1d05f | 2428 | goto error; |
87808be4 JD |
2429 | } |
2430 | ||
738e5e05 | 2431 | /* Export labels for internal sensors */ |
c145d5c6 | 2432 | for (i = 0; i < 4; i++) { |
738e5e05 JD |
2433 | if (!(sio_data->internal & (1 << i))) |
2434 | continue; | |
2435 | err = sysfs_create_file(&dev->kobj, | |
2436 | it87_attributes_label[i]); | |
2437 | if (err) | |
62a1d05f | 2438 | goto error; |
738e5e05 JD |
2439 | } |
2440 | ||
1beeffe4 TJ |
2441 | data->hwmon_dev = hwmon_device_register(dev); |
2442 | if (IS_ERR(data->hwmon_dev)) { | |
2443 | err = PTR_ERR(data->hwmon_dev); | |
62a1d05f | 2444 | goto error; |
1da177e4 LT |
2445 | } |
2446 | ||
2447 | return 0; | |
2448 | ||
62a1d05f | 2449 | error: |
723a0aa0 | 2450 | it87_remove_files(dev); |
1da177e4 LT |
2451 | return err; |
2452 | } | |
2453 | ||
281dfd0b | 2454 | static int it87_remove(struct platform_device *pdev) |
1da177e4 | 2455 | { |
b74f3fdd | 2456 | struct it87_data *data = platform_get_drvdata(pdev); |
1da177e4 | 2457 | |
1beeffe4 | 2458 | hwmon_device_unregister(data->hwmon_dev); |
723a0aa0 | 2459 | it87_remove_files(&pdev->dev); |
943b0830 | 2460 | |
1da177e4 LT |
2461 | return 0; |
2462 | } | |
2463 | ||
4a0d71cf GR |
2464 | /* |
2465 | * Must be called with data->update_lock held, except during initialization. | |
2466 | * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks, | |
2467 | * would slow down the IT87 access and should not be necessary. | |
2468 | */ | |
b74f3fdd | 2469 | static int it87_read_value(struct it87_data *data, u8 reg) |
1da177e4 | 2470 | { |
b74f3fdd | 2471 | outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET); |
2472 | return inb_p(data->addr + IT87_DATA_REG_OFFSET); | |
1da177e4 LT |
2473 | } |
2474 | ||
4a0d71cf GR |
2475 | /* |
2476 | * Must be called with data->update_lock held, except during initialization. | |
2477 | * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks, | |
2478 | * would slow down the IT87 access and should not be necessary. | |
2479 | */ | |
b74f3fdd | 2480 | static void it87_write_value(struct it87_data *data, u8 reg, u8 value) |
1da177e4 | 2481 | { |
b74f3fdd | 2482 | outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET); |
2483 | outb_p(value, data->addr + IT87_DATA_REG_OFFSET); | |
1da177e4 LT |
2484 | } |
2485 | ||
2486 | /* Return 1 if and only if the PWM interface is safe to use */ | |
6c931ae1 | 2487 | static int it87_check_pwm(struct device *dev) |
1da177e4 | 2488 | { |
b74f3fdd | 2489 | struct it87_data *data = dev_get_drvdata(dev); |
4a0d71cf GR |
2490 | /* |
2491 | * Some BIOSes fail to correctly configure the IT87 fans. All fans off | |
1da177e4 | 2492 | * and polarity set to active low is sign that this is the case so we |
4a0d71cf GR |
2493 | * disable pwm control to protect the user. |
2494 | */ | |
b74f3fdd | 2495 | int tmp = it87_read_value(data, IT87_REG_FAN_CTL); |
1da177e4 LT |
2496 | if ((tmp & 0x87) == 0) { |
2497 | if (fix_pwm_polarity) { | |
4a0d71cf GR |
2498 | /* |
2499 | * The user asks us to attempt a chip reconfiguration. | |
1da177e4 | 2500 | * This means switching to active high polarity and |
4a0d71cf GR |
2501 | * inverting all fan speed values. |
2502 | */ | |
1da177e4 LT |
2503 | int i; |
2504 | u8 pwm[3]; | |
2505 | ||
2506 | for (i = 0; i < 3; i++) | |
b74f3fdd | 2507 | pwm[i] = it87_read_value(data, |
1da177e4 LT |
2508 | IT87_REG_PWM(i)); |
2509 | ||
4a0d71cf GR |
2510 | /* |
2511 | * If any fan is in automatic pwm mode, the polarity | |
1da177e4 LT |
2512 | * might be correct, as suspicious as it seems, so we |
2513 | * better don't change anything (but still disable the | |
4a0d71cf GR |
2514 | * PWM interface). |
2515 | */ | |
1da177e4 | 2516 | if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) { |
1d9bcf6a GR |
2517 | dev_info(dev, |
2518 | "Reconfiguring PWM to active high polarity\n"); | |
b74f3fdd | 2519 | it87_write_value(data, IT87_REG_FAN_CTL, |
1da177e4 LT |
2520 | tmp | 0x87); |
2521 | for (i = 0; i < 3; i++) | |
b74f3fdd | 2522 | it87_write_value(data, |
1da177e4 LT |
2523 | IT87_REG_PWM(i), |
2524 | 0x7f & ~pwm[i]); | |
2525 | return 1; | |
2526 | } | |
2527 | ||
1d9bcf6a GR |
2528 | dev_info(dev, |
2529 | "PWM configuration is too broken to be fixed\n"); | |
1da177e4 LT |
2530 | } |
2531 | ||
1d9bcf6a GR |
2532 | dev_info(dev, |
2533 | "Detected broken BIOS defaults, disabling PWM interface\n"); | |
1da177e4 LT |
2534 | return 0; |
2535 | } else if (fix_pwm_polarity) { | |
1d9bcf6a GR |
2536 | dev_info(dev, |
2537 | "PWM configuration looks sane, won't touch\n"); | |
1da177e4 LT |
2538 | } |
2539 | ||
2540 | return 1; | |
2541 | } | |
2542 | ||
2543 | /* Called when we have found a new IT87. */ | |
6c931ae1 | 2544 | static void it87_init_device(struct platform_device *pdev) |
1da177e4 | 2545 | { |
a8b3a3a5 | 2546 | struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev); |
b74f3fdd | 2547 | struct it87_data *data = platform_get_drvdata(pdev); |
1da177e4 | 2548 | int tmp, i; |
591ec650 | 2549 | u8 mask; |
1da177e4 | 2550 | |
4a0d71cf GR |
2551 | /* |
2552 | * For each PWM channel: | |
b99883dc JD |
2553 | * - If it is in automatic mode, setting to manual mode should set |
2554 | * the fan to full speed by default. | |
2555 | * - If it is in manual mode, we need a mapping to temperature | |
2556 | * channels to use when later setting to automatic mode later. | |
2557 | * Use a 1:1 mapping by default (we are clueless.) | |
2558 | * In both cases, the value can (and should) be changed by the user | |
6229cdb2 JD |
2559 | * prior to switching to a different mode. |
2560 | * Note that this is no longer needed for the IT8721F and later, as | |
2561 | * these have separate registers for the temperature mapping and the | |
4a0d71cf GR |
2562 | * manual duty cycle. |
2563 | */ | |
1da177e4 | 2564 | for (i = 0; i < 3; i++) { |
b99883dc JD |
2565 | data->pwm_temp_map[i] = i; |
2566 | data->pwm_duty[i] = 0x7f; /* Full speed */ | |
4f3f51bc | 2567 | data->auto_pwm[i][3] = 0x7f; /* Full speed, hard-coded */ |
1da177e4 LT |
2568 | } |
2569 | ||
4a0d71cf GR |
2570 | /* |
2571 | * Some chips seem to have default value 0xff for all limit | |
c5df9b7a JD |
2572 | * registers. For low voltage limits it makes no sense and triggers |
2573 | * alarms, so change to 0 instead. For high temperature limits, it | |
2574 | * means -1 degree C, which surprisingly doesn't trigger an alarm, | |
4a0d71cf GR |
2575 | * but is still confusing, so change to 127 degrees C. |
2576 | */ | |
c5df9b7a | 2577 | for (i = 0; i < 8; i++) { |
b74f3fdd | 2578 | tmp = it87_read_value(data, IT87_REG_VIN_MIN(i)); |
c5df9b7a | 2579 | if (tmp == 0xff) |
b74f3fdd | 2580 | it87_write_value(data, IT87_REG_VIN_MIN(i), 0); |
c5df9b7a JD |
2581 | } |
2582 | for (i = 0; i < 3; i++) { | |
b74f3fdd | 2583 | tmp = it87_read_value(data, IT87_REG_TEMP_HIGH(i)); |
c5df9b7a | 2584 | if (tmp == 0xff) |
b74f3fdd | 2585 | it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127); |
c5df9b7a JD |
2586 | } |
2587 | ||
4a0d71cf GR |
2588 | /* |
2589 | * Temperature channels are not forcibly enabled, as they can be | |
a00afb97 JD |
2590 | * set to two different sensor types and we can't guess which one |
2591 | * is correct for a given system. These channels can be enabled at | |
4a0d71cf GR |
2592 | * run-time through the temp{1-3}_type sysfs accessors if needed. |
2593 | */ | |
1da177e4 LT |
2594 | |
2595 | /* Check if voltage monitors are reset manually or by some reason */ | |
b74f3fdd | 2596 | tmp = it87_read_value(data, IT87_REG_VIN_ENABLE); |
1da177e4 LT |
2597 | if ((tmp & 0xff) == 0) { |
2598 | /* Enable all voltage monitors */ | |
b74f3fdd | 2599 | it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff); |
1da177e4 LT |
2600 | } |
2601 | ||
2602 | /* Check if tachometers are reset manually or by some reason */ | |
591ec650 | 2603 | mask = 0x70 & ~(sio_data->skip_fan << 4); |
b74f3fdd | 2604 | data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL); |
591ec650 | 2605 | if ((data->fan_main_ctrl & mask) == 0) { |
1da177e4 | 2606 | /* Enable all fan tachometers */ |
591ec650 | 2607 | data->fan_main_ctrl |= mask; |
5f2dc798 JD |
2608 | it87_write_value(data, IT87_REG_FAN_MAIN_CTRL, |
2609 | data->fan_main_ctrl); | |
1da177e4 | 2610 | } |
9060f8bd | 2611 | data->has_fan = (data->fan_main_ctrl >> 4) & 0x07; |
1da177e4 | 2612 | |
fa3f70d6 GR |
2613 | tmp = it87_read_value(data, IT87_REG_FAN_16BIT); |
2614 | ||
9faf28ca GR |
2615 | /* Set tachometers to 16-bit mode if needed */ |
2616 | if (has_fan16_config(data)) { | |
9060f8bd | 2617 | if (~tmp & 0x07 & data->has_fan) { |
b74f3fdd | 2618 | dev_dbg(&pdev->dev, |
17d648bf | 2619 | "Setting fan1-3 to 16-bit mode\n"); |
b74f3fdd | 2620 | it87_write_value(data, IT87_REG_FAN_16BIT, |
17d648bf JD |
2621 | tmp | 0x07); |
2622 | } | |
9faf28ca GR |
2623 | } |
2624 | ||
2625 | /* Check for additional fans */ | |
2626 | if (has_five_fans(data)) { | |
9faf28ca GR |
2627 | if (tmp & (1 << 4)) |
2628 | data->has_fan |= (1 << 3); /* fan4 enabled */ | |
2629 | if (tmp & (1 << 5)) | |
2630 | data->has_fan |= (1 << 4); /* fan5 enabled */ | |
fa3f70d6 GR |
2631 | if (has_six_fans(data) && (tmp & (1 << 2))) |
2632 | data->has_fan |= (1 << 5); /* fan6 enabled */ | |
17d648bf JD |
2633 | } |
2634 | ||
591ec650 JD |
2635 | /* Fan input pins may be used for alternative functions */ |
2636 | data->has_fan &= ~sio_data->skip_fan; | |
2637 | ||
1da177e4 | 2638 | /* Start monitoring */ |
b74f3fdd | 2639 | it87_write_value(data, IT87_REG_CONFIG, |
41002f8d | 2640 | (it87_read_value(data, IT87_REG_CONFIG) & 0x3e) |
1da177e4 LT |
2641 | | (update_vbat ? 0x41 : 0x01)); |
2642 | } | |
2643 | ||
b99883dc JD |
2644 | static void it87_update_pwm_ctrl(struct it87_data *data, int nr) |
2645 | { | |
2646 | data->pwm_ctrl[nr] = it87_read_value(data, IT87_REG_PWM(nr)); | |
16b5dda2 | 2647 | if (has_newer_autopwm(data)) { |
b99883dc | 2648 | data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03; |
6229cdb2 JD |
2649 | data->pwm_duty[nr] = it87_read_value(data, |
2650 | IT87_REG_PWM_DUTY(nr)); | |
2651 | } else { | |
2652 | if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */ | |
2653 | data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03; | |
2654 | else /* Manual mode */ | |
2655 | data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f; | |
2656 | } | |
4f3f51bc JD |
2657 | |
2658 | if (has_old_autopwm(data)) { | |
2659 | int i; | |
2660 | ||
2661 | for (i = 0; i < 5 ; i++) | |
2662 | data->auto_temp[nr][i] = it87_read_value(data, | |
2663 | IT87_REG_AUTO_TEMP(nr, i)); | |
2664 | for (i = 0; i < 3 ; i++) | |
2665 | data->auto_pwm[nr][i] = it87_read_value(data, | |
2666 | IT87_REG_AUTO_PWM(nr, i)); | |
2667 | } | |
b99883dc JD |
2668 | } |
2669 | ||
1da177e4 LT |
2670 | static struct it87_data *it87_update_device(struct device *dev) |
2671 | { | |
b74f3fdd | 2672 | struct it87_data *data = dev_get_drvdata(dev); |
1da177e4 LT |
2673 | int i; |
2674 | ||
9a61bf63 | 2675 | mutex_lock(&data->update_lock); |
1da177e4 LT |
2676 | |
2677 | if (time_after(jiffies, data->last_updated + HZ + HZ / 2) | |
2678 | || !data->valid) { | |
1da177e4 | 2679 | if (update_vbat) { |
4a0d71cf GR |
2680 | /* |
2681 | * Cleared after each update, so reenable. Value | |
2682 | * returned by this read will be previous value | |
2683 | */ | |
b74f3fdd | 2684 | it87_write_value(data, IT87_REG_CONFIG, |
5f2dc798 | 2685 | it87_read_value(data, IT87_REG_CONFIG) | 0x40); |
1da177e4 LT |
2686 | } |
2687 | for (i = 0; i <= 7; i++) { | |
929c6a56 | 2688 | data->in[i][0] = |
5f2dc798 | 2689 | it87_read_value(data, IT87_REG_VIN(i)); |
929c6a56 | 2690 | data->in[i][1] = |
5f2dc798 | 2691 | it87_read_value(data, IT87_REG_VIN_MIN(i)); |
929c6a56 | 2692 | data->in[i][2] = |
5f2dc798 | 2693 | it87_read_value(data, IT87_REG_VIN_MAX(i)); |
1da177e4 | 2694 | } |
3543a53f | 2695 | /* in8 (battery) has no limit registers */ |
929c6a56 | 2696 | data->in[8][0] = it87_read_value(data, IT87_REG_VIN(8)); |
73055405 GR |
2697 | if (has_avcc3(data)) |
2698 | data->in[9][0] = it87_read_value(data, IT87_REG_AVCC3); | |
1da177e4 | 2699 | |
fa3f70d6 | 2700 | for (i = 0; i < 6; i++) { |
9060f8bd JD |
2701 | /* Skip disabled fans */ |
2702 | if (!(data->has_fan & (1 << i))) | |
2703 | continue; | |
2704 | ||
e1169ba0 | 2705 | data->fan[i][1] = |
5f2dc798 | 2706 | it87_read_value(data, IT87_REG_FAN_MIN[i]); |
e1169ba0 | 2707 | data->fan[i][0] = it87_read_value(data, |
c7f1f716 | 2708 | IT87_REG_FAN[i]); |
17d648bf | 2709 | /* Add high byte if in 16-bit mode */ |
0475169c | 2710 | if (has_16bit_fans(data)) { |
e1169ba0 | 2711 | data->fan[i][0] |= it87_read_value(data, |
c7f1f716 | 2712 | IT87_REG_FANX[i]) << 8; |
e1169ba0 | 2713 | data->fan[i][1] |= it87_read_value(data, |
c7f1f716 | 2714 | IT87_REG_FANX_MIN[i]) << 8; |
17d648bf | 2715 | } |
1da177e4 LT |
2716 | } |
2717 | for (i = 0; i < 3; i++) { | |
4573acbc GR |
2718 | if (!(data->has_temp & (1 << i))) |
2719 | continue; | |
60ca385a | 2720 | data->temp[i][0] = |
5f2dc798 | 2721 | it87_read_value(data, IT87_REG_TEMP(i)); |
60ca385a | 2722 | data->temp[i][1] = |
5f2dc798 | 2723 | it87_read_value(data, IT87_REG_TEMP_LOW(i)); |
60ca385a GR |
2724 | data->temp[i][2] = |
2725 | it87_read_value(data, IT87_REG_TEMP_HIGH(i)); | |
161d898a GR |
2726 | if (has_temp_offset(data)) |
2727 | data->temp[i][3] = | |
2728 | it87_read_value(data, | |
2729 | IT87_REG_TEMP_OFFSET[i]); | |
1da177e4 LT |
2730 | } |
2731 | ||
17d648bf | 2732 | /* Newer chips don't have clock dividers */ |
0475169c | 2733 | if ((data->has_fan & 0x07) && !has_16bit_fans(data)) { |
b74f3fdd | 2734 | i = it87_read_value(data, IT87_REG_FAN_DIV); |
17d648bf JD |
2735 | data->fan_div[0] = i & 0x07; |
2736 | data->fan_div[1] = (i >> 3) & 0x07; | |
2737 | data->fan_div[2] = (i & 0x40) ? 3 : 1; | |
2738 | } | |
1da177e4 LT |
2739 | |
2740 | data->alarms = | |
b74f3fdd | 2741 | it87_read_value(data, IT87_REG_ALARM1) | |
2742 | (it87_read_value(data, IT87_REG_ALARM2) << 8) | | |
2743 | (it87_read_value(data, IT87_REG_ALARM3) << 16); | |
d9b327c3 | 2744 | data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE); |
b99883dc | 2745 | |
b74f3fdd | 2746 | data->fan_main_ctrl = it87_read_value(data, |
2747 | IT87_REG_FAN_MAIN_CTRL); | |
2748 | data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL); | |
b99883dc JD |
2749 | for (i = 0; i < 3; i++) |
2750 | it87_update_pwm_ctrl(data, i); | |
b74f3fdd | 2751 | |
2752 | data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE); | |
19529784 | 2753 | data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA); |
4a0d71cf GR |
2754 | /* |
2755 | * The IT8705F does not have VID capability. | |
2756 | * The IT8718F and later don't use IT87_REG_VID for the | |
2757 | * same purpose. | |
2758 | */ | |
17d648bf | 2759 | if (data->type == it8712 || data->type == it8716) { |
b74f3fdd | 2760 | data->vid = it87_read_value(data, IT87_REG_VID); |
4a0d71cf GR |
2761 | /* |
2762 | * The older IT8712F revisions had only 5 VID pins, | |
2763 | * but we assume it is always safe to read 6 bits. | |
2764 | */ | |
17d648bf | 2765 | data->vid &= 0x3f; |
1da177e4 LT |
2766 | } |
2767 | data->last_updated = jiffies; | |
2768 | data->valid = 1; | |
2769 | } | |
2770 | ||
9a61bf63 | 2771 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
2772 | |
2773 | return data; | |
2774 | } | |
2775 | ||
b74f3fdd | 2776 | static int __init it87_device_add(unsigned short address, |
2777 | const struct it87_sio_data *sio_data) | |
2778 | { | |
2779 | struct resource res = { | |
87b4b663 BH |
2780 | .start = address + IT87_EC_OFFSET, |
2781 | .end = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1, | |
b74f3fdd | 2782 | .name = DRVNAME, |
2783 | .flags = IORESOURCE_IO, | |
2784 | }; | |
2785 | int err; | |
2786 | ||
b9acb64a JD |
2787 | err = acpi_check_resource_conflict(&res); |
2788 | if (err) | |
2789 | goto exit; | |
2790 | ||
b74f3fdd | 2791 | pdev = platform_device_alloc(DRVNAME, address); |
2792 | if (!pdev) { | |
2793 | err = -ENOMEM; | |
a8ca1037 | 2794 | pr_err("Device allocation failed\n"); |
b74f3fdd | 2795 | goto exit; |
2796 | } | |
2797 | ||
2798 | err = platform_device_add_resources(pdev, &res, 1); | |
2799 | if (err) { | |
a8ca1037 | 2800 | pr_err("Device resource addition failed (%d)\n", err); |
b74f3fdd | 2801 | goto exit_device_put; |
2802 | } | |
2803 | ||
2804 | err = platform_device_add_data(pdev, sio_data, | |
2805 | sizeof(struct it87_sio_data)); | |
2806 | if (err) { | |
a8ca1037 | 2807 | pr_err("Platform data allocation failed\n"); |
b74f3fdd | 2808 | goto exit_device_put; |
2809 | } | |
2810 | ||
2811 | err = platform_device_add(pdev); | |
2812 | if (err) { | |
a8ca1037 | 2813 | pr_err("Device addition failed (%d)\n", err); |
b74f3fdd | 2814 | goto exit_device_put; |
2815 | } | |
2816 | ||
2817 | return 0; | |
2818 | ||
2819 | exit_device_put: | |
2820 | platform_device_put(pdev); | |
2821 | exit: | |
2822 | return err; | |
2823 | } | |
2824 | ||
1da177e4 LT |
2825 | static int __init sm_it87_init(void) |
2826 | { | |
b74f3fdd | 2827 | int err; |
5f2dc798 | 2828 | unsigned short isa_address = 0; |
b74f3fdd | 2829 | struct it87_sio_data sio_data; |
2830 | ||
98dd22c3 | 2831 | memset(&sio_data, 0, sizeof(struct it87_sio_data)); |
b74f3fdd | 2832 | err = it87_find(&isa_address, &sio_data); |
2833 | if (err) | |
2834 | return err; | |
2835 | err = platform_driver_register(&it87_driver); | |
2836 | if (err) | |
2837 | return err; | |
fde09509 | 2838 | |
b74f3fdd | 2839 | err = it87_device_add(isa_address, &sio_data); |
5f2dc798 | 2840 | if (err) { |
b74f3fdd | 2841 | platform_driver_unregister(&it87_driver); |
2842 | return err; | |
2843 | } | |
2844 | ||
2845 | return 0; | |
1da177e4 LT |
2846 | } |
2847 | ||
2848 | static void __exit sm_it87_exit(void) | |
2849 | { | |
b74f3fdd | 2850 | platform_device_unregister(pdev); |
2851 | platform_driver_unregister(&it87_driver); | |
1da177e4 LT |
2852 | } |
2853 | ||
2854 | ||
7c81c60f | 2855 | MODULE_AUTHOR("Chris Gauthron, Jean Delvare <jdelvare@suse.de>"); |
44c1bcd4 | 2856 | MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver"); |
1da177e4 LT |
2857 | module_param(update_vbat, bool, 0); |
2858 | MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value"); | |
2859 | module_param(fix_pwm_polarity, bool, 0); | |
5f2dc798 JD |
2860 | MODULE_PARM_DESC(fix_pwm_polarity, |
2861 | "Force PWM polarity to active high (DANGEROUS)"); | |
1da177e4 LT |
2862 | MODULE_LICENSE("GPL"); |
2863 | ||
2864 | module_init(sm_it87_init); | |
2865 | module_exit(sm_it87_exit); |