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74ba9207 1// SPDX-License-Identifier: GPL-2.0-or-later
1da177e4
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2/*
3 * lm90.c - Part of lm_sensors, Linux kernel modules for hardware
4 * monitoring
7c81c60f 5 * Copyright (C) 2003-2010 Jean Delvare <jdelvare@suse.de>
1da177e4
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6 *
7 * Based on the lm83 driver. The LM90 is a sensor chip made by National
8 * Semiconductor. It reports up to two temperatures (its own plus up to
9 * one external one) with a 0.125 deg resolution (1 deg for local
a874a10c 10 * temperature) and a 3-4 deg accuracy.
1da177e4
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11 *
12 * This driver also supports the LM89 and LM99, two other sensor chips
13 * made by National Semiconductor. Both have an increased remote
14 * temperature measurement accuracy (1 degree), and the LM99
15 * additionally shifts remote temperatures (measured and limits) by 16
97ae60bb 16 * degrees, which allows for higher temperatures measurement.
44bbe87e 17 * Note that there is no way to differentiate between both chips.
97ae60bb 18 * When device is auto-detected, the driver will assume an LM99.
1da177e4
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19 *
20 * This driver also supports the LM86, another sensor chip made by
21 * National Semiconductor. It is exactly similar to the LM90 except it
22 * has a higher accuracy.
1da177e4
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23 *
24 * This driver also supports the ADM1032, a sensor chip made by Analog
25 * Devices. That chip is similar to the LM90, with a few differences
a874a10c
JD
26 * that are not handled by this driver. Among others, it has a higher
27 * accuracy than the LM90, much like the LM86 does.
1da177e4
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28 *
29 * This driver also supports the MAX6657, MAX6658 and MAX6659 sensor
a874a10c 30 * chips made by Maxim. These chips are similar to the LM86.
44bbe87e 31 * Note that there is no easy way to differentiate between the three
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32 * variants. We use the device address to detect MAX6659, which will result
33 * in a detection as max6657 if it is on address 0x4c. The extra address
34 * and features of the MAX6659 are only supported if the chip is configured
35 * explicitly as max6659, or if its address is not 0x4c.
36 * These chips lack the remote temperature offset feature.
1da177e4 37 *
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38 * This driver also supports the MAX6654 chip made by Maxim. This chip can be
39 * at 9 different addresses, similar to MAX6680/MAX6681. The MAX6654 is similar
40 * to MAX6657/MAX6658/MAX6659, but does not support critical temperature
41 * limits. Extended range is available by setting the configuration register
42 * accordingly, and is done during initialization. Extended precision is only
43 * available at conversion rates of 1 Hz and slower. Note that extended
44 * precision is not enabled by default, as this driver initializes all chips
45 * to 2 Hz by design.
229d495d 46 *
1a51e068
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47 * This driver also supports the MAX6646, MAX6647, MAX6648, MAX6649 and
48 * MAX6692 chips made by Maxim. These are again similar to the LM86,
49 * but they use unsigned temperature values and can report temperatures
50 * from 0 to 145 degrees.
271dabf5 51 *
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52 * This driver also supports the MAX6680 and MAX6681, two other sensor
53 * chips made by Maxim. These are quite similar to the other Maxim
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54 * chips. The MAX6680 and MAX6681 only differ in the pinout so they can
55 * be treated identically.
32c82a93 56 *
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57 * This driver also supports the MAX6695 and MAX6696, two other sensor
58 * chips made by Maxim. These are also quite similar to other Maxim
59 * chips, but support three temperature sensors instead of two. MAX6695
60 * and MAX6696 only differ in the pinout so they can be treated identically.
61 *
5a4e5e6a
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62 * This driver also supports ADT7461 and ADT7461A from Analog Devices as well as
63 * NCT1008 from ON Semiconductor. The chips are supported in both compatibility
64 * and extended mode. They are mostly compatible with LM90 except for a data
65 * format difference for the temperature value registers.
1da177e4 66 *
2ef01793
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67 * This driver also supports the SA56004 from Philips. This device is
68 * pin-compatible with the LM86, the ED/EDP parts are also address-compatible.
69 *
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70 * This driver also supports the G781 from GMT. This device is compatible
71 * with the ADM1032.
72 *
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73 * This driver also supports TMP451 and TMP461 from Texas Instruments.
74 * Those devices are supported in both compatibility and extended mode.
75 * They are mostly compatible with ADT7461 except for local temperature
76 * low byte register and max conversion rate.
1daaceb2 77 *
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78 * Since the LM90 was the first chipset supported by this driver, most
79 * comments will refer to this chipset, but are actually general and
80 * concern all supported chipsets, unless mentioned otherwise.
1da177e4
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81 */
82
1da177e4
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83#include <linux/module.h>
84#include <linux/init.h>
85#include <linux/slab.h>
86#include <linux/jiffies.h>
87#include <linux/i2c.h>
943b0830
MH
88#include <linux/hwmon.h>
89#include <linux/err.h>
9a61bf63 90#include <linux/mutex.h>
df8d57bf 91#include <linux/of_device.h>
0e39e01c 92#include <linux/sysfs.h>
109b1283 93#include <linux/interrupt.h>
3e0f964f 94#include <linux/regulator/consumer.h>
1da177e4
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95
96/*
97 * Addresses to scan
98 * Address is fully defined internally and cannot be changed except for
32c82a93 99 * MAX6659, MAX6680 and MAX6681.
5a4e5e6a
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100 * LM86, LM89, LM90, LM99, ADM1032, ADM1032-1, ADT7461, ADT7461A, MAX6649,
101 * MAX6657, MAX6658, NCT1008 and W83L771 have address 0x4c.
102 * ADM1032-2, ADT7461-2, ADT7461A-2, LM89-1, LM99-1, MAX6646, and NCT1008D
103 * have address 0x4d.
271dabf5 104 * MAX6647 has address 0x4e.
13c84951 105 * MAX6659 can have address 0x4c, 0x4d or 0x4e.
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106 * MAX6654, MAX6680, and MAX6681 can have address 0x18, 0x19, 0x1a, 0x29,
107 * 0x2a, 0x2b, 0x4c, 0x4d or 0x4e.
2ef01793 108 * SA56004 can have address 0x48 through 0x4F.
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109 */
110
25e9c86d 111static const unsigned short normal_i2c[] = {
2ef01793
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112 0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b, 0x48, 0x49, 0x4a, 0x4b, 0x4c,
113 0x4d, 0x4e, 0x4f, I2C_CLIENT_END };
1da177e4 114
13c84951 115enum chips { lm90, adm1032, lm99, lm86, max6657, max6659, adt7461, max6680,
366f0399 116 max6646, w83l771, max6696, sa56004, g781, tmp451, tmp461, max6654 };
1da177e4
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117
118/*
119 * The LM90 registers
120 */
121
122#define LM90_REG_R_MAN_ID 0xFE
123#define LM90_REG_R_CHIP_ID 0xFF
124#define LM90_REG_R_CONFIG1 0x03
125#define LM90_REG_W_CONFIG1 0x09
126#define LM90_REG_R_CONFIG2 0xBF
127#define LM90_REG_W_CONFIG2 0xBF
128#define LM90_REG_R_CONVRATE 0x04
129#define LM90_REG_W_CONVRATE 0x0A
130#define LM90_REG_R_STATUS 0x02
131#define LM90_REG_R_LOCAL_TEMP 0x00
132#define LM90_REG_R_LOCAL_HIGH 0x05
133#define LM90_REG_W_LOCAL_HIGH 0x0B
134#define LM90_REG_R_LOCAL_LOW 0x06
135#define LM90_REG_W_LOCAL_LOW 0x0C
136#define LM90_REG_R_LOCAL_CRIT 0x20
137#define LM90_REG_W_LOCAL_CRIT 0x20
138#define LM90_REG_R_REMOTE_TEMPH 0x01
139#define LM90_REG_R_REMOTE_TEMPL 0x10
140#define LM90_REG_R_REMOTE_OFFSH 0x11
141#define LM90_REG_W_REMOTE_OFFSH 0x11
142#define LM90_REG_R_REMOTE_OFFSL 0x12
143#define LM90_REG_W_REMOTE_OFFSL 0x12
144#define LM90_REG_R_REMOTE_HIGHH 0x07
145#define LM90_REG_W_REMOTE_HIGHH 0x0D
146#define LM90_REG_R_REMOTE_HIGHL 0x13
147#define LM90_REG_W_REMOTE_HIGHL 0x13
148#define LM90_REG_R_REMOTE_LOWH 0x08
149#define LM90_REG_W_REMOTE_LOWH 0x0E
150#define LM90_REG_R_REMOTE_LOWL 0x14
151#define LM90_REG_W_REMOTE_LOWL 0x14
152#define LM90_REG_R_REMOTE_CRIT 0x19
153#define LM90_REG_W_REMOTE_CRIT 0x19
154#define LM90_REG_R_TCRIT_HYST 0x21
155#define LM90_REG_W_TCRIT_HYST 0x21
156
229d495d 157/* MAX6646/6647/6649/6654/6657/6658/6659/6695/6696 registers */
f65e1708
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158
159#define MAX6657_REG_R_LOCAL_TEMPL 0x11
06e1c0a2 160#define MAX6696_REG_R_STATUS2 0x12
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161#define MAX6659_REG_R_REMOTE_EMERG 0x16
162#define MAX6659_REG_W_REMOTE_EMERG 0x16
163#define MAX6659_REG_R_LOCAL_EMERG 0x17
164#define MAX6659_REG_W_LOCAL_EMERG 0x17
f65e1708 165
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166/* SA56004 registers */
167
168#define SA56004_REG_R_LOCAL_TEMPL 0x22
169
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170#define LM90_MAX_CONVRATE_MS 16000 /* Maximum conversion rate in ms */
171
366f0399 172/* TMP451/TMP461 registers */
1daaceb2 173#define TMP451_REG_R_LOCAL_TEMPL 0x15
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174#define TMP451_REG_CONALERT 0x22
175
176#define TMP461_REG_CHEN 0x16
177#define TMP461_REG_DFC 0x24
1daaceb2 178
23b2d477
NC
179/*
180 * Device flags
181 */
88073bb1
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182#define LM90_FLAG_ADT7461_EXT (1 << 0) /* ADT7461 extended mode */
183/* Device features */
184#define LM90_HAVE_OFFSET (1 << 1) /* temperature offset register */
88073bb1 185#define LM90_HAVE_REM_LIMIT_EXT (1 << 3) /* extended remote limit */
6948708d 186#define LM90_HAVE_EMERGENCY (1 << 4) /* 3rd upper (emergency) limit */
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GR
187#define LM90_HAVE_EMERGENCY_ALARM (1 << 5)/* emergency alarm */
188#define LM90_HAVE_TEMP3 (1 << 6) /* 3rd temperature sensor */
1179324c 189#define LM90_HAVE_BROKEN_ALERT (1 << 7) /* Broken alert */
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GR
190#define LM90_HAVE_EXTENDED_TEMP (1 << 8) /* extended temperature support*/
191#define LM90_PAUSE_FOR_CONFIG (1 << 9) /* Pause conversion for config */
f5302480 192#define LM90_HAVE_CRIT (1 << 10)/* Chip supports CRIT/OVERT register */
3396ff80 193#define LM90_HAVE_CRIT_ALRM_SWP (1 << 11)/* critical alarm bits swapped */
23b2d477 194
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WN
195/* LM90 status */
196#define LM90_STATUS_LTHRM (1 << 0) /* local THERM limit tripped */
197#define LM90_STATUS_RTHRM (1 << 1) /* remote THERM limit tripped */
198#define LM90_STATUS_ROPEN (1 << 2) /* remote is an open circuit */
199#define LM90_STATUS_RLOW (1 << 3) /* remote low temp limit tripped */
200#define LM90_STATUS_RHIGH (1 << 4) /* remote high temp limit tripped */
201#define LM90_STATUS_LLOW (1 << 5) /* local low temp limit tripped */
202#define LM90_STATUS_LHIGH (1 << 6) /* local high temp limit tripped */
3bb27ec7 203#define LM90_STATUS_BUSY (1 << 7) /* conversion is ongoing */
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WN
204
205#define MAX6696_STATUS2_R2THRM (1 << 1) /* remote2 THERM limit tripped */
206#define MAX6696_STATUS2_R2OPEN (1 << 2) /* remote2 is an open circuit */
207#define MAX6696_STATUS2_R2LOW (1 << 3) /* remote2 low temp limit tripped */
208#define MAX6696_STATUS2_R2HIGH (1 << 4) /* remote2 high temp limit tripped */
209#define MAX6696_STATUS2_ROT2 (1 << 5) /* remote emergency limit tripped */
210#define MAX6696_STATUS2_R2OT2 (1 << 6) /* remote2 emergency limit tripped */
211#define MAX6696_STATUS2_LOT2 (1 << 7) /* local emergency limit tripped */
212
1da177e4
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213/*
214 * Driver data (common to all clients)
215 */
216
9b0e8526
JD
217static const struct i2c_device_id lm90_id[] = {
218 { "adm1032", adm1032 },
219 { "adt7461", adt7461 },
5a4e5e6a 220 { "adt7461a", adt7461 },
ae544f64 221 { "g781", g781 },
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JD
222 { "lm90", lm90 },
223 { "lm86", lm86 },
97ae60bb
JD
224 { "lm89", lm86 },
225 { "lm99", lm99 },
271dabf5
BH
226 { "max6646", max6646 },
227 { "max6647", max6646 },
228 { "max6649", max6646 },
229d495d 229 { "max6654", max6654 },
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JD
230 { "max6657", max6657 },
231 { "max6658", max6657 },
13c84951 232 { "max6659", max6659 },
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233 { "max6680", max6680 },
234 { "max6681", max6680 },
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GR
235 { "max6695", max6696 },
236 { "max6696", max6696 },
5a4e5e6a 237 { "nct1008", adt7461 },
6771ea1f 238 { "w83l771", w83l771 },
2ef01793 239 { "sa56004", sa56004 },
1daaceb2 240 { "tmp451", tmp451 },
366f0399 241 { "tmp461", tmp461 },
9b0e8526
JD
242 { }
243};
244MODULE_DEVICE_TABLE(i2c, lm90_id);
245
787afaa3 246static const struct of_device_id __maybe_unused lm90_of_match[] = {
df8d57bf
JMC
247 {
248 .compatible = "adi,adm1032",
249 .data = (void *)adm1032
250 },
251 {
252 .compatible = "adi,adt7461",
253 .data = (void *)adt7461
254 },
255 {
256 .compatible = "adi,adt7461a",
257 .data = (void *)adt7461
258 },
259 {
260 .compatible = "gmt,g781",
261 .data = (void *)g781
262 },
263 {
264 .compatible = "national,lm90",
265 .data = (void *)lm90
266 },
267 {
268 .compatible = "national,lm86",
269 .data = (void *)lm86
270 },
271 {
272 .compatible = "national,lm89",
273 .data = (void *)lm86
274 },
275 {
276 .compatible = "national,lm99",
277 .data = (void *)lm99
278 },
279 {
280 .compatible = "dallas,max6646",
281 .data = (void *)max6646
282 },
283 {
284 .compatible = "dallas,max6647",
285 .data = (void *)max6646
286 },
287 {
288 .compatible = "dallas,max6649",
289 .data = (void *)max6646
290 },
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JL
291 {
292 .compatible = "dallas,max6654",
293 .data = (void *)max6654
294 },
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JMC
295 {
296 .compatible = "dallas,max6657",
297 .data = (void *)max6657
298 },
299 {
300 .compatible = "dallas,max6658",
301 .data = (void *)max6657
302 },
303 {
304 .compatible = "dallas,max6659",
305 .data = (void *)max6659
306 },
307 {
308 .compatible = "dallas,max6680",
309 .data = (void *)max6680
310 },
311 {
312 .compatible = "dallas,max6681",
313 .data = (void *)max6680
314 },
315 {
316 .compatible = "dallas,max6695",
317 .data = (void *)max6696
318 },
319 {
320 .compatible = "dallas,max6696",
321 .data = (void *)max6696
322 },
323 {
324 .compatible = "onnn,nct1008",
325 .data = (void *)adt7461
326 },
327 {
328 .compatible = "winbond,w83l771",
329 .data = (void *)w83l771
330 },
331 {
332 .compatible = "nxp,sa56004",
333 .data = (void *)sa56004
334 },
335 {
336 .compatible = "ti,tmp451",
337 .data = (void *)tmp451
338 },
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339 {
340 .compatible = "ti,tmp461",
341 .data = (void *)tmp461
342 },
df8d57bf
JMC
343 { },
344};
345MODULE_DEVICE_TABLE(of, lm90_of_match);
346
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347/*
348 * chip type specific parameters
349 */
350struct lm90_params {
351 u32 flags; /* Capabilities */
352 u16 alert_alarms; /* Which alarm bits trigger ALERT# */
353 /* Upper 8 bits for max6695/96 */
0c01b644 354 u8 max_convrate; /* Maximum conversion rate register value */
a095f687 355 u8 reg_local_ext; /* Extended local temp register (optional) */
4667bcb8
GR
356};
357
358static const struct lm90_params lm90_params[] = {
359 [adm1032] = {
1179324c 360 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
f5302480 361 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_CRIT,
4667bcb8 362 .alert_alarms = 0x7c,
0c01b644 363 .max_convrate = 10,
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GR
364 },
365 [adt7461] = {
1179324c 366 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
f5302480
GR
367 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP
368 | LM90_HAVE_CRIT,
4667bcb8 369 .alert_alarms = 0x7c,
0c01b644 370 .max_convrate = 10,
4667bcb8 371 },
ae544f64
GR
372 [g781] = {
373 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
f5302480 374 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_CRIT,
ae544f64 375 .alert_alarms = 0x7c,
daf9e0fe 376 .max_convrate = 7,
ae544f64 377 },
4667bcb8 378 [lm86] = {
f5302480
GR
379 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
380 | LM90_HAVE_CRIT,
4667bcb8 381 .alert_alarms = 0x7b,
0c01b644 382 .max_convrate = 9,
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GR
383 },
384 [lm90] = {
f5302480
GR
385 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
386 | LM90_HAVE_CRIT,
4667bcb8 387 .alert_alarms = 0x7b,
0c01b644 388 .max_convrate = 9,
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GR
389 },
390 [lm99] = {
f5302480
GR
391 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
392 | LM90_HAVE_CRIT,
4667bcb8 393 .alert_alarms = 0x7b,
0c01b644 394 .max_convrate = 9,
4667bcb8
GR
395 },
396 [max6646] = {
ec6ed60d 397 .flags = LM90_HAVE_CRIT | LM90_HAVE_BROKEN_ALERT,
4667bcb8 398 .alert_alarms = 0x7c,
0c01b644 399 .max_convrate = 6,
2ef01793 400 .reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL,
4667bcb8 401 },
229d495d 402 [max6654] = {
35ad03d9 403 .flags = LM90_HAVE_BROKEN_ALERT,
229d495d
JL
404 .alert_alarms = 0x7c,
405 .max_convrate = 7,
406 .reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL,
407 },
4667bcb8 408 [max6657] = {
f5302480 409 .flags = LM90_PAUSE_FOR_CONFIG | LM90_HAVE_CRIT,
4667bcb8 410 .alert_alarms = 0x7c,
0c01b644 411 .max_convrate = 8,
2ef01793 412 .reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL,
4667bcb8
GR
413 },
414 [max6659] = {
f5302480 415 .flags = LM90_HAVE_EMERGENCY | LM90_HAVE_CRIT,
4667bcb8 416 .alert_alarms = 0x7c,
0c01b644 417 .max_convrate = 8,
2ef01793 418 .reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL,
4667bcb8
GR
419 },
420 [max6680] = {
3396ff80 421 .flags = LM90_HAVE_OFFSET | LM90_HAVE_CRIT
b07c8f46 422 | LM90_HAVE_CRIT_ALRM_SWP | LM90_HAVE_BROKEN_ALERT,
4667bcb8 423 .alert_alarms = 0x7c,
0c01b644 424 .max_convrate = 7,
4667bcb8
GR
425 },
426 [max6696] = {
a095f687 427 .flags = LM90_HAVE_EMERGENCY
f5302480 428 | LM90_HAVE_EMERGENCY_ALARM | LM90_HAVE_TEMP3 | LM90_HAVE_CRIT,
e41fae2b 429 .alert_alarms = 0x1c7c,
0c01b644 430 .max_convrate = 6,
2ef01793 431 .reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL,
4667bcb8
GR
432 },
433 [w83l771] = {
f5302480 434 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_CRIT,
4667bcb8 435 .alert_alarms = 0x7c,
0c01b644 436 .max_convrate = 8,
4667bcb8 437 },
2ef01793 438 [sa56004] = {
f5302480 439 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_CRIT,
2ef01793
SD
440 .alert_alarms = 0x7b,
441 .max_convrate = 9,
442 .reg_local_ext = SA56004_REG_R_LOCAL_TEMPL,
443 },
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WN
444 [tmp451] = {
445 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
f5302480 446 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP | LM90_HAVE_CRIT,
1daaceb2
WN
447 .alert_alarms = 0x7c,
448 .max_convrate = 9,
449 .reg_local_ext = TMP451_REG_R_LOCAL_TEMPL,
eb1c8f43 450 },
366f0399
GR
451 [tmp461] = {
452 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
f5302480 453 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP | LM90_HAVE_CRIT,
366f0399
GR
454 .alert_alarms = 0x7c,
455 .max_convrate = 9,
456 .reg_local_ext = TMP451_REG_R_LOCAL_TEMPL,
457 },
4667bcb8
GR
458};
459
40465d94
WN
460/*
461 * TEMP8 register index
462 */
463enum lm90_temp8_reg_index {
464 LOCAL_LOW = 0,
465 LOCAL_HIGH,
466 LOCAL_CRIT,
467 REMOTE_CRIT,
468 LOCAL_EMERG, /* max6659 and max6695/96 */
469 REMOTE_EMERG, /* max6659 and max6695/96 */
470 REMOTE2_CRIT, /* max6695/96 only */
471 REMOTE2_EMERG, /* max6695/96 only */
472 TEMP8_REG_NUM
473};
474
475/*
476 * TEMP11 register index
477 */
478enum lm90_temp11_reg_index {
479 REMOTE_TEMP = 0,
480 REMOTE_LOW,
481 REMOTE_HIGH,
482 REMOTE_OFFSET, /* except max6646, max6657/58/59, and max6695/96 */
483 LOCAL_TEMP,
484 REMOTE2_TEMP, /* max6695/96 only */
485 REMOTE2_LOW, /* max6695/96 only */
486 REMOTE2_HIGH, /* max6695/96 only */
487 TEMP11_REG_NUM
488};
489
1da177e4
LT
490/*
491 * Client data (each client gets its own)
492 */
493
494struct lm90_data {
1de8b250 495 struct i2c_client *client;
94dbd23e 496 struct device *hwmon_dev;
eb1c8f43
GR
497 u32 channel_config[4];
498 struct hwmon_channel_info temp_info;
499 const struct hwmon_channel_info *info[3];
500 struct hwmon_chip_info chip;
9a61bf63 501 struct mutex update_lock;
2f83ab77 502 bool valid; /* true if register values are valid */
1da177e4
LT
503 unsigned long last_updated; /* in jiffies */
504 int kind;
4667bcb8 505 u32 flags;
1da177e4 506
38bab98a 507 unsigned int update_interval; /* in milliseconds */
0c01b644 508
b849e5d1 509 u8 config; /* Current configuration register value */
95238364 510 u8 config_orig; /* Original configuration register value */
0c01b644 511 u8 convrate_orig; /* Original conversion rate register value */
06e1c0a2
GR
512 u16 alert_alarms; /* Which alarm bits trigger ALERT# */
513 /* Upper 8 bits for max6695/96 */
0c01b644 514 u8 max_convrate; /* Maximum conversion rate */
2ef01793 515 u8 reg_local_ext; /* local extension register offset */
95238364 516
1da177e4 517 /* registers values */
40465d94
WN
518 s8 temp8[TEMP8_REG_NUM];
519 s16 temp11[TEMP11_REG_NUM];
1da177e4 520 u8 temp_hyst;
06e1c0a2 521 u16 alarms; /* bitvector (upper 8 bits for max6695/96) */
1da177e4
LT
522};
523
15b66ab6
GR
524/*
525 * Support functions
526 */
527
528/*
529 * The ADM1032 supports PEC but not on write byte transactions, so we need
530 * to explicitly ask for a transaction without PEC.
531 */
532static inline s32 adm1032_write_byte(struct i2c_client *client, u8 value)
533{
534 return i2c_smbus_xfer(client->adapter, client->addr,
535 client->flags & ~I2C_CLIENT_PEC,
536 I2C_SMBUS_WRITE, value, I2C_SMBUS_BYTE, NULL);
537}
538
539/*
540 * It is assumed that client->update_lock is held (unless we are in
541 * detection or initialization steps). This matters when PEC is enabled,
542 * because we don't want the address pointer to change between the write
543 * byte and the read byte transactions.
544 */
37ad04d7 545static int lm90_read_reg(struct i2c_client *client, u8 reg)
15b66ab6
GR
546{
547 int err;
548
549 if (client->flags & I2C_CLIENT_PEC) {
550 err = adm1032_write_byte(client, reg);
551 if (err >= 0)
552 err = i2c_smbus_read_byte(client);
553 } else
554 err = i2c_smbus_read_byte_data(client, reg);
555
37ad04d7 556 return err;
15b66ab6
GR
557}
558
37ad04d7 559static int lm90_read16(struct i2c_client *client, u8 regh, u8 regl)
15b66ab6 560{
37ad04d7 561 int oldh, newh, l;
15b66ab6
GR
562
563 /*
564 * There is a trick here. We have to read two registers to have the
565 * sensor temperature, but we have to beware a conversion could occur
25985edc 566 * between the readings. The datasheet says we should either use
15b66ab6
GR
567 * the one-shot conversion register, which we don't want to do
568 * (disables hardware monitoring) or monitor the busy bit, which is
569 * impossible (we can't read the values and monitor that bit at the
570 * exact same time). So the solution used here is to read the high
571 * byte once, then the low byte, then the high byte again. If the new
572 * high byte matches the old one, then we have a valid reading. Else
573 * we have to read the low byte again, and now we believe we have a
574 * correct reading.
575 */
37ad04d7
GR
576 oldh = lm90_read_reg(client, regh);
577 if (oldh < 0)
578 return oldh;
579 l = lm90_read_reg(client, regl);
580 if (l < 0)
581 return l;
582 newh = lm90_read_reg(client, regh);
583 if (newh < 0)
584 return newh;
15b66ab6 585 if (oldh != newh) {
37ad04d7
GR
586 l = lm90_read_reg(client, regl);
587 if (l < 0)
588 return l;
15b66ab6 589 }
37ad04d7 590 return (newh << 8) | l;
15b66ab6
GR
591}
592
7a1d220c
GR
593static int lm90_update_confreg(struct lm90_data *data, u8 config)
594{
595 if (data->config != config) {
596 int err;
597
598 err = i2c_smbus_write_byte_data(data->client,
599 LM90_REG_W_CONFIG1,
600 config);
601 if (err)
602 return err;
603 data->config = config;
604 }
605 return 0;
606}
607
15b66ab6
GR
608/*
609 * client->update_lock must be held when calling this function (unless we are
610 * in detection or initialization steps), and while a remote channel other
611 * than channel 0 is selected. Also, calling code must make sure to re-select
612 * external channel 0 before releasing the lock. This is necessary because
613 * various registers have different meanings as a result of selecting a
614 * non-default remote channel.
615 */
7a1d220c 616static int lm90_select_remote_channel(struct lm90_data *data, int channel)
15b66ab6 617{
7a1d220c
GR
618 int err = 0;
619
15b66ab6 620 if (data->kind == max6696) {
b849e5d1 621 u8 config = data->config & ~0x08;
b849e5d1 622
15b66ab6
GR
623 if (channel)
624 config |= 0x08;
7a1d220c 625 err = lm90_update_confreg(data, config);
15b66ab6 626 }
7a1d220c 627 return err;
15b66ab6
GR
628}
629
7a1d220c 630static int lm90_write_convrate(struct lm90_data *data, int val)
62456189 631{
b849e5d1 632 u8 config = data->config;
62456189 633 int err;
62456189
BY
634
635 /* Save config and pause conversion */
636 if (data->flags & LM90_PAUSE_FOR_CONFIG) {
7a1d220c
GR
637 err = lm90_update_confreg(data, config | 0x40);
638 if (err < 0)
639 return err;
62456189
BY
640 }
641
642 /* Set conv rate */
7a1d220c 643 err = i2c_smbus_write_byte_data(data->client, LM90_REG_W_CONVRATE, val);
62456189
BY
644
645 /* Revert change to config */
7a1d220c 646 lm90_update_confreg(data, config);
62456189
BY
647
648 return err;
649}
650
0c01b644
GR
651/*
652 * Set conversion rate.
653 * client->update_lock must be held when calling this function (unless we are
654 * in detection or initialization steps).
655 */
eb1c8f43
GR
656static int lm90_set_convrate(struct i2c_client *client, struct lm90_data *data,
657 unsigned int interval)
0c01b644 658{
0c01b644 659 unsigned int update_interval;
eb1c8f43 660 int i, err;
0c01b644
GR
661
662 /* Shift calculations to avoid rounding errors */
663 interval <<= 6;
664
665 /* find the nearest update rate */
666 for (i = 0, update_interval = LM90_MAX_CONVRATE_MS << 6;
667 i < data->max_convrate; i++, update_interval >>= 1)
668 if (interval >= update_interval * 3 / 4)
669 break;
670
7a1d220c 671 err = lm90_write_convrate(data, i);
0c01b644 672 data->update_interval = DIV_ROUND_CLOSEST(update_interval, 64);
eb1c8f43 673 return err;
0c01b644
GR
674}
675
10bfef47
GR
676static int lm90_update_limits(struct device *dev)
677{
678 struct lm90_data *data = dev_get_drvdata(dev);
679 struct i2c_client *client = data->client;
680 int val;
681
f5302480
GR
682 if (data->flags & LM90_HAVE_CRIT) {
683 val = lm90_read_reg(client, LM90_REG_R_LOCAL_CRIT);
684 if (val < 0)
685 return val;
686 data->temp8[LOCAL_CRIT] = val;
10bfef47 687
f5302480
GR
688 val = lm90_read_reg(client, LM90_REG_R_REMOTE_CRIT);
689 if (val < 0)
690 return val;
691 data->temp8[REMOTE_CRIT] = val;
10bfef47 692
f5302480
GR
693 val = lm90_read_reg(client, LM90_REG_R_TCRIT_HYST);
694 if (val < 0)
695 return val;
696 data->temp_hyst = val;
697 }
10bfef47 698
be9d6374 699 val = lm90_read_reg(client, LM90_REG_R_REMOTE_LOWH);
10bfef47
GR
700 if (val < 0)
701 return val;
702 data->temp11[REMOTE_LOW] = val << 8;
703
704 if (data->flags & LM90_HAVE_REM_LIMIT_EXT) {
705 val = lm90_read_reg(client, LM90_REG_R_REMOTE_LOWL);
706 if (val < 0)
707 return val;
708 data->temp11[REMOTE_LOW] |= val;
709 }
710
711 val = lm90_read_reg(client, LM90_REG_R_REMOTE_HIGHH);
712 if (val < 0)
713 return val;
714 data->temp11[REMOTE_HIGH] = val << 8;
715
716 if (data->flags & LM90_HAVE_REM_LIMIT_EXT) {
717 val = lm90_read_reg(client, LM90_REG_R_REMOTE_HIGHL);
718 if (val < 0)
719 return val;
720 data->temp11[REMOTE_HIGH] |= val;
721 }
722
723 if (data->flags & LM90_HAVE_OFFSET) {
724 val = lm90_read16(client, LM90_REG_R_REMOTE_OFFSH,
725 LM90_REG_R_REMOTE_OFFSL);
726 if (val < 0)
727 return val;
728 data->temp11[REMOTE_OFFSET] = val;
729 }
730
731 if (data->flags & LM90_HAVE_EMERGENCY) {
732 val = lm90_read_reg(client, MAX6659_REG_R_LOCAL_EMERG);
733 if (val < 0)
734 return val;
735 data->temp8[LOCAL_EMERG] = val;
736
737 val = lm90_read_reg(client, MAX6659_REG_R_REMOTE_EMERG);
738 if (val < 0)
739 return val;
740 data->temp8[REMOTE_EMERG] = val;
741 }
742
743 if (data->kind == max6696) {
7a1d220c 744 val = lm90_select_remote_channel(data, 1);
10bfef47
GR
745 if (val < 0)
746 return val;
747
748 val = lm90_read_reg(client, LM90_REG_R_REMOTE_CRIT);
749 if (val < 0)
750 return val;
751 data->temp8[REMOTE2_CRIT] = val;
752
753 val = lm90_read_reg(client, MAX6659_REG_R_REMOTE_EMERG);
754 if (val < 0)
755 return val;
756 data->temp8[REMOTE2_EMERG] = val;
757
758 val = lm90_read_reg(client, LM90_REG_R_REMOTE_LOWH);
759 if (val < 0)
760 return val;
761 data->temp11[REMOTE2_LOW] = val << 8;
762
763 val = lm90_read_reg(client, LM90_REG_R_REMOTE_HIGHH);
764 if (val < 0)
765 return val;
766 data->temp11[REMOTE2_HIGH] = val << 8;
767
7a1d220c 768 lm90_select_remote_channel(data, 0);
10bfef47
GR
769 }
770
771 return 0;
772}
773
eb1c8f43 774static int lm90_update_device(struct device *dev)
15b66ab6 775{
1de8b250
GR
776 struct lm90_data *data = dev_get_drvdata(dev);
777 struct i2c_client *client = data->client;
0c01b644 778 unsigned long next_update;
eb1c8f43 779 int val;
15b66ab6 780
10bfef47
GR
781 if (!data->valid) {
782 val = lm90_update_limits(dev);
783 if (val < 0)
eb1c8f43 784 return val;
10bfef47
GR
785 }
786
78c2c2fe
JD
787 next_update = data->last_updated +
788 msecs_to_jiffies(data->update_interval);
0c01b644 789 if (time_after(jiffies, next_update) || !data->valid) {
15b66ab6 790 dev_dbg(&client->dev, "Updating lm90 data.\n");
10bfef47 791
2f83ab77 792 data->valid = false;
10bfef47 793
37ad04d7
GR
794 val = lm90_read_reg(client, LM90_REG_R_LOCAL_LOW);
795 if (val < 0)
eb1c8f43 796 return val;
37ad04d7
GR
797 data->temp8[LOCAL_LOW] = val;
798
799 val = lm90_read_reg(client, LM90_REG_R_LOCAL_HIGH);
800 if (val < 0)
eb1c8f43 801 return val;
37ad04d7
GR
802 data->temp8[LOCAL_HIGH] = val;
803
a095f687 804 if (data->reg_local_ext) {
37ad04d7
GR
805 val = lm90_read16(client, LM90_REG_R_LOCAL_TEMP,
806 data->reg_local_ext);
807 if (val < 0)
eb1c8f43 808 return val;
37ad04d7 809 data->temp11[LOCAL_TEMP] = val;
15b66ab6 810 } else {
37ad04d7
GR
811 val = lm90_read_reg(client, LM90_REG_R_LOCAL_TEMP);
812 if (val < 0)
eb1c8f43 813 return val;
37ad04d7 814 data->temp11[LOCAL_TEMP] = val << 8;
15b66ab6 815 }
37ad04d7
GR
816 val = lm90_read16(client, LM90_REG_R_REMOTE_TEMPH,
817 LM90_REG_R_REMOTE_TEMPL);
818 if (val < 0)
eb1c8f43 819 return val;
37ad04d7
GR
820 data->temp11[REMOTE_TEMP] = val;
821
37ad04d7
GR
822 val = lm90_read_reg(client, LM90_REG_R_STATUS);
823 if (val < 0)
eb1c8f43 824 return val;
3bb27ec7 825 data->alarms = val & ~LM90_STATUS_BUSY;
15b66ab6
GR
826
827 if (data->kind == max6696) {
7a1d220c 828 val = lm90_select_remote_channel(data, 1);
37ad04d7 829 if (val < 0)
eb1c8f43 830 return val;
37ad04d7 831
37ad04d7
GR
832 val = lm90_read16(client, LM90_REG_R_REMOTE_TEMPH,
833 LM90_REG_R_REMOTE_TEMPL);
eb1c8f43 834 if (val < 0) {
7a1d220c 835 lm90_select_remote_channel(data, 0);
eb1c8f43
GR
836 return val;
837 }
37ad04d7
GR
838 data->temp11[REMOTE2_TEMP] = val;
839
7a1d220c 840 lm90_select_remote_channel(data, 0);
15b66ab6 841
37ad04d7
GR
842 val = lm90_read_reg(client, MAX6696_REG_R_STATUS2);
843 if (val < 0)
eb1c8f43 844 return val;
37ad04d7 845 data->alarms |= val << 8;
15b66ab6
GR
846 }
847
f36ffeab
GR
848 /*
849 * Re-enable ALERT# output if it was originally enabled and
850 * relevant alarms are all clear
851 */
39e3c0b3 852 if ((client->irq || !(data->config_orig & 0x80)) &&
37ad04d7 853 !(data->alarms & data->alert_alarms)) {
b849e5d1 854 if (data->config & 0x80) {
15b66ab6 855 dev_dbg(&client->dev, "Re-enabling ALERT#\n");
7a1d220c 856 lm90_update_confreg(data, data->config & ~0x80);
15b66ab6
GR
857 }
858 }
859
860 data->last_updated = jiffies;
2f83ab77 861 data->valid = true;
15b66ab6
GR
862 }
863
eb1c8f43 864 return 0;
15b66ab6
GR
865}
866
cea50fe2
NC
867/*
868 * Conversions
869 * For local temperatures and limits, critical limits and the hysteresis
870 * value, the LM90 uses signed 8-bit values with LSB = 1 degree Celsius.
871 * For remote temperatures and limits, it uses signed 11-bit values with
271dabf5
BH
872 * LSB = 0.125 degree Celsius, left-justified in 16-bit registers. Some
873 * Maxim chips use unsigned values.
cea50fe2
NC
874 */
875
9d4d3834 876static inline int temp_from_s8(s8 val)
cea50fe2
NC
877{
878 return val * 1000;
879}
880
271dabf5
BH
881static inline int temp_from_u8(u8 val)
882{
883 return val * 1000;
884}
885
9d4d3834 886static inline int temp_from_s16(s16 val)
cea50fe2
NC
887{
888 return val / 32 * 125;
889}
890
271dabf5
BH
891static inline int temp_from_u16(u16 val)
892{
893 return val / 32 * 125;
894}
895
9d4d3834 896static s8 temp_to_s8(long val)
cea50fe2
NC
897{
898 if (val <= -128000)
899 return -128;
900 if (val >= 127000)
901 return 127;
902 if (val < 0)
903 return (val - 500) / 1000;
904 return (val + 500) / 1000;
905}
906
271dabf5
BH
907static u8 temp_to_u8(long val)
908{
909 if (val <= 0)
910 return 0;
911 if (val >= 255000)
912 return 255;
913 return (val + 500) / 1000;
914}
915
9d4d3834 916static s16 temp_to_s16(long val)
cea50fe2
NC
917{
918 if (val <= -128000)
919 return 0x8000;
920 if (val >= 127875)
921 return 0x7FE0;
922 if (val < 0)
923 return (val - 62) / 125 * 32;
924 return (val + 62) / 125 * 32;
925}
926
927static u8 hyst_to_reg(long val)
928{
929 if (val <= 0)
930 return 0;
931 if (val >= 30500)
932 return 31;
933 return (val + 500) / 1000;
934}
935
936/*
23b2d477
NC
937 * ADT7461 in compatibility mode is almost identical to LM90 except that
938 * attempts to write values that are outside the range 0 < temp < 127 are
939 * treated as the boundary value.
940 *
941 * ADT7461 in "extended mode" operation uses unsigned integers offset by
942 * 64 (e.g., 0 -> -64 degC). The range is restricted to -64..191 degC.
cea50fe2 943 */
9d4d3834 944static inline int temp_from_u8_adt7461(struct lm90_data *data, u8 val)
cea50fe2 945{
23b2d477
NC
946 if (data->flags & LM90_FLAG_ADT7461_EXT)
947 return (val - 64) * 1000;
589f707c 948 return temp_from_s8(val);
cea50fe2
NC
949}
950
9d4d3834 951static inline int temp_from_u16_adt7461(struct lm90_data *data, u16 val)
cea50fe2 952{
23b2d477
NC
953 if (data->flags & LM90_FLAG_ADT7461_EXT)
954 return (val - 0x4000) / 64 * 250;
589f707c 955 return temp_from_s16(val);
23b2d477
NC
956}
957
9d4d3834 958static u8 temp_to_u8_adt7461(struct lm90_data *data, long val)
23b2d477
NC
959{
960 if (data->flags & LM90_FLAG_ADT7461_EXT) {
961 if (val <= -64000)
962 return 0;
963 if (val >= 191000)
964 return 0xFF;
965 return (val + 500 + 64000) / 1000;
23b2d477 966 }
589f707c
GR
967 if (val <= 0)
968 return 0;
969 if (val >= 127000)
970 return 127;
971 return (val + 500) / 1000;
23b2d477
NC
972}
973
9d4d3834 974static u16 temp_to_u16_adt7461(struct lm90_data *data, long val)
23b2d477
NC
975{
976 if (data->flags & LM90_FLAG_ADT7461_EXT) {
977 if (val <= -64000)
978 return 0;
979 if (val >= 191750)
980 return 0xFFC0;
981 return (val + 64000 + 125) / 250 * 64;
23b2d477 982 }
589f707c
GR
983 if (val <= 0)
984 return 0;
985 if (val >= 127750)
986 return 0x7FC0;
987 return (val + 125) / 250 * 64;
cea50fe2
NC
988}
989
eb1c8f43 990/* pec used for ADM1032 only */
e57959a6 991static ssize_t pec_show(struct device *dev, struct device_attribute *dummy,
eb1c8f43 992 char *buf)
30d7394b 993{
eb1c8f43 994 struct i2c_client *client = to_i2c_client(dev);
97ae60bb 995
eb1c8f43 996 return sprintf(buf, "%d\n", !!(client->flags & I2C_CLIENT_PEC));
30d7394b
JD
997}
998
e57959a6
JL
999static ssize_t pec_store(struct device *dev, struct device_attribute *dummy,
1000 const char *buf, size_t count)
30d7394b 1001{
eb1c8f43 1002 struct i2c_client *client = to_i2c_client(dev);
11e57812
GR
1003 long val;
1004 int err;
1005
179c4fdb 1006 err = kstrtol(buf, 10, &val);
11e57812
GR
1007 if (err < 0)
1008 return err;
30d7394b 1009
eb1c8f43
GR
1010 switch (val) {
1011 case 0:
1012 client->flags &= ~I2C_CLIENT_PEC;
1013 break;
1014 case 1:
1015 client->flags |= I2C_CLIENT_PEC;
1016 break;
1017 default:
1018 return -EINVAL;
1019 }
06e1c0a2 1020
30d7394b 1021 return count;
1da177e4 1022}
30d7394b 1023
e57959a6 1024static DEVICE_ATTR_RW(pec);
eb1c8f43
GR
1025
1026static int lm90_get_temp11(struct lm90_data *data, int index)
30d7394b 1027{
eb1c8f43 1028 s16 temp11 = data->temp11[index];
23b2d477
NC
1029 int temp;
1030
8b162502 1031 if (data->flags & LM90_HAVE_EXTENDED_TEMP)
eb1c8f43 1032 temp = temp_from_u16_adt7461(data, temp11);
271dabf5 1033 else if (data->kind == max6646)
eb1c8f43 1034 temp = temp_from_u16(temp11);
23b2d477 1035 else
eb1c8f43 1036 temp = temp_from_s16(temp11);
23b2d477 1037
97ae60bb 1038 /* +16 degrees offset for temp2 for the LM99 */
eb1c8f43 1039 if (data->kind == lm99 && index <= 2)
97ae60bb
JD
1040 temp += 16000;
1041
eb1c8f43 1042 return temp;
1da177e4 1043}
30d7394b 1044
eb1c8f43 1045static int lm90_set_temp11(struct lm90_data *data, int index, long val)
30d7394b 1046{
eb1c8f43 1047 static struct reg {
96512861
GR
1048 u8 high;
1049 u8 low;
eb1c8f43
GR
1050 } reg[] = {
1051 [REMOTE_LOW] = { LM90_REG_W_REMOTE_LOWH, LM90_REG_W_REMOTE_LOWL },
1052 [REMOTE_HIGH] = { LM90_REG_W_REMOTE_HIGHH, LM90_REG_W_REMOTE_HIGHL },
1053 [REMOTE_OFFSET] = { LM90_REG_W_REMOTE_OFFSH, LM90_REG_W_REMOTE_OFFSL },
1054 [REMOTE2_LOW] = { LM90_REG_W_REMOTE_LOWH, LM90_REG_W_REMOTE_LOWL },
1055 [REMOTE2_HIGH] = { LM90_REG_W_REMOTE_HIGHH, LM90_REG_W_REMOTE_HIGHL }
30d7394b 1056 };
1de8b250 1057 struct i2c_client *client = data->client;
eb1c8f43 1058 struct reg *regp = &reg[index];
11e57812
GR
1059 int err;
1060
97ae60bb 1061 /* +16 degrees offset for temp2 for the LM99 */
b50aa496
DO
1062 if (data->kind == lm99 && index <= 2) {
1063 /* prevent integer underflow */
1064 val = max(val, -128000l);
97ae60bb 1065 val -= 16000;
b50aa496 1066 }
97ae60bb 1067
8b162502 1068 if (data->flags & LM90_HAVE_EXTENDED_TEMP)
96512861 1069 data->temp11[index] = temp_to_u16_adt7461(data, val);
271dabf5 1070 else if (data->kind == max6646)
96512861 1071 data->temp11[index] = temp_to_u8(val) << 8;
88073bb1 1072 else if (data->flags & LM90_HAVE_REM_LIMIT_EXT)
96512861 1073 data->temp11[index] = temp_to_s16(val);
88073bb1 1074 else
96512861 1075 data->temp11[index] = temp_to_s8(val) << 8;
5f502a83 1076
7a1d220c 1077 lm90_select_remote_channel(data, index >= 3);
eb1c8f43 1078 err = i2c_smbus_write_byte_data(client, regp->high,
96512861 1079 data->temp11[index] >> 8);
eb1c8f43
GR
1080 if (err < 0)
1081 return err;
88073bb1 1082 if (data->flags & LM90_HAVE_REM_LIMIT_EXT)
eb1c8f43
GR
1083 err = i2c_smbus_write_byte_data(client, regp->low,
1084 data->temp11[index] & 0xff);
06e1c0a2 1085
7a1d220c 1086 lm90_select_remote_channel(data, 0);
eb1c8f43 1087 return err;
1da177e4 1088}
30d7394b 1089
eb1c8f43 1090static int lm90_get_temp8(struct lm90_data *data, int index)
30d7394b 1091{
eb1c8f43 1092 s8 temp8 = data->temp8[index];
23b2d477
NC
1093 int temp;
1094
8b162502 1095 if (data->flags & LM90_HAVE_EXTENDED_TEMP)
eb1c8f43 1096 temp = temp_from_u8_adt7461(data, temp8);
ec38fa2b 1097 else if (data->kind == max6646)
eb1c8f43 1098 temp = temp_from_u8(temp8);
23b2d477 1099 else
eb1c8f43 1100 temp = temp_from_s8(temp8);
23b2d477 1101
97ae60bb 1102 /* +16 degrees offset for temp2 for the LM99 */
eb1c8f43 1103 if (data->kind == lm99 && index == 3)
97ae60bb
JD
1104 temp += 16000;
1105
eb1c8f43 1106 return temp;
1da177e4 1107}
1da177e4 1108
eb1c8f43 1109static int lm90_set_temp8(struct lm90_data *data, int index, long val)
1da177e4 1110{
eb1c8f43
GR
1111 static const u8 reg[TEMP8_REG_NUM] = {
1112 LM90_REG_W_LOCAL_LOW,
1113 LM90_REG_W_LOCAL_HIGH,
1114 LM90_REG_W_LOCAL_CRIT,
1115 LM90_REG_W_REMOTE_CRIT,
1116 MAX6659_REG_W_LOCAL_EMERG,
1117 MAX6659_REG_W_REMOTE_EMERG,
1118 LM90_REG_W_REMOTE_CRIT,
1119 MAX6659_REG_W_REMOTE_EMERG,
1120 };
1de8b250 1121 struct i2c_client *client = data->client;
11e57812 1122 int err;
1da177e4 1123
eb1c8f43 1124 /* +16 degrees offset for temp2 for the LM99 */
b50aa496
DO
1125 if (data->kind == lm99 && index == 3) {
1126 /* prevent integer underflow */
1127 val = max(val, -128000l);
eb1c8f43 1128 val -= 16000;
b50aa496 1129 }
11e57812 1130
8b162502 1131 if (data->flags & LM90_HAVE_EXTENDED_TEMP)
eb1c8f43 1132 data->temp8[index] = temp_to_u8_adt7461(data, val);
ec38fa2b 1133 else if (data->kind == max6646)
eb1c8f43 1134 data->temp8[index] = temp_to_u8(val);
ec38fa2b 1135 else
eb1c8f43 1136 data->temp8[index] = temp_to_s8(val);
ec38fa2b 1137
7a1d220c 1138 lm90_select_remote_channel(data, index >= 6);
eb1c8f43 1139 err = i2c_smbus_write_byte_data(client, reg[index], data->temp8[index]);
7a1d220c 1140 lm90_select_remote_channel(data, 0);
37ad04d7 1141
eb1c8f43 1142 return err;
1da177e4
LT
1143}
1144
eb1c8f43 1145static int lm90_get_temphyst(struct lm90_data *data, int index)
2d45771e 1146{
eb1c8f43 1147 int temp;
37ad04d7 1148
8b162502 1149 if (data->flags & LM90_HAVE_EXTENDED_TEMP)
eb1c8f43
GR
1150 temp = temp_from_u8_adt7461(data, data->temp8[index]);
1151 else if (data->kind == max6646)
1152 temp = temp_from_u8(data->temp8[index]);
1153 else
1154 temp = temp_from_s8(data->temp8[index]);
2d45771e 1155
eb1c8f43
GR
1156 /* +16 degrees offset for temp2 for the LM99 */
1157 if (data->kind == lm99 && index == 3)
1158 temp += 16000;
0c01b644 1159
eb1c8f43 1160 return temp - temp_from_s8(data->temp_hyst);
0c01b644
GR
1161}
1162
eb1c8f43 1163static int lm90_set_temphyst(struct lm90_data *data, long val)
0c01b644 1164{
1de8b250 1165 struct i2c_client *client = data->client;
eb1c8f43 1166 int temp;
0c01b644
GR
1167 int err;
1168
8b162502 1169 if (data->flags & LM90_HAVE_EXTENDED_TEMP)
eb1c8f43
GR
1170 temp = temp_from_u8_adt7461(data, data->temp8[LOCAL_CRIT]);
1171 else if (data->kind == max6646)
1172 temp = temp_from_u8(data->temp8[LOCAL_CRIT]);
1173 else
1174 temp = temp_from_s8(data->temp8[LOCAL_CRIT]);
0c01b644 1175
5c9dca38
GR
1176 /* prevent integer overflow/underflow */
1177 val = clamp_val(val, -128000l, 255000l);
b50aa496 1178
eb1c8f43
GR
1179 data->temp_hyst = hyst_to_reg(temp - val);
1180 err = i2c_smbus_write_byte_data(client, LM90_REG_W_TCRIT_HYST,
1181 data->temp_hyst);
1182 return err;
0c01b644
GR
1183}
1184
eb1c8f43
GR
1185static const u8 lm90_temp_index[3] = {
1186 LOCAL_TEMP, REMOTE_TEMP, REMOTE2_TEMP
0e39e01c
JD
1187};
1188
eb1c8f43
GR
1189static const u8 lm90_temp_min_index[3] = {
1190 LOCAL_LOW, REMOTE_LOW, REMOTE2_LOW
0e39e01c
JD
1191};
1192
eb1c8f43
GR
1193static const u8 lm90_temp_max_index[3] = {
1194 LOCAL_HIGH, REMOTE_HIGH, REMOTE2_HIGH
742192f5
GR
1195};
1196
eb1c8f43
GR
1197static const u8 lm90_temp_crit_index[3] = {
1198 LOCAL_CRIT, REMOTE_CRIT, REMOTE2_CRIT
742192f5
GR
1199};
1200
eb1c8f43
GR
1201static const u8 lm90_temp_emerg_index[3] = {
1202 LOCAL_EMERG, REMOTE_EMERG, REMOTE2_EMERG
6948708d
GR
1203};
1204
eb1c8f43 1205static const u8 lm90_min_alarm_bits[3] = { 5, 3, 11 };
e9572fdd 1206static const u8 lm90_max_alarm_bits[3] = { 6, 4, 12 };
eb1c8f43 1207static const u8 lm90_crit_alarm_bits[3] = { 0, 1, 9 };
3396ff80 1208static const u8 lm90_crit_alarm_bits_swapped[3] = { 1, 0, 9 };
eb1c8f43
GR
1209static const u8 lm90_emergency_alarm_bits[3] = { 15, 13, 14 };
1210static const u8 lm90_fault_bits[3] = { 0, 2, 10 };
6948708d 1211
eb1c8f43
GR
1212static int lm90_temp_read(struct device *dev, u32 attr, int channel, long *val)
1213{
1214 struct lm90_data *data = dev_get_drvdata(dev);
1215 int err;
06e1c0a2 1216
eb1c8f43
GR
1217 mutex_lock(&data->update_lock);
1218 err = lm90_update_device(dev);
1219 mutex_unlock(&data->update_lock);
1220 if (err)
1221 return err;
06e1c0a2 1222
eb1c8f43
GR
1223 switch (attr) {
1224 case hwmon_temp_input:
1225 *val = lm90_get_temp11(data, lm90_temp_index[channel]);
1226 break;
1227 case hwmon_temp_min_alarm:
1228 *val = (data->alarms >> lm90_min_alarm_bits[channel]) & 1;
1229 break;
1230 case hwmon_temp_max_alarm:
1231 *val = (data->alarms >> lm90_max_alarm_bits[channel]) & 1;
1232 break;
1233 case hwmon_temp_crit_alarm:
3396ff80
GR
1234 if (data->flags & LM90_HAVE_CRIT_ALRM_SWP)
1235 *val = (data->alarms >> lm90_crit_alarm_bits_swapped[channel]) & 1;
1236 else
1237 *val = (data->alarms >> lm90_crit_alarm_bits[channel]) & 1;
eb1c8f43
GR
1238 break;
1239 case hwmon_temp_emergency_alarm:
1240 *val = (data->alarms >> lm90_emergency_alarm_bits[channel]) & 1;
1241 break;
1242 case hwmon_temp_fault:
1243 *val = (data->alarms >> lm90_fault_bits[channel]) & 1;
1244 break;
1245 case hwmon_temp_min:
1246 if (channel == 0)
1247 *val = lm90_get_temp8(data,
1248 lm90_temp_min_index[channel]);
1249 else
1250 *val = lm90_get_temp11(data,
1251 lm90_temp_min_index[channel]);
1252 break;
1253 case hwmon_temp_max:
1254 if (channel == 0)
1255 *val = lm90_get_temp8(data,
1256 lm90_temp_max_index[channel]);
1257 else
1258 *val = lm90_get_temp11(data,
1259 lm90_temp_max_index[channel]);
1260 break;
1261 case hwmon_temp_crit:
1262 *val = lm90_get_temp8(data, lm90_temp_crit_index[channel]);
1263 break;
1264 case hwmon_temp_crit_hyst:
1265 *val = lm90_get_temphyst(data, lm90_temp_crit_index[channel]);
1266 break;
1267 case hwmon_temp_emergency:
1268 *val = lm90_get_temp8(data, lm90_temp_emerg_index[channel]);
1269 break;
1270 case hwmon_temp_emergency_hyst:
1271 *val = lm90_get_temphyst(data, lm90_temp_emerg_index[channel]);
1272 break;
1273 case hwmon_temp_offset:
1274 *val = lm90_get_temp11(data, REMOTE_OFFSET);
1275 break;
1276 default:
1277 return -EOPNOTSUPP;
1278 }
1279 return 0;
1280}
06e1c0a2 1281
eb1c8f43
GR
1282static int lm90_temp_write(struct device *dev, u32 attr, int channel, long val)
1283{
1284 struct lm90_data *data = dev_get_drvdata(dev);
1285 int err;
06e1c0a2 1286
eb1c8f43 1287 mutex_lock(&data->update_lock);
06e1c0a2 1288
eb1c8f43
GR
1289 err = lm90_update_device(dev);
1290 if (err)
1291 goto error;
1292
1293 switch (attr) {
1294 case hwmon_temp_min:
1295 if (channel == 0)
1296 err = lm90_set_temp8(data,
1297 lm90_temp_min_index[channel],
1298 val);
1299 else
1300 err = lm90_set_temp11(data,
1301 lm90_temp_min_index[channel],
1302 val);
1303 break;
1304 case hwmon_temp_max:
1305 if (channel == 0)
1306 err = lm90_set_temp8(data,
1307 lm90_temp_max_index[channel],
1308 val);
1309 else
1310 err = lm90_set_temp11(data,
1311 lm90_temp_max_index[channel],
1312 val);
1313 break;
1314 case hwmon_temp_crit:
1315 err = lm90_set_temp8(data, lm90_temp_crit_index[channel], val);
1316 break;
1317 case hwmon_temp_crit_hyst:
1318 err = lm90_set_temphyst(data, val);
1319 break;
1320 case hwmon_temp_emergency:
1321 err = lm90_set_temp8(data, lm90_temp_emerg_index[channel], val);
1322 break;
1323 case hwmon_temp_offset:
1324 err = lm90_set_temp11(data, REMOTE_OFFSET, val);
1325 break;
1326 default:
1327 err = -EOPNOTSUPP;
1328 break;
1329 }
1330error:
1331 mutex_unlock(&data->update_lock);
1332
1333 return err;
1334}
1335
1336static umode_t lm90_temp_is_visible(const void *data, u32 attr, int channel)
c3df5806 1337{
eb1c8f43
GR
1338 switch (attr) {
1339 case hwmon_temp_input:
1340 case hwmon_temp_min_alarm:
1341 case hwmon_temp_max_alarm:
1342 case hwmon_temp_crit_alarm:
1343 case hwmon_temp_emergency_alarm:
1344 case hwmon_temp_emergency_hyst:
1345 case hwmon_temp_fault:
3334851d 1346 return 0444;
eb1c8f43
GR
1347 case hwmon_temp_min:
1348 case hwmon_temp_max:
1349 case hwmon_temp_crit:
1350 case hwmon_temp_emergency:
1351 case hwmon_temp_offset:
3334851d 1352 return 0644;
eb1c8f43
GR
1353 case hwmon_temp_crit_hyst:
1354 if (channel == 0)
3334851d
GR
1355 return 0644;
1356 return 0444;
eb1c8f43
GR
1357 default:
1358 return 0;
1359 }
c3df5806
JD
1360}
1361
eb1c8f43 1362static int lm90_chip_read(struct device *dev, u32 attr, int channel, long *val)
c3df5806 1363{
eb1c8f43 1364 struct lm90_data *data = dev_get_drvdata(dev);
11e57812
GR
1365 int err;
1366
eb1c8f43
GR
1367 mutex_lock(&data->update_lock);
1368 err = lm90_update_device(dev);
1369 mutex_unlock(&data->update_lock);
1370 if (err)
11e57812 1371 return err;
c3df5806 1372
eb1c8f43
GR
1373 switch (attr) {
1374 case hwmon_chip_update_interval:
1375 *val = data->update_interval;
c3df5806 1376 break;
eb1c8f43
GR
1377 case hwmon_chip_alarms:
1378 *val = data->alarms;
c3df5806
JD
1379 break;
1380 default:
eb1c8f43 1381 return -EOPNOTSUPP;
c3df5806
JD
1382 }
1383
eb1c8f43 1384 return 0;
c3df5806
JD
1385}
1386
eb1c8f43
GR
1387static int lm90_chip_write(struct device *dev, u32 attr, int channel, long val)
1388{
1389 struct lm90_data *data = dev_get_drvdata(dev);
1390 struct i2c_client *client = data->client;
1391 int err;
c3df5806 1392
eb1c8f43
GR
1393 mutex_lock(&data->update_lock);
1394
1395 err = lm90_update_device(dev);
1396 if (err)
1397 goto error;
1398
1399 switch (attr) {
1400 case hwmon_chip_update_interval:
1401 err = lm90_set_convrate(client, data,
1402 clamp_val(val, 0, 100000));
1403 break;
1404 default:
1405 err = -EOPNOTSUPP;
1406 break;
1407 }
1408error:
1409 mutex_unlock(&data->update_lock);
1410
1411 return err;
1412}
1413
1414static umode_t lm90_chip_is_visible(const void *data, u32 attr, int channel)
1415{
1416 switch (attr) {
1417 case hwmon_chip_update_interval:
3334851d 1418 return 0644;
eb1c8f43 1419 case hwmon_chip_alarms:
3334851d 1420 return 0444;
eb1c8f43
GR
1421 default:
1422 return 0;
1423 }
1424}
1425
1426static int lm90_read(struct device *dev, enum hwmon_sensor_types type,
1427 u32 attr, int channel, long *val)
1428{
1429 switch (type) {
1430 case hwmon_chip:
1431 return lm90_chip_read(dev, attr, channel, val);
1432 case hwmon_temp:
1433 return lm90_temp_read(dev, attr, channel, val);
1434 default:
1435 return -EOPNOTSUPP;
1436 }
1437}
1438
1439static int lm90_write(struct device *dev, enum hwmon_sensor_types type,
1440 u32 attr, int channel, long val)
1441{
1442 switch (type) {
1443 case hwmon_chip:
1444 return lm90_chip_write(dev, attr, channel, val);
1445 case hwmon_temp:
1446 return lm90_temp_write(dev, attr, channel, val);
1447 default:
1448 return -EOPNOTSUPP;
1449 }
1450}
1451
1452static umode_t lm90_is_visible(const void *data, enum hwmon_sensor_types type,
1453 u32 attr, int channel)
1454{
1455 switch (type) {
1456 case hwmon_chip:
1457 return lm90_chip_is_visible(data, attr, channel);
1458 case hwmon_temp:
1459 return lm90_temp_is_visible(data, attr, channel);
1460 default:
1461 return 0;
1462 }
1463}
1da177e4 1464
15b66ab6 1465/* Return 0 if detection is successful, -ENODEV otherwise */
b2589ab0 1466static int lm90_detect(struct i2c_client *client,
15b66ab6 1467 struct i2c_board_info *info)
8256fe0f 1468{
b2589ab0
JD
1469 struct i2c_adapter *adapter = client->adapter;
1470 int address = client->addr;
15b66ab6 1471 const char *name = NULL;
b2589ab0 1472 int man_id, chip_id, config1, config2, convrate;
8256fe0f 1473
15b66ab6
GR
1474 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1475 return -ENODEV;
1da177e4 1476
8f2fa77c 1477 /* detection and identification */
b2589ab0
JD
1478 man_id = i2c_smbus_read_byte_data(client, LM90_REG_R_MAN_ID);
1479 chip_id = i2c_smbus_read_byte_data(client, LM90_REG_R_CHIP_ID);
1480 config1 = i2c_smbus_read_byte_data(client, LM90_REG_R_CONFIG1);
1481 convrate = i2c_smbus_read_byte_data(client, LM90_REG_R_CONVRATE);
1482 if (man_id < 0 || chip_id < 0 || config1 < 0 || convrate < 0)
8f2fa77c
JD
1483 return -ENODEV;
1484
62ef510d 1485 if (man_id == 0x01 || man_id == 0x5C || man_id == 0xA1) {
b2589ab0
JD
1486 config2 = i2c_smbus_read_byte_data(client, LM90_REG_R_CONFIG2);
1487 if (config2 < 0)
9b0e8526 1488 return -ENODEV;
62ef510d 1489 }
8f2fa77c 1490
f90be42f
JD
1491 if ((address == 0x4C || address == 0x4D)
1492 && man_id == 0x01) { /* National Semiconductor */
b2589ab0
JD
1493 if ((config1 & 0x2A) == 0x00
1494 && (config2 & 0xF8) == 0x00
1495 && convrate <= 0x09) {
8f2fa77c
JD
1496 if (address == 0x4C
1497 && (chip_id & 0xF0) == 0x20) { /* LM90 */
1498 name = "lm90";
32c82a93 1499 } else
8f2fa77c
JD
1500 if ((chip_id & 0xF0) == 0x30) { /* LM89/LM99 */
1501 name = "lm99";
1502 dev_info(&adapter->dev,
1503 "Assuming LM99 chip at 0x%02x\n",
1504 address);
1505 dev_info(&adapter->dev,
1506 "If it is an LM89, instantiate it "
1507 "with the new_device sysfs "
1508 "interface\n");
271dabf5 1509 } else
8f2fa77c
JD
1510 if (address == 0x4C
1511 && (chip_id & 0xF0) == 0x10) { /* LM86 */
1512 name = "lm86";
1da177e4
LT
1513 }
1514 }
8f2fa77c
JD
1515 } else
1516 if ((address == 0x4C || address == 0x4D)
1517 && man_id == 0x41) { /* Analog Devices */
1518 if ((chip_id & 0xF0) == 0x40 /* ADM1032 */
b2589ab0
JD
1519 && (config1 & 0x3F) == 0x00
1520 && convrate <= 0x0A) {
8f2fa77c 1521 name = "adm1032";
f36ffeab
GR
1522 /*
1523 * The ADM1032 supports PEC, but only if combined
1524 * transactions are not used.
1525 */
8f2fa77c
JD
1526 if (i2c_check_functionality(adapter,
1527 I2C_FUNC_SMBUS_BYTE))
1528 info->flags |= I2C_CLIENT_PEC;
1529 } else
1530 if (chip_id == 0x51 /* ADT7461 */
b2589ab0
JD
1531 && (config1 & 0x1B) == 0x00
1532 && convrate <= 0x0A) {
8f2fa77c 1533 name = "adt7461";
5a4e5e6a
GR
1534 } else
1535 if (chip_id == 0x57 /* ADT7461A, NCT1008 */
b2589ab0
JD
1536 && (config1 & 0x1B) == 0x00
1537 && convrate <= 0x0A) {
5a4e5e6a 1538 name = "adt7461a";
8f2fa77c
JD
1539 }
1540 } else
1541 if (man_id == 0x4D) { /* Maxim */
b2589ab0 1542 int emerg, emerg2, status2;
06e1c0a2
GR
1543
1544 /*
1545 * We read MAX6659_REG_R_REMOTE_EMERG twice, and re-read
1546 * LM90_REG_R_MAN_ID in between. If MAX6659_REG_R_REMOTE_EMERG
1547 * exists, both readings will reflect the same value. Otherwise,
1548 * the readings will be different.
1549 */
b2589ab0
JD
1550 emerg = i2c_smbus_read_byte_data(client,
1551 MAX6659_REG_R_REMOTE_EMERG);
1552 man_id = i2c_smbus_read_byte_data(client,
8dc089d6 1553 LM90_REG_R_MAN_ID);
b2589ab0 1554 emerg2 = i2c_smbus_read_byte_data(client,
8dc089d6 1555 MAX6659_REG_R_REMOTE_EMERG);
b2589ab0
JD
1556 status2 = i2c_smbus_read_byte_data(client,
1557 MAX6696_REG_R_STATUS2);
1558 if (emerg < 0 || man_id < 0 || emerg2 < 0 || status2 < 0)
06e1c0a2
GR
1559 return -ENODEV;
1560
8f2fa77c
JD
1561 /*
1562 * The MAX6657, MAX6658 and MAX6659 do NOT have a chip_id
1563 * register. Reading from that address will return the last
1564 * read value, which in our case is those of the man_id
1565 * register. Likewise, the config1 register seems to lack a
1566 * low nibble, so the value will be those of the previous
1567 * read, so in our case those of the man_id register.
13c84951
GR
1568 * MAX6659 has a third set of upper temperature limit registers.
1569 * Those registers also return values on MAX6657 and MAX6658,
1570 * thus the only way to detect MAX6659 is by its address.
1571 * For this reason it will be mis-detected as MAX6657 if its
1572 * address is 0x4C.
8f2fa77c
JD
1573 */
1574 if (chip_id == man_id
13c84951 1575 && (address == 0x4C || address == 0x4D || address == 0x4E)
b2589ab0
JD
1576 && (config1 & 0x1F) == (man_id & 0x0F)
1577 && convrate <= 0x09) {
13c84951
GR
1578 if (address == 0x4C)
1579 name = "max6657";
1580 else
1581 name = "max6659";
8f2fa77c 1582 } else
06e1c0a2
GR
1583 /*
1584 * Even though MAX6695 and MAX6696 do not have a chip ID
1585 * register, reading it returns 0x01. Bit 4 of the config1
1586 * register is unused and should return zero when read. Bit 0 of
1587 * the status2 register is unused and should return zero when
1588 * read.
1589 *
1590 * MAX6695 and MAX6696 have an additional set of temperature
1591 * limit registers. We can detect those chips by checking if
1592 * one of those registers exists.
1593 */
1594 if (chip_id == 0x01
b2589ab0
JD
1595 && (config1 & 0x10) == 0x00
1596 && (status2 & 0x01) == 0x00
1597 && emerg == emerg2
1598 && convrate <= 0x07) {
06e1c0a2
GR
1599 name = "max6696";
1600 } else
8f2fa77c
JD
1601 /*
1602 * The chip_id register of the MAX6680 and MAX6681 holds the
1603 * revision of the chip. The lowest bit of the config1 register
1604 * is unused and should return zero when read, so should the
1605 * second to last bit of config1 (software reset).
1606 */
1607 if (chip_id == 0x01
b2589ab0
JD
1608 && (config1 & 0x03) == 0x00
1609 && convrate <= 0x07) {
8f2fa77c
JD
1610 name = "max6680";
1611 } else
1612 /*
1613 * The chip_id register of the MAX6646/6647/6649 holds the
1614 * revision of the chip. The lowest 6 bits of the config1
1615 * register are unused and should return zero when read.
1616 */
1617 if (chip_id == 0x59
b2589ab0
JD
1618 && (config1 & 0x3f) == 0x00
1619 && convrate <= 0x07) {
8f2fa77c 1620 name = "max6646";
229d495d
JL
1621 } else
1622 /*
1623 * The chip_id of the MAX6654 holds the revision of the chip.
1624 * The lowest 3 bits of the config1 register are unused and
1625 * should return zero when read.
1626 */
1627 if (chip_id == 0x08
1628 && (config1 & 0x07) == 0x00
1629 && convrate <= 0x07) {
1630 name = "max6654";
1da177e4 1631 }
6771ea1f
JD
1632 } else
1633 if (address == 0x4C
1634 && man_id == 0x5C) { /* Winbond/Nuvoton */
b2589ab0
JD
1635 if ((config1 & 0x2A) == 0x00
1636 && (config2 & 0xF8) == 0x00) {
c4f99a2b 1637 if (chip_id == 0x01 /* W83L771W/G */
b2589ab0 1638 && convrate <= 0x09) {
c4f99a2b
JD
1639 name = "w83l771";
1640 } else
1641 if ((chip_id & 0xFE) == 0x10 /* W83L771AWG/ASG */
b2589ab0 1642 && convrate <= 0x08) {
c4f99a2b
JD
1643 name = "w83l771";
1644 }
6771ea1f 1645 }
2ef01793 1646 } else
6d101c58
JD
1647 if (address >= 0x48 && address <= 0x4F
1648 && man_id == 0xA1) { /* NXP Semiconductor/Philips */
6d101c58 1649 if (chip_id == 0x00
b2589ab0
JD
1650 && (config1 & 0x2A) == 0x00
1651 && (config2 & 0xFE) == 0x00
1652 && convrate <= 0x09) {
2ef01793
SD
1653 name = "sa56004";
1654 }
ae544f64
GR
1655 } else
1656 if ((address == 0x4C || address == 0x4D)
1657 && man_id == 0x47) { /* GMT */
1658 if (chip_id == 0x01 /* G781 */
1659 && (config1 & 0x3F) == 0x00
1660 && convrate <= 0x08)
1661 name = "g781";
1daaceb2 1662 } else
366f0399
GR
1663 if (man_id == 0x55 && chip_id == 0x00 &&
1664 (config1 & 0x1B) == 0x00 && convrate <= 0x09) {
1665 int local_ext, conalert, chen, dfc;
1daaceb2
WN
1666
1667 local_ext = i2c_smbus_read_byte_data(client,
1668 TMP451_REG_R_LOCAL_TEMPL);
366f0399
GR
1669 conalert = i2c_smbus_read_byte_data(client,
1670 TMP451_REG_CONALERT);
1671 chen = i2c_smbus_read_byte_data(client, TMP461_REG_CHEN);
1672 dfc = i2c_smbus_read_byte_data(client, TMP461_REG_DFC);
1673
1674 if ((local_ext & 0x0F) == 0x00 &&
1675 (conalert & 0xf1) == 0x01 &&
1676 (chen & 0xfc) == 0x00 &&
1677 (dfc & 0xfc) == 0x00) {
1678 if (address == 0x4c && !(chen & 0x03))
1679 name = "tmp451";
1680 else if (address >= 0x48 && address <= 0x4f)
1681 name = "tmp461";
1682 }
1da177e4
LT
1683 }
1684
8f2fa77c
JD
1685 if (!name) { /* identification failed */
1686 dev_dbg(&adapter->dev,
1687 "Unsupported chip at 0x%02x (man_id=0x%02X, "
1688 "chip_id=0x%02X)\n", address, man_id, chip_id);
1689 return -ENODEV;
1da177e4 1690 }
8f2fa77c 1691
9b0e8526
JD
1692 strlcpy(info->type, name, I2C_NAME_SIZE);
1693
1694 return 0;
1695}
1696
1f17a444 1697static void lm90_restore_conf(void *_data)
f7001bb0 1698{
1f17a444
GR
1699 struct lm90_data *data = _data;
1700 struct i2c_client *client = data->client;
1701
f7001bb0 1702 /* Restore initial configuration */
7a1d220c 1703 lm90_write_convrate(data, data->convrate_orig);
f7001bb0
GR
1704 i2c_smbus_write_byte_data(client, LM90_REG_W_CONFIG1,
1705 data->config_orig);
1706}
1707
37ad04d7 1708static int lm90_init_client(struct i2c_client *client, struct lm90_data *data)
15b66ab6 1709{
37ad04d7 1710 int config, convrate;
15b66ab6 1711
37ad04d7
GR
1712 convrate = lm90_read_reg(client, LM90_REG_R_CONVRATE);
1713 if (convrate < 0)
1714 return convrate;
0c01b644
GR
1715 data->convrate_orig = convrate;
1716
15b66ab6
GR
1717 /*
1718 * Start the conversions.
1719 */
37ad04d7
GR
1720 config = lm90_read_reg(client, LM90_REG_R_CONFIG1);
1721 if (config < 0)
1722 return config;
15b66ab6 1723 data->config_orig = config;
b849e5d1 1724 data->config = config;
15b66ab6 1725
62456189
BY
1726 lm90_set_convrate(client, data, 500); /* 500ms; 2Hz conversion rate */
1727
15b66ab6 1728 /* Check Temperature Range Select */
8b162502 1729 if (data->flags & LM90_HAVE_EXTENDED_TEMP) {
15b66ab6
GR
1730 if (config & 0x04)
1731 data->flags |= LM90_FLAG_ADT7461_EXT;
1732 }
1733
1734 /*
1735 * Put MAX6680/MAX8881 into extended resolution (bit 0x10,
1736 * 0.125 degree resolution) and range (0x08, extend range
1737 * to -64 degree) mode for the remote temperature sensor.
1738 */
1739 if (data->kind == max6680)
1740 config |= 0x18;
1741
229d495d
JL
1742 /*
1743 * Put MAX6654 into extended range (0x20, extend minimum range from
1744 * 0 degrees to -64 degrees). Note that extended resolution is not
1745 * possible on the MAX6654 unless conversion rate is set to 1 Hz or
1746 * slower, which is intentionally not done by default.
1747 */
1748 if (data->kind == max6654)
1749 config |= 0x20;
1750
15b66ab6
GR
1751 /*
1752 * Select external channel 0 for max6695/96
1753 */
1754 if (data->kind == max6696)
1755 config &= ~0x08;
1756
2abdc357
DO
1757 /*
1758 * Interrupt is enabled by default on reset, but it may be disabled
1759 * by bootloader, unmask it.
1760 */
1761 if (client->irq)
1762 config &= ~0x80;
1763
15b66ab6 1764 config &= 0xBF; /* run */
7a1d220c 1765 lm90_update_confreg(data, config);
1f17a444 1766
c5fcf01b 1767 return devm_add_action_or_reset(&client->dev, lm90_restore_conf, data);
15b66ab6
GR
1768}
1769
072de496
WN
1770static bool lm90_is_tripped(struct i2c_client *client, u16 *status)
1771{
1772 struct lm90_data *data = i2c_get_clientdata(client);
37ad04d7 1773 int st, st2 = 0;
072de496 1774
37ad04d7
GR
1775 st = lm90_read_reg(client, LM90_REG_R_STATUS);
1776 if (st < 0)
1777 return false;
072de496 1778
37ad04d7
GR
1779 if (data->kind == max6696) {
1780 st2 = lm90_read_reg(client, MAX6696_REG_R_STATUS2);
1781 if (st2 < 0)
1782 return false;
1783 }
072de496
WN
1784
1785 *status = st | (st2 << 8);
1786
1787 if ((st & 0x7f) == 0 && (st2 & 0xfe) == 0)
1788 return false;
1789
1790 if ((st & (LM90_STATUS_LLOW | LM90_STATUS_LHIGH | LM90_STATUS_LTHRM)) ||
1791 (st2 & MAX6696_STATUS2_LOT2))
94dbd23e
DO
1792 dev_dbg(&client->dev,
1793 "temp%d out of range, please check!\n", 1);
072de496
WN
1794 if ((st & (LM90_STATUS_RLOW | LM90_STATUS_RHIGH | LM90_STATUS_RTHRM)) ||
1795 (st2 & MAX6696_STATUS2_ROT2))
94dbd23e
DO
1796 dev_dbg(&client->dev,
1797 "temp%d out of range, please check!\n", 2);
072de496 1798 if (st & LM90_STATUS_ROPEN)
94dbd23e
DO
1799 dev_dbg(&client->dev,
1800 "temp%d diode open, please check!\n", 2);
072de496
WN
1801 if (st2 & (MAX6696_STATUS2_R2LOW | MAX6696_STATUS2_R2HIGH |
1802 MAX6696_STATUS2_R2THRM | MAX6696_STATUS2_R2OT2))
94dbd23e
DO
1803 dev_dbg(&client->dev,
1804 "temp%d out of range, please check!\n", 3);
072de496 1805 if (st2 & MAX6696_STATUS2_R2OPEN)
94dbd23e
DO
1806 dev_dbg(&client->dev,
1807 "temp%d diode open, please check!\n", 3);
1808
1809 if (st & LM90_STATUS_LLOW)
1810 hwmon_notify_event(data->hwmon_dev, hwmon_temp,
65f82bec 1811 hwmon_temp_min_alarm, 0);
94dbd23e
DO
1812 if (st & LM90_STATUS_RLOW)
1813 hwmon_notify_event(data->hwmon_dev, hwmon_temp,
65f82bec 1814 hwmon_temp_min_alarm, 1);
94dbd23e
DO
1815 if (st2 & MAX6696_STATUS2_R2LOW)
1816 hwmon_notify_event(data->hwmon_dev, hwmon_temp,
65f82bec 1817 hwmon_temp_min_alarm, 2);
94dbd23e
DO
1818 if (st & LM90_STATUS_LHIGH)
1819 hwmon_notify_event(data->hwmon_dev, hwmon_temp,
65f82bec 1820 hwmon_temp_max_alarm, 0);
94dbd23e
DO
1821 if (st & LM90_STATUS_RHIGH)
1822 hwmon_notify_event(data->hwmon_dev, hwmon_temp,
65f82bec 1823 hwmon_temp_max_alarm, 1);
94dbd23e
DO
1824 if (st2 & MAX6696_STATUS2_R2HIGH)
1825 hwmon_notify_event(data->hwmon_dev, hwmon_temp,
65f82bec 1826 hwmon_temp_max_alarm, 2);
072de496
WN
1827
1828 return true;
1829}
1830
109b1283
WN
1831static irqreturn_t lm90_irq_thread(int irq, void *dev_id)
1832{
1833 struct i2c_client *client = dev_id;
1834 u16 status;
1835
1836 if (lm90_is_tripped(client, &status))
1837 return IRQ_HANDLED;
1838 else
1839 return IRQ_NONE;
1840}
1841
1f17a444
GR
1842static void lm90_remove_pec(void *dev)
1843{
1844 device_remove_file(dev, &dev_attr_pec);
1845}
1846
1847static void lm90_regulator_disable(void *regulator)
1848{
1849 regulator_disable(regulator);
1850}
1851
eb1c8f43
GR
1852
1853static const struct hwmon_ops lm90_ops = {
1854 .is_visible = lm90_is_visible,
1855 .read = lm90_read,
1856 .write = lm90_write,
1857};
1858
67487038 1859static int lm90_probe(struct i2c_client *client)
9b0e8526 1860{
b2589ab0 1861 struct device *dev = &client->dev;
e67776cc 1862 struct i2c_adapter *adapter = client->adapter;
eb1c8f43 1863 struct hwmon_channel_info *info;
3e0f964f 1864 struct regulator *regulator;
6e5f62b9 1865 struct device *hwmon_dev;
eb1c8f43 1866 struct lm90_data *data;
9b0e8526 1867 int err;
1da177e4 1868
3e0f964f
WN
1869 regulator = devm_regulator_get(dev, "vcc");
1870 if (IS_ERR(regulator))
1871 return PTR_ERR(regulator);
1872
1873 err = regulator_enable(regulator);
1874 if (err < 0) {
d89fa686 1875 dev_err(dev, "Failed to enable regulator: %d\n", err);
3e0f964f
WN
1876 return err;
1877 }
1878
c5fcf01b
GR
1879 err = devm_add_action_or_reset(dev, lm90_regulator_disable, regulator);
1880 if (err)
1881 return err;
1f17a444 1882
d89fa686 1883 data = devm_kzalloc(dev, sizeof(struct lm90_data), GFP_KERNEL);
20f426ff
GR
1884 if (!data)
1885 return -ENOMEM;
1886
1de8b250 1887 data->client = client;
b2589ab0 1888 i2c_set_clientdata(client, data);
9a61bf63 1889 mutex_init(&data->update_lock);
1da177e4 1890
9b0e8526 1891 /* Set the device type */
df8d57bf
JMC
1892 if (client->dev.of_node)
1893 data->kind = (enum chips)of_device_get_match_data(&client->dev);
1894 else
67487038 1895 data->kind = i2c_match_id(lm90_id, client)->driver_data;
9b0e8526
JD
1896 if (data->kind == adm1032) {
1897 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE))
b2589ab0 1898 client->flags &= ~I2C_CLIENT_PEC;
9b0e8526 1899 }
1da177e4 1900
f36ffeab
GR
1901 /*
1902 * Different devices have different alarm bits triggering the
1903 * ALERT# output
1904 */
4667bcb8 1905 data->alert_alarms = lm90_params[data->kind].alert_alarms;
53de3342 1906
88073bb1 1907 /* Set chip capabilities */
4667bcb8 1908 data->flags = lm90_params[data->kind].flags;
eb1c8f43
GR
1909
1910 data->chip.ops = &lm90_ops;
1911 data->chip.info = data->info;
1912
a4d41e67
GR
1913 data->info[0] = HWMON_CHANNEL_INFO(chip,
1914 HWMON_C_REGISTER_TZ | HWMON_C_UPDATE_INTERVAL | HWMON_C_ALARMS);
eb1c8f43
GR
1915 data->info[1] = &data->temp_info;
1916
1917 info = &data->temp_info;
1918 info->type = hwmon_temp;
1919 info->config = data->channel_config;
1920
1921 data->channel_config[0] = HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MAX |
f5302480 1922 HWMON_T_MIN_ALARM | HWMON_T_MAX_ALARM;
eb1c8f43 1923 data->channel_config[1] = HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MAX |
f5302480
GR
1924 HWMON_T_MIN_ALARM | HWMON_T_MAX_ALARM | HWMON_T_FAULT;
1925
1926 if (data->flags & LM90_HAVE_CRIT) {
1927 data->channel_config[0] |= HWMON_T_CRIT | HWMON_T_CRIT_ALARM | HWMON_T_CRIT_HYST;
1928 data->channel_config[1] |= HWMON_T_CRIT | HWMON_T_CRIT_ALARM | HWMON_T_CRIT_HYST;
1929 }
eb1c8f43
GR
1930
1931 if (data->flags & LM90_HAVE_OFFSET)
1932 data->channel_config[1] |= HWMON_T_OFFSET;
1933
1934 if (data->flags & LM90_HAVE_EMERGENCY) {
1935 data->channel_config[0] |= HWMON_T_EMERGENCY |
1936 HWMON_T_EMERGENCY_HYST;
1937 data->channel_config[1] |= HWMON_T_EMERGENCY |
1938 HWMON_T_EMERGENCY_HYST;
1939 }
1940
1941 if (data->flags & LM90_HAVE_EMERGENCY_ALARM) {
1942 data->channel_config[0] |= HWMON_T_EMERGENCY_ALARM;
1943 data->channel_config[1] |= HWMON_T_EMERGENCY_ALARM;
1944 }
1945
1946 if (data->flags & LM90_HAVE_TEMP3) {
1947 data->channel_config[2] = HWMON_T_INPUT |
1948 HWMON_T_MIN | HWMON_T_MAX |
1949 HWMON_T_CRIT | HWMON_T_CRIT_HYST |
1950 HWMON_T_EMERGENCY | HWMON_T_EMERGENCY_HYST |
1951 HWMON_T_MIN_ALARM | HWMON_T_MAX_ALARM |
1952 HWMON_T_CRIT_ALARM | HWMON_T_EMERGENCY_ALARM |
1953 HWMON_T_FAULT;
1954 }
1955
a095f687 1956 data->reg_local_ext = lm90_params[data->kind].reg_local_ext;
06e1c0a2 1957
0c01b644
GR
1958 /* Set maximum conversion rate */
1959 data->max_convrate = lm90_params[data->kind].max_convrate;
1960
1da177e4 1961 /* Initialize the LM90 chip */
37ad04d7
GR
1962 err = lm90_init_client(client, data);
1963 if (err < 0) {
1964 dev_err(dev, "Failed to initialize device\n");
1965 return err;
1966 }
1da177e4 1967
eb1c8f43
GR
1968 /*
1969 * The 'pec' attribute is attached to the i2c device and thus created
1970 * separately.
1971 */
b2589ab0
JD
1972 if (client->flags & I2C_CLIENT_PEC) {
1973 err = device_create_file(dev, &dev_attr_pec);
11e57812 1974 if (err)
1f17a444 1975 return err;
c5fcf01b
GR
1976 err = devm_add_action_or_reset(dev, lm90_remove_pec, dev);
1977 if (err)
1978 return err;
06e1c0a2 1979 }
0e39e01c 1980
eb1c8f43
GR
1981 hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
1982 data, &data->chip,
1983 NULL);
6e5f62b9
GR
1984 if (IS_ERR(hwmon_dev))
1985 return PTR_ERR(hwmon_dev);
943b0830 1986
94dbd23e
DO
1987 data->hwmon_dev = hwmon_dev;
1988
109b1283
WN
1989 if (client->irq) {
1990 dev_dbg(dev, "IRQ: %d\n", client->irq);
1991 err = devm_request_threaded_irq(dev, client->irq,
1992 NULL, lm90_irq_thread,
d97fb837 1993 IRQF_ONESHOT, "lm90", client);
109b1283
WN
1994 if (err < 0) {
1995 dev_err(dev, "cannot request IRQ %d\n", client->irq);
6e5f62b9 1996 return err;
109b1283
WN
1997 }
1998 }
1999
1da177e4
LT
2000 return 0;
2001}
2002
b4f21054
BT
2003static void lm90_alert(struct i2c_client *client, enum i2c_alert_protocol type,
2004 unsigned int flag)
53de3342 2005{
072de496 2006 u16 alarms;
06e1c0a2 2007
b4f21054
BT
2008 if (type != I2C_PROTOCOL_SMBUS_ALERT)
2009 return;
2010
072de496 2011 if (lm90_is_tripped(client, &alarms)) {
f36ffeab
GR
2012 /*
2013 * Disable ALERT# output, because these chips don't implement
2014 * SMBus alert correctly; they should only hold the alert line
2015 * low briefly.
2016 */
072de496
WN
2017 struct lm90_data *data = i2c_get_clientdata(client);
2018
37ad04d7
GR
2019 if ((data->flags & LM90_HAVE_BROKEN_ALERT) &&
2020 (alarms & data->alert_alarms)) {
53de3342 2021 dev_dbg(&client->dev, "Disabling ALERT#\n");
7a1d220c 2022 lm90_update_confreg(data, data->config | 0x80);
53de3342 2023 }
072de496 2024 } else {
94dbd23e 2025 dev_dbg(&client->dev, "Everything OK\n");
53de3342
JD
2026 }
2027}
2028
4c7f85a3
DO
2029static int __maybe_unused lm90_suspend(struct device *dev)
2030{
2031 struct lm90_data *data = dev_get_drvdata(dev);
2032 struct i2c_client *client = data->client;
2033
2034 if (client->irq)
2035 disable_irq(client->irq);
2036
2037 return 0;
2038}
2039
2040static int __maybe_unused lm90_resume(struct device *dev)
2041{
2042 struct lm90_data *data = dev_get_drvdata(dev);
2043 struct i2c_client *client = data->client;
2044
2045 if (client->irq)
2046 enable_irq(client->irq);
2047
2048 return 0;
2049}
2050
2051static SIMPLE_DEV_PM_OPS(lm90_pm_ops, lm90_suspend, lm90_resume);
2052
15b66ab6
GR
2053static struct i2c_driver lm90_driver = {
2054 .class = I2C_CLASS_HWMON,
2055 .driver = {
2056 .name = "lm90",
df8d57bf 2057 .of_match_table = of_match_ptr(lm90_of_match),
4c7f85a3 2058 .pm = &lm90_pm_ops,
15b66ab6 2059 },
67487038 2060 .probe_new = lm90_probe,
15b66ab6
GR
2061 .alert = lm90_alert,
2062 .id_table = lm90_id,
2063 .detect = lm90_detect,
2064 .address_list = normal_i2c,
2065};
1da177e4 2066
f0967eea 2067module_i2c_driver(lm90_driver);
1da177e4 2068
7c81c60f 2069MODULE_AUTHOR("Jean Delvare <jdelvare@suse.de>");
1da177e4
LT
2070MODULE_DESCRIPTION("LM90/ADM1032 driver");
2071MODULE_LICENSE("GPL");