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1da177e4
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1/*
2 * lm90.c - Part of lm_sensors, Linux kernel modules for hardware
3 * monitoring
7c81c60f 4 * Copyright (C) 2003-2010 Jean Delvare <jdelvare@suse.de>
1da177e4
LT
5 *
6 * Based on the lm83 driver. The LM90 is a sensor chip made by National
7 * Semiconductor. It reports up to two temperatures (its own plus up to
8 * one external one) with a 0.125 deg resolution (1 deg for local
a874a10c 9 * temperature) and a 3-4 deg accuracy.
1da177e4
LT
10 *
11 * This driver also supports the LM89 and LM99, two other sensor chips
12 * made by National Semiconductor. Both have an increased remote
13 * temperature measurement accuracy (1 degree), and the LM99
14 * additionally shifts remote temperatures (measured and limits) by 16
97ae60bb 15 * degrees, which allows for higher temperatures measurement.
44bbe87e 16 * Note that there is no way to differentiate between both chips.
97ae60bb 17 * When device is auto-detected, the driver will assume an LM99.
1da177e4
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18 *
19 * This driver also supports the LM86, another sensor chip made by
20 * National Semiconductor. It is exactly similar to the LM90 except it
21 * has a higher accuracy.
1da177e4
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22 *
23 * This driver also supports the ADM1032, a sensor chip made by Analog
24 * Devices. That chip is similar to the LM90, with a few differences
a874a10c
JD
25 * that are not handled by this driver. Among others, it has a higher
26 * accuracy than the LM90, much like the LM86 does.
1da177e4
LT
27 *
28 * This driver also supports the MAX6657, MAX6658 and MAX6659 sensor
a874a10c 29 * chips made by Maxim. These chips are similar to the LM86.
44bbe87e 30 * Note that there is no easy way to differentiate between the three
6948708d
GR
31 * variants. We use the device address to detect MAX6659, which will result
32 * in a detection as max6657 if it is on address 0x4c. The extra address
33 * and features of the MAX6659 are only supported if the chip is configured
34 * explicitly as max6659, or if its address is not 0x4c.
35 * These chips lack the remote temperature offset feature.
1da177e4 36 *
1a51e068
DW
37 * This driver also supports the MAX6646, MAX6647, MAX6648, MAX6649 and
38 * MAX6692 chips made by Maxim. These are again similar to the LM86,
39 * but they use unsigned temperature values and can report temperatures
40 * from 0 to 145 degrees.
271dabf5 41 *
32c82a93
RB
42 * This driver also supports the MAX6680 and MAX6681, two other sensor
43 * chips made by Maxim. These are quite similar to the other Maxim
a874a10c
JD
44 * chips. The MAX6680 and MAX6681 only differ in the pinout so they can
45 * be treated identically.
32c82a93 46 *
06e1c0a2
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47 * This driver also supports the MAX6695 and MAX6696, two other sensor
48 * chips made by Maxim. These are also quite similar to other Maxim
49 * chips, but support three temperature sensors instead of two. MAX6695
50 * and MAX6696 only differ in the pinout so they can be treated identically.
51 *
5a4e5e6a
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52 * This driver also supports ADT7461 and ADT7461A from Analog Devices as well as
53 * NCT1008 from ON Semiconductor. The chips are supported in both compatibility
54 * and extended mode. They are mostly compatible with LM90 except for a data
55 * format difference for the temperature value registers.
1da177e4 56 *
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57 * This driver also supports the SA56004 from Philips. This device is
58 * pin-compatible with the LM86, the ED/EDP parts are also address-compatible.
59 *
ae544f64
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60 * This driver also supports the G781 from GMT. This device is compatible
61 * with the ADM1032.
62 *
1daaceb2
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63 * This driver also supports TMP451 from Texas Instruments. This device is
64 * supported in both compatibility and extended mode. It's mostly compatible
65 * with ADT7461 except for local temperature low byte register and max
66 * conversion rate.
67 *
1da177e4
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68 * Since the LM90 was the first chipset supported by this driver, most
69 * comments will refer to this chipset, but are actually general and
70 * concern all supported chipsets, unless mentioned otherwise.
71 *
72 * This program is free software; you can redistribute it and/or modify
73 * it under the terms of the GNU General Public License as published by
74 * the Free Software Foundation; either version 2 of the License, or
75 * (at your option) any later version.
76 *
77 * This program is distributed in the hope that it will be useful,
78 * but WITHOUT ANY WARRANTY; without even the implied warranty of
79 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
80 * GNU General Public License for more details.
81 *
82 * You should have received a copy of the GNU General Public License
83 * along with this program; if not, write to the Free Software
84 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
85 */
86
1da177e4
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87#include <linux/module.h>
88#include <linux/init.h>
89#include <linux/slab.h>
90#include <linux/jiffies.h>
91#include <linux/i2c.h>
943b0830
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92#include <linux/hwmon.h>
93#include <linux/err.h>
9a61bf63 94#include <linux/mutex.h>
0e39e01c 95#include <linux/sysfs.h>
109b1283 96#include <linux/interrupt.h>
3e0f964f 97#include <linux/regulator/consumer.h>
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98
99/*
100 * Addresses to scan
101 * Address is fully defined internally and cannot be changed except for
32c82a93 102 * MAX6659, MAX6680 and MAX6681.
5a4e5e6a
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103 * LM86, LM89, LM90, LM99, ADM1032, ADM1032-1, ADT7461, ADT7461A, MAX6649,
104 * MAX6657, MAX6658, NCT1008 and W83L771 have address 0x4c.
105 * ADM1032-2, ADT7461-2, ADT7461A-2, LM89-1, LM99-1, MAX6646, and NCT1008D
106 * have address 0x4d.
271dabf5 107 * MAX6647 has address 0x4e.
13c84951 108 * MAX6659 can have address 0x4c, 0x4d or 0x4e.
32c82a93
RB
109 * MAX6680 and MAX6681 can have address 0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b,
110 * 0x4c, 0x4d or 0x4e.
2ef01793 111 * SA56004 can have address 0x48 through 0x4F.
1da177e4
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112 */
113
25e9c86d 114static const unsigned short normal_i2c[] = {
2ef01793
SD
115 0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b, 0x48, 0x49, 0x4a, 0x4b, 0x4c,
116 0x4d, 0x4e, 0x4f, I2C_CLIENT_END };
1da177e4 117
13c84951 118enum chips { lm90, adm1032, lm99, lm86, max6657, max6659, adt7461, max6680,
1daaceb2 119 max6646, w83l771, max6696, sa56004, g781, tmp451 };
1da177e4
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120
121/*
122 * The LM90 registers
123 */
124
125#define LM90_REG_R_MAN_ID 0xFE
126#define LM90_REG_R_CHIP_ID 0xFF
127#define LM90_REG_R_CONFIG1 0x03
128#define LM90_REG_W_CONFIG1 0x09
129#define LM90_REG_R_CONFIG2 0xBF
130#define LM90_REG_W_CONFIG2 0xBF
131#define LM90_REG_R_CONVRATE 0x04
132#define LM90_REG_W_CONVRATE 0x0A
133#define LM90_REG_R_STATUS 0x02
134#define LM90_REG_R_LOCAL_TEMP 0x00
135#define LM90_REG_R_LOCAL_HIGH 0x05
136#define LM90_REG_W_LOCAL_HIGH 0x0B
137#define LM90_REG_R_LOCAL_LOW 0x06
138#define LM90_REG_W_LOCAL_LOW 0x0C
139#define LM90_REG_R_LOCAL_CRIT 0x20
140#define LM90_REG_W_LOCAL_CRIT 0x20
141#define LM90_REG_R_REMOTE_TEMPH 0x01
142#define LM90_REG_R_REMOTE_TEMPL 0x10
143#define LM90_REG_R_REMOTE_OFFSH 0x11
144#define LM90_REG_W_REMOTE_OFFSH 0x11
145#define LM90_REG_R_REMOTE_OFFSL 0x12
146#define LM90_REG_W_REMOTE_OFFSL 0x12
147#define LM90_REG_R_REMOTE_HIGHH 0x07
148#define LM90_REG_W_REMOTE_HIGHH 0x0D
149#define LM90_REG_R_REMOTE_HIGHL 0x13
150#define LM90_REG_W_REMOTE_HIGHL 0x13
151#define LM90_REG_R_REMOTE_LOWH 0x08
152#define LM90_REG_W_REMOTE_LOWH 0x0E
153#define LM90_REG_R_REMOTE_LOWL 0x14
154#define LM90_REG_W_REMOTE_LOWL 0x14
155#define LM90_REG_R_REMOTE_CRIT 0x19
156#define LM90_REG_W_REMOTE_CRIT 0x19
157#define LM90_REG_R_TCRIT_HYST 0x21
158#define LM90_REG_W_TCRIT_HYST 0x21
159
06e1c0a2 160/* MAX6646/6647/6649/6657/6658/6659/6695/6696 registers */
f65e1708
JD
161
162#define MAX6657_REG_R_LOCAL_TEMPL 0x11
06e1c0a2 163#define MAX6696_REG_R_STATUS2 0x12
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164#define MAX6659_REG_R_REMOTE_EMERG 0x16
165#define MAX6659_REG_W_REMOTE_EMERG 0x16
166#define MAX6659_REG_R_LOCAL_EMERG 0x17
167#define MAX6659_REG_W_LOCAL_EMERG 0x17
f65e1708 168
2ef01793
SD
169/* SA56004 registers */
170
171#define SA56004_REG_R_LOCAL_TEMPL 0x22
172
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173#define LM90_MAX_CONVRATE_MS 16000 /* Maximum conversion rate in ms */
174
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175/* TMP451 registers */
176#define TMP451_REG_R_LOCAL_TEMPL 0x15
177
23b2d477
NC
178/*
179 * Device flags
180 */
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181#define LM90_FLAG_ADT7461_EXT (1 << 0) /* ADT7461 extended mode */
182/* Device features */
183#define LM90_HAVE_OFFSET (1 << 1) /* temperature offset register */
88073bb1 184#define LM90_HAVE_REM_LIMIT_EXT (1 << 3) /* extended remote limit */
6948708d 185#define LM90_HAVE_EMERGENCY (1 << 4) /* 3rd upper (emergency) limit */
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GR
186#define LM90_HAVE_EMERGENCY_ALARM (1 << 5)/* emergency alarm */
187#define LM90_HAVE_TEMP3 (1 << 6) /* 3rd temperature sensor */
1179324c 188#define LM90_HAVE_BROKEN_ALERT (1 << 7) /* Broken alert */
23b2d477 189
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190/* LM90 status */
191#define LM90_STATUS_LTHRM (1 << 0) /* local THERM limit tripped */
192#define LM90_STATUS_RTHRM (1 << 1) /* remote THERM limit tripped */
193#define LM90_STATUS_ROPEN (1 << 2) /* remote is an open circuit */
194#define LM90_STATUS_RLOW (1 << 3) /* remote low temp limit tripped */
195#define LM90_STATUS_RHIGH (1 << 4) /* remote high temp limit tripped */
196#define LM90_STATUS_LLOW (1 << 5) /* local low temp limit tripped */
197#define LM90_STATUS_LHIGH (1 << 6) /* local high temp limit tripped */
198
199#define MAX6696_STATUS2_R2THRM (1 << 1) /* remote2 THERM limit tripped */
200#define MAX6696_STATUS2_R2OPEN (1 << 2) /* remote2 is an open circuit */
201#define MAX6696_STATUS2_R2LOW (1 << 3) /* remote2 low temp limit tripped */
202#define MAX6696_STATUS2_R2HIGH (1 << 4) /* remote2 high temp limit tripped */
203#define MAX6696_STATUS2_ROT2 (1 << 5) /* remote emergency limit tripped */
204#define MAX6696_STATUS2_R2OT2 (1 << 6) /* remote2 emergency limit tripped */
205#define MAX6696_STATUS2_LOT2 (1 << 7) /* local emergency limit tripped */
206
1da177e4
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207/*
208 * Driver data (common to all clients)
209 */
210
9b0e8526
JD
211static const struct i2c_device_id lm90_id[] = {
212 { "adm1032", adm1032 },
213 { "adt7461", adt7461 },
5a4e5e6a 214 { "adt7461a", adt7461 },
ae544f64 215 { "g781", g781 },
9b0e8526
JD
216 { "lm90", lm90 },
217 { "lm86", lm86 },
97ae60bb
JD
218 { "lm89", lm86 },
219 { "lm99", lm99 },
271dabf5
BH
220 { "max6646", max6646 },
221 { "max6647", max6646 },
222 { "max6649", max6646 },
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JD
223 { "max6657", max6657 },
224 { "max6658", max6657 },
13c84951 225 { "max6659", max6659 },
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226 { "max6680", max6680 },
227 { "max6681", max6680 },
06e1c0a2
GR
228 { "max6695", max6696 },
229 { "max6696", max6696 },
5a4e5e6a 230 { "nct1008", adt7461 },
6771ea1f 231 { "w83l771", w83l771 },
2ef01793 232 { "sa56004", sa56004 },
1daaceb2 233 { "tmp451", tmp451 },
9b0e8526
JD
234 { }
235};
236MODULE_DEVICE_TABLE(i2c, lm90_id);
237
4667bcb8
GR
238/*
239 * chip type specific parameters
240 */
241struct lm90_params {
242 u32 flags; /* Capabilities */
243 u16 alert_alarms; /* Which alarm bits trigger ALERT# */
244 /* Upper 8 bits for max6695/96 */
0c01b644 245 u8 max_convrate; /* Maximum conversion rate register value */
a095f687 246 u8 reg_local_ext; /* Extended local temp register (optional) */
4667bcb8
GR
247};
248
249static const struct lm90_params lm90_params[] = {
250 [adm1032] = {
1179324c
GR
251 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
252 | LM90_HAVE_BROKEN_ALERT,
4667bcb8 253 .alert_alarms = 0x7c,
0c01b644 254 .max_convrate = 10,
4667bcb8
GR
255 },
256 [adt7461] = {
1179324c
GR
257 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
258 | LM90_HAVE_BROKEN_ALERT,
4667bcb8 259 .alert_alarms = 0x7c,
0c01b644 260 .max_convrate = 10,
4667bcb8 261 },
ae544f64
GR
262 [g781] = {
263 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
264 | LM90_HAVE_BROKEN_ALERT,
265 .alert_alarms = 0x7c,
266 .max_convrate = 8,
267 },
4667bcb8
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268 [lm86] = {
269 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT,
270 .alert_alarms = 0x7b,
0c01b644 271 .max_convrate = 9,
4667bcb8
GR
272 },
273 [lm90] = {
274 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT,
275 .alert_alarms = 0x7b,
0c01b644 276 .max_convrate = 9,
4667bcb8
GR
277 },
278 [lm99] = {
279 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT,
280 .alert_alarms = 0x7b,
0c01b644 281 .max_convrate = 9,
4667bcb8
GR
282 },
283 [max6646] = {
4667bcb8 284 .alert_alarms = 0x7c,
0c01b644 285 .max_convrate = 6,
2ef01793 286 .reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL,
4667bcb8
GR
287 },
288 [max6657] = {
4667bcb8 289 .alert_alarms = 0x7c,
0c01b644 290 .max_convrate = 8,
2ef01793 291 .reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL,
4667bcb8
GR
292 },
293 [max6659] = {
a095f687 294 .flags = LM90_HAVE_EMERGENCY,
4667bcb8 295 .alert_alarms = 0x7c,
0c01b644 296 .max_convrate = 8,
2ef01793 297 .reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL,
4667bcb8
GR
298 },
299 [max6680] = {
300 .flags = LM90_HAVE_OFFSET,
301 .alert_alarms = 0x7c,
0c01b644 302 .max_convrate = 7,
4667bcb8
GR
303 },
304 [max6696] = {
a095f687 305 .flags = LM90_HAVE_EMERGENCY
4667bcb8 306 | LM90_HAVE_EMERGENCY_ALARM | LM90_HAVE_TEMP3,
e41fae2b 307 .alert_alarms = 0x1c7c,
0c01b644 308 .max_convrate = 6,
2ef01793 309 .reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL,
4667bcb8
GR
310 },
311 [w83l771] = {
312 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT,
313 .alert_alarms = 0x7c,
0c01b644 314 .max_convrate = 8,
4667bcb8 315 },
2ef01793 316 [sa56004] = {
a095f687 317 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT,
2ef01793
SD
318 .alert_alarms = 0x7b,
319 .max_convrate = 9,
320 .reg_local_ext = SA56004_REG_R_LOCAL_TEMPL,
321 },
1daaceb2
WN
322 [tmp451] = {
323 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
324 | LM90_HAVE_BROKEN_ALERT,
325 .alert_alarms = 0x7c,
326 .max_convrate = 9,
327 .reg_local_ext = TMP451_REG_R_LOCAL_TEMPL,
eb1c8f43 328 },
4667bcb8
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329};
330
40465d94
WN
331/*
332 * TEMP8 register index
333 */
334enum lm90_temp8_reg_index {
335 LOCAL_LOW = 0,
336 LOCAL_HIGH,
337 LOCAL_CRIT,
338 REMOTE_CRIT,
339 LOCAL_EMERG, /* max6659 and max6695/96 */
340 REMOTE_EMERG, /* max6659 and max6695/96 */
341 REMOTE2_CRIT, /* max6695/96 only */
342 REMOTE2_EMERG, /* max6695/96 only */
343 TEMP8_REG_NUM
344};
345
346/*
347 * TEMP11 register index
348 */
349enum lm90_temp11_reg_index {
350 REMOTE_TEMP = 0,
351 REMOTE_LOW,
352 REMOTE_HIGH,
353 REMOTE_OFFSET, /* except max6646, max6657/58/59, and max6695/96 */
354 LOCAL_TEMP,
355 REMOTE2_TEMP, /* max6695/96 only */
356 REMOTE2_LOW, /* max6695/96 only */
357 REMOTE2_HIGH, /* max6695/96 only */
358 TEMP11_REG_NUM
359};
360
1da177e4
LT
361/*
362 * Client data (each client gets its own)
363 */
364
365struct lm90_data {
1de8b250 366 struct i2c_client *client;
eb1c8f43
GR
367 u32 channel_config[4];
368 struct hwmon_channel_info temp_info;
369 const struct hwmon_channel_info *info[3];
370 struct hwmon_chip_info chip;
9a61bf63 371 struct mutex update_lock;
2f83ab77 372 bool valid; /* true if register values are valid */
1da177e4
LT
373 unsigned long last_updated; /* in jiffies */
374 int kind;
4667bcb8 375 u32 flags;
1da177e4 376
38bab98a 377 unsigned int update_interval; /* in milliseconds */
0c01b644 378
95238364 379 u8 config_orig; /* Original configuration register value */
0c01b644 380 u8 convrate_orig; /* Original conversion rate register value */
06e1c0a2
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381 u16 alert_alarms; /* Which alarm bits trigger ALERT# */
382 /* Upper 8 bits for max6695/96 */
0c01b644 383 u8 max_convrate; /* Maximum conversion rate */
2ef01793 384 u8 reg_local_ext; /* local extension register offset */
95238364 385
1da177e4 386 /* registers values */
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387 s8 temp8[TEMP8_REG_NUM];
388 s16 temp11[TEMP11_REG_NUM];
1da177e4 389 u8 temp_hyst;
06e1c0a2 390 u16 alarms; /* bitvector (upper 8 bits for max6695/96) */
1da177e4
LT
391};
392
15b66ab6
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393/*
394 * Support functions
395 */
396
397/*
398 * The ADM1032 supports PEC but not on write byte transactions, so we need
399 * to explicitly ask for a transaction without PEC.
400 */
401static inline s32 adm1032_write_byte(struct i2c_client *client, u8 value)
402{
403 return i2c_smbus_xfer(client->adapter, client->addr,
404 client->flags & ~I2C_CLIENT_PEC,
405 I2C_SMBUS_WRITE, value, I2C_SMBUS_BYTE, NULL);
406}
407
408/*
409 * It is assumed that client->update_lock is held (unless we are in
410 * detection or initialization steps). This matters when PEC is enabled,
411 * because we don't want the address pointer to change between the write
412 * byte and the read byte transactions.
413 */
37ad04d7 414static int lm90_read_reg(struct i2c_client *client, u8 reg)
15b66ab6
GR
415{
416 int err;
417
418 if (client->flags & I2C_CLIENT_PEC) {
419 err = adm1032_write_byte(client, reg);
420 if (err >= 0)
421 err = i2c_smbus_read_byte(client);
422 } else
423 err = i2c_smbus_read_byte_data(client, reg);
424
37ad04d7 425 return err;
15b66ab6
GR
426}
427
37ad04d7 428static int lm90_read16(struct i2c_client *client, u8 regh, u8 regl)
15b66ab6 429{
37ad04d7 430 int oldh, newh, l;
15b66ab6
GR
431
432 /*
433 * There is a trick here. We have to read two registers to have the
434 * sensor temperature, but we have to beware a conversion could occur
25985edc 435 * between the readings. The datasheet says we should either use
15b66ab6
GR
436 * the one-shot conversion register, which we don't want to do
437 * (disables hardware monitoring) or monitor the busy bit, which is
438 * impossible (we can't read the values and monitor that bit at the
439 * exact same time). So the solution used here is to read the high
440 * byte once, then the low byte, then the high byte again. If the new
441 * high byte matches the old one, then we have a valid reading. Else
442 * we have to read the low byte again, and now we believe we have a
443 * correct reading.
444 */
37ad04d7
GR
445 oldh = lm90_read_reg(client, regh);
446 if (oldh < 0)
447 return oldh;
448 l = lm90_read_reg(client, regl);
449 if (l < 0)
450 return l;
451 newh = lm90_read_reg(client, regh);
452 if (newh < 0)
453 return newh;
15b66ab6 454 if (oldh != newh) {
37ad04d7
GR
455 l = lm90_read_reg(client, regl);
456 if (l < 0)
457 return l;
15b66ab6 458 }
37ad04d7 459 return (newh << 8) | l;
15b66ab6
GR
460}
461
462/*
463 * client->update_lock must be held when calling this function (unless we are
464 * in detection or initialization steps), and while a remote channel other
465 * than channel 0 is selected. Also, calling code must make sure to re-select
466 * external channel 0 before releasing the lock. This is necessary because
467 * various registers have different meanings as a result of selecting a
468 * non-default remote channel.
469 */
37ad04d7
GR
470static inline int lm90_select_remote_channel(struct i2c_client *client,
471 struct lm90_data *data,
472 int channel)
15b66ab6 473{
37ad04d7 474 int config;
15b66ab6
GR
475
476 if (data->kind == max6696) {
37ad04d7
GR
477 config = lm90_read_reg(client, LM90_REG_R_CONFIG1);
478 if (config < 0)
479 return config;
15b66ab6
GR
480 config &= ~0x08;
481 if (channel)
482 config |= 0x08;
483 i2c_smbus_write_byte_data(client, LM90_REG_W_CONFIG1,
484 config);
485 }
37ad04d7 486 return 0;
15b66ab6
GR
487}
488
0c01b644
GR
489/*
490 * Set conversion rate.
491 * client->update_lock must be held when calling this function (unless we are
492 * in detection or initialization steps).
493 */
eb1c8f43
GR
494static int lm90_set_convrate(struct i2c_client *client, struct lm90_data *data,
495 unsigned int interval)
0c01b644 496{
0c01b644 497 unsigned int update_interval;
eb1c8f43 498 int i, err;
0c01b644
GR
499
500 /* Shift calculations to avoid rounding errors */
501 interval <<= 6;
502
503 /* find the nearest update rate */
504 for (i = 0, update_interval = LM90_MAX_CONVRATE_MS << 6;
505 i < data->max_convrate; i++, update_interval >>= 1)
506 if (interval >= update_interval * 3 / 4)
507 break;
508
eb1c8f43 509 err = i2c_smbus_write_byte_data(client, LM90_REG_W_CONVRATE, i);
0c01b644 510 data->update_interval = DIV_ROUND_CLOSEST(update_interval, 64);
eb1c8f43 511 return err;
0c01b644
GR
512}
513
10bfef47
GR
514static int lm90_update_limits(struct device *dev)
515{
516 struct lm90_data *data = dev_get_drvdata(dev);
517 struct i2c_client *client = data->client;
518 int val;
519
520 val = lm90_read_reg(client, LM90_REG_R_LOCAL_CRIT);
521 if (val < 0)
522 return val;
523 data->temp8[LOCAL_CRIT] = val;
524
525 val = lm90_read_reg(client, LM90_REG_R_REMOTE_CRIT);
526 if (val < 0)
527 return val;
528 data->temp8[REMOTE_CRIT] = val;
529
530 val = lm90_read_reg(client, LM90_REG_R_TCRIT_HYST);
531 if (val < 0)
532 return val;
533 data->temp_hyst = val;
534
be9d6374 535 val = lm90_read_reg(client, LM90_REG_R_REMOTE_LOWH);
10bfef47
GR
536 if (val < 0)
537 return val;
538 data->temp11[REMOTE_LOW] = val << 8;
539
540 if (data->flags & LM90_HAVE_REM_LIMIT_EXT) {
541 val = lm90_read_reg(client, LM90_REG_R_REMOTE_LOWL);
542 if (val < 0)
543 return val;
544 data->temp11[REMOTE_LOW] |= val;
545 }
546
547 val = lm90_read_reg(client, LM90_REG_R_REMOTE_HIGHH);
548 if (val < 0)
549 return val;
550 data->temp11[REMOTE_HIGH] = val << 8;
551
552 if (data->flags & LM90_HAVE_REM_LIMIT_EXT) {
553 val = lm90_read_reg(client, LM90_REG_R_REMOTE_HIGHL);
554 if (val < 0)
555 return val;
556 data->temp11[REMOTE_HIGH] |= val;
557 }
558
559 if (data->flags & LM90_HAVE_OFFSET) {
560 val = lm90_read16(client, LM90_REG_R_REMOTE_OFFSH,
561 LM90_REG_R_REMOTE_OFFSL);
562 if (val < 0)
563 return val;
564 data->temp11[REMOTE_OFFSET] = val;
565 }
566
567 if (data->flags & LM90_HAVE_EMERGENCY) {
568 val = lm90_read_reg(client, MAX6659_REG_R_LOCAL_EMERG);
569 if (val < 0)
570 return val;
571 data->temp8[LOCAL_EMERG] = val;
572
573 val = lm90_read_reg(client, MAX6659_REG_R_REMOTE_EMERG);
574 if (val < 0)
575 return val;
576 data->temp8[REMOTE_EMERG] = val;
577 }
578
579 if (data->kind == max6696) {
580 val = lm90_select_remote_channel(client, data, 1);
581 if (val < 0)
582 return val;
583
584 val = lm90_read_reg(client, LM90_REG_R_REMOTE_CRIT);
585 if (val < 0)
586 return val;
587 data->temp8[REMOTE2_CRIT] = val;
588
589 val = lm90_read_reg(client, MAX6659_REG_R_REMOTE_EMERG);
590 if (val < 0)
591 return val;
592 data->temp8[REMOTE2_EMERG] = val;
593
594 val = lm90_read_reg(client, LM90_REG_R_REMOTE_LOWH);
595 if (val < 0)
596 return val;
597 data->temp11[REMOTE2_LOW] = val << 8;
598
599 val = lm90_read_reg(client, LM90_REG_R_REMOTE_HIGHH);
600 if (val < 0)
601 return val;
602 data->temp11[REMOTE2_HIGH] = val << 8;
603
604 lm90_select_remote_channel(client, data, 0);
605 }
606
607 return 0;
608}
609
eb1c8f43 610static int lm90_update_device(struct device *dev)
15b66ab6 611{
1de8b250
GR
612 struct lm90_data *data = dev_get_drvdata(dev);
613 struct i2c_client *client = data->client;
0c01b644 614 unsigned long next_update;
eb1c8f43 615 int val;
15b66ab6 616
10bfef47
GR
617 if (!data->valid) {
618 val = lm90_update_limits(dev);
619 if (val < 0)
eb1c8f43 620 return val;
10bfef47
GR
621 }
622
78c2c2fe
JD
623 next_update = data->last_updated +
624 msecs_to_jiffies(data->update_interval);
0c01b644 625 if (time_after(jiffies, next_update) || !data->valid) {
15b66ab6 626 dev_dbg(&client->dev, "Updating lm90 data.\n");
10bfef47 627
2f83ab77 628 data->valid = false;
10bfef47 629
37ad04d7
GR
630 val = lm90_read_reg(client, LM90_REG_R_LOCAL_LOW);
631 if (val < 0)
eb1c8f43 632 return val;
37ad04d7
GR
633 data->temp8[LOCAL_LOW] = val;
634
635 val = lm90_read_reg(client, LM90_REG_R_LOCAL_HIGH);
636 if (val < 0)
eb1c8f43 637 return val;
37ad04d7
GR
638 data->temp8[LOCAL_HIGH] = val;
639
a095f687 640 if (data->reg_local_ext) {
37ad04d7
GR
641 val = lm90_read16(client, LM90_REG_R_LOCAL_TEMP,
642 data->reg_local_ext);
643 if (val < 0)
eb1c8f43 644 return val;
37ad04d7 645 data->temp11[LOCAL_TEMP] = val;
15b66ab6 646 } else {
37ad04d7
GR
647 val = lm90_read_reg(client, LM90_REG_R_LOCAL_TEMP);
648 if (val < 0)
eb1c8f43 649 return val;
37ad04d7 650 data->temp11[LOCAL_TEMP] = val << 8;
15b66ab6 651 }
37ad04d7
GR
652 val = lm90_read16(client, LM90_REG_R_REMOTE_TEMPH,
653 LM90_REG_R_REMOTE_TEMPL);
654 if (val < 0)
eb1c8f43 655 return val;
37ad04d7
GR
656 data->temp11[REMOTE_TEMP] = val;
657
37ad04d7
GR
658 val = lm90_read_reg(client, LM90_REG_R_STATUS);
659 if (val < 0)
eb1c8f43 660 return val;
37ad04d7 661 data->alarms = val; /* lower 8 bit of alarms */
15b66ab6
GR
662
663 if (data->kind == max6696) {
37ad04d7
GR
664 val = lm90_select_remote_channel(client, data, 1);
665 if (val < 0)
eb1c8f43 666 return val;
37ad04d7 667
37ad04d7
GR
668 val = lm90_read16(client, LM90_REG_R_REMOTE_TEMPH,
669 LM90_REG_R_REMOTE_TEMPL);
eb1c8f43
GR
670 if (val < 0) {
671 lm90_select_remote_channel(client, data, 0);
672 return val;
673 }
37ad04d7
GR
674 data->temp11[REMOTE2_TEMP] = val;
675
15b66ab6
GR
676 lm90_select_remote_channel(client, data, 0);
677
37ad04d7
GR
678 val = lm90_read_reg(client, MAX6696_REG_R_STATUS2);
679 if (val < 0)
eb1c8f43 680 return val;
37ad04d7 681 data->alarms |= val << 8;
15b66ab6
GR
682 }
683
f36ffeab
GR
684 /*
685 * Re-enable ALERT# output if it was originally enabled and
686 * relevant alarms are all clear
687 */
37ad04d7
GR
688 if (!(data->config_orig & 0x80) &&
689 !(data->alarms & data->alert_alarms)) {
690 val = lm90_read_reg(client, LM90_REG_R_CONFIG1);
691 if (val < 0)
eb1c8f43 692 return val;
15b66ab6 693
37ad04d7 694 if (val & 0x80) {
15b66ab6
GR
695 dev_dbg(&client->dev, "Re-enabling ALERT#\n");
696 i2c_smbus_write_byte_data(client,
697 LM90_REG_W_CONFIG1,
37ad04d7 698 val & ~0x80);
15b66ab6
GR
699 }
700 }
701
702 data->last_updated = jiffies;
2f83ab77 703 data->valid = true;
15b66ab6
GR
704 }
705
eb1c8f43 706 return 0;
15b66ab6
GR
707}
708
cea50fe2
NC
709/*
710 * Conversions
711 * For local temperatures and limits, critical limits and the hysteresis
712 * value, the LM90 uses signed 8-bit values with LSB = 1 degree Celsius.
713 * For remote temperatures and limits, it uses signed 11-bit values with
271dabf5
BH
714 * LSB = 0.125 degree Celsius, left-justified in 16-bit registers. Some
715 * Maxim chips use unsigned values.
cea50fe2
NC
716 */
717
9d4d3834 718static inline int temp_from_s8(s8 val)
cea50fe2
NC
719{
720 return val * 1000;
721}
722
271dabf5
BH
723static inline int temp_from_u8(u8 val)
724{
725 return val * 1000;
726}
727
9d4d3834 728static inline int temp_from_s16(s16 val)
cea50fe2
NC
729{
730 return val / 32 * 125;
731}
732
271dabf5
BH
733static inline int temp_from_u16(u16 val)
734{
735 return val / 32 * 125;
736}
737
9d4d3834 738static s8 temp_to_s8(long val)
cea50fe2
NC
739{
740 if (val <= -128000)
741 return -128;
742 if (val >= 127000)
743 return 127;
744 if (val < 0)
745 return (val - 500) / 1000;
746 return (val + 500) / 1000;
747}
748
271dabf5
BH
749static u8 temp_to_u8(long val)
750{
751 if (val <= 0)
752 return 0;
753 if (val >= 255000)
754 return 255;
755 return (val + 500) / 1000;
756}
757
9d4d3834 758static s16 temp_to_s16(long val)
cea50fe2
NC
759{
760 if (val <= -128000)
761 return 0x8000;
762 if (val >= 127875)
763 return 0x7FE0;
764 if (val < 0)
765 return (val - 62) / 125 * 32;
766 return (val + 62) / 125 * 32;
767}
768
769static u8 hyst_to_reg(long val)
770{
771 if (val <= 0)
772 return 0;
773 if (val >= 30500)
774 return 31;
775 return (val + 500) / 1000;
776}
777
778/*
23b2d477
NC
779 * ADT7461 in compatibility mode is almost identical to LM90 except that
780 * attempts to write values that are outside the range 0 < temp < 127 are
781 * treated as the boundary value.
782 *
783 * ADT7461 in "extended mode" operation uses unsigned integers offset by
784 * 64 (e.g., 0 -> -64 degC). The range is restricted to -64..191 degC.
cea50fe2 785 */
9d4d3834 786static inline int temp_from_u8_adt7461(struct lm90_data *data, u8 val)
cea50fe2 787{
23b2d477
NC
788 if (data->flags & LM90_FLAG_ADT7461_EXT)
789 return (val - 64) * 1000;
589f707c 790 return temp_from_s8(val);
cea50fe2
NC
791}
792
9d4d3834 793static inline int temp_from_u16_adt7461(struct lm90_data *data, u16 val)
cea50fe2 794{
23b2d477
NC
795 if (data->flags & LM90_FLAG_ADT7461_EXT)
796 return (val - 0x4000) / 64 * 250;
589f707c 797 return temp_from_s16(val);
23b2d477
NC
798}
799
9d4d3834 800static u8 temp_to_u8_adt7461(struct lm90_data *data, long val)
23b2d477
NC
801{
802 if (data->flags & LM90_FLAG_ADT7461_EXT) {
803 if (val <= -64000)
804 return 0;
805 if (val >= 191000)
806 return 0xFF;
807 return (val + 500 + 64000) / 1000;
23b2d477 808 }
589f707c
GR
809 if (val <= 0)
810 return 0;
811 if (val >= 127000)
812 return 127;
813 return (val + 500) / 1000;
23b2d477
NC
814}
815
9d4d3834 816static u16 temp_to_u16_adt7461(struct lm90_data *data, long val)
23b2d477
NC
817{
818 if (data->flags & LM90_FLAG_ADT7461_EXT) {
819 if (val <= -64000)
820 return 0;
821 if (val >= 191750)
822 return 0xFFC0;
823 return (val + 64000 + 125) / 250 * 64;
23b2d477 824 }
589f707c
GR
825 if (val <= 0)
826 return 0;
827 if (val >= 127750)
828 return 0x7FC0;
829 return (val + 125) / 250 * 64;
cea50fe2
NC
830}
831
eb1c8f43
GR
832/* pec used for ADM1032 only */
833static ssize_t show_pec(struct device *dev, struct device_attribute *dummy,
834 char *buf)
30d7394b 835{
eb1c8f43 836 struct i2c_client *client = to_i2c_client(dev);
97ae60bb 837
eb1c8f43 838 return sprintf(buf, "%d\n", !!(client->flags & I2C_CLIENT_PEC));
30d7394b
JD
839}
840
eb1c8f43
GR
841static ssize_t set_pec(struct device *dev, struct device_attribute *dummy,
842 const char *buf, size_t count)
30d7394b 843{
eb1c8f43 844 struct i2c_client *client = to_i2c_client(dev);
11e57812
GR
845 long val;
846 int err;
847
179c4fdb 848 err = kstrtol(buf, 10, &val);
11e57812
GR
849 if (err < 0)
850 return err;
30d7394b 851
eb1c8f43
GR
852 switch (val) {
853 case 0:
854 client->flags &= ~I2C_CLIENT_PEC;
855 break;
856 case 1:
857 client->flags |= I2C_CLIENT_PEC;
858 break;
859 default:
860 return -EINVAL;
861 }
06e1c0a2 862
30d7394b 863 return count;
1da177e4 864}
30d7394b 865
eb1c8f43
GR
866static DEVICE_ATTR(pec, S_IWUSR | S_IRUGO, show_pec, set_pec);
867
868static int lm90_get_temp11(struct lm90_data *data, int index)
30d7394b 869{
eb1c8f43 870 s16 temp11 = data->temp11[index];
23b2d477
NC
871 int temp;
872
1daaceb2 873 if (data->kind == adt7461 || data->kind == tmp451)
eb1c8f43 874 temp = temp_from_u16_adt7461(data, temp11);
271dabf5 875 else if (data->kind == max6646)
eb1c8f43 876 temp = temp_from_u16(temp11);
23b2d477 877 else
eb1c8f43 878 temp = temp_from_s16(temp11);
23b2d477 879
97ae60bb 880 /* +16 degrees offset for temp2 for the LM99 */
eb1c8f43 881 if (data->kind == lm99 && index <= 2)
97ae60bb
JD
882 temp += 16000;
883
eb1c8f43 884 return temp;
1da177e4 885}
30d7394b 886
eb1c8f43 887static int lm90_set_temp11(struct lm90_data *data, int index, long val)
30d7394b 888{
eb1c8f43 889 static struct reg {
96512861
GR
890 u8 high;
891 u8 low;
eb1c8f43
GR
892 } reg[] = {
893 [REMOTE_LOW] = { LM90_REG_W_REMOTE_LOWH, LM90_REG_W_REMOTE_LOWL },
894 [REMOTE_HIGH] = { LM90_REG_W_REMOTE_HIGHH, LM90_REG_W_REMOTE_HIGHL },
895 [REMOTE_OFFSET] = { LM90_REG_W_REMOTE_OFFSH, LM90_REG_W_REMOTE_OFFSL },
896 [REMOTE2_LOW] = { LM90_REG_W_REMOTE_LOWH, LM90_REG_W_REMOTE_LOWL },
897 [REMOTE2_HIGH] = { LM90_REG_W_REMOTE_HIGHH, LM90_REG_W_REMOTE_HIGHL }
30d7394b 898 };
1de8b250 899 struct i2c_client *client = data->client;
eb1c8f43 900 struct reg *regp = &reg[index];
11e57812
GR
901 int err;
902
97ae60bb 903 /* +16 degrees offset for temp2 for the LM99 */
96512861 904 if (data->kind == lm99 && index <= 2)
97ae60bb
JD
905 val -= 16000;
906
1daaceb2 907 if (data->kind == adt7461 || data->kind == tmp451)
96512861 908 data->temp11[index] = temp_to_u16_adt7461(data, val);
271dabf5 909 else if (data->kind == max6646)
96512861 910 data->temp11[index] = temp_to_u8(val) << 8;
88073bb1 911 else if (data->flags & LM90_HAVE_REM_LIMIT_EXT)
96512861 912 data->temp11[index] = temp_to_s16(val);
88073bb1 913 else
96512861 914 data->temp11[index] = temp_to_s8(val) << 8;
5f502a83 915
eb1c8f43
GR
916 lm90_select_remote_channel(client, data, index >= 3);
917 err = i2c_smbus_write_byte_data(client, regp->high,
96512861 918 data->temp11[index] >> 8);
eb1c8f43
GR
919 if (err < 0)
920 return err;
88073bb1 921 if (data->flags & LM90_HAVE_REM_LIMIT_EXT)
eb1c8f43
GR
922 err = i2c_smbus_write_byte_data(client, regp->low,
923 data->temp11[index] & 0xff);
06e1c0a2 924
eb1c8f43
GR
925 lm90_select_remote_channel(client, data, 0);
926 return err;
1da177e4 927}
30d7394b 928
eb1c8f43 929static int lm90_get_temp8(struct lm90_data *data, int index)
30d7394b 930{
eb1c8f43 931 s8 temp8 = data->temp8[index];
23b2d477
NC
932 int temp;
933
1daaceb2 934 if (data->kind == adt7461 || data->kind == tmp451)
eb1c8f43 935 temp = temp_from_u8_adt7461(data, temp8);
ec38fa2b 936 else if (data->kind == max6646)
eb1c8f43 937 temp = temp_from_u8(temp8);
23b2d477 938 else
eb1c8f43 939 temp = temp_from_s8(temp8);
23b2d477 940
97ae60bb 941 /* +16 degrees offset for temp2 for the LM99 */
eb1c8f43 942 if (data->kind == lm99 && index == 3)
97ae60bb
JD
943 temp += 16000;
944
eb1c8f43 945 return temp;
1da177e4 946}
1da177e4 947
eb1c8f43 948static int lm90_set_temp8(struct lm90_data *data, int index, long val)
1da177e4 949{
eb1c8f43
GR
950 static const u8 reg[TEMP8_REG_NUM] = {
951 LM90_REG_W_LOCAL_LOW,
952 LM90_REG_W_LOCAL_HIGH,
953 LM90_REG_W_LOCAL_CRIT,
954 LM90_REG_W_REMOTE_CRIT,
955 MAX6659_REG_W_LOCAL_EMERG,
956 MAX6659_REG_W_REMOTE_EMERG,
957 LM90_REG_W_REMOTE_CRIT,
958 MAX6659_REG_W_REMOTE_EMERG,
959 };
1de8b250 960 struct i2c_client *client = data->client;
11e57812 961 int err;
1da177e4 962
eb1c8f43
GR
963 /* +16 degrees offset for temp2 for the LM99 */
964 if (data->kind == lm99 && index == 3)
965 val -= 16000;
11e57812 966
1daaceb2 967 if (data->kind == adt7461 || data->kind == tmp451)
eb1c8f43 968 data->temp8[index] = temp_to_u8_adt7461(data, val);
ec38fa2b 969 else if (data->kind == max6646)
eb1c8f43 970 data->temp8[index] = temp_to_u8(val);
ec38fa2b 971 else
eb1c8f43 972 data->temp8[index] = temp_to_s8(val);
ec38fa2b 973
eb1c8f43
GR
974 lm90_select_remote_channel(client, data, index >= 6);
975 err = i2c_smbus_write_byte_data(client, reg[index], data->temp8[index]);
976 lm90_select_remote_channel(client, data, 0);
37ad04d7 977
eb1c8f43 978 return err;
1da177e4
LT
979}
980
eb1c8f43 981static int lm90_get_temphyst(struct lm90_data *data, int index)
2d45771e 982{
eb1c8f43 983 int temp;
37ad04d7 984
eb1c8f43
GR
985 if (data->kind == adt7461 || data->kind == tmp451)
986 temp = temp_from_u8_adt7461(data, data->temp8[index]);
987 else if (data->kind == max6646)
988 temp = temp_from_u8(data->temp8[index]);
989 else
990 temp = temp_from_s8(data->temp8[index]);
2d45771e 991
eb1c8f43
GR
992 /* +16 degrees offset for temp2 for the LM99 */
993 if (data->kind == lm99 && index == 3)
994 temp += 16000;
0c01b644 995
eb1c8f43 996 return temp - temp_from_s8(data->temp_hyst);
0c01b644
GR
997}
998
eb1c8f43 999static int lm90_set_temphyst(struct lm90_data *data, long val)
0c01b644 1000{
1de8b250 1001 struct i2c_client *client = data->client;
eb1c8f43 1002 int temp;
0c01b644
GR
1003 int err;
1004
eb1c8f43
GR
1005 if (data->kind == adt7461 || data->kind == tmp451)
1006 temp = temp_from_u8_adt7461(data, data->temp8[LOCAL_CRIT]);
1007 else if (data->kind == max6646)
1008 temp = temp_from_u8(data->temp8[LOCAL_CRIT]);
1009 else
1010 temp = temp_from_s8(data->temp8[LOCAL_CRIT]);
0c01b644 1011
eb1c8f43
GR
1012 data->temp_hyst = hyst_to_reg(temp - val);
1013 err = i2c_smbus_write_byte_data(client, LM90_REG_W_TCRIT_HYST,
1014 data->temp_hyst);
1015 return err;
0c01b644
GR
1016}
1017
eb1c8f43
GR
1018static const u8 lm90_temp_index[3] = {
1019 LOCAL_TEMP, REMOTE_TEMP, REMOTE2_TEMP
0e39e01c
JD
1020};
1021
eb1c8f43
GR
1022static const u8 lm90_temp_min_index[3] = {
1023 LOCAL_LOW, REMOTE_LOW, REMOTE2_LOW
0e39e01c
JD
1024};
1025
eb1c8f43
GR
1026static const u8 lm90_temp_max_index[3] = {
1027 LOCAL_HIGH, REMOTE_HIGH, REMOTE2_HIGH
742192f5
GR
1028};
1029
eb1c8f43
GR
1030static const u8 lm90_temp_crit_index[3] = {
1031 LOCAL_CRIT, REMOTE_CRIT, REMOTE2_CRIT
742192f5
GR
1032};
1033
eb1c8f43
GR
1034static const u8 lm90_temp_emerg_index[3] = {
1035 LOCAL_EMERG, REMOTE_EMERG, REMOTE2_EMERG
6948708d
GR
1036};
1037
eb1c8f43
GR
1038static const u8 lm90_min_alarm_bits[3] = { 5, 3, 11 };
1039static const u8 lm90_max_alarm_bits[3] = { 0, 4, 12 };
1040static const u8 lm90_crit_alarm_bits[3] = { 0, 1, 9 };
1041static const u8 lm90_emergency_alarm_bits[3] = { 15, 13, 14 };
1042static const u8 lm90_fault_bits[3] = { 0, 2, 10 };
6948708d 1043
eb1c8f43
GR
1044static int lm90_temp_read(struct device *dev, u32 attr, int channel, long *val)
1045{
1046 struct lm90_data *data = dev_get_drvdata(dev);
1047 int err;
06e1c0a2 1048
eb1c8f43
GR
1049 mutex_lock(&data->update_lock);
1050 err = lm90_update_device(dev);
1051 mutex_unlock(&data->update_lock);
1052 if (err)
1053 return err;
06e1c0a2 1054
eb1c8f43
GR
1055 switch (attr) {
1056 case hwmon_temp_input:
1057 *val = lm90_get_temp11(data, lm90_temp_index[channel]);
1058 break;
1059 case hwmon_temp_min_alarm:
1060 *val = (data->alarms >> lm90_min_alarm_bits[channel]) & 1;
1061 break;
1062 case hwmon_temp_max_alarm:
1063 *val = (data->alarms >> lm90_max_alarm_bits[channel]) & 1;
1064 break;
1065 case hwmon_temp_crit_alarm:
1066 *val = (data->alarms >> lm90_crit_alarm_bits[channel]) & 1;
1067 break;
1068 case hwmon_temp_emergency_alarm:
1069 *val = (data->alarms >> lm90_emergency_alarm_bits[channel]) & 1;
1070 break;
1071 case hwmon_temp_fault:
1072 *val = (data->alarms >> lm90_fault_bits[channel]) & 1;
1073 break;
1074 case hwmon_temp_min:
1075 if (channel == 0)
1076 *val = lm90_get_temp8(data,
1077 lm90_temp_min_index[channel]);
1078 else
1079 *val = lm90_get_temp11(data,
1080 lm90_temp_min_index[channel]);
1081 break;
1082 case hwmon_temp_max:
1083 if (channel == 0)
1084 *val = lm90_get_temp8(data,
1085 lm90_temp_max_index[channel]);
1086 else
1087 *val = lm90_get_temp11(data,
1088 lm90_temp_max_index[channel]);
1089 break;
1090 case hwmon_temp_crit:
1091 *val = lm90_get_temp8(data, lm90_temp_crit_index[channel]);
1092 break;
1093 case hwmon_temp_crit_hyst:
1094 *val = lm90_get_temphyst(data, lm90_temp_crit_index[channel]);
1095 break;
1096 case hwmon_temp_emergency:
1097 *val = lm90_get_temp8(data, lm90_temp_emerg_index[channel]);
1098 break;
1099 case hwmon_temp_emergency_hyst:
1100 *val = lm90_get_temphyst(data, lm90_temp_emerg_index[channel]);
1101 break;
1102 case hwmon_temp_offset:
1103 *val = lm90_get_temp11(data, REMOTE_OFFSET);
1104 break;
1105 default:
1106 return -EOPNOTSUPP;
1107 }
1108 return 0;
1109}
06e1c0a2 1110
eb1c8f43
GR
1111static int lm90_temp_write(struct device *dev, u32 attr, int channel, long val)
1112{
1113 struct lm90_data *data = dev_get_drvdata(dev);
1114 int err;
06e1c0a2 1115
eb1c8f43 1116 mutex_lock(&data->update_lock);
06e1c0a2 1117
eb1c8f43
GR
1118 err = lm90_update_device(dev);
1119 if (err)
1120 goto error;
1121
1122 switch (attr) {
1123 case hwmon_temp_min:
1124 if (channel == 0)
1125 err = lm90_set_temp8(data,
1126 lm90_temp_min_index[channel],
1127 val);
1128 else
1129 err = lm90_set_temp11(data,
1130 lm90_temp_min_index[channel],
1131 val);
1132 break;
1133 case hwmon_temp_max:
1134 if (channel == 0)
1135 err = lm90_set_temp8(data,
1136 lm90_temp_max_index[channel],
1137 val);
1138 else
1139 err = lm90_set_temp11(data,
1140 lm90_temp_max_index[channel],
1141 val);
1142 break;
1143 case hwmon_temp_crit:
1144 err = lm90_set_temp8(data, lm90_temp_crit_index[channel], val);
1145 break;
1146 case hwmon_temp_crit_hyst:
1147 err = lm90_set_temphyst(data, val);
1148 break;
1149 case hwmon_temp_emergency:
1150 err = lm90_set_temp8(data, lm90_temp_emerg_index[channel], val);
1151 break;
1152 case hwmon_temp_offset:
1153 err = lm90_set_temp11(data, REMOTE_OFFSET, val);
1154 break;
1155 default:
1156 err = -EOPNOTSUPP;
1157 break;
1158 }
1159error:
1160 mutex_unlock(&data->update_lock);
1161
1162 return err;
1163}
1164
1165static umode_t lm90_temp_is_visible(const void *data, u32 attr, int channel)
c3df5806 1166{
eb1c8f43
GR
1167 switch (attr) {
1168 case hwmon_temp_input:
1169 case hwmon_temp_min_alarm:
1170 case hwmon_temp_max_alarm:
1171 case hwmon_temp_crit_alarm:
1172 case hwmon_temp_emergency_alarm:
1173 case hwmon_temp_emergency_hyst:
1174 case hwmon_temp_fault:
1175 return S_IRUGO;
1176 case hwmon_temp_min:
1177 case hwmon_temp_max:
1178 case hwmon_temp_crit:
1179 case hwmon_temp_emergency:
1180 case hwmon_temp_offset:
1181 return S_IRUGO | S_IWUSR;
1182 case hwmon_temp_crit_hyst:
1183 if (channel == 0)
1184 return S_IRUGO | S_IWUSR;
1185 return S_IRUGO;
1186 default:
1187 return 0;
1188 }
c3df5806
JD
1189}
1190
eb1c8f43 1191static int lm90_chip_read(struct device *dev, u32 attr, int channel, long *val)
c3df5806 1192{
eb1c8f43 1193 struct lm90_data *data = dev_get_drvdata(dev);
11e57812
GR
1194 int err;
1195
eb1c8f43
GR
1196 mutex_lock(&data->update_lock);
1197 err = lm90_update_device(dev);
1198 mutex_unlock(&data->update_lock);
1199 if (err)
11e57812 1200 return err;
c3df5806 1201
eb1c8f43
GR
1202 switch (attr) {
1203 case hwmon_chip_update_interval:
1204 *val = data->update_interval;
c3df5806 1205 break;
eb1c8f43
GR
1206 case hwmon_chip_alarms:
1207 *val = data->alarms;
c3df5806
JD
1208 break;
1209 default:
eb1c8f43 1210 return -EOPNOTSUPP;
c3df5806
JD
1211 }
1212
eb1c8f43 1213 return 0;
c3df5806
JD
1214}
1215
eb1c8f43
GR
1216static int lm90_chip_write(struct device *dev, u32 attr, int channel, long val)
1217{
1218 struct lm90_data *data = dev_get_drvdata(dev);
1219 struct i2c_client *client = data->client;
1220 int err;
c3df5806 1221
eb1c8f43
GR
1222 mutex_lock(&data->update_lock);
1223
1224 err = lm90_update_device(dev);
1225 if (err)
1226 goto error;
1227
1228 switch (attr) {
1229 case hwmon_chip_update_interval:
1230 err = lm90_set_convrate(client, data,
1231 clamp_val(val, 0, 100000));
1232 break;
1233 default:
1234 err = -EOPNOTSUPP;
1235 break;
1236 }
1237error:
1238 mutex_unlock(&data->update_lock);
1239
1240 return err;
1241}
1242
1243static umode_t lm90_chip_is_visible(const void *data, u32 attr, int channel)
1244{
1245 switch (attr) {
1246 case hwmon_chip_update_interval:
1247 return S_IRUGO | S_IWUSR;
1248 case hwmon_chip_alarms:
1249 return S_IRUGO;
1250 default:
1251 return 0;
1252 }
1253}
1254
1255static int lm90_read(struct device *dev, enum hwmon_sensor_types type,
1256 u32 attr, int channel, long *val)
1257{
1258 switch (type) {
1259 case hwmon_chip:
1260 return lm90_chip_read(dev, attr, channel, val);
1261 case hwmon_temp:
1262 return lm90_temp_read(dev, attr, channel, val);
1263 default:
1264 return -EOPNOTSUPP;
1265 }
1266}
1267
1268static int lm90_write(struct device *dev, enum hwmon_sensor_types type,
1269 u32 attr, int channel, long val)
1270{
1271 switch (type) {
1272 case hwmon_chip:
1273 return lm90_chip_write(dev, attr, channel, val);
1274 case hwmon_temp:
1275 return lm90_temp_write(dev, attr, channel, val);
1276 default:
1277 return -EOPNOTSUPP;
1278 }
1279}
1280
1281static umode_t lm90_is_visible(const void *data, enum hwmon_sensor_types type,
1282 u32 attr, int channel)
1283{
1284 switch (type) {
1285 case hwmon_chip:
1286 return lm90_chip_is_visible(data, attr, channel);
1287 case hwmon_temp:
1288 return lm90_temp_is_visible(data, attr, channel);
1289 default:
1290 return 0;
1291 }
1292}
1da177e4 1293
15b66ab6 1294/* Return 0 if detection is successful, -ENODEV otherwise */
b2589ab0 1295static int lm90_detect(struct i2c_client *client,
15b66ab6 1296 struct i2c_board_info *info)
8256fe0f 1297{
b2589ab0
JD
1298 struct i2c_adapter *adapter = client->adapter;
1299 int address = client->addr;
15b66ab6 1300 const char *name = NULL;
b2589ab0 1301 int man_id, chip_id, config1, config2, convrate;
8256fe0f 1302
15b66ab6
GR
1303 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1304 return -ENODEV;
1da177e4 1305
8f2fa77c 1306 /* detection and identification */
b2589ab0
JD
1307 man_id = i2c_smbus_read_byte_data(client, LM90_REG_R_MAN_ID);
1308 chip_id = i2c_smbus_read_byte_data(client, LM90_REG_R_CHIP_ID);
1309 config1 = i2c_smbus_read_byte_data(client, LM90_REG_R_CONFIG1);
1310 convrate = i2c_smbus_read_byte_data(client, LM90_REG_R_CONVRATE);
1311 if (man_id < 0 || chip_id < 0 || config1 < 0 || convrate < 0)
8f2fa77c
JD
1312 return -ENODEV;
1313
f90be42f 1314 if (man_id == 0x01 || man_id == 0x5C || man_id == 0x41) {
b2589ab0
JD
1315 config2 = i2c_smbus_read_byte_data(client, LM90_REG_R_CONFIG2);
1316 if (config2 < 0)
9b0e8526 1317 return -ENODEV;
f90be42f 1318 } else
b2589ab0 1319 config2 = 0; /* Make compiler happy */
8f2fa77c 1320
f90be42f
JD
1321 if ((address == 0x4C || address == 0x4D)
1322 && man_id == 0x01) { /* National Semiconductor */
b2589ab0
JD
1323 if ((config1 & 0x2A) == 0x00
1324 && (config2 & 0xF8) == 0x00
1325 && convrate <= 0x09) {
8f2fa77c
JD
1326 if (address == 0x4C
1327 && (chip_id & 0xF0) == 0x20) { /* LM90 */
1328 name = "lm90";
32c82a93 1329 } else
8f2fa77c
JD
1330 if ((chip_id & 0xF0) == 0x30) { /* LM89/LM99 */
1331 name = "lm99";
1332 dev_info(&adapter->dev,
1333 "Assuming LM99 chip at 0x%02x\n",
1334 address);
1335 dev_info(&adapter->dev,
1336 "If it is an LM89, instantiate it "
1337 "with the new_device sysfs "
1338 "interface\n");
271dabf5 1339 } else
8f2fa77c
JD
1340 if (address == 0x4C
1341 && (chip_id & 0xF0) == 0x10) { /* LM86 */
1342 name = "lm86";
1da177e4
LT
1343 }
1344 }
8f2fa77c
JD
1345 } else
1346 if ((address == 0x4C || address == 0x4D)
1347 && man_id == 0x41) { /* Analog Devices */
1348 if ((chip_id & 0xF0) == 0x40 /* ADM1032 */
b2589ab0
JD
1349 && (config1 & 0x3F) == 0x00
1350 && convrate <= 0x0A) {
8f2fa77c 1351 name = "adm1032";
f36ffeab
GR
1352 /*
1353 * The ADM1032 supports PEC, but only if combined
1354 * transactions are not used.
1355 */
8f2fa77c
JD
1356 if (i2c_check_functionality(adapter,
1357 I2C_FUNC_SMBUS_BYTE))
1358 info->flags |= I2C_CLIENT_PEC;
1359 } else
1360 if (chip_id == 0x51 /* ADT7461 */
b2589ab0
JD
1361 && (config1 & 0x1B) == 0x00
1362 && convrate <= 0x0A) {
8f2fa77c 1363 name = "adt7461";
5a4e5e6a
GR
1364 } else
1365 if (chip_id == 0x57 /* ADT7461A, NCT1008 */
b2589ab0
JD
1366 && (config1 & 0x1B) == 0x00
1367 && convrate <= 0x0A) {
5a4e5e6a 1368 name = "adt7461a";
8f2fa77c
JD
1369 }
1370 } else
1371 if (man_id == 0x4D) { /* Maxim */
b2589ab0 1372 int emerg, emerg2, status2;
06e1c0a2
GR
1373
1374 /*
1375 * We read MAX6659_REG_R_REMOTE_EMERG twice, and re-read
1376 * LM90_REG_R_MAN_ID in between. If MAX6659_REG_R_REMOTE_EMERG
1377 * exists, both readings will reflect the same value. Otherwise,
1378 * the readings will be different.
1379 */
b2589ab0
JD
1380 emerg = i2c_smbus_read_byte_data(client,
1381 MAX6659_REG_R_REMOTE_EMERG);
1382 man_id = i2c_smbus_read_byte_data(client,
8dc089d6 1383 LM90_REG_R_MAN_ID);
b2589ab0 1384 emerg2 = i2c_smbus_read_byte_data(client,
8dc089d6 1385 MAX6659_REG_R_REMOTE_EMERG);
b2589ab0
JD
1386 status2 = i2c_smbus_read_byte_data(client,
1387 MAX6696_REG_R_STATUS2);
1388 if (emerg < 0 || man_id < 0 || emerg2 < 0 || status2 < 0)
06e1c0a2
GR
1389 return -ENODEV;
1390
8f2fa77c
JD
1391 /*
1392 * The MAX6657, MAX6658 and MAX6659 do NOT have a chip_id
1393 * register. Reading from that address will return the last
1394 * read value, which in our case is those of the man_id
1395 * register. Likewise, the config1 register seems to lack a
1396 * low nibble, so the value will be those of the previous
1397 * read, so in our case those of the man_id register.
13c84951
GR
1398 * MAX6659 has a third set of upper temperature limit registers.
1399 * Those registers also return values on MAX6657 and MAX6658,
1400 * thus the only way to detect MAX6659 is by its address.
1401 * For this reason it will be mis-detected as MAX6657 if its
1402 * address is 0x4C.
8f2fa77c
JD
1403 */
1404 if (chip_id == man_id
13c84951 1405 && (address == 0x4C || address == 0x4D || address == 0x4E)
b2589ab0
JD
1406 && (config1 & 0x1F) == (man_id & 0x0F)
1407 && convrate <= 0x09) {
13c84951
GR
1408 if (address == 0x4C)
1409 name = "max6657";
1410 else
1411 name = "max6659";
8f2fa77c 1412 } else
06e1c0a2
GR
1413 /*
1414 * Even though MAX6695 and MAX6696 do not have a chip ID
1415 * register, reading it returns 0x01. Bit 4 of the config1
1416 * register is unused and should return zero when read. Bit 0 of
1417 * the status2 register is unused and should return zero when
1418 * read.
1419 *
1420 * MAX6695 and MAX6696 have an additional set of temperature
1421 * limit registers. We can detect those chips by checking if
1422 * one of those registers exists.
1423 */
1424 if (chip_id == 0x01
b2589ab0
JD
1425 && (config1 & 0x10) == 0x00
1426 && (status2 & 0x01) == 0x00
1427 && emerg == emerg2
1428 && convrate <= 0x07) {
06e1c0a2
GR
1429 name = "max6696";
1430 } else
8f2fa77c
JD
1431 /*
1432 * The chip_id register of the MAX6680 and MAX6681 holds the
1433 * revision of the chip. The lowest bit of the config1 register
1434 * is unused and should return zero when read, so should the
1435 * second to last bit of config1 (software reset).
1436 */
1437 if (chip_id == 0x01
b2589ab0
JD
1438 && (config1 & 0x03) == 0x00
1439 && convrate <= 0x07) {
8f2fa77c
JD
1440 name = "max6680";
1441 } else
1442 /*
1443 * The chip_id register of the MAX6646/6647/6649 holds the
1444 * revision of the chip. The lowest 6 bits of the config1
1445 * register are unused and should return zero when read.
1446 */
1447 if (chip_id == 0x59
b2589ab0
JD
1448 && (config1 & 0x3f) == 0x00
1449 && convrate <= 0x07) {
8f2fa77c 1450 name = "max6646";
1da177e4 1451 }
6771ea1f
JD
1452 } else
1453 if (address == 0x4C
1454 && man_id == 0x5C) { /* Winbond/Nuvoton */
b2589ab0
JD
1455 if ((config1 & 0x2A) == 0x00
1456 && (config2 & 0xF8) == 0x00) {
c4f99a2b 1457 if (chip_id == 0x01 /* W83L771W/G */
b2589ab0 1458 && convrate <= 0x09) {
c4f99a2b
JD
1459 name = "w83l771";
1460 } else
1461 if ((chip_id & 0xFE) == 0x10 /* W83L771AWG/ASG */
b2589ab0 1462 && convrate <= 0x08) {
c4f99a2b
JD
1463 name = "w83l771";
1464 }
6771ea1f 1465 }
2ef01793 1466 } else
6d101c58
JD
1467 if (address >= 0x48 && address <= 0x4F
1468 && man_id == 0xA1) { /* NXP Semiconductor/Philips */
6d101c58 1469 if (chip_id == 0x00
b2589ab0
JD
1470 && (config1 & 0x2A) == 0x00
1471 && (config2 & 0xFE) == 0x00
1472 && convrate <= 0x09) {
2ef01793
SD
1473 name = "sa56004";
1474 }
ae544f64
GR
1475 } else
1476 if ((address == 0x4C || address == 0x4D)
1477 && man_id == 0x47) { /* GMT */
1478 if (chip_id == 0x01 /* G781 */
1479 && (config1 & 0x3F) == 0x00
1480 && convrate <= 0x08)
1481 name = "g781";
1daaceb2
WN
1482 } else
1483 if (address == 0x4C
1484 && man_id == 0x55) { /* Texas Instruments */
1485 int local_ext;
1486
1487 local_ext = i2c_smbus_read_byte_data(client,
1488 TMP451_REG_R_LOCAL_TEMPL);
1489
1490 if (chip_id == 0x00 /* TMP451 */
1491 && (config1 & 0x1B) == 0x00
1492 && convrate <= 0x09
1493 && (local_ext & 0x0F) == 0x00)
1494 name = "tmp451";
1da177e4
LT
1495 }
1496
8f2fa77c
JD
1497 if (!name) { /* identification failed */
1498 dev_dbg(&adapter->dev,
1499 "Unsupported chip at 0x%02x (man_id=0x%02X, "
1500 "chip_id=0x%02X)\n", address, man_id, chip_id);
1501 return -ENODEV;
1da177e4 1502 }
8f2fa77c 1503
9b0e8526
JD
1504 strlcpy(info->type, name, I2C_NAME_SIZE);
1505
1506 return 0;
1507}
1508
1f17a444 1509static void lm90_restore_conf(void *_data)
f7001bb0 1510{
1f17a444
GR
1511 struct lm90_data *data = _data;
1512 struct i2c_client *client = data->client;
1513
f7001bb0
GR
1514 /* Restore initial configuration */
1515 i2c_smbus_write_byte_data(client, LM90_REG_W_CONVRATE,
1516 data->convrate_orig);
1517 i2c_smbus_write_byte_data(client, LM90_REG_W_CONFIG1,
1518 data->config_orig);
1519}
1520
37ad04d7 1521static int lm90_init_client(struct i2c_client *client, struct lm90_data *data)
15b66ab6 1522{
37ad04d7 1523 int config, convrate;
15b66ab6 1524
37ad04d7
GR
1525 convrate = lm90_read_reg(client, LM90_REG_R_CONVRATE);
1526 if (convrate < 0)
1527 return convrate;
0c01b644
GR
1528 data->convrate_orig = convrate;
1529
15b66ab6
GR
1530 /*
1531 * Start the conversions.
1532 */
0c01b644 1533 lm90_set_convrate(client, data, 500); /* 500ms; 2Hz conversion rate */
37ad04d7
GR
1534 config = lm90_read_reg(client, LM90_REG_R_CONFIG1);
1535 if (config < 0)
1536 return config;
15b66ab6
GR
1537 data->config_orig = config;
1538
1539 /* Check Temperature Range Select */
1daaceb2 1540 if (data->kind == adt7461 || data->kind == tmp451) {
15b66ab6
GR
1541 if (config & 0x04)
1542 data->flags |= LM90_FLAG_ADT7461_EXT;
1543 }
1544
1545 /*
1546 * Put MAX6680/MAX8881 into extended resolution (bit 0x10,
1547 * 0.125 degree resolution) and range (0x08, extend range
1548 * to -64 degree) mode for the remote temperature sensor.
1549 */
1550 if (data->kind == max6680)
1551 config |= 0x18;
1552
1553 /*
1554 * Select external channel 0 for max6695/96
1555 */
1556 if (data->kind == max6696)
1557 config &= ~0x08;
1558
1559 config &= 0xBF; /* run */
1560 if (config != data->config_orig) /* Only write if changed */
1561 i2c_smbus_write_byte_data(client, LM90_REG_W_CONFIG1, config);
1f17a444 1562
c5fcf01b 1563 return devm_add_action_or_reset(&client->dev, lm90_restore_conf, data);
15b66ab6
GR
1564}
1565
072de496
WN
1566static bool lm90_is_tripped(struct i2c_client *client, u16 *status)
1567{
1568 struct lm90_data *data = i2c_get_clientdata(client);
37ad04d7 1569 int st, st2 = 0;
072de496 1570
37ad04d7
GR
1571 st = lm90_read_reg(client, LM90_REG_R_STATUS);
1572 if (st < 0)
1573 return false;
072de496 1574
37ad04d7
GR
1575 if (data->kind == max6696) {
1576 st2 = lm90_read_reg(client, MAX6696_REG_R_STATUS2);
1577 if (st2 < 0)
1578 return false;
1579 }
072de496
WN
1580
1581 *status = st | (st2 << 8);
1582
1583 if ((st & 0x7f) == 0 && (st2 & 0xfe) == 0)
1584 return false;
1585
1586 if ((st & (LM90_STATUS_LLOW | LM90_STATUS_LHIGH | LM90_STATUS_LTHRM)) ||
1587 (st2 & MAX6696_STATUS2_LOT2))
1588 dev_warn(&client->dev,
1589 "temp%d out of range, please check!\n", 1);
1590 if ((st & (LM90_STATUS_RLOW | LM90_STATUS_RHIGH | LM90_STATUS_RTHRM)) ||
1591 (st2 & MAX6696_STATUS2_ROT2))
1592 dev_warn(&client->dev,
1593 "temp%d out of range, please check!\n", 2);
1594 if (st & LM90_STATUS_ROPEN)
1595 dev_warn(&client->dev,
1596 "temp%d diode open, please check!\n", 2);
1597 if (st2 & (MAX6696_STATUS2_R2LOW | MAX6696_STATUS2_R2HIGH |
1598 MAX6696_STATUS2_R2THRM | MAX6696_STATUS2_R2OT2))
1599 dev_warn(&client->dev,
1600 "temp%d out of range, please check!\n", 3);
1601 if (st2 & MAX6696_STATUS2_R2OPEN)
1602 dev_warn(&client->dev,
1603 "temp%d diode open, please check!\n", 3);
1604
1605 return true;
1606}
1607
109b1283
WN
1608static irqreturn_t lm90_irq_thread(int irq, void *dev_id)
1609{
1610 struct i2c_client *client = dev_id;
1611 u16 status;
1612
1613 if (lm90_is_tripped(client, &status))
1614 return IRQ_HANDLED;
1615 else
1616 return IRQ_NONE;
1617}
1618
1f17a444
GR
1619static void lm90_remove_pec(void *dev)
1620{
1621 device_remove_file(dev, &dev_attr_pec);
1622}
1623
1624static void lm90_regulator_disable(void *regulator)
1625{
1626 regulator_disable(regulator);
1627}
1628
eb1c8f43
GR
1629static const u32 lm90_chip_config[] = {
1630 HWMON_C_REGISTER_TZ | HWMON_C_UPDATE_INTERVAL | HWMON_C_ALARMS,
1631 0
1632};
1633
1634static const struct hwmon_channel_info lm90_chip_info = {
1635 .type = hwmon_chip,
1636 .config = lm90_chip_config,
1637};
1638
1639
1640static const struct hwmon_ops lm90_ops = {
1641 .is_visible = lm90_is_visible,
1642 .read = lm90_read,
1643 .write = lm90_write,
1644};
1645
b2589ab0 1646static int lm90_probe(struct i2c_client *client,
9b0e8526
JD
1647 const struct i2c_device_id *id)
1648{
b2589ab0
JD
1649 struct device *dev = &client->dev;
1650 struct i2c_adapter *adapter = to_i2c_adapter(dev->parent);
eb1c8f43 1651 struct hwmon_channel_info *info;
3e0f964f 1652 struct regulator *regulator;
6e5f62b9 1653 struct device *hwmon_dev;
eb1c8f43 1654 struct lm90_data *data;
9b0e8526 1655 int err;
1da177e4 1656
3e0f964f
WN
1657 regulator = devm_regulator_get(dev, "vcc");
1658 if (IS_ERR(regulator))
1659 return PTR_ERR(regulator);
1660
1661 err = regulator_enable(regulator);
1662 if (err < 0) {
d89fa686 1663 dev_err(dev, "Failed to enable regulator: %d\n", err);
3e0f964f
WN
1664 return err;
1665 }
1666
c5fcf01b
GR
1667 err = devm_add_action_or_reset(dev, lm90_regulator_disable, regulator);
1668 if (err)
1669 return err;
1f17a444 1670
d89fa686 1671 data = devm_kzalloc(dev, sizeof(struct lm90_data), GFP_KERNEL);
20f426ff
GR
1672 if (!data)
1673 return -ENOMEM;
1674
1de8b250 1675 data->client = client;
b2589ab0 1676 i2c_set_clientdata(client, data);
9a61bf63 1677 mutex_init(&data->update_lock);
1da177e4 1678
9b0e8526
JD
1679 /* Set the device type */
1680 data->kind = id->driver_data;
1681 if (data->kind == adm1032) {
1682 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE))
b2589ab0 1683 client->flags &= ~I2C_CLIENT_PEC;
9b0e8526 1684 }
1da177e4 1685
f36ffeab
GR
1686 /*
1687 * Different devices have different alarm bits triggering the
1688 * ALERT# output
1689 */
4667bcb8 1690 data->alert_alarms = lm90_params[data->kind].alert_alarms;
53de3342 1691
88073bb1 1692 /* Set chip capabilities */
4667bcb8 1693 data->flags = lm90_params[data->kind].flags;
eb1c8f43
GR
1694
1695 data->chip.ops = &lm90_ops;
1696 data->chip.info = data->info;
1697
1698 data->info[0] = &lm90_chip_info;
1699 data->info[1] = &data->temp_info;
1700
1701 info = &data->temp_info;
1702 info->type = hwmon_temp;
1703 info->config = data->channel_config;
1704
1705 data->channel_config[0] = HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MAX |
1706 HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MIN_ALARM |
1707 HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM;
1708 data->channel_config[1] = HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MAX |
1709 HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MIN_ALARM |
1710 HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM | HWMON_T_FAULT;
1711
1712 if (data->flags & LM90_HAVE_OFFSET)
1713 data->channel_config[1] |= HWMON_T_OFFSET;
1714
1715 if (data->flags & LM90_HAVE_EMERGENCY) {
1716 data->channel_config[0] |= HWMON_T_EMERGENCY |
1717 HWMON_T_EMERGENCY_HYST;
1718 data->channel_config[1] |= HWMON_T_EMERGENCY |
1719 HWMON_T_EMERGENCY_HYST;
1720 }
1721
1722 if (data->flags & LM90_HAVE_EMERGENCY_ALARM) {
1723 data->channel_config[0] |= HWMON_T_EMERGENCY_ALARM;
1724 data->channel_config[1] |= HWMON_T_EMERGENCY_ALARM;
1725 }
1726
1727 if (data->flags & LM90_HAVE_TEMP3) {
1728 data->channel_config[2] = HWMON_T_INPUT |
1729 HWMON_T_MIN | HWMON_T_MAX |
1730 HWMON_T_CRIT | HWMON_T_CRIT_HYST |
1731 HWMON_T_EMERGENCY | HWMON_T_EMERGENCY_HYST |
1732 HWMON_T_MIN_ALARM | HWMON_T_MAX_ALARM |
1733 HWMON_T_CRIT_ALARM | HWMON_T_EMERGENCY_ALARM |
1734 HWMON_T_FAULT;
1735 }
1736
a095f687 1737 data->reg_local_ext = lm90_params[data->kind].reg_local_ext;
06e1c0a2 1738
0c01b644
GR
1739 /* Set maximum conversion rate */
1740 data->max_convrate = lm90_params[data->kind].max_convrate;
1741
1da177e4 1742 /* Initialize the LM90 chip */
37ad04d7
GR
1743 err = lm90_init_client(client, data);
1744 if (err < 0) {
1745 dev_err(dev, "Failed to initialize device\n");
1746 return err;
1747 }
1da177e4 1748
eb1c8f43
GR
1749 /*
1750 * The 'pec' attribute is attached to the i2c device and thus created
1751 * separately.
1752 */
b2589ab0
JD
1753 if (client->flags & I2C_CLIENT_PEC) {
1754 err = device_create_file(dev, &dev_attr_pec);
11e57812 1755 if (err)
1f17a444 1756 return err;
c5fcf01b
GR
1757 err = devm_add_action_or_reset(dev, lm90_remove_pec, dev);
1758 if (err)
1759 return err;
06e1c0a2 1760 }
0e39e01c 1761
eb1c8f43
GR
1762 hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
1763 data, &data->chip,
1764 NULL);
6e5f62b9
GR
1765 if (IS_ERR(hwmon_dev))
1766 return PTR_ERR(hwmon_dev);
943b0830 1767
109b1283
WN
1768 if (client->irq) {
1769 dev_dbg(dev, "IRQ: %d\n", client->irq);
1770 err = devm_request_threaded_irq(dev, client->irq,
1771 NULL, lm90_irq_thread,
1772 IRQF_TRIGGER_LOW | IRQF_ONESHOT,
1773 "lm90", client);
1774 if (err < 0) {
1775 dev_err(dev, "cannot request IRQ %d\n", client->irq);
6e5f62b9 1776 return err;
109b1283
WN
1777 }
1778 }
1779
1da177e4
LT
1780 return 0;
1781}
1782
b4f21054
BT
1783static void lm90_alert(struct i2c_client *client, enum i2c_alert_protocol type,
1784 unsigned int flag)
53de3342 1785{
072de496 1786 u16 alarms;
06e1c0a2 1787
b4f21054
BT
1788 if (type != I2C_PROTOCOL_SMBUS_ALERT)
1789 return;
1790
072de496 1791 if (lm90_is_tripped(client, &alarms)) {
f36ffeab
GR
1792 /*
1793 * Disable ALERT# output, because these chips don't implement
1794 * SMBus alert correctly; they should only hold the alert line
1795 * low briefly.
1796 */
072de496
WN
1797 struct lm90_data *data = i2c_get_clientdata(client);
1798
37ad04d7
GR
1799 if ((data->flags & LM90_HAVE_BROKEN_ALERT) &&
1800 (alarms & data->alert_alarms)) {
1801 int config;
1802
53de3342 1803 dev_dbg(&client->dev, "Disabling ALERT#\n");
37ad04d7
GR
1804 config = lm90_read_reg(client, LM90_REG_R_CONFIG1);
1805 if (config >= 0)
1806 i2c_smbus_write_byte_data(client,
1807 LM90_REG_W_CONFIG1,
1808 config | 0x80);
53de3342 1809 }
072de496
WN
1810 } else {
1811 dev_info(&client->dev, "Everything OK\n");
53de3342
JD
1812 }
1813}
1814
15b66ab6
GR
1815static struct i2c_driver lm90_driver = {
1816 .class = I2C_CLASS_HWMON,
1817 .driver = {
1818 .name = "lm90",
1819 },
1820 .probe = lm90_probe,
15b66ab6
GR
1821 .alert = lm90_alert,
1822 .id_table = lm90_id,
1823 .detect = lm90_detect,
1824 .address_list = normal_i2c,
1825};
1da177e4 1826
f0967eea 1827module_i2c_driver(lm90_driver);
1da177e4 1828
7c81c60f 1829MODULE_AUTHOR("Jean Delvare <jdelvare@suse.de>");
1da177e4
LT
1830MODULE_DESCRIPTION("LM90/ADM1032 driver");
1831MODULE_LICENSE("GPL");