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1da177e4
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1/*
2 * lm90.c - Part of lm_sensors, Linux kernel modules for hardware
3 * monitoring
7c81c60f 4 * Copyright (C) 2003-2010 Jean Delvare <jdelvare@suse.de>
1da177e4
LT
5 *
6 * Based on the lm83 driver. The LM90 is a sensor chip made by National
7 * Semiconductor. It reports up to two temperatures (its own plus up to
8 * one external one) with a 0.125 deg resolution (1 deg for local
a874a10c 9 * temperature) and a 3-4 deg accuracy.
1da177e4
LT
10 *
11 * This driver also supports the LM89 and LM99, two other sensor chips
12 * made by National Semiconductor. Both have an increased remote
13 * temperature measurement accuracy (1 degree), and the LM99
14 * additionally shifts remote temperatures (measured and limits) by 16
97ae60bb 15 * degrees, which allows for higher temperatures measurement.
44bbe87e 16 * Note that there is no way to differentiate between both chips.
97ae60bb 17 * When device is auto-detected, the driver will assume an LM99.
1da177e4
LT
18 *
19 * This driver also supports the LM86, another sensor chip made by
20 * National Semiconductor. It is exactly similar to the LM90 except it
21 * has a higher accuracy.
1da177e4
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22 *
23 * This driver also supports the ADM1032, a sensor chip made by Analog
24 * Devices. That chip is similar to the LM90, with a few differences
a874a10c
JD
25 * that are not handled by this driver. Among others, it has a higher
26 * accuracy than the LM90, much like the LM86 does.
1da177e4
LT
27 *
28 * This driver also supports the MAX6657, MAX6658 and MAX6659 sensor
a874a10c 29 * chips made by Maxim. These chips are similar to the LM86.
44bbe87e 30 * Note that there is no easy way to differentiate between the three
6948708d
GR
31 * variants. We use the device address to detect MAX6659, which will result
32 * in a detection as max6657 if it is on address 0x4c. The extra address
33 * and features of the MAX6659 are only supported if the chip is configured
34 * explicitly as max6659, or if its address is not 0x4c.
35 * These chips lack the remote temperature offset feature.
1da177e4 36 *
1a51e068
DW
37 * This driver also supports the MAX6646, MAX6647, MAX6648, MAX6649 and
38 * MAX6692 chips made by Maxim. These are again similar to the LM86,
39 * but they use unsigned temperature values and can report temperatures
40 * from 0 to 145 degrees.
271dabf5 41 *
32c82a93
RB
42 * This driver also supports the MAX6680 and MAX6681, two other sensor
43 * chips made by Maxim. These are quite similar to the other Maxim
a874a10c
JD
44 * chips. The MAX6680 and MAX6681 only differ in the pinout so they can
45 * be treated identically.
32c82a93 46 *
06e1c0a2
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47 * This driver also supports the MAX6695 and MAX6696, two other sensor
48 * chips made by Maxim. These are also quite similar to other Maxim
49 * chips, but support three temperature sensors instead of two. MAX6695
50 * and MAX6696 only differ in the pinout so they can be treated identically.
51 *
5a4e5e6a
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52 * This driver also supports ADT7461 and ADT7461A from Analog Devices as well as
53 * NCT1008 from ON Semiconductor. The chips are supported in both compatibility
54 * and extended mode. They are mostly compatible with LM90 except for a data
55 * format difference for the temperature value registers.
1da177e4 56 *
2ef01793
SD
57 * This driver also supports the SA56004 from Philips. This device is
58 * pin-compatible with the LM86, the ED/EDP parts are also address-compatible.
59 *
ae544f64
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60 * This driver also supports the G781 from GMT. This device is compatible
61 * with the ADM1032.
62 *
1daaceb2
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63 * This driver also supports TMP451 from Texas Instruments. This device is
64 * supported in both compatibility and extended mode. It's mostly compatible
65 * with ADT7461 except for local temperature low byte register and max
66 * conversion rate.
67 *
1da177e4
LT
68 * Since the LM90 was the first chipset supported by this driver, most
69 * comments will refer to this chipset, but are actually general and
70 * concern all supported chipsets, unless mentioned otherwise.
71 *
72 * This program is free software; you can redistribute it and/or modify
73 * it under the terms of the GNU General Public License as published by
74 * the Free Software Foundation; either version 2 of the License, or
75 * (at your option) any later version.
76 *
77 * This program is distributed in the hope that it will be useful,
78 * but WITHOUT ANY WARRANTY; without even the implied warranty of
79 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
80 * GNU General Public License for more details.
81 *
82 * You should have received a copy of the GNU General Public License
83 * along with this program; if not, write to the Free Software
84 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
85 */
86
1da177e4
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87#include <linux/module.h>
88#include <linux/init.h>
89#include <linux/slab.h>
90#include <linux/jiffies.h>
91#include <linux/i2c.h>
943b0830
MH
92#include <linux/hwmon.h>
93#include <linux/err.h>
9a61bf63 94#include <linux/mutex.h>
df8d57bf 95#include <linux/of_device.h>
0e39e01c 96#include <linux/sysfs.h>
109b1283 97#include <linux/interrupt.h>
3e0f964f 98#include <linux/regulator/consumer.h>
1da177e4
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99
100/*
101 * Addresses to scan
102 * Address is fully defined internally and cannot be changed except for
32c82a93 103 * MAX6659, MAX6680 and MAX6681.
5a4e5e6a
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104 * LM86, LM89, LM90, LM99, ADM1032, ADM1032-1, ADT7461, ADT7461A, MAX6649,
105 * MAX6657, MAX6658, NCT1008 and W83L771 have address 0x4c.
106 * ADM1032-2, ADT7461-2, ADT7461A-2, LM89-1, LM99-1, MAX6646, and NCT1008D
107 * have address 0x4d.
271dabf5 108 * MAX6647 has address 0x4e.
13c84951 109 * MAX6659 can have address 0x4c, 0x4d or 0x4e.
32c82a93
RB
110 * MAX6680 and MAX6681 can have address 0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b,
111 * 0x4c, 0x4d or 0x4e.
2ef01793 112 * SA56004 can have address 0x48 through 0x4F.
1da177e4
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113 */
114
25e9c86d 115static const unsigned short normal_i2c[] = {
2ef01793
SD
116 0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b, 0x48, 0x49, 0x4a, 0x4b, 0x4c,
117 0x4d, 0x4e, 0x4f, I2C_CLIENT_END };
1da177e4 118
13c84951 119enum chips { lm90, adm1032, lm99, lm86, max6657, max6659, adt7461, max6680,
1daaceb2 120 max6646, w83l771, max6696, sa56004, g781, tmp451 };
1da177e4
LT
121
122/*
123 * The LM90 registers
124 */
125
126#define LM90_REG_R_MAN_ID 0xFE
127#define LM90_REG_R_CHIP_ID 0xFF
128#define LM90_REG_R_CONFIG1 0x03
129#define LM90_REG_W_CONFIG1 0x09
130#define LM90_REG_R_CONFIG2 0xBF
131#define LM90_REG_W_CONFIG2 0xBF
132#define LM90_REG_R_CONVRATE 0x04
133#define LM90_REG_W_CONVRATE 0x0A
134#define LM90_REG_R_STATUS 0x02
135#define LM90_REG_R_LOCAL_TEMP 0x00
136#define LM90_REG_R_LOCAL_HIGH 0x05
137#define LM90_REG_W_LOCAL_HIGH 0x0B
138#define LM90_REG_R_LOCAL_LOW 0x06
139#define LM90_REG_W_LOCAL_LOW 0x0C
140#define LM90_REG_R_LOCAL_CRIT 0x20
141#define LM90_REG_W_LOCAL_CRIT 0x20
142#define LM90_REG_R_REMOTE_TEMPH 0x01
143#define LM90_REG_R_REMOTE_TEMPL 0x10
144#define LM90_REG_R_REMOTE_OFFSH 0x11
145#define LM90_REG_W_REMOTE_OFFSH 0x11
146#define LM90_REG_R_REMOTE_OFFSL 0x12
147#define LM90_REG_W_REMOTE_OFFSL 0x12
148#define LM90_REG_R_REMOTE_HIGHH 0x07
149#define LM90_REG_W_REMOTE_HIGHH 0x0D
150#define LM90_REG_R_REMOTE_HIGHL 0x13
151#define LM90_REG_W_REMOTE_HIGHL 0x13
152#define LM90_REG_R_REMOTE_LOWH 0x08
153#define LM90_REG_W_REMOTE_LOWH 0x0E
154#define LM90_REG_R_REMOTE_LOWL 0x14
155#define LM90_REG_W_REMOTE_LOWL 0x14
156#define LM90_REG_R_REMOTE_CRIT 0x19
157#define LM90_REG_W_REMOTE_CRIT 0x19
158#define LM90_REG_R_TCRIT_HYST 0x21
159#define LM90_REG_W_TCRIT_HYST 0x21
160
06e1c0a2 161/* MAX6646/6647/6649/6657/6658/6659/6695/6696 registers */
f65e1708
JD
162
163#define MAX6657_REG_R_LOCAL_TEMPL 0x11
06e1c0a2 164#define MAX6696_REG_R_STATUS2 0x12
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165#define MAX6659_REG_R_REMOTE_EMERG 0x16
166#define MAX6659_REG_W_REMOTE_EMERG 0x16
167#define MAX6659_REG_R_LOCAL_EMERG 0x17
168#define MAX6659_REG_W_LOCAL_EMERG 0x17
f65e1708 169
2ef01793
SD
170/* SA56004 registers */
171
172#define SA56004_REG_R_LOCAL_TEMPL 0x22
173
0c01b644
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174#define LM90_MAX_CONVRATE_MS 16000 /* Maximum conversion rate in ms */
175
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176/* TMP451 registers */
177#define TMP451_REG_R_LOCAL_TEMPL 0x15
178
23b2d477
NC
179/*
180 * Device flags
181 */
88073bb1
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182#define LM90_FLAG_ADT7461_EXT (1 << 0) /* ADT7461 extended mode */
183/* Device features */
184#define LM90_HAVE_OFFSET (1 << 1) /* temperature offset register */
88073bb1 185#define LM90_HAVE_REM_LIMIT_EXT (1 << 3) /* extended remote limit */
6948708d 186#define LM90_HAVE_EMERGENCY (1 << 4) /* 3rd upper (emergency) limit */
06e1c0a2
GR
187#define LM90_HAVE_EMERGENCY_ALARM (1 << 5)/* emergency alarm */
188#define LM90_HAVE_TEMP3 (1 << 6) /* 3rd temperature sensor */
1179324c 189#define LM90_HAVE_BROKEN_ALERT (1 << 7) /* Broken alert */
23b2d477 190
072de496
WN
191/* LM90 status */
192#define LM90_STATUS_LTHRM (1 << 0) /* local THERM limit tripped */
193#define LM90_STATUS_RTHRM (1 << 1) /* remote THERM limit tripped */
194#define LM90_STATUS_ROPEN (1 << 2) /* remote is an open circuit */
195#define LM90_STATUS_RLOW (1 << 3) /* remote low temp limit tripped */
196#define LM90_STATUS_RHIGH (1 << 4) /* remote high temp limit tripped */
197#define LM90_STATUS_LLOW (1 << 5) /* local low temp limit tripped */
198#define LM90_STATUS_LHIGH (1 << 6) /* local high temp limit tripped */
199
200#define MAX6696_STATUS2_R2THRM (1 << 1) /* remote2 THERM limit tripped */
201#define MAX6696_STATUS2_R2OPEN (1 << 2) /* remote2 is an open circuit */
202#define MAX6696_STATUS2_R2LOW (1 << 3) /* remote2 low temp limit tripped */
203#define MAX6696_STATUS2_R2HIGH (1 << 4) /* remote2 high temp limit tripped */
204#define MAX6696_STATUS2_ROT2 (1 << 5) /* remote emergency limit tripped */
205#define MAX6696_STATUS2_R2OT2 (1 << 6) /* remote2 emergency limit tripped */
206#define MAX6696_STATUS2_LOT2 (1 << 7) /* local emergency limit tripped */
207
1da177e4
LT
208/*
209 * Driver data (common to all clients)
210 */
211
9b0e8526
JD
212static const struct i2c_device_id lm90_id[] = {
213 { "adm1032", adm1032 },
214 { "adt7461", adt7461 },
5a4e5e6a 215 { "adt7461a", adt7461 },
ae544f64 216 { "g781", g781 },
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JD
217 { "lm90", lm90 },
218 { "lm86", lm86 },
97ae60bb
JD
219 { "lm89", lm86 },
220 { "lm99", lm99 },
271dabf5
BH
221 { "max6646", max6646 },
222 { "max6647", max6646 },
223 { "max6649", max6646 },
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JD
224 { "max6657", max6657 },
225 { "max6658", max6657 },
13c84951 226 { "max6659", max6659 },
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JD
227 { "max6680", max6680 },
228 { "max6681", max6680 },
06e1c0a2
GR
229 { "max6695", max6696 },
230 { "max6696", max6696 },
5a4e5e6a 231 { "nct1008", adt7461 },
6771ea1f 232 { "w83l771", w83l771 },
2ef01793 233 { "sa56004", sa56004 },
1daaceb2 234 { "tmp451", tmp451 },
9b0e8526
JD
235 { }
236};
237MODULE_DEVICE_TABLE(i2c, lm90_id);
238
df8d57bf
JMC
239static const struct of_device_id lm90_of_match[] = {
240 {
241 .compatible = "adi,adm1032",
242 .data = (void *)adm1032
243 },
244 {
245 .compatible = "adi,adt7461",
246 .data = (void *)adt7461
247 },
248 {
249 .compatible = "adi,adt7461a",
250 .data = (void *)adt7461
251 },
252 {
253 .compatible = "gmt,g781",
254 .data = (void *)g781
255 },
256 {
257 .compatible = "national,lm90",
258 .data = (void *)lm90
259 },
260 {
261 .compatible = "national,lm86",
262 .data = (void *)lm86
263 },
264 {
265 .compatible = "national,lm89",
266 .data = (void *)lm86
267 },
268 {
269 .compatible = "national,lm99",
270 .data = (void *)lm99
271 },
272 {
273 .compatible = "dallas,max6646",
274 .data = (void *)max6646
275 },
276 {
277 .compatible = "dallas,max6647",
278 .data = (void *)max6646
279 },
280 {
281 .compatible = "dallas,max6649",
282 .data = (void *)max6646
283 },
284 {
285 .compatible = "dallas,max6657",
286 .data = (void *)max6657
287 },
288 {
289 .compatible = "dallas,max6658",
290 .data = (void *)max6657
291 },
292 {
293 .compatible = "dallas,max6659",
294 .data = (void *)max6659
295 },
296 {
297 .compatible = "dallas,max6680",
298 .data = (void *)max6680
299 },
300 {
301 .compatible = "dallas,max6681",
302 .data = (void *)max6680
303 },
304 {
305 .compatible = "dallas,max6695",
306 .data = (void *)max6696
307 },
308 {
309 .compatible = "dallas,max6696",
310 .data = (void *)max6696
311 },
312 {
313 .compatible = "onnn,nct1008",
314 .data = (void *)adt7461
315 },
316 {
317 .compatible = "winbond,w83l771",
318 .data = (void *)w83l771
319 },
320 {
321 .compatible = "nxp,sa56004",
322 .data = (void *)sa56004
323 },
324 {
325 .compatible = "ti,tmp451",
326 .data = (void *)tmp451
327 },
328 { },
329};
330MODULE_DEVICE_TABLE(of, lm90_of_match);
331
4667bcb8
GR
332/*
333 * chip type specific parameters
334 */
335struct lm90_params {
336 u32 flags; /* Capabilities */
337 u16 alert_alarms; /* Which alarm bits trigger ALERT# */
338 /* Upper 8 bits for max6695/96 */
0c01b644 339 u8 max_convrate; /* Maximum conversion rate register value */
a095f687 340 u8 reg_local_ext; /* Extended local temp register (optional) */
4667bcb8
GR
341};
342
343static const struct lm90_params lm90_params[] = {
344 [adm1032] = {
1179324c
GR
345 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
346 | LM90_HAVE_BROKEN_ALERT,
4667bcb8 347 .alert_alarms = 0x7c,
0c01b644 348 .max_convrate = 10,
4667bcb8
GR
349 },
350 [adt7461] = {
1179324c
GR
351 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
352 | LM90_HAVE_BROKEN_ALERT,
4667bcb8 353 .alert_alarms = 0x7c,
0c01b644 354 .max_convrate = 10,
4667bcb8 355 },
ae544f64
GR
356 [g781] = {
357 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
358 | LM90_HAVE_BROKEN_ALERT,
359 .alert_alarms = 0x7c,
360 .max_convrate = 8,
361 },
4667bcb8
GR
362 [lm86] = {
363 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT,
364 .alert_alarms = 0x7b,
0c01b644 365 .max_convrate = 9,
4667bcb8
GR
366 },
367 [lm90] = {
368 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT,
369 .alert_alarms = 0x7b,
0c01b644 370 .max_convrate = 9,
4667bcb8
GR
371 },
372 [lm99] = {
373 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT,
374 .alert_alarms = 0x7b,
0c01b644 375 .max_convrate = 9,
4667bcb8
GR
376 },
377 [max6646] = {
4667bcb8 378 .alert_alarms = 0x7c,
0c01b644 379 .max_convrate = 6,
2ef01793 380 .reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL,
4667bcb8
GR
381 },
382 [max6657] = {
4667bcb8 383 .alert_alarms = 0x7c,
0c01b644 384 .max_convrate = 8,
2ef01793 385 .reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL,
4667bcb8
GR
386 },
387 [max6659] = {
a095f687 388 .flags = LM90_HAVE_EMERGENCY,
4667bcb8 389 .alert_alarms = 0x7c,
0c01b644 390 .max_convrate = 8,
2ef01793 391 .reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL,
4667bcb8
GR
392 },
393 [max6680] = {
394 .flags = LM90_HAVE_OFFSET,
395 .alert_alarms = 0x7c,
0c01b644 396 .max_convrate = 7,
4667bcb8
GR
397 },
398 [max6696] = {
a095f687 399 .flags = LM90_HAVE_EMERGENCY
4667bcb8 400 | LM90_HAVE_EMERGENCY_ALARM | LM90_HAVE_TEMP3,
e41fae2b 401 .alert_alarms = 0x1c7c,
0c01b644 402 .max_convrate = 6,
2ef01793 403 .reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL,
4667bcb8
GR
404 },
405 [w83l771] = {
406 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT,
407 .alert_alarms = 0x7c,
0c01b644 408 .max_convrate = 8,
4667bcb8 409 },
2ef01793 410 [sa56004] = {
a095f687 411 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT,
2ef01793
SD
412 .alert_alarms = 0x7b,
413 .max_convrate = 9,
414 .reg_local_ext = SA56004_REG_R_LOCAL_TEMPL,
415 },
1daaceb2
WN
416 [tmp451] = {
417 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
418 | LM90_HAVE_BROKEN_ALERT,
419 .alert_alarms = 0x7c,
420 .max_convrate = 9,
421 .reg_local_ext = TMP451_REG_R_LOCAL_TEMPL,
eb1c8f43 422 },
4667bcb8
GR
423};
424
40465d94
WN
425/*
426 * TEMP8 register index
427 */
428enum lm90_temp8_reg_index {
429 LOCAL_LOW = 0,
430 LOCAL_HIGH,
431 LOCAL_CRIT,
432 REMOTE_CRIT,
433 LOCAL_EMERG, /* max6659 and max6695/96 */
434 REMOTE_EMERG, /* max6659 and max6695/96 */
435 REMOTE2_CRIT, /* max6695/96 only */
436 REMOTE2_EMERG, /* max6695/96 only */
437 TEMP8_REG_NUM
438};
439
440/*
441 * TEMP11 register index
442 */
443enum lm90_temp11_reg_index {
444 REMOTE_TEMP = 0,
445 REMOTE_LOW,
446 REMOTE_HIGH,
447 REMOTE_OFFSET, /* except max6646, max6657/58/59, and max6695/96 */
448 LOCAL_TEMP,
449 REMOTE2_TEMP, /* max6695/96 only */
450 REMOTE2_LOW, /* max6695/96 only */
451 REMOTE2_HIGH, /* max6695/96 only */
452 TEMP11_REG_NUM
453};
454
1da177e4
LT
455/*
456 * Client data (each client gets its own)
457 */
458
459struct lm90_data {
1de8b250 460 struct i2c_client *client;
eb1c8f43
GR
461 u32 channel_config[4];
462 struct hwmon_channel_info temp_info;
463 const struct hwmon_channel_info *info[3];
464 struct hwmon_chip_info chip;
9a61bf63 465 struct mutex update_lock;
2f83ab77 466 bool valid; /* true if register values are valid */
1da177e4
LT
467 unsigned long last_updated; /* in jiffies */
468 int kind;
4667bcb8 469 u32 flags;
1da177e4 470
38bab98a 471 unsigned int update_interval; /* in milliseconds */
0c01b644 472
95238364 473 u8 config_orig; /* Original configuration register value */
0c01b644 474 u8 convrate_orig; /* Original conversion rate register value */
06e1c0a2
GR
475 u16 alert_alarms; /* Which alarm bits trigger ALERT# */
476 /* Upper 8 bits for max6695/96 */
0c01b644 477 u8 max_convrate; /* Maximum conversion rate */
2ef01793 478 u8 reg_local_ext; /* local extension register offset */
95238364 479
1da177e4 480 /* registers values */
40465d94
WN
481 s8 temp8[TEMP8_REG_NUM];
482 s16 temp11[TEMP11_REG_NUM];
1da177e4 483 u8 temp_hyst;
06e1c0a2 484 u16 alarms; /* bitvector (upper 8 bits for max6695/96) */
1da177e4
LT
485};
486
15b66ab6
GR
487/*
488 * Support functions
489 */
490
491/*
492 * The ADM1032 supports PEC but not on write byte transactions, so we need
493 * to explicitly ask for a transaction without PEC.
494 */
495static inline s32 adm1032_write_byte(struct i2c_client *client, u8 value)
496{
497 return i2c_smbus_xfer(client->adapter, client->addr,
498 client->flags & ~I2C_CLIENT_PEC,
499 I2C_SMBUS_WRITE, value, I2C_SMBUS_BYTE, NULL);
500}
501
502/*
503 * It is assumed that client->update_lock is held (unless we are in
504 * detection or initialization steps). This matters when PEC is enabled,
505 * because we don't want the address pointer to change between the write
506 * byte and the read byte transactions.
507 */
37ad04d7 508static int lm90_read_reg(struct i2c_client *client, u8 reg)
15b66ab6
GR
509{
510 int err;
511
512 if (client->flags & I2C_CLIENT_PEC) {
513 err = adm1032_write_byte(client, reg);
514 if (err >= 0)
515 err = i2c_smbus_read_byte(client);
516 } else
517 err = i2c_smbus_read_byte_data(client, reg);
518
37ad04d7 519 return err;
15b66ab6
GR
520}
521
37ad04d7 522static int lm90_read16(struct i2c_client *client, u8 regh, u8 regl)
15b66ab6 523{
37ad04d7 524 int oldh, newh, l;
15b66ab6
GR
525
526 /*
527 * There is a trick here. We have to read two registers to have the
528 * sensor temperature, but we have to beware a conversion could occur
25985edc 529 * between the readings. The datasheet says we should either use
15b66ab6
GR
530 * the one-shot conversion register, which we don't want to do
531 * (disables hardware monitoring) or monitor the busy bit, which is
532 * impossible (we can't read the values and monitor that bit at the
533 * exact same time). So the solution used here is to read the high
534 * byte once, then the low byte, then the high byte again. If the new
535 * high byte matches the old one, then we have a valid reading. Else
536 * we have to read the low byte again, and now we believe we have a
537 * correct reading.
538 */
37ad04d7
GR
539 oldh = lm90_read_reg(client, regh);
540 if (oldh < 0)
541 return oldh;
542 l = lm90_read_reg(client, regl);
543 if (l < 0)
544 return l;
545 newh = lm90_read_reg(client, regh);
546 if (newh < 0)
547 return newh;
15b66ab6 548 if (oldh != newh) {
37ad04d7
GR
549 l = lm90_read_reg(client, regl);
550 if (l < 0)
551 return l;
15b66ab6 552 }
37ad04d7 553 return (newh << 8) | l;
15b66ab6
GR
554}
555
556/*
557 * client->update_lock must be held when calling this function (unless we are
558 * in detection or initialization steps), and while a remote channel other
559 * than channel 0 is selected. Also, calling code must make sure to re-select
560 * external channel 0 before releasing the lock. This is necessary because
561 * various registers have different meanings as a result of selecting a
562 * non-default remote channel.
563 */
37ad04d7
GR
564static inline int lm90_select_remote_channel(struct i2c_client *client,
565 struct lm90_data *data,
566 int channel)
15b66ab6 567{
37ad04d7 568 int config;
15b66ab6
GR
569
570 if (data->kind == max6696) {
37ad04d7
GR
571 config = lm90_read_reg(client, LM90_REG_R_CONFIG1);
572 if (config < 0)
573 return config;
15b66ab6
GR
574 config &= ~0x08;
575 if (channel)
576 config |= 0x08;
577 i2c_smbus_write_byte_data(client, LM90_REG_W_CONFIG1,
578 config);
579 }
37ad04d7 580 return 0;
15b66ab6
GR
581}
582
0c01b644
GR
583/*
584 * Set conversion rate.
585 * client->update_lock must be held when calling this function (unless we are
586 * in detection or initialization steps).
587 */
eb1c8f43
GR
588static int lm90_set_convrate(struct i2c_client *client, struct lm90_data *data,
589 unsigned int interval)
0c01b644 590{
0c01b644 591 unsigned int update_interval;
eb1c8f43 592 int i, err;
0c01b644
GR
593
594 /* Shift calculations to avoid rounding errors */
595 interval <<= 6;
596
597 /* find the nearest update rate */
598 for (i = 0, update_interval = LM90_MAX_CONVRATE_MS << 6;
599 i < data->max_convrate; i++, update_interval >>= 1)
600 if (interval >= update_interval * 3 / 4)
601 break;
602
eb1c8f43 603 err = i2c_smbus_write_byte_data(client, LM90_REG_W_CONVRATE, i);
0c01b644 604 data->update_interval = DIV_ROUND_CLOSEST(update_interval, 64);
eb1c8f43 605 return err;
0c01b644
GR
606}
607
10bfef47
GR
608static int lm90_update_limits(struct device *dev)
609{
610 struct lm90_data *data = dev_get_drvdata(dev);
611 struct i2c_client *client = data->client;
612 int val;
613
614 val = lm90_read_reg(client, LM90_REG_R_LOCAL_CRIT);
615 if (val < 0)
616 return val;
617 data->temp8[LOCAL_CRIT] = val;
618
619 val = lm90_read_reg(client, LM90_REG_R_REMOTE_CRIT);
620 if (val < 0)
621 return val;
622 data->temp8[REMOTE_CRIT] = val;
623
624 val = lm90_read_reg(client, LM90_REG_R_TCRIT_HYST);
625 if (val < 0)
626 return val;
627 data->temp_hyst = val;
628
be9d6374 629 val = lm90_read_reg(client, LM90_REG_R_REMOTE_LOWH);
10bfef47
GR
630 if (val < 0)
631 return val;
632 data->temp11[REMOTE_LOW] = val << 8;
633
634 if (data->flags & LM90_HAVE_REM_LIMIT_EXT) {
635 val = lm90_read_reg(client, LM90_REG_R_REMOTE_LOWL);
636 if (val < 0)
637 return val;
638 data->temp11[REMOTE_LOW] |= val;
639 }
640
641 val = lm90_read_reg(client, LM90_REG_R_REMOTE_HIGHH);
642 if (val < 0)
643 return val;
644 data->temp11[REMOTE_HIGH] = val << 8;
645
646 if (data->flags & LM90_HAVE_REM_LIMIT_EXT) {
647 val = lm90_read_reg(client, LM90_REG_R_REMOTE_HIGHL);
648 if (val < 0)
649 return val;
650 data->temp11[REMOTE_HIGH] |= val;
651 }
652
653 if (data->flags & LM90_HAVE_OFFSET) {
654 val = lm90_read16(client, LM90_REG_R_REMOTE_OFFSH,
655 LM90_REG_R_REMOTE_OFFSL);
656 if (val < 0)
657 return val;
658 data->temp11[REMOTE_OFFSET] = val;
659 }
660
661 if (data->flags & LM90_HAVE_EMERGENCY) {
662 val = lm90_read_reg(client, MAX6659_REG_R_LOCAL_EMERG);
663 if (val < 0)
664 return val;
665 data->temp8[LOCAL_EMERG] = val;
666
667 val = lm90_read_reg(client, MAX6659_REG_R_REMOTE_EMERG);
668 if (val < 0)
669 return val;
670 data->temp8[REMOTE_EMERG] = val;
671 }
672
673 if (data->kind == max6696) {
674 val = lm90_select_remote_channel(client, data, 1);
675 if (val < 0)
676 return val;
677
678 val = lm90_read_reg(client, LM90_REG_R_REMOTE_CRIT);
679 if (val < 0)
680 return val;
681 data->temp8[REMOTE2_CRIT] = val;
682
683 val = lm90_read_reg(client, MAX6659_REG_R_REMOTE_EMERG);
684 if (val < 0)
685 return val;
686 data->temp8[REMOTE2_EMERG] = val;
687
688 val = lm90_read_reg(client, LM90_REG_R_REMOTE_LOWH);
689 if (val < 0)
690 return val;
691 data->temp11[REMOTE2_LOW] = val << 8;
692
693 val = lm90_read_reg(client, LM90_REG_R_REMOTE_HIGHH);
694 if (val < 0)
695 return val;
696 data->temp11[REMOTE2_HIGH] = val << 8;
697
698 lm90_select_remote_channel(client, data, 0);
699 }
700
701 return 0;
702}
703
eb1c8f43 704static int lm90_update_device(struct device *dev)
15b66ab6 705{
1de8b250
GR
706 struct lm90_data *data = dev_get_drvdata(dev);
707 struct i2c_client *client = data->client;
0c01b644 708 unsigned long next_update;
eb1c8f43 709 int val;
15b66ab6 710
10bfef47
GR
711 if (!data->valid) {
712 val = lm90_update_limits(dev);
713 if (val < 0)
eb1c8f43 714 return val;
10bfef47
GR
715 }
716
78c2c2fe
JD
717 next_update = data->last_updated +
718 msecs_to_jiffies(data->update_interval);
0c01b644 719 if (time_after(jiffies, next_update) || !data->valid) {
15b66ab6 720 dev_dbg(&client->dev, "Updating lm90 data.\n");
10bfef47 721
2f83ab77 722 data->valid = false;
10bfef47 723
37ad04d7
GR
724 val = lm90_read_reg(client, LM90_REG_R_LOCAL_LOW);
725 if (val < 0)
eb1c8f43 726 return val;
37ad04d7
GR
727 data->temp8[LOCAL_LOW] = val;
728
729 val = lm90_read_reg(client, LM90_REG_R_LOCAL_HIGH);
730 if (val < 0)
eb1c8f43 731 return val;
37ad04d7
GR
732 data->temp8[LOCAL_HIGH] = val;
733
a095f687 734 if (data->reg_local_ext) {
37ad04d7
GR
735 val = lm90_read16(client, LM90_REG_R_LOCAL_TEMP,
736 data->reg_local_ext);
737 if (val < 0)
eb1c8f43 738 return val;
37ad04d7 739 data->temp11[LOCAL_TEMP] = val;
15b66ab6 740 } else {
37ad04d7
GR
741 val = lm90_read_reg(client, LM90_REG_R_LOCAL_TEMP);
742 if (val < 0)
eb1c8f43 743 return val;
37ad04d7 744 data->temp11[LOCAL_TEMP] = val << 8;
15b66ab6 745 }
37ad04d7
GR
746 val = lm90_read16(client, LM90_REG_R_REMOTE_TEMPH,
747 LM90_REG_R_REMOTE_TEMPL);
748 if (val < 0)
eb1c8f43 749 return val;
37ad04d7
GR
750 data->temp11[REMOTE_TEMP] = val;
751
37ad04d7
GR
752 val = lm90_read_reg(client, LM90_REG_R_STATUS);
753 if (val < 0)
eb1c8f43 754 return val;
37ad04d7 755 data->alarms = val; /* lower 8 bit of alarms */
15b66ab6
GR
756
757 if (data->kind == max6696) {
37ad04d7
GR
758 val = lm90_select_remote_channel(client, data, 1);
759 if (val < 0)
eb1c8f43 760 return val;
37ad04d7 761
37ad04d7
GR
762 val = lm90_read16(client, LM90_REG_R_REMOTE_TEMPH,
763 LM90_REG_R_REMOTE_TEMPL);
eb1c8f43
GR
764 if (val < 0) {
765 lm90_select_remote_channel(client, data, 0);
766 return val;
767 }
37ad04d7
GR
768 data->temp11[REMOTE2_TEMP] = val;
769
15b66ab6
GR
770 lm90_select_remote_channel(client, data, 0);
771
37ad04d7
GR
772 val = lm90_read_reg(client, MAX6696_REG_R_STATUS2);
773 if (val < 0)
eb1c8f43 774 return val;
37ad04d7 775 data->alarms |= val << 8;
15b66ab6
GR
776 }
777
f36ffeab
GR
778 /*
779 * Re-enable ALERT# output if it was originally enabled and
780 * relevant alarms are all clear
781 */
37ad04d7
GR
782 if (!(data->config_orig & 0x80) &&
783 !(data->alarms & data->alert_alarms)) {
784 val = lm90_read_reg(client, LM90_REG_R_CONFIG1);
785 if (val < 0)
eb1c8f43 786 return val;
15b66ab6 787
37ad04d7 788 if (val & 0x80) {
15b66ab6
GR
789 dev_dbg(&client->dev, "Re-enabling ALERT#\n");
790 i2c_smbus_write_byte_data(client,
791 LM90_REG_W_CONFIG1,
37ad04d7 792 val & ~0x80);
15b66ab6
GR
793 }
794 }
795
796 data->last_updated = jiffies;
2f83ab77 797 data->valid = true;
15b66ab6
GR
798 }
799
eb1c8f43 800 return 0;
15b66ab6
GR
801}
802
cea50fe2
NC
803/*
804 * Conversions
805 * For local temperatures and limits, critical limits and the hysteresis
806 * value, the LM90 uses signed 8-bit values with LSB = 1 degree Celsius.
807 * For remote temperatures and limits, it uses signed 11-bit values with
271dabf5
BH
808 * LSB = 0.125 degree Celsius, left-justified in 16-bit registers. Some
809 * Maxim chips use unsigned values.
cea50fe2
NC
810 */
811
9d4d3834 812static inline int temp_from_s8(s8 val)
cea50fe2
NC
813{
814 return val * 1000;
815}
816
271dabf5
BH
817static inline int temp_from_u8(u8 val)
818{
819 return val * 1000;
820}
821
9d4d3834 822static inline int temp_from_s16(s16 val)
cea50fe2
NC
823{
824 return val / 32 * 125;
825}
826
271dabf5
BH
827static inline int temp_from_u16(u16 val)
828{
829 return val / 32 * 125;
830}
831
9d4d3834 832static s8 temp_to_s8(long val)
cea50fe2
NC
833{
834 if (val <= -128000)
835 return -128;
836 if (val >= 127000)
837 return 127;
838 if (val < 0)
839 return (val - 500) / 1000;
840 return (val + 500) / 1000;
841}
842
271dabf5
BH
843static u8 temp_to_u8(long val)
844{
845 if (val <= 0)
846 return 0;
847 if (val >= 255000)
848 return 255;
849 return (val + 500) / 1000;
850}
851
9d4d3834 852static s16 temp_to_s16(long val)
cea50fe2
NC
853{
854 if (val <= -128000)
855 return 0x8000;
856 if (val >= 127875)
857 return 0x7FE0;
858 if (val < 0)
859 return (val - 62) / 125 * 32;
860 return (val + 62) / 125 * 32;
861}
862
863static u8 hyst_to_reg(long val)
864{
865 if (val <= 0)
866 return 0;
867 if (val >= 30500)
868 return 31;
869 return (val + 500) / 1000;
870}
871
872/*
23b2d477
NC
873 * ADT7461 in compatibility mode is almost identical to LM90 except that
874 * attempts to write values that are outside the range 0 < temp < 127 are
875 * treated as the boundary value.
876 *
877 * ADT7461 in "extended mode" operation uses unsigned integers offset by
878 * 64 (e.g., 0 -> -64 degC). The range is restricted to -64..191 degC.
cea50fe2 879 */
9d4d3834 880static inline int temp_from_u8_adt7461(struct lm90_data *data, u8 val)
cea50fe2 881{
23b2d477
NC
882 if (data->flags & LM90_FLAG_ADT7461_EXT)
883 return (val - 64) * 1000;
589f707c 884 return temp_from_s8(val);
cea50fe2
NC
885}
886
9d4d3834 887static inline int temp_from_u16_adt7461(struct lm90_data *data, u16 val)
cea50fe2 888{
23b2d477
NC
889 if (data->flags & LM90_FLAG_ADT7461_EXT)
890 return (val - 0x4000) / 64 * 250;
589f707c 891 return temp_from_s16(val);
23b2d477
NC
892}
893
9d4d3834 894static u8 temp_to_u8_adt7461(struct lm90_data *data, long val)
23b2d477
NC
895{
896 if (data->flags & LM90_FLAG_ADT7461_EXT) {
897 if (val <= -64000)
898 return 0;
899 if (val >= 191000)
900 return 0xFF;
901 return (val + 500 + 64000) / 1000;
23b2d477 902 }
589f707c
GR
903 if (val <= 0)
904 return 0;
905 if (val >= 127000)
906 return 127;
907 return (val + 500) / 1000;
23b2d477
NC
908}
909
9d4d3834 910static u16 temp_to_u16_adt7461(struct lm90_data *data, long val)
23b2d477
NC
911{
912 if (data->flags & LM90_FLAG_ADT7461_EXT) {
913 if (val <= -64000)
914 return 0;
915 if (val >= 191750)
916 return 0xFFC0;
917 return (val + 64000 + 125) / 250 * 64;
23b2d477 918 }
589f707c
GR
919 if (val <= 0)
920 return 0;
921 if (val >= 127750)
922 return 0x7FC0;
923 return (val + 125) / 250 * 64;
cea50fe2
NC
924}
925
eb1c8f43 926/* pec used for ADM1032 only */
e57959a6 927static ssize_t pec_show(struct device *dev, struct device_attribute *dummy,
eb1c8f43 928 char *buf)
30d7394b 929{
eb1c8f43 930 struct i2c_client *client = to_i2c_client(dev);
97ae60bb 931
eb1c8f43 932 return sprintf(buf, "%d\n", !!(client->flags & I2C_CLIENT_PEC));
30d7394b
JD
933}
934
e57959a6
JL
935static ssize_t pec_store(struct device *dev, struct device_attribute *dummy,
936 const char *buf, size_t count)
30d7394b 937{
eb1c8f43 938 struct i2c_client *client = to_i2c_client(dev);
11e57812
GR
939 long val;
940 int err;
941
179c4fdb 942 err = kstrtol(buf, 10, &val);
11e57812
GR
943 if (err < 0)
944 return err;
30d7394b 945
eb1c8f43
GR
946 switch (val) {
947 case 0:
948 client->flags &= ~I2C_CLIENT_PEC;
949 break;
950 case 1:
951 client->flags |= I2C_CLIENT_PEC;
952 break;
953 default:
954 return -EINVAL;
955 }
06e1c0a2 956
30d7394b 957 return count;
1da177e4 958}
30d7394b 959
e57959a6 960static DEVICE_ATTR_RW(pec);
eb1c8f43
GR
961
962static int lm90_get_temp11(struct lm90_data *data, int index)
30d7394b 963{
eb1c8f43 964 s16 temp11 = data->temp11[index];
23b2d477
NC
965 int temp;
966
1daaceb2 967 if (data->kind == adt7461 || data->kind == tmp451)
eb1c8f43 968 temp = temp_from_u16_adt7461(data, temp11);
271dabf5 969 else if (data->kind == max6646)
eb1c8f43 970 temp = temp_from_u16(temp11);
23b2d477 971 else
eb1c8f43 972 temp = temp_from_s16(temp11);
23b2d477 973
97ae60bb 974 /* +16 degrees offset for temp2 for the LM99 */
eb1c8f43 975 if (data->kind == lm99 && index <= 2)
97ae60bb
JD
976 temp += 16000;
977
eb1c8f43 978 return temp;
1da177e4 979}
30d7394b 980
eb1c8f43 981static int lm90_set_temp11(struct lm90_data *data, int index, long val)
30d7394b 982{
eb1c8f43 983 static struct reg {
96512861
GR
984 u8 high;
985 u8 low;
eb1c8f43
GR
986 } reg[] = {
987 [REMOTE_LOW] = { LM90_REG_W_REMOTE_LOWH, LM90_REG_W_REMOTE_LOWL },
988 [REMOTE_HIGH] = { LM90_REG_W_REMOTE_HIGHH, LM90_REG_W_REMOTE_HIGHL },
989 [REMOTE_OFFSET] = { LM90_REG_W_REMOTE_OFFSH, LM90_REG_W_REMOTE_OFFSL },
990 [REMOTE2_LOW] = { LM90_REG_W_REMOTE_LOWH, LM90_REG_W_REMOTE_LOWL },
991 [REMOTE2_HIGH] = { LM90_REG_W_REMOTE_HIGHH, LM90_REG_W_REMOTE_HIGHL }
30d7394b 992 };
1de8b250 993 struct i2c_client *client = data->client;
eb1c8f43 994 struct reg *regp = &reg[index];
11e57812
GR
995 int err;
996
97ae60bb 997 /* +16 degrees offset for temp2 for the LM99 */
96512861 998 if (data->kind == lm99 && index <= 2)
97ae60bb
JD
999 val -= 16000;
1000
1daaceb2 1001 if (data->kind == adt7461 || data->kind == tmp451)
96512861 1002 data->temp11[index] = temp_to_u16_adt7461(data, val);
271dabf5 1003 else if (data->kind == max6646)
96512861 1004 data->temp11[index] = temp_to_u8(val) << 8;
88073bb1 1005 else if (data->flags & LM90_HAVE_REM_LIMIT_EXT)
96512861 1006 data->temp11[index] = temp_to_s16(val);
88073bb1 1007 else
96512861 1008 data->temp11[index] = temp_to_s8(val) << 8;
5f502a83 1009
eb1c8f43
GR
1010 lm90_select_remote_channel(client, data, index >= 3);
1011 err = i2c_smbus_write_byte_data(client, regp->high,
96512861 1012 data->temp11[index] >> 8);
eb1c8f43
GR
1013 if (err < 0)
1014 return err;
88073bb1 1015 if (data->flags & LM90_HAVE_REM_LIMIT_EXT)
eb1c8f43
GR
1016 err = i2c_smbus_write_byte_data(client, regp->low,
1017 data->temp11[index] & 0xff);
06e1c0a2 1018
eb1c8f43
GR
1019 lm90_select_remote_channel(client, data, 0);
1020 return err;
1da177e4 1021}
30d7394b 1022
eb1c8f43 1023static int lm90_get_temp8(struct lm90_data *data, int index)
30d7394b 1024{
eb1c8f43 1025 s8 temp8 = data->temp8[index];
23b2d477
NC
1026 int temp;
1027
1daaceb2 1028 if (data->kind == adt7461 || data->kind == tmp451)
eb1c8f43 1029 temp = temp_from_u8_adt7461(data, temp8);
ec38fa2b 1030 else if (data->kind == max6646)
eb1c8f43 1031 temp = temp_from_u8(temp8);
23b2d477 1032 else
eb1c8f43 1033 temp = temp_from_s8(temp8);
23b2d477 1034
97ae60bb 1035 /* +16 degrees offset for temp2 for the LM99 */
eb1c8f43 1036 if (data->kind == lm99 && index == 3)
97ae60bb
JD
1037 temp += 16000;
1038
eb1c8f43 1039 return temp;
1da177e4 1040}
1da177e4 1041
eb1c8f43 1042static int lm90_set_temp8(struct lm90_data *data, int index, long val)
1da177e4 1043{
eb1c8f43
GR
1044 static const u8 reg[TEMP8_REG_NUM] = {
1045 LM90_REG_W_LOCAL_LOW,
1046 LM90_REG_W_LOCAL_HIGH,
1047 LM90_REG_W_LOCAL_CRIT,
1048 LM90_REG_W_REMOTE_CRIT,
1049 MAX6659_REG_W_LOCAL_EMERG,
1050 MAX6659_REG_W_REMOTE_EMERG,
1051 LM90_REG_W_REMOTE_CRIT,
1052 MAX6659_REG_W_REMOTE_EMERG,
1053 };
1de8b250 1054 struct i2c_client *client = data->client;
11e57812 1055 int err;
1da177e4 1056
eb1c8f43
GR
1057 /* +16 degrees offset for temp2 for the LM99 */
1058 if (data->kind == lm99 && index == 3)
1059 val -= 16000;
11e57812 1060
1daaceb2 1061 if (data->kind == adt7461 || data->kind == tmp451)
eb1c8f43 1062 data->temp8[index] = temp_to_u8_adt7461(data, val);
ec38fa2b 1063 else if (data->kind == max6646)
eb1c8f43 1064 data->temp8[index] = temp_to_u8(val);
ec38fa2b 1065 else
eb1c8f43 1066 data->temp8[index] = temp_to_s8(val);
ec38fa2b 1067
eb1c8f43
GR
1068 lm90_select_remote_channel(client, data, index >= 6);
1069 err = i2c_smbus_write_byte_data(client, reg[index], data->temp8[index]);
1070 lm90_select_remote_channel(client, data, 0);
37ad04d7 1071
eb1c8f43 1072 return err;
1da177e4
LT
1073}
1074
eb1c8f43 1075static int lm90_get_temphyst(struct lm90_data *data, int index)
2d45771e 1076{
eb1c8f43 1077 int temp;
37ad04d7 1078
eb1c8f43
GR
1079 if (data->kind == adt7461 || data->kind == tmp451)
1080 temp = temp_from_u8_adt7461(data, data->temp8[index]);
1081 else if (data->kind == max6646)
1082 temp = temp_from_u8(data->temp8[index]);
1083 else
1084 temp = temp_from_s8(data->temp8[index]);
2d45771e 1085
eb1c8f43
GR
1086 /* +16 degrees offset for temp2 for the LM99 */
1087 if (data->kind == lm99 && index == 3)
1088 temp += 16000;
0c01b644 1089
eb1c8f43 1090 return temp - temp_from_s8(data->temp_hyst);
0c01b644
GR
1091}
1092
eb1c8f43 1093static int lm90_set_temphyst(struct lm90_data *data, long val)
0c01b644 1094{
1de8b250 1095 struct i2c_client *client = data->client;
eb1c8f43 1096 int temp;
0c01b644
GR
1097 int err;
1098
eb1c8f43
GR
1099 if (data->kind == adt7461 || data->kind == tmp451)
1100 temp = temp_from_u8_adt7461(data, data->temp8[LOCAL_CRIT]);
1101 else if (data->kind == max6646)
1102 temp = temp_from_u8(data->temp8[LOCAL_CRIT]);
1103 else
1104 temp = temp_from_s8(data->temp8[LOCAL_CRIT]);
0c01b644 1105
eb1c8f43
GR
1106 data->temp_hyst = hyst_to_reg(temp - val);
1107 err = i2c_smbus_write_byte_data(client, LM90_REG_W_TCRIT_HYST,
1108 data->temp_hyst);
1109 return err;
0c01b644
GR
1110}
1111
eb1c8f43
GR
1112static const u8 lm90_temp_index[3] = {
1113 LOCAL_TEMP, REMOTE_TEMP, REMOTE2_TEMP
0e39e01c
JD
1114};
1115
eb1c8f43
GR
1116static const u8 lm90_temp_min_index[3] = {
1117 LOCAL_LOW, REMOTE_LOW, REMOTE2_LOW
0e39e01c
JD
1118};
1119
eb1c8f43
GR
1120static const u8 lm90_temp_max_index[3] = {
1121 LOCAL_HIGH, REMOTE_HIGH, REMOTE2_HIGH
742192f5
GR
1122};
1123
eb1c8f43
GR
1124static const u8 lm90_temp_crit_index[3] = {
1125 LOCAL_CRIT, REMOTE_CRIT, REMOTE2_CRIT
742192f5
GR
1126};
1127
eb1c8f43
GR
1128static const u8 lm90_temp_emerg_index[3] = {
1129 LOCAL_EMERG, REMOTE_EMERG, REMOTE2_EMERG
6948708d
GR
1130};
1131
eb1c8f43 1132static const u8 lm90_min_alarm_bits[3] = { 5, 3, 11 };
e9572fdd 1133static const u8 lm90_max_alarm_bits[3] = { 6, 4, 12 };
eb1c8f43
GR
1134static const u8 lm90_crit_alarm_bits[3] = { 0, 1, 9 };
1135static const u8 lm90_emergency_alarm_bits[3] = { 15, 13, 14 };
1136static const u8 lm90_fault_bits[3] = { 0, 2, 10 };
6948708d 1137
eb1c8f43
GR
1138static int lm90_temp_read(struct device *dev, u32 attr, int channel, long *val)
1139{
1140 struct lm90_data *data = dev_get_drvdata(dev);
1141 int err;
06e1c0a2 1142
eb1c8f43
GR
1143 mutex_lock(&data->update_lock);
1144 err = lm90_update_device(dev);
1145 mutex_unlock(&data->update_lock);
1146 if (err)
1147 return err;
06e1c0a2 1148
eb1c8f43
GR
1149 switch (attr) {
1150 case hwmon_temp_input:
1151 *val = lm90_get_temp11(data, lm90_temp_index[channel]);
1152 break;
1153 case hwmon_temp_min_alarm:
1154 *val = (data->alarms >> lm90_min_alarm_bits[channel]) & 1;
1155 break;
1156 case hwmon_temp_max_alarm:
1157 *val = (data->alarms >> lm90_max_alarm_bits[channel]) & 1;
1158 break;
1159 case hwmon_temp_crit_alarm:
1160 *val = (data->alarms >> lm90_crit_alarm_bits[channel]) & 1;
1161 break;
1162 case hwmon_temp_emergency_alarm:
1163 *val = (data->alarms >> lm90_emergency_alarm_bits[channel]) & 1;
1164 break;
1165 case hwmon_temp_fault:
1166 *val = (data->alarms >> lm90_fault_bits[channel]) & 1;
1167 break;
1168 case hwmon_temp_min:
1169 if (channel == 0)
1170 *val = lm90_get_temp8(data,
1171 lm90_temp_min_index[channel]);
1172 else
1173 *val = lm90_get_temp11(data,
1174 lm90_temp_min_index[channel]);
1175 break;
1176 case hwmon_temp_max:
1177 if (channel == 0)
1178 *val = lm90_get_temp8(data,
1179 lm90_temp_max_index[channel]);
1180 else
1181 *val = lm90_get_temp11(data,
1182 lm90_temp_max_index[channel]);
1183 break;
1184 case hwmon_temp_crit:
1185 *val = lm90_get_temp8(data, lm90_temp_crit_index[channel]);
1186 break;
1187 case hwmon_temp_crit_hyst:
1188 *val = lm90_get_temphyst(data, lm90_temp_crit_index[channel]);
1189 break;
1190 case hwmon_temp_emergency:
1191 *val = lm90_get_temp8(data, lm90_temp_emerg_index[channel]);
1192 break;
1193 case hwmon_temp_emergency_hyst:
1194 *val = lm90_get_temphyst(data, lm90_temp_emerg_index[channel]);
1195 break;
1196 case hwmon_temp_offset:
1197 *val = lm90_get_temp11(data, REMOTE_OFFSET);
1198 break;
1199 default:
1200 return -EOPNOTSUPP;
1201 }
1202 return 0;
1203}
06e1c0a2 1204
eb1c8f43
GR
1205static int lm90_temp_write(struct device *dev, u32 attr, int channel, long val)
1206{
1207 struct lm90_data *data = dev_get_drvdata(dev);
1208 int err;
06e1c0a2 1209
eb1c8f43 1210 mutex_lock(&data->update_lock);
06e1c0a2 1211
eb1c8f43
GR
1212 err = lm90_update_device(dev);
1213 if (err)
1214 goto error;
1215
1216 switch (attr) {
1217 case hwmon_temp_min:
1218 if (channel == 0)
1219 err = lm90_set_temp8(data,
1220 lm90_temp_min_index[channel],
1221 val);
1222 else
1223 err = lm90_set_temp11(data,
1224 lm90_temp_min_index[channel],
1225 val);
1226 break;
1227 case hwmon_temp_max:
1228 if (channel == 0)
1229 err = lm90_set_temp8(data,
1230 lm90_temp_max_index[channel],
1231 val);
1232 else
1233 err = lm90_set_temp11(data,
1234 lm90_temp_max_index[channel],
1235 val);
1236 break;
1237 case hwmon_temp_crit:
1238 err = lm90_set_temp8(data, lm90_temp_crit_index[channel], val);
1239 break;
1240 case hwmon_temp_crit_hyst:
1241 err = lm90_set_temphyst(data, val);
1242 break;
1243 case hwmon_temp_emergency:
1244 err = lm90_set_temp8(data, lm90_temp_emerg_index[channel], val);
1245 break;
1246 case hwmon_temp_offset:
1247 err = lm90_set_temp11(data, REMOTE_OFFSET, val);
1248 break;
1249 default:
1250 err = -EOPNOTSUPP;
1251 break;
1252 }
1253error:
1254 mutex_unlock(&data->update_lock);
1255
1256 return err;
1257}
1258
1259static umode_t lm90_temp_is_visible(const void *data, u32 attr, int channel)
c3df5806 1260{
eb1c8f43
GR
1261 switch (attr) {
1262 case hwmon_temp_input:
1263 case hwmon_temp_min_alarm:
1264 case hwmon_temp_max_alarm:
1265 case hwmon_temp_crit_alarm:
1266 case hwmon_temp_emergency_alarm:
1267 case hwmon_temp_emergency_hyst:
1268 case hwmon_temp_fault:
1269 return S_IRUGO;
1270 case hwmon_temp_min:
1271 case hwmon_temp_max:
1272 case hwmon_temp_crit:
1273 case hwmon_temp_emergency:
1274 case hwmon_temp_offset:
1275 return S_IRUGO | S_IWUSR;
1276 case hwmon_temp_crit_hyst:
1277 if (channel == 0)
1278 return S_IRUGO | S_IWUSR;
1279 return S_IRUGO;
1280 default:
1281 return 0;
1282 }
c3df5806
JD
1283}
1284
eb1c8f43 1285static int lm90_chip_read(struct device *dev, u32 attr, int channel, long *val)
c3df5806 1286{
eb1c8f43 1287 struct lm90_data *data = dev_get_drvdata(dev);
11e57812
GR
1288 int err;
1289
eb1c8f43
GR
1290 mutex_lock(&data->update_lock);
1291 err = lm90_update_device(dev);
1292 mutex_unlock(&data->update_lock);
1293 if (err)
11e57812 1294 return err;
c3df5806 1295
eb1c8f43
GR
1296 switch (attr) {
1297 case hwmon_chip_update_interval:
1298 *val = data->update_interval;
c3df5806 1299 break;
eb1c8f43
GR
1300 case hwmon_chip_alarms:
1301 *val = data->alarms;
c3df5806
JD
1302 break;
1303 default:
eb1c8f43 1304 return -EOPNOTSUPP;
c3df5806
JD
1305 }
1306
eb1c8f43 1307 return 0;
c3df5806
JD
1308}
1309
eb1c8f43
GR
1310static int lm90_chip_write(struct device *dev, u32 attr, int channel, long val)
1311{
1312 struct lm90_data *data = dev_get_drvdata(dev);
1313 struct i2c_client *client = data->client;
1314 int err;
c3df5806 1315
eb1c8f43
GR
1316 mutex_lock(&data->update_lock);
1317
1318 err = lm90_update_device(dev);
1319 if (err)
1320 goto error;
1321
1322 switch (attr) {
1323 case hwmon_chip_update_interval:
1324 err = lm90_set_convrate(client, data,
1325 clamp_val(val, 0, 100000));
1326 break;
1327 default:
1328 err = -EOPNOTSUPP;
1329 break;
1330 }
1331error:
1332 mutex_unlock(&data->update_lock);
1333
1334 return err;
1335}
1336
1337static umode_t lm90_chip_is_visible(const void *data, u32 attr, int channel)
1338{
1339 switch (attr) {
1340 case hwmon_chip_update_interval:
1341 return S_IRUGO | S_IWUSR;
1342 case hwmon_chip_alarms:
1343 return S_IRUGO;
1344 default:
1345 return 0;
1346 }
1347}
1348
1349static int lm90_read(struct device *dev, enum hwmon_sensor_types type,
1350 u32 attr, int channel, long *val)
1351{
1352 switch (type) {
1353 case hwmon_chip:
1354 return lm90_chip_read(dev, attr, channel, val);
1355 case hwmon_temp:
1356 return lm90_temp_read(dev, attr, channel, val);
1357 default:
1358 return -EOPNOTSUPP;
1359 }
1360}
1361
1362static int lm90_write(struct device *dev, enum hwmon_sensor_types type,
1363 u32 attr, int channel, long val)
1364{
1365 switch (type) {
1366 case hwmon_chip:
1367 return lm90_chip_write(dev, attr, channel, val);
1368 case hwmon_temp:
1369 return lm90_temp_write(dev, attr, channel, val);
1370 default:
1371 return -EOPNOTSUPP;
1372 }
1373}
1374
1375static umode_t lm90_is_visible(const void *data, enum hwmon_sensor_types type,
1376 u32 attr, int channel)
1377{
1378 switch (type) {
1379 case hwmon_chip:
1380 return lm90_chip_is_visible(data, attr, channel);
1381 case hwmon_temp:
1382 return lm90_temp_is_visible(data, attr, channel);
1383 default:
1384 return 0;
1385 }
1386}
1da177e4 1387
15b66ab6 1388/* Return 0 if detection is successful, -ENODEV otherwise */
b2589ab0 1389static int lm90_detect(struct i2c_client *client,
15b66ab6 1390 struct i2c_board_info *info)
8256fe0f 1391{
b2589ab0
JD
1392 struct i2c_adapter *adapter = client->adapter;
1393 int address = client->addr;
15b66ab6 1394 const char *name = NULL;
b2589ab0 1395 int man_id, chip_id, config1, config2, convrate;
8256fe0f 1396
15b66ab6
GR
1397 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1398 return -ENODEV;
1da177e4 1399
8f2fa77c 1400 /* detection and identification */
b2589ab0
JD
1401 man_id = i2c_smbus_read_byte_data(client, LM90_REG_R_MAN_ID);
1402 chip_id = i2c_smbus_read_byte_data(client, LM90_REG_R_CHIP_ID);
1403 config1 = i2c_smbus_read_byte_data(client, LM90_REG_R_CONFIG1);
1404 convrate = i2c_smbus_read_byte_data(client, LM90_REG_R_CONVRATE);
1405 if (man_id < 0 || chip_id < 0 || config1 < 0 || convrate < 0)
8f2fa77c
JD
1406 return -ENODEV;
1407
f90be42f 1408 if (man_id == 0x01 || man_id == 0x5C || man_id == 0x41) {
b2589ab0
JD
1409 config2 = i2c_smbus_read_byte_data(client, LM90_REG_R_CONFIG2);
1410 if (config2 < 0)
9b0e8526 1411 return -ENODEV;
f90be42f 1412 } else
b2589ab0 1413 config2 = 0; /* Make compiler happy */
8f2fa77c 1414
f90be42f
JD
1415 if ((address == 0x4C || address == 0x4D)
1416 && man_id == 0x01) { /* National Semiconductor */
b2589ab0
JD
1417 if ((config1 & 0x2A) == 0x00
1418 && (config2 & 0xF8) == 0x00
1419 && convrate <= 0x09) {
8f2fa77c
JD
1420 if (address == 0x4C
1421 && (chip_id & 0xF0) == 0x20) { /* LM90 */
1422 name = "lm90";
32c82a93 1423 } else
8f2fa77c
JD
1424 if ((chip_id & 0xF0) == 0x30) { /* LM89/LM99 */
1425 name = "lm99";
1426 dev_info(&adapter->dev,
1427 "Assuming LM99 chip at 0x%02x\n",
1428 address);
1429 dev_info(&adapter->dev,
1430 "If it is an LM89, instantiate it "
1431 "with the new_device sysfs "
1432 "interface\n");
271dabf5 1433 } else
8f2fa77c
JD
1434 if (address == 0x4C
1435 && (chip_id & 0xF0) == 0x10) { /* LM86 */
1436 name = "lm86";
1da177e4
LT
1437 }
1438 }
8f2fa77c
JD
1439 } else
1440 if ((address == 0x4C || address == 0x4D)
1441 && man_id == 0x41) { /* Analog Devices */
1442 if ((chip_id & 0xF0) == 0x40 /* ADM1032 */
b2589ab0
JD
1443 && (config1 & 0x3F) == 0x00
1444 && convrate <= 0x0A) {
8f2fa77c 1445 name = "adm1032";
f36ffeab
GR
1446 /*
1447 * The ADM1032 supports PEC, but only if combined
1448 * transactions are not used.
1449 */
8f2fa77c
JD
1450 if (i2c_check_functionality(adapter,
1451 I2C_FUNC_SMBUS_BYTE))
1452 info->flags |= I2C_CLIENT_PEC;
1453 } else
1454 if (chip_id == 0x51 /* ADT7461 */
b2589ab0
JD
1455 && (config1 & 0x1B) == 0x00
1456 && convrate <= 0x0A) {
8f2fa77c 1457 name = "adt7461";
5a4e5e6a
GR
1458 } else
1459 if (chip_id == 0x57 /* ADT7461A, NCT1008 */
b2589ab0
JD
1460 && (config1 & 0x1B) == 0x00
1461 && convrate <= 0x0A) {
5a4e5e6a 1462 name = "adt7461a";
8f2fa77c
JD
1463 }
1464 } else
1465 if (man_id == 0x4D) { /* Maxim */
b2589ab0 1466 int emerg, emerg2, status2;
06e1c0a2
GR
1467
1468 /*
1469 * We read MAX6659_REG_R_REMOTE_EMERG twice, and re-read
1470 * LM90_REG_R_MAN_ID in between. If MAX6659_REG_R_REMOTE_EMERG
1471 * exists, both readings will reflect the same value. Otherwise,
1472 * the readings will be different.
1473 */
b2589ab0
JD
1474 emerg = i2c_smbus_read_byte_data(client,
1475 MAX6659_REG_R_REMOTE_EMERG);
1476 man_id = i2c_smbus_read_byte_data(client,
8dc089d6 1477 LM90_REG_R_MAN_ID);
b2589ab0 1478 emerg2 = i2c_smbus_read_byte_data(client,
8dc089d6 1479 MAX6659_REG_R_REMOTE_EMERG);
b2589ab0
JD
1480 status2 = i2c_smbus_read_byte_data(client,
1481 MAX6696_REG_R_STATUS2);
1482 if (emerg < 0 || man_id < 0 || emerg2 < 0 || status2 < 0)
06e1c0a2
GR
1483 return -ENODEV;
1484
8f2fa77c
JD
1485 /*
1486 * The MAX6657, MAX6658 and MAX6659 do NOT have a chip_id
1487 * register. Reading from that address will return the last
1488 * read value, which in our case is those of the man_id
1489 * register. Likewise, the config1 register seems to lack a
1490 * low nibble, so the value will be those of the previous
1491 * read, so in our case those of the man_id register.
13c84951
GR
1492 * MAX6659 has a third set of upper temperature limit registers.
1493 * Those registers also return values on MAX6657 and MAX6658,
1494 * thus the only way to detect MAX6659 is by its address.
1495 * For this reason it will be mis-detected as MAX6657 if its
1496 * address is 0x4C.
8f2fa77c
JD
1497 */
1498 if (chip_id == man_id
13c84951 1499 && (address == 0x4C || address == 0x4D || address == 0x4E)
b2589ab0
JD
1500 && (config1 & 0x1F) == (man_id & 0x0F)
1501 && convrate <= 0x09) {
13c84951
GR
1502 if (address == 0x4C)
1503 name = "max6657";
1504 else
1505 name = "max6659";
8f2fa77c 1506 } else
06e1c0a2
GR
1507 /*
1508 * Even though MAX6695 and MAX6696 do not have a chip ID
1509 * register, reading it returns 0x01. Bit 4 of the config1
1510 * register is unused and should return zero when read. Bit 0 of
1511 * the status2 register is unused and should return zero when
1512 * read.
1513 *
1514 * MAX6695 and MAX6696 have an additional set of temperature
1515 * limit registers. We can detect those chips by checking if
1516 * one of those registers exists.
1517 */
1518 if (chip_id == 0x01
b2589ab0
JD
1519 && (config1 & 0x10) == 0x00
1520 && (status2 & 0x01) == 0x00
1521 && emerg == emerg2
1522 && convrate <= 0x07) {
06e1c0a2
GR
1523 name = "max6696";
1524 } else
8f2fa77c
JD
1525 /*
1526 * The chip_id register of the MAX6680 and MAX6681 holds the
1527 * revision of the chip. The lowest bit of the config1 register
1528 * is unused and should return zero when read, so should the
1529 * second to last bit of config1 (software reset).
1530 */
1531 if (chip_id == 0x01
b2589ab0
JD
1532 && (config1 & 0x03) == 0x00
1533 && convrate <= 0x07) {
8f2fa77c
JD
1534 name = "max6680";
1535 } else
1536 /*
1537 * The chip_id register of the MAX6646/6647/6649 holds the
1538 * revision of the chip. The lowest 6 bits of the config1
1539 * register are unused and should return zero when read.
1540 */
1541 if (chip_id == 0x59
b2589ab0
JD
1542 && (config1 & 0x3f) == 0x00
1543 && convrate <= 0x07) {
8f2fa77c 1544 name = "max6646";
1da177e4 1545 }
6771ea1f
JD
1546 } else
1547 if (address == 0x4C
1548 && man_id == 0x5C) { /* Winbond/Nuvoton */
b2589ab0
JD
1549 if ((config1 & 0x2A) == 0x00
1550 && (config2 & 0xF8) == 0x00) {
c4f99a2b 1551 if (chip_id == 0x01 /* W83L771W/G */
b2589ab0 1552 && convrate <= 0x09) {
c4f99a2b
JD
1553 name = "w83l771";
1554 } else
1555 if ((chip_id & 0xFE) == 0x10 /* W83L771AWG/ASG */
b2589ab0 1556 && convrate <= 0x08) {
c4f99a2b
JD
1557 name = "w83l771";
1558 }
6771ea1f 1559 }
2ef01793 1560 } else
6d101c58
JD
1561 if (address >= 0x48 && address <= 0x4F
1562 && man_id == 0xA1) { /* NXP Semiconductor/Philips */
6d101c58 1563 if (chip_id == 0x00
b2589ab0
JD
1564 && (config1 & 0x2A) == 0x00
1565 && (config2 & 0xFE) == 0x00
1566 && convrate <= 0x09) {
2ef01793
SD
1567 name = "sa56004";
1568 }
ae544f64
GR
1569 } else
1570 if ((address == 0x4C || address == 0x4D)
1571 && man_id == 0x47) { /* GMT */
1572 if (chip_id == 0x01 /* G781 */
1573 && (config1 & 0x3F) == 0x00
1574 && convrate <= 0x08)
1575 name = "g781";
1daaceb2
WN
1576 } else
1577 if (address == 0x4C
1578 && man_id == 0x55) { /* Texas Instruments */
1579 int local_ext;
1580
1581 local_ext = i2c_smbus_read_byte_data(client,
1582 TMP451_REG_R_LOCAL_TEMPL);
1583
1584 if (chip_id == 0x00 /* TMP451 */
1585 && (config1 & 0x1B) == 0x00
1586 && convrate <= 0x09
1587 && (local_ext & 0x0F) == 0x00)
1588 name = "tmp451";
1da177e4
LT
1589 }
1590
8f2fa77c
JD
1591 if (!name) { /* identification failed */
1592 dev_dbg(&adapter->dev,
1593 "Unsupported chip at 0x%02x (man_id=0x%02X, "
1594 "chip_id=0x%02X)\n", address, man_id, chip_id);
1595 return -ENODEV;
1da177e4 1596 }
8f2fa77c 1597
9b0e8526
JD
1598 strlcpy(info->type, name, I2C_NAME_SIZE);
1599
1600 return 0;
1601}
1602
1f17a444 1603static void lm90_restore_conf(void *_data)
f7001bb0 1604{
1f17a444
GR
1605 struct lm90_data *data = _data;
1606 struct i2c_client *client = data->client;
1607
f7001bb0
GR
1608 /* Restore initial configuration */
1609 i2c_smbus_write_byte_data(client, LM90_REG_W_CONVRATE,
1610 data->convrate_orig);
1611 i2c_smbus_write_byte_data(client, LM90_REG_W_CONFIG1,
1612 data->config_orig);
1613}
1614
37ad04d7 1615static int lm90_init_client(struct i2c_client *client, struct lm90_data *data)
15b66ab6 1616{
37ad04d7 1617 int config, convrate;
15b66ab6 1618
37ad04d7
GR
1619 convrate = lm90_read_reg(client, LM90_REG_R_CONVRATE);
1620 if (convrate < 0)
1621 return convrate;
0c01b644
GR
1622 data->convrate_orig = convrate;
1623
15b66ab6
GR
1624 /*
1625 * Start the conversions.
1626 */
0c01b644 1627 lm90_set_convrate(client, data, 500); /* 500ms; 2Hz conversion rate */
37ad04d7
GR
1628 config = lm90_read_reg(client, LM90_REG_R_CONFIG1);
1629 if (config < 0)
1630 return config;
15b66ab6
GR
1631 data->config_orig = config;
1632
1633 /* Check Temperature Range Select */
1daaceb2 1634 if (data->kind == adt7461 || data->kind == tmp451) {
15b66ab6
GR
1635 if (config & 0x04)
1636 data->flags |= LM90_FLAG_ADT7461_EXT;
1637 }
1638
1639 /*
1640 * Put MAX6680/MAX8881 into extended resolution (bit 0x10,
1641 * 0.125 degree resolution) and range (0x08, extend range
1642 * to -64 degree) mode for the remote temperature sensor.
1643 */
1644 if (data->kind == max6680)
1645 config |= 0x18;
1646
1647 /*
1648 * Select external channel 0 for max6695/96
1649 */
1650 if (data->kind == max6696)
1651 config &= ~0x08;
1652
1653 config &= 0xBF; /* run */
1654 if (config != data->config_orig) /* Only write if changed */
1655 i2c_smbus_write_byte_data(client, LM90_REG_W_CONFIG1, config);
1f17a444 1656
c5fcf01b 1657 return devm_add_action_or_reset(&client->dev, lm90_restore_conf, data);
15b66ab6
GR
1658}
1659
072de496
WN
1660static bool lm90_is_tripped(struct i2c_client *client, u16 *status)
1661{
1662 struct lm90_data *data = i2c_get_clientdata(client);
37ad04d7 1663 int st, st2 = 0;
072de496 1664
37ad04d7
GR
1665 st = lm90_read_reg(client, LM90_REG_R_STATUS);
1666 if (st < 0)
1667 return false;
072de496 1668
37ad04d7
GR
1669 if (data->kind == max6696) {
1670 st2 = lm90_read_reg(client, MAX6696_REG_R_STATUS2);
1671 if (st2 < 0)
1672 return false;
1673 }
072de496
WN
1674
1675 *status = st | (st2 << 8);
1676
1677 if ((st & 0x7f) == 0 && (st2 & 0xfe) == 0)
1678 return false;
1679
1680 if ((st & (LM90_STATUS_LLOW | LM90_STATUS_LHIGH | LM90_STATUS_LTHRM)) ||
1681 (st2 & MAX6696_STATUS2_LOT2))
1682 dev_warn(&client->dev,
1683 "temp%d out of range, please check!\n", 1);
1684 if ((st & (LM90_STATUS_RLOW | LM90_STATUS_RHIGH | LM90_STATUS_RTHRM)) ||
1685 (st2 & MAX6696_STATUS2_ROT2))
1686 dev_warn(&client->dev,
1687 "temp%d out of range, please check!\n", 2);
1688 if (st & LM90_STATUS_ROPEN)
1689 dev_warn(&client->dev,
1690 "temp%d diode open, please check!\n", 2);
1691 if (st2 & (MAX6696_STATUS2_R2LOW | MAX6696_STATUS2_R2HIGH |
1692 MAX6696_STATUS2_R2THRM | MAX6696_STATUS2_R2OT2))
1693 dev_warn(&client->dev,
1694 "temp%d out of range, please check!\n", 3);
1695 if (st2 & MAX6696_STATUS2_R2OPEN)
1696 dev_warn(&client->dev,
1697 "temp%d diode open, please check!\n", 3);
1698
1699 return true;
1700}
1701
109b1283
WN
1702static irqreturn_t lm90_irq_thread(int irq, void *dev_id)
1703{
1704 struct i2c_client *client = dev_id;
1705 u16 status;
1706
1707 if (lm90_is_tripped(client, &status))
1708 return IRQ_HANDLED;
1709 else
1710 return IRQ_NONE;
1711}
1712
1f17a444
GR
1713static void lm90_remove_pec(void *dev)
1714{
1715 device_remove_file(dev, &dev_attr_pec);
1716}
1717
1718static void lm90_regulator_disable(void *regulator)
1719{
1720 regulator_disable(regulator);
1721}
1722
eb1c8f43
GR
1723static const u32 lm90_chip_config[] = {
1724 HWMON_C_REGISTER_TZ | HWMON_C_UPDATE_INTERVAL | HWMON_C_ALARMS,
1725 0
1726};
1727
1728static const struct hwmon_channel_info lm90_chip_info = {
1729 .type = hwmon_chip,
1730 .config = lm90_chip_config,
1731};
1732
1733
1734static const struct hwmon_ops lm90_ops = {
1735 .is_visible = lm90_is_visible,
1736 .read = lm90_read,
1737 .write = lm90_write,
1738};
1739
b2589ab0 1740static int lm90_probe(struct i2c_client *client,
9b0e8526
JD
1741 const struct i2c_device_id *id)
1742{
b2589ab0
JD
1743 struct device *dev = &client->dev;
1744 struct i2c_adapter *adapter = to_i2c_adapter(dev->parent);
eb1c8f43 1745 struct hwmon_channel_info *info;
3e0f964f 1746 struct regulator *regulator;
6e5f62b9 1747 struct device *hwmon_dev;
eb1c8f43 1748 struct lm90_data *data;
9b0e8526 1749 int err;
1da177e4 1750
3e0f964f
WN
1751 regulator = devm_regulator_get(dev, "vcc");
1752 if (IS_ERR(regulator))
1753 return PTR_ERR(regulator);
1754
1755 err = regulator_enable(regulator);
1756 if (err < 0) {
d89fa686 1757 dev_err(dev, "Failed to enable regulator: %d\n", err);
3e0f964f
WN
1758 return err;
1759 }
1760
c5fcf01b
GR
1761 err = devm_add_action_or_reset(dev, lm90_regulator_disable, regulator);
1762 if (err)
1763 return err;
1f17a444 1764
d89fa686 1765 data = devm_kzalloc(dev, sizeof(struct lm90_data), GFP_KERNEL);
20f426ff
GR
1766 if (!data)
1767 return -ENOMEM;
1768
1de8b250 1769 data->client = client;
b2589ab0 1770 i2c_set_clientdata(client, data);
9a61bf63 1771 mutex_init(&data->update_lock);
1da177e4 1772
9b0e8526 1773 /* Set the device type */
df8d57bf
JMC
1774 if (client->dev.of_node)
1775 data->kind = (enum chips)of_device_get_match_data(&client->dev);
1776 else
1777 data->kind = id->driver_data;
9b0e8526
JD
1778 if (data->kind == adm1032) {
1779 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE))
b2589ab0 1780 client->flags &= ~I2C_CLIENT_PEC;
9b0e8526 1781 }
1da177e4 1782
f36ffeab
GR
1783 /*
1784 * Different devices have different alarm bits triggering the
1785 * ALERT# output
1786 */
4667bcb8 1787 data->alert_alarms = lm90_params[data->kind].alert_alarms;
53de3342 1788
88073bb1 1789 /* Set chip capabilities */
4667bcb8 1790 data->flags = lm90_params[data->kind].flags;
eb1c8f43
GR
1791
1792 data->chip.ops = &lm90_ops;
1793 data->chip.info = data->info;
1794
1795 data->info[0] = &lm90_chip_info;
1796 data->info[1] = &data->temp_info;
1797
1798 info = &data->temp_info;
1799 info->type = hwmon_temp;
1800 info->config = data->channel_config;
1801
1802 data->channel_config[0] = HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MAX |
1803 HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MIN_ALARM |
1804 HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM;
1805 data->channel_config[1] = HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MAX |
1806 HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MIN_ALARM |
1807 HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM | HWMON_T_FAULT;
1808
1809 if (data->flags & LM90_HAVE_OFFSET)
1810 data->channel_config[1] |= HWMON_T_OFFSET;
1811
1812 if (data->flags & LM90_HAVE_EMERGENCY) {
1813 data->channel_config[0] |= HWMON_T_EMERGENCY |
1814 HWMON_T_EMERGENCY_HYST;
1815 data->channel_config[1] |= HWMON_T_EMERGENCY |
1816 HWMON_T_EMERGENCY_HYST;
1817 }
1818
1819 if (data->flags & LM90_HAVE_EMERGENCY_ALARM) {
1820 data->channel_config[0] |= HWMON_T_EMERGENCY_ALARM;
1821 data->channel_config[1] |= HWMON_T_EMERGENCY_ALARM;
1822 }
1823
1824 if (data->flags & LM90_HAVE_TEMP3) {
1825 data->channel_config[2] = HWMON_T_INPUT |
1826 HWMON_T_MIN | HWMON_T_MAX |
1827 HWMON_T_CRIT | HWMON_T_CRIT_HYST |
1828 HWMON_T_EMERGENCY | HWMON_T_EMERGENCY_HYST |
1829 HWMON_T_MIN_ALARM | HWMON_T_MAX_ALARM |
1830 HWMON_T_CRIT_ALARM | HWMON_T_EMERGENCY_ALARM |
1831 HWMON_T_FAULT;
1832 }
1833
a095f687 1834 data->reg_local_ext = lm90_params[data->kind].reg_local_ext;
06e1c0a2 1835
0c01b644
GR
1836 /* Set maximum conversion rate */
1837 data->max_convrate = lm90_params[data->kind].max_convrate;
1838
1da177e4 1839 /* Initialize the LM90 chip */
37ad04d7
GR
1840 err = lm90_init_client(client, data);
1841 if (err < 0) {
1842 dev_err(dev, "Failed to initialize device\n");
1843 return err;
1844 }
1da177e4 1845
eb1c8f43
GR
1846 /*
1847 * The 'pec' attribute is attached to the i2c device and thus created
1848 * separately.
1849 */
b2589ab0
JD
1850 if (client->flags & I2C_CLIENT_PEC) {
1851 err = device_create_file(dev, &dev_attr_pec);
11e57812 1852 if (err)
1f17a444 1853 return err;
c5fcf01b
GR
1854 err = devm_add_action_or_reset(dev, lm90_remove_pec, dev);
1855 if (err)
1856 return err;
06e1c0a2 1857 }
0e39e01c 1858
eb1c8f43
GR
1859 hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
1860 data, &data->chip,
1861 NULL);
6e5f62b9
GR
1862 if (IS_ERR(hwmon_dev))
1863 return PTR_ERR(hwmon_dev);
943b0830 1864
109b1283
WN
1865 if (client->irq) {
1866 dev_dbg(dev, "IRQ: %d\n", client->irq);
1867 err = devm_request_threaded_irq(dev, client->irq,
1868 NULL, lm90_irq_thread,
1869 IRQF_TRIGGER_LOW | IRQF_ONESHOT,
1870 "lm90", client);
1871 if (err < 0) {
1872 dev_err(dev, "cannot request IRQ %d\n", client->irq);
6e5f62b9 1873 return err;
109b1283
WN
1874 }
1875 }
1876
1da177e4
LT
1877 return 0;
1878}
1879
b4f21054
BT
1880static void lm90_alert(struct i2c_client *client, enum i2c_alert_protocol type,
1881 unsigned int flag)
53de3342 1882{
072de496 1883 u16 alarms;
06e1c0a2 1884
b4f21054
BT
1885 if (type != I2C_PROTOCOL_SMBUS_ALERT)
1886 return;
1887
072de496 1888 if (lm90_is_tripped(client, &alarms)) {
f36ffeab
GR
1889 /*
1890 * Disable ALERT# output, because these chips don't implement
1891 * SMBus alert correctly; they should only hold the alert line
1892 * low briefly.
1893 */
072de496
WN
1894 struct lm90_data *data = i2c_get_clientdata(client);
1895
37ad04d7
GR
1896 if ((data->flags & LM90_HAVE_BROKEN_ALERT) &&
1897 (alarms & data->alert_alarms)) {
1898 int config;
1899
53de3342 1900 dev_dbg(&client->dev, "Disabling ALERT#\n");
37ad04d7
GR
1901 config = lm90_read_reg(client, LM90_REG_R_CONFIG1);
1902 if (config >= 0)
1903 i2c_smbus_write_byte_data(client,
1904 LM90_REG_W_CONFIG1,
1905 config | 0x80);
53de3342 1906 }
072de496
WN
1907 } else {
1908 dev_info(&client->dev, "Everything OK\n");
53de3342
JD
1909 }
1910}
1911
15b66ab6
GR
1912static struct i2c_driver lm90_driver = {
1913 .class = I2C_CLASS_HWMON,
1914 .driver = {
1915 .name = "lm90",
df8d57bf 1916 .of_match_table = of_match_ptr(lm90_of_match),
15b66ab6
GR
1917 },
1918 .probe = lm90_probe,
15b66ab6
GR
1919 .alert = lm90_alert,
1920 .id_table = lm90_id,
1921 .detect = lm90_detect,
1922 .address_list = normal_i2c,
1923};
1da177e4 1924
f0967eea 1925module_i2c_driver(lm90_driver);
1da177e4 1926
7c81c60f 1927MODULE_AUTHOR("Jean Delvare <jdelvare@suse.de>");
1da177e4
LT
1928MODULE_DESCRIPTION("LM90/ADM1032 driver");
1929MODULE_LICENSE("GPL");