]> git.proxmox.com Git - mirror_ubuntu-jammy-kernel.git/blame - drivers/hwmon/lm90.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 61
[mirror_ubuntu-jammy-kernel.git] / drivers / hwmon / lm90.c
CommitLineData
74ba9207 1// SPDX-License-Identifier: GPL-2.0-or-later
1da177e4
LT
2/*
3 * lm90.c - Part of lm_sensors, Linux kernel modules for hardware
4 * monitoring
7c81c60f 5 * Copyright (C) 2003-2010 Jean Delvare <jdelvare@suse.de>
1da177e4
LT
6 *
7 * Based on the lm83 driver. The LM90 is a sensor chip made by National
8 * Semiconductor. It reports up to two temperatures (its own plus up to
9 * one external one) with a 0.125 deg resolution (1 deg for local
a874a10c 10 * temperature) and a 3-4 deg accuracy.
1da177e4
LT
11 *
12 * This driver also supports the LM89 and LM99, two other sensor chips
13 * made by National Semiconductor. Both have an increased remote
14 * temperature measurement accuracy (1 degree), and the LM99
15 * additionally shifts remote temperatures (measured and limits) by 16
97ae60bb 16 * degrees, which allows for higher temperatures measurement.
44bbe87e 17 * Note that there is no way to differentiate between both chips.
97ae60bb 18 * When device is auto-detected, the driver will assume an LM99.
1da177e4
LT
19 *
20 * This driver also supports the LM86, another sensor chip made by
21 * National Semiconductor. It is exactly similar to the LM90 except it
22 * has a higher accuracy.
1da177e4
LT
23 *
24 * This driver also supports the ADM1032, a sensor chip made by Analog
25 * Devices. That chip is similar to the LM90, with a few differences
a874a10c
JD
26 * that are not handled by this driver. Among others, it has a higher
27 * accuracy than the LM90, much like the LM86 does.
1da177e4
LT
28 *
29 * This driver also supports the MAX6657, MAX6658 and MAX6659 sensor
a874a10c 30 * chips made by Maxim. These chips are similar to the LM86.
44bbe87e 31 * Note that there is no easy way to differentiate between the three
6948708d
GR
32 * variants. We use the device address to detect MAX6659, which will result
33 * in a detection as max6657 if it is on address 0x4c. The extra address
34 * and features of the MAX6659 are only supported if the chip is configured
35 * explicitly as max6659, or if its address is not 0x4c.
36 * These chips lack the remote temperature offset feature.
1da177e4 37 *
1a51e068
DW
38 * This driver also supports the MAX6646, MAX6647, MAX6648, MAX6649 and
39 * MAX6692 chips made by Maxim. These are again similar to the LM86,
40 * but they use unsigned temperature values and can report temperatures
41 * from 0 to 145 degrees.
271dabf5 42 *
32c82a93
RB
43 * This driver also supports the MAX6680 and MAX6681, two other sensor
44 * chips made by Maxim. These are quite similar to the other Maxim
a874a10c
JD
45 * chips. The MAX6680 and MAX6681 only differ in the pinout so they can
46 * be treated identically.
32c82a93 47 *
06e1c0a2
GR
48 * This driver also supports the MAX6695 and MAX6696, two other sensor
49 * chips made by Maxim. These are also quite similar to other Maxim
50 * chips, but support three temperature sensors instead of two. MAX6695
51 * and MAX6696 only differ in the pinout so they can be treated identically.
52 *
5a4e5e6a
GR
53 * This driver also supports ADT7461 and ADT7461A from Analog Devices as well as
54 * NCT1008 from ON Semiconductor. The chips are supported in both compatibility
55 * and extended mode. They are mostly compatible with LM90 except for a data
56 * format difference for the temperature value registers.
1da177e4 57 *
2ef01793
SD
58 * This driver also supports the SA56004 from Philips. This device is
59 * pin-compatible with the LM86, the ED/EDP parts are also address-compatible.
60 *
ae544f64
GR
61 * This driver also supports the G781 from GMT. This device is compatible
62 * with the ADM1032.
63 *
1daaceb2
WN
64 * This driver also supports TMP451 from Texas Instruments. This device is
65 * supported in both compatibility and extended mode. It's mostly compatible
66 * with ADT7461 except for local temperature low byte register and max
67 * conversion rate.
68 *
1da177e4
LT
69 * Since the LM90 was the first chipset supported by this driver, most
70 * comments will refer to this chipset, but are actually general and
71 * concern all supported chipsets, unless mentioned otherwise.
1da177e4
LT
72 */
73
1da177e4
LT
74#include <linux/module.h>
75#include <linux/init.h>
76#include <linux/slab.h>
77#include <linux/jiffies.h>
78#include <linux/i2c.h>
943b0830
MH
79#include <linux/hwmon.h>
80#include <linux/err.h>
9a61bf63 81#include <linux/mutex.h>
df8d57bf 82#include <linux/of_device.h>
0e39e01c 83#include <linux/sysfs.h>
109b1283 84#include <linux/interrupt.h>
3e0f964f 85#include <linux/regulator/consumer.h>
1da177e4
LT
86
87/*
88 * Addresses to scan
89 * Address is fully defined internally and cannot be changed except for
32c82a93 90 * MAX6659, MAX6680 and MAX6681.
5a4e5e6a
GR
91 * LM86, LM89, LM90, LM99, ADM1032, ADM1032-1, ADT7461, ADT7461A, MAX6649,
92 * MAX6657, MAX6658, NCT1008 and W83L771 have address 0x4c.
93 * ADM1032-2, ADT7461-2, ADT7461A-2, LM89-1, LM99-1, MAX6646, and NCT1008D
94 * have address 0x4d.
271dabf5 95 * MAX6647 has address 0x4e.
13c84951 96 * MAX6659 can have address 0x4c, 0x4d or 0x4e.
32c82a93
RB
97 * MAX6680 and MAX6681 can have address 0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b,
98 * 0x4c, 0x4d or 0x4e.
2ef01793 99 * SA56004 can have address 0x48 through 0x4F.
1da177e4
LT
100 */
101
25e9c86d 102static const unsigned short normal_i2c[] = {
2ef01793
SD
103 0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b, 0x48, 0x49, 0x4a, 0x4b, 0x4c,
104 0x4d, 0x4e, 0x4f, I2C_CLIENT_END };
1da177e4 105
13c84951 106enum chips { lm90, adm1032, lm99, lm86, max6657, max6659, adt7461, max6680,
1daaceb2 107 max6646, w83l771, max6696, sa56004, g781, tmp451 };
1da177e4
LT
108
109/*
110 * The LM90 registers
111 */
112
113#define LM90_REG_R_MAN_ID 0xFE
114#define LM90_REG_R_CHIP_ID 0xFF
115#define LM90_REG_R_CONFIG1 0x03
116#define LM90_REG_W_CONFIG1 0x09
117#define LM90_REG_R_CONFIG2 0xBF
118#define LM90_REG_W_CONFIG2 0xBF
119#define LM90_REG_R_CONVRATE 0x04
120#define LM90_REG_W_CONVRATE 0x0A
121#define LM90_REG_R_STATUS 0x02
122#define LM90_REG_R_LOCAL_TEMP 0x00
123#define LM90_REG_R_LOCAL_HIGH 0x05
124#define LM90_REG_W_LOCAL_HIGH 0x0B
125#define LM90_REG_R_LOCAL_LOW 0x06
126#define LM90_REG_W_LOCAL_LOW 0x0C
127#define LM90_REG_R_LOCAL_CRIT 0x20
128#define LM90_REG_W_LOCAL_CRIT 0x20
129#define LM90_REG_R_REMOTE_TEMPH 0x01
130#define LM90_REG_R_REMOTE_TEMPL 0x10
131#define LM90_REG_R_REMOTE_OFFSH 0x11
132#define LM90_REG_W_REMOTE_OFFSH 0x11
133#define LM90_REG_R_REMOTE_OFFSL 0x12
134#define LM90_REG_W_REMOTE_OFFSL 0x12
135#define LM90_REG_R_REMOTE_HIGHH 0x07
136#define LM90_REG_W_REMOTE_HIGHH 0x0D
137#define LM90_REG_R_REMOTE_HIGHL 0x13
138#define LM90_REG_W_REMOTE_HIGHL 0x13
139#define LM90_REG_R_REMOTE_LOWH 0x08
140#define LM90_REG_W_REMOTE_LOWH 0x0E
141#define LM90_REG_R_REMOTE_LOWL 0x14
142#define LM90_REG_W_REMOTE_LOWL 0x14
143#define LM90_REG_R_REMOTE_CRIT 0x19
144#define LM90_REG_W_REMOTE_CRIT 0x19
145#define LM90_REG_R_TCRIT_HYST 0x21
146#define LM90_REG_W_TCRIT_HYST 0x21
147
06e1c0a2 148/* MAX6646/6647/6649/6657/6658/6659/6695/6696 registers */
f65e1708
JD
149
150#define MAX6657_REG_R_LOCAL_TEMPL 0x11
06e1c0a2 151#define MAX6696_REG_R_STATUS2 0x12
6948708d
GR
152#define MAX6659_REG_R_REMOTE_EMERG 0x16
153#define MAX6659_REG_W_REMOTE_EMERG 0x16
154#define MAX6659_REG_R_LOCAL_EMERG 0x17
155#define MAX6659_REG_W_LOCAL_EMERG 0x17
f65e1708 156
2ef01793
SD
157/* SA56004 registers */
158
159#define SA56004_REG_R_LOCAL_TEMPL 0x22
160
0c01b644
GR
161#define LM90_MAX_CONVRATE_MS 16000 /* Maximum conversion rate in ms */
162
1daaceb2
WN
163/* TMP451 registers */
164#define TMP451_REG_R_LOCAL_TEMPL 0x15
165
23b2d477
NC
166/*
167 * Device flags
168 */
88073bb1
GR
169#define LM90_FLAG_ADT7461_EXT (1 << 0) /* ADT7461 extended mode */
170/* Device features */
171#define LM90_HAVE_OFFSET (1 << 1) /* temperature offset register */
88073bb1 172#define LM90_HAVE_REM_LIMIT_EXT (1 << 3) /* extended remote limit */
6948708d 173#define LM90_HAVE_EMERGENCY (1 << 4) /* 3rd upper (emergency) limit */
06e1c0a2
GR
174#define LM90_HAVE_EMERGENCY_ALARM (1 << 5)/* emergency alarm */
175#define LM90_HAVE_TEMP3 (1 << 6) /* 3rd temperature sensor */
1179324c 176#define LM90_HAVE_BROKEN_ALERT (1 << 7) /* Broken alert */
23b2d477 177
072de496
WN
178/* LM90 status */
179#define LM90_STATUS_LTHRM (1 << 0) /* local THERM limit tripped */
180#define LM90_STATUS_RTHRM (1 << 1) /* remote THERM limit tripped */
181#define LM90_STATUS_ROPEN (1 << 2) /* remote is an open circuit */
182#define LM90_STATUS_RLOW (1 << 3) /* remote low temp limit tripped */
183#define LM90_STATUS_RHIGH (1 << 4) /* remote high temp limit tripped */
184#define LM90_STATUS_LLOW (1 << 5) /* local low temp limit tripped */
185#define LM90_STATUS_LHIGH (1 << 6) /* local high temp limit tripped */
186
187#define MAX6696_STATUS2_R2THRM (1 << 1) /* remote2 THERM limit tripped */
188#define MAX6696_STATUS2_R2OPEN (1 << 2) /* remote2 is an open circuit */
189#define MAX6696_STATUS2_R2LOW (1 << 3) /* remote2 low temp limit tripped */
190#define MAX6696_STATUS2_R2HIGH (1 << 4) /* remote2 high temp limit tripped */
191#define MAX6696_STATUS2_ROT2 (1 << 5) /* remote emergency limit tripped */
192#define MAX6696_STATUS2_R2OT2 (1 << 6) /* remote2 emergency limit tripped */
193#define MAX6696_STATUS2_LOT2 (1 << 7) /* local emergency limit tripped */
194
1da177e4
LT
195/*
196 * Driver data (common to all clients)
197 */
198
9b0e8526
JD
199static const struct i2c_device_id lm90_id[] = {
200 { "adm1032", adm1032 },
201 { "adt7461", adt7461 },
5a4e5e6a 202 { "adt7461a", adt7461 },
ae544f64 203 { "g781", g781 },
9b0e8526
JD
204 { "lm90", lm90 },
205 { "lm86", lm86 },
97ae60bb
JD
206 { "lm89", lm86 },
207 { "lm99", lm99 },
271dabf5
BH
208 { "max6646", max6646 },
209 { "max6647", max6646 },
210 { "max6649", max6646 },
9b0e8526
JD
211 { "max6657", max6657 },
212 { "max6658", max6657 },
13c84951 213 { "max6659", max6659 },
9b0e8526
JD
214 { "max6680", max6680 },
215 { "max6681", max6680 },
06e1c0a2
GR
216 { "max6695", max6696 },
217 { "max6696", max6696 },
5a4e5e6a 218 { "nct1008", adt7461 },
6771ea1f 219 { "w83l771", w83l771 },
2ef01793 220 { "sa56004", sa56004 },
1daaceb2 221 { "tmp451", tmp451 },
9b0e8526
JD
222 { }
223};
224MODULE_DEVICE_TABLE(i2c, lm90_id);
225
787afaa3 226static const struct of_device_id __maybe_unused lm90_of_match[] = {
df8d57bf
JMC
227 {
228 .compatible = "adi,adm1032",
229 .data = (void *)adm1032
230 },
231 {
232 .compatible = "adi,adt7461",
233 .data = (void *)adt7461
234 },
235 {
236 .compatible = "adi,adt7461a",
237 .data = (void *)adt7461
238 },
239 {
240 .compatible = "gmt,g781",
241 .data = (void *)g781
242 },
243 {
244 .compatible = "national,lm90",
245 .data = (void *)lm90
246 },
247 {
248 .compatible = "national,lm86",
249 .data = (void *)lm86
250 },
251 {
252 .compatible = "national,lm89",
253 .data = (void *)lm86
254 },
255 {
256 .compatible = "national,lm99",
257 .data = (void *)lm99
258 },
259 {
260 .compatible = "dallas,max6646",
261 .data = (void *)max6646
262 },
263 {
264 .compatible = "dallas,max6647",
265 .data = (void *)max6646
266 },
267 {
268 .compatible = "dallas,max6649",
269 .data = (void *)max6646
270 },
271 {
272 .compatible = "dallas,max6657",
273 .data = (void *)max6657
274 },
275 {
276 .compatible = "dallas,max6658",
277 .data = (void *)max6657
278 },
279 {
280 .compatible = "dallas,max6659",
281 .data = (void *)max6659
282 },
283 {
284 .compatible = "dallas,max6680",
285 .data = (void *)max6680
286 },
287 {
288 .compatible = "dallas,max6681",
289 .data = (void *)max6680
290 },
291 {
292 .compatible = "dallas,max6695",
293 .data = (void *)max6696
294 },
295 {
296 .compatible = "dallas,max6696",
297 .data = (void *)max6696
298 },
299 {
300 .compatible = "onnn,nct1008",
301 .data = (void *)adt7461
302 },
303 {
304 .compatible = "winbond,w83l771",
305 .data = (void *)w83l771
306 },
307 {
308 .compatible = "nxp,sa56004",
309 .data = (void *)sa56004
310 },
311 {
312 .compatible = "ti,tmp451",
313 .data = (void *)tmp451
314 },
315 { },
316};
317MODULE_DEVICE_TABLE(of, lm90_of_match);
318
4667bcb8
GR
319/*
320 * chip type specific parameters
321 */
322struct lm90_params {
323 u32 flags; /* Capabilities */
324 u16 alert_alarms; /* Which alarm bits trigger ALERT# */
325 /* Upper 8 bits for max6695/96 */
0c01b644 326 u8 max_convrate; /* Maximum conversion rate register value */
a095f687 327 u8 reg_local_ext; /* Extended local temp register (optional) */
4667bcb8
GR
328};
329
330static const struct lm90_params lm90_params[] = {
331 [adm1032] = {
1179324c
GR
332 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
333 | LM90_HAVE_BROKEN_ALERT,
4667bcb8 334 .alert_alarms = 0x7c,
0c01b644 335 .max_convrate = 10,
4667bcb8
GR
336 },
337 [adt7461] = {
1179324c
GR
338 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
339 | LM90_HAVE_BROKEN_ALERT,
4667bcb8 340 .alert_alarms = 0x7c,
0c01b644 341 .max_convrate = 10,
4667bcb8 342 },
ae544f64
GR
343 [g781] = {
344 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
345 | LM90_HAVE_BROKEN_ALERT,
346 .alert_alarms = 0x7c,
347 .max_convrate = 8,
348 },
4667bcb8
GR
349 [lm86] = {
350 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT,
351 .alert_alarms = 0x7b,
0c01b644 352 .max_convrate = 9,
4667bcb8
GR
353 },
354 [lm90] = {
355 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT,
356 .alert_alarms = 0x7b,
0c01b644 357 .max_convrate = 9,
4667bcb8
GR
358 },
359 [lm99] = {
360 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT,
361 .alert_alarms = 0x7b,
0c01b644 362 .max_convrate = 9,
4667bcb8
GR
363 },
364 [max6646] = {
4667bcb8 365 .alert_alarms = 0x7c,
0c01b644 366 .max_convrate = 6,
2ef01793 367 .reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL,
4667bcb8
GR
368 },
369 [max6657] = {
4667bcb8 370 .alert_alarms = 0x7c,
0c01b644 371 .max_convrate = 8,
2ef01793 372 .reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL,
4667bcb8
GR
373 },
374 [max6659] = {
a095f687 375 .flags = LM90_HAVE_EMERGENCY,
4667bcb8 376 .alert_alarms = 0x7c,
0c01b644 377 .max_convrate = 8,
2ef01793 378 .reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL,
4667bcb8
GR
379 },
380 [max6680] = {
381 .flags = LM90_HAVE_OFFSET,
382 .alert_alarms = 0x7c,
0c01b644 383 .max_convrate = 7,
4667bcb8
GR
384 },
385 [max6696] = {
a095f687 386 .flags = LM90_HAVE_EMERGENCY
4667bcb8 387 | LM90_HAVE_EMERGENCY_ALARM | LM90_HAVE_TEMP3,
e41fae2b 388 .alert_alarms = 0x1c7c,
0c01b644 389 .max_convrate = 6,
2ef01793 390 .reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL,
4667bcb8
GR
391 },
392 [w83l771] = {
393 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT,
394 .alert_alarms = 0x7c,
0c01b644 395 .max_convrate = 8,
4667bcb8 396 },
2ef01793 397 [sa56004] = {
a095f687 398 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT,
2ef01793
SD
399 .alert_alarms = 0x7b,
400 .max_convrate = 9,
401 .reg_local_ext = SA56004_REG_R_LOCAL_TEMPL,
402 },
1daaceb2
WN
403 [tmp451] = {
404 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
405 | LM90_HAVE_BROKEN_ALERT,
406 .alert_alarms = 0x7c,
407 .max_convrate = 9,
408 .reg_local_ext = TMP451_REG_R_LOCAL_TEMPL,
eb1c8f43 409 },
4667bcb8
GR
410};
411
40465d94
WN
412/*
413 * TEMP8 register index
414 */
415enum lm90_temp8_reg_index {
416 LOCAL_LOW = 0,
417 LOCAL_HIGH,
418 LOCAL_CRIT,
419 REMOTE_CRIT,
420 LOCAL_EMERG, /* max6659 and max6695/96 */
421 REMOTE_EMERG, /* max6659 and max6695/96 */
422 REMOTE2_CRIT, /* max6695/96 only */
423 REMOTE2_EMERG, /* max6695/96 only */
424 TEMP8_REG_NUM
425};
426
427/*
428 * TEMP11 register index
429 */
430enum lm90_temp11_reg_index {
431 REMOTE_TEMP = 0,
432 REMOTE_LOW,
433 REMOTE_HIGH,
434 REMOTE_OFFSET, /* except max6646, max6657/58/59, and max6695/96 */
435 LOCAL_TEMP,
436 REMOTE2_TEMP, /* max6695/96 only */
437 REMOTE2_LOW, /* max6695/96 only */
438 REMOTE2_HIGH, /* max6695/96 only */
439 TEMP11_REG_NUM
440};
441
1da177e4
LT
442/*
443 * Client data (each client gets its own)
444 */
445
446struct lm90_data {
1de8b250 447 struct i2c_client *client;
eb1c8f43
GR
448 u32 channel_config[4];
449 struct hwmon_channel_info temp_info;
450 const struct hwmon_channel_info *info[3];
451 struct hwmon_chip_info chip;
9a61bf63 452 struct mutex update_lock;
2f83ab77 453 bool valid; /* true if register values are valid */
1da177e4
LT
454 unsigned long last_updated; /* in jiffies */
455 int kind;
4667bcb8 456 u32 flags;
1da177e4 457
38bab98a 458 unsigned int update_interval; /* in milliseconds */
0c01b644 459
95238364 460 u8 config_orig; /* Original configuration register value */
0c01b644 461 u8 convrate_orig; /* Original conversion rate register value */
06e1c0a2
GR
462 u16 alert_alarms; /* Which alarm bits trigger ALERT# */
463 /* Upper 8 bits for max6695/96 */
0c01b644 464 u8 max_convrate; /* Maximum conversion rate */
2ef01793 465 u8 reg_local_ext; /* local extension register offset */
95238364 466
1da177e4 467 /* registers values */
40465d94
WN
468 s8 temp8[TEMP8_REG_NUM];
469 s16 temp11[TEMP11_REG_NUM];
1da177e4 470 u8 temp_hyst;
06e1c0a2 471 u16 alarms; /* bitvector (upper 8 bits for max6695/96) */
1da177e4
LT
472};
473
15b66ab6
GR
474/*
475 * Support functions
476 */
477
478/*
479 * The ADM1032 supports PEC but not on write byte transactions, so we need
480 * to explicitly ask for a transaction without PEC.
481 */
482static inline s32 adm1032_write_byte(struct i2c_client *client, u8 value)
483{
484 return i2c_smbus_xfer(client->adapter, client->addr,
485 client->flags & ~I2C_CLIENT_PEC,
486 I2C_SMBUS_WRITE, value, I2C_SMBUS_BYTE, NULL);
487}
488
489/*
490 * It is assumed that client->update_lock is held (unless we are in
491 * detection or initialization steps). This matters when PEC is enabled,
492 * because we don't want the address pointer to change between the write
493 * byte and the read byte transactions.
494 */
37ad04d7 495static int lm90_read_reg(struct i2c_client *client, u8 reg)
15b66ab6
GR
496{
497 int err;
498
499 if (client->flags & I2C_CLIENT_PEC) {
500 err = adm1032_write_byte(client, reg);
501 if (err >= 0)
502 err = i2c_smbus_read_byte(client);
503 } else
504 err = i2c_smbus_read_byte_data(client, reg);
505
37ad04d7 506 return err;
15b66ab6
GR
507}
508
37ad04d7 509static int lm90_read16(struct i2c_client *client, u8 regh, u8 regl)
15b66ab6 510{
37ad04d7 511 int oldh, newh, l;
15b66ab6
GR
512
513 /*
514 * There is a trick here. We have to read two registers to have the
515 * sensor temperature, but we have to beware a conversion could occur
25985edc 516 * between the readings. The datasheet says we should either use
15b66ab6
GR
517 * the one-shot conversion register, which we don't want to do
518 * (disables hardware monitoring) or monitor the busy bit, which is
519 * impossible (we can't read the values and monitor that bit at the
520 * exact same time). So the solution used here is to read the high
521 * byte once, then the low byte, then the high byte again. If the new
522 * high byte matches the old one, then we have a valid reading. Else
523 * we have to read the low byte again, and now we believe we have a
524 * correct reading.
525 */
37ad04d7
GR
526 oldh = lm90_read_reg(client, regh);
527 if (oldh < 0)
528 return oldh;
529 l = lm90_read_reg(client, regl);
530 if (l < 0)
531 return l;
532 newh = lm90_read_reg(client, regh);
533 if (newh < 0)
534 return newh;
15b66ab6 535 if (oldh != newh) {
37ad04d7
GR
536 l = lm90_read_reg(client, regl);
537 if (l < 0)
538 return l;
15b66ab6 539 }
37ad04d7 540 return (newh << 8) | l;
15b66ab6
GR
541}
542
543/*
544 * client->update_lock must be held when calling this function (unless we are
545 * in detection or initialization steps), and while a remote channel other
546 * than channel 0 is selected. Also, calling code must make sure to re-select
547 * external channel 0 before releasing the lock. This is necessary because
548 * various registers have different meanings as a result of selecting a
549 * non-default remote channel.
550 */
37ad04d7
GR
551static inline int lm90_select_remote_channel(struct i2c_client *client,
552 struct lm90_data *data,
553 int channel)
15b66ab6 554{
37ad04d7 555 int config;
15b66ab6
GR
556
557 if (data->kind == max6696) {
37ad04d7
GR
558 config = lm90_read_reg(client, LM90_REG_R_CONFIG1);
559 if (config < 0)
560 return config;
15b66ab6
GR
561 config &= ~0x08;
562 if (channel)
563 config |= 0x08;
564 i2c_smbus_write_byte_data(client, LM90_REG_W_CONFIG1,
565 config);
566 }
37ad04d7 567 return 0;
15b66ab6
GR
568}
569
0c01b644
GR
570/*
571 * Set conversion rate.
572 * client->update_lock must be held when calling this function (unless we are
573 * in detection or initialization steps).
574 */
eb1c8f43
GR
575static int lm90_set_convrate(struct i2c_client *client, struct lm90_data *data,
576 unsigned int interval)
0c01b644 577{
0c01b644 578 unsigned int update_interval;
eb1c8f43 579 int i, err;
0c01b644
GR
580
581 /* Shift calculations to avoid rounding errors */
582 interval <<= 6;
583
584 /* find the nearest update rate */
585 for (i = 0, update_interval = LM90_MAX_CONVRATE_MS << 6;
586 i < data->max_convrate; i++, update_interval >>= 1)
587 if (interval >= update_interval * 3 / 4)
588 break;
589
eb1c8f43 590 err = i2c_smbus_write_byte_data(client, LM90_REG_W_CONVRATE, i);
0c01b644 591 data->update_interval = DIV_ROUND_CLOSEST(update_interval, 64);
eb1c8f43 592 return err;
0c01b644
GR
593}
594
10bfef47
GR
595static int lm90_update_limits(struct device *dev)
596{
597 struct lm90_data *data = dev_get_drvdata(dev);
598 struct i2c_client *client = data->client;
599 int val;
600
601 val = lm90_read_reg(client, LM90_REG_R_LOCAL_CRIT);
602 if (val < 0)
603 return val;
604 data->temp8[LOCAL_CRIT] = val;
605
606 val = lm90_read_reg(client, LM90_REG_R_REMOTE_CRIT);
607 if (val < 0)
608 return val;
609 data->temp8[REMOTE_CRIT] = val;
610
611 val = lm90_read_reg(client, LM90_REG_R_TCRIT_HYST);
612 if (val < 0)
613 return val;
614 data->temp_hyst = val;
615
be9d6374 616 val = lm90_read_reg(client, LM90_REG_R_REMOTE_LOWH);
10bfef47
GR
617 if (val < 0)
618 return val;
619 data->temp11[REMOTE_LOW] = val << 8;
620
621 if (data->flags & LM90_HAVE_REM_LIMIT_EXT) {
622 val = lm90_read_reg(client, LM90_REG_R_REMOTE_LOWL);
623 if (val < 0)
624 return val;
625 data->temp11[REMOTE_LOW] |= val;
626 }
627
628 val = lm90_read_reg(client, LM90_REG_R_REMOTE_HIGHH);
629 if (val < 0)
630 return val;
631 data->temp11[REMOTE_HIGH] = val << 8;
632
633 if (data->flags & LM90_HAVE_REM_LIMIT_EXT) {
634 val = lm90_read_reg(client, LM90_REG_R_REMOTE_HIGHL);
635 if (val < 0)
636 return val;
637 data->temp11[REMOTE_HIGH] |= val;
638 }
639
640 if (data->flags & LM90_HAVE_OFFSET) {
641 val = lm90_read16(client, LM90_REG_R_REMOTE_OFFSH,
642 LM90_REG_R_REMOTE_OFFSL);
643 if (val < 0)
644 return val;
645 data->temp11[REMOTE_OFFSET] = val;
646 }
647
648 if (data->flags & LM90_HAVE_EMERGENCY) {
649 val = lm90_read_reg(client, MAX6659_REG_R_LOCAL_EMERG);
650 if (val < 0)
651 return val;
652 data->temp8[LOCAL_EMERG] = val;
653
654 val = lm90_read_reg(client, MAX6659_REG_R_REMOTE_EMERG);
655 if (val < 0)
656 return val;
657 data->temp8[REMOTE_EMERG] = val;
658 }
659
660 if (data->kind == max6696) {
661 val = lm90_select_remote_channel(client, data, 1);
662 if (val < 0)
663 return val;
664
665 val = lm90_read_reg(client, LM90_REG_R_REMOTE_CRIT);
666 if (val < 0)
667 return val;
668 data->temp8[REMOTE2_CRIT] = val;
669
670 val = lm90_read_reg(client, MAX6659_REG_R_REMOTE_EMERG);
671 if (val < 0)
672 return val;
673 data->temp8[REMOTE2_EMERG] = val;
674
675 val = lm90_read_reg(client, LM90_REG_R_REMOTE_LOWH);
676 if (val < 0)
677 return val;
678 data->temp11[REMOTE2_LOW] = val << 8;
679
680 val = lm90_read_reg(client, LM90_REG_R_REMOTE_HIGHH);
681 if (val < 0)
682 return val;
683 data->temp11[REMOTE2_HIGH] = val << 8;
684
685 lm90_select_remote_channel(client, data, 0);
686 }
687
688 return 0;
689}
690
eb1c8f43 691static int lm90_update_device(struct device *dev)
15b66ab6 692{
1de8b250
GR
693 struct lm90_data *data = dev_get_drvdata(dev);
694 struct i2c_client *client = data->client;
0c01b644 695 unsigned long next_update;
eb1c8f43 696 int val;
15b66ab6 697
10bfef47
GR
698 if (!data->valid) {
699 val = lm90_update_limits(dev);
700 if (val < 0)
eb1c8f43 701 return val;
10bfef47
GR
702 }
703
78c2c2fe
JD
704 next_update = data->last_updated +
705 msecs_to_jiffies(data->update_interval);
0c01b644 706 if (time_after(jiffies, next_update) || !data->valid) {
15b66ab6 707 dev_dbg(&client->dev, "Updating lm90 data.\n");
10bfef47 708
2f83ab77 709 data->valid = false;
10bfef47 710
37ad04d7
GR
711 val = lm90_read_reg(client, LM90_REG_R_LOCAL_LOW);
712 if (val < 0)
eb1c8f43 713 return val;
37ad04d7
GR
714 data->temp8[LOCAL_LOW] = val;
715
716 val = lm90_read_reg(client, LM90_REG_R_LOCAL_HIGH);
717 if (val < 0)
eb1c8f43 718 return val;
37ad04d7
GR
719 data->temp8[LOCAL_HIGH] = val;
720
a095f687 721 if (data->reg_local_ext) {
37ad04d7
GR
722 val = lm90_read16(client, LM90_REG_R_LOCAL_TEMP,
723 data->reg_local_ext);
724 if (val < 0)
eb1c8f43 725 return val;
37ad04d7 726 data->temp11[LOCAL_TEMP] = val;
15b66ab6 727 } else {
37ad04d7
GR
728 val = lm90_read_reg(client, LM90_REG_R_LOCAL_TEMP);
729 if (val < 0)
eb1c8f43 730 return val;
37ad04d7 731 data->temp11[LOCAL_TEMP] = val << 8;
15b66ab6 732 }
37ad04d7
GR
733 val = lm90_read16(client, LM90_REG_R_REMOTE_TEMPH,
734 LM90_REG_R_REMOTE_TEMPL);
735 if (val < 0)
eb1c8f43 736 return val;
37ad04d7
GR
737 data->temp11[REMOTE_TEMP] = val;
738
37ad04d7
GR
739 val = lm90_read_reg(client, LM90_REG_R_STATUS);
740 if (val < 0)
eb1c8f43 741 return val;
37ad04d7 742 data->alarms = val; /* lower 8 bit of alarms */
15b66ab6
GR
743
744 if (data->kind == max6696) {
37ad04d7
GR
745 val = lm90_select_remote_channel(client, data, 1);
746 if (val < 0)
eb1c8f43 747 return val;
37ad04d7 748
37ad04d7
GR
749 val = lm90_read16(client, LM90_REG_R_REMOTE_TEMPH,
750 LM90_REG_R_REMOTE_TEMPL);
eb1c8f43
GR
751 if (val < 0) {
752 lm90_select_remote_channel(client, data, 0);
753 return val;
754 }
37ad04d7
GR
755 data->temp11[REMOTE2_TEMP] = val;
756
15b66ab6
GR
757 lm90_select_remote_channel(client, data, 0);
758
37ad04d7
GR
759 val = lm90_read_reg(client, MAX6696_REG_R_STATUS2);
760 if (val < 0)
eb1c8f43 761 return val;
37ad04d7 762 data->alarms |= val << 8;
15b66ab6
GR
763 }
764
f36ffeab
GR
765 /*
766 * Re-enable ALERT# output if it was originally enabled and
767 * relevant alarms are all clear
768 */
37ad04d7
GR
769 if (!(data->config_orig & 0x80) &&
770 !(data->alarms & data->alert_alarms)) {
771 val = lm90_read_reg(client, LM90_REG_R_CONFIG1);
772 if (val < 0)
eb1c8f43 773 return val;
15b66ab6 774
37ad04d7 775 if (val & 0x80) {
15b66ab6
GR
776 dev_dbg(&client->dev, "Re-enabling ALERT#\n");
777 i2c_smbus_write_byte_data(client,
778 LM90_REG_W_CONFIG1,
37ad04d7 779 val & ~0x80);
15b66ab6
GR
780 }
781 }
782
783 data->last_updated = jiffies;
2f83ab77 784 data->valid = true;
15b66ab6
GR
785 }
786
eb1c8f43 787 return 0;
15b66ab6
GR
788}
789
cea50fe2
NC
790/*
791 * Conversions
792 * For local temperatures and limits, critical limits and the hysteresis
793 * value, the LM90 uses signed 8-bit values with LSB = 1 degree Celsius.
794 * For remote temperatures and limits, it uses signed 11-bit values with
271dabf5
BH
795 * LSB = 0.125 degree Celsius, left-justified in 16-bit registers. Some
796 * Maxim chips use unsigned values.
cea50fe2
NC
797 */
798
9d4d3834 799static inline int temp_from_s8(s8 val)
cea50fe2
NC
800{
801 return val * 1000;
802}
803
271dabf5
BH
804static inline int temp_from_u8(u8 val)
805{
806 return val * 1000;
807}
808
9d4d3834 809static inline int temp_from_s16(s16 val)
cea50fe2
NC
810{
811 return val / 32 * 125;
812}
813
271dabf5
BH
814static inline int temp_from_u16(u16 val)
815{
816 return val / 32 * 125;
817}
818
9d4d3834 819static s8 temp_to_s8(long val)
cea50fe2
NC
820{
821 if (val <= -128000)
822 return -128;
823 if (val >= 127000)
824 return 127;
825 if (val < 0)
826 return (val - 500) / 1000;
827 return (val + 500) / 1000;
828}
829
271dabf5
BH
830static u8 temp_to_u8(long val)
831{
832 if (val <= 0)
833 return 0;
834 if (val >= 255000)
835 return 255;
836 return (val + 500) / 1000;
837}
838
9d4d3834 839static s16 temp_to_s16(long val)
cea50fe2
NC
840{
841 if (val <= -128000)
842 return 0x8000;
843 if (val >= 127875)
844 return 0x7FE0;
845 if (val < 0)
846 return (val - 62) / 125 * 32;
847 return (val + 62) / 125 * 32;
848}
849
850static u8 hyst_to_reg(long val)
851{
852 if (val <= 0)
853 return 0;
854 if (val >= 30500)
855 return 31;
856 return (val + 500) / 1000;
857}
858
859/*
23b2d477
NC
860 * ADT7461 in compatibility mode is almost identical to LM90 except that
861 * attempts to write values that are outside the range 0 < temp < 127 are
862 * treated as the boundary value.
863 *
864 * ADT7461 in "extended mode" operation uses unsigned integers offset by
865 * 64 (e.g., 0 -> -64 degC). The range is restricted to -64..191 degC.
cea50fe2 866 */
9d4d3834 867static inline int temp_from_u8_adt7461(struct lm90_data *data, u8 val)
cea50fe2 868{
23b2d477
NC
869 if (data->flags & LM90_FLAG_ADT7461_EXT)
870 return (val - 64) * 1000;
589f707c 871 return temp_from_s8(val);
cea50fe2
NC
872}
873
9d4d3834 874static inline int temp_from_u16_adt7461(struct lm90_data *data, u16 val)
cea50fe2 875{
23b2d477
NC
876 if (data->flags & LM90_FLAG_ADT7461_EXT)
877 return (val - 0x4000) / 64 * 250;
589f707c 878 return temp_from_s16(val);
23b2d477
NC
879}
880
9d4d3834 881static u8 temp_to_u8_adt7461(struct lm90_data *data, long val)
23b2d477
NC
882{
883 if (data->flags & LM90_FLAG_ADT7461_EXT) {
884 if (val <= -64000)
885 return 0;
886 if (val >= 191000)
887 return 0xFF;
888 return (val + 500 + 64000) / 1000;
23b2d477 889 }
589f707c
GR
890 if (val <= 0)
891 return 0;
892 if (val >= 127000)
893 return 127;
894 return (val + 500) / 1000;
23b2d477
NC
895}
896
9d4d3834 897static u16 temp_to_u16_adt7461(struct lm90_data *data, long val)
23b2d477
NC
898{
899 if (data->flags & LM90_FLAG_ADT7461_EXT) {
900 if (val <= -64000)
901 return 0;
902 if (val >= 191750)
903 return 0xFFC0;
904 return (val + 64000 + 125) / 250 * 64;
23b2d477 905 }
589f707c
GR
906 if (val <= 0)
907 return 0;
908 if (val >= 127750)
909 return 0x7FC0;
910 return (val + 125) / 250 * 64;
cea50fe2
NC
911}
912
eb1c8f43 913/* pec used for ADM1032 only */
e57959a6 914static ssize_t pec_show(struct device *dev, struct device_attribute *dummy,
eb1c8f43 915 char *buf)
30d7394b 916{
eb1c8f43 917 struct i2c_client *client = to_i2c_client(dev);
97ae60bb 918
eb1c8f43 919 return sprintf(buf, "%d\n", !!(client->flags & I2C_CLIENT_PEC));
30d7394b
JD
920}
921
e57959a6
JL
922static ssize_t pec_store(struct device *dev, struct device_attribute *dummy,
923 const char *buf, size_t count)
30d7394b 924{
eb1c8f43 925 struct i2c_client *client = to_i2c_client(dev);
11e57812
GR
926 long val;
927 int err;
928
179c4fdb 929 err = kstrtol(buf, 10, &val);
11e57812
GR
930 if (err < 0)
931 return err;
30d7394b 932
eb1c8f43
GR
933 switch (val) {
934 case 0:
935 client->flags &= ~I2C_CLIENT_PEC;
936 break;
937 case 1:
938 client->flags |= I2C_CLIENT_PEC;
939 break;
940 default:
941 return -EINVAL;
942 }
06e1c0a2 943
30d7394b 944 return count;
1da177e4 945}
30d7394b 946
e57959a6 947static DEVICE_ATTR_RW(pec);
eb1c8f43
GR
948
949static int lm90_get_temp11(struct lm90_data *data, int index)
30d7394b 950{
eb1c8f43 951 s16 temp11 = data->temp11[index];
23b2d477
NC
952 int temp;
953
1daaceb2 954 if (data->kind == adt7461 || data->kind == tmp451)
eb1c8f43 955 temp = temp_from_u16_adt7461(data, temp11);
271dabf5 956 else if (data->kind == max6646)
eb1c8f43 957 temp = temp_from_u16(temp11);
23b2d477 958 else
eb1c8f43 959 temp = temp_from_s16(temp11);
23b2d477 960
97ae60bb 961 /* +16 degrees offset for temp2 for the LM99 */
eb1c8f43 962 if (data->kind == lm99 && index <= 2)
97ae60bb
JD
963 temp += 16000;
964
eb1c8f43 965 return temp;
1da177e4 966}
30d7394b 967
eb1c8f43 968static int lm90_set_temp11(struct lm90_data *data, int index, long val)
30d7394b 969{
eb1c8f43 970 static struct reg {
96512861
GR
971 u8 high;
972 u8 low;
eb1c8f43
GR
973 } reg[] = {
974 [REMOTE_LOW] = { LM90_REG_W_REMOTE_LOWH, LM90_REG_W_REMOTE_LOWL },
975 [REMOTE_HIGH] = { LM90_REG_W_REMOTE_HIGHH, LM90_REG_W_REMOTE_HIGHL },
976 [REMOTE_OFFSET] = { LM90_REG_W_REMOTE_OFFSH, LM90_REG_W_REMOTE_OFFSL },
977 [REMOTE2_LOW] = { LM90_REG_W_REMOTE_LOWH, LM90_REG_W_REMOTE_LOWL },
978 [REMOTE2_HIGH] = { LM90_REG_W_REMOTE_HIGHH, LM90_REG_W_REMOTE_HIGHL }
30d7394b 979 };
1de8b250 980 struct i2c_client *client = data->client;
eb1c8f43 981 struct reg *regp = &reg[index];
11e57812
GR
982 int err;
983
97ae60bb 984 /* +16 degrees offset for temp2 for the LM99 */
96512861 985 if (data->kind == lm99 && index <= 2)
97ae60bb
JD
986 val -= 16000;
987
1daaceb2 988 if (data->kind == adt7461 || data->kind == tmp451)
96512861 989 data->temp11[index] = temp_to_u16_adt7461(data, val);
271dabf5 990 else if (data->kind == max6646)
96512861 991 data->temp11[index] = temp_to_u8(val) << 8;
88073bb1 992 else if (data->flags & LM90_HAVE_REM_LIMIT_EXT)
96512861 993 data->temp11[index] = temp_to_s16(val);
88073bb1 994 else
96512861 995 data->temp11[index] = temp_to_s8(val) << 8;
5f502a83 996
eb1c8f43
GR
997 lm90_select_remote_channel(client, data, index >= 3);
998 err = i2c_smbus_write_byte_data(client, regp->high,
96512861 999 data->temp11[index] >> 8);
eb1c8f43
GR
1000 if (err < 0)
1001 return err;
88073bb1 1002 if (data->flags & LM90_HAVE_REM_LIMIT_EXT)
eb1c8f43
GR
1003 err = i2c_smbus_write_byte_data(client, regp->low,
1004 data->temp11[index] & 0xff);
06e1c0a2 1005
eb1c8f43
GR
1006 lm90_select_remote_channel(client, data, 0);
1007 return err;
1da177e4 1008}
30d7394b 1009
eb1c8f43 1010static int lm90_get_temp8(struct lm90_data *data, int index)
30d7394b 1011{
eb1c8f43 1012 s8 temp8 = data->temp8[index];
23b2d477
NC
1013 int temp;
1014
1daaceb2 1015 if (data->kind == adt7461 || data->kind == tmp451)
eb1c8f43 1016 temp = temp_from_u8_adt7461(data, temp8);
ec38fa2b 1017 else if (data->kind == max6646)
eb1c8f43 1018 temp = temp_from_u8(temp8);
23b2d477 1019 else
eb1c8f43 1020 temp = temp_from_s8(temp8);
23b2d477 1021
97ae60bb 1022 /* +16 degrees offset for temp2 for the LM99 */
eb1c8f43 1023 if (data->kind == lm99 && index == 3)
97ae60bb
JD
1024 temp += 16000;
1025
eb1c8f43 1026 return temp;
1da177e4 1027}
1da177e4 1028
eb1c8f43 1029static int lm90_set_temp8(struct lm90_data *data, int index, long val)
1da177e4 1030{
eb1c8f43
GR
1031 static const u8 reg[TEMP8_REG_NUM] = {
1032 LM90_REG_W_LOCAL_LOW,
1033 LM90_REG_W_LOCAL_HIGH,
1034 LM90_REG_W_LOCAL_CRIT,
1035 LM90_REG_W_REMOTE_CRIT,
1036 MAX6659_REG_W_LOCAL_EMERG,
1037 MAX6659_REG_W_REMOTE_EMERG,
1038 LM90_REG_W_REMOTE_CRIT,
1039 MAX6659_REG_W_REMOTE_EMERG,
1040 };
1de8b250 1041 struct i2c_client *client = data->client;
11e57812 1042 int err;
1da177e4 1043
eb1c8f43
GR
1044 /* +16 degrees offset for temp2 for the LM99 */
1045 if (data->kind == lm99 && index == 3)
1046 val -= 16000;
11e57812 1047
1daaceb2 1048 if (data->kind == adt7461 || data->kind == tmp451)
eb1c8f43 1049 data->temp8[index] = temp_to_u8_adt7461(data, val);
ec38fa2b 1050 else if (data->kind == max6646)
eb1c8f43 1051 data->temp8[index] = temp_to_u8(val);
ec38fa2b 1052 else
eb1c8f43 1053 data->temp8[index] = temp_to_s8(val);
ec38fa2b 1054
eb1c8f43
GR
1055 lm90_select_remote_channel(client, data, index >= 6);
1056 err = i2c_smbus_write_byte_data(client, reg[index], data->temp8[index]);
1057 lm90_select_remote_channel(client, data, 0);
37ad04d7 1058
eb1c8f43 1059 return err;
1da177e4
LT
1060}
1061
eb1c8f43 1062static int lm90_get_temphyst(struct lm90_data *data, int index)
2d45771e 1063{
eb1c8f43 1064 int temp;
37ad04d7 1065
eb1c8f43
GR
1066 if (data->kind == adt7461 || data->kind == tmp451)
1067 temp = temp_from_u8_adt7461(data, data->temp8[index]);
1068 else if (data->kind == max6646)
1069 temp = temp_from_u8(data->temp8[index]);
1070 else
1071 temp = temp_from_s8(data->temp8[index]);
2d45771e 1072
eb1c8f43
GR
1073 /* +16 degrees offset for temp2 for the LM99 */
1074 if (data->kind == lm99 && index == 3)
1075 temp += 16000;
0c01b644 1076
eb1c8f43 1077 return temp - temp_from_s8(data->temp_hyst);
0c01b644
GR
1078}
1079
eb1c8f43 1080static int lm90_set_temphyst(struct lm90_data *data, long val)
0c01b644 1081{
1de8b250 1082 struct i2c_client *client = data->client;
eb1c8f43 1083 int temp;
0c01b644
GR
1084 int err;
1085
eb1c8f43
GR
1086 if (data->kind == adt7461 || data->kind == tmp451)
1087 temp = temp_from_u8_adt7461(data, data->temp8[LOCAL_CRIT]);
1088 else if (data->kind == max6646)
1089 temp = temp_from_u8(data->temp8[LOCAL_CRIT]);
1090 else
1091 temp = temp_from_s8(data->temp8[LOCAL_CRIT]);
0c01b644 1092
eb1c8f43
GR
1093 data->temp_hyst = hyst_to_reg(temp - val);
1094 err = i2c_smbus_write_byte_data(client, LM90_REG_W_TCRIT_HYST,
1095 data->temp_hyst);
1096 return err;
0c01b644
GR
1097}
1098
eb1c8f43
GR
1099static const u8 lm90_temp_index[3] = {
1100 LOCAL_TEMP, REMOTE_TEMP, REMOTE2_TEMP
0e39e01c
JD
1101};
1102
eb1c8f43
GR
1103static const u8 lm90_temp_min_index[3] = {
1104 LOCAL_LOW, REMOTE_LOW, REMOTE2_LOW
0e39e01c
JD
1105};
1106
eb1c8f43
GR
1107static const u8 lm90_temp_max_index[3] = {
1108 LOCAL_HIGH, REMOTE_HIGH, REMOTE2_HIGH
742192f5
GR
1109};
1110
eb1c8f43
GR
1111static const u8 lm90_temp_crit_index[3] = {
1112 LOCAL_CRIT, REMOTE_CRIT, REMOTE2_CRIT
742192f5
GR
1113};
1114
eb1c8f43
GR
1115static const u8 lm90_temp_emerg_index[3] = {
1116 LOCAL_EMERG, REMOTE_EMERG, REMOTE2_EMERG
6948708d
GR
1117};
1118
eb1c8f43 1119static const u8 lm90_min_alarm_bits[3] = { 5, 3, 11 };
e9572fdd 1120static const u8 lm90_max_alarm_bits[3] = { 6, 4, 12 };
eb1c8f43
GR
1121static const u8 lm90_crit_alarm_bits[3] = { 0, 1, 9 };
1122static const u8 lm90_emergency_alarm_bits[3] = { 15, 13, 14 };
1123static const u8 lm90_fault_bits[3] = { 0, 2, 10 };
6948708d 1124
eb1c8f43
GR
1125static int lm90_temp_read(struct device *dev, u32 attr, int channel, long *val)
1126{
1127 struct lm90_data *data = dev_get_drvdata(dev);
1128 int err;
06e1c0a2 1129
eb1c8f43
GR
1130 mutex_lock(&data->update_lock);
1131 err = lm90_update_device(dev);
1132 mutex_unlock(&data->update_lock);
1133 if (err)
1134 return err;
06e1c0a2 1135
eb1c8f43
GR
1136 switch (attr) {
1137 case hwmon_temp_input:
1138 *val = lm90_get_temp11(data, lm90_temp_index[channel]);
1139 break;
1140 case hwmon_temp_min_alarm:
1141 *val = (data->alarms >> lm90_min_alarm_bits[channel]) & 1;
1142 break;
1143 case hwmon_temp_max_alarm:
1144 *val = (data->alarms >> lm90_max_alarm_bits[channel]) & 1;
1145 break;
1146 case hwmon_temp_crit_alarm:
1147 *val = (data->alarms >> lm90_crit_alarm_bits[channel]) & 1;
1148 break;
1149 case hwmon_temp_emergency_alarm:
1150 *val = (data->alarms >> lm90_emergency_alarm_bits[channel]) & 1;
1151 break;
1152 case hwmon_temp_fault:
1153 *val = (data->alarms >> lm90_fault_bits[channel]) & 1;
1154 break;
1155 case hwmon_temp_min:
1156 if (channel == 0)
1157 *val = lm90_get_temp8(data,
1158 lm90_temp_min_index[channel]);
1159 else
1160 *val = lm90_get_temp11(data,
1161 lm90_temp_min_index[channel]);
1162 break;
1163 case hwmon_temp_max:
1164 if (channel == 0)
1165 *val = lm90_get_temp8(data,
1166 lm90_temp_max_index[channel]);
1167 else
1168 *val = lm90_get_temp11(data,
1169 lm90_temp_max_index[channel]);
1170 break;
1171 case hwmon_temp_crit:
1172 *val = lm90_get_temp8(data, lm90_temp_crit_index[channel]);
1173 break;
1174 case hwmon_temp_crit_hyst:
1175 *val = lm90_get_temphyst(data, lm90_temp_crit_index[channel]);
1176 break;
1177 case hwmon_temp_emergency:
1178 *val = lm90_get_temp8(data, lm90_temp_emerg_index[channel]);
1179 break;
1180 case hwmon_temp_emergency_hyst:
1181 *val = lm90_get_temphyst(data, lm90_temp_emerg_index[channel]);
1182 break;
1183 case hwmon_temp_offset:
1184 *val = lm90_get_temp11(data, REMOTE_OFFSET);
1185 break;
1186 default:
1187 return -EOPNOTSUPP;
1188 }
1189 return 0;
1190}
06e1c0a2 1191
eb1c8f43
GR
1192static int lm90_temp_write(struct device *dev, u32 attr, int channel, long val)
1193{
1194 struct lm90_data *data = dev_get_drvdata(dev);
1195 int err;
06e1c0a2 1196
eb1c8f43 1197 mutex_lock(&data->update_lock);
06e1c0a2 1198
eb1c8f43
GR
1199 err = lm90_update_device(dev);
1200 if (err)
1201 goto error;
1202
1203 switch (attr) {
1204 case hwmon_temp_min:
1205 if (channel == 0)
1206 err = lm90_set_temp8(data,
1207 lm90_temp_min_index[channel],
1208 val);
1209 else
1210 err = lm90_set_temp11(data,
1211 lm90_temp_min_index[channel],
1212 val);
1213 break;
1214 case hwmon_temp_max:
1215 if (channel == 0)
1216 err = lm90_set_temp8(data,
1217 lm90_temp_max_index[channel],
1218 val);
1219 else
1220 err = lm90_set_temp11(data,
1221 lm90_temp_max_index[channel],
1222 val);
1223 break;
1224 case hwmon_temp_crit:
1225 err = lm90_set_temp8(data, lm90_temp_crit_index[channel], val);
1226 break;
1227 case hwmon_temp_crit_hyst:
1228 err = lm90_set_temphyst(data, val);
1229 break;
1230 case hwmon_temp_emergency:
1231 err = lm90_set_temp8(data, lm90_temp_emerg_index[channel], val);
1232 break;
1233 case hwmon_temp_offset:
1234 err = lm90_set_temp11(data, REMOTE_OFFSET, val);
1235 break;
1236 default:
1237 err = -EOPNOTSUPP;
1238 break;
1239 }
1240error:
1241 mutex_unlock(&data->update_lock);
1242
1243 return err;
1244}
1245
1246static umode_t lm90_temp_is_visible(const void *data, u32 attr, int channel)
c3df5806 1247{
eb1c8f43
GR
1248 switch (attr) {
1249 case hwmon_temp_input:
1250 case hwmon_temp_min_alarm:
1251 case hwmon_temp_max_alarm:
1252 case hwmon_temp_crit_alarm:
1253 case hwmon_temp_emergency_alarm:
1254 case hwmon_temp_emergency_hyst:
1255 case hwmon_temp_fault:
3334851d 1256 return 0444;
eb1c8f43
GR
1257 case hwmon_temp_min:
1258 case hwmon_temp_max:
1259 case hwmon_temp_crit:
1260 case hwmon_temp_emergency:
1261 case hwmon_temp_offset:
3334851d 1262 return 0644;
eb1c8f43
GR
1263 case hwmon_temp_crit_hyst:
1264 if (channel == 0)
3334851d
GR
1265 return 0644;
1266 return 0444;
eb1c8f43
GR
1267 default:
1268 return 0;
1269 }
c3df5806
JD
1270}
1271
eb1c8f43 1272static int lm90_chip_read(struct device *dev, u32 attr, int channel, long *val)
c3df5806 1273{
eb1c8f43 1274 struct lm90_data *data = dev_get_drvdata(dev);
11e57812
GR
1275 int err;
1276
eb1c8f43
GR
1277 mutex_lock(&data->update_lock);
1278 err = lm90_update_device(dev);
1279 mutex_unlock(&data->update_lock);
1280 if (err)
11e57812 1281 return err;
c3df5806 1282
eb1c8f43
GR
1283 switch (attr) {
1284 case hwmon_chip_update_interval:
1285 *val = data->update_interval;
c3df5806 1286 break;
eb1c8f43
GR
1287 case hwmon_chip_alarms:
1288 *val = data->alarms;
c3df5806
JD
1289 break;
1290 default:
eb1c8f43 1291 return -EOPNOTSUPP;
c3df5806
JD
1292 }
1293
eb1c8f43 1294 return 0;
c3df5806
JD
1295}
1296
eb1c8f43
GR
1297static int lm90_chip_write(struct device *dev, u32 attr, int channel, long val)
1298{
1299 struct lm90_data *data = dev_get_drvdata(dev);
1300 struct i2c_client *client = data->client;
1301 int err;
c3df5806 1302
eb1c8f43
GR
1303 mutex_lock(&data->update_lock);
1304
1305 err = lm90_update_device(dev);
1306 if (err)
1307 goto error;
1308
1309 switch (attr) {
1310 case hwmon_chip_update_interval:
1311 err = lm90_set_convrate(client, data,
1312 clamp_val(val, 0, 100000));
1313 break;
1314 default:
1315 err = -EOPNOTSUPP;
1316 break;
1317 }
1318error:
1319 mutex_unlock(&data->update_lock);
1320
1321 return err;
1322}
1323
1324static umode_t lm90_chip_is_visible(const void *data, u32 attr, int channel)
1325{
1326 switch (attr) {
1327 case hwmon_chip_update_interval:
3334851d 1328 return 0644;
eb1c8f43 1329 case hwmon_chip_alarms:
3334851d 1330 return 0444;
eb1c8f43
GR
1331 default:
1332 return 0;
1333 }
1334}
1335
1336static int lm90_read(struct device *dev, enum hwmon_sensor_types type,
1337 u32 attr, int channel, long *val)
1338{
1339 switch (type) {
1340 case hwmon_chip:
1341 return lm90_chip_read(dev, attr, channel, val);
1342 case hwmon_temp:
1343 return lm90_temp_read(dev, attr, channel, val);
1344 default:
1345 return -EOPNOTSUPP;
1346 }
1347}
1348
1349static int lm90_write(struct device *dev, enum hwmon_sensor_types type,
1350 u32 attr, int channel, long val)
1351{
1352 switch (type) {
1353 case hwmon_chip:
1354 return lm90_chip_write(dev, attr, channel, val);
1355 case hwmon_temp:
1356 return lm90_temp_write(dev, attr, channel, val);
1357 default:
1358 return -EOPNOTSUPP;
1359 }
1360}
1361
1362static umode_t lm90_is_visible(const void *data, enum hwmon_sensor_types type,
1363 u32 attr, int channel)
1364{
1365 switch (type) {
1366 case hwmon_chip:
1367 return lm90_chip_is_visible(data, attr, channel);
1368 case hwmon_temp:
1369 return lm90_temp_is_visible(data, attr, channel);
1370 default:
1371 return 0;
1372 }
1373}
1da177e4 1374
15b66ab6 1375/* Return 0 if detection is successful, -ENODEV otherwise */
b2589ab0 1376static int lm90_detect(struct i2c_client *client,
15b66ab6 1377 struct i2c_board_info *info)
8256fe0f 1378{
b2589ab0
JD
1379 struct i2c_adapter *adapter = client->adapter;
1380 int address = client->addr;
15b66ab6 1381 const char *name = NULL;
b2589ab0 1382 int man_id, chip_id, config1, config2, convrate;
8256fe0f 1383
15b66ab6
GR
1384 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1385 return -ENODEV;
1da177e4 1386
8f2fa77c 1387 /* detection and identification */
b2589ab0
JD
1388 man_id = i2c_smbus_read_byte_data(client, LM90_REG_R_MAN_ID);
1389 chip_id = i2c_smbus_read_byte_data(client, LM90_REG_R_CHIP_ID);
1390 config1 = i2c_smbus_read_byte_data(client, LM90_REG_R_CONFIG1);
1391 convrate = i2c_smbus_read_byte_data(client, LM90_REG_R_CONVRATE);
1392 if (man_id < 0 || chip_id < 0 || config1 < 0 || convrate < 0)
8f2fa77c
JD
1393 return -ENODEV;
1394
f90be42f 1395 if (man_id == 0x01 || man_id == 0x5C || man_id == 0x41) {
b2589ab0
JD
1396 config2 = i2c_smbus_read_byte_data(client, LM90_REG_R_CONFIG2);
1397 if (config2 < 0)
9b0e8526 1398 return -ENODEV;
f90be42f 1399 } else
b2589ab0 1400 config2 = 0; /* Make compiler happy */
8f2fa77c 1401
f90be42f
JD
1402 if ((address == 0x4C || address == 0x4D)
1403 && man_id == 0x01) { /* National Semiconductor */
b2589ab0
JD
1404 if ((config1 & 0x2A) == 0x00
1405 && (config2 & 0xF8) == 0x00
1406 && convrate <= 0x09) {
8f2fa77c
JD
1407 if (address == 0x4C
1408 && (chip_id & 0xF0) == 0x20) { /* LM90 */
1409 name = "lm90";
32c82a93 1410 } else
8f2fa77c
JD
1411 if ((chip_id & 0xF0) == 0x30) { /* LM89/LM99 */
1412 name = "lm99";
1413 dev_info(&adapter->dev,
1414 "Assuming LM99 chip at 0x%02x\n",
1415 address);
1416 dev_info(&adapter->dev,
1417 "If it is an LM89, instantiate it "
1418 "with the new_device sysfs "
1419 "interface\n");
271dabf5 1420 } else
8f2fa77c
JD
1421 if (address == 0x4C
1422 && (chip_id & 0xF0) == 0x10) { /* LM86 */
1423 name = "lm86";
1da177e4
LT
1424 }
1425 }
8f2fa77c
JD
1426 } else
1427 if ((address == 0x4C || address == 0x4D)
1428 && man_id == 0x41) { /* Analog Devices */
1429 if ((chip_id & 0xF0) == 0x40 /* ADM1032 */
b2589ab0
JD
1430 && (config1 & 0x3F) == 0x00
1431 && convrate <= 0x0A) {
8f2fa77c 1432 name = "adm1032";
f36ffeab
GR
1433 /*
1434 * The ADM1032 supports PEC, but only if combined
1435 * transactions are not used.
1436 */
8f2fa77c
JD
1437 if (i2c_check_functionality(adapter,
1438 I2C_FUNC_SMBUS_BYTE))
1439 info->flags |= I2C_CLIENT_PEC;
1440 } else
1441 if (chip_id == 0x51 /* ADT7461 */
b2589ab0
JD
1442 && (config1 & 0x1B) == 0x00
1443 && convrate <= 0x0A) {
8f2fa77c 1444 name = "adt7461";
5a4e5e6a
GR
1445 } else
1446 if (chip_id == 0x57 /* ADT7461A, NCT1008 */
b2589ab0
JD
1447 && (config1 & 0x1B) == 0x00
1448 && convrate <= 0x0A) {
5a4e5e6a 1449 name = "adt7461a";
8f2fa77c
JD
1450 }
1451 } else
1452 if (man_id == 0x4D) { /* Maxim */
b2589ab0 1453 int emerg, emerg2, status2;
06e1c0a2
GR
1454
1455 /*
1456 * We read MAX6659_REG_R_REMOTE_EMERG twice, and re-read
1457 * LM90_REG_R_MAN_ID in between. If MAX6659_REG_R_REMOTE_EMERG
1458 * exists, both readings will reflect the same value. Otherwise,
1459 * the readings will be different.
1460 */
b2589ab0
JD
1461 emerg = i2c_smbus_read_byte_data(client,
1462 MAX6659_REG_R_REMOTE_EMERG);
1463 man_id = i2c_smbus_read_byte_data(client,
8dc089d6 1464 LM90_REG_R_MAN_ID);
b2589ab0 1465 emerg2 = i2c_smbus_read_byte_data(client,
8dc089d6 1466 MAX6659_REG_R_REMOTE_EMERG);
b2589ab0
JD
1467 status2 = i2c_smbus_read_byte_data(client,
1468 MAX6696_REG_R_STATUS2);
1469 if (emerg < 0 || man_id < 0 || emerg2 < 0 || status2 < 0)
06e1c0a2
GR
1470 return -ENODEV;
1471
8f2fa77c
JD
1472 /*
1473 * The MAX6657, MAX6658 and MAX6659 do NOT have a chip_id
1474 * register. Reading from that address will return the last
1475 * read value, which in our case is those of the man_id
1476 * register. Likewise, the config1 register seems to lack a
1477 * low nibble, so the value will be those of the previous
1478 * read, so in our case those of the man_id register.
13c84951
GR
1479 * MAX6659 has a third set of upper temperature limit registers.
1480 * Those registers also return values on MAX6657 and MAX6658,
1481 * thus the only way to detect MAX6659 is by its address.
1482 * For this reason it will be mis-detected as MAX6657 if its
1483 * address is 0x4C.
8f2fa77c
JD
1484 */
1485 if (chip_id == man_id
13c84951 1486 && (address == 0x4C || address == 0x4D || address == 0x4E)
b2589ab0
JD
1487 && (config1 & 0x1F) == (man_id & 0x0F)
1488 && convrate <= 0x09) {
13c84951
GR
1489 if (address == 0x4C)
1490 name = "max6657";
1491 else
1492 name = "max6659";
8f2fa77c 1493 } else
06e1c0a2
GR
1494 /*
1495 * Even though MAX6695 and MAX6696 do not have a chip ID
1496 * register, reading it returns 0x01. Bit 4 of the config1
1497 * register is unused and should return zero when read. Bit 0 of
1498 * the status2 register is unused and should return zero when
1499 * read.
1500 *
1501 * MAX6695 and MAX6696 have an additional set of temperature
1502 * limit registers. We can detect those chips by checking if
1503 * one of those registers exists.
1504 */
1505 if (chip_id == 0x01
b2589ab0
JD
1506 && (config1 & 0x10) == 0x00
1507 && (status2 & 0x01) == 0x00
1508 && emerg == emerg2
1509 && convrate <= 0x07) {
06e1c0a2
GR
1510 name = "max6696";
1511 } else
8f2fa77c
JD
1512 /*
1513 * The chip_id register of the MAX6680 and MAX6681 holds the
1514 * revision of the chip. The lowest bit of the config1 register
1515 * is unused and should return zero when read, so should the
1516 * second to last bit of config1 (software reset).
1517 */
1518 if (chip_id == 0x01
b2589ab0
JD
1519 && (config1 & 0x03) == 0x00
1520 && convrate <= 0x07) {
8f2fa77c
JD
1521 name = "max6680";
1522 } else
1523 /*
1524 * The chip_id register of the MAX6646/6647/6649 holds the
1525 * revision of the chip. The lowest 6 bits of the config1
1526 * register are unused and should return zero when read.
1527 */
1528 if (chip_id == 0x59
b2589ab0
JD
1529 && (config1 & 0x3f) == 0x00
1530 && convrate <= 0x07) {
8f2fa77c 1531 name = "max6646";
1da177e4 1532 }
6771ea1f
JD
1533 } else
1534 if (address == 0x4C
1535 && man_id == 0x5C) { /* Winbond/Nuvoton */
b2589ab0
JD
1536 if ((config1 & 0x2A) == 0x00
1537 && (config2 & 0xF8) == 0x00) {
c4f99a2b 1538 if (chip_id == 0x01 /* W83L771W/G */
b2589ab0 1539 && convrate <= 0x09) {
c4f99a2b
JD
1540 name = "w83l771";
1541 } else
1542 if ((chip_id & 0xFE) == 0x10 /* W83L771AWG/ASG */
b2589ab0 1543 && convrate <= 0x08) {
c4f99a2b
JD
1544 name = "w83l771";
1545 }
6771ea1f 1546 }
2ef01793 1547 } else
6d101c58
JD
1548 if (address >= 0x48 && address <= 0x4F
1549 && man_id == 0xA1) { /* NXP Semiconductor/Philips */
6d101c58 1550 if (chip_id == 0x00
b2589ab0
JD
1551 && (config1 & 0x2A) == 0x00
1552 && (config2 & 0xFE) == 0x00
1553 && convrate <= 0x09) {
2ef01793
SD
1554 name = "sa56004";
1555 }
ae544f64
GR
1556 } else
1557 if ((address == 0x4C || address == 0x4D)
1558 && man_id == 0x47) { /* GMT */
1559 if (chip_id == 0x01 /* G781 */
1560 && (config1 & 0x3F) == 0x00
1561 && convrate <= 0x08)
1562 name = "g781";
1daaceb2
WN
1563 } else
1564 if (address == 0x4C
1565 && man_id == 0x55) { /* Texas Instruments */
1566 int local_ext;
1567
1568 local_ext = i2c_smbus_read_byte_data(client,
1569 TMP451_REG_R_LOCAL_TEMPL);
1570
1571 if (chip_id == 0x00 /* TMP451 */
1572 && (config1 & 0x1B) == 0x00
1573 && convrate <= 0x09
1574 && (local_ext & 0x0F) == 0x00)
1575 name = "tmp451";
1da177e4
LT
1576 }
1577
8f2fa77c
JD
1578 if (!name) { /* identification failed */
1579 dev_dbg(&adapter->dev,
1580 "Unsupported chip at 0x%02x (man_id=0x%02X, "
1581 "chip_id=0x%02X)\n", address, man_id, chip_id);
1582 return -ENODEV;
1da177e4 1583 }
8f2fa77c 1584
9b0e8526
JD
1585 strlcpy(info->type, name, I2C_NAME_SIZE);
1586
1587 return 0;
1588}
1589
1f17a444 1590static void lm90_restore_conf(void *_data)
f7001bb0 1591{
1f17a444
GR
1592 struct lm90_data *data = _data;
1593 struct i2c_client *client = data->client;
1594
f7001bb0
GR
1595 /* Restore initial configuration */
1596 i2c_smbus_write_byte_data(client, LM90_REG_W_CONVRATE,
1597 data->convrate_orig);
1598 i2c_smbus_write_byte_data(client, LM90_REG_W_CONFIG1,
1599 data->config_orig);
1600}
1601
37ad04d7 1602static int lm90_init_client(struct i2c_client *client, struct lm90_data *data)
15b66ab6 1603{
37ad04d7 1604 int config, convrate;
15b66ab6 1605
37ad04d7
GR
1606 convrate = lm90_read_reg(client, LM90_REG_R_CONVRATE);
1607 if (convrate < 0)
1608 return convrate;
0c01b644
GR
1609 data->convrate_orig = convrate;
1610
15b66ab6
GR
1611 /*
1612 * Start the conversions.
1613 */
0c01b644 1614 lm90_set_convrate(client, data, 500); /* 500ms; 2Hz conversion rate */
37ad04d7
GR
1615 config = lm90_read_reg(client, LM90_REG_R_CONFIG1);
1616 if (config < 0)
1617 return config;
15b66ab6
GR
1618 data->config_orig = config;
1619
1620 /* Check Temperature Range Select */
1daaceb2 1621 if (data->kind == adt7461 || data->kind == tmp451) {
15b66ab6
GR
1622 if (config & 0x04)
1623 data->flags |= LM90_FLAG_ADT7461_EXT;
1624 }
1625
1626 /*
1627 * Put MAX6680/MAX8881 into extended resolution (bit 0x10,
1628 * 0.125 degree resolution) and range (0x08, extend range
1629 * to -64 degree) mode for the remote temperature sensor.
1630 */
1631 if (data->kind == max6680)
1632 config |= 0x18;
1633
1634 /*
1635 * Select external channel 0 for max6695/96
1636 */
1637 if (data->kind == max6696)
1638 config &= ~0x08;
1639
1640 config &= 0xBF; /* run */
1641 if (config != data->config_orig) /* Only write if changed */
1642 i2c_smbus_write_byte_data(client, LM90_REG_W_CONFIG1, config);
1f17a444 1643
c5fcf01b 1644 return devm_add_action_or_reset(&client->dev, lm90_restore_conf, data);
15b66ab6
GR
1645}
1646
072de496
WN
1647static bool lm90_is_tripped(struct i2c_client *client, u16 *status)
1648{
1649 struct lm90_data *data = i2c_get_clientdata(client);
37ad04d7 1650 int st, st2 = 0;
072de496 1651
37ad04d7
GR
1652 st = lm90_read_reg(client, LM90_REG_R_STATUS);
1653 if (st < 0)
1654 return false;
072de496 1655
37ad04d7
GR
1656 if (data->kind == max6696) {
1657 st2 = lm90_read_reg(client, MAX6696_REG_R_STATUS2);
1658 if (st2 < 0)
1659 return false;
1660 }
072de496
WN
1661
1662 *status = st | (st2 << 8);
1663
1664 if ((st & 0x7f) == 0 && (st2 & 0xfe) == 0)
1665 return false;
1666
1667 if ((st & (LM90_STATUS_LLOW | LM90_STATUS_LHIGH | LM90_STATUS_LTHRM)) ||
1668 (st2 & MAX6696_STATUS2_LOT2))
1669 dev_warn(&client->dev,
1670 "temp%d out of range, please check!\n", 1);
1671 if ((st & (LM90_STATUS_RLOW | LM90_STATUS_RHIGH | LM90_STATUS_RTHRM)) ||
1672 (st2 & MAX6696_STATUS2_ROT2))
1673 dev_warn(&client->dev,
1674 "temp%d out of range, please check!\n", 2);
1675 if (st & LM90_STATUS_ROPEN)
1676 dev_warn(&client->dev,
1677 "temp%d diode open, please check!\n", 2);
1678 if (st2 & (MAX6696_STATUS2_R2LOW | MAX6696_STATUS2_R2HIGH |
1679 MAX6696_STATUS2_R2THRM | MAX6696_STATUS2_R2OT2))
1680 dev_warn(&client->dev,
1681 "temp%d out of range, please check!\n", 3);
1682 if (st2 & MAX6696_STATUS2_R2OPEN)
1683 dev_warn(&client->dev,
1684 "temp%d diode open, please check!\n", 3);
1685
1686 return true;
1687}
1688
109b1283
WN
1689static irqreturn_t lm90_irq_thread(int irq, void *dev_id)
1690{
1691 struct i2c_client *client = dev_id;
1692 u16 status;
1693
1694 if (lm90_is_tripped(client, &status))
1695 return IRQ_HANDLED;
1696 else
1697 return IRQ_NONE;
1698}
1699
1f17a444
GR
1700static void lm90_remove_pec(void *dev)
1701{
1702 device_remove_file(dev, &dev_attr_pec);
1703}
1704
1705static void lm90_regulator_disable(void *regulator)
1706{
1707 regulator_disable(regulator);
1708}
1709
eb1c8f43
GR
1710
1711static const struct hwmon_ops lm90_ops = {
1712 .is_visible = lm90_is_visible,
1713 .read = lm90_read,
1714 .write = lm90_write,
1715};
1716
b2589ab0 1717static int lm90_probe(struct i2c_client *client,
9b0e8526
JD
1718 const struct i2c_device_id *id)
1719{
b2589ab0
JD
1720 struct device *dev = &client->dev;
1721 struct i2c_adapter *adapter = to_i2c_adapter(dev->parent);
eb1c8f43 1722 struct hwmon_channel_info *info;
3e0f964f 1723 struct regulator *regulator;
6e5f62b9 1724 struct device *hwmon_dev;
eb1c8f43 1725 struct lm90_data *data;
9b0e8526 1726 int err;
1da177e4 1727
3e0f964f
WN
1728 regulator = devm_regulator_get(dev, "vcc");
1729 if (IS_ERR(regulator))
1730 return PTR_ERR(regulator);
1731
1732 err = regulator_enable(regulator);
1733 if (err < 0) {
d89fa686 1734 dev_err(dev, "Failed to enable regulator: %d\n", err);
3e0f964f
WN
1735 return err;
1736 }
1737
c5fcf01b
GR
1738 err = devm_add_action_or_reset(dev, lm90_regulator_disable, regulator);
1739 if (err)
1740 return err;
1f17a444 1741
d89fa686 1742 data = devm_kzalloc(dev, sizeof(struct lm90_data), GFP_KERNEL);
20f426ff
GR
1743 if (!data)
1744 return -ENOMEM;
1745
1de8b250 1746 data->client = client;
b2589ab0 1747 i2c_set_clientdata(client, data);
9a61bf63 1748 mutex_init(&data->update_lock);
1da177e4 1749
9b0e8526 1750 /* Set the device type */
df8d57bf
JMC
1751 if (client->dev.of_node)
1752 data->kind = (enum chips)of_device_get_match_data(&client->dev);
1753 else
1754 data->kind = id->driver_data;
9b0e8526
JD
1755 if (data->kind == adm1032) {
1756 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE))
b2589ab0 1757 client->flags &= ~I2C_CLIENT_PEC;
9b0e8526 1758 }
1da177e4 1759
f36ffeab
GR
1760 /*
1761 * Different devices have different alarm bits triggering the
1762 * ALERT# output
1763 */
4667bcb8 1764 data->alert_alarms = lm90_params[data->kind].alert_alarms;
53de3342 1765
88073bb1 1766 /* Set chip capabilities */
4667bcb8 1767 data->flags = lm90_params[data->kind].flags;
eb1c8f43
GR
1768
1769 data->chip.ops = &lm90_ops;
1770 data->chip.info = data->info;
1771
a4d41e67
GR
1772 data->info[0] = HWMON_CHANNEL_INFO(chip,
1773 HWMON_C_REGISTER_TZ | HWMON_C_UPDATE_INTERVAL | HWMON_C_ALARMS);
eb1c8f43
GR
1774 data->info[1] = &data->temp_info;
1775
1776 info = &data->temp_info;
1777 info->type = hwmon_temp;
1778 info->config = data->channel_config;
1779
1780 data->channel_config[0] = HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MAX |
1781 HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MIN_ALARM |
1782 HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM;
1783 data->channel_config[1] = HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MAX |
1784 HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MIN_ALARM |
1785 HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM | HWMON_T_FAULT;
1786
1787 if (data->flags & LM90_HAVE_OFFSET)
1788 data->channel_config[1] |= HWMON_T_OFFSET;
1789
1790 if (data->flags & LM90_HAVE_EMERGENCY) {
1791 data->channel_config[0] |= HWMON_T_EMERGENCY |
1792 HWMON_T_EMERGENCY_HYST;
1793 data->channel_config[1] |= HWMON_T_EMERGENCY |
1794 HWMON_T_EMERGENCY_HYST;
1795 }
1796
1797 if (data->flags & LM90_HAVE_EMERGENCY_ALARM) {
1798 data->channel_config[0] |= HWMON_T_EMERGENCY_ALARM;
1799 data->channel_config[1] |= HWMON_T_EMERGENCY_ALARM;
1800 }
1801
1802 if (data->flags & LM90_HAVE_TEMP3) {
1803 data->channel_config[2] = HWMON_T_INPUT |
1804 HWMON_T_MIN | HWMON_T_MAX |
1805 HWMON_T_CRIT | HWMON_T_CRIT_HYST |
1806 HWMON_T_EMERGENCY | HWMON_T_EMERGENCY_HYST |
1807 HWMON_T_MIN_ALARM | HWMON_T_MAX_ALARM |
1808 HWMON_T_CRIT_ALARM | HWMON_T_EMERGENCY_ALARM |
1809 HWMON_T_FAULT;
1810 }
1811
a095f687 1812 data->reg_local_ext = lm90_params[data->kind].reg_local_ext;
06e1c0a2 1813
0c01b644
GR
1814 /* Set maximum conversion rate */
1815 data->max_convrate = lm90_params[data->kind].max_convrate;
1816
1da177e4 1817 /* Initialize the LM90 chip */
37ad04d7
GR
1818 err = lm90_init_client(client, data);
1819 if (err < 0) {
1820 dev_err(dev, "Failed to initialize device\n");
1821 return err;
1822 }
1da177e4 1823
eb1c8f43
GR
1824 /*
1825 * The 'pec' attribute is attached to the i2c device and thus created
1826 * separately.
1827 */
b2589ab0
JD
1828 if (client->flags & I2C_CLIENT_PEC) {
1829 err = device_create_file(dev, &dev_attr_pec);
11e57812 1830 if (err)
1f17a444 1831 return err;
c5fcf01b
GR
1832 err = devm_add_action_or_reset(dev, lm90_remove_pec, dev);
1833 if (err)
1834 return err;
06e1c0a2 1835 }
0e39e01c 1836
eb1c8f43
GR
1837 hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
1838 data, &data->chip,
1839 NULL);
6e5f62b9
GR
1840 if (IS_ERR(hwmon_dev))
1841 return PTR_ERR(hwmon_dev);
943b0830 1842
109b1283
WN
1843 if (client->irq) {
1844 dev_dbg(dev, "IRQ: %d\n", client->irq);
1845 err = devm_request_threaded_irq(dev, client->irq,
1846 NULL, lm90_irq_thread,
1847 IRQF_TRIGGER_LOW | IRQF_ONESHOT,
1848 "lm90", client);
1849 if (err < 0) {
1850 dev_err(dev, "cannot request IRQ %d\n", client->irq);
6e5f62b9 1851 return err;
109b1283
WN
1852 }
1853 }
1854
1da177e4
LT
1855 return 0;
1856}
1857
b4f21054
BT
1858static void lm90_alert(struct i2c_client *client, enum i2c_alert_protocol type,
1859 unsigned int flag)
53de3342 1860{
072de496 1861 u16 alarms;
06e1c0a2 1862
b4f21054
BT
1863 if (type != I2C_PROTOCOL_SMBUS_ALERT)
1864 return;
1865
072de496 1866 if (lm90_is_tripped(client, &alarms)) {
f36ffeab
GR
1867 /*
1868 * Disable ALERT# output, because these chips don't implement
1869 * SMBus alert correctly; they should only hold the alert line
1870 * low briefly.
1871 */
072de496
WN
1872 struct lm90_data *data = i2c_get_clientdata(client);
1873
37ad04d7
GR
1874 if ((data->flags & LM90_HAVE_BROKEN_ALERT) &&
1875 (alarms & data->alert_alarms)) {
1876 int config;
1877
53de3342 1878 dev_dbg(&client->dev, "Disabling ALERT#\n");
37ad04d7
GR
1879 config = lm90_read_reg(client, LM90_REG_R_CONFIG1);
1880 if (config >= 0)
1881 i2c_smbus_write_byte_data(client,
1882 LM90_REG_W_CONFIG1,
1883 config | 0x80);
53de3342 1884 }
072de496
WN
1885 } else {
1886 dev_info(&client->dev, "Everything OK\n");
53de3342
JD
1887 }
1888}
1889
15b66ab6
GR
1890static struct i2c_driver lm90_driver = {
1891 .class = I2C_CLASS_HWMON,
1892 .driver = {
1893 .name = "lm90",
df8d57bf 1894 .of_match_table = of_match_ptr(lm90_of_match),
15b66ab6
GR
1895 },
1896 .probe = lm90_probe,
15b66ab6
GR
1897 .alert = lm90_alert,
1898 .id_table = lm90_id,
1899 .detect = lm90_detect,
1900 .address_list = normal_i2c,
1901};
1da177e4 1902
f0967eea 1903module_i2c_driver(lm90_driver);
1da177e4 1904
7c81c60f 1905MODULE_AUTHOR("Jean Delvare <jdelvare@suse.de>");
1da177e4
LT
1906MODULE_DESCRIPTION("LM90/ADM1032 driver");
1907MODULE_LICENSE("GPL");