[mirror_ubuntu-bionic-kernel.git] / drivers / hwmon / lm95241.c

/*
 * Copyright (C) 2008, 2010 Davide Rizzo <elpa.rizzo@gmail.com>
 *
 * The LM95241 is a sensor chip made by National Semiconductors.
 * It reports up to three temperatures (its own plus up to two external ones).
 * Complete datasheet can be obtained from National's website at:
 *   http://www.national.com/ds.cgi/LM/LM95241.pdf
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include <linux/bitops.h>
#include <linux/err.h>
#include <linux/i2c.h>
#include <linux/init.h>
#include <linux/jiffies.h>
#include <linux/hwmon.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/slab.h>

#define DEVNAME "lm95241"

static const unsigned short normal_i2c[] = {
	0x19, 0x2a, 0x2b, I2C_CLIENT_END };

/* LM95241 registers */
#define LM95241_REG_R_MAN_ID		0xFE
#define LM95241_REG_R_CHIP_ID		0xFF
#define LM95241_REG_R_STATUS		0x02
#define LM95241_REG_RW_CONFIG		0x03
#define LM95241_REG_RW_REM_FILTER	0x06
#define LM95241_REG_RW_TRUTHERM		0x07
#define LM95241_REG_W_ONE_SHOT		0x0F
#define LM95241_REG_R_LOCAL_TEMPH	0x10
#define LM95241_REG_R_REMOTE1_TEMPH	0x11
#define LM95241_REG_R_REMOTE2_TEMPH	0x12
#define LM95241_REG_R_LOCAL_TEMPL	0x20
#define LM95241_REG_R_REMOTE1_TEMPL	0x21
#define LM95241_REG_R_REMOTE2_TEMPL	0x22
#define LM95241_REG_RW_REMOTE_MODEL	0x30

/* LM95241 specific bitfields */
#define CFG_STOP	BIT(6)
#define CFG_CR0076	0x00
#define CFG_CR0182	BIT(4)
#define CFG_CR1000	BIT(5)
#define CFG_CR2700	(BIT(4) | BIT(5))
#define CFG_CRMASK	(BIT(4) | BIT(5))
#define R1MS_MASK	BIT(0)
#define R2MS_MASK	BIT(2)
#define R1DF_MASK	BIT(1)
#define R2DF_MASK	BIT(2)
#define R1FE_MASK	BIT(0)
#define R2FE_MASK	BIT(2)
#define R1DM		BIT(0)
#define R2DM		BIT(1)
#define TT1_SHIFT	0
#define TT2_SHIFT	4
#define TT_OFF		0
#define TT_ON		1
#define TT_MASK		7
#define NATSEMI_MAN_ID	0x01
#define LM95231_CHIP_ID	0xA1
#define LM95241_CHIP_ID	0xA4

static const u8 lm95241_reg_address[] = {
	LM95241_REG_R_LOCAL_TEMPH,
	LM95241_REG_R_LOCAL_TEMPL,
	LM95241_REG_R_REMOTE1_TEMPH,
	LM95241_REG_R_REMOTE1_TEMPL,
	LM95241_REG_R_REMOTE2_TEMPH,
	LM95241_REG_R_REMOTE2_TEMPL
};

/* Client data (each client gets its own) */
struct lm95241_data {
	struct i2c_client *client;
	struct mutex update_lock;
	unsigned long last_updated;	/* in jiffies */
	unsigned long interval;		/* in milli-seconds */
	char valid;		/* zero until following fields are valid */
	/* registers values */
	u8 temp[ARRAY_SIZE(lm95241_reg_address)];
	u8 status, config, model, trutherm;
};

/* Conversions */
static int temp_from_reg_signed(u8 val_h, u8 val_l)
{
	s16 val_hl = (val_h << 8) | val_l;
	return val_hl * 1000 / 256;
}

static int temp_from_reg_unsigned(u8 val_h, u8 val_l)
{
	u16 val_hl = (val_h << 8) | val_l;
	return val_hl * 1000 / 256;
}

static struct lm95241_data *lm95241_update_device(struct device *dev)
{
	struct lm95241_data *data = dev_get_drvdata(dev);
	struct i2c_client *client = data->client;

	mutex_lock(&data->update_lock);

	if (time_after(jiffies, data->last_updated
		       + msecs_to_jiffies(data->interval)) ||
	    !data->valid) {
		int i;

		dev_dbg(dev, "Updating lm95241 data.\n");
		for (i = 0; i < ARRAY_SIZE(lm95241_reg_address); i++)
			data->temp[i]
			  = i2c_smbus_read_byte_data(client,
						     lm95241_reg_address[i]);

		data->status = i2c_smbus_read_byte_data(client,
							LM95241_REG_R_STATUS);
		data->last_updated = jiffies;
		data->valid = 1;
	}

	mutex_unlock(&data->update_lock);

	return data;
}

static int lm95241_read_chip(struct device *dev, u32 attr, int channel,
			     long *val)
{
	struct lm95241_data *data = dev_get_drvdata(dev);

	switch (attr) {
	case hwmon_chip_update_interval:
		*val = data->interval;
		return 0;
	default:
		return -EOPNOTSUPP;
	}
}

static int lm95241_read_temp(struct device *dev, u32 attr, int channel,
			     long *val)
{
	struct lm95241_data *data = lm95241_update_device(dev);

	switch (attr) {
	case hwmon_temp_input:
		if (!channel || (data->config & BIT(channel - 1)))
			*val = temp_from_reg_signed(data->temp[channel * 2],
						data->temp[channel * 2 + 1]);
		else
			*val = temp_from_reg_unsigned(data->temp[channel * 2],
						data->temp[channel * 2 + 1]);
		return 0;
	case hwmon_temp_min:
		if (channel == 1)
			*val = (data->config & R1DF_MASK) ? -128000 : 0;
		else
			*val = (data->config & R2DF_MASK) ? -128000 : 0;
		return 0;
	case hwmon_temp_max:
		if (channel == 1)
			*val = (data->config & R1DF_MASK) ? 127875 : 255875;
		else
			*val = (data->config & R2DF_MASK) ? 127875 : 255875;
		return 0;
	case hwmon_temp_type:
		if (channel == 1)
			*val = (data->model & R1MS_MASK) ? 1 : 2;
		else
			*val = (data->model & R2MS_MASK) ? 1 : 2;
		return 0;
	case hwmon_temp_fault:
		if (channel == 1)
			*val = !!(data->status & R1DM);
		else
			*val = !!(data->status & R2DM);
		return 0;
	default:
		return -EOPNOTSUPP;
	}
}

static int lm95241_read(struct device *dev, enum hwmon_sensor_types type,
			u32 attr, int channel, long *val)
{
	switch (type) {
	case hwmon_chip:
		return lm95241_read_chip(dev, attr, channel, val);
	case hwmon_temp:
		return lm95241_read_temp(dev, attr, channel, val);
	default:
		return -EOPNOTSUPP;
	}
}

static int lm95241_write_chip(struct device *dev, u32 attr, int channel,
			      long val)
{
	struct lm95241_data *data = dev_get_drvdata(dev);
	int convrate;
	u8 config;
	int ret;

	mutex_lock(&data->update_lock);

	switch (attr) {
	case hwmon_chip_update_interval:
		config = data->config & ~CFG_CRMASK;
		if (val < 130) {
			convrate = 76;
			config |= CFG_CR0076;
		} else if (val < 590) {
			convrate = 182;
			config |= CFG_CR0182;
		} else if (val < 1850) {
			convrate = 1000;
			config |= CFG_CR1000;
		} else {
			convrate = 2700;
			config |= CFG_CR2700;
		}
		data->interval = convrate;
		data->config = config;
		ret = i2c_smbus_write_byte_data(data->client,
						LM95241_REG_RW_CONFIG, config);
		break;
	default:
		ret = -EOPNOTSUPP;
		break;
	}
	mutex_unlock(&data->update_lock);
	return ret;
}

static int lm95241_write_temp(struct device *dev, u32 attr, int channel,
			      long val)
{
	struct lm95241_data *data = dev_get_drvdata(dev);
	struct i2c_client *client = data->client;
	int ret;

	mutex_lock(&data->update_lock);

	switch (attr) {
	case hwmon_temp_min:
		if (channel == 1) {
			if (val < 0)
				data->config |= R1DF_MASK;
			else
				data->config &= ~R1DF_MASK;
		} else {
			if (val < 0)
				data->config |= R2DF_MASK;
			else
				data->config &= ~R2DF_MASK;
		}
		data->valid = 0;
		ret = i2c_smbus_write_byte_data(client, LM95241_REG_RW_CONFIG,
						data->config);
		break;
	case hwmon_temp_max:
		if (channel == 1) {
			if (val <= 127875)
				data->config |= R1DF_MASK;
			else
				data->config &= ~R1DF_MASK;
		} else {
			if (val <= 127875)
				data->config |= R2DF_MASK;
			else
				data->config &= ~R2DF_MASK;
		}
		data->valid = 0;
		ret = i2c_smbus_write_byte_data(client, LM95241_REG_RW_CONFIG,
						data->config);
		break;
	case hwmon_temp_type:
		if (val != 1 && val != 2) {
			ret = -EINVAL;
			break;
		}
		if (channel == 1) {
			data->trutherm &= ~(TT_MASK << TT1_SHIFT);
			if (val == 1) {
				data->model |= R1MS_MASK;
				data->trutherm |= (TT_ON << TT1_SHIFT);
			} else {
				data->model &= ~R1MS_MASK;
				data->trutherm |= (TT_OFF << TT1_SHIFT);
			}
		} else {
			data->trutherm &= ~(TT_MASK << TT2_SHIFT);
			if (val == 1) {
				data->model |= R2MS_MASK;
				data->trutherm |= (TT_ON << TT2_SHIFT);
			} else {
				data->model &= ~R2MS_MASK;
				data->trutherm |= (TT_OFF << TT2_SHIFT);
			}
		}
		ret = i2c_smbus_write_byte_data(client,
						LM95241_REG_RW_REMOTE_MODEL,
						data->model);
		if (ret < 0)
			break;
		ret = i2c_smbus_write_byte_data(client, LM95241_REG_RW_TRUTHERM,
						data->trutherm);
		break;
	default:
		ret = -EOPNOTSUPP;
		break;
	}

	mutex_unlock(&data->update_lock);

	return ret;
}

static int lm95241_write(struct device *dev, enum hwmon_sensor_types type,
			 u32 attr, int channel, long val)
{
	switch (type) {
	case hwmon_chip:
		return lm95241_write_chip(dev, attr, channel, val);
	case hwmon_temp:
		return lm95241_write_temp(dev, attr, channel, val);
	default:
		return -EOPNOTSUPP;
	}
}

static umode_t lm95241_is_visible(const void *data,
				  enum hwmon_sensor_types type,
				  u32 attr, int channel)
{
	switch (type) {
	case hwmon_chip:
		switch (attr) {
		case hwmon_chip_update_interval:
			return S_IRUGO | S_IWUSR;
		}
		break;
	case hwmon_temp:
		switch (attr) {
		case hwmon_temp_input:
			return S_IRUGO;
		case hwmon_temp_fault:
			return S_IRUGO;
		case hwmon_temp_min:
		case hwmon_temp_max:
		case hwmon_temp_type:
			return S_IRUGO | S_IWUSR;
		}
		break;
	default:
		break;
	}
	return 0;
}

/* Return 0 if detection is successful, -ENODEV otherwise */
static int lm95241_detect(struct i2c_client *new_client,
			  struct i2c_board_info *info)
{
	struct i2c_adapter *adapter = new_client->adapter;
	const char *name;
	int mfg_id, chip_id;

	if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
		return -ENODEV;

	mfg_id = i2c_smbus_read_byte_data(new_client, LM95241_REG_R_MAN_ID);
	if (mfg_id != NATSEMI_MAN_ID)
		return -ENODEV;

	chip_id = i2c_smbus_read_byte_data(new_client, LM95241_REG_R_CHIP_ID);
	switch (chip_id) {
	case LM95231_CHIP_ID:
		name = "lm95231";
		break;
	case LM95241_CHIP_ID:
		name = "lm95241";
		break;
	default:
		return -ENODEV;
	}

	/* Fill the i2c board info */
	strlcpy(info->type, name, I2C_NAME_SIZE);
	return 0;
}

static void lm95241_init_client(struct i2c_client *client,
				struct lm95241_data *data)
{
	data->interval = 1000;
	data->config = CFG_CR1000;
	data->trutherm = (TT_OFF << TT1_SHIFT) | (TT_OFF << TT2_SHIFT);

	i2c_smbus_write_byte_data(client, LM95241_REG_RW_CONFIG, data->config);
	i2c_smbus_write_byte_data(client, LM95241_REG_RW_REM_FILTER,
				  R1FE_MASK | R2FE_MASK);
	i2c_smbus_write_byte_data(client, LM95241_REG_RW_TRUTHERM,
				  data->trutherm);
	i2c_smbus_write_byte_data(client, LM95241_REG_RW_REMOTE_MODEL,
				  data->model);
}

static const u32 lm95241_chip_config[] = {
	HWMON_C_UPDATE_INTERVAL,
	0
};

static const struct hwmon_channel_info lm95241_chip = {
	.type = hwmon_chip,
	.config = lm95241_chip_config,
};

static const u32 lm95241_temp_config[] = {
	HWMON_T_INPUT,
	HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MIN | HWMON_T_TYPE |
		HWMON_T_FAULT,
	HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MIN | HWMON_T_TYPE |
		HWMON_T_FAULT,
	0
};

static const struct hwmon_channel_info lm95241_temp = {
	.type = hwmon_temp,
	.config = lm95241_temp_config,
};

static const struct hwmon_channel_info *lm95241_info[] = {
	&lm95241_chip,
	&lm95241_temp,
	NULL
};

static const struct hwmon_ops lm95241_hwmon_ops = {
	.is_visible = lm95241_is_visible,
	.read = lm95241_read,
	.write = lm95241_write,
};

static const struct hwmon_chip_info lm95241_chip_info = {
	.ops = &lm95241_hwmon_ops,
	.info = lm95241_info,
};

static int lm95241_probe(struct i2c_client *client,
			 const struct i2c_device_id *id)
{
	struct device *dev = &client->dev;
	struct lm95241_data *data;
	struct device *hwmon_dev;

	data = devm_kzalloc(dev, sizeof(struct lm95241_data), GFP_KERNEL);
	if (!data)
		return -ENOMEM;

	data->client = client;
	mutex_init(&data->update_lock);

	/* Initialize the LM95241 chip */
	lm95241_init_client(client, data);

	hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
							   data,
							   &lm95241_chip_info,
							   NULL);
	return PTR_ERR_OR_ZERO(hwmon_dev);
}

/* Driver data (common to all clients) */
static const struct i2c_device_id lm95241_id[] = {
	{ "lm95231", 0 },
	{ "lm95241", 0 },
	{ }
};
MODULE_DEVICE_TABLE(i2c, lm95241_id);

static struct i2c_driver lm95241_driver = {
	.class		= I2C_CLASS_HWMON,
	.driver = {
		.name	= DEVNAME,
	},
	.probe		= lm95241_probe,
	.id_table	= lm95241_id,
	.detect		= lm95241_detect,
	.address_list	= normal_i2c,
};

module_i2c_driver(lm95241_driver);

MODULE_AUTHOR("Davide Rizzo <elpa.rizzo@gmail.com>");
MODULE_DESCRIPTION("LM95231/LM95241 sensor driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
06160327	1	/*
0f1deb4b	2	* Copyright (C) 2008, 2010 Davide Rizzo <elpa.rizzo@gmail.com>
06160327	3	*
0f1deb4b DR	4	* The LM95241 is a sensor chip made by National Semiconductors.
	5	* It reports up to three temperatures (its own plus up to two external ones).
	6	* Complete datasheet can be obtained from National's website at:
06160327 DR	7	* http://www.national.com/ds.cgi/LM/LM95241.pdf
	8	*
	9	* This program is free software; you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License as published by
	11	* the Free Software Foundation; either version 2 of the License, or
	12	* (at your option) any later version.
	13	*
	14	* This program is distributed in the hope that it will be useful,
	15	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	* GNU General Public License for more details.
06160327 DR	18	*/
06160327 DR	19
e8172a93	20	#include <linux/bitops.h>
4b2ea08b GR	21	#include <linux/err.h>
4b2ea08b GR	22	#include <linux/i2c.h>
06160327	23	#include <linux/init.h>
06160327	24	#include <linux/jiffies.h>
06160327	25	#include <linux/hwmon.h>
4b2ea08b	26	#include <linux/module.h>
06160327	27	#include <linux/mutex.h>
4b2ea08b	28	#include <linux/slab.h>
06160327	29
0f1deb4b DR	30	#define DEVNAME "lm95241"
0f1deb4b DR	31
06160327	32	static const unsigned short normal_i2c[] = {
0f1deb4b	33	0x19, 0x2a, 0x2b, I2C_CLIENT_END };
06160327	34
06160327 DR	35	/* LM95241 registers */
	36	#define LM95241_REG_R_MAN_ID 0xFE
	37	#define LM95241_REG_R_CHIP_ID 0xFF
	38	#define LM95241_REG_R_STATUS 0x02
	39	#define LM95241_REG_RW_CONFIG 0x03
	40	#define LM95241_REG_RW_REM_FILTER 0x06
	41	#define LM95241_REG_RW_TRUTHERM 0x07
0f1deb4b	42	#define LM95241_REG_W_ONE_SHOT 0x0F
06160327 DR	43	#define LM95241_REG_R_LOCAL_TEMPH 0x10
	44	#define LM95241_REG_R_REMOTE1_TEMPH 0x11
	45	#define LM95241_REG_R_REMOTE2_TEMPH 0x12
	46	#define LM95241_REG_R_LOCAL_TEMPL 0x20
	47	#define LM95241_REG_R_REMOTE1_TEMPL 0x21
	48	#define LM95241_REG_R_REMOTE2_TEMPL 0x22
	49	#define LM95241_REG_RW_REMOTE_MODEL 0x30
	50
	51	/* LM95241 specific bitfields */
e8172a93 GR	52	#define CFG_STOP BIT(6)
	53	#define CFG_CR0076 0x00
	54	#define CFG_CR0182 BIT(4)
	55	#define CFG_CR1000 BIT(5)
	56	#define CFG_CR2700 (BIT(4) \| BIT(5))
	57	#define CFG_CRMASK (BIT(4) \| BIT(5))
	58	#define R1MS_MASK BIT(0)
	59	#define R2MS_MASK BIT(2)
	60	#define R1DF_MASK BIT(1)
	61	#define R2DF_MASK BIT(2)
	62	#define R1FE_MASK BIT(0)
	63	#define R2FE_MASK BIT(2)
	64	#define R1DM BIT(0)
	65	#define R2DM BIT(1)
	66	#define TT1_SHIFT 0
	67	#define TT2_SHIFT 4
	68	#define TT_OFF 0
	69	#define TT_ON 1
	70	#define TT_MASK 7
8c1d0419 GR	71	#define NATSEMI_MAN_ID 0x01
	72	#define LM95231_CHIP_ID 0xA1
	73	#define LM95241_CHIP_ID 0xA4
06160327	74
0f1deb4b DR	75	static const u8 lm95241_reg_address[] = {
	76	LM95241_REG_R_LOCAL_TEMPH,
	77	LM95241_REG_R_LOCAL_TEMPL,
	78	LM95241_REG_R_REMOTE1_TEMPH,
	79	LM95241_REG_R_REMOTE1_TEMPL,
	80	LM95241_REG_R_REMOTE2_TEMPH,
	81	LM95241_REG_R_REMOTE2_TEMPL
	82	};
06160327	83
06160327 DR	84	/* Client data (each client gets its own) */
06160327 DR	85	struct lm95241_data {
f809621e	86	struct i2c_client *client;
06160327	87	struct mutex update_lock;
f48ccb26 GR	88	unsigned long last_updated; /* in jiffies */
f48ccb26 GR	89	unsigned long interval; /* in milli-seconds */
0f1deb4b	90	char valid; /* zero until following fields are valid */
06160327	91	/* registers values */
0f1deb4b	92	u8 temp[ARRAY_SIZE(lm95241_reg_address)];
090a7f8e	93	u8 status, config, model, trutherm;
06160327 DR	94	};
06160327 DR	95
0f1deb4b	96	/* Conversions */
0c2a40e2	97	static int temp_from_reg_signed(u8 val_h, u8 val_l)
0f1deb4b	98	{
0c2a40e2 GR	99	s16 val_hl = (val_h << 8) \| val_l;
	100	return val_hl * 1000 / 256;
	101	}
	102
	103	static int temp_from_reg_unsigned(u8 val_h, u8 val_l)
	104	{
	105	u16 val_hl = (val_h << 8) \| val_l;
	106	return val_hl * 1000 / 256;
0f1deb4b DR	107	}
	108
	109	static struct lm95241_data lm95241_update_device(struct device dev)
	110	{
f809621e GR	111	struct lm95241_data *data = dev_get_drvdata(dev);
f809621e GR	112	struct i2c_client *client = data->client;
0f1deb4b DR	113
	114	mutex_lock(&data->update_lock);
	115
f48ccb26 GR	116	if (time_after(jiffies, data->last_updated
f48ccb26 GR	117	+ msecs_to_jiffies(data->interval)) \|\|
0f1deb4b DR	118	!data->valid) {
	119	int i;
	120
f809621e	121	dev_dbg(dev, "Updating lm95241 data.\n");
0f1deb4b DR	122	for (i = 0; i < ARRAY_SIZE(lm95241_reg_address); i++)
	123	data->temp[i]
	124	= i2c_smbus_read_byte_data(client,
	125	lm95241_reg_address[i]);
090a7f8e GR	126
	127	data->status = i2c_smbus_read_byte_data(client,
	128	LM95241_REG_R_STATUS);
0f1deb4b DR	129	data->last_updated = jiffies;
	130	data->valid = 1;
	131	}
	132
	133	mutex_unlock(&data->update_lock);
	134
	135	return data;
	136	}
	137
3e904628 GR	138	static int lm95241_read_chip(struct device *dev, u32 attr, int channel,
3e904628 GR	139	long *val)
06160327	140	{
f809621e	141	struct lm95241_data *data = dev_get_drvdata(dev);
06160327	142
3e904628 GR	143	switch (attr) {
	144	case hwmon_chip_update_interval:
	145	*val = data->interval;
	146	return 0;
	147	default:
	148	return -EOPNOTSUPP;
	149	}
06160327 DR	150	}
06160327 DR	151
3e904628 GR	152	static int lm95241_read_temp(struct device *dev, u32 attr, int channel,
3e904628 GR	153	long *val)
06160327	154	{
3e904628	155	struct lm95241_data *data = lm95241_update_device(dev);
0f1deb4b	156
3e904628 GR	157	switch (attr) {
	158	case hwmon_temp_input:
	159	if (!channel \|\| (data->config & BIT(channel - 1)))
	160	val = temp_from_reg_signed(data->temp[channel 2],
	161	data->temp[channel * 2 + 1]);
	162	else
	163	val = temp_from_reg_unsigned(data->temp[channel 2],
	164	data->temp[channel * 2 + 1]);
	165	return 0;
	166	case hwmon_temp_min:
	167	if (channel == 1)
	168	*val = (data->config & R1DF_MASK) ? -128000 : 0;
	169	else
	170	*val = (data->config & R2DF_MASK) ? -128000 : 0;
	171	return 0;
	172	case hwmon_temp_max:
	173	if (channel == 1)
	174	*val = (data->config & R1DF_MASK) ? 127875 : 255875;
	175	else
	176	*val = (data->config & R2DF_MASK) ? 127875 : 255875;
	177	return 0;
	178	case hwmon_temp_type:
	179	if (channel == 1)
	180	*val = (data->model & R1MS_MASK) ? 1 : 2;
	181	else
	182	*val = (data->model & R2MS_MASK) ? 1 : 2;
	183	return 0;
	184	case hwmon_temp_fault:
	185	if (channel == 1)
	186	*val = !!(data->status & R1DM);
	187	else
	188	*val = !!(data->status & R2DM);
	189	return 0;
	190	default:
	191	return -EOPNOTSUPP;
0f1deb4b	192	}
06160327 DR	193	}
06160327 DR	194
3e904628 GR	195	static int lm95241_read(struct device *dev, enum hwmon_sensor_types type,
3e904628 GR	196	u32 attr, int channel, long *val)
0f1deb4b	197	{
3e904628 GR	198	switch (type) {
	199	case hwmon_chip:
	200	return lm95241_read_chip(dev, attr, channel, val);
	201	case hwmon_temp:
	202	return lm95241_read_temp(dev, attr, channel, val);
	203	default:
	204	return -EOPNOTSUPP;
	205	}
06160327	206	}
0f1deb4b	207
3e904628 GR	208	static int lm95241_write_chip(struct device *dev, u32 attr, int channel,
3e904628 GR	209	long val)
0f1deb4b	210	{
f809621e	211	struct lm95241_data *data = dev_get_drvdata(dev);
3e904628 GR	212	int convrate;
	213	u8 config;
	214	int ret;
0f1deb4b DR	215
	216	mutex_lock(&data->update_lock);
	217
3e904628 GR	218	switch (attr) {
	219	case hwmon_chip_update_interval:
	220	config = data->config & ~CFG_CRMASK;
	221	if (val < 130) {
	222	convrate = 76;
	223	config \|= CFG_CR0076;
	224	} else if (val < 590) {
	225	convrate = 182;
	226	config \|= CFG_CR0182;
	227	} else if (val < 1850) {
	228	convrate = 1000;
	229	config \|= CFG_CR1000;
	230	} else {
	231	convrate = 2700;
	232	config \|= CFG_CR2700;
	233	}
	234	data->interval = convrate;
	235	data->config = config;
	236	ret = i2c_smbus_write_byte_data(data->client,
	237	LM95241_REG_RW_CONFIG, config);
	238	break;
	239	default:
	240	ret = -EOPNOTSUPP;
	241	break;
	242	}
0f1deb4b	243	mutex_unlock(&data->update_lock);
3e904628	244	return ret;
06160327	245	}
0f1deb4b	246
3e904628 GR	247	static int lm95241_write_temp(struct device *dev, u32 attr, int channel,
3e904628 GR	248	long val)
0f1deb4b	249	{
f809621e	250	struct lm95241_data *data = dev_get_drvdata(dev);
3e904628 GR	251	struct i2c_client *client = data->client;
3e904628 GR	252	int ret;
0f1deb4b DR	253
	254	mutex_lock(&data->update_lock);
	255
3e904628 GR	256	switch (attr) {
	257	case hwmon_temp_min:
	258	if (channel == 1) {
	259	if (val < 0)
	260	data->config \|= R1DF_MASK;
	261	else
	262	data->config &= ~R1DF_MASK;
	263	} else {
	264	if (val < 0)
	265	data->config \|= R2DF_MASK;
	266	else
	267	data->config &= ~R2DF_MASK;
	268	}
	269	data->valid = 0;
	270	ret = i2c_smbus_write_byte_data(client, LM95241_REG_RW_CONFIG,
	271	data->config);
	272	break;
	273	case hwmon_temp_max:
	274	if (channel == 1) {
	275	if (val <= 127875)
	276	data->config \|= R1DF_MASK;
	277	else
	278	data->config &= ~R1DF_MASK;
	279	} else {
	280	if (val <= 127875)
	281	data->config \|= R2DF_MASK;
	282	else
	283	data->config &= ~R2DF_MASK;
	284	}
	285	data->valid = 0;
	286	ret = i2c_smbus_write_byte_data(client, LM95241_REG_RW_CONFIG,
	287	data->config);
	288	break;
	289	case hwmon_temp_type:
	290	if (val != 1 && val != 2) {
	291	ret = -EINVAL;
	292	break;
	293	}
	294	if (channel == 1) {
	295	data->trutherm &= ~(TT_MASK << TT1_SHIFT);
	296	if (val == 1) {
	297	data->model \|= R1MS_MASK;
	298	data->trutherm \|= (TT_ON << TT1_SHIFT);
	299	} else {
	300	data->model &= ~R1MS_MASK;
	301	data->trutherm \|= (TT_OFF << TT1_SHIFT);
	302	}
	303	} else {
	304	data->trutherm &= ~(TT_MASK << TT2_SHIFT);
	305	if (val == 1) {
	306	data->model \|= R2MS_MASK;
	307	data->trutherm \|= (TT_ON << TT2_SHIFT);
	308	} else {
	309	data->model &= ~R2MS_MASK;
	310	data->trutherm \|= (TT_OFF << TT2_SHIFT);
	311	}
	312	}
	313	ret = i2c_smbus_write_byte_data(client,
	314	LM95241_REG_RW_REMOTE_MODEL,
	315	data->model);
	316	if (ret < 0)
	317	break;
	318	ret = i2c_smbus_write_byte_data(client, LM95241_REG_RW_TRUTHERM,
	319	data->trutherm);
320	break;
321	default:
322	ret = -EOPNOTSUPP;
323	break;
324	}
0f1deb4b DR	325
	326	mutex_unlock(&data->update_lock);
	327
3e904628	328	return ret;
090a7f8e GR	329	}
090a7f8e GR	330
3e904628 GR	331	static int lm95241_write(struct device *dev, enum hwmon_sensor_types type,
3e904628 GR	332	u32 attr, int channel, long val)
0f1deb4b	333	{
3e904628 GR	334	switch (type) {
	335	case hwmon_chip:
	336	return lm95241_write_chip(dev, attr, channel, val);
	337	case hwmon_temp:
	338	return lm95241_write_temp(dev, attr, channel, val);
	339	default:
	340	return -EOPNOTSUPP;
	341	}
06160327	342	}
0f1deb4b	343
3e904628 GR	344	static umode_t lm95241_is_visible(const void *data,
	345	enum hwmon_sensor_types type,
	346	u32 attr, int channel)
0f1deb4b	347	{
3e904628 GR	348	switch (type) {
	349	case hwmon_chip:
	350	switch (attr) {
	351	case hwmon_chip_update_interval:
	352	return S_IRUGO \| S_IWUSR;
	353	}
	354	break;
	355	case hwmon_temp:
	356	switch (attr) {
	357	case hwmon_temp_input:
	358	return S_IRUGO;
	359	case hwmon_temp_fault:
	360	return S_IRUGO;
	361	case hwmon_temp_min:
	362	case hwmon_temp_max:
	363	case hwmon_temp_type:
	364	return S_IRUGO \| S_IWUSR;
	365	}
	366	break;
	367	default:
	368	break;
f48ccb26	369	}
3e904628	370	return 0;
06160327	371	}
0f1deb4b	372
797eaa4b	373	/* Return 0 if detection is successful, -ENODEV otherwise */
310ec792	374	static int lm95241_detect(struct i2c_client *new_client,
797eaa4b	375	struct i2c_board_info *info)
06160327	376	{
797eaa4b	377	struct i2c_adapter *adapter = new_client->adapter;
52df6440	378	const char *name;
8c1d0419	379	int mfg_id, chip_id;
06160327 DR	380
06160327 DR	381	if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
797eaa4b	382	return -ENODEV;
06160327	383
8c1d0419 GR	384	mfg_id = i2c_smbus_read_byte_data(new_client, LM95241_REG_R_MAN_ID);
	385	if (mfg_id != NATSEMI_MAN_ID)
	386	return -ENODEV;
	387
	388	chip_id = i2c_smbus_read_byte_data(new_client, LM95241_REG_R_CHIP_ID);
	389	switch (chip_id) {
	390	case LM95231_CHIP_ID:
	391	name = "lm95231";
	392	break;
	393	case LM95241_CHIP_ID:
	394	name = "lm95241";
	395	break;
	396	default:
52df6440	397	return -ENODEV;
06160327 DR	398	}
06160327 DR	399
797eaa4b	400	/* Fill the i2c board info */
797eaa4b JD	401	strlcpy(info->type, name, I2C_NAME_SIZE);
	402	return 0;
	403	}
06160327	404
f809621e GR	405	static void lm95241_init_client(struct i2c_client *client,
f809621e GR	406	struct lm95241_data *data)
0f1deb4b	407	{
f48ccb26 GR	408	data->interval = 1000;
f48ccb26 GR	409	data->config = CFG_CR1000;
0f1deb4b DR	410	data->trutherm = (TT_OFF << TT1_SHIFT) \| (TT_OFF << TT2_SHIFT);
	411
	412	i2c_smbus_write_byte_data(client, LM95241_REG_RW_CONFIG, data->config);
	413	i2c_smbus_write_byte_data(client, LM95241_REG_RW_REM_FILTER,
	414	R1FE_MASK \| R2FE_MASK);
	415	i2c_smbus_write_byte_data(client, LM95241_REG_RW_TRUTHERM,
	416	data->trutherm);
	417	i2c_smbus_write_byte_data(client, LM95241_REG_RW_REMOTE_MODEL,
	418	data->model);
	419	}
	420
3e904628 GR	421	static const u32 lm95241_chip_config[] = {
	422	HWMON_C_UPDATE_INTERVAL,
	423	0
	424	};
	425
	426	static const struct hwmon_channel_info lm95241_chip = {
	427	.type = hwmon_chip,
	428	.config = lm95241_chip_config,
	429	};
	430
	431	static const u32 lm95241_temp_config[] = {
	432	HWMON_T_INPUT,
	433	HWMON_T_INPUT \| HWMON_T_MAX \| HWMON_T_MIN \| HWMON_T_TYPE \|
	434	HWMON_T_FAULT,
	435	HWMON_T_INPUT \| HWMON_T_MAX \| HWMON_T_MIN \| HWMON_T_TYPE \|
	436	HWMON_T_FAULT,
	437	0
	438	};
	439
	440	static const struct hwmon_channel_info lm95241_temp = {
	441	.type = hwmon_temp,
	442	.config = lm95241_temp_config,
	443	};
	444
	445	static const struct hwmon_channel_info *lm95241_info[] = {
	446	&lm95241_chip,
	447	&lm95241_temp,
	448	NULL
	449	};
	450
	451	static const struct hwmon_ops lm95241_hwmon_ops = {
	452	.is_visible = lm95241_is_visible,
	453	.read = lm95241_read,
	454	.write = lm95241_write,
	455	};
	456
	457	static const struct hwmon_chip_info lm95241_chip_info = {
	458	.ops = &lm95241_hwmon_ops,
	459	.info = lm95241_info,
	460	};
	461
f809621e	462	static int lm95241_probe(struct i2c_client *client,
797eaa4b JD	463	const struct i2c_device_id *id)
797eaa4b JD	464	{
f809621e	465	struct device *dev = &client->dev;
797eaa4b	466	struct lm95241_data *data;
f809621e	467	struct device *hwmon_dev;
06160327	468
f809621e	469	data = devm_kzalloc(dev, sizeof(struct lm95241_data), GFP_KERNEL);
1487bf70 GR	470	if (!data)
1487bf70 GR	471	return -ENOMEM;
797eaa4b	472
f809621e	473	data->client = client;
797eaa4b	474	mutex_init(&data->update_lock);
06160327 DR	475
06160327 DR	476	/* Initialize the LM95241 chip */
f809621e	477	lm95241_init_client(client, data);
06160327	478
3e904628	479	hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
f809621e	480	data,
3e904628 GR	481	&lm95241_chip_info,
3e904628 GR	482	NULL);
f809621e	483	return PTR_ERR_OR_ZERO(hwmon_dev);
06160327 DR	484	}
06160327 DR	485
797eaa4b JD	486	/* Driver data (common to all clients) */
797eaa4b JD	487	static const struct i2c_device_id lm95241_id[] = {
8c1d0419 GR	488	{ "lm95231", 0 },
8c1d0419 GR	489	{ "lm95241", 0 },
797eaa4b JD	490	{ }
	491	};
	492	MODULE_DEVICE_TABLE(i2c, lm95241_id);
	493
	494	static struct i2c_driver lm95241_driver = {
	495	.class = I2C_CLASS_HWMON,
	496	.driver = {
0f1deb4b	497	.name = DEVNAME,
797eaa4b JD	498	},
797eaa4b JD	499	.probe = lm95241_probe,
797eaa4b JD	500	.id_table = lm95241_id,
797eaa4b JD	501	.detect = lm95241_detect,
c3813d6a	502	.address_list = normal_i2c,
797eaa4b JD	503	};
797eaa4b JD	504
f0967eea	505	module_i2c_driver(lm95241_driver);
06160327	506
0f1deb4b	507	MODULE_AUTHOR("Davide Rizzo <elpa.rizzo@gmail.com>");
0a8784e7	508	MODULE_DESCRIPTION("LM95231/LM95241 sensor driver");
06160327	509	MODULE_LICENSE("GPL");