[mirror_ubuntu-bionic-kernel.git] / drivers / hwmon / max31790.c

/*
 * max31790.c - Part of lm_sensors, Linux kernel modules for hardware
 *             monitoring.
 *
 * (C) 2015 by Il Han <corone.il.han@gmail.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include <linux/err.h>
#include <linux/hwmon.h>
#include <linux/i2c.h>
#include <linux/init.h>
#include <linux/jiffies.h>
#include <linux/module.h>
#include <linux/slab.h>

/* MAX31790 registers */
#define MAX31790_REG_GLOBAL_CONFIG	0x00
#define MAX31790_REG_FAN_CONFIG(ch)	(0x02 + (ch))
#define MAX31790_REG_FAN_DYNAMICS(ch)	(0x08 + (ch))
#define MAX31790_REG_FAN_FAULT_STATUS2	0x10
#define MAX31790_REG_FAN_FAULT_STATUS1	0x11
#define MAX31790_REG_TACH_COUNT(ch)	(0x18 + (ch) * 2)
#define MAX31790_REG_PWM_DUTY_CYCLE(ch)	(0x30 + (ch) * 2)
#define MAX31790_REG_PWMOUT(ch)		(0x40 + (ch) * 2)
#define MAX31790_REG_TARGET_COUNT(ch)	(0x50 + (ch) * 2)

/* Fan Config register bits */
#define MAX31790_FAN_CFG_RPM_MODE	0x80
#define MAX31790_FAN_CFG_TACH_INPUT_EN	0x08
#define MAX31790_FAN_CFG_TACH_INPUT	0x01

/* Fan Dynamics register bits */
#define MAX31790_FAN_DYN_SR_SHIFT	5
#define MAX31790_FAN_DYN_SR_MASK	0xE0
#define SR_FROM_REG(reg)		(((reg) & MAX31790_FAN_DYN_SR_MASK) \
					 >> MAX31790_FAN_DYN_SR_SHIFT)

#define FAN_RPM_MIN			120
#define FAN_RPM_MAX			7864320

#define RPM_FROM_REG(reg, sr)		(((reg) >> 4) ? \
					 ((60 * (sr) * 8192) / ((reg) >> 4)) : \
					 FAN_RPM_MAX)
#define RPM_TO_REG(rpm, sr)		((60 * (sr) * 8192) / ((rpm) * 2))

#define NR_CHANNEL			6

/*
 * Client data (each client gets its own)
 */
struct max31790_data {
	struct i2c_client *client;
	struct mutex update_lock;
	bool valid; /* zero until following fields are valid */
	unsigned long last_updated; /* in jiffies */

	/* register values */
	u8 fan_config[NR_CHANNEL];
	u8 fan_dynamics[NR_CHANNEL];
	u16 fault_status;
	u16 tach[NR_CHANNEL * 2];
	u16 pwm[NR_CHANNEL];
	u16 target_count[NR_CHANNEL];
};

static struct max31790_data *max31790_update_device(struct device *dev)
{
	struct max31790_data *data = dev_get_drvdata(dev);
	struct i2c_client *client = data->client;
	struct max31790_data *ret = data;
	int i;
	int rv;

	mutex_lock(&data->update_lock);

	if (time_after(jiffies, data->last_updated + HZ) || !data->valid) {
		rv = i2c_smbus_read_byte_data(client,
				MAX31790_REG_FAN_FAULT_STATUS1);
		if (rv < 0)
			goto abort;
		data->fault_status = rv & 0x3F;

		rv = i2c_smbus_read_byte_data(client,
				MAX31790_REG_FAN_FAULT_STATUS2);
		if (rv < 0)
			goto abort;
		data->fault_status |= (rv & 0x3F) << 6;

		for (i = 0; i < NR_CHANNEL; i++) {
			rv = i2c_smbus_read_word_swapped(client,
					MAX31790_REG_TACH_COUNT(i));
			if (rv < 0)
				goto abort;
			data->tach[i] = rv;

			if (data->fan_config[i]
			    & MAX31790_FAN_CFG_TACH_INPUT) {
				rv = i2c_smbus_read_word_swapped(client,
					MAX31790_REG_TACH_COUNT(NR_CHANNEL
								+ i));
				if (rv < 0)
					goto abort;
				data->tach[NR_CHANNEL + i] = rv;
			} else {
				rv = i2c_smbus_read_word_swapped(client,
						MAX31790_REG_PWMOUT(i));
				if (rv < 0)
					goto abort;
				data->pwm[i] = rv;

				rv = i2c_smbus_read_word_swapped(client,
						MAX31790_REG_TARGET_COUNT(i));
				if (rv < 0)
					goto abort;
				data->target_count[i] = rv;
			}
		}

		data->last_updated = jiffies;
		data->valid = true;
	}
	goto done;

abort:
	data->valid = false;
	ret = ERR_PTR(rv);

done:
	mutex_unlock(&data->update_lock);

	return ret;
}

static const u8 tach_period[8] = { 1, 2, 4, 8, 16, 32, 32, 32 };

static u8 get_tach_period(u8 fan_dynamics)
{
	return tach_period[SR_FROM_REG(fan_dynamics)];
}

static u8 bits_for_tach_period(int rpm)
{
	u8 bits;

	if (rpm < 500)
		bits = 0x0;
	else if (rpm < 1000)
		bits = 0x1;
	else if (rpm < 2000)
		bits = 0x2;
	else if (rpm < 4000)
		bits = 0x3;
	else if (rpm < 8000)
		bits = 0x4;
	else
		bits = 0x5;

	return bits;
}

static int max31790_read_fan(struct device *dev, u32 attr, int channel,
			     long *val)
{
	struct max31790_data *data = max31790_update_device(dev);
	int sr, rpm;

	if (IS_ERR(data))
		return PTR_ERR(data);

	switch (attr) {
	case hwmon_fan_input:
		sr = get_tach_period(data->fan_dynamics[channel]);
		rpm = RPM_FROM_REG(data->tach[channel], sr);
		*val = rpm;
		return 0;
	case hwmon_fan_target:
		sr = get_tach_period(data->fan_dynamics[channel]);
		rpm = RPM_FROM_REG(data->target_count[channel], sr);
		*val = rpm;
		return 0;
	case hwmon_fan_fault:
		*val = !!(data->fault_status & (1 << channel));
		return 0;
	default:
		return -EOPNOTSUPP;
	}
}

static int max31790_write_fan(struct device *dev, u32 attr, int channel,
			      long val)
{
	struct max31790_data *data = dev_get_drvdata(dev);
	struct i2c_client *client = data->client;
	int target_count;
	int err = 0;
	u8 bits;
	int sr;

	mutex_lock(&data->update_lock);

	switch (attr) {
	case hwmon_fan_target:
		val = clamp_val(val, FAN_RPM_MIN, FAN_RPM_MAX);
		bits = bits_for_tach_period(val);
		data->fan_dynamics[channel] =
			((data->fan_dynamics[channel] &
			  ~MAX31790_FAN_DYN_SR_MASK) |
			 (bits << MAX31790_FAN_DYN_SR_SHIFT));
		err = i2c_smbus_write_byte_data(client,
					MAX31790_REG_FAN_DYNAMICS(channel),
					data->fan_dynamics[channel]);
		if (err < 0)
			break;

		sr = get_tach_period(data->fan_dynamics[channel]);
		target_count = RPM_TO_REG(val, sr);
		target_count = clamp_val(target_count, 0x1, 0x7FF);

		data->target_count[channel] = target_count << 5;

		err = i2c_smbus_write_word_swapped(client,
					MAX31790_REG_TARGET_COUNT(channel),
					data->target_count[channel]);
		break;
	default:
		err = -EOPNOTSUPP;
		break;
	}

	mutex_unlock(&data->update_lock);

	return err;
}

static umode_t max31790_fan_is_visible(const void *_data, u32 attr, int channel)
{
	const struct max31790_data *data = _data;
	u8 fan_config = data->fan_config[channel % NR_CHANNEL];

	switch (attr) {
	case hwmon_fan_input:
	case hwmon_fan_fault:
		if (channel < NR_CHANNEL ||
		    (fan_config & MAX31790_FAN_CFG_TACH_INPUT))
			return S_IRUGO;
		return 0;
	case hwmon_fan_target:
		if (channel < NR_CHANNEL &&
		    !(fan_config & MAX31790_FAN_CFG_TACH_INPUT))
			return S_IRUGO | S_IWUSR;
		return 0;
	default:
		return 0;
	}
}

static int max31790_read_pwm(struct device *dev, u32 attr, int channel,
			     long *val)
{
	struct max31790_data *data = max31790_update_device(dev);
	u8 fan_config;

	if (IS_ERR(data))
		return PTR_ERR(data);

	fan_config = data->fan_config[channel];

	switch (attr) {
	case hwmon_pwm_input:
		*val = data->pwm[channel] >> 8;
		return 0;
	case hwmon_pwm_enable:
		if (fan_config & MAX31790_FAN_CFG_RPM_MODE)
			*val = 2;
		else if (fan_config & MAX31790_FAN_CFG_TACH_INPUT_EN)
			*val = 1;
		else
			*val = 0;
		return 0;
	default:
		return -EOPNOTSUPP;
	}
}

static int max31790_write_pwm(struct device *dev, u32 attr, int channel,
			      long val)
{
	struct max31790_data *data = dev_get_drvdata(dev);
	struct i2c_client *client = data->client;
	u8 fan_config;
	int err = 0;

	mutex_lock(&data->update_lock);

	switch (attr) {
	case hwmon_pwm_input:
		if (val < 0 || val > 255) {
			err = -EINVAL;
			break;
		}
		data->pwm[channel] = val << 8;
		err = i2c_smbus_write_word_swapped(client,
						   MAX31790_REG_PWMOUT(channel),
						   data->pwm[channel]);
		break;
	case hwmon_pwm_enable:
		fan_config = data->fan_config[channel];
		if (val == 0) {
			fan_config &= ~(MAX31790_FAN_CFG_TACH_INPUT_EN |
					MAX31790_FAN_CFG_RPM_MODE);
		} else if (val == 1) {
			fan_config = (fan_config |
				      MAX31790_FAN_CFG_TACH_INPUT_EN) &
				     ~MAX31790_FAN_CFG_RPM_MODE;
		} else if (val == 2) {
			fan_config |= MAX31790_FAN_CFG_TACH_INPUT_EN |
				      MAX31790_FAN_CFG_RPM_MODE;
		} else {
			err = -EINVAL;
			break;
		}
		data->fan_config[channel] = fan_config;
		err = i2c_smbus_write_byte_data(client,
					MAX31790_REG_FAN_CONFIG(channel),
					fan_config);
		break;
	default:
		err = -EOPNOTSUPP;
		break;
	}

	mutex_unlock(&data->update_lock);

	return err;
}

static umode_t max31790_pwm_is_visible(const void *_data, u32 attr, int channel)
{
	const struct max31790_data *data = _data;
	u8 fan_config = data->fan_config[channel];

	switch (attr) {
	case hwmon_pwm_input:
	case hwmon_pwm_enable:
		if (!(fan_config & MAX31790_FAN_CFG_TACH_INPUT))
			return S_IRUGO | S_IWUSR;
		return 0;
	default:
		return 0;
	}
}

static int max31790_read(struct device *dev, enum hwmon_sensor_types type,
			 u32 attr, int channel, long *val)
{
	switch (type) {
	case hwmon_fan:
		return max31790_read_fan(dev, attr, channel, val);
	case hwmon_pwm:
		return max31790_read_pwm(dev, attr, channel, val);
	default:
		return -EOPNOTSUPP;
	}
}

static int max31790_write(struct device *dev, enum hwmon_sensor_types type,
			  u32 attr, int channel, long val)
{
	switch (type) {
	case hwmon_fan:
		return max31790_write_fan(dev, attr, channel, val);
	case hwmon_pwm:
		return max31790_write_pwm(dev, attr, channel, val);
	default:
		return -EOPNOTSUPP;
	}
}

static umode_t max31790_is_visible(const void *data,
				   enum hwmon_sensor_types type,
				   u32 attr, int channel)
{
	switch (type) {
	case hwmon_fan:
		return max31790_fan_is_visible(data, attr, channel);
	case hwmon_pwm:
		return max31790_pwm_is_visible(data, attr, channel);
	default:
		return 0;
	}
}

static const u32 max31790_fan_config[] = {
	HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT,
	HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT,
	HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT,
	HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT,
	HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT,
	HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT,
	HWMON_F_INPUT | HWMON_F_FAULT,
	HWMON_F_INPUT | HWMON_F_FAULT,
	HWMON_F_INPUT | HWMON_F_FAULT,
	HWMON_F_INPUT | HWMON_F_FAULT,
	HWMON_F_INPUT | HWMON_F_FAULT,
	HWMON_F_INPUT | HWMON_F_FAULT,
	0
};

static const struct hwmon_channel_info max31790_fan = {
	.type = hwmon_fan,
	.config = max31790_fan_config,
};

static const u32 max31790_pwm_config[] = {
	HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
	HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
	HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
	HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
	HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
	HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
	0
};

static const struct hwmon_channel_info max31790_pwm = {
	.type = hwmon_pwm,
	.config = max31790_pwm_config,
};

static const struct hwmon_channel_info *max31790_info[] = {
	&max31790_fan,
	&max31790_pwm,
	NULL
};

static const struct hwmon_ops max31790_hwmon_ops = {
	.is_visible = max31790_is_visible,
	.read = max31790_read,
	.write = max31790_write,
};

static const struct hwmon_chip_info max31790_chip_info = {
	.ops = &max31790_hwmon_ops,
	.info = max31790_info,
};

static int max31790_init_client(struct i2c_client *client,
				struct max31790_data *data)
{
	int i, rv;

	for (i = 0; i < NR_CHANNEL; i++) {
		rv = i2c_smbus_read_byte_data(client,
				MAX31790_REG_FAN_CONFIG(i));
		if (rv < 0)
			return rv;
		data->fan_config[i] = rv;

		rv = i2c_smbus_read_byte_data(client,
				MAX31790_REG_FAN_DYNAMICS(i));
		if (rv < 0)
			return rv;
		data->fan_dynamics[i] = rv;
	}

	return 0;
}

static int max31790_probe(struct i2c_client *client,
			  const struct i2c_device_id *id)
{
	struct i2c_adapter *adapter = client->adapter;
	struct device *dev = &client->dev;
	struct max31790_data *data;
	struct device *hwmon_dev;
	int err;

	if (!i2c_check_functionality(adapter,
			I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA))
		return -ENODEV;

	data = devm_kzalloc(dev, sizeof(struct max31790_data), GFP_KERNEL);
	if (!data)
		return -ENOMEM;

	data->client = client;
	mutex_init(&data->update_lock);

	/*
	 * Initialize the max31790 chip
	 */
	err = max31790_init_client(client, data);
	if (err)
		return err;

	hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
							 data,
							 &max31790_chip_info,
							 NULL);

	return PTR_ERR_OR_ZERO(hwmon_dev);
}

static const struct i2c_device_id max31790_id[] = {
	{ "max31790", 0 },
	{ }
};
MODULE_DEVICE_TABLE(i2c, max31790_id);

static struct i2c_driver max31790_driver = {
	.class		= I2C_CLASS_HWMON,
	.probe		= max31790_probe,
	.driver = {
		.name	= "max31790",
	},
	.id_table	= max31790_id,
};

module_i2c_driver(max31790_driver);

MODULE_AUTHOR("Il Han <corone.il.han@gmail.com>");
MODULE_DESCRIPTION("MAX31790 sensor driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
195a4b42 IH	1	/*
	2	* max31790.c - Part of lm_sensors, Linux kernel modules for hardware
	3	* monitoring.
	4	*
	5	* (C) 2015 by Il Han <corone.il.han@gmail.com>
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License as published by
	9	* the Free Software Foundation; either version 2 of the License, or
	10	* (at your option) any later version.
	11	*
	12	* This program is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	* GNU General Public License for more details.
	16	*/
	17
	18	#include <linux/err.h>
	19	#include <linux/hwmon.h>
195a4b42 IH	20	#include <linux/i2c.h>
	21	#include <linux/init.h>
	22	#include <linux/jiffies.h>
	23	#include <linux/module.h>
	24	#include <linux/slab.h>
	25
	26	/* MAX31790 registers */
	27	#define MAX31790_REG_GLOBAL_CONFIG 0x00
	28	#define MAX31790_REG_FAN_CONFIG(ch) (0x02 + (ch))
	29	#define MAX31790_REG_FAN_DYNAMICS(ch) (0x08 + (ch))
	30	#define MAX31790_REG_FAN_FAULT_STATUS2 0x10
	31	#define MAX31790_REG_FAN_FAULT_STATUS1 0x11
	32	#define MAX31790_REG_TACH_COUNT(ch) (0x18 + (ch) * 2)
	33	#define MAX31790_REG_PWM_DUTY_CYCLE(ch) (0x30 + (ch) * 2)
	34	#define MAX31790_REG_PWMOUT(ch) (0x40 + (ch) * 2)
	35	#define MAX31790_REG_TARGET_COUNT(ch) (0x50 + (ch) * 2)
	36
	37	/* Fan Config register bits */
	38	#define MAX31790_FAN_CFG_RPM_MODE 0x80
	39	#define MAX31790_FAN_CFG_TACH_INPUT_EN 0x08
	40	#define MAX31790_FAN_CFG_TACH_INPUT 0x01
	41
	42	/* Fan Dynamics register bits */
	43	#define MAX31790_FAN_DYN_SR_SHIFT 5
	44	#define MAX31790_FAN_DYN_SR_MASK 0xE0
	45	#define SR_FROM_REG(reg) (((reg) & MAX31790_FAN_DYN_SR_MASK) \
	46	>> MAX31790_FAN_DYN_SR_SHIFT)
	47
	48	#define FAN_RPM_MIN 120
	49	#define FAN_RPM_MAX 7864320
	50
	51	#define RPM_FROM_REG(reg, sr) (((reg) >> 4) ? \
	52	((60 * (sr) * 8192) / ((reg) >> 4)) : \
	53	FAN_RPM_MAX)
	54	#define RPM_TO_REG(rpm, sr) ((60 * (sr) * 8192) / ((rpm) * 2))
	55
	56	#define NR_CHANNEL 6
	57
	58	/*
	59	* Client data (each client gets its own)
	60	*/
	61	struct max31790_data {
	62	struct i2c_client *client;
	63	struct mutex update_lock;
	64	bool valid; /* zero until following fields are valid */
	65	unsigned long last_updated; /* in jiffies */
	66
	67	/* register values */
	68	u8 fan_config[NR_CHANNEL];
	69	u8 fan_dynamics[NR_CHANNEL];
	70	u16 fault_status;
	71	u16 tach[NR_CHANNEL * 2];
	72	u16 pwm[NR_CHANNEL];
	73	u16 target_count[NR_CHANNEL];
	74	};
	75
	76	static struct max31790_data max31790_update_device(struct device dev)
	77	{
	78	struct max31790_data *data = dev_get_drvdata(dev);
	79	struct i2c_client *client = data->client;
	80	struct max31790_data *ret = data;
	81	int i;
	82	int rv;
	83
84	mutex_lock(&data->update_lock);
85
86	if (time_after(jiffies, data->last_updated + HZ) \|\| !data->valid) {
87	rv = i2c_smbus_read_byte_data(client,
88	MAX31790_REG_FAN_FAULT_STATUS1);
89	if (rv < 0)
90	goto abort;
91	data->fault_status = rv & 0x3F;
92
93	rv = i2c_smbus_read_byte_data(client,
94	MAX31790_REG_FAN_FAULT_STATUS2);
95	if (rv < 0)
96	goto abort;
97	data->fault_status \|= (rv & 0x3F) << 6;
98
99	for (i = 0; i < NR_CHANNEL; i++) {
100	rv = i2c_smbus_read_word_swapped(client,
101	MAX31790_REG_TACH_COUNT(i));
102	if (rv < 0)
103	goto abort;
104	data->tach[i] = rv;
105
106	if (data->fan_config[i]
107	& MAX31790_FAN_CFG_TACH_INPUT) {
108	rv = i2c_smbus_read_word_swapped(client,
109	MAX31790_REG_TACH_COUNT(NR_CHANNEL
110	+ i));
111	if (rv < 0)
112	goto abort;
113	data->tach[NR_CHANNEL + i] = rv;
114	} else {
115	rv = i2c_smbus_read_word_swapped(client,
116	MAX31790_REG_PWMOUT(i));
117	if (rv < 0)
118	goto abort;
119	data->pwm[i] = rv;
120
121	rv = i2c_smbus_read_word_swapped(client,
122	MAX31790_REG_TARGET_COUNT(i));
123	if (rv < 0)
124	goto abort;
125	data->target_count[i] = rv;
126	}
127	}
128
129	data->last_updated = jiffies;
130	data->valid = true;
131	}
132	goto done;
133
134	abort:
135	data->valid = false;
136	ret = ERR_PTR(rv);
137
138	done:
139	mutex_unlock(&data->update_lock);
140
141	return ret;
142	}
143
144	static const u8 tach_period[8] = { 1, 2, 4, 8, 16, 32, 32, 32 };
145
146	static u8 get_tach_period(u8 fan_dynamics)
147	{
148	return tach_period[SR_FROM_REG(fan_dynamics)];
149	}
150
151	static u8 bits_for_tach_period(int rpm)
152	{
153	u8 bits;
154
155	if (rpm < 500)
156	bits = 0x0;
157	else if (rpm < 1000)
158	bits = 0x1;
159	else if (rpm < 2000)
160	bits = 0x2;
161	else if (rpm < 4000)
162	bits = 0x3;
163	else if (rpm < 8000)
164	bits = 0x4;
165	else
166	bits = 0x5;
167
168	return bits;
169	}
170
54187ff9 GR	171	static int max31790_read_fan(struct device *dev, u32 attr, int channel,
54187ff9 GR	172	long *val)
195a4b42	173	{
195a4b42	174	struct max31790_data *data = max31790_update_device(dev);
791432cf	175	int sr, rpm;
195a4b42 IH	176
	177	if (IS_ERR(data))
	178	return PTR_ERR(data);
	179
54187ff9 GR	180	switch (attr) {
	181	case hwmon_fan_input:
	182	sr = get_tach_period(data->fan_dynamics[channel]);
	183	rpm = RPM_FROM_REG(data->tach[channel], sr);
	184	*val = rpm;
	185	return 0;
	186	case hwmon_fan_target:
	187	sr = get_tach_period(data->fan_dynamics[channel]);
	188	rpm = RPM_FROM_REG(data->target_count[channel], sr);
	189	*val = rpm;
	190	return 0;
	191	case hwmon_fan_fault:
	192	*val = !!(data->fault_status & (1 << channel));
	193	return 0;
	194	default:
	195	return -EOPNOTSUPP;
	196	}
195a4b42 IH	197	}
195a4b42 IH	198
54187ff9 GR	199	static int max31790_write_fan(struct device *dev, u32 attr, int channel,
54187ff9 GR	200	long val)
195a4b42	201	{
195a4b42 IH	202	struct max31790_data *data = dev_get_drvdata(dev);
195a4b42 IH	203	struct i2c_client *client = data->client;
54187ff9 GR	204	int target_count;
54187ff9 GR	205	int err = 0;
195a4b42 IH	206	u8 bits;
195a4b42 IH	207	int sr;
195a4b42 IH	208
	209	mutex_lock(&data->update_lock);
	210
54187ff9 GR	211	switch (attr) {
	212	case hwmon_fan_target:
	213	val = clamp_val(val, FAN_RPM_MIN, FAN_RPM_MAX);
	214	bits = bits_for_tach_period(val);
	215	data->fan_dynamics[channel] =
	216	((data->fan_dynamics[channel] &
	217	~MAX31790_FAN_DYN_SR_MASK) \|
	218	(bits << MAX31790_FAN_DYN_SR_SHIFT));
	219	err = i2c_smbus_write_byte_data(client,
	220	MAX31790_REG_FAN_DYNAMICS(channel),
	221	data->fan_dynamics[channel]);
	222	if (err < 0)
	223	break;
	224
	225	sr = get_tach_period(data->fan_dynamics[channel]);
	226	target_count = RPM_TO_REG(val, sr);
	227	target_count = clamp_val(target_count, 0x1, 0x7FF);
	228
	229	data->target_count[channel] = target_count << 5;
	230
	231	err = i2c_smbus_write_word_swapped(client,
	232	MAX31790_REG_TARGET_COUNT(channel),
	233	data->target_count[channel]);
	234	break;
	235	default:
	236	err = -EOPNOTSUPP;
	237	break;
195a4b42 IH	238	}
195a4b42 IH	239
195a4b42 IH	240	mutex_unlock(&data->update_lock);
195a4b42 IH	241
54187ff9 GR	242	return err;
54187ff9 GR	243	}
195a4b42	244
54187ff9 GR	245	static umode_t max31790_fan_is_visible(const void *_data, u32 attr, int channel)
	246	{
	247	const struct max31790_data *data = _data;
	248	u8 fan_config = data->fan_config[channel % NR_CHANNEL];
	249
	250	switch (attr) {
	251	case hwmon_fan_input:
	252	case hwmon_fan_fault:
	253	if (channel < NR_CHANNEL \|\|
	254	(fan_config & MAX31790_FAN_CFG_TACH_INPUT))
	255	return S_IRUGO;
	256	return 0;
	257	case hwmon_fan_target:
	258	if (channel < NR_CHANNEL &&
	259	!(fan_config & MAX31790_FAN_CFG_TACH_INPUT))
	260	return S_IRUGO \| S_IWUSR;
	261	return 0;
	262	default:
	263	return 0;
	264	}
195a4b42 IH	265	}
195a4b42 IH	266
54187ff9 GR	267	static int max31790_read_pwm(struct device *dev, u32 attr, int channel,
54187ff9 GR	268	long *val)
195a4b42	269	{
195a4b42	270	struct max31790_data *data = max31790_update_device(dev);
94cdc560	271	u8 fan_config;
195a4b42 IH	272
	273	if (IS_ERR(data))
	274	return PTR_ERR(data);
	275
94cdc560 DC	276	fan_config = data->fan_config[channel];
94cdc560 DC	277
54187ff9 GR	278	switch (attr) {
	279	case hwmon_pwm_input:
	280	*val = data->pwm[channel] >> 8;
	281	return 0;
	282	case hwmon_pwm_enable:
	283	if (fan_config & MAX31790_FAN_CFG_RPM_MODE)
	284	*val = 2;
	285	else if (fan_config & MAX31790_FAN_CFG_TACH_INPUT_EN)
	286	*val = 1;
	287	else
	288	*val = 0;
	289	return 0;
	290	default:
	291	return -EOPNOTSUPP;
	292	}
195a4b42 IH	293	}
195a4b42 IH	294
54187ff9 GR	295	static int max31790_write_pwm(struct device *dev, u32 attr, int channel,
54187ff9 GR	296	long val)
195a4b42	297	{
195a4b42 IH	298	struct max31790_data *data = dev_get_drvdata(dev);
195a4b42 IH	299	struct i2c_client *client = data->client;
54187ff9 GR	300	u8 fan_config;
54187ff9 GR	301	int err = 0;
195a4b42 IH	302
	303	mutex_lock(&data->update_lock);
	304
54187ff9 GR	305	switch (attr) {
	306	case hwmon_pwm_input:
	307	if (val < 0 \|\| val > 255) {
	308	err = -EINVAL;
	309	break;
	310	}
	311	data->pwm[channel] = val << 8;
	312	err = i2c_smbus_write_word_swapped(client,
	313	MAX31790_REG_PWMOUT(channel),
dd7406dd	314	data->pwm[channel]);
54187ff9 GR	315	break;
	316	case hwmon_pwm_enable:
	317	fan_config = data->fan_config[channel];
	318	if (val == 0) {
	319	fan_config &= ~(MAX31790_FAN_CFG_TACH_INPUT_EN \|
	320	MAX31790_FAN_CFG_RPM_MODE);
	321	} else if (val == 1) {
	322	fan_config = (fan_config \|
	323	MAX31790_FAN_CFG_TACH_INPUT_EN) &
	324	~MAX31790_FAN_CFG_RPM_MODE;
	325	} else if (val == 2) {
	326	fan_config \|= MAX31790_FAN_CFG_TACH_INPUT_EN \|
	327	MAX31790_FAN_CFG_RPM_MODE;
	328	} else {
	329	err = -EINVAL;
	330	break;
	331	}
	332	data->fan_config[channel] = fan_config;
	333	err = i2c_smbus_write_byte_data(client,
	334	MAX31790_REG_FAN_CONFIG(channel),
	335	fan_config);
	336	break;
	337	default:
	338	err = -EOPNOTSUPP;
	339	break;
	340	}
195a4b42 IH	341
	342	mutex_unlock(&data->update_lock);
	343
54187ff9	344	return err;
195a4b42 IH	345	}
195a4b42 IH	346
54187ff9	347	static umode_t max31790_pwm_is_visible(const void *_data, u32 attr, int channel)
195a4b42	348	{
54187ff9 GR	349	const struct max31790_data *data = _data;
	350	u8 fan_config = data->fan_config[channel];
	351
	352	switch (attr) {
	353	case hwmon_pwm_input:
	354	case hwmon_pwm_enable:
	355	if (!(fan_config & MAX31790_FAN_CFG_TACH_INPUT))
	356	return S_IRUGO \| S_IWUSR;
	357	return 0;
	358	default:
	359	return 0;
	360	}
195a4b42 IH	361	}
195a4b42 IH	362
54187ff9 GR	363	static int max31790_read(struct device *dev, enum hwmon_sensor_types type,
54187ff9 GR	364	u32 attr, int channel, long *val)
195a4b42	365	{
54187ff9 GR	366	switch (type) {
	367	case hwmon_fan:
	368	return max31790_read_fan(dev, attr, channel, val);
	369	case hwmon_pwm:
	370	return max31790_read_pwm(dev, attr, channel, val);
195a4b42	371	default:
54187ff9	372	return -EOPNOTSUPP;
195a4b42	373	}
195a4b42 IH	374	}
195a4b42 IH	375
54187ff9 GR	376	static int max31790_write(struct device *dev, enum hwmon_sensor_types type,
54187ff9 GR	377	u32 attr, int channel, long val)
195a4b42	378	{
54187ff9 GR	379	switch (type) {
	380	case hwmon_fan:
	381	return max31790_write_fan(dev, attr, channel, val);
	382	case hwmon_pwm:
	383	return max31790_write_pwm(dev, attr, channel, val);
	384	default:
	385	return -EOPNOTSUPP;
	386	}
	387	}
195a4b42	388
54187ff9 GR	389	static umode_t max31790_is_visible(const void *data,
	390	enum hwmon_sensor_types type,
	391	u32 attr, int channel)
	392	{
	393	switch (type) {
	394	case hwmon_fan:
	395	return max31790_fan_is_visible(data, attr, channel);
	396	case hwmon_pwm:
	397	return max31790_pwm_is_visible(data, attr, channel);
	398	default:
	399	return 0;
	400	}
195a4b42 IH	401	}
195a4b42 IH	402
54187ff9 GR	403	static const u32 max31790_fan_config[] = {
	404	HWMON_F_INPUT \| HWMON_F_TARGET \| HWMON_F_FAULT,
	405	HWMON_F_INPUT \| HWMON_F_TARGET \| HWMON_F_FAULT,
	406	HWMON_F_INPUT \| HWMON_F_TARGET \| HWMON_F_FAULT,
	407	HWMON_F_INPUT \| HWMON_F_TARGET \| HWMON_F_FAULT,
	408	HWMON_F_INPUT \| HWMON_F_TARGET \| HWMON_F_FAULT,
	409	HWMON_F_INPUT \| HWMON_F_TARGET \| HWMON_F_FAULT,
	410	HWMON_F_INPUT \| HWMON_F_FAULT,
	411	HWMON_F_INPUT \| HWMON_F_FAULT,
	412	HWMON_F_INPUT \| HWMON_F_FAULT,
	413	HWMON_F_INPUT \| HWMON_F_FAULT,
	414	HWMON_F_INPUT \| HWMON_F_FAULT,
	415	HWMON_F_INPUT \| HWMON_F_FAULT,
	416	0
195a4b42 IH	417	};
195a4b42 IH	418
54187ff9 GR	419	static const struct hwmon_channel_info max31790_fan = {
	420	.type = hwmon_fan,
	421	.config = max31790_fan_config,
	422	};
195a4b42	423
54187ff9 GR	424	static const u32 max31790_pwm_config[] = {
	425	HWMON_PWM_INPUT \| HWMON_PWM_ENABLE,
	426	HWMON_PWM_INPUT \| HWMON_PWM_ENABLE,
	427	HWMON_PWM_INPUT \| HWMON_PWM_ENABLE,
	428	HWMON_PWM_INPUT \| HWMON_PWM_ENABLE,
	429	HWMON_PWM_INPUT \| HWMON_PWM_ENABLE,
	430	HWMON_PWM_INPUT \| HWMON_PWM_ENABLE,
	431	0
	432	};
195a4b42	433
54187ff9 GR	434	static const struct hwmon_channel_info max31790_pwm = {
	435	.type = hwmon_pwm,
	436	.config = max31790_pwm_config,
	437	};
195a4b42	438
54187ff9 GR	439	static const struct hwmon_channel_info *max31790_info[] = {
	440	&max31790_fan,
	441	&max31790_pwm,
	442	NULL
	443	};
	444
	445	static const struct hwmon_ops max31790_hwmon_ops = {
	446	.is_visible = max31790_is_visible,
	447	.read = max31790_read,
	448	.write = max31790_write,
	449	};
195a4b42	450
54187ff9 GR	451	static const struct hwmon_chip_info max31790_chip_info = {
	452	.ops = &max31790_hwmon_ops,
	453	.info = max31790_info,
195a4b42	454	};
195a4b42 IH	455
	456	static int max31790_init_client(struct i2c_client *client,
	457	struct max31790_data *data)
	458	{
	459	int i, rv;
	460
	461	for (i = 0; i < NR_CHANNEL; i++) {
	462	rv = i2c_smbus_read_byte_data(client,
	463	MAX31790_REG_FAN_CONFIG(i));
	464	if (rv < 0)
	465	return rv;
	466	data->fan_config[i] = rv;
	467
	468	rv = i2c_smbus_read_byte_data(client,
	469	MAX31790_REG_FAN_DYNAMICS(i));
	470	if (rv < 0)
	471	return rv;
	472	data->fan_dynamics[i] = rv;
	473	}
	474
	475	return 0;
	476	}
	477
	478	static int max31790_probe(struct i2c_client *client,
	479	const struct i2c_device_id *id)
	480	{
	481	struct i2c_adapter *adapter = client->adapter;
	482	struct device *dev = &client->dev;
	483	struct max31790_data *data;
	484	struct device *hwmon_dev;
	485	int err;
	486
	487	if (!i2c_check_functionality(adapter,
	488	I2C_FUNC_SMBUS_BYTE_DATA \| I2C_FUNC_SMBUS_WORD_DATA))
	489	return -ENODEV;
	490
	491	data = devm_kzalloc(dev, sizeof(struct max31790_data), GFP_KERNEL);
	492	if (!data)
	493	return -ENOMEM;
	494
	495	data->client = client;
	496	mutex_init(&data->update_lock);
	497
	498	/*
	499	* Initialize the max31790 chip
	500	*/
	501	err = max31790_init_client(client, data);
	502	if (err)
	503	return err;
	504
54187ff9 GR	505	hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
	506	data,
	507	&max31790_chip_info,
	508	NULL);
195a4b42 IH	509
	510	return PTR_ERR_OR_ZERO(hwmon_dev);
	511	}
	512
	513	static const struct i2c_device_id max31790_id[] = {
	514	{ "max31790", 0 },
	515	{ }
	516	};
	517	MODULE_DEVICE_TABLE(i2c, max31790_id);
	518
	519	static struct i2c_driver max31790_driver = {
	520	.class = I2C_CLASS_HWMON,
	521	.probe = max31790_probe,
	522	.driver = {
	523	.name = "max31790",
	524	},
	525	.id_table = max31790_id,
	526	};
	527
	528	module_i2c_driver(max31790_driver);
	529
	530	MODULE_AUTHOR("Il Han <corone.il.han@gmail.com>");
	531	MODULE_DESCRIPTION("MAX31790 sensor driver");
	532	MODULE_LICENSE("GPL");