[mirror_ubuntu-hirsute-kernel.git] / drivers / hwmon / max31790.c

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * max31790.c - Part of lm_sensors, Linux kernel modules for hardware
 *             monitoring.
 *
 * (C) 2015 by Il Han <corone.il.han@gmail.com>
 */

#include <linux/err.h>
#include <linux/hwmon.h>
#include <linux/i2c.h>
#include <linux/init.h>
#include <linux/jiffies.h>
#include <linux/module.h>
#include <linux/slab.h>

/* MAX31790 registers */
#define MAX31790_REG_GLOBAL_CONFIG	0x00
#define MAX31790_REG_FAN_CONFIG(ch)	(0x02 + (ch))
#define MAX31790_REG_FAN_DYNAMICS(ch)	(0x08 + (ch))
#define MAX31790_REG_FAN_FAULT_STATUS2	0x10
#define MAX31790_REG_FAN_FAULT_STATUS1	0x11
#define MAX31790_REG_TACH_COUNT(ch)	(0x18 + (ch) * 2)
#define MAX31790_REG_PWM_DUTY_CYCLE(ch)	(0x30 + (ch) * 2)
#define MAX31790_REG_PWMOUT(ch)		(0x40 + (ch) * 2)
#define MAX31790_REG_TARGET_COUNT(ch)	(0x50 + (ch) * 2)

/* Fan Config register bits */
#define MAX31790_FAN_CFG_RPM_MODE	0x80
#define MAX31790_FAN_CFG_TACH_INPUT_EN	0x08
#define MAX31790_FAN_CFG_TACH_INPUT	0x01

/* Fan Dynamics register bits */
#define MAX31790_FAN_DYN_SR_SHIFT	5
#define MAX31790_FAN_DYN_SR_MASK	0xE0
#define SR_FROM_REG(reg)		(((reg) & MAX31790_FAN_DYN_SR_MASK) \
					 >> MAX31790_FAN_DYN_SR_SHIFT)

#define FAN_RPM_MIN			120
#define FAN_RPM_MAX			7864320

#define RPM_FROM_REG(reg, sr)		(((reg) >> 4) ? \
					 ((60 * (sr) * 8192) / ((reg) >> 4)) : \
					 FAN_RPM_MAX)
#define RPM_TO_REG(rpm, sr)		((60 * (sr) * 8192) / ((rpm) * 2))

#define NR_CHANNEL			6

/*
 * Client data (each client gets its own)
 */
struct max31790_data {
	struct i2c_client *client;
	struct mutex update_lock;
	bool valid; /* zero until following fields are valid */
	unsigned long last_updated; /* in jiffies */

	/* register values */
	u8 fan_config[NR_CHANNEL];
	u8 fan_dynamics[NR_CHANNEL];
	u16 fault_status;
	u16 tach[NR_CHANNEL * 2];
	u16 pwm[NR_CHANNEL];
	u16 target_count[NR_CHANNEL];
};

static struct max31790_data *max31790_update_device(struct device *dev)
{
	struct max31790_data *data = dev_get_drvdata(dev);
	struct i2c_client *client = data->client;
	struct max31790_data *ret = data;
	int i;
	int rv;

	mutex_lock(&data->update_lock);

	if (time_after(jiffies, data->last_updated + HZ) || !data->valid) {
		rv = i2c_smbus_read_byte_data(client,
				MAX31790_REG_FAN_FAULT_STATUS1);
		if (rv < 0)
			goto abort;
		data->fault_status = rv & 0x3F;

		rv = i2c_smbus_read_byte_data(client,
				MAX31790_REG_FAN_FAULT_STATUS2);
		if (rv < 0)
			goto abort;
		data->fault_status |= (rv & 0x3F) << 6;

		for (i = 0; i < NR_CHANNEL; i++) {
			rv = i2c_smbus_read_word_swapped(client,
					MAX31790_REG_TACH_COUNT(i));
			if (rv < 0)
				goto abort;
			data->tach[i] = rv;

			if (data->fan_config[i]
			    & MAX31790_FAN_CFG_TACH_INPUT) {
				rv = i2c_smbus_read_word_swapped(client,
					MAX31790_REG_TACH_COUNT(NR_CHANNEL
								+ i));
				if (rv < 0)
					goto abort;
				data->tach[NR_CHANNEL + i] = rv;
			} else {
				rv = i2c_smbus_read_word_swapped(client,
						MAX31790_REG_PWMOUT(i));
				if (rv < 0)
					goto abort;
				data->pwm[i] = rv;

				rv = i2c_smbus_read_word_swapped(client,
						MAX31790_REG_TARGET_COUNT(i));
				if (rv < 0)
					goto abort;
				data->target_count[i] = rv;
			}
		}

		data->last_updated = jiffies;
		data->valid = true;
	}
	goto done;

abort:
	data->valid = false;
	ret = ERR_PTR(rv);

done:
	mutex_unlock(&data->update_lock);

	return ret;
}

static const u8 tach_period[8] = { 1, 2, 4, 8, 16, 32, 32, 32 };

static u8 get_tach_period(u8 fan_dynamics)
{
	return tach_period[SR_FROM_REG(fan_dynamics)];
}

static u8 bits_for_tach_period(int rpm)
{
	u8 bits;

	if (rpm < 500)
		bits = 0x0;
	else if (rpm < 1000)
		bits = 0x1;
	else if (rpm < 2000)
		bits = 0x2;
	else if (rpm < 4000)
		bits = 0x3;
	else if (rpm < 8000)
		bits = 0x4;
	else
		bits = 0x5;

	return bits;
}

static int max31790_read_fan(struct device *dev, u32 attr, int channel,
			     long *val)
{
	struct max31790_data *data = max31790_update_device(dev);
	int sr, rpm;

	if (IS_ERR(data))
		return PTR_ERR(data);

	switch (attr) {
	case hwmon_fan_input:
		sr = get_tach_period(data->fan_dynamics[channel]);
		rpm = RPM_FROM_REG(data->tach[channel], sr);
		*val = rpm;
		return 0;
	case hwmon_fan_target:
		sr = get_tach_period(data->fan_dynamics[channel]);
		rpm = RPM_FROM_REG(data->target_count[channel], sr);
		*val = rpm;
		return 0;
	case hwmon_fan_fault:
		*val = !!(data->fault_status & (1 << channel));
		return 0;
	default:
		return -EOPNOTSUPP;
	}
}

static int max31790_write_fan(struct device *dev, u32 attr, int channel,
			      long val)
{
	struct max31790_data *data = dev_get_drvdata(dev);
	struct i2c_client *client = data->client;
	int target_count;
	int err = 0;
	u8 bits;
	int sr;

	mutex_lock(&data->update_lock);

	switch (attr) {
	case hwmon_fan_target:
		val = clamp_val(val, FAN_RPM_MIN, FAN_RPM_MAX);
		bits = bits_for_tach_period(val);
		data->fan_dynamics[channel] =
			((data->fan_dynamics[channel] &
			  ~MAX31790_FAN_DYN_SR_MASK) |
			 (bits << MAX31790_FAN_DYN_SR_SHIFT));
		err = i2c_smbus_write_byte_data(client,
					MAX31790_REG_FAN_DYNAMICS(channel),
					data->fan_dynamics[channel]);
		if (err < 0)
			break;

		sr = get_tach_period(data->fan_dynamics[channel]);
		target_count = RPM_TO_REG(val, sr);
		target_count = clamp_val(target_count, 0x1, 0x7FF);

		data->target_count[channel] = target_count << 5;

		err = i2c_smbus_write_word_swapped(client,
					MAX31790_REG_TARGET_COUNT(channel),
					data->target_count[channel]);
		break;
	default:
		err = -EOPNOTSUPP;
		break;
	}

	mutex_unlock(&data->update_lock);

	return err;
}

static umode_t max31790_fan_is_visible(const void *_data, u32 attr, int channel)
{
	const struct max31790_data *data = _data;
	u8 fan_config = data->fan_config[channel % NR_CHANNEL];

	switch (attr) {
	case hwmon_fan_input:
	case hwmon_fan_fault:
		if (channel < NR_CHANNEL ||
		    (fan_config & MAX31790_FAN_CFG_TACH_INPUT))
			return 0444;
		return 0;
	case hwmon_fan_target:
		if (channel < NR_CHANNEL &&
		    !(fan_config & MAX31790_FAN_CFG_TACH_INPUT))
			return 0644;
		return 0;
	default:
		return 0;
	}
}

static int max31790_read_pwm(struct device *dev, u32 attr, int channel,
			     long *val)
{
	struct max31790_data *data = max31790_update_device(dev);
	u8 fan_config;

	if (IS_ERR(data))
		return PTR_ERR(data);

	fan_config = data->fan_config[channel];

	switch (attr) {
	case hwmon_pwm_input:
		*val = data->pwm[channel] >> 8;
		return 0;
	case hwmon_pwm_enable:
		if (fan_config & MAX31790_FAN_CFG_RPM_MODE)
			*val = 2;
		else if (fan_config & MAX31790_FAN_CFG_TACH_INPUT_EN)
			*val = 1;
		else
			*val = 0;
		return 0;
	default:
		return -EOPNOTSUPP;
	}
}

static int max31790_write_pwm(struct device *dev, u32 attr, int channel,
			      long val)
{
	struct max31790_data *data = dev_get_drvdata(dev);
	struct i2c_client *client = data->client;
	u8 fan_config;
	int err = 0;

	mutex_lock(&data->update_lock);

	switch (attr) {
	case hwmon_pwm_input:
		if (val < 0 || val > 255) {
			err = -EINVAL;
			break;
		}
		data->pwm[channel] = val << 8;
		err = i2c_smbus_write_word_swapped(client,
						   MAX31790_REG_PWMOUT(channel),
						   data->pwm[channel]);
		break;
	case hwmon_pwm_enable:
		fan_config = data->fan_config[channel];
		if (val == 0) {
			fan_config &= ~(MAX31790_FAN_CFG_TACH_INPUT_EN |
					MAX31790_FAN_CFG_RPM_MODE);
		} else if (val == 1) {
			fan_config = (fan_config |
				      MAX31790_FAN_CFG_TACH_INPUT_EN) &
				     ~MAX31790_FAN_CFG_RPM_MODE;
		} else if (val == 2) {
			fan_config |= MAX31790_FAN_CFG_TACH_INPUT_EN |
				      MAX31790_FAN_CFG_RPM_MODE;
		} else {
			err = -EINVAL;
			break;
		}
		data->fan_config[channel] = fan_config;
		err = i2c_smbus_write_byte_data(client,
					MAX31790_REG_FAN_CONFIG(channel),
					fan_config);
		break;
	default:
		err = -EOPNOTSUPP;
		break;
	}

	mutex_unlock(&data->update_lock);

	return err;
}

static umode_t max31790_pwm_is_visible(const void *_data, u32 attr, int channel)
{
	const struct max31790_data *data = _data;
	u8 fan_config = data->fan_config[channel];

	switch (attr) {
	case hwmon_pwm_input:
	case hwmon_pwm_enable:
		if (!(fan_config & MAX31790_FAN_CFG_TACH_INPUT))
			return 0644;
		return 0;
	default:
		return 0;
	}
}

static int max31790_read(struct device *dev, enum hwmon_sensor_types type,
			 u32 attr, int channel, long *val)
{
	switch (type) {
	case hwmon_fan:
		return max31790_read_fan(dev, attr, channel, val);
	case hwmon_pwm:
		return max31790_read_pwm(dev, attr, channel, val);
	default:
		return -EOPNOTSUPP;
	}
}

static int max31790_write(struct device *dev, enum hwmon_sensor_types type,
			  u32 attr, int channel, long val)
{
	switch (type) {
	case hwmon_fan:
		return max31790_write_fan(dev, attr, channel, val);
	case hwmon_pwm:
		return max31790_write_pwm(dev, attr, channel, val);
	default:
		return -EOPNOTSUPP;
	}
}

static umode_t max31790_is_visible(const void *data,
				   enum hwmon_sensor_types type,
				   u32 attr, int channel)
{
	switch (type) {
	case hwmon_fan:
		return max31790_fan_is_visible(data, attr, channel);
	case hwmon_pwm:
		return max31790_pwm_is_visible(data, attr, channel);
	default:
		return 0;
	}
}

static const struct hwmon_channel_info *max31790_info[] = {
	HWMON_CHANNEL_INFO(fan,
			   HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT,
			   HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT,
			   HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT,
			   HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT,
			   HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT,
			   HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT,
			   HWMON_F_INPUT | HWMON_F_FAULT,
			   HWMON_F_INPUT | HWMON_F_FAULT,
			   HWMON_F_INPUT | HWMON_F_FAULT,
			   HWMON_F_INPUT | HWMON_F_FAULT,
			   HWMON_F_INPUT | HWMON_F_FAULT,
			   HWMON_F_INPUT | HWMON_F_FAULT),
	HWMON_CHANNEL_INFO(pwm,
			   HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
			   HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
			   HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
			   HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
			   HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
			   HWMON_PWM_INPUT | HWMON_PWM_ENABLE),
	NULL
};

static const struct hwmon_ops max31790_hwmon_ops = {
	.is_visible = max31790_is_visible,
	.read = max31790_read,
	.write = max31790_write,
};

static const struct hwmon_chip_info max31790_chip_info = {
	.ops = &max31790_hwmon_ops,
	.info = max31790_info,
};

static int max31790_init_client(struct i2c_client *client,
				struct max31790_data *data)
{
	int i, rv;

	for (i = 0; i < NR_CHANNEL; i++) {
		rv = i2c_smbus_read_byte_data(client,
				MAX31790_REG_FAN_CONFIG(i));
		if (rv < 0)
			return rv;
		data->fan_config[i] = rv;

		rv = i2c_smbus_read_byte_data(client,
				MAX31790_REG_FAN_DYNAMICS(i));
		if (rv < 0)
			return rv;
		data->fan_dynamics[i] = rv;
	}

	return 0;
}

static int max31790_probe(struct i2c_client *client,
			  const struct i2c_device_id *id)
{
	struct i2c_adapter *adapter = client->adapter;
	struct device *dev = &client->dev;
	struct max31790_data *data;
	struct device *hwmon_dev;
	int err;

	if (!i2c_check_functionality(adapter,
			I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA))
		return -ENODEV;

	data = devm_kzalloc(dev, sizeof(struct max31790_data), GFP_KERNEL);
	if (!data)
		return -ENOMEM;

	data->client = client;
	mutex_init(&data->update_lock);

	/*
	 * Initialize the max31790 chip
	 */
	err = max31790_init_client(client, data);
	if (err)
		return err;

	hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
							 data,
							 &max31790_chip_info,
							 NULL);

	return PTR_ERR_OR_ZERO(hwmon_dev);
}

static const struct i2c_device_id max31790_id[] = {
	{ "max31790", 0 },
	{ }
};
MODULE_DEVICE_TABLE(i2c, max31790_id);

static struct i2c_driver max31790_driver = {
	.class		= I2C_CLASS_HWMON,
	.probe		= max31790_probe,
	.driver = {
		.name	= "max31790",
	},
	.id_table	= max31790_id,
};

module_i2c_driver(max31790_driver);

MODULE_AUTHOR("Il Han <corone.il.han@gmail.com>");
MODULE_DESCRIPTION("MAX31790 sensor driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
c942fddf	1	// SPDX-License-Identifier: GPL-2.0-or-later
195a4b42 IH	2	/*
	3	* max31790.c - Part of lm_sensors, Linux kernel modules for hardware
	4	* monitoring.
	5	*
	6	* (C) 2015 by Il Han <corone.il.han@gmail.com>
195a4b42 IH	7	*/
	8
	9	#include <linux/err.h>
	10	#include <linux/hwmon.h>
195a4b42 IH	11	#include <linux/i2c.h>
	12	#include <linux/init.h>
	13	#include <linux/jiffies.h>
	14	#include <linux/module.h>
	15	#include <linux/slab.h>
	16
	17	/* MAX31790 registers */
	18	#define MAX31790_REG_GLOBAL_CONFIG 0x00
	19	#define MAX31790_REG_FAN_CONFIG(ch) (0x02 + (ch))
	20	#define MAX31790_REG_FAN_DYNAMICS(ch) (0x08 + (ch))
	21	#define MAX31790_REG_FAN_FAULT_STATUS2 0x10
	22	#define MAX31790_REG_FAN_FAULT_STATUS1 0x11
	23	#define MAX31790_REG_TACH_COUNT(ch) (0x18 + (ch) * 2)
	24	#define MAX31790_REG_PWM_DUTY_CYCLE(ch) (0x30 + (ch) * 2)
	25	#define MAX31790_REG_PWMOUT(ch) (0x40 + (ch) * 2)
	26	#define MAX31790_REG_TARGET_COUNT(ch) (0x50 + (ch) * 2)
	27
	28	/* Fan Config register bits */
	29	#define MAX31790_FAN_CFG_RPM_MODE 0x80
	30	#define MAX31790_FAN_CFG_TACH_INPUT_EN 0x08
	31	#define MAX31790_FAN_CFG_TACH_INPUT 0x01
	32
	33	/* Fan Dynamics register bits */
	34	#define MAX31790_FAN_DYN_SR_SHIFT 5
	35	#define MAX31790_FAN_DYN_SR_MASK 0xE0
	36	#define SR_FROM_REG(reg) (((reg) & MAX31790_FAN_DYN_SR_MASK) \
	37	>> MAX31790_FAN_DYN_SR_SHIFT)
	38
	39	#define FAN_RPM_MIN 120
	40	#define FAN_RPM_MAX 7864320
	41
	42	#define RPM_FROM_REG(reg, sr) (((reg) >> 4) ? \
	43	((60 * (sr) * 8192) / ((reg) >> 4)) : \
	44	FAN_RPM_MAX)
	45	#define RPM_TO_REG(rpm, sr) ((60 * (sr) * 8192) / ((rpm) * 2))
	46
	47	#define NR_CHANNEL 6
	48
	49	/*
	50	* Client data (each client gets its own)
	51	*/
	52	struct max31790_data {
	53	struct i2c_client *client;
	54	struct mutex update_lock;
	55	bool valid; /* zero until following fields are valid */
	56	unsigned long last_updated; /* in jiffies */
	57
	58	/* register values */
	59	u8 fan_config[NR_CHANNEL];
	60	u8 fan_dynamics[NR_CHANNEL];
	61	u16 fault_status;
	62	u16 tach[NR_CHANNEL * 2];
	63	u16 pwm[NR_CHANNEL];
	64	u16 target_count[NR_CHANNEL];
	65	};
	66
	67	static struct max31790_data max31790_update_device(struct device dev)
	68	{
	69	struct max31790_data *data = dev_get_drvdata(dev);
	70	struct i2c_client *client = data->client;
	71	struct max31790_data *ret = data;
	72	int i;
	73	int rv;
	74
75	mutex_lock(&data->update_lock);
76
77	if (time_after(jiffies, data->last_updated + HZ) \|\| !data->valid) {
78	rv = i2c_smbus_read_byte_data(client,
79	MAX31790_REG_FAN_FAULT_STATUS1);
80	if (rv < 0)
81	goto abort;
82	data->fault_status = rv & 0x3F;
83
84	rv = i2c_smbus_read_byte_data(client,
85	MAX31790_REG_FAN_FAULT_STATUS2);
86	if (rv < 0)
87	goto abort;
88	data->fault_status \|= (rv & 0x3F) << 6;
89
90	for (i = 0; i < NR_CHANNEL; i++) {
91	rv = i2c_smbus_read_word_swapped(client,
92	MAX31790_REG_TACH_COUNT(i));
93	if (rv < 0)
94	goto abort;
95	data->tach[i] = rv;
96
97	if (data->fan_config[i]
98	& MAX31790_FAN_CFG_TACH_INPUT) {
99	rv = i2c_smbus_read_word_swapped(client,
100	MAX31790_REG_TACH_COUNT(NR_CHANNEL
101	+ i));
102	if (rv < 0)
103	goto abort;
104	data->tach[NR_CHANNEL + i] = rv;
105	} else {
106	rv = i2c_smbus_read_word_swapped(client,
107	MAX31790_REG_PWMOUT(i));
108	if (rv < 0)
109	goto abort;
110	data->pwm[i] = rv;
111
112	rv = i2c_smbus_read_word_swapped(client,
113	MAX31790_REG_TARGET_COUNT(i));
114	if (rv < 0)
115	goto abort;
116	data->target_count[i] = rv;
117	}
118	}
119
120	data->last_updated = jiffies;
121	data->valid = true;
122	}
123	goto done;
124
125	abort:
126	data->valid = false;
127	ret = ERR_PTR(rv);
128
129	done:
130	mutex_unlock(&data->update_lock);
131
132	return ret;
133	}
134
135	static const u8 tach_period[8] = { 1, 2, 4, 8, 16, 32, 32, 32 };
136
137	static u8 get_tach_period(u8 fan_dynamics)
138	{
139	return tach_period[SR_FROM_REG(fan_dynamics)];
140	}
141
142	static u8 bits_for_tach_period(int rpm)
143	{
144	u8 bits;
145
146	if (rpm < 500)
147	bits = 0x0;
148	else if (rpm < 1000)
149	bits = 0x1;
150	else if (rpm < 2000)
151	bits = 0x2;
152	else if (rpm < 4000)
153	bits = 0x3;
154	else if (rpm < 8000)
155	bits = 0x4;
156	else
157	bits = 0x5;
158
159	return bits;
160	}
161
54187ff9 GR	162	static int max31790_read_fan(struct device *dev, u32 attr, int channel,
54187ff9 GR	163	long *val)
195a4b42	164	{
195a4b42	165	struct max31790_data *data = max31790_update_device(dev);
791432cf	166	int sr, rpm;
195a4b42 IH	167
	168	if (IS_ERR(data))
	169	return PTR_ERR(data);
	170
54187ff9 GR	171	switch (attr) {
	172	case hwmon_fan_input:
	173	sr = get_tach_period(data->fan_dynamics[channel]);
	174	rpm = RPM_FROM_REG(data->tach[channel], sr);
	175	*val = rpm;
	176	return 0;
	177	case hwmon_fan_target:
	178	sr = get_tach_period(data->fan_dynamics[channel]);
	179	rpm = RPM_FROM_REG(data->target_count[channel], sr);
	180	*val = rpm;
	181	return 0;
	182	case hwmon_fan_fault:
	183	*val = !!(data->fault_status & (1 << channel));
	184	return 0;
	185	default:
	186	return -EOPNOTSUPP;
	187	}
195a4b42 IH	188	}
195a4b42 IH	189
54187ff9 GR	190	static int max31790_write_fan(struct device *dev, u32 attr, int channel,
54187ff9 GR	191	long val)
195a4b42	192	{
195a4b42 IH	193	struct max31790_data *data = dev_get_drvdata(dev);
195a4b42 IH	194	struct i2c_client *client = data->client;
54187ff9 GR	195	int target_count;
54187ff9 GR	196	int err = 0;
195a4b42 IH	197	u8 bits;
195a4b42 IH	198	int sr;
195a4b42 IH	199
	200	mutex_lock(&data->update_lock);
	201
54187ff9 GR	202	switch (attr) {
	203	case hwmon_fan_target:
	204	val = clamp_val(val, FAN_RPM_MIN, FAN_RPM_MAX);
	205	bits = bits_for_tach_period(val);
	206	data->fan_dynamics[channel] =
	207	((data->fan_dynamics[channel] &
	208	~MAX31790_FAN_DYN_SR_MASK) \|
	209	(bits << MAX31790_FAN_DYN_SR_SHIFT));
	210	err = i2c_smbus_write_byte_data(client,
	211	MAX31790_REG_FAN_DYNAMICS(channel),
	212	data->fan_dynamics[channel]);
	213	if (err < 0)
	214	break;
	215
	216	sr = get_tach_period(data->fan_dynamics[channel]);
	217	target_count = RPM_TO_REG(val, sr);
	218	target_count = clamp_val(target_count, 0x1, 0x7FF);
	219
	220	data->target_count[channel] = target_count << 5;
	221
	222	err = i2c_smbus_write_word_swapped(client,
	223	MAX31790_REG_TARGET_COUNT(channel),
	224	data->target_count[channel]);
	225	break;
	226	default:
	227	err = -EOPNOTSUPP;
	228	break;
195a4b42 IH	229	}
195a4b42 IH	230
195a4b42 IH	231	mutex_unlock(&data->update_lock);
195a4b42 IH	232
54187ff9 GR	233	return err;
54187ff9 GR	234	}
195a4b42	235
54187ff9 GR	236	static umode_t max31790_fan_is_visible(const void *_data, u32 attr, int channel)
	237	{
	238	const struct max31790_data *data = _data;
	239	u8 fan_config = data->fan_config[channel % NR_CHANNEL];
	240
	241	switch (attr) {
	242	case hwmon_fan_input:
	243	case hwmon_fan_fault:
	244	if (channel < NR_CHANNEL \|\|
	245	(fan_config & MAX31790_FAN_CFG_TACH_INPUT))
dc8dbb4d	246	return 0444;
54187ff9 GR	247	return 0;
	248	case hwmon_fan_target:
	249	if (channel < NR_CHANNEL &&
	250	!(fan_config & MAX31790_FAN_CFG_TACH_INPUT))
dc8dbb4d	251	return 0644;
54187ff9 GR	252	return 0;
	253	default:
	254	return 0;
	255	}
195a4b42 IH	256	}
195a4b42 IH	257
54187ff9 GR	258	static int max31790_read_pwm(struct device *dev, u32 attr, int channel,
54187ff9 GR	259	long *val)
195a4b42	260	{
195a4b42	261	struct max31790_data *data = max31790_update_device(dev);
94cdc560	262	u8 fan_config;
195a4b42 IH	263
	264	if (IS_ERR(data))
	265	return PTR_ERR(data);
	266
94cdc560 DC	267	fan_config = data->fan_config[channel];
94cdc560 DC	268
54187ff9 GR	269	switch (attr) {
	270	case hwmon_pwm_input:
	271	*val = data->pwm[channel] >> 8;
	272	return 0;
	273	case hwmon_pwm_enable:
	274	if (fan_config & MAX31790_FAN_CFG_RPM_MODE)
	275	*val = 2;
	276	else if (fan_config & MAX31790_FAN_CFG_TACH_INPUT_EN)
	277	*val = 1;
	278	else
	279	*val = 0;
	280	return 0;
	281	default:
	282	return -EOPNOTSUPP;
	283	}
195a4b42 IH	284	}
195a4b42 IH	285
54187ff9 GR	286	static int max31790_write_pwm(struct device *dev, u32 attr, int channel,
54187ff9 GR	287	long val)
195a4b42	288	{
195a4b42 IH	289	struct max31790_data *data = dev_get_drvdata(dev);
195a4b42 IH	290	struct i2c_client *client = data->client;
54187ff9 GR	291	u8 fan_config;
54187ff9 GR	292	int err = 0;
195a4b42 IH	293
	294	mutex_lock(&data->update_lock);
	295
54187ff9 GR	296	switch (attr) {
	297	case hwmon_pwm_input:
	298	if (val < 0 \|\| val > 255) {
	299	err = -EINVAL;
	300	break;
	301	}
	302	data->pwm[channel] = val << 8;
	303	err = i2c_smbus_write_word_swapped(client,
	304	MAX31790_REG_PWMOUT(channel),
dd7406dd	305	data->pwm[channel]);
54187ff9 GR	306	break;
	307	case hwmon_pwm_enable:
	308	fan_config = data->fan_config[channel];
	309	if (val == 0) {
	310	fan_config &= ~(MAX31790_FAN_CFG_TACH_INPUT_EN \|
	311	MAX31790_FAN_CFG_RPM_MODE);
	312	} else if (val == 1) {
	313	fan_config = (fan_config \|
	314	MAX31790_FAN_CFG_TACH_INPUT_EN) &
	315	~MAX31790_FAN_CFG_RPM_MODE;
	316	} else if (val == 2) {
	317	fan_config \|= MAX31790_FAN_CFG_TACH_INPUT_EN \|
	318	MAX31790_FAN_CFG_RPM_MODE;
	319	} else {
	320	err = -EINVAL;
	321	break;
	322	}
	323	data->fan_config[channel] = fan_config;
	324	err = i2c_smbus_write_byte_data(client,
	325	MAX31790_REG_FAN_CONFIG(channel),
	326	fan_config);
	327	break;
	328	default:
	329	err = -EOPNOTSUPP;
	330	break;
	331	}
195a4b42 IH	332
	333	mutex_unlock(&data->update_lock);
	334
54187ff9	335	return err;
195a4b42 IH	336	}
195a4b42 IH	337
54187ff9	338	static umode_t max31790_pwm_is_visible(const void *_data, u32 attr, int channel)
195a4b42	339	{
54187ff9 GR	340	const struct max31790_data *data = _data;
	341	u8 fan_config = data->fan_config[channel];
	342
	343	switch (attr) {
	344	case hwmon_pwm_input:
	345	case hwmon_pwm_enable:
	346	if (!(fan_config & MAX31790_FAN_CFG_TACH_INPUT))
dc8dbb4d	347	return 0644;
54187ff9 GR	348	return 0;
	349	default:
	350	return 0;
	351	}
195a4b42 IH	352	}
195a4b42 IH	353
54187ff9 GR	354	static int max31790_read(struct device *dev, enum hwmon_sensor_types type,
54187ff9 GR	355	u32 attr, int channel, long *val)
195a4b42	356	{
54187ff9 GR	357	switch (type) {
	358	case hwmon_fan:
	359	return max31790_read_fan(dev, attr, channel, val);
	360	case hwmon_pwm:
	361	return max31790_read_pwm(dev, attr, channel, val);
195a4b42	362	default:
54187ff9	363	return -EOPNOTSUPP;
195a4b42	364	}
195a4b42 IH	365	}
195a4b42 IH	366
54187ff9 GR	367	static int max31790_write(struct device *dev, enum hwmon_sensor_types type,
54187ff9 GR	368	u32 attr, int channel, long val)
195a4b42	369	{
54187ff9 GR	370	switch (type) {
	371	case hwmon_fan:
	372	return max31790_write_fan(dev, attr, channel, val);
	373	case hwmon_pwm:
	374	return max31790_write_pwm(dev, attr, channel, val);
	375	default:
	376	return -EOPNOTSUPP;
	377	}
	378	}
195a4b42	379
54187ff9 GR	380	static umode_t max31790_is_visible(const void *data,
	381	enum hwmon_sensor_types type,
	382	u32 attr, int channel)
	383	{
	384	switch (type) {
	385	case hwmon_fan:
	386	return max31790_fan_is_visible(data, attr, channel);
	387	case hwmon_pwm:
	388	return max31790_pwm_is_visible(data, attr, channel);
	389	default:
	390	return 0;
	391	}
195a4b42 IH	392	}
195a4b42 IH	393
54187ff9	394	static const struct hwmon_channel_info *max31790_info[] = {
b605e671 GR	395	HWMON_CHANNEL_INFO(fan,
	396	HWMON_F_INPUT \| HWMON_F_TARGET \| HWMON_F_FAULT,
	397	HWMON_F_INPUT \| HWMON_F_TARGET \| HWMON_F_FAULT,
	398	HWMON_F_INPUT \| HWMON_F_TARGET \| HWMON_F_FAULT,
	399	HWMON_F_INPUT \| HWMON_F_TARGET \| HWMON_F_FAULT,
	400	HWMON_F_INPUT \| HWMON_F_TARGET \| HWMON_F_FAULT,
	401	HWMON_F_INPUT \| HWMON_F_TARGET \| HWMON_F_FAULT,
	402	HWMON_F_INPUT \| HWMON_F_FAULT,
	403	HWMON_F_INPUT \| HWMON_F_FAULT,
	404	HWMON_F_INPUT \| HWMON_F_FAULT,
	405	HWMON_F_INPUT \| HWMON_F_FAULT,
	406	HWMON_F_INPUT \| HWMON_F_FAULT,
	407	HWMON_F_INPUT \| HWMON_F_FAULT),
	408	HWMON_CHANNEL_INFO(pwm,
	409	HWMON_PWM_INPUT \| HWMON_PWM_ENABLE,
	410	HWMON_PWM_INPUT \| HWMON_PWM_ENABLE,
	411	HWMON_PWM_INPUT \| HWMON_PWM_ENABLE,
	412	HWMON_PWM_INPUT \| HWMON_PWM_ENABLE,
	413	HWMON_PWM_INPUT \| HWMON_PWM_ENABLE,
	414	HWMON_PWM_INPUT \| HWMON_PWM_ENABLE),
54187ff9 GR	415	NULL
	416	};
	417
	418	static const struct hwmon_ops max31790_hwmon_ops = {
	419	.is_visible = max31790_is_visible,
	420	.read = max31790_read,
	421	.write = max31790_write,
	422	};
195a4b42	423
54187ff9 GR	424	static const struct hwmon_chip_info max31790_chip_info = {
	425	.ops = &max31790_hwmon_ops,
	426	.info = max31790_info,
195a4b42	427	};
195a4b42 IH	428
	429	static int max31790_init_client(struct i2c_client *client,
	430	struct max31790_data *data)
	431	{
	432	int i, rv;
	433
	434	for (i = 0; i < NR_CHANNEL; i++) {
	435	rv = i2c_smbus_read_byte_data(client,
	436	MAX31790_REG_FAN_CONFIG(i));
	437	if (rv < 0)
	438	return rv;
	439	data->fan_config[i] = rv;
	440
	441	rv = i2c_smbus_read_byte_data(client,
	442	MAX31790_REG_FAN_DYNAMICS(i));
	443	if (rv < 0)
	444	return rv;
	445	data->fan_dynamics[i] = rv;
	446	}
	447
	448	return 0;
	449	}
	450
	451	static int max31790_probe(struct i2c_client *client,
	452	const struct i2c_device_id *id)
	453	{
	454	struct i2c_adapter *adapter = client->adapter;
	455	struct device *dev = &client->dev;
	456	struct max31790_data *data;
	457	struct device *hwmon_dev;
	458	int err;
	459
	460	if (!i2c_check_functionality(adapter,
	461	I2C_FUNC_SMBUS_BYTE_DATA \| I2C_FUNC_SMBUS_WORD_DATA))
	462	return -ENODEV;
	463
	464	data = devm_kzalloc(dev, sizeof(struct max31790_data), GFP_KERNEL);
	465	if (!data)
	466	return -ENOMEM;
	467
	468	data->client = client;
	469	mutex_init(&data->update_lock);
	470
	471	/*
	472	* Initialize the max31790 chip
	473	*/
	474	err = max31790_init_client(client, data);
	475	if (err)
	476	return err;
	477
54187ff9 GR	478	hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
	479	data,
	480	&max31790_chip_info,
	481	NULL);
195a4b42 IH	482
	483	return PTR_ERR_OR_ZERO(hwmon_dev);
	484	}
	485
	486	static const struct i2c_device_id max31790_id[] = {
	487	{ "max31790", 0 },
	488	{ }
	489	};
	490	MODULE_DEVICE_TABLE(i2c, max31790_id);
	491
	492	static struct i2c_driver max31790_driver = {
	493	.class = I2C_CLASS_HWMON,
	494	.probe = max31790_probe,
	495	.driver = {
	496	.name = "max31790",
	497	},
	498	.id_table = max31790_id,
	499	};
	500
	501	module_i2c_driver(max31790_driver);
	502
	503	MODULE_AUTHOR("Il Han <corone.il.han@gmail.com>");
	504	MODULE_DESCRIPTION("MAX31790 sensor driver");
	505	MODULE_LICENSE("GPL");