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Merge tag 'riscv-for-linus-5.15-rc5' of git://git.kernel.org/pub/scm/linux/kernel...
[mirror_ubuntu-jammy-kernel.git] / drivers / hwmon / max6697.c
CommitLineData
c942fddf 1// SPDX-License-Identifier: GPL-2.0-or-later
5372d2d7
GR		 2/*
3 * Copyright (c) 2012 Guenter Roeck <linux@roeck-us.net>
4 *
5 * based on max1668.c
6 * Copyright (c) 2011 David George <david.george@ska.ac.za>
5372d2d7
GR		 7 */
8
9#include <linux/module.h>
10#include <linux/init.h>
11#include <linux/slab.h>
12#include <linux/jiffies.h>
13#include <linux/i2c.h>
14#include <linux/hwmon.h>
15#include <linux/hwmon-sysfs.h>
16#include <linux/err.h>
17#include <linux/mutex.h>
9e427083 18#include <linux/of_device.h>
5372d2d7
GR		 19#include <linux/of.h>
20
21#include <linux/platform_data/max6697.h>
22
23enum chips { max6581, max6602, max6622, max6636, max6689, max6693, max6694,
24 max6697, max6698, max6699 };
25
26/* Report local sensor as temp1 */
27
28static const u8 MAX6697_REG_TEMP[] = {
29 0x07, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x08 };
30static const u8 MAX6697_REG_TEMP_EXT[] = {
31 0x57, 0x09, 0x52, 0x53, 0x54, 0x55, 0x56, 0 };
32static const u8 MAX6697_REG_MAX[] = {
33 0x17, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x18 };
34static const u8 MAX6697_REG_CRIT[] = {
35 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27 };
36
37/*
38 * Map device tree / platform data register bit map to chip bit map.
39 * Applies to alert register and over-temperature register.
40 */
016983d1 41#define MAX6697_ALERT_MAP_BITS(reg) ((((reg) & 0x7e) >> 1) | \
5372d2d7 42 (((reg) & 0x01) << 6) | ((reg) & 0x80))
016983d1 43#define MAX6697_OVERT_MAP_BITS(reg) (((reg) >> 1) | (((reg) & 0x01) << 7))
5372d2d7
GR		 44
45#define MAX6697_REG_STAT(n) (0x44 + (n))
46
47#define MAX6697_REG_CONFIG 0x41
48#define MAX6581_CONF_EXTENDED (1 << 1)
49#define MAX6693_CONF_BETA (1 << 2)
50#define MAX6697_CONF_RESISTANCE (1 << 3)
51#define MAX6697_CONF_TIMEOUT (1 << 5)
52#define MAX6697_REG_ALERT_MASK 0x42
53#define MAX6697_REG_OVERT_MASK 0x43
54
55#define MAX6581_REG_RESISTANCE 0x4a
56#define MAX6581_REG_IDEALITY 0x4b
57#define MAX6581_REG_IDEALITY_SELECT 0x4c
58#define MAX6581_REG_OFFSET 0x4d
59#define MAX6581_REG_OFFSET_SELECT 0x4e
a686024e
CL		 60#define MAX6581_OFFSET_MIN -31750
61#define MAX6581_OFFSET_MAX 31750
5372d2d7
GR		 62
63#define MAX6697_CONV_TIME 156 /* ms per channel, worst case */
64
65struct max6697_chip_data {
66 int channels;
67 u32 have_ext;
68 u32 have_crit;
69 u32 have_fault;
70 u8 valid_conf;
71 const u8 *alarm_map;
72};
73
74struct max6697_data {
8d373552 75 struct i2c_client *client;
5372d2d7
GR		 76
77 enum chips type;
78 const struct max6697_chip_data *chip;
79
80 int update_interval; /* in milli-seconds */
81 int temp_offset; /* in degrees C */
82
83 struct mutex update_lock;
84 unsigned long last_updated; /* In jiffies */
85 bool valid; /* true if following fields are valid */
86
87 /* 1x local and up to 7x remote */
88 u8 temp[8][4]; /* [nr][0]=temp [1]=ext [2]=max [3]=crit */
89#define MAX6697_TEMP_INPUT 0
90#define MAX6697_TEMP_EXT 1
91#define MAX6697_TEMP_MAX 2
92#define MAX6697_TEMP_CRIT 3
93 u32 alarms;
94};
95
96/* Diode fault status bits on MAX6581 are right shifted by one bit */
97static const u8 max6581_alarm_map[] = {
98 0, 0, 1, 2, 3, 4, 5, 6, 8, 9, 10, 11, 12, 13, 14, 15,
99 16, 17, 18, 19, 20, 21, 22, 23 };
100
101static const struct max6697_chip_data max6697_chip_data[] = {
102 [max6581] = {
103 .channels = 8,
104 .have_crit = 0xff,
105 .have_ext = 0x7f,
106 .have_fault = 0xfe,
107 .valid_conf = MAX6581_CONF_EXTENDED | MAX6697_CONF_TIMEOUT,
108 .alarm_map = max6581_alarm_map,
109 },
110 [max6602] = {
111 .channels = 5,
112 .have_crit = 0x12,
113 .have_ext = 0x02,
114 .have_fault = 0x1e,
115 .valid_conf = MAX6697_CONF_RESISTANCE | MAX6697_CONF_TIMEOUT,
116 },
117 [max6622] = {
118 .channels = 5,
119 .have_crit = 0x12,
120 .have_ext = 0x02,
121 .have_fault = 0x1e,
122 .valid_conf = MAX6697_CONF_RESISTANCE | MAX6697_CONF_TIMEOUT,
123 },
124 [max6636] = {
125 .channels = 7,
126 .have_crit = 0x72,
127 .have_ext = 0x02,
128 .have_fault = 0x7e,
129 .valid_conf = MAX6697_CONF_RESISTANCE | MAX6697_CONF_TIMEOUT,
130 },
131 [max6689] = {
132 .channels = 7,
133 .have_crit = 0x72,
134 .have_ext = 0x02,
135 .have_fault = 0x7e,
136 .valid_conf = MAX6697_CONF_RESISTANCE | MAX6697_CONF_TIMEOUT,
137 },
138 [max6693] = {
139 .channels = 7,
140 .have_crit = 0x72,
141 .have_ext = 0x02,
142 .have_fault = 0x7e,
143 .valid_conf = MAX6697_CONF_RESISTANCE | MAX6693_CONF_BETA |
144 MAX6697_CONF_TIMEOUT,
145 },
146 [max6694] = {
147 .channels = 5,
148 .have_crit = 0x12,
149 .have_ext = 0x02,
150 .have_fault = 0x1e,
151 .valid_conf = MAX6697_CONF_RESISTANCE | MAX6693_CONF_BETA |
152 MAX6697_CONF_TIMEOUT,
153 },
154 [max6697] = {
155 .channels = 7,
156 .have_crit = 0x72,
157 .have_ext = 0x02,
158 .have_fault = 0x7e,
159 .valid_conf = MAX6697_CONF_RESISTANCE | MAX6697_CONF_TIMEOUT,
160 },
161 [max6698] = {
162 .channels = 7,
163 .have_crit = 0x72,
164 .have_ext = 0x02,
165 .have_fault = 0x0e,
166 .valid_conf = MAX6697_CONF_RESISTANCE | MAX6697_CONF_TIMEOUT,
167 },
168 [max6699] = {
169 .channels = 5,
170 .have_crit = 0x12,
171 .have_ext = 0x02,
172 .have_fault = 0x1e,
173 .valid_conf = MAX6697_CONF_RESISTANCE | MAX6697_CONF_TIMEOUT,
174 },
175};
176
a686024e
CL		 177static inline int max6581_offset_to_millic(int val)
178{
179 return sign_extend32(val, 7) * 250;
180}
181
5372d2d7
GR		 182static struct max6697_data *max6697_update_device(struct device *dev)
183{
8d373552
GR		 184 struct max6697_data *data = dev_get_drvdata(dev);
185 struct i2c_client *client = data->client;
5372d2d7
GR		 186 struct max6697_data *ret = data;
187 int val;
188 int i;
189 u32 alarms;
190
191 mutex_lock(&data->update_lock);
192
193 if (data->valid &&
194 !time_after(jiffies, data->last_updated
195 + msecs_to_jiffies(data->update_interval)))
196 goto abort;
197
198 for (i = 0; i < data->chip->channels; i++) {
199 if (data->chip->have_ext & (1 << i)) {
200 val = i2c_smbus_read_byte_data(client,
201 MAX6697_REG_TEMP_EXT[i]);
202 if (unlikely(val < 0)) {
203 ret = ERR_PTR(val);
204 goto abort;
205 }
206 data->temp[i][MAX6697_TEMP_EXT] = val;
207 }
208
209 val = i2c_smbus_read_byte_data(client, MAX6697_REG_TEMP[i]);
210 if (unlikely(val < 0)) {
211 ret = ERR_PTR(val);
212 goto abort;
213 }
214 data->temp[i][MAX6697_TEMP_INPUT] = val;
215
216 val = i2c_smbus_read_byte_data(client, MAX6697_REG_MAX[i]);
217 if (unlikely(val < 0)) {
218 ret = ERR_PTR(val);
219 goto abort;
220 }
221 data->temp[i][MAX6697_TEMP_MAX] = val;
222
223 if (data->chip->have_crit & (1 << i)) {
224 val = i2c_smbus_read_byte_data(client,
225 MAX6697_REG_CRIT[i]);
226 if (unlikely(val < 0)) {
227 ret = ERR_PTR(val);
228 goto abort;
229 }
230 data->temp[i][MAX6697_TEMP_CRIT] = val;
231 }
232 }
233
234 alarms = 0;
235 for (i = 0; i < 3; i++) {
236 val = i2c_smbus_read_byte_data(client, MAX6697_REG_STAT(i));
237 if (unlikely(val < 0)) {
238 ret = ERR_PTR(val);
239 goto abort;
240 }
241 alarms = (alarms << 8) | val;
242 }
243 data->alarms = alarms;
244 data->last_updated = jiffies;
245 data->valid = true;
246abort:
247 mutex_unlock(&data->update_lock);
248
249 return ret;
250}
251
740c2f2b 252static ssize_t temp_input_show(struct device *dev,
5372d2d7
GR		 253 struct device_attribute *devattr, char *buf)
254{
255 int index = to_sensor_dev_attr(devattr)->index;
256 struct max6697_data *data = max6697_update_device(dev);
257 int temp;
258
259 if (IS_ERR(data))
260 return PTR_ERR(data);
261
262 temp = (data->temp[index][MAX6697_TEMP_INPUT] - data->temp_offset) << 3;
263 temp |= data->temp[index][MAX6697_TEMP_EXT] >> 5;
264
265 return sprintf(buf, "%d\n", temp * 125);
266}
267
740c2f2b
GR		 268static ssize_t temp_show(struct device *dev, struct device_attribute *devattr,
269 char *buf)
5372d2d7
GR		 270{
271 int nr = to_sensor_dev_attr_2(devattr)->nr;
272 int index = to_sensor_dev_attr_2(devattr)->index;
273 struct max6697_data *data = max6697_update_device(dev);
274 int temp;
275
276 if (IS_ERR(data))
277 return PTR_ERR(data);
278
279 temp = data->temp[nr][index];
280 temp -= data->temp_offset;
281
282 return sprintf(buf, "%d\n", temp * 1000);
283}
284
740c2f2b 285static ssize_t alarm_show(struct device *dev, struct device_attribute *attr,
5372d2d7
GR		 286 char *buf)
287{
288 int index = to_sensor_dev_attr(attr)->index;
289 struct max6697_data *data = max6697_update_device(dev);
290
291 if (IS_ERR(data))
292 return PTR_ERR(data);
293
294 if (data->chip->alarm_map)
295 index = data->chip->alarm_map[index];
296
297 return sprintf(buf, "%u\n", (data->alarms >> index) & 0x1);
298}
299
740c2f2b
GR		 300static ssize_t temp_store(struct device *dev,
301 struct device_attribute *devattr, const char *buf,
302 size_t count)
5372d2d7
GR		 303{
304 int nr = to_sensor_dev_attr_2(devattr)->nr;
305 int index = to_sensor_dev_attr_2(devattr)->index;
8d373552 306 struct max6697_data *data = dev_get_drvdata(dev);
5372d2d7
GR		 307 long temp;
308 int ret;
309
310 ret = kstrtol(buf, 10, &temp);
311 if (ret < 0)
312 return ret;
313
314 mutex_lock(&data->update_lock);
315 temp = DIV_ROUND_CLOSEST(temp, 1000) + data->temp_offset;
316 temp = clamp_val(temp, 0, data->type == max6581 ? 255 : 127);
317 data->temp[nr][index] = temp;
8d373552 318 ret = i2c_smbus_write_byte_data(data->client,
5372d2d7
GR		 319 index == 2 ? MAX6697_REG_MAX[nr]
320 : MAX6697_REG_CRIT[nr],
321 temp);
322 mutex_unlock(&data->update_lock);
323
324 return ret < 0 ? ret : count;
325}
326
a686024e
CL		 327static ssize_t offset_store(struct device *dev, struct device_attribute *devattr, const char *buf,
328 size_t count)
329{
330 int val, ret, index, select;
331 struct max6697_data *data;
332 bool channel_enabled;
333 long temp;
334
335 index = to_sensor_dev_attr(devattr)->index;
336 data = dev_get_drvdata(dev);
337 ret = kstrtol(buf, 10, &temp);
338 if (ret < 0)
339 return ret;
340
341 mutex_lock(&data->update_lock);
342 select = i2c_smbus_read_byte_data(data->client, MAX6581_REG_OFFSET_SELECT);
343 if (select < 0) {
344 ret = select;
345 goto abort;
346 }
347 channel_enabled = (select & (1 << (index - 1)));
348 temp = clamp_val(temp, MAX6581_OFFSET_MIN, MAX6581_OFFSET_MAX);
349 val = DIV_ROUND_CLOSEST(temp, 250);
350 /* disable the offset for channel if the new offset is 0 */
351 if (val == 0) {
352 if (channel_enabled)
353 ret = i2c_smbus_write_byte_data(data->client, MAX6581_REG_OFFSET_SELECT,
354 select & ~(1 << (index - 1)));
355 ret = ret < 0 ? ret : count;
356 goto abort;
357 }
358 if (!channel_enabled) {
359 ret = i2c_smbus_write_byte_data(data->client, MAX6581_REG_OFFSET_SELECT,
360 select | (1 << (index - 1)));
361 if (ret < 0)
362 goto abort;
363 }
364 ret = i2c_smbus_write_byte_data(data->client, MAX6581_REG_OFFSET, val);
365 ret = ret < 0 ? ret : count;
366
367abort:
368 mutex_unlock(&data->update_lock);
369 return ret;
370}
371
372static ssize_t offset_show(struct device *dev, struct device_attribute *devattr, char *buf)
373{
374 struct max6697_data *data;
375 int select, ret, index;
376
377 index = to_sensor_dev_attr(devattr)->index;
378 data = dev_get_drvdata(dev);
379 mutex_lock(&data->update_lock);
380 select = i2c_smbus_read_byte_data(data->client, MAX6581_REG_OFFSET_SELECT);
381 if (select < 0)
382 ret = select;
383 else if (select & (1 << (index - 1)))
384 ret = i2c_smbus_read_byte_data(data->client, MAX6581_REG_OFFSET);
385 else
386 ret = 0;
387 mutex_unlock(&data->update_lock);
388 return ret < 0 ? ret : sprintf(buf, "%d\n", max6581_offset_to_millic(ret));
389}
390
740c2f2b
GR		 391static SENSOR_DEVICE_ATTR_RO(temp1_input, temp_input, 0);
392static SENSOR_DEVICE_ATTR_2_RW(temp1_max, temp, 0, MAX6697_TEMP_MAX);
393static SENSOR_DEVICE_ATTR_2_RW(temp1_crit, temp, 0, MAX6697_TEMP_CRIT);
394
395static SENSOR_DEVICE_ATTR_RO(temp2_input, temp_input, 1);
396static SENSOR_DEVICE_ATTR_2_RW(temp2_max, temp, 1, MAX6697_TEMP_MAX);
397static SENSOR_DEVICE_ATTR_2_RW(temp2_crit, temp, 1, MAX6697_TEMP_CRIT);
398
399static SENSOR_DEVICE_ATTR_RO(temp3_input, temp_input, 2);
400static SENSOR_DEVICE_ATTR_2_RW(temp3_max, temp, 2, MAX6697_TEMP_MAX);
401static SENSOR_DEVICE_ATTR_2_RW(temp3_crit, temp, 2, MAX6697_TEMP_CRIT);
402
403static SENSOR_DEVICE_ATTR_RO(temp4_input, temp_input, 3);
404static SENSOR_DEVICE_ATTR_2_RW(temp4_max, temp, 3, MAX6697_TEMP_MAX);
405static SENSOR_DEVICE_ATTR_2_RW(temp4_crit, temp, 3, MAX6697_TEMP_CRIT);
406
407static SENSOR_DEVICE_ATTR_RO(temp5_input, temp_input, 4);
408static SENSOR_DEVICE_ATTR_2_RW(temp5_max, temp, 4, MAX6697_TEMP_MAX);
409static SENSOR_DEVICE_ATTR_2_RW(temp5_crit, temp, 4, MAX6697_TEMP_CRIT);
410
411static SENSOR_DEVICE_ATTR_RO(temp6_input, temp_input, 5);
412static SENSOR_DEVICE_ATTR_2_RW(temp6_max, temp, 5, MAX6697_TEMP_MAX);
413static SENSOR_DEVICE_ATTR_2_RW(temp6_crit, temp, 5, MAX6697_TEMP_CRIT);
414
415static SENSOR_DEVICE_ATTR_RO(temp7_input, temp_input, 6);
416static SENSOR_DEVICE_ATTR_2_RW(temp7_max, temp, 6, MAX6697_TEMP_MAX);
417static SENSOR_DEVICE_ATTR_2_RW(temp7_crit, temp, 6, MAX6697_TEMP_CRIT);
418
419static SENSOR_DEVICE_ATTR_RO(temp8_input, temp_input, 7);
420static SENSOR_DEVICE_ATTR_2_RW(temp8_max, temp, 7, MAX6697_TEMP_MAX);
421static SENSOR_DEVICE_ATTR_2_RW(temp8_crit, temp, 7, MAX6697_TEMP_CRIT);
422
423static SENSOR_DEVICE_ATTR_RO(temp1_max_alarm, alarm, 22);
424static SENSOR_DEVICE_ATTR_RO(temp2_max_alarm, alarm, 16);
425static SENSOR_DEVICE_ATTR_RO(temp3_max_alarm, alarm, 17);
426static SENSOR_DEVICE_ATTR_RO(temp4_max_alarm, alarm, 18);
427static SENSOR_DEVICE_ATTR_RO(temp5_max_alarm, alarm, 19);
428static SENSOR_DEVICE_ATTR_RO(temp6_max_alarm, alarm, 20);
429static SENSOR_DEVICE_ATTR_RO(temp7_max_alarm, alarm, 21);
430static SENSOR_DEVICE_ATTR_RO(temp8_max_alarm, alarm, 23);
431
432static SENSOR_DEVICE_ATTR_RO(temp1_crit_alarm, alarm, 14);
433static SENSOR_DEVICE_ATTR_RO(temp2_crit_alarm, alarm, 8);
434static SENSOR_DEVICE_ATTR_RO(temp3_crit_alarm, alarm, 9);
435static SENSOR_DEVICE_ATTR_RO(temp4_crit_alarm, alarm, 10);
436static SENSOR_DEVICE_ATTR_RO(temp5_crit_alarm, alarm, 11);
437static SENSOR_DEVICE_ATTR_RO(temp6_crit_alarm, alarm, 12);
438static SENSOR_DEVICE_ATTR_RO(temp7_crit_alarm, alarm, 13);
439static SENSOR_DEVICE_ATTR_RO(temp8_crit_alarm, alarm, 15);
440
441static SENSOR_DEVICE_ATTR_RO(temp2_fault, alarm, 1);
442static SENSOR_DEVICE_ATTR_RO(temp3_fault, alarm, 2);
443static SENSOR_DEVICE_ATTR_RO(temp4_fault, alarm, 3);
444static SENSOR_DEVICE_ATTR_RO(temp5_fault, alarm, 4);
445static SENSOR_DEVICE_ATTR_RO(temp6_fault, alarm, 5);
446static SENSOR_DEVICE_ATTR_RO(temp7_fault, alarm, 6);
447static SENSOR_DEVICE_ATTR_RO(temp8_fault, alarm, 7);
5372d2d7 448
a686024e
CL		 449/* There is no offset for local temperature so starting from temp2 */
450static SENSOR_DEVICE_ATTR_RW(temp2_offset, offset, 1);
451static SENSOR_DEVICE_ATTR_RW(temp3_offset, offset, 2);
452static SENSOR_DEVICE_ATTR_RW(temp4_offset, offset, 3);
453static SENSOR_DEVICE_ATTR_RW(temp5_offset, offset, 4);
454static SENSOR_DEVICE_ATTR_RW(temp6_offset, offset, 5);
455static SENSOR_DEVICE_ATTR_RW(temp7_offset, offset, 6);
456static SENSOR_DEVICE_ATTR_RW(temp8_offset, offset, 7);
457
6bf44ced
GR		 458static DEVICE_ATTR(dummy, 0, NULL, NULL);
459
460static umode_t max6697_is_visible(struct kobject *kobj, struct attribute *attr,
461 int index)
462{
9d2227bb 463 struct device *dev = kobj_to_dev(kobj);
8d373552 464 struct max6697_data *data = dev_get_drvdata(dev);
6bf44ced 465 const struct max6697_chip_data *chip = data->chip;
a686024e
CL		 466 int channel = index / 7; /* channel number */
467 int nr = index % 7; /* attribute index within channel */
6bf44ced
GR		 468
469 if (channel >= chip->channels)
470 return 0;
471
472 if ((nr == 3 || nr == 4) && !(chip->have_crit & (1 << channel)))
473 return 0;
474 if (nr == 5 && !(chip->have_fault & (1 << channel)))
475 return 0;
a686024e
CL		 476 /* offset reg is only supported on max6581 remote channels */
477 if (nr == 6)
478 if (data->type != max6581 || channel == 0)
479 return 0;
6bf44ced
GR		 480
481 return attr->mode;
482}
483
484/*
485 * max6697_is_visible uses the index into the following array to determine
486 * if attributes should be created or not. Any change in order or content
487 * must be matched in max6697_is_visible.
488 */
489static struct attribute *max6697_attributes[] = {
490 &sensor_dev_attr_temp1_input.dev_attr.attr,
491 &sensor_dev_attr_temp1_max.dev_attr.attr,
492 &sensor_dev_attr_temp1_max_alarm.dev_attr.attr,
493 &sensor_dev_attr_temp1_crit.dev_attr.attr,
494 &sensor_dev_attr_temp1_crit_alarm.dev_attr.attr,
495 &dev_attr_dummy.attr,
a686024e 496 &dev_attr_dummy.attr,
6bf44ced
GR		 497
498 &sensor_dev_attr_temp2_input.dev_attr.attr,
499 &sensor_dev_attr_temp2_max.dev_attr.attr,
500 &sensor_dev_attr_temp2_max_alarm.dev_attr.attr,
501 &sensor_dev_attr_temp2_crit.dev_attr.attr,
502 &sensor_dev_attr_temp2_crit_alarm.dev_attr.attr,
503 &sensor_dev_attr_temp2_fault.dev_attr.attr,
a686024e 504 &sensor_dev_attr_temp2_offset.dev_attr.attr,
6bf44ced
GR		 505
506 &sensor_dev_attr_temp3_input.dev_attr.attr,
507 &sensor_dev_attr_temp3_max.dev_attr.attr,
508 &sensor_dev_attr_temp3_max_alarm.dev_attr.attr,
509 &sensor_dev_attr_temp3_crit.dev_attr.attr,
510 &sensor_dev_attr_temp3_crit_alarm.dev_attr.attr,
511 &sensor_dev_attr_temp3_fault.dev_attr.attr,
a686024e 512 &sensor_dev_attr_temp3_offset.dev_attr.attr,
6bf44ced
GR		 513
514 &sensor_dev_attr_temp4_input.dev_attr.attr,
515 &sensor_dev_attr_temp4_max.dev_attr.attr,
516 &sensor_dev_attr_temp4_max_alarm.dev_attr.attr,
517 &sensor_dev_attr_temp4_crit.dev_attr.attr,
518 &sensor_dev_attr_temp4_crit_alarm.dev_attr.attr,
519 &sensor_dev_attr_temp4_fault.dev_attr.attr,
a686024e 520 &sensor_dev_attr_temp4_offset.dev_attr.attr,
6bf44ced
GR		 521
522 &sensor_dev_attr_temp5_input.dev_attr.attr,
523 &sensor_dev_attr_temp5_max.dev_attr.attr,
524 &sensor_dev_attr_temp5_max_alarm.dev_attr.attr,
525 &sensor_dev_attr_temp5_crit.dev_attr.attr,
526 &sensor_dev_attr_temp5_crit_alarm.dev_attr.attr,
527 &sensor_dev_attr_temp5_fault.dev_attr.attr,
a686024e 528 &sensor_dev_attr_temp5_offset.dev_attr.attr,
6bf44ced
GR		 529
530 &sensor_dev_attr_temp6_input.dev_attr.attr,
531 &sensor_dev_attr_temp6_max.dev_attr.attr,
532 &sensor_dev_attr_temp6_max_alarm.dev_attr.attr,
533 &sensor_dev_attr_temp6_crit.dev_attr.attr,
534 &sensor_dev_attr_temp6_crit_alarm.dev_attr.attr,
535 &sensor_dev_attr_temp6_fault.dev_attr.attr,
a686024e 536 &sensor_dev_attr_temp6_offset.dev_attr.attr,
6bf44ced
GR		 537
538 &sensor_dev_attr_temp7_input.dev_attr.attr,
539 &sensor_dev_attr_temp7_max.dev_attr.attr,
540 &sensor_dev_attr_temp7_max_alarm.dev_attr.attr,
541 &sensor_dev_attr_temp7_crit.dev_attr.attr,
542 &sensor_dev_attr_temp7_crit_alarm.dev_attr.attr,
543 &sensor_dev_attr_temp7_fault.dev_attr.attr,
a686024e 544 &sensor_dev_attr_temp7_offset.dev_attr.attr,
6bf44ced
GR		 545
546 &sensor_dev_attr_temp8_input.dev_attr.attr,
547 &sensor_dev_attr_temp8_max.dev_attr.attr,
548 &sensor_dev_attr_temp8_max_alarm.dev_attr.attr,
549 &sensor_dev_attr_temp8_crit.dev_attr.attr,
550 &sensor_dev_attr_temp8_crit_alarm.dev_attr.attr,
551 &sensor_dev_attr_temp8_fault.dev_attr.attr,
a686024e 552 &sensor_dev_attr_temp8_offset.dev_attr.attr,
6bf44ced 553 NULL
5372d2d7
GR		 554};
555
6bf44ced
GR		 556static const struct attribute_group max6697_group = {
557 .attrs = max6697_attributes, .is_visible = max6697_is_visible,
5372d2d7 558};
8d373552 559__ATTRIBUTE_GROUPS(max6697);
5372d2d7
GR		 560
561static void max6697_get_config_of(struct device_node *node,
562 struct max6697_platform_data *pdata)
563{
564 int len;
565 const __be32 *prop;
566
8de2dcc9
AL		 567 pdata->smbus_timeout_disable =
568 of_property_read_bool(node, "smbus-timeout-disable");
569 pdata->extended_range_enable =
570 of_property_read_bool(node, "extended-range-enable");
571 pdata->beta_compensation =
572 of_property_read_bool(node, "beta-compensation-enable");
573
5372d2d7
GR		 574 prop = of_get_property(node, "alert-mask", &len);
575 if (prop && len == sizeof(u32))
576 pdata->alert_mask = be32_to_cpu(prop[0]);
577 prop = of_get_property(node, "over-temperature-mask", &len);
578 if (prop && len == sizeof(u32))
579 pdata->over_temperature_mask = be32_to_cpu(prop[0]);
580 prop = of_get_property(node, "resistance-cancellation", &len);
581 if (prop) {
582 if (len == sizeof(u32))
583 pdata->resistance_cancellation = be32_to_cpu(prop[0]);
584 else
585 pdata->resistance_cancellation = 0xfe;
586 }
587 prop = of_get_property(node, "transistor-ideality", &len);
588 if (prop && len == 2 * sizeof(u32)) {
589 pdata->ideality_mask = be32_to_cpu(prop[0]);
590 pdata->ideality_value = be32_to_cpu(prop[1]);
591 }
592}
593
8d373552
GR		 594static int max6697_init_chip(struct max6697_data *data,
595 struct i2c_client *client)
5372d2d7 596{
5372d2d7
GR		 597 struct max6697_platform_data *pdata = dev_get_platdata(&client->dev);
598 struct max6697_platform_data p;
599 const struct max6697_chip_data *chip = data->chip;
600 int factor = chip->channels;
601 int ret, reg;
602
603 /*
604 * Don't touch configuration if neither platform data nor OF
605 * configuration was specified. If that is the case, use the
606 * current chip configuration.
607 */
608 if (!pdata && !client->dev.of_node) {
609 reg = i2c_smbus_read_byte_data(client, MAX6697_REG_CONFIG);
610 if (reg < 0)
611 return reg;
612 if (data->type == max6581) {
613 if (reg & MAX6581_CONF_EXTENDED)
614 data->temp_offset = 64;
615 reg = i2c_smbus_read_byte_data(client,
616 MAX6581_REG_RESISTANCE);
617 if (reg < 0)
618 return reg;
619 factor += hweight8(reg);
620 } else {
621 if (reg & MAX6697_CONF_RESISTANCE)
622 factor++;
623 }
624 goto done;
625 }
626
627 if (client->dev.of_node) {
628 memset(&p, 0, sizeof(p));
629 max6697_get_config_of(client->dev.of_node, &p);
630 pdata = &p;
631 }
632
633 reg = 0;
634 if (pdata->smbus_timeout_disable &&
635 (chip->valid_conf & MAX6697_CONF_TIMEOUT)) {
636 reg |= MAX6697_CONF_TIMEOUT;
637 }
638 if (pdata->extended_range_enable &&
639 (chip->valid_conf & MAX6581_CONF_EXTENDED)) {
640 reg |= MAX6581_CONF_EXTENDED;
641 data->temp_offset = 64;
642 }
643 if (pdata->resistance_cancellation &&
644 (chip->valid_conf & MAX6697_CONF_RESISTANCE)) {
645 reg |= MAX6697_CONF_RESISTANCE;
646 factor++;
647 }
648 if (pdata->beta_compensation &&
649 (chip->valid_conf & MAX6693_CONF_BETA)) {
650 reg |= MAX6693_CONF_BETA;
651 }
652
653 ret = i2c_smbus_write_byte_data(client, MAX6697_REG_CONFIG, reg);
654 if (ret < 0)
655 return ret;
656
657 ret = i2c_smbus_write_byte_data(client, MAX6697_REG_ALERT_MASK,
016983d1 658 MAX6697_ALERT_MAP_BITS(pdata->alert_mask));
5372d2d7
GR		 659 if (ret < 0)
660 return ret;
661
662 ret = i2c_smbus_write_byte_data(client, MAX6697_REG_OVERT_MASK,
016983d1 663 MAX6697_OVERT_MAP_BITS(pdata->over_temperature_mask));
5372d2d7
GR		 664 if (ret < 0)
665 return ret;
666
667 if (data->type == max6581) {
668 factor += hweight8(pdata->resistance_cancellation >> 1);
669 ret = i2c_smbus_write_byte_data(client, MAX6581_REG_RESISTANCE,
670 pdata->resistance_cancellation >> 1);
671 if (ret < 0)
672 return ret;
673 ret = i2c_smbus_write_byte_data(client, MAX6581_REG_IDEALITY,
5c52add1 674 pdata->ideality_value);
5372d2d7
GR		 675 if (ret < 0)
676 return ret;
677 ret = i2c_smbus_write_byte_data(client,
678 MAX6581_REG_IDEALITY_SELECT,
5c52add1 679 pdata->ideality_mask >> 1);
5372d2d7
GR		 680 if (ret < 0)
681 return ret;
682 }
683done:
684 data->update_interval = factor * MAX6697_CONV_TIME;
685 return 0;
686}
687
67487038
SK		 688static const struct i2c_device_id max6697_id[];
689
690static int max6697_probe(struct i2c_client *client)
5372d2d7
GR		 691{
692 struct i2c_adapter *adapter = client->adapter;
693 struct device *dev = &client->dev;
694 struct max6697_data *data;
8d373552 695 struct device *hwmon_dev;
6bf44ced 696 int err;
5372d2d7
GR		 697
698 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
699 return -ENODEV;
700
701 data = devm_kzalloc(dev, sizeof(struct max6697_data), GFP_KERNEL);
702 if (!data)
703 return -ENOMEM;
704
9e427083
JMC		 705 if (client->dev.of_node)
706 data->type = (enum chips)of_device_get_match_data(&client->dev);
707 else
67487038 708 data->type = i2c_match_id(max6697_id, client)->driver_data;
5372d2d7 709 data->chip = &max6697_chip_data[data->type];
8d373552 710 data->client = client;
5372d2d7
GR		 711 mutex_init(&data->update_lock);
712
8d373552 713 err = max6697_init_chip(data, client);
5372d2d7
GR		 714 if (err)
715 return err;
716
8d373552
GR		 717 hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name,
718 data,
719 max6697_groups);
4109a716 720 return PTR_ERR_OR_ZERO(hwmon_dev);
5372d2d7
GR		 721}
722
723static const struct i2c_device_id max6697_id[] = {
724 { "max6581", max6581 },
725 { "max6602", max6602 },
726 { "max6622", max6622 },
727 { "max6636", max6636 },
728 { "max6689", max6689 },
729 { "max6693", max6693 },
730 { "max6694", max6694 },
731 { "max6697", max6697 },
732 { "max6698", max6698 },
733 { "max6699", max6699 },
734 { }
735};
736MODULE_DEVICE_TABLE(i2c, max6697_id);
737
f198a869 738static const struct of_device_id __maybe_unused max6697_of_match[] = {
9e427083
JMC		 739 {
740 .compatible = "maxim,max6581",
741 .data = (void *)max6581
742 },
743 {
744 .compatible = "maxim,max6602",
745 .data = (void *)max6602
746 },
747 {
748 .compatible = "maxim,max6622",
749 .data = (void *)max6622
750 },
751 {
752 .compatible = "maxim,max6636",
753 .data = (void *)max6636
754 },
755 {
756 .compatible = "maxim,max6689",
757 .data = (void *)max6689
758 },
759 {
760 .compatible = "maxim,max6693",
761 .data = (void *)max6693
762 },
763 {
764 .compatible = "maxim,max6694",
765 .data = (void *)max6694
766 },
767 {
768 .compatible = "maxim,max6697",
769 .data = (void *)max6697
770 },
771 {
772 .compatible = "maxim,max6698",
773 .data = (void *)max6698
774 },
775 {
776 .compatible = "maxim,max6699",
777 .data = (void *)max6699
778 },
779 { },
780};
781MODULE_DEVICE_TABLE(of, max6697_of_match);
782
5372d2d7
GR		 783static struct i2c_driver max6697_driver = {
784 .class = I2C_CLASS_HWMON,
785 .driver = {
786 .name = "max6697",
9e427083 787 .of_match_table = of_match_ptr(max6697_of_match),
5372d2d7 788 },
67487038 789 .probe_new = max6697_probe,
5372d2d7
GR		 790 .id_table = max6697_id,
791};
792
793module_i2c_driver(max6697_driver);
794
795MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
796MODULE_DESCRIPTION("MAX6697 temperature sensor driver");
797MODULE_LICENSE("GPL");
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