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hwmon: (nct6775) Add support for fanX_pulses sysfs attribute
[mirror_ubuntu-bionic-kernel.git] / drivers / hwmon / nct6775.c
CommitLineData
9de2e2e8
GR		 1/*
2 * nct6775 - Driver for the hardware monitoring functionality of
3 * Nuvoton NCT677x Super-I/O chips
4 *
5 * Copyright (C) 2012 Guenter Roeck <linux@roeck-us.net>
6 *
7 * Derived from w83627ehf driver
8 * Copyright (C) 2005-2012 Jean Delvare <khali@linux-fr.org>
9 * Copyright (C) 2006 Yuan Mu (Winbond),
10 * Rudolf Marek <r.marek@assembler.cz>
11 * David Hubbard <david.c.hubbard@gmail.com>
12 * Daniel J Blueman <daniel.blueman@gmail.com>
13 * Copyright (C) 2010 Sheng-Yuan Huang (Nuvoton) (PS00)
14 *
15 * Shamelessly ripped from the w83627hf driver
16 * Copyright (C) 2003 Mark Studebaker
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
22 *
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
27 *
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
31 *
32 *
33 * Supports the following chips:
34 *
35 * Chip #vin #fan #pwm #temp chip IDs man ID
36 * nct6775f 9 4 3 6+3 0xb470 0xc1 0x5ca3
37 * nct6776f 9 5 3 6+3 0xc330 0xc1 0x5ca3
38 * nct6779d 15 5 5 2+6 0xc560 0xc1 0x5ca3
39 *
40 * #temp lists the number of monitored temperature sources (first value) plus
41 * the number of directly connectable temperature sensors (second value).
42 */
43
44#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
45
46#include <linux/module.h>
47#include <linux/init.h>
48#include <linux/slab.h>
49#include <linux/jiffies.h>
50#include <linux/platform_device.h>
51#include <linux/hwmon.h>
52#include <linux/hwmon-sysfs.h>
53#include <linux/hwmon-vid.h>
54#include <linux/err.h>
55#include <linux/mutex.h>
56#include <linux/acpi.h>
57#include <linux/io.h>
58#include "lm75.h"
59
aa136e5d
GR		 60#define USE_ALTERNATE
61
9de2e2e8
GR		 62enum kinds { nct6775, nct6776, nct6779 };
63
64/* used to set data->name = nct6775_device_names[data->sio_kind] */
65static const char * const nct6775_device_names[] = {
66 "nct6775",
67 "nct6776",
68 "nct6779",
69};
70
71static unsigned short force_id;
72module_param(force_id, ushort, 0);
73MODULE_PARM_DESC(force_id, "Override the detected device ID");
74
75#define DRVNAME "nct6775"
76
77/*
78 * Super-I/O constants and functions
79 */
80
a6bd5878 81#define NCT6775_LD_ACPI 0x0a
9de2e2e8
GR		 82#define NCT6775_LD_HWM 0x0b
83#define NCT6775_LD_VID 0x0d
84
85#define SIO_REG_LDSEL 0x07 /* Logical device select */
86#define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
87#define SIO_REG_ENABLE 0x30 /* Logical device enable */
88#define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
89
90#define SIO_NCT6775_ID 0xb470
91#define SIO_NCT6776_ID 0xc330
92#define SIO_NCT6779_ID 0xc560
93#define SIO_ID_MASK 0xFFF0
94
95static inline void
96superio_outb(int ioreg, int reg, int val)
97{
98 outb(reg, ioreg);
99 outb(val, ioreg + 1);
100}
101
102static inline int
103superio_inb(int ioreg, int reg)
104{
105 outb(reg, ioreg);
106 return inb(ioreg + 1);
107}
108
109static inline void
110superio_select(int ioreg, int ld)
111{
112 outb(SIO_REG_LDSEL, ioreg);
113 outb(ld, ioreg + 1);
114}
115
116static inline int
117superio_enter(int ioreg)
118{
119 /*
120 * Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
121 */
122 if (!request_muxed_region(ioreg, 2, DRVNAME))
123 return -EBUSY;
124
125 outb(0x87, ioreg);
126 outb(0x87, ioreg);
127
128 return 0;
129}
130
131static inline void
132superio_exit(int ioreg)
133{
134 outb(0xaa, ioreg);
135 outb(0x02, ioreg);
136 outb(0x02, ioreg + 1);
137 release_region(ioreg, 2);
138}
139
140/*
141 * ISA constants
142 */
143
144#define IOREGION_ALIGNMENT (~7)
145#define IOREGION_OFFSET 5
146#define IOREGION_LENGTH 2
147#define ADDR_REG_OFFSET 0
148#define DATA_REG_OFFSET 1
149
150#define NCT6775_REG_BANK 0x4E
151#define NCT6775_REG_CONFIG 0x40
152
153/*
154 * Not currently used:
155 * REG_MAN_ID has the value 0x5ca3 for all supported chips.
156 * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
157 * REG_MAN_ID is at port 0x4f
158 * REG_CHIP_ID is at port 0x58
159 */
160
aa136e5d
GR		 161#define NUM_TEMP 10 /* Max number of temp attribute sets w/ limits*/
162#define NUM_TEMP_FIXED 6 /* Max number of fixed temp attribute sets */
163
9de2e2e8
GR		 164#define NUM_REG_ALARM 4 /* Max number of alarm registers */
165
166/* Common and NCT6775 specific data */
167
168/* Voltage min/max registers for nr=7..14 are in bank 5 */
169
170static const u16 NCT6775_REG_IN_MAX[] = {
171 0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
172 0x55c, 0x55e, 0x560, 0x562 };
173static const u16 NCT6775_REG_IN_MIN[] = {
174 0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
175 0x55d, 0x55f, 0x561, 0x563 };
176static const u16 NCT6775_REG_IN[] = {
177 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
178};
179
180#define NCT6775_REG_VBAT 0x5D
aa136e5d 181#define NCT6775_REG_DIODE 0x5E
9de2e2e8 182
1c65dc36
GR		 183#define NCT6775_REG_FANDIV1 0x506
184#define NCT6775_REG_FANDIV2 0x507
185
9de2e2e8
GR		 186static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
187
188/* 0..15 voltages, 16..23 fans, 24..31 temperatures */
189
190static const s8 NCT6775_ALARM_BITS[] = {
191 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
192 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
193 -1, /* unused */
194 6, 7, 11, 10, 23, /* fan1..fan5 */
195 -1, -1, -1, /* unused */
196 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
197 12, -1 }; /* intrusion0, intrusion1 */
198
1c65dc36 199#define FAN_ALARM_BASE 16
aa136e5d 200#define TEMP_ALARM_BASE 24
a6bd5878
GR		 201#define INTRUSION_ALARM_BASE 30
202
203static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
204static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
205
1c65dc36
GR		 206static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
207static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
5c25d954 208static const u16 NCT6775_REG_FAN_PULSES[] = { 0x641, 0x642, 0x643, 0x644, 0 };
1c65dc36 209
aa136e5d
GR		 210static const u16 NCT6775_REG_TEMP[] = {
211 0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
212
213static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
214 0, 0x152, 0x252, 0x628, 0x629, 0x62A };
215static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
216 0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
217static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
218 0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
219
220static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
221 0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
222
223static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
224
225static const char *const nct6775_temp_label[] = {
226 "",
227 "SYSTIN",
228 "CPUTIN",
229 "AUXTIN",
230 "AMD SB-TSI",
231 "PECI Agent 0",
232 "PECI Agent 1",
233 "PECI Agent 2",
234 "PECI Agent 3",
235 "PECI Agent 4",
236 "PECI Agent 5",
237 "PECI Agent 6",
238 "PECI Agent 7",
239 "PCH_CHIP_CPU_MAX_TEMP",
240 "PCH_CHIP_TEMP",
241 "PCH_CPU_TEMP",
242 "PCH_MCH_TEMP",
243 "PCH_DIM0_TEMP",
244 "PCH_DIM1_TEMP",
245 "PCH_DIM2_TEMP",
246 "PCH_DIM3_TEMP"
247};
248
249static const u16 NCT6775_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6775_temp_label) - 1]
250 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x661, 0x662, 0x664 };
251
252static const u16 NCT6775_REG_TEMP_CRIT[ARRAY_SIZE(nct6775_temp_label) - 1]
253 = { 0, 0, 0, 0, 0xa00, 0xa01, 0xa02, 0xa03, 0xa04, 0xa05, 0xa06,
254 0xa07 };
255
9de2e2e8
GR		 256/* NCT6776 specific data */
257
258static const s8 NCT6776_ALARM_BITS[] = {
259 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
260 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
261 -1, /* unused */
262 6, 7, 11, 10, 23, /* fan1..fan5 */
263 -1, -1, -1, /* unused */
264 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
265 12, 9 }; /* intrusion0, intrusion1 */
266
1c65dc36 267static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642 };
5c25d954 268static const u16 NCT6776_REG_FAN_PULSES[] = { 0x644, 0x645, 0x646, 0, 0 };
1c65dc36 269
aa136e5d
GR		 270static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
271 0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
272
273static const char *const nct6776_temp_label[] = {
274 "",
275 "SYSTIN",
276 "CPUTIN",
277 "AUXTIN",
278 "SMBUSMASTER 0",
279 "SMBUSMASTER 1",
280 "SMBUSMASTER 2",
281 "SMBUSMASTER 3",
282 "SMBUSMASTER 4",
283 "SMBUSMASTER 5",
284 "SMBUSMASTER 6",
285 "SMBUSMASTER 7",
286 "PECI Agent 0",
287 "PECI Agent 1",
288 "PCH_CHIP_CPU_MAX_TEMP",
289 "PCH_CHIP_TEMP",
290 "PCH_CPU_TEMP",
291 "PCH_MCH_TEMP",
292 "PCH_DIM0_TEMP",
293 "PCH_DIM1_TEMP",
294 "PCH_DIM2_TEMP",
295 "PCH_DIM3_TEMP",
296 "BYTE_TEMP"
297};
298
299static const u16 NCT6776_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
300 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x401, 0x402, 0x404 };
301
302static const u16 NCT6776_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
303 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
304
9de2e2e8
GR		 305/* NCT6779 specific data */
306
307static const u16 NCT6779_REG_IN[] = {
308 0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
309 0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e };
310
311static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = {
312 0x459, 0x45A, 0x45B, 0x568 };
313
314static const s8 NCT6779_ALARM_BITS[] = {
315 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
316 17, 24, 25, 26, 27, 28, 29, /* in8..in14 */
317 -1, /* unused */
318 6, 7, 11, 10, 23, /* fan1..fan5 */
319 -1, -1, -1, /* unused */
320 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
321 12, 9 }; /* intrusion0, intrusion1 */
322
1c65dc36 323static const u16 NCT6779_REG_FAN[] = { 0x4b0, 0x4b2, 0x4b4, 0x4b6, 0x4b8 };
5c25d954
GR		 324static const u16 NCT6779_REG_FAN_PULSES[] = {
325 0x644, 0x645, 0x646, 0x647, 0x648 };
1c65dc36 326
aa136e5d
GR		 327static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
328static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
329 0x18, 0x152 };
330static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
331 0x3a, 0x153 };
332static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
333 0x39, 0x155 };
334
335static const u16 NCT6779_REG_TEMP_OFFSET[] = {
336 0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
337
338static const char *const nct6779_temp_label[] = {
339 "",
340 "SYSTIN",
341 "CPUTIN",
342 "AUXTIN0",
343 "AUXTIN1",
344 "AUXTIN2",
345 "AUXTIN3",
346 "",
347 "SMBUSMASTER 0",
348 "SMBUSMASTER 1",
349 "SMBUSMASTER 2",
350 "SMBUSMASTER 3",
351 "SMBUSMASTER 4",
352 "SMBUSMASTER 5",
353 "SMBUSMASTER 6",
354 "SMBUSMASTER 7",
355 "PECI Agent 0",
356 "PECI Agent 1",
357 "PCH_CHIP_CPU_MAX_TEMP",
358 "PCH_CHIP_TEMP",
359 "PCH_CPU_TEMP",
360 "PCH_MCH_TEMP",
361 "PCH_DIM0_TEMP",
362 "PCH_DIM1_TEMP",
363 "PCH_DIM2_TEMP",
364 "PCH_DIM3_TEMP",
365 "BYTE_TEMP"
366};
367
368static const u16 NCT6779_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6779_temp_label) - 1]
369 = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
370 0, 0, 0, 0, 0, 0, 0, 0,
371 0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
372 0x408, 0 };
373
374static const u16 NCT6779_REG_TEMP_CRIT[ARRAY_SIZE(nct6779_temp_label) - 1]
375 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
376
9de2e2e8
GR		 377/*
378 * Conversions
379 */
380
1c65dc36
GR		 381static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
382{
383 if (reg == 0 || reg == 255)
384 return 0;
385 return 1350000U / (reg << divreg);
386}
387
388static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
389{
390 if ((reg & 0xff1f) == 0xff1f)
391 return 0;
392
393 reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
394
395 if (reg == 0)
396 return 0;
397
398 return 1350000U / reg;
399}
400
401static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
402{
403 if (reg == 0 || reg == 0xffff)
404 return 0;
405
406 /*
407 * Even though the registers are 16 bit wide, the fan divisor
408 * still applies.
409 */
410 return 1350000U / (reg << divreg);
411}
412
413static inline unsigned int
414div_from_reg(u8 reg)
415{
416 return 1 << reg;
417}
418
9de2e2e8
GR		 419/*
420 * Some of the voltage inputs have internal scaling, the tables below
421 * contain 8 (the ADC LSB in mV) * scaling factor * 100
422 */
423static const u16 scale_in[15] = {
424 800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
425 800, 800
426};
427
428static inline long in_from_reg(u8 reg, u8 nr)
429{
430 return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
431}
432
433static inline u8 in_to_reg(u32 val, u8 nr)
434{
435 return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);
436}
437
438/*
439 * Data structures and manipulation thereof
440 */
441
442struct nct6775_data {
443 int addr; /* IO base of hw monitor block */
444 enum kinds kind;
445 const char *name;
446
447 struct device *hwmon_dev;
448 struct mutex lock;
449
aa136e5d
GR		 450 u16 reg_temp[4][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
451 * 3=temp_crit
452 */
453 u8 temp_src[NUM_TEMP];
454 u16 reg_temp_config[NUM_TEMP];
455 const char * const *temp_label;
456 int temp_label_num;
457
9de2e2e8
GR		 458 u16 REG_CONFIG;
459 u16 REG_VBAT;
aa136e5d 460 u16 REG_DIODE;
9de2e2e8
GR		 461
462 const s8 *ALARM_BITS;
463
464 const u16 *REG_VIN;
465 const u16 *REG_IN_MINMAX[2];
466
1c65dc36
GR		 467 const u16 *REG_FAN;
468 const u16 *REG_FAN_MIN;
5c25d954 469 const u16 *REG_FAN_PULSES;
aa136e5d 470
1c65dc36 471 const u16 *REG_TEMP_SOURCE; /* temp register sources */
aa136e5d
GR		 472 const u16 *REG_TEMP_OFFSET;
473
9de2e2e8
GR		 474 const u16 *REG_ALARM;
475
1c65dc36
GR		 476 unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
477 unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
478
9de2e2e8
GR		 479 struct mutex update_lock;
480 bool valid; /* true if following fields are valid */
481 unsigned long last_updated; /* In jiffies */
482
483 /* Register values */
484 u8 bank; /* current register bank */
485 u8 in_num; /* number of in inputs we have */
486 u8 in[15][3]; /* [0]=in, [1]=in_max, [2]=in_min */
1c65dc36
GR		 487 unsigned int rpm[5];
488 u16 fan_min[5];
5c25d954 489 u8 fan_pulses[5];
1c65dc36
GR		 490 u8 fan_div[5];
491 u8 has_fan; /* some fan inputs can be disabled */
492 u8 has_fan_min; /* some fans don't have min register */
493 bool has_fan_div;
9de2e2e8 494
aa136e5d
GR		 495 u8 temp_fixed_num; /* 3 or 6 */
496 u8 temp_type[NUM_TEMP_FIXED];
497 s8 temp_offset[NUM_TEMP_FIXED];
498 s16 temp[4][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
499 * 3=temp_crit */
9de2e2e8
GR		 500 u64 alarms;
501
502 u8 vid;
503 u8 vrm;
504
aa136e5d
GR		 505 u16 have_temp;
506 u16 have_temp_fixed;
9de2e2e8
GR		 507 u16 have_in;
508};
509
510struct nct6775_sio_data {
511 int sioreg;
512 enum kinds kind;
513};
514
515static bool is_word_sized(struct nct6775_data *data, u16 reg)
516{
517 switch (data->kind) {
518 case nct6775:
519 return (((reg & 0xff00) == 0x100 ||
520 (reg & 0xff00) == 0x200) &&
521 ((reg & 0x00ff) == 0x50 ||
522 (reg & 0x00ff) == 0x53 ||
523 (reg & 0x00ff) == 0x55)) ||
524 (reg & 0xfff0) == 0x630 ||
525 reg == 0x640 || reg == 0x642 ||
526 reg == 0x662 ||
527 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
528 reg == 0x73 || reg == 0x75 || reg == 0x77;
529 case nct6776:
530 return (((reg & 0xff00) == 0x100 ||
531 (reg & 0xff00) == 0x200) &&
532 ((reg & 0x00ff) == 0x50 ||
533 (reg & 0x00ff) == 0x53 ||
534 (reg & 0x00ff) == 0x55)) ||
535 (reg & 0xfff0) == 0x630 ||
536 reg == 0x402 ||
537 reg == 0x640 || reg == 0x642 ||
538 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
539 reg == 0x73 || reg == 0x75 || reg == 0x77;
540 case nct6779:
541 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
542 ((reg & 0xfff0) == 0x4b0 && (reg & 0x000f) < 0x09) ||
543 reg == 0x402 ||
544 reg == 0x63a || reg == 0x63c || reg == 0x63e ||
545 reg == 0x640 || reg == 0x642 ||
546 reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
547 reg == 0x7b;
548 }
549 return false;
550}
551
552/*
553 * On older chips, only registers 0x50-0x5f are banked.
554 * On more recent chips, all registers are banked.
555 * Assume that is the case and set the bank number for each access.
556 * Cache the bank number so it only needs to be set if it changes.
557 */
558static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
559{
560 u8 bank = reg >> 8;
561 if (data->bank != bank) {
562 outb_p(NCT6775_REG_BANK, data->addr + ADDR_REG_OFFSET);
563 outb_p(bank, data->addr + DATA_REG_OFFSET);
564 data->bank = bank;
565 }
566}
567
568static u16 nct6775_read_value(struct nct6775_data *data, u16 reg)
569{
570 int res, word_sized = is_word_sized(data, reg);
571
572 mutex_lock(&data->lock);
573
574 nct6775_set_bank(data, reg);
575 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
576 res = inb_p(data->addr + DATA_REG_OFFSET);
577 if (word_sized) {
578 outb_p((reg & 0xff) + 1,
579 data->addr + ADDR_REG_OFFSET);
580 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
581 }
582
583 mutex_unlock(&data->lock);
584 return res;
585}
586
587static int nct6775_write_value(struct nct6775_data *data, u16 reg, u16 value)
588{
589 int word_sized = is_word_sized(data, reg);
590
591 mutex_lock(&data->lock);
592
593 nct6775_set_bank(data, reg);
594 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
595 if (word_sized) {
596 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
597 outb_p((reg & 0xff) + 1,
598 data->addr + ADDR_REG_OFFSET);
599 }
600 outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
601
602 mutex_unlock(&data->lock);
603 return 0;
604}
605
aa136e5d
GR		 606/* We left-align 8-bit temperature values to make the code simpler */
607static u16 nct6775_read_temp(struct nct6775_data *data, u16 reg)
608{
609 u16 res;
610
611 res = nct6775_read_value(data, reg);
612 if (!is_word_sized(data, reg))
613 res <<= 8;
614
615 return res;
616}
617
618static int nct6775_write_temp(struct nct6775_data *data, u16 reg, u16 value)
619{
620 if (!is_word_sized(data, reg))
621 value >>= 8;
622 return nct6775_write_value(data, reg, value);
623}
624
1c65dc36
GR		 625/* This function assumes that the caller holds data->update_lock */
626static void nct6775_write_fan_div(struct nct6775_data *data, int nr)
627{
628 u8 reg;
629
630 switch (nr) {
631 case 0:
632 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
633 | (data->fan_div[0] & 0x7);
634 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
635 break;
636 case 1:
637 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
638 | ((data->fan_div[1] << 4) & 0x70);
639 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
640 break;
641 case 2:
642 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
643 | (data->fan_div[2] & 0x7);
644 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
645 break;
646 case 3:
647 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
648 | ((data->fan_div[3] << 4) & 0x70);
649 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
650 break;
651 }
652}
653
654static void nct6775_write_fan_div_common(struct nct6775_data *data, int nr)
655{
656 if (data->kind == nct6775)
657 nct6775_write_fan_div(data, nr);
658}
659
660static void nct6775_update_fan_div(struct nct6775_data *data)
661{
662 u8 i;
663
664 i = nct6775_read_value(data, NCT6775_REG_FANDIV1);
665 data->fan_div[0] = i & 0x7;
666 data->fan_div[1] = (i & 0x70) >> 4;
667 i = nct6775_read_value(data, NCT6775_REG_FANDIV2);
668 data->fan_div[2] = i & 0x7;
669 if (data->has_fan & (1<<3))
670 data->fan_div[3] = (i & 0x70) >> 4;
671}
672
673static void nct6775_update_fan_div_common(struct nct6775_data *data)
674{
675 if (data->kind == nct6775)
676 nct6775_update_fan_div(data);
677}
678
679static void nct6775_init_fan_div(struct nct6775_data *data)
680{
681 int i;
682
683 nct6775_update_fan_div_common(data);
684 /*
685 * For all fans, start with highest divider value if the divider
686 * register is not initialized. This ensures that we get a
687 * reading from the fan count register, even if it is not optimal.
688 * We'll compute a better divider later on.
689 */
690 for (i = 0; i < 3; i++) {
691 if (!(data->has_fan & (1 << i)))
692 continue;
693 if (data->fan_div[i] == 0) {
694 data->fan_div[i] = 7;
695 nct6775_write_fan_div_common(data, i);
696 }
697 }
698}
699
700static void nct6775_init_fan_common(struct device *dev,
701 struct nct6775_data *data)
702{
703 int i;
704 u8 reg;
705
706 if (data->has_fan_div)
707 nct6775_init_fan_div(data);
708
709 /*
710 * If fan_min is not set (0), set it to 0xff to disable it. This
711 * prevents the unnecessary warning when fanX_min is reported as 0.
712 */
713 for (i = 0; i < 5; i++) {
714 if (data->has_fan_min & (1 << i)) {
715 reg = nct6775_read_value(data, data->REG_FAN_MIN[i]);
716 if (!reg)
717 nct6775_write_value(data, data->REG_FAN_MIN[i],
718 data->has_fan_div ? 0xff
719 : 0xff1f);
720 }
721 }
722}
723
724static void nct6775_select_fan_div(struct device *dev,
725 struct nct6775_data *data, int nr, u16 reg)
726{
727 u8 fan_div = data->fan_div[nr];
728 u16 fan_min;
729
730 if (!data->has_fan_div)
731 return;
732
733 /*
734 * If we failed to measure the fan speed, or the reported value is not
735 * in the optimal range, and the clock divider can be modified,
736 * let's try that for next time.
737 */
738 if (reg == 0x00 && fan_div < 0x07)
739 fan_div++;
740 else if (reg != 0x00 && reg < 0x30 && fan_div > 0)
741 fan_div--;
742
743 if (fan_div != data->fan_div[nr]) {
744 dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n",
745 nr + 1, div_from_reg(data->fan_div[nr]),
746 div_from_reg(fan_div));
747
748 /* Preserve min limit if possible */
749 if (data->has_fan_min & (1 << nr)) {
750 fan_min = data->fan_min[nr];
751 if (fan_div > data->fan_div[nr]) {
752 if (fan_min != 255 && fan_min > 1)
753 fan_min >>= 1;
754 } else {
755 if (fan_min != 255) {
756 fan_min <<= 1;
757 if (fan_min > 254)
758 fan_min = 254;
759 }
760 }
761 if (fan_min != data->fan_min[nr]) {
762 data->fan_min[nr] = fan_min;
763 nct6775_write_value(data, data->REG_FAN_MIN[nr],
764 fan_min);
765 }
766 }
767 data->fan_div[nr] = fan_div;
768 nct6775_write_fan_div_common(data, nr);
769 }
770}
771
9de2e2e8
GR		 772static struct nct6775_data *nct6775_update_device(struct device *dev)
773{
774 struct nct6775_data *data = dev_get_drvdata(dev);
aa136e5d 775 int i, j;
9de2e2e8
GR		 776
777 mutex_lock(&data->update_lock);
778
779 if (time_after(jiffies, data->last_updated + HZ + HZ/2)
780 || !data->valid) {
1c65dc36
GR		 781 /* Fan clock dividers */
782 nct6775_update_fan_div_common(data);
783
9de2e2e8
GR		 784 /* Measured voltages and limits */
785 for (i = 0; i < data->in_num; i++) {
786 if (!(data->have_in & (1 << i)))
787 continue;
788
789 data->in[i][0] = nct6775_read_value(data,
790 data->REG_VIN[i]);
791 data->in[i][1] = nct6775_read_value(data,
792 data->REG_IN_MINMAX[0][i]);
793 data->in[i][2] = nct6775_read_value(data,
794 data->REG_IN_MINMAX[1][i]);
795 }
796
1c65dc36
GR		 797 /* Measured fan speeds and limits */
798 for (i = 0; i < 5; i++) {
799 u16 reg;
800
801 if (!(data->has_fan & (1 << i)))
802 continue;
803
804 reg = nct6775_read_value(data, data->REG_FAN[i]);
805 data->rpm[i] = data->fan_from_reg(reg,
806 data->fan_div[i]);
807
808 if (data->has_fan_min & (1 << i))
809 data->fan_min[i] = nct6775_read_value(data,
810 data->REG_FAN_MIN[i]);
5c25d954
GR		 811 data->fan_pulses[i] =
812 nct6775_read_value(data, data->REG_FAN_PULSES[i]);
1c65dc36
GR		 813
814 nct6775_select_fan_div(dev, data, i, reg);
815 }
816
aa136e5d
GR		 817 /* Measured temperatures and limits */
818 for (i = 0; i < NUM_TEMP; i++) {
819 if (!(data->have_temp & (1 << i)))
820 continue;
821 for (j = 0; j < 4; j++) {
822 if (data->reg_temp[j][i])
823 data->temp[j][i]
824 = nct6775_read_temp(data,
825 data->reg_temp[j][i]);
826 }
827 if (!(data->have_temp_fixed & (1 << i)))
828 continue;
829 data->temp_offset[i]
830 = nct6775_read_value(data, data->REG_TEMP_OFFSET[i]);
831 }
832
9de2e2e8
GR		 833 data->alarms = 0;
834 for (i = 0; i < NUM_REG_ALARM; i++) {
835 u8 alarm;
836 if (!data->REG_ALARM[i])
837 continue;
838 alarm = nct6775_read_value(data, data->REG_ALARM[i]);
839 data->alarms |= ((u64)alarm) << (i << 3);
840 }
841
842 data->last_updated = jiffies;
843 data->valid = true;
844 }
845
846 mutex_unlock(&data->update_lock);
847 return data;
848}
849
850/*
851 * Sysfs callback functions
852 */
853static ssize_t
854show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
855{
856 struct nct6775_data *data = nct6775_update_device(dev);
857 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
858 int nr = sattr->nr;
859 int index = sattr->index;
860 return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr));
861}
862
863static ssize_t
864store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
865 size_t count)
866{
867 struct nct6775_data *data = dev_get_drvdata(dev);
868 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
869 int nr = sattr->nr;
870 int index = sattr->index;
871 unsigned long val;
872 int err = kstrtoul(buf, 10, &val);
873 if (err < 0)
874 return err;
875 mutex_lock(&data->update_lock);
876 data->in[nr][index] = in_to_reg(val, nr);
877 nct6775_write_value(data, data->REG_IN_MINMAX[index-1][nr],
878 data->in[nr][index]);
879 mutex_unlock(&data->update_lock);
880 return count;
881}
882
883static ssize_t
884show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
885{
886 struct nct6775_data *data = nct6775_update_device(dev);
887 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
888 int nr = data->ALARM_BITS[sattr->index];
889 return sprintf(buf, "%u\n",
890 (unsigned int)((data->alarms >> nr) & 0x01));
891}
892
893static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in_reg, NULL, 0, 0);
894static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in_reg, NULL, 1, 0);
895static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in_reg, NULL, 2, 0);
896static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in_reg, NULL, 3, 0);
897static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in_reg, NULL, 4, 0);
898static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in_reg, NULL, 5, 0);
899static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in_reg, NULL, 6, 0);
900static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in_reg, NULL, 7, 0);
901static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in_reg, NULL, 8, 0);
902static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in_reg, NULL, 9, 0);
903static SENSOR_DEVICE_ATTR_2(in10_input, S_IRUGO, show_in_reg, NULL, 10, 0);
904static SENSOR_DEVICE_ATTR_2(in11_input, S_IRUGO, show_in_reg, NULL, 11, 0);
905static SENSOR_DEVICE_ATTR_2(in12_input, S_IRUGO, show_in_reg, NULL, 12, 0);
906static SENSOR_DEVICE_ATTR_2(in13_input, S_IRUGO, show_in_reg, NULL, 13, 0);
907static SENSOR_DEVICE_ATTR_2(in14_input, S_IRUGO, show_in_reg, NULL, 14, 0);
908
909static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
910static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
911static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
912static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
913static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 4);
914static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 5);
915static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 6);
916static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 7);
917static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 8);
918static SENSOR_DEVICE_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 9);
919static SENSOR_DEVICE_ATTR(in10_alarm, S_IRUGO, show_alarm, NULL, 10);
920static SENSOR_DEVICE_ATTR(in11_alarm, S_IRUGO, show_alarm, NULL, 11);
921static SENSOR_DEVICE_ATTR(in12_alarm, S_IRUGO, show_alarm, NULL, 12);
922static SENSOR_DEVICE_ATTR(in13_alarm, S_IRUGO, show_alarm, NULL, 13);
923static SENSOR_DEVICE_ATTR(in14_alarm, S_IRUGO, show_alarm, NULL, 14);
924
925static SENSOR_DEVICE_ATTR_2(in0_min, S_IWUSR | S_IRUGO, show_in_reg,
926 store_in_reg, 0, 1);
927static SENSOR_DEVICE_ATTR_2(in1_min, S_IWUSR | S_IRUGO, show_in_reg,
928 store_in_reg, 1, 1);
929static SENSOR_DEVICE_ATTR_2(in2_min, S_IWUSR | S_IRUGO, show_in_reg,
930 store_in_reg, 2, 1);
931static SENSOR_DEVICE_ATTR_2(in3_min, S_IWUSR | S_IRUGO, show_in_reg,
932 store_in_reg, 3, 1);
933static SENSOR_DEVICE_ATTR_2(in4_min, S_IWUSR | S_IRUGO, show_in_reg,
934 store_in_reg, 4, 1);
935static SENSOR_DEVICE_ATTR_2(in5_min, S_IWUSR | S_IRUGO, show_in_reg,
936 store_in_reg, 5, 1);
937static SENSOR_DEVICE_ATTR_2(in6_min, S_IWUSR | S_IRUGO, show_in_reg,
938 store_in_reg, 6, 1);
939static SENSOR_DEVICE_ATTR_2(in7_min, S_IWUSR | S_IRUGO, show_in_reg,
940 store_in_reg, 7, 1);
941static SENSOR_DEVICE_ATTR_2(in8_min, S_IWUSR | S_IRUGO, show_in_reg,
942 store_in_reg, 8, 1);
943static SENSOR_DEVICE_ATTR_2(in9_min, S_IWUSR | S_IRUGO, show_in_reg,
944 store_in_reg, 9, 1);
945static SENSOR_DEVICE_ATTR_2(in10_min, S_IWUSR | S_IRUGO, show_in_reg,
946 store_in_reg, 10, 1);
947static SENSOR_DEVICE_ATTR_2(in11_min, S_IWUSR | S_IRUGO, show_in_reg,
948 store_in_reg, 11, 1);
949static SENSOR_DEVICE_ATTR_2(in12_min, S_IWUSR | S_IRUGO, show_in_reg,
950 store_in_reg, 12, 1);
951static SENSOR_DEVICE_ATTR_2(in13_min, S_IWUSR | S_IRUGO, show_in_reg,
952 store_in_reg, 13, 1);
953static SENSOR_DEVICE_ATTR_2(in14_min, S_IWUSR | S_IRUGO, show_in_reg,
954 store_in_reg, 14, 1);
955
956static SENSOR_DEVICE_ATTR_2(in0_max, S_IWUSR | S_IRUGO, show_in_reg,
957 store_in_reg, 0, 2);
958static SENSOR_DEVICE_ATTR_2(in1_max, S_IWUSR | S_IRUGO, show_in_reg,
959 store_in_reg, 1, 2);
960static SENSOR_DEVICE_ATTR_2(in2_max, S_IWUSR | S_IRUGO, show_in_reg,
961 store_in_reg, 2, 2);
962static SENSOR_DEVICE_ATTR_2(in3_max, S_IWUSR | S_IRUGO, show_in_reg,
963 store_in_reg, 3, 2);
964static SENSOR_DEVICE_ATTR_2(in4_max, S_IWUSR | S_IRUGO, show_in_reg,
965 store_in_reg, 4, 2);
966static SENSOR_DEVICE_ATTR_2(in5_max, S_IWUSR | S_IRUGO, show_in_reg,
967 store_in_reg, 5, 2);
968static SENSOR_DEVICE_ATTR_2(in6_max, S_IWUSR | S_IRUGO, show_in_reg,
969 store_in_reg, 6, 2);
970static SENSOR_DEVICE_ATTR_2(in7_max, S_IWUSR | S_IRUGO, show_in_reg,
971 store_in_reg, 7, 2);
972static SENSOR_DEVICE_ATTR_2(in8_max, S_IWUSR | S_IRUGO, show_in_reg,
973 store_in_reg, 8, 2);
974static SENSOR_DEVICE_ATTR_2(in9_max, S_IWUSR | S_IRUGO, show_in_reg,
975 store_in_reg, 9, 2);
976static SENSOR_DEVICE_ATTR_2(in10_max, S_IWUSR | S_IRUGO, show_in_reg,
977 store_in_reg, 10, 2);
978static SENSOR_DEVICE_ATTR_2(in11_max, S_IWUSR | S_IRUGO, show_in_reg,
979 store_in_reg, 11, 2);
980static SENSOR_DEVICE_ATTR_2(in12_max, S_IWUSR | S_IRUGO, show_in_reg,
981 store_in_reg, 12, 2);
982static SENSOR_DEVICE_ATTR_2(in13_max, S_IWUSR | S_IRUGO, show_in_reg,
983 store_in_reg, 13, 2);
984static SENSOR_DEVICE_ATTR_2(in14_max, S_IWUSR | S_IRUGO, show_in_reg,
985 store_in_reg, 14, 2);
986
987static struct attribute *nct6775_attributes_in[15][5] = {
988 {
989 &sensor_dev_attr_in0_input.dev_attr.attr,
990 &sensor_dev_attr_in0_min.dev_attr.attr,
991 &sensor_dev_attr_in0_max.dev_attr.attr,
992 &sensor_dev_attr_in0_alarm.dev_attr.attr,
993 NULL
994 },
995 {
996 &sensor_dev_attr_in1_input.dev_attr.attr,
997 &sensor_dev_attr_in1_min.dev_attr.attr,
998 &sensor_dev_attr_in1_max.dev_attr.attr,
999 &sensor_dev_attr_in1_alarm.dev_attr.attr,
1000 NULL
1001 },
1002 {
1003 &sensor_dev_attr_in2_input.dev_attr.attr,
1004 &sensor_dev_attr_in2_min.dev_attr.attr,
1005 &sensor_dev_attr_in2_max.dev_attr.attr,
1006 &sensor_dev_attr_in2_alarm.dev_attr.attr,
1007 NULL
1008 },
1009 {
1010 &sensor_dev_attr_in3_input.dev_attr.attr,
1011 &sensor_dev_attr_in3_min.dev_attr.attr,
1012 &sensor_dev_attr_in3_max.dev_attr.attr,
1013 &sensor_dev_attr_in3_alarm.dev_attr.attr,
1014 NULL
1015 },
1016 {
1017 &sensor_dev_attr_in4_input.dev_attr.attr,
1018 &sensor_dev_attr_in4_min.dev_attr.attr,
1019 &sensor_dev_attr_in4_max.dev_attr.attr,
1020 &sensor_dev_attr_in4_alarm.dev_attr.attr,
1021 NULL
1022 },
1023 {
1024 &sensor_dev_attr_in5_input.dev_attr.attr,
1025 &sensor_dev_attr_in5_min.dev_attr.attr,
1026 &sensor_dev_attr_in5_max.dev_attr.attr,
1027 &sensor_dev_attr_in5_alarm.dev_attr.attr,
1028 NULL
1029 },
1030 {
1031 &sensor_dev_attr_in6_input.dev_attr.attr,
1032 &sensor_dev_attr_in6_min.dev_attr.attr,
1033 &sensor_dev_attr_in6_max.dev_attr.attr,
1034 &sensor_dev_attr_in6_alarm.dev_attr.attr,
1035 NULL
1036 },
1037 {
1038 &sensor_dev_attr_in7_input.dev_attr.attr,
1039 &sensor_dev_attr_in7_min.dev_attr.attr,
1040 &sensor_dev_attr_in7_max.dev_attr.attr,
1041 &sensor_dev_attr_in7_alarm.dev_attr.attr,
1042 NULL
1043 },
1044 {
1045 &sensor_dev_attr_in8_input.dev_attr.attr,
1046 &sensor_dev_attr_in8_min.dev_attr.attr,
1047 &sensor_dev_attr_in8_max.dev_attr.attr,
1048 &sensor_dev_attr_in8_alarm.dev_attr.attr,
1049 NULL
1050 },
1051 {
1052 &sensor_dev_attr_in9_input.dev_attr.attr,
1053 &sensor_dev_attr_in9_min.dev_attr.attr,
1054 &sensor_dev_attr_in9_max.dev_attr.attr,
1055 &sensor_dev_attr_in9_alarm.dev_attr.attr,
1056 NULL
1057 },
1058 {
1059 &sensor_dev_attr_in10_input.dev_attr.attr,
1060 &sensor_dev_attr_in10_min.dev_attr.attr,
1061 &sensor_dev_attr_in10_max.dev_attr.attr,
1062 &sensor_dev_attr_in10_alarm.dev_attr.attr,
1063 NULL
1064 },
1065 {
1066 &sensor_dev_attr_in11_input.dev_attr.attr,
1067 &sensor_dev_attr_in11_min.dev_attr.attr,
1068 &sensor_dev_attr_in11_max.dev_attr.attr,
1069 &sensor_dev_attr_in11_alarm.dev_attr.attr,
1070 NULL
1071 },
1072 {
1073 &sensor_dev_attr_in12_input.dev_attr.attr,
1074 &sensor_dev_attr_in12_min.dev_attr.attr,
1075 &sensor_dev_attr_in12_max.dev_attr.attr,
1076 &sensor_dev_attr_in12_alarm.dev_attr.attr,
1077 NULL
1078 },
1079 {
1080 &sensor_dev_attr_in13_input.dev_attr.attr,
1081 &sensor_dev_attr_in13_min.dev_attr.attr,
1082 &sensor_dev_attr_in13_max.dev_attr.attr,
1083 &sensor_dev_attr_in13_alarm.dev_attr.attr,
1084 NULL
1085 },
1086 {
1087 &sensor_dev_attr_in14_input.dev_attr.attr,
1088 &sensor_dev_attr_in14_min.dev_attr.attr,
1089 &sensor_dev_attr_in14_max.dev_attr.attr,
1090 &sensor_dev_attr_in14_alarm.dev_attr.attr,
1091 NULL
1092 },
1093};
1094
1095static const struct attribute_group nct6775_group_in[15] = {
1096 { .attrs = nct6775_attributes_in[0] },
1097 { .attrs = nct6775_attributes_in[1] },
1098 { .attrs = nct6775_attributes_in[2] },
1099 { .attrs = nct6775_attributes_in[3] },
1100 { .attrs = nct6775_attributes_in[4] },
1101 { .attrs = nct6775_attributes_in[5] },
1102 { .attrs = nct6775_attributes_in[6] },
1103 { .attrs = nct6775_attributes_in[7] },
1104 { .attrs = nct6775_attributes_in[8] },
1105 { .attrs = nct6775_attributes_in[9] },
1106 { .attrs = nct6775_attributes_in[10] },
1107 { .attrs = nct6775_attributes_in[11] },
1108 { .attrs = nct6775_attributes_in[12] },
1109 { .attrs = nct6775_attributes_in[13] },
1110 { .attrs = nct6775_attributes_in[14] },
1111};
1112
1c65dc36
GR		 1113static ssize_t
1114show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1115{
1116 struct nct6775_data *data = nct6775_update_device(dev);
1117 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1118 int nr = sattr->index;
1119 return sprintf(buf, "%d\n", data->rpm[nr]);
1120}
1121
1122static ssize_t
1123show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1124{
1125 struct nct6775_data *data = nct6775_update_device(dev);
1126 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1127 int nr = sattr->index;
1128 return sprintf(buf, "%d\n",
1129 data->fan_from_reg_min(data->fan_min[nr],
1130 data->fan_div[nr]));
1131}
1132
1133static ssize_t
1134show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
1135{
1136 struct nct6775_data *data = nct6775_update_device(dev);
1137 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1138 int nr = sattr->index;
1139 return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1140}
1141
1142static ssize_t
1143store_fan_min(struct device *dev, struct device_attribute *attr,
1144 const char *buf, size_t count)
1145{
1146 struct nct6775_data *data = dev_get_drvdata(dev);
1147 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1148 int nr = sattr->index;
1149 unsigned long val;
1150 int err;
1151 unsigned int reg;
1152 u8 new_div;
1153
1154 err = kstrtoul(buf, 10, &val);
1155 if (err < 0)
1156 return err;
1157
1158 mutex_lock(&data->update_lock);
1159 if (!data->has_fan_div) {
1160 /* NCT6776F or NCT6779D; we know this is a 13 bit register */
1161 if (!val) {
1162 val = 0xff1f;
1163 } else {
1164 if (val > 1350000U)
1165 val = 135000U;
1166 val = 1350000U / val;
1167 val = (val & 0x1f) | ((val << 3) & 0xff00);
1168 }
1169 data->fan_min[nr] = val;
1170 goto write_min; /* Leave fan divider alone */
1171 }
1172 if (!val) {
1173 /* No min limit, alarm disabled */
1174 data->fan_min[nr] = 255;
1175 new_div = data->fan_div[nr]; /* No change */
1176 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1177 goto write_div;
1178 }
1179 reg = 1350000U / val;
1180 if (reg >= 128 * 255) {
1181 /*
1182 * Speed below this value cannot possibly be represented,
1183 * even with the highest divider (128)
1184 */
1185 data->fan_min[nr] = 254;
1186 new_div = 7; /* 128 == (1 << 7) */
1187 dev_warn(dev,
1188 "fan%u low limit %lu below minimum %u, set to minimum\n",
1189 nr + 1, val, data->fan_from_reg_min(254, 7));
1190 } else if (!reg) {
1191 /*
1192 * Speed above this value cannot possibly be represented,
1193 * even with the lowest divider (1)
1194 */
1195 data->fan_min[nr] = 1;
1196 new_div = 0; /* 1 == (1 << 0) */
1197 dev_warn(dev,
1198 "fan%u low limit %lu above maximum %u, set to maximum\n",
1199 nr + 1, val, data->fan_from_reg_min(1, 0));
1200 } else {
1201 /*
1202 * Automatically pick the best divider, i.e. the one such
1203 * that the min limit will correspond to a register value
1204 * in the 96..192 range
1205 */
1206 new_div = 0;
1207 while (reg > 192 && new_div < 7) {
1208 reg >>= 1;
1209 new_div++;
1210 }
1211 data->fan_min[nr] = reg;
1212 }
1213
1214write_div:
1215 /*
1216 * Write both the fan clock divider (if it changed) and the new
1217 * fan min (unconditionally)
1218 */
1219 if (new_div != data->fan_div[nr]) {
1220 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1221 nr + 1, div_from_reg(data->fan_div[nr]),
1222 div_from_reg(new_div));
1223 data->fan_div[nr] = new_div;
1224 nct6775_write_fan_div_common(data, nr);
1225 /* Give the chip time to sample a new speed value */
1226 data->last_updated = jiffies;
1227 }
1228
1229write_min:
1230 nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
1231 mutex_unlock(&data->update_lock);
1232
1233 return count;
1234}
1235
5c25d954
GR		 1236static ssize_t
1237show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf)
1238{
1239 struct nct6775_data *data = nct6775_update_device(dev);
1240 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1241 int p = data->fan_pulses[sattr->index];
1242
1243 return sprintf(buf, "%d\n", p ? : 4);
1244}
1245
1246static ssize_t
1247store_fan_pulses(struct device *dev, struct device_attribute *attr,
1248 const char *buf, size_t count)
1249{
1250 struct nct6775_data *data = dev_get_drvdata(dev);
1251 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1252 int nr = sattr->index;
1253 unsigned long val;
1254 int err;
1255
1256 err = kstrtoul(buf, 10, &val);
1257 if (err < 0)
1258 return err;
1259
1260 if (val > 4)
1261 return -EINVAL;
1262
1263 mutex_lock(&data->update_lock);
1264 data->fan_pulses[nr] = val & 3;
1265 nct6775_write_value(data, data->REG_FAN_PULSES[nr], val & 3);
1266 mutex_unlock(&data->update_lock);
1267
1268 return count;
1269}
1270
1c65dc36
GR		 1271static struct sensor_device_attribute sda_fan_input[] = {
1272 SENSOR_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0),
1273 SENSOR_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1),
1274 SENSOR_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2),
1275 SENSOR_ATTR(fan4_input, S_IRUGO, show_fan, NULL, 3),
1276 SENSOR_ATTR(fan5_input, S_IRUGO, show_fan, NULL, 4),
1277};
1278
1279static struct sensor_device_attribute sda_fan_alarm[] = {
1280 SENSOR_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE),
1281 SENSOR_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE + 1),
1282 SENSOR_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE + 2),
1283 SENSOR_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE + 3),
1284 SENSOR_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE + 4),
1285};
1286
1287static struct sensor_device_attribute sda_fan_min[] = {
1288 SENSOR_ATTR(fan1_min, S_IWUSR | S_IRUGO, show_fan_min,
1289 store_fan_min, 0),
1290 SENSOR_ATTR(fan2_min, S_IWUSR | S_IRUGO, show_fan_min,
1291 store_fan_min, 1),
1292 SENSOR_ATTR(fan3_min, S_IWUSR | S_IRUGO, show_fan_min,
1293 store_fan_min, 2),
1294 SENSOR_ATTR(fan4_min, S_IWUSR | S_IRUGO, show_fan_min,
1295 store_fan_min, 3),
1296 SENSOR_ATTR(fan5_min, S_IWUSR | S_IRUGO, show_fan_min,
1297 store_fan_min, 4),
1298};
1299
5c25d954
GR		 1300static struct sensor_device_attribute sda_fan_pulses[] = {
1301 SENSOR_ATTR(fan1_pulses, S_IWUSR | S_IRUGO, show_fan_pulses,
1302 store_fan_pulses, 0),
1303 SENSOR_ATTR(fan2_pulses, S_IWUSR | S_IRUGO, show_fan_pulses,
1304 store_fan_pulses, 1),
1305 SENSOR_ATTR(fan3_pulses, S_IWUSR | S_IRUGO, show_fan_pulses,
1306 store_fan_pulses, 2),
1307 SENSOR_ATTR(fan4_pulses, S_IWUSR | S_IRUGO, show_fan_pulses,
1308 store_fan_pulses, 3),
1309 SENSOR_ATTR(fan5_pulses, S_IWUSR | S_IRUGO, show_fan_pulses,
1310 store_fan_pulses, 4),
1311};
1312
1c65dc36
GR		 1313static struct sensor_device_attribute sda_fan_div[] = {
1314 SENSOR_ATTR(fan1_div, S_IRUGO, show_fan_div, NULL, 0),
1315 SENSOR_ATTR(fan2_div, S_IRUGO, show_fan_div, NULL, 1),
1316 SENSOR_ATTR(fan3_div, S_IRUGO, show_fan_div, NULL, 2),
1317 SENSOR_ATTR(fan4_div, S_IRUGO, show_fan_div, NULL, 3),
1318 SENSOR_ATTR(fan5_div, S_IRUGO, show_fan_div, NULL, 4),
1319};
1320
aa136e5d
GR		 1321static ssize_t
1322show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
1323{
1324 struct nct6775_data *data = nct6775_update_device(dev);
1325 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1326 int nr = sattr->index;
1327 return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
1328}
1329
1330static ssize_t
1331show_temp(struct device *dev, struct device_attribute *attr, char *buf)
1332{
1333 struct nct6775_data *data = nct6775_update_device(dev);
1334 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1335 int nr = sattr->nr;
1336 int index = sattr->index;
1337
1338 return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
1339}
1340
1341static ssize_t
1342store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
1343 size_t count)
1344{
1345 struct nct6775_data *data = dev_get_drvdata(dev);
1346 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1347 int nr = sattr->nr;
1348 int index = sattr->index;
1349 int err;
1350 long val;
1351
1352 err = kstrtol(buf, 10, &val);
1353 if (err < 0)
1354 return err;
1355
1356 mutex_lock(&data->update_lock);
1357 data->temp[index][nr] = LM75_TEMP_TO_REG(val);
1358 nct6775_write_temp(data, data->reg_temp[index][nr],
1359 data->temp[index][nr]);
1360 mutex_unlock(&data->update_lock);
1361 return count;
1362}
1363
1364static ssize_t
1365show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
1366{
1367 struct nct6775_data *data = nct6775_update_device(dev);
1368 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1369
1370 return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
1371}
1372
1373static ssize_t
1374store_temp_offset(struct device *dev, struct device_attribute *attr,
1375 const char *buf, size_t count)
1376{
1377 struct nct6775_data *data = dev_get_drvdata(dev);
1378 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1379 int nr = sattr->index;
1380 long val;
1381 int err;
1382
1383 err = kstrtol(buf, 10, &val);
1384 if (err < 0)
1385 return err;
1386
1387 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
1388
1389 mutex_lock(&data->update_lock);
1390 data->temp_offset[nr] = val;
1391 nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
1392 mutex_unlock(&data->update_lock);
1393
1394 return count;
1395}
1396
1397static ssize_t
1398show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
1399{
1400 struct nct6775_data *data = nct6775_update_device(dev);
1401 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1402 int nr = sattr->index;
1403 return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
1404}
1405
1406static ssize_t
1407store_temp_type(struct device *dev, struct device_attribute *attr,
1408 const char *buf, size_t count)
1409{
1410 struct nct6775_data *data = nct6775_update_device(dev);
1411 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1412 int nr = sattr->index;
1413 unsigned long val;
1414 int err;
1415 u8 vbat, diode, bit;
1416
1417 err = kstrtoul(buf, 10, &val);
1418 if (err < 0)
1419 return err;
1420
1421 if (val != 1 && val != 3 && val != 4)
1422 return -EINVAL;
1423
1424 mutex_lock(&data->update_lock);
1425
1426 data->temp_type[nr] = val;
1427 vbat = nct6775_read_value(data, data->REG_VBAT) & ~(0x02 << nr);
1428 diode = nct6775_read_value(data, data->REG_DIODE) & ~(0x02 << nr);
1429 bit = 0x02 << nr;
1430 switch (val) {
1431 case 1: /* CPU diode (diode, current mode) */
1432 vbat |= bit;
1433 diode |= bit;
1434 break;
1435 case 3: /* diode, voltage mode */
1436 vbat |= bit;
1437 break;
1438 case 4: /* thermistor */
1439 break;
1440 }
1441 nct6775_write_value(data, data->REG_VBAT, vbat);
1442 nct6775_write_value(data, data->REG_DIODE, diode);
1443
1444 mutex_unlock(&data->update_lock);
1445 return count;
1446}
1447
1448static struct sensor_device_attribute_2 sda_temp_input[] = {
1449 SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0),
1450 SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0),
1451 SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0),
1452 SENSOR_ATTR_2(temp4_input, S_IRUGO, show_temp, NULL, 3, 0),
1453 SENSOR_ATTR_2(temp5_input, S_IRUGO, show_temp, NULL, 4, 0),
1454 SENSOR_ATTR_2(temp6_input, S_IRUGO, show_temp, NULL, 5, 0),
1455 SENSOR_ATTR_2(temp7_input, S_IRUGO, show_temp, NULL, 6, 0),
1456 SENSOR_ATTR_2(temp8_input, S_IRUGO, show_temp, NULL, 7, 0),
1457 SENSOR_ATTR_2(temp9_input, S_IRUGO, show_temp, NULL, 8, 0),
1458 SENSOR_ATTR_2(temp10_input, S_IRUGO, show_temp, NULL, 9, 0),
1459};
1460
1461static struct sensor_device_attribute sda_temp_label[] = {
1462 SENSOR_ATTR(temp1_label, S_IRUGO, show_temp_label, NULL, 0),
1463 SENSOR_ATTR(temp2_label, S_IRUGO, show_temp_label, NULL, 1),
1464 SENSOR_ATTR(temp3_label, S_IRUGO, show_temp_label, NULL, 2),
1465 SENSOR_ATTR(temp4_label, S_IRUGO, show_temp_label, NULL, 3),
1466 SENSOR_ATTR(temp5_label, S_IRUGO, show_temp_label, NULL, 4),
1467 SENSOR_ATTR(temp6_label, S_IRUGO, show_temp_label, NULL, 5),
1468 SENSOR_ATTR(temp7_label, S_IRUGO, show_temp_label, NULL, 6),
1469 SENSOR_ATTR(temp8_label, S_IRUGO, show_temp_label, NULL, 7),
1470 SENSOR_ATTR(temp9_label, S_IRUGO, show_temp_label, NULL, 8),
1471 SENSOR_ATTR(temp10_label, S_IRUGO, show_temp_label, NULL, 9),
1472};
1473
1474static struct sensor_device_attribute_2 sda_temp_max[] = {
1475 SENSOR_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1476 0, 1),
1477 SENSOR_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1478 1, 1),
1479 SENSOR_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1480 2, 1),
1481 SENSOR_ATTR_2(temp4_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1482 3, 1),
1483 SENSOR_ATTR_2(temp5_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1484 4, 1),
1485 SENSOR_ATTR_2(temp6_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1486 5, 1),
1487 SENSOR_ATTR_2(temp7_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1488 6, 1),
1489 SENSOR_ATTR_2(temp8_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1490 7, 1),
1491 SENSOR_ATTR_2(temp9_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1492 8, 1),
1493 SENSOR_ATTR_2(temp10_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1494 9, 1),
1495};
1496
1497static struct sensor_device_attribute_2 sda_temp_max_hyst[] = {
1498 SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1499 0, 2),
1500 SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1501 1, 2),
1502 SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1503 2, 2),
1504 SENSOR_ATTR_2(temp4_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1505 3, 2),
1506 SENSOR_ATTR_2(temp5_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1507 4, 2),
1508 SENSOR_ATTR_2(temp6_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1509 5, 2),
1510 SENSOR_ATTR_2(temp7_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1511 6, 2),
1512 SENSOR_ATTR_2(temp8_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1513 7, 2),
1514 SENSOR_ATTR_2(temp9_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1515 8, 2),
1516 SENSOR_ATTR_2(temp10_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1517 9, 2),
1518};
1519
1520static struct sensor_device_attribute_2 sda_temp_crit[] = {
1521 SENSOR_ATTR_2(temp1_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1522 0, 3),
1523 SENSOR_ATTR_2(temp2_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1524 1, 3),
1525 SENSOR_ATTR_2(temp3_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1526 2, 3),
1527 SENSOR_ATTR_2(temp4_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1528 3, 3),
1529 SENSOR_ATTR_2(temp5_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1530 4, 3),
1531 SENSOR_ATTR_2(temp6_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1532 5, 3),
1533 SENSOR_ATTR_2(temp7_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1534 6, 3),
1535 SENSOR_ATTR_2(temp8_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1536 7, 3),
1537 SENSOR_ATTR_2(temp9_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1538 8, 3),
1539 SENSOR_ATTR_2(temp10_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1540 9, 3),
1541};
1542
1543static struct sensor_device_attribute sda_temp_offset[] = {
1544 SENSOR_ATTR(temp1_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1545 store_temp_offset, 0),
1546 SENSOR_ATTR(temp2_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1547 store_temp_offset, 1),
1548 SENSOR_ATTR(temp3_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1549 store_temp_offset, 2),
1550 SENSOR_ATTR(temp4_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1551 store_temp_offset, 3),
1552 SENSOR_ATTR(temp5_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1553 store_temp_offset, 4),
1554 SENSOR_ATTR(temp6_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1555 store_temp_offset, 5),
1556};
1557
1558static struct sensor_device_attribute sda_temp_type[] = {
1559 SENSOR_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
1560 store_temp_type, 0),
1561 SENSOR_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
1562 store_temp_type, 1),
1563 SENSOR_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
1564 store_temp_type, 2),
1565 SENSOR_ATTR(temp4_type, S_IRUGO | S_IWUSR, show_temp_type,
1566 store_temp_type, 3),
1567 SENSOR_ATTR(temp5_type, S_IRUGO | S_IWUSR, show_temp_type,
1568 store_temp_type, 4),
1569 SENSOR_ATTR(temp6_type, S_IRUGO | S_IWUSR, show_temp_type,
1570 store_temp_type, 5),
1571};
1572
1573static struct sensor_device_attribute sda_temp_alarm[] = {
1574 SENSOR_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL,
1575 TEMP_ALARM_BASE),
1576 SENSOR_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL,
1577 TEMP_ALARM_BASE + 1),
1578 SENSOR_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL,
1579 TEMP_ALARM_BASE + 2),
1580 SENSOR_ATTR(temp4_alarm, S_IRUGO, show_alarm, NULL,
1581 TEMP_ALARM_BASE + 3),
1582 SENSOR_ATTR(temp5_alarm, S_IRUGO, show_alarm, NULL,
1583 TEMP_ALARM_BASE + 4),
1584 SENSOR_ATTR(temp6_alarm, S_IRUGO, show_alarm, NULL,
1585 TEMP_ALARM_BASE + 5),
1586};
1587
1588#define NUM_TEMP_ALARM ARRAY_SIZE(sda_temp_alarm)
1589
9de2e2e8
GR		 1590static ssize_t
1591show_name(struct device *dev, struct device_attribute *attr, char *buf)
1592{
1593 struct nct6775_data *data = dev_get_drvdata(dev);
1594
1595 return sprintf(buf, "%s\n", data->name);
1596}
1597
1598static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1599
1600static ssize_t
1601show_vid(struct device *dev, struct device_attribute *attr, char *buf)
1602{
1603 struct nct6775_data *data = dev_get_drvdata(dev);
1604 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
1605}
1606
1607static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
1608
a6bd5878
GR		 1609/* Case open detection */
1610
1611static ssize_t
1612clear_caseopen(struct device *dev, struct device_attribute *attr,
1613 const char *buf, size_t count)
1614{
1615 struct nct6775_data *data = dev_get_drvdata(dev);
1616 struct nct6775_sio_data *sio_data = dev->platform_data;
1617 int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
1618 unsigned long val;
1619 u8 reg;
1620 int ret;
1621
1622 if (kstrtoul(buf, 10, &val) || val != 0)
1623 return -EINVAL;
1624
1625 mutex_lock(&data->update_lock);
1626
1627 /*
1628 * Use CR registers to clear caseopen status.
1629 * The CR registers are the same for all chips, and not all chips
1630 * support clearing the caseopen status through "regular" registers.
1631 */
1632 ret = superio_enter(sio_data->sioreg);
1633 if (ret) {
1634 count = ret;
1635 goto error;
1636 }
1637
1638 superio_select(sio_data->sioreg, NCT6775_LD_ACPI);
1639 reg = superio_inb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
1640 reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
1641 superio_outb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
1642 reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
1643 superio_outb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
1644 superio_exit(sio_data->sioreg);
1645
1646 data->valid = false; /* Force cache refresh */
1647error:
1648 mutex_unlock(&data->update_lock);
1649 return count;
1650}
1651
1652static struct sensor_device_attribute sda_caseopen[] = {
1653 SENSOR_ATTR(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm,
1654 clear_caseopen, INTRUSION_ALARM_BASE),
1655 SENSOR_ATTR(intrusion1_alarm, S_IWUSR | S_IRUGO, show_alarm,
1656 clear_caseopen, INTRUSION_ALARM_BASE + 1),
1657};
1658
9de2e2e8
GR		 1659/*
1660 * Driver and device management
1661 */
1662
1663static void nct6775_device_remove_files(struct device *dev)
1664{
1665 /*
1666 * some entries in the following arrays may not have been used in
1667 * device_create_file(), but device_remove_file() will ignore them
1668 */
1669 int i;
1670 struct nct6775_data *data = dev_get_drvdata(dev);
1671
1672 for (i = 0; i < data->in_num; i++)
1673 sysfs_remove_group(&dev->kobj, &nct6775_group_in[i]);
1674
1c65dc36
GR		 1675 for (i = 0; i < 5; i++) {
1676 device_remove_file(dev, &sda_fan_input[i].dev_attr);
1677 device_remove_file(dev, &sda_fan_alarm[i].dev_attr);
1678 device_remove_file(dev, &sda_fan_div[i].dev_attr);
1679 device_remove_file(dev, &sda_fan_min[i].dev_attr);
5c25d954 1680 device_remove_file(dev, &sda_fan_pulses[i].dev_attr);
1c65dc36 1681 }
aa136e5d
GR		 1682 for (i = 0; i < NUM_TEMP; i++) {
1683 if (!(data->have_temp & (1 << i)))
1684 continue;
1685 device_remove_file(dev, &sda_temp_input[i].dev_attr);
1686 device_remove_file(dev, &sda_temp_label[i].dev_attr);
1687 device_remove_file(dev, &sda_temp_max[i].dev_attr);
1688 device_remove_file(dev, &sda_temp_max_hyst[i].dev_attr);
1689 device_remove_file(dev, &sda_temp_crit[i].dev_attr);
1690 if (!(data->have_temp_fixed & (1 << i)))
1691 continue;
1692 device_remove_file(dev, &sda_temp_type[i].dev_attr);
1693 device_remove_file(dev, &sda_temp_offset[i].dev_attr);
1694 if (i >= NUM_TEMP_ALARM)
1695 continue;
1696 device_remove_file(dev, &sda_temp_alarm[i].dev_attr);
1697 }
1698
a6bd5878
GR		 1699 device_remove_file(dev, &sda_caseopen[0].dev_attr);
1700 device_remove_file(dev, &sda_caseopen[1].dev_attr);
1701
9de2e2e8
GR		 1702 device_remove_file(dev, &dev_attr_name);
1703 device_remove_file(dev, &dev_attr_cpu0_vid);
1704}
1705
1706/* Get the monitoring functions started */
1707static inline void nct6775_init_device(struct nct6775_data *data)
1708{
aa136e5d
GR		 1709 int i;
1710 u8 tmp, diode;
9de2e2e8
GR		 1711
1712 /* Start monitoring if needed */
1713 if (data->REG_CONFIG) {
1714 tmp = nct6775_read_value(data, data->REG_CONFIG);
1715 if (!(tmp & 0x01))
1716 nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
1717 }
1718
aa136e5d
GR		 1719 /* Enable temperature sensors if needed */
1720 for (i = 0; i < NUM_TEMP; i++) {
1721 if (!(data->have_temp & (1 << i)))
1722 continue;
1723 if (!data->reg_temp_config[i])
1724 continue;
1725 tmp = nct6775_read_value(data, data->reg_temp_config[i]);
1726 if (tmp & 0x01)
1727 nct6775_write_value(data, data->reg_temp_config[i],
1728 tmp & 0xfe);
1729 }
1730
9de2e2e8
GR		 1731 /* Enable VBAT monitoring if needed */
1732 tmp = nct6775_read_value(data, data->REG_VBAT);
1733 if (!(tmp & 0x01))
1734 nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
aa136e5d
GR		 1735
1736 diode = nct6775_read_value(data, data->REG_DIODE);
1737
1738 for (i = 0; i < data->temp_fixed_num; i++) {
1739 if (!(data->have_temp_fixed & (1 << i)))
1740 continue;
1741 if ((tmp & (0x02 << i))) /* diode */
1742 data->temp_type[i] = 3 - ((diode >> i) & 0x02);
1743 else /* thermistor */
1744 data->temp_type[i] = 4;
1745 }
9de2e2e8
GR		 1746}
1747
1c65dc36
GR		 1748static int
1749nct6775_check_fan_inputs(const struct nct6775_sio_data *sio_data,
1750 struct nct6775_data *data)
1751{
1752 int regval;
1753 bool fan3pin, fan3min, fan4pin, fan4min, fan5pin;
1754 int ret;
1755
1756 ret = superio_enter(sio_data->sioreg);
1757 if (ret)
1758 return ret;
1759
1760 /* fan4 and fan5 share some pins with the GPIO and serial flash */
1761 if (data->kind == nct6775) {
1762 regval = superio_inb(sio_data->sioreg, 0x2c);
1763
1764 fan3pin = regval & (1 << 6);
1765 fan3min = fan3pin;
1766
1767 /* On NCT6775, fan4 shares pins with the fdc interface */
1768 fan4pin = !(superio_inb(sio_data->sioreg, 0x2A) & 0x80);
1769 fan4min = 0;
1770 fan5pin = 0;
1771 } else if (data->kind == nct6776) {
1772 bool gpok = superio_inb(sio_data->sioreg, 0x27) & 0x80;
1773
1774 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
1775 regval = superio_inb(sio_data->sioreg, SIO_REG_ENABLE);
1776
1777 if (regval & 0x80)
1778 fan3pin = gpok;
1779 else
1780 fan3pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x40);
1781
1782 if (regval & 0x40)
1783 fan4pin = gpok;
1784 else
1785 fan4pin = superio_inb(sio_data->sioreg, 0x1C) & 0x01;
1786
1787 if (regval & 0x20)
1788 fan5pin = gpok;
1789 else
1790 fan5pin = superio_inb(sio_data->sioreg, 0x1C) & 0x02;
1791
1792 fan4min = fan4pin;
1793 fan3min = fan3pin;
1794 } else { /* NCT6779D */
1795 regval = superio_inb(sio_data->sioreg, 0x1c);
1796
1797 fan3pin = !(regval & (1 << 5));
1798 fan4pin = !(regval & (1 << 6));
1799 fan5pin = !(regval & (1 << 7));
1800
1801 fan3min = fan3pin;
1802 fan4min = fan4pin;
1803 }
1804
1805 superio_exit(sio_data->sioreg);
1806
1807 data->has_fan = data->has_fan_min = 0x03; /* fan1 and fan2 */
1808 data->has_fan |= fan3pin << 2;
1809 data->has_fan_min |= fan3min << 2;
1810
1811 data->has_fan |= (fan4pin << 3) | (fan5pin << 4);
1812 data->has_fan_min |= (fan4min << 3) | (fan5pin << 4);
1813
1814 return 0;
1815}
1816
9de2e2e8
GR		 1817static int nct6775_probe(struct platform_device *pdev)
1818{
1819 struct device *dev = &pdev->dev;
1820 struct nct6775_sio_data *sio_data = dev->platform_data;
1821 struct nct6775_data *data;
1822 struct resource *res;
aa136e5d
GR		 1823 int i, s, err = 0;
1824 int src, mask, available;
1825 const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
1826 const u16 *reg_temp_alternate, *reg_temp_crit;
1827 int num_reg_temp;
9de2e2e8
GR		 1828
1829 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1830 if (!devm_request_region(&pdev->dev, res->start, IOREGION_LENGTH,
1831 DRVNAME))
1832 return -EBUSY;
1833
1834 data = devm_kzalloc(&pdev->dev, sizeof(struct nct6775_data),
1835 GFP_KERNEL);
1836 if (!data)
1837 return -ENOMEM;
1838
1839 data->kind = sio_data->kind;
1840 data->addr = res->start;
1841 mutex_init(&data->lock);
1842 mutex_init(&data->update_lock);
1843 data->name = nct6775_device_names[data->kind];
1844 data->bank = 0xff; /* Force initial bank selection */
1845 platform_set_drvdata(pdev, data);
1846
1847 switch (data->kind) {
1848 case nct6775:
1849 data->in_num = 9;
1c65dc36 1850 data->has_fan_div = true;
aa136e5d 1851 data->temp_fixed_num = 3;
9de2e2e8
GR		 1852
1853 data->ALARM_BITS = NCT6775_ALARM_BITS;
1854
1c65dc36
GR		 1855 data->fan_from_reg = fan_from_reg16;
1856 data->fan_from_reg_min = fan_from_reg8;
1857
aa136e5d
GR		 1858 data->temp_label = nct6775_temp_label;
1859 data->temp_label_num = ARRAY_SIZE(nct6775_temp_label);
1860
9de2e2e8
GR		 1861 data->REG_CONFIG = NCT6775_REG_CONFIG;
1862 data->REG_VBAT = NCT6775_REG_VBAT;
aa136e5d 1863 data->REG_DIODE = NCT6775_REG_DIODE;
9de2e2e8
GR		 1864 data->REG_VIN = NCT6775_REG_IN;
1865 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
1866 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
1c65dc36
GR		 1867 data->REG_FAN = NCT6775_REG_FAN;
1868 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
5c25d954 1869 data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES;
aa136e5d
GR		 1870 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
1871 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
9de2e2e8 1872 data->REG_ALARM = NCT6775_REG_ALARM;
aa136e5d
GR		 1873
1874 reg_temp = NCT6775_REG_TEMP;
1875 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
1876 reg_temp_over = NCT6775_REG_TEMP_OVER;
1877 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
1878 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
1879 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
1880 reg_temp_crit = NCT6775_REG_TEMP_CRIT;
1881
9de2e2e8
GR		 1882 break;
1883 case nct6776:
1884 data->in_num = 9;
1c65dc36 1885 data->has_fan_div = false;
aa136e5d 1886 data->temp_fixed_num = 3;
9de2e2e8
GR		 1887
1888 data->ALARM_BITS = NCT6776_ALARM_BITS;
1889
1c65dc36
GR		 1890 data->fan_from_reg = fan_from_reg13;
1891 data->fan_from_reg_min = fan_from_reg13;
1892
aa136e5d
GR		 1893 data->temp_label = nct6776_temp_label;
1894 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
1895
9de2e2e8
GR		 1896 data->REG_CONFIG = NCT6775_REG_CONFIG;
1897 data->REG_VBAT = NCT6775_REG_VBAT;
aa136e5d 1898 data->REG_DIODE = NCT6775_REG_DIODE;
9de2e2e8
GR		 1899 data->REG_VIN = NCT6775_REG_IN;
1900 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
1901 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
1c65dc36
GR		 1902 data->REG_FAN = NCT6775_REG_FAN;
1903 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
5c25d954 1904 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES;
aa136e5d
GR		 1905 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
1906 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
9de2e2e8 1907 data->REG_ALARM = NCT6775_REG_ALARM;
aa136e5d
GR		 1908
1909 reg_temp = NCT6775_REG_TEMP;
1910 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
1911 reg_temp_over = NCT6775_REG_TEMP_OVER;
1912 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
1913 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
1914 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
1915 reg_temp_crit = NCT6776_REG_TEMP_CRIT;
1916
9de2e2e8
GR		 1917 break;
1918 case nct6779:
1919 data->in_num = 15;
1c65dc36 1920 data->has_fan_div = false;
aa136e5d 1921 data->temp_fixed_num = 6;
9de2e2e8
GR		 1922
1923 data->ALARM_BITS = NCT6779_ALARM_BITS;
1924
1c65dc36
GR		 1925 data->fan_from_reg = fan_from_reg13;
1926 data->fan_from_reg_min = fan_from_reg13;
1927
aa136e5d
GR		 1928 data->temp_label = nct6779_temp_label;
1929 data->temp_label_num = ARRAY_SIZE(nct6779_temp_label);
1930
9de2e2e8
GR		 1931 data->REG_CONFIG = NCT6775_REG_CONFIG;
1932 data->REG_VBAT = NCT6775_REG_VBAT;
aa136e5d 1933 data->REG_DIODE = NCT6775_REG_DIODE;
9de2e2e8
GR		 1934 data->REG_VIN = NCT6779_REG_IN;
1935 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
1936 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
1c65dc36
GR		 1937 data->REG_FAN = NCT6779_REG_FAN;
1938 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
5c25d954 1939 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
aa136e5d
GR		 1940 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
1941 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
9de2e2e8 1942 data->REG_ALARM = NCT6779_REG_ALARM;
aa136e5d
GR		 1943
1944 reg_temp = NCT6779_REG_TEMP;
1945 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
1946 reg_temp_over = NCT6779_REG_TEMP_OVER;
1947 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
1948 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
1949 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
1950 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
1951
9de2e2e8
GR		 1952 break;
1953 default:
1954 return -ENODEV;
1955 }
1956 data->have_in = (1 << data->in_num) - 1;
aa136e5d
GR		 1957 data->have_temp = 0;
1958
1959 /*
1960 * On some boards, not all available temperature sources are monitored,
1961 * even though some of the monitoring registers are unused.
1962 * Get list of unused monitoring registers, then detect if any fan
1963 * controls are configured to use unmonitored temperature sources.
1964 * If so, assign the unmonitored temperature sources to available
1965 * monitoring registers.
1966 */
1967 mask = 0;
1968 available = 0;
1969 for (i = 0; i < num_reg_temp; i++) {
1970 if (reg_temp[i] == 0)
1971 continue;
1972
1973 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
1974 if (!src || (mask & (1 << src)))
1975 available |= 1 << i;
1976
1977 mask |= 1 << src;
1978 }
1979
1980 mask = 0;
1981 s = NUM_TEMP_FIXED; /* First dynamic temperature attribute */
1982 for (i = 0; i < num_reg_temp; i++) {
1983 if (reg_temp[i] == 0)
1984 continue;
1985
1986 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
1987 if (!src || (mask & (1 << src)))
1988 continue;
1989
1990 if (src >= data->temp_label_num ||
1991 !strlen(data->temp_label[src])) {
1992 dev_info(dev,
1993 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
1994 src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
1995 continue;
1996 }
1997
1998 mask |= 1 << src;
1999
2000 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
2001 if (src <= data->temp_fixed_num) {
2002 data->have_temp |= 1 << (src - 1);
2003 data->have_temp_fixed |= 1 << (src - 1);
2004 data->reg_temp[0][src - 1] = reg_temp[i];
2005 data->reg_temp[1][src - 1] = reg_temp_over[i];
2006 data->reg_temp[2][src - 1] = reg_temp_hyst[i];
2007 data->reg_temp_config[src - 1] = reg_temp_config[i];
2008 data->temp_src[src - 1] = src;
2009 continue;
2010 }
2011
2012 if (s >= NUM_TEMP)
2013 continue;
2014
2015 /* Use dynamic index for other sources */
2016 data->have_temp |= 1 << s;
2017 data->reg_temp[0][s] = reg_temp[i];
2018 data->reg_temp[1][s] = reg_temp_over[i];
2019 data->reg_temp[2][s] = reg_temp_hyst[i];
2020 data->reg_temp_config[s] = reg_temp_config[i];
2021 if (reg_temp_crit[src - 1])
2022 data->reg_temp[3][s] = reg_temp_crit[src - 1];
2023
2024 data->temp_src[s] = src;
2025 s++;
2026 }
2027
2028#ifdef USE_ALTERNATE
2029 /*
2030 * Go through the list of alternate temp registers and enable
2031 * if possible.
2032 * The temperature is already monitored if the respective bit in <mask>
2033 * is set.
2034 */
2035 for (i = 0; i < data->temp_label_num - 1; i++) {
2036 if (!reg_temp_alternate[i])
2037 continue;
2038 if (mask & (1 << (i + 1)))
2039 continue;
2040 if (i < data->temp_fixed_num) {
2041 if (data->have_temp & (1 << i))
2042 continue;
2043 data->have_temp |= 1 << i;
2044 data->have_temp_fixed |= 1 << i;
2045 data->reg_temp[0][i] = reg_temp_alternate[i];
2046 data->reg_temp[1][i] = reg_temp_over[i];
2047 data->reg_temp[2][i] = reg_temp_hyst[i];
2048 data->temp_src[i] = i + 1;
2049 continue;
2050 }
2051
2052 if (s >= NUM_TEMP) /* Abort if no more space */
2053 break;
2054
2055 data->have_temp |= 1 << s;
2056 data->reg_temp[0][s] = reg_temp_alternate[i];
2057 data->temp_src[s] = i + 1;
2058 s++;
2059 }
2060#endif /* USE_ALTERNATE */
2061
2062 switch (data->kind) {
2063 case nct6775:
2064 break;
2065 case nct6776:
2066 /*
2067 * On NCT6776, AUXTIN and VIN3 pins are shared.
2068 * Only way to detect it is to check if AUXTIN is used
2069 * as a temperature source, and if that source is
2070 * enabled.
2071 *
2072 * If that is the case, disable in6, which reports VIN3.
2073 * Otherwise disable temp3.
2074 */
2075 if (data->have_temp & (1 << 2)) {
2076 u8 reg = nct6775_read_value(data,
2077 data->reg_temp_config[2]);
2078 if (reg & 0x01)
2079 data->have_temp &= ~(1 << 2);
2080 else
2081 data->have_in &= ~(1 << 6);
2082 }
2083 break;
2084 case nct6779:
2085 /*
2086 * Shared pins:
2087 * VIN4 / AUXTIN0
2088 * VIN5 / AUXTIN1
2089 * VIN6 / AUXTIN2
2090 * VIN7 / AUXTIN3
2091 *
2092 * There does not seem to be a clean way to detect if VINx or
2093 * AUXTINx is active, so for keep both sensor types enabled
2094 * for now.
2095 */
2096 break;
2097 }
9de2e2e8
GR		 2098
2099 /* Initialize the chip */
2100 nct6775_init_device(data);
2101
2102 data->vrm = vid_which_vrm();
2103 err = superio_enter(sio_data->sioreg);
2104 if (err)
2105 return err;
2106
2107 /*
2108 * Read VID value
2109 * We can get the VID input values directly at logical device D 0xe3.
2110 */
2111 superio_select(sio_data->sioreg, NCT6775_LD_VID);
2112 data->vid = superio_inb(sio_data->sioreg, 0xe3);
2113 superio_exit(sio_data->sioreg);
2114
2115 err = device_create_file(dev, &dev_attr_cpu0_vid);
2116 if (err)
2117 return err;
2118
1c65dc36
GR		 2119 err = nct6775_check_fan_inputs(sio_data, data);
2120 if (err)
2121 goto exit_remove;
2122
2123 /* Read fan clock dividers immediately */
2124 nct6775_init_fan_common(dev, data);
2125
9de2e2e8
GR		 2126 for (i = 0; i < data->in_num; i++) {
2127 if (!(data->have_in & (1 << i)))
2128 continue;
2129 err = sysfs_create_group(&dev->kobj, &nct6775_group_in[i]);
2130 if (err)
2131 goto exit_remove;
2132 }
2133
1c65dc36
GR		 2134 for (i = 0; i < 5; i++) {
2135 if (data->has_fan & (1 << i)) {
2136 err = device_create_file(dev,
2137 &sda_fan_input[i].dev_attr);
2138 if (err)
2139 goto exit_remove;
2140 err = device_create_file(dev,
2141 &sda_fan_alarm[i].dev_attr);
2142 if (err)
2143 goto exit_remove;
2144 if (data->kind != nct6776 &&
2145 data->kind != nct6779) {
2146 err = device_create_file(dev,
2147 &sda_fan_div[i].dev_attr);
2148 if (err)
2149 goto exit_remove;
2150 }
2151 if (data->has_fan_min & (1 << i)) {
2152 err = device_create_file(dev,
2153 &sda_fan_min[i].dev_attr);
2154 if (err)
2155 goto exit_remove;
2156 }
5c25d954
GR		 2157 err = device_create_file(dev,
2158 &sda_fan_pulses[i].dev_attr);
2159 if (err)
2160 goto exit_remove;
1c65dc36
GR		 2161 }
2162 }
2163
aa136e5d
GR		 2164 for (i = 0; i < NUM_TEMP; i++) {
2165 if (!(data->have_temp & (1 << i)))
2166 continue;
2167 err = device_create_file(dev, &sda_temp_input[i].dev_attr);
2168 if (err)
2169 goto exit_remove;
2170 if (data->temp_label) {
2171 err = device_create_file(dev,
2172 &sda_temp_label[i].dev_attr);
2173 if (err)
2174 goto exit_remove;
2175 }
2176 if (data->reg_temp[1][i]) {
2177 err = device_create_file(dev,
2178 &sda_temp_max[i].dev_attr);
2179 if (err)
2180 goto exit_remove;
2181 }
2182 if (data->reg_temp[2][i]) {
2183 err = device_create_file(dev,
2184 &sda_temp_max_hyst[i].dev_attr);
2185 if (err)
2186 goto exit_remove;
2187 }
2188 if (data->reg_temp[3][i]) {
2189 err = device_create_file(dev,
2190 &sda_temp_crit[i].dev_attr);
2191 if (err)
2192 goto exit_remove;
2193 }
2194 if (!(data->have_temp_fixed & (1 << i)))
2195 continue;
2196 err = device_create_file(dev, &sda_temp_type[i].dev_attr);
2197 if (err)
2198 goto exit_remove;
2199 err = device_create_file(dev, &sda_temp_offset[i].dev_attr);
2200 if (err)
2201 goto exit_remove;
2202 if (i >= NUM_TEMP_ALARM ||
2203 data->ALARM_BITS[TEMP_ALARM_BASE + i] < 0)
2204 continue;
2205 err = device_create_file(dev, &sda_temp_alarm[i].dev_attr);
2206 if (err)
2207 goto exit_remove;
2208 }
2209
a6bd5878
GR		 2210 for (i = 0; i < ARRAY_SIZE(sda_caseopen); i++) {
2211 if (data->ALARM_BITS[INTRUSION_ALARM_BASE + i] < 0)
2212 continue;
2213 err = device_create_file(dev, &sda_caseopen[i].dev_attr);
2214 if (err)
2215 goto exit_remove;
2216 }
2217
9de2e2e8
GR		 2218 err = device_create_file(dev, &dev_attr_name);
2219 if (err)
2220 goto exit_remove;
2221
2222 data->hwmon_dev = hwmon_device_register(dev);
2223 if (IS_ERR(data->hwmon_dev)) {
2224 err = PTR_ERR(data->hwmon_dev);
2225 goto exit_remove;
2226 }
2227
2228 return 0;
2229
2230exit_remove:
2231 nct6775_device_remove_files(dev);
2232 return err;
2233}
2234
2235static int nct6775_remove(struct platform_device *pdev)
2236{
2237 struct nct6775_data *data = platform_get_drvdata(pdev);
2238
2239 hwmon_device_unregister(data->hwmon_dev);
2240 nct6775_device_remove_files(&pdev->dev);
2241
2242 return 0;
2243}
2244
2245static struct platform_driver nct6775_driver = {
2246 .driver = {
2247 .owner = THIS_MODULE,
2248 .name = DRVNAME,
2249 },
2250 .probe = nct6775_probe,
2251 .remove = nct6775_remove,
2252};
2253
2254/* nct6775_find() looks for a '627 in the Super-I/O config space */
2255static int __init nct6775_find(int sioaddr, unsigned short *addr,
2256 struct nct6775_sio_data *sio_data)
2257{
2258 static const char sio_name_NCT6775[] __initconst = "NCT6775F";
2259 static const char sio_name_NCT6776[] __initconst = "NCT6776F";
2260 static const char sio_name_NCT6779[] __initconst = "NCT6779D";
2261
2262 u16 val;
2263 const char *sio_name;
2264 int err;
2265
2266 err = superio_enter(sioaddr);
2267 if (err)
2268 return err;
2269
2270 if (force_id)
2271 val = force_id;
2272 else
2273 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
2274 | superio_inb(sioaddr, SIO_REG_DEVID + 1);
2275 switch (val & SIO_ID_MASK) {
2276 case SIO_NCT6775_ID:
2277 sio_data->kind = nct6775;
2278 sio_name = sio_name_NCT6775;
2279 break;
2280 case SIO_NCT6776_ID:
2281 sio_data->kind = nct6776;
2282 sio_name = sio_name_NCT6776;
2283 break;
2284 case SIO_NCT6779_ID:
2285 sio_data->kind = nct6779;
2286 sio_name = sio_name_NCT6779;
2287 break;
2288 default:
2289 if (val != 0xffff)
2290 pr_debug("unsupported chip ID: 0x%04x\n", val);
2291 superio_exit(sioaddr);
2292 return -ENODEV;
2293 }
2294
2295 /* We have a known chip, find the HWM I/O address */
2296 superio_select(sioaddr, NCT6775_LD_HWM);
2297 val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
2298 | superio_inb(sioaddr, SIO_REG_ADDR + 1);
2299 *addr = val & IOREGION_ALIGNMENT;
2300 if (*addr == 0) {
2301 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
2302 superio_exit(sioaddr);
2303 return -ENODEV;
2304 }
2305
2306 /* Activate logical device if needed */
2307 val = superio_inb(sioaddr, SIO_REG_ENABLE);
2308 if (!(val & 0x01)) {
2309 pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
2310 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
2311 }
2312
2313 superio_exit(sioaddr);
2314 pr_info("Found %s chip at %#x\n", sio_name, *addr);
2315 sio_data->sioreg = sioaddr;
2316
2317 return 0;
2318}
2319
2320/*
2321 * when Super-I/O functions move to a separate file, the Super-I/O
2322 * bus will manage the lifetime of the device and this module will only keep
2323 * track of the nct6775 driver. But since we platform_device_alloc(), we
2324 * must keep track of the device
2325 */
2326static struct platform_device *pdev;
2327
2328static int __init sensors_nct6775_init(void)
2329{
2330 int err;
2331 unsigned short address;
2332 struct resource res;
2333 struct nct6775_sio_data sio_data;
2334
2335 /*
2336 * initialize sio_data->kind and sio_data->sioreg.
2337 *
2338 * when Super-I/O functions move to a separate file, the Super-I/O
2339 * driver will probe 0x2e and 0x4e and auto-detect the presence of a
2340 * nct6775 hardware monitor, and call probe()
2341 */
2342 if (nct6775_find(0x2e, &address, &sio_data) &&
2343 nct6775_find(0x4e, &address, &sio_data))
2344 return -ENODEV;
2345
2346 err = platform_driver_register(&nct6775_driver);
2347 if (err)
2348 goto exit;
2349
2350 pdev = platform_device_alloc(DRVNAME, address);
2351 if (!pdev) {
2352 err = -ENOMEM;
2353 pr_err("Device allocation failed\n");
2354 goto exit_unregister;
2355 }
2356
2357 err = platform_device_add_data(pdev, &sio_data,
2358 sizeof(struct nct6775_sio_data));
2359 if (err) {
2360 pr_err("Platform data allocation failed\n");
2361 goto exit_device_put;
2362 }
2363
2364 memset(&res, 0, sizeof(res));
2365 res.name = DRVNAME;
2366 res.start = address + IOREGION_OFFSET;
2367 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
2368 res.flags = IORESOURCE_IO;
2369
2370 err = acpi_check_resource_conflict(&res);
2371 if (err)
2372 goto exit_device_put;
2373
2374 err = platform_device_add_resources(pdev, &res, 1);
2375 if (err) {
2376 pr_err("Device resource addition failed (%d)\n", err);
2377 goto exit_device_put;
2378 }
2379
2380 /* platform_device_add calls probe() */
2381 err = platform_device_add(pdev);
2382 if (err) {
2383 pr_err("Device addition failed (%d)\n", err);
2384 goto exit_device_put;
2385 }
2386
2387 return 0;
2388
2389exit_device_put:
2390 platform_device_put(pdev);
2391exit_unregister:
2392 platform_driver_unregister(&nct6775_driver);
2393exit:
2394 return err;
2395}
2396
2397static void __exit sensors_nct6775_exit(void)
2398{
2399 platform_device_unregister(pdev);
2400 platform_driver_unregister(&nct6775_driver);
2401}
2402
2403MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
2404MODULE_DESCRIPTION("NCT6775F/NCT6776F/NCT6779D driver");
2405MODULE_LICENSE("GPL");
2406
2407module_init(sensors_nct6775_init);
2408module_exit(sensors_nct6775_exit);
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