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x86/msr-index: Cleanup bit defines
[mirror_ubuntu-bionic-kernel.git] / drivers / hwmon / pc87427.c
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ba224e2c
JD		 1/*
2 * pc87427.c - hardware monitoring driver for the
3 * National Semiconductor PC87427 Super-I/O chip
7c81c60f 4 * Copyright (C) 2006, 2008, 2010 Jean Delvare <jdelvare@suse.de>
ba224e2c
JD		 5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * Supports the following chips:
16 *
17 * Chip #vin #fan #pwm #temp devid
008e5f33 18 * PC87427 - 8 4 6 0xF2
ba224e2c
JD		 19 *
20 * This driver assumes that no more than one chip is present.
008e5f33
JD		 21 * Only fans are fully supported so far. Temperatures are in read-only
22 * mode, and voltages aren't supported at all.
ba224e2c
JD		 23 */
24
5e24e0c3
JP		 25#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
26
ba224e2c
JD		 27#include <linux/module.h>
28#include <linux/init.h>
29#include <linux/slab.h>
30#include <linux/jiffies.h>
31#include <linux/platform_device.h>
32#include <linux/hwmon.h>
33#include <linux/hwmon-sysfs.h>
34#include <linux/err.h>
35#include <linux/mutex.h>
36#include <linux/sysfs.h>
ce7ee4e8 37#include <linux/ioport.h>
b9acb64a 38#include <linux/acpi.h>
6055fae8 39#include <linux/io.h>
ba224e2c 40
67b671bc
JD		 41static unsigned short force_id;
42module_param(force_id, ushort, 0);
43MODULE_PARM_DESC(force_id, "Override the detected device ID");
44
ba224e2c
JD		 45static struct platform_device *pdev;
46
47#define DRVNAME "pc87427"
48
36564efa
GR		 49/*
50 * The lock mutex protects both the I/O accesses (needed because the
51 * device is using banked registers) and the register cache (needed to keep
52 * the data in the registers and the cache in sync at any time).
53 */
ba224e2c 54struct pc87427_data {
1beeffe4 55 struct device *hwmon_dev;
ba224e2c
JD		 56 struct mutex lock;
57 int address[2];
58 const char *name;
59
60 unsigned long last_updated; /* in jiffies */
61 u8 fan_enabled; /* bit vector */
62 u16 fan[8]; /* register values */
63 u16 fan_min[8]; /* register values */
64 u8 fan_status[8]; /* register values */
328716bc
JD		 65
66 u8 pwm_enabled; /* bit vector */
67 u8 pwm_auto_ok; /* bit vector */
68 u8 pwm_enable[4]; /* register values */
69 u8 pwm[4]; /* register values */
008e5f33
JD		 70
71 u8 temp_enabled; /* bit vector */
72 s16 temp[6]; /* register values */
73 s8 temp_min[6]; /* register values */
74 s8 temp_max[6]; /* register values */
75 s8 temp_crit[6]; /* register values */
76 u8 temp_status[6]; /* register values */
77 u8 temp_type[6]; /* register values */
ba224e2c
JD		 78};
79
4e7d99e1 80struct pc87427_sio_data {
9d32df19 81 unsigned short address[2];
4e7d99e1 82 u8 has_fanin;
328716bc 83 u8 has_fanout;
4e7d99e1
JD		 84};
85
ba224e2c
JD		 86/*
87 * Super-I/O registers and operations
88 */
89
90#define SIOREG_LDSEL 0x07 /* Logical device select */
91#define SIOREG_DEVID 0x20 /* Device ID */
4e7d99e1
JD		 92#define SIOREG_CF2 0x22 /* Configuration 2 */
93#define SIOREG_CF3 0x23 /* Configuration 3 */
94#define SIOREG_CF4 0x24 /* Configuration 4 */
328716bc 95#define SIOREG_CF5 0x25 /* Configuration 5 */
4e7d99e1 96#define SIOREG_CFB 0x2B /* Configuration B */
328716bc 97#define SIOREG_CFC 0x2C /* Configuration C */
4e7d99e1 98#define SIOREG_CFD 0x2D /* Configuration D */
ba224e2c
JD		 99#define SIOREG_ACT 0x30 /* Device activation */
100#define SIOREG_MAP 0x50 /* I/O or memory mapping */
101#define SIOREG_IOBASE 0x60 /* I/O base address */
102
103static const u8 logdev[2] = { 0x09, 0x14 };
104static const char *logdev_str[2] = { DRVNAME " FMC", DRVNAME " HMC" };
105#define LD_FAN 0
106#define LD_IN 1
107#define LD_TEMP 1
108
109static inline void superio_outb(int sioaddr, int reg, int val)
110{
111 outb(reg, sioaddr);
112 outb(val, sioaddr + 1);
113}
114
115static inline int superio_inb(int sioaddr, int reg)
116{
117 outb(reg, sioaddr);
118 return inb(sioaddr + 1);
119}
120
121static inline void superio_exit(int sioaddr)
122{
123 outb(0x02, sioaddr);
124 outb(0x02, sioaddr + 1);
125}
126
127/*
128 * Logical devices
129 */
130
131#define REGION_LENGTH 32
132#define PC87427_REG_BANK 0x0f
133#define BANK_FM(nr) (nr)
134#define BANK_FT(nr) (0x08 + (nr))
135#define BANK_FC(nr) (0x10 + (nr) * 2)
008e5f33
JD		 136#define BANK_TM(nr) (nr)
137#define BANK_VM(nr) (0x08 + (nr))
ba224e2c
JD		 138
139/*
140 * I/O access functions
141 */
142
143/* ldi is the logical device index */
144static inline int pc87427_read8(struct pc87427_data *data, u8 ldi, u8 reg)
145{
146 return inb(data->address[ldi] + reg);
147}
148
149/* Must be called with data->lock held, except during init */
150static inline int pc87427_read8_bank(struct pc87427_data *data, u8 ldi,
151 u8 bank, u8 reg)
152{
153 outb(bank, data->address[ldi] + PC87427_REG_BANK);
154 return inb(data->address[ldi] + reg);
155}
156
157/* Must be called with data->lock held, except during init */
158static inline void pc87427_write8_bank(struct pc87427_data *data, u8 ldi,
159 u8 bank, u8 reg, u8 value)
160{
161 outb(bank, data->address[ldi] + PC87427_REG_BANK);
162 outb(value, data->address[ldi] + reg);
163}
164
165/*
166 * Fan registers and conversions
167 */
168
169/* fan data registers are 16-bit wide */
170#define PC87427_REG_FAN 0x12
171#define PC87427_REG_FAN_MIN 0x14
172#define PC87427_REG_FAN_STATUS 0x10
173
174#define FAN_STATUS_STALL (1 << 3)
175#define FAN_STATUS_LOSPD (1 << 1)
176#define FAN_STATUS_MONEN (1 << 0)
177
36564efa
GR		 178/*
179 * Dedicated function to read all registers related to a given fan input.
180 * This saves us quite a few locks and bank selections.
181 * Must be called with data->lock held.
182 * nr is from 0 to 7
183 */
ba224e2c
JD		 184static void pc87427_readall_fan(struct pc87427_data *data, u8 nr)
185{
186 int iobase = data->address[LD_FAN];
187
188 outb(BANK_FM(nr), iobase + PC87427_REG_BANK);
189 data->fan[nr] = inw(iobase + PC87427_REG_FAN);
190 data->fan_min[nr] = inw(iobase + PC87427_REG_FAN_MIN);
191 data->fan_status[nr] = inb(iobase + PC87427_REG_FAN_STATUS);
192 /* Clear fan alarm bits */
193 outb(data->fan_status[nr], iobase + PC87427_REG_FAN_STATUS);
194}
195
36564efa
GR		 196/*
197 * The 2 LSB of fan speed registers are used for something different.
198 * The actual 2 LSB of the measurements are not available.
199 */
ba224e2c
JD		 200static inline unsigned long fan_from_reg(u16 reg)
201{
202 reg &= 0xfffc;
203 if (reg == 0x0000 || reg == 0xfffc)
204 return 0;
205 return 5400000UL / reg;
206}
207
208/* The 2 LSB of the fan speed limit registers are not significant. */
209static inline u16 fan_to_reg(unsigned long val)
210{
211 if (val < 83UL)
212 return 0xffff;
213 if (val >= 1350000UL)
214 return 0x0004;
215 return ((1350000UL + val / 2) / val) << 2;
216}
217
328716bc
JD		 218/*
219 * PWM registers and conversions
220 */
221
222#define PC87427_REG_PWM_ENABLE 0x10
223#define PC87427_REG_PWM_DUTY 0x12
224
225#define PWM_ENABLE_MODE_MASK (7 << 4)
226#define PWM_ENABLE_CTLEN (1 << 0)
227
228#define PWM_MODE_MANUAL (0 << 4)
229#define PWM_MODE_AUTO (1 << 4)
230#define PWM_MODE_OFF (2 << 4)
231#define PWM_MODE_ON (7 << 4)
232
36564efa
GR		 233/*
234 * Dedicated function to read all registers related to a given PWM output.
235 * This saves us quite a few locks and bank selections.
236 * Must be called with data->lock held.
237 * nr is from 0 to 3
238 */
328716bc
JD		 239static void pc87427_readall_pwm(struct pc87427_data *data, u8 nr)
240{
241 int iobase = data->address[LD_FAN];
242
243 outb(BANK_FC(nr), iobase + PC87427_REG_BANK);
244 data->pwm_enable[nr] = inb(iobase + PC87427_REG_PWM_ENABLE);
245 data->pwm[nr] = inb(iobase + PC87427_REG_PWM_DUTY);
246}
247
248static inline int pwm_enable_from_reg(u8 reg)
249{
250 switch (reg & PWM_ENABLE_MODE_MASK) {
251 case PWM_MODE_ON:
252 return 0;
253 case PWM_MODE_MANUAL:
254 case PWM_MODE_OFF:
255 return 1;
256 case PWM_MODE_AUTO:
257 return 2;
258 default:
259 return -EPROTO;
260 }
261}
262
263static inline u8 pwm_enable_to_reg(unsigned long val, u8 pwmval)
264{
265 switch (val) {
266 default:
267 return PWM_MODE_ON;
268 case 1:
269 return pwmval ? PWM_MODE_MANUAL : PWM_MODE_OFF;
270 case 2:
271 return PWM_MODE_AUTO;
272 }
273}
274
008e5f33
JD		 275/*
276 * Temperature registers and conversions
277 */
278
279#define PC87427_REG_TEMP_STATUS 0x10
280#define PC87427_REG_TEMP 0x14
281#define PC87427_REG_TEMP_MAX 0x18
282#define PC87427_REG_TEMP_MIN 0x19
283#define PC87427_REG_TEMP_CRIT 0x1a
284#define PC87427_REG_TEMP_TYPE 0x1d
285
286#define TEMP_STATUS_CHANEN (1 << 0)
287#define TEMP_STATUS_LOWFLG (1 << 1)
288#define TEMP_STATUS_HIGHFLG (1 << 2)
289#define TEMP_STATUS_CRITFLG (1 << 3)
290#define TEMP_STATUS_SENSERR (1 << 5)
291#define TEMP_TYPE_MASK (3 << 5)
292
293#define TEMP_TYPE_THERMISTOR (1 << 5)
294#define TEMP_TYPE_REMOTE_DIODE (2 << 5)
295#define TEMP_TYPE_LOCAL_DIODE (3 << 5)
296
36564efa
GR		 297/*
298 * Dedicated function to read all registers related to a given temperature
299 * input. This saves us quite a few locks and bank selections.
300 * Must be called with data->lock held.
301 * nr is from 0 to 5
302 */
008e5f33
JD		 303static void pc87427_readall_temp(struct pc87427_data *data, u8 nr)
304{
305 int iobase = data->address[LD_TEMP];
306
307 outb(BANK_TM(nr), iobase + PC87427_REG_BANK);
308 data->temp[nr] = le16_to_cpu(inw(iobase + PC87427_REG_TEMP));
309 data->temp_max[nr] = inb(iobase + PC87427_REG_TEMP_MAX);
310 data->temp_min[nr] = inb(iobase + PC87427_REG_TEMP_MIN);
311 data->temp_crit[nr] = inb(iobase + PC87427_REG_TEMP_CRIT);
312 data->temp_type[nr] = inb(iobase + PC87427_REG_TEMP_TYPE);
313 data->temp_status[nr] = inb(iobase + PC87427_REG_TEMP_STATUS);
314 /* Clear fan alarm bits */
315 outb(data->temp_status[nr], iobase + PC87427_REG_TEMP_STATUS);
316}
317
318static inline unsigned int temp_type_from_reg(u8 reg)
319{
320 switch (reg & TEMP_TYPE_MASK) {
321 case TEMP_TYPE_THERMISTOR:
322 return 4;
323 case TEMP_TYPE_REMOTE_DIODE:
324 case TEMP_TYPE_LOCAL_DIODE:
325 return 3;
326 default:
327 return 0;
328 }
329}
330
36564efa
GR		 331/*
332 * We assume 8-bit thermal sensors; 9-bit thermal sensors are possible
333 * too, but I have no idea how to figure out when they are used.
334 */
008e5f33
JD		 335static inline long temp_from_reg(s16 reg)
336{
337 return reg * 1000 / 256;
338}
339
340static inline long temp_from_reg8(s8 reg)
341{
342 return reg * 1000;
343}
344
ba224e2c
JD		 345/*
346 * Data interface
347 */
348
349static struct pc87427_data *pc87427_update_device(struct device *dev)
350{
351 struct pc87427_data *data = dev_get_drvdata(dev);
352 int i;
353
354 mutex_lock(&data->lock);
355 if (!time_after(jiffies, data->last_updated + HZ)
356 && data->last_updated)
357 goto done;
358
359 /* Fans */
360 for (i = 0; i < 8; i++) {
361 if (!(data->fan_enabled & (1 << i)))
362 continue;
363 pc87427_readall_fan(data, i);
364 }
328716bc
JD		 365
366 /* PWM outputs */
367 for (i = 0; i < 4; i++) {
368 if (!(data->pwm_enabled & (1 << i)))
369 continue;
370 pc87427_readall_pwm(data, i);
371 }
372
008e5f33
JD		 373 /* Temperature channels */
374 for (i = 0; i < 6; i++) {
375 if (!(data->temp_enabled & (1 << i)))
376 continue;
377 pc87427_readall_temp(data, i);
378 }
379
ba224e2c
JD		 380 data->last_updated = jiffies;
381
382done:
383 mutex_unlock(&data->lock);
384 return data;
385}
386
387static ssize_t show_fan_input(struct device *dev, struct device_attribute
388 *devattr, char *buf)
389{
ba224e2c 390 struct pc87427_data *data = pc87427_update_device(dev);
0d22d583 391 int nr = to_sensor_dev_attr(devattr)->index;
ba224e2c
JD		 392
393 return sprintf(buf, "%lu\n", fan_from_reg(data->fan[nr]));
394}
395
396static ssize_t show_fan_min(struct device *dev, struct device_attribute
397 *devattr, char *buf)
398{
ba224e2c 399 struct pc87427_data *data = pc87427_update_device(dev);
0d22d583 400 int nr = to_sensor_dev_attr(devattr)->index;
ba224e2c
JD		 401
402 return sprintf(buf, "%lu\n", fan_from_reg(data->fan_min[nr]));
403}
404
405static ssize_t show_fan_alarm(struct device *dev, struct device_attribute
406 *devattr, char *buf)
407{
ba224e2c 408 struct pc87427_data *data = pc87427_update_device(dev);
0d22d583 409 int nr = to_sensor_dev_attr(devattr)->index;
ba224e2c
JD		 410
411 return sprintf(buf, "%d\n", !!(data->fan_status[nr]
412 & FAN_STATUS_LOSPD));
413}
414
415static ssize_t show_fan_fault(struct device *dev, struct device_attribute
416 *devattr, char *buf)
417{
ba224e2c 418 struct pc87427_data *data = pc87427_update_device(dev);
0d22d583 419 int nr = to_sensor_dev_attr(devattr)->index;
ba224e2c
JD		 420
421 return sprintf(buf, "%d\n", !!(data->fan_status[nr]
422 & FAN_STATUS_STALL));
423}
424
425static ssize_t set_fan_min(struct device *dev, struct device_attribute
426 *devattr, const char *buf, size_t count)
427{
428 struct pc87427_data *data = dev_get_drvdata(dev);
0d22d583
JD		 429 int nr = to_sensor_dev_attr(devattr)->index;
430 unsigned long val;
ba224e2c
JD		 431 int iobase = data->address[LD_FAN];
432
179c4fdb 433 if (kstrtoul(buf, 10, &val) < 0)
0d22d583
JD		 434 return -EINVAL;
435
ba224e2c
JD		 436 mutex_lock(&data->lock);
437 outb(BANK_FM(nr), iobase + PC87427_REG_BANK);
36564efa
GR		 438 /*
439 * The low speed limit registers are read-only while monitoring
440 * is enabled, so we have to disable monitoring, then change the
441 * limit, and finally enable monitoring again.
442 */
ba224e2c
JD		 443 outb(0, iobase + PC87427_REG_FAN_STATUS);
444 data->fan_min[nr] = fan_to_reg(val);
445 outw(data->fan_min[nr], iobase + PC87427_REG_FAN_MIN);
446 outb(FAN_STATUS_MONEN, iobase + PC87427_REG_FAN_STATUS);
447 mutex_unlock(&data->lock);
448
449 return count;
450}
451
452static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan_input, NULL, 0);
453static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan_input, NULL, 1);
454static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan_input, NULL, 2);
455static SENSOR_DEVICE_ATTR(fan4_input, S_IRUGO, show_fan_input, NULL, 3);
456static SENSOR_DEVICE_ATTR(fan5_input, S_IRUGO, show_fan_input, NULL, 4);
457static SENSOR_DEVICE_ATTR(fan6_input, S_IRUGO, show_fan_input, NULL, 5);
458static SENSOR_DEVICE_ATTR(fan7_input, S_IRUGO, show_fan_input, NULL, 6);
459static SENSOR_DEVICE_ATTR(fan8_input, S_IRUGO, show_fan_input, NULL, 7);
460
461static SENSOR_DEVICE_ATTR(fan1_min, S_IWUSR | S_IRUGO,
462 show_fan_min, set_fan_min, 0);
463static SENSOR_DEVICE_ATTR(fan2_min, S_IWUSR | S_IRUGO,
464 show_fan_min, set_fan_min, 1);
465static SENSOR_DEVICE_ATTR(fan3_min, S_IWUSR | S_IRUGO,
466 show_fan_min, set_fan_min, 2);
467static SENSOR_DEVICE_ATTR(fan4_min, S_IWUSR | S_IRUGO,
468 show_fan_min, set_fan_min, 3);
469static SENSOR_DEVICE_ATTR(fan5_min, S_IWUSR | S_IRUGO,
470 show_fan_min, set_fan_min, 4);
471static SENSOR_DEVICE_ATTR(fan6_min, S_IWUSR | S_IRUGO,
472 show_fan_min, set_fan_min, 5);
473static SENSOR_DEVICE_ATTR(fan7_min, S_IWUSR | S_IRUGO,
474 show_fan_min, set_fan_min, 6);
475static SENSOR_DEVICE_ATTR(fan8_min, S_IWUSR | S_IRUGO,
476 show_fan_min, set_fan_min, 7);
477
478static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_fan_alarm, NULL, 0);
479static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_fan_alarm, NULL, 1);
480static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_fan_alarm, NULL, 2);
481static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_fan_alarm, NULL, 3);
482static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_fan_alarm, NULL, 4);
483static SENSOR_DEVICE_ATTR(fan6_alarm, S_IRUGO, show_fan_alarm, NULL, 5);
484static SENSOR_DEVICE_ATTR(fan7_alarm, S_IRUGO, show_fan_alarm, NULL, 6);
485static SENSOR_DEVICE_ATTR(fan8_alarm, S_IRUGO, show_fan_alarm, NULL, 7);
486
487static SENSOR_DEVICE_ATTR(fan1_fault, S_IRUGO, show_fan_fault, NULL, 0);
488static SENSOR_DEVICE_ATTR(fan2_fault, S_IRUGO, show_fan_fault, NULL, 1);
489static SENSOR_DEVICE_ATTR(fan3_fault, S_IRUGO, show_fan_fault, NULL, 2);
490static SENSOR_DEVICE_ATTR(fan4_fault, S_IRUGO, show_fan_fault, NULL, 3);
491static SENSOR_DEVICE_ATTR(fan5_fault, S_IRUGO, show_fan_fault, NULL, 4);
492static SENSOR_DEVICE_ATTR(fan6_fault, S_IRUGO, show_fan_fault, NULL, 5);
493static SENSOR_DEVICE_ATTR(fan7_fault, S_IRUGO, show_fan_fault, NULL, 6);
494static SENSOR_DEVICE_ATTR(fan8_fault, S_IRUGO, show_fan_fault, NULL, 7);
495
496static struct attribute *pc87427_attributes_fan[8][5] = {
497 {
498 &sensor_dev_attr_fan1_input.dev_attr.attr,
499 &sensor_dev_attr_fan1_min.dev_attr.attr,
500 &sensor_dev_attr_fan1_alarm.dev_attr.attr,
501 &sensor_dev_attr_fan1_fault.dev_attr.attr,
502 NULL
503 }, {
504 &sensor_dev_attr_fan2_input.dev_attr.attr,
505 &sensor_dev_attr_fan2_min.dev_attr.attr,
506 &sensor_dev_attr_fan2_alarm.dev_attr.attr,
507 &sensor_dev_attr_fan2_fault.dev_attr.attr,
508 NULL
509 }, {
510 &sensor_dev_attr_fan3_input.dev_attr.attr,
511 &sensor_dev_attr_fan3_min.dev_attr.attr,
512 &sensor_dev_attr_fan3_alarm.dev_attr.attr,
513 &sensor_dev_attr_fan3_fault.dev_attr.attr,
514 NULL
515 }, {
516 &sensor_dev_attr_fan4_input.dev_attr.attr,
517 &sensor_dev_attr_fan4_min.dev_attr.attr,
518 &sensor_dev_attr_fan4_alarm.dev_attr.attr,
519 &sensor_dev_attr_fan4_fault.dev_attr.attr,
520 NULL
521 }, {
522 &sensor_dev_attr_fan5_input.dev_attr.attr,
523 &sensor_dev_attr_fan5_min.dev_attr.attr,
524 &sensor_dev_attr_fan5_alarm.dev_attr.attr,
525 &sensor_dev_attr_fan5_fault.dev_attr.attr,
526 NULL
527 }, {
528 &sensor_dev_attr_fan6_input.dev_attr.attr,
529 &sensor_dev_attr_fan6_min.dev_attr.attr,
530 &sensor_dev_attr_fan6_alarm.dev_attr.attr,
531 &sensor_dev_attr_fan6_fault.dev_attr.attr,
532 NULL
533 }, {
534 &sensor_dev_attr_fan7_input.dev_attr.attr,
535 &sensor_dev_attr_fan7_min.dev_attr.attr,
536 &sensor_dev_attr_fan7_alarm.dev_attr.attr,
537 &sensor_dev_attr_fan7_fault.dev_attr.attr,
538 NULL
539 }, {
540 &sensor_dev_attr_fan8_input.dev_attr.attr,
541 &sensor_dev_attr_fan8_min.dev_attr.attr,
542 &sensor_dev_attr_fan8_alarm.dev_attr.attr,
543 &sensor_dev_attr_fan8_fault.dev_attr.attr,
544 NULL
545 }
546};
547
548static const struct attribute_group pc87427_group_fan[8] = {
549 { .attrs = pc87427_attributes_fan[0] },
550 { .attrs = pc87427_attributes_fan[1] },
551 { .attrs = pc87427_attributes_fan[2] },
552 { .attrs = pc87427_attributes_fan[3] },
553 { .attrs = pc87427_attributes_fan[4] },
554 { .attrs = pc87427_attributes_fan[5] },
555 { .attrs = pc87427_attributes_fan[6] },
556 { .attrs = pc87427_attributes_fan[7] },
557};
558
36564efa
GR		 559/*
560 * Must be called with data->lock held and pc87427_readall_pwm() freshly
561 * called
562 */
328716bc
JD		 563static void update_pwm_enable(struct pc87427_data *data, int nr, u8 mode)
564{
565 int iobase = data->address[LD_FAN];
566 data->pwm_enable[nr] &= ~PWM_ENABLE_MODE_MASK;
567 data->pwm_enable[nr] |= mode;
568 outb(data->pwm_enable[nr], iobase + PC87427_REG_PWM_ENABLE);
569}
570
571static ssize_t show_pwm_enable(struct device *dev, struct device_attribute
572 *devattr, char *buf)
573{
574 struct pc87427_data *data = pc87427_update_device(dev);
575 int nr = to_sensor_dev_attr(devattr)->index;
576 int pwm_enable;
577
578 pwm_enable = pwm_enable_from_reg(data->pwm_enable[nr]);
579 if (pwm_enable < 0)
580 return pwm_enable;
581 return sprintf(buf, "%d\n", pwm_enable);
582}
583
584static ssize_t set_pwm_enable(struct device *dev, struct device_attribute
585 *devattr, const char *buf, size_t count)
586{
587 struct pc87427_data *data = dev_get_drvdata(dev);
588 int nr = to_sensor_dev_attr(devattr)->index;
589 unsigned long val;
590
179c4fdb 591 if (kstrtoul(buf, 10, &val) < 0 || val > 2)
328716bc
JD		 592 return -EINVAL;
593 /* Can't go to automatic mode if it isn't configured */
594 if (val == 2 && !(data->pwm_auto_ok & (1 << nr)))
595 return -EINVAL;
596
597 mutex_lock(&data->lock);
598 pc87427_readall_pwm(data, nr);
599 update_pwm_enable(data, nr, pwm_enable_to_reg(val, data->pwm[nr]));
600 mutex_unlock(&data->lock);
601
602 return count;
603}
604
605static ssize_t show_pwm(struct device *dev, struct device_attribute
606 *devattr, char *buf)
607{
608 struct pc87427_data *data = pc87427_update_device(dev);
609 int nr = to_sensor_dev_attr(devattr)->index;
610
611 return sprintf(buf, "%d\n", (int)data->pwm[nr]);
612}
613
614static ssize_t set_pwm(struct device *dev, struct device_attribute
615 *devattr, const char *buf, size_t count)
616{
617 struct pc87427_data *data = dev_get_drvdata(dev);
618 int nr = to_sensor_dev_attr(devattr)->index;
619 unsigned long val;
620 int iobase = data->address[LD_FAN];
621 u8 mode;
622
179c4fdb 623 if (kstrtoul(buf, 10, &val) < 0 || val > 0xff)
328716bc
JD		 624 return -EINVAL;
625
626 mutex_lock(&data->lock);
627 pc87427_readall_pwm(data, nr);
628 mode = data->pwm_enable[nr] & PWM_ENABLE_MODE_MASK;
629 if (mode != PWM_MODE_MANUAL && mode != PWM_MODE_OFF) {
b55f3757
GR		 630 dev_notice(dev,
631 "Can't set PWM%d duty cycle while not in manual mode\n",
632 nr + 1);
328716bc
JD		 633 mutex_unlock(&data->lock);
634 return -EPERM;
635 }
636
637 /* We may have to change the mode */
638 if (mode == PWM_MODE_MANUAL && val == 0) {
639 /* Transition from Manual to Off */
640 update_pwm_enable(data, nr, PWM_MODE_OFF);
641 mode = PWM_MODE_OFF;
642 dev_dbg(dev, "Switching PWM%d from %s to %s\n", nr + 1,
643 "manual", "off");
644 } else if (mode == PWM_MODE_OFF && val != 0) {
645 /* Transition from Off to Manual */
646 update_pwm_enable(data, nr, PWM_MODE_MANUAL);
647 mode = PWM_MODE_MANUAL;
648 dev_dbg(dev, "Switching PWM%d from %s to %s\n", nr + 1,
649 "off", "manual");
650 }
651
652 data->pwm[nr] = val;
653 if (mode == PWM_MODE_MANUAL)
654 outb(val, iobase + PC87427_REG_PWM_DUTY);
655 mutex_unlock(&data->lock);
656
657 return count;
658}
659
660static SENSOR_DEVICE_ATTR(pwm1_enable, S_IWUSR | S_IRUGO,
661 show_pwm_enable, set_pwm_enable, 0);
662static SENSOR_DEVICE_ATTR(pwm2_enable, S_IWUSR | S_IRUGO,
663 show_pwm_enable, set_pwm_enable, 1);
664static SENSOR_DEVICE_ATTR(pwm3_enable, S_IWUSR | S_IRUGO,
665 show_pwm_enable, set_pwm_enable, 2);
666static SENSOR_DEVICE_ATTR(pwm4_enable, S_IWUSR | S_IRUGO,
667 show_pwm_enable, set_pwm_enable, 3);
668
669static SENSOR_DEVICE_ATTR(pwm1, S_IWUSR | S_IRUGO, show_pwm, set_pwm, 0);
670static SENSOR_DEVICE_ATTR(pwm2, S_IWUSR | S_IRUGO, show_pwm, set_pwm, 1);
671static SENSOR_DEVICE_ATTR(pwm3, S_IWUSR | S_IRUGO, show_pwm, set_pwm, 2);
672static SENSOR_DEVICE_ATTR(pwm4, S_IWUSR | S_IRUGO, show_pwm, set_pwm, 3);
673
674static struct attribute *pc87427_attributes_pwm[4][3] = {
675 {
676 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
677 &sensor_dev_attr_pwm1.dev_attr.attr,
678 NULL
679 }, {
680 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
681 &sensor_dev_attr_pwm2.dev_attr.attr,
682 NULL
683 }, {
684 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
685 &sensor_dev_attr_pwm3.dev_attr.attr,
686 NULL
687 }, {
688 &sensor_dev_attr_pwm4_enable.dev_attr.attr,
689 &sensor_dev_attr_pwm4.dev_attr.attr,
690 NULL
691 }
692};
693
694static const struct attribute_group pc87427_group_pwm[4] = {
695 { .attrs = pc87427_attributes_pwm[0] },
696 { .attrs = pc87427_attributes_pwm[1] },
697 { .attrs = pc87427_attributes_pwm[2] },
698 { .attrs = pc87427_attributes_pwm[3] },
699};
700
008e5f33
JD		 701static ssize_t show_temp_input(struct device *dev, struct device_attribute
702 *devattr, char *buf)
703{
704 struct pc87427_data *data = pc87427_update_device(dev);
705 int nr = to_sensor_dev_attr(devattr)->index;
706
707 return sprintf(buf, "%ld\n", temp_from_reg(data->temp[nr]));
708}
709
710static ssize_t show_temp_min(struct device *dev, struct device_attribute
711 *devattr, char *buf)
712{
713 struct pc87427_data *data = pc87427_update_device(dev);
714 int nr = to_sensor_dev_attr(devattr)->index;
715
716 return sprintf(buf, "%ld\n", temp_from_reg8(data->temp_min[nr]));
717}
718
719static ssize_t show_temp_max(struct device *dev, struct device_attribute
720 *devattr, char *buf)
721{
722 struct pc87427_data *data = pc87427_update_device(dev);
723 int nr = to_sensor_dev_attr(devattr)->index;
724
725 return sprintf(buf, "%ld\n", temp_from_reg8(data->temp_max[nr]));
726}
727
728static ssize_t show_temp_crit(struct device *dev, struct device_attribute
729 *devattr, char *buf)
730{
731 struct pc87427_data *data = pc87427_update_device(dev);
732 int nr = to_sensor_dev_attr(devattr)->index;
733
734 return sprintf(buf, "%ld\n", temp_from_reg8(data->temp_crit[nr]));
735}
736
737static ssize_t show_temp_type(struct device *dev, struct device_attribute
738 *devattr, char *buf)
739{
740 struct pc87427_data *data = pc87427_update_device(dev);
741 int nr = to_sensor_dev_attr(devattr)->index;
742
743 return sprintf(buf, "%u\n", temp_type_from_reg(data->temp_type[nr]));
744}
745
746static ssize_t show_temp_min_alarm(struct device *dev, struct device_attribute
747 *devattr, char *buf)
748{
749 struct pc87427_data *data = pc87427_update_device(dev);
750 int nr = to_sensor_dev_attr(devattr)->index;
751
752 return sprintf(buf, "%d\n", !!(data->temp_status[nr]
753 & TEMP_STATUS_LOWFLG));
754}
755
756static ssize_t show_temp_max_alarm(struct device *dev, struct device_attribute
757 *devattr, char *buf)
758{
759 struct pc87427_data *data = pc87427_update_device(dev);
760 int nr = to_sensor_dev_attr(devattr)->index;
761
762 return sprintf(buf, "%d\n", !!(data->temp_status[nr]
763 & TEMP_STATUS_HIGHFLG));
764}
765
766static ssize_t show_temp_crit_alarm(struct device *dev, struct device_attribute
767 *devattr, char *buf)
768{
769 struct pc87427_data *data = pc87427_update_device(dev);
770 int nr = to_sensor_dev_attr(devattr)->index;
771
772 return sprintf(buf, "%d\n", !!(data->temp_status[nr]
773 & TEMP_STATUS_CRITFLG));
774}
775
776static ssize_t show_temp_fault(struct device *dev, struct device_attribute
777 *devattr, char *buf)
778{
779 struct pc87427_data *data = pc87427_update_device(dev);
780 int nr = to_sensor_dev_attr(devattr)->index;
781
782 return sprintf(buf, "%d\n", !!(data->temp_status[nr]
783 & TEMP_STATUS_SENSERR));
784}
785
786static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_temp_input, NULL, 0);
787static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO, show_temp_input, NULL, 1);
788static SENSOR_DEVICE_ATTR(temp3_input, S_IRUGO, show_temp_input, NULL, 2);
789static SENSOR_DEVICE_ATTR(temp4_input, S_IRUGO, show_temp_input, NULL, 3);
790static SENSOR_DEVICE_ATTR(temp5_input, S_IRUGO, show_temp_input, NULL, 4);
791static SENSOR_DEVICE_ATTR(temp6_input, S_IRUGO, show_temp_input, NULL, 5);
792
793static SENSOR_DEVICE_ATTR(temp1_min, S_IRUGO, show_temp_min, NULL, 0);
794static SENSOR_DEVICE_ATTR(temp2_min, S_IRUGO, show_temp_min, NULL, 1);
795static SENSOR_DEVICE_ATTR(temp3_min, S_IRUGO, show_temp_min, NULL, 2);
796static SENSOR_DEVICE_ATTR(temp4_min, S_IRUGO, show_temp_min, NULL, 3);
797static SENSOR_DEVICE_ATTR(temp5_min, S_IRUGO, show_temp_min, NULL, 4);
798static SENSOR_DEVICE_ATTR(temp6_min, S_IRUGO, show_temp_min, NULL, 5);
799
800static SENSOR_DEVICE_ATTR(temp1_max, S_IRUGO, show_temp_max, NULL, 0);
801static SENSOR_DEVICE_ATTR(temp2_max, S_IRUGO, show_temp_max, NULL, 1);
802static SENSOR_DEVICE_ATTR(temp3_max, S_IRUGO, show_temp_max, NULL, 2);
803static SENSOR_DEVICE_ATTR(temp4_max, S_IRUGO, show_temp_max, NULL, 3);
804static SENSOR_DEVICE_ATTR(temp5_max, S_IRUGO, show_temp_max, NULL, 4);
805static SENSOR_DEVICE_ATTR(temp6_max, S_IRUGO, show_temp_max, NULL, 5);
806
807static SENSOR_DEVICE_ATTR(temp1_crit, S_IRUGO, show_temp_crit, NULL, 0);
808static SENSOR_DEVICE_ATTR(temp2_crit, S_IRUGO, show_temp_crit, NULL, 1);
809static SENSOR_DEVICE_ATTR(temp3_crit, S_IRUGO, show_temp_crit, NULL, 2);
810static SENSOR_DEVICE_ATTR(temp4_crit, S_IRUGO, show_temp_crit, NULL, 3);
811static SENSOR_DEVICE_ATTR(temp5_crit, S_IRUGO, show_temp_crit, NULL, 4);
812static SENSOR_DEVICE_ATTR(temp6_crit, S_IRUGO, show_temp_crit, NULL, 5);
813
814static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO, show_temp_type, NULL, 0);
815static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO, show_temp_type, NULL, 1);
816static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO, show_temp_type, NULL, 2);
817static SENSOR_DEVICE_ATTR(temp4_type, S_IRUGO, show_temp_type, NULL, 3);
818static SENSOR_DEVICE_ATTR(temp5_type, S_IRUGO, show_temp_type, NULL, 4);
819static SENSOR_DEVICE_ATTR(temp6_type, S_IRUGO, show_temp_type, NULL, 5);
820
821static SENSOR_DEVICE_ATTR(temp1_min_alarm, S_IRUGO,
822 show_temp_min_alarm, NULL, 0);
823static SENSOR_DEVICE_ATTR(temp2_min_alarm, S_IRUGO,
824 show_temp_min_alarm, NULL, 1);
825static SENSOR_DEVICE_ATTR(temp3_min_alarm, S_IRUGO,
826 show_temp_min_alarm, NULL, 2);
827static SENSOR_DEVICE_ATTR(temp4_min_alarm, S_IRUGO,
828 show_temp_min_alarm, NULL, 3);
829static SENSOR_DEVICE_ATTR(temp5_min_alarm, S_IRUGO,
830 show_temp_min_alarm, NULL, 4);
831static SENSOR_DEVICE_ATTR(temp6_min_alarm, S_IRUGO,
832 show_temp_min_alarm, NULL, 5);
833
834static SENSOR_DEVICE_ATTR(temp1_max_alarm, S_IRUGO,
835 show_temp_max_alarm, NULL, 0);
836static SENSOR_DEVICE_ATTR(temp2_max_alarm, S_IRUGO,
837 show_temp_max_alarm, NULL, 1);
838static SENSOR_DEVICE_ATTR(temp3_max_alarm, S_IRUGO,
839 show_temp_max_alarm, NULL, 2);
840static SENSOR_DEVICE_ATTR(temp4_max_alarm, S_IRUGO,
841 show_temp_max_alarm, NULL, 3);
842static SENSOR_DEVICE_ATTR(temp5_max_alarm, S_IRUGO,
843 show_temp_max_alarm, NULL, 4);
844static SENSOR_DEVICE_ATTR(temp6_max_alarm, S_IRUGO,
845 show_temp_max_alarm, NULL, 5);
846
847static SENSOR_DEVICE_ATTR(temp1_crit_alarm, S_IRUGO,
848 show_temp_crit_alarm, NULL, 0);
849static SENSOR_DEVICE_ATTR(temp2_crit_alarm, S_IRUGO,
850 show_temp_crit_alarm, NULL, 1);
851static SENSOR_DEVICE_ATTR(temp3_crit_alarm, S_IRUGO,
852 show_temp_crit_alarm, NULL, 2);
853static SENSOR_DEVICE_ATTR(temp4_crit_alarm, S_IRUGO,
854 show_temp_crit_alarm, NULL, 3);
855static SENSOR_DEVICE_ATTR(temp5_crit_alarm, S_IRUGO,
856 show_temp_crit_alarm, NULL, 4);
857static SENSOR_DEVICE_ATTR(temp6_crit_alarm, S_IRUGO,
858 show_temp_crit_alarm, NULL, 5);
859
860static SENSOR_DEVICE_ATTR(temp1_fault, S_IRUGO, show_temp_fault, NULL, 0);
861static SENSOR_DEVICE_ATTR(temp2_fault, S_IRUGO, show_temp_fault, NULL, 1);
862static SENSOR_DEVICE_ATTR(temp3_fault, S_IRUGO, show_temp_fault, NULL, 2);
863static SENSOR_DEVICE_ATTR(temp4_fault, S_IRUGO, show_temp_fault, NULL, 3);
864static SENSOR_DEVICE_ATTR(temp5_fault, S_IRUGO, show_temp_fault, NULL, 4);
865static SENSOR_DEVICE_ATTR(temp6_fault, S_IRUGO, show_temp_fault, NULL, 5);
866
867static struct attribute *pc87427_attributes_temp[6][10] = {
868 {
869 &sensor_dev_attr_temp1_input.dev_attr.attr,
870 &sensor_dev_attr_temp1_min.dev_attr.attr,
871 &sensor_dev_attr_temp1_max.dev_attr.attr,
872 &sensor_dev_attr_temp1_crit.dev_attr.attr,
873 &sensor_dev_attr_temp1_type.dev_attr.attr,
874 &sensor_dev_attr_temp1_min_alarm.dev_attr.attr,
875 &sensor_dev_attr_temp1_max_alarm.dev_attr.attr,
876 &sensor_dev_attr_temp1_crit_alarm.dev_attr.attr,
877 &sensor_dev_attr_temp1_fault.dev_attr.attr,
878 NULL
879 }, {
880 &sensor_dev_attr_temp2_input.dev_attr.attr,
881 &sensor_dev_attr_temp2_min.dev_attr.attr,
882 &sensor_dev_attr_temp2_max.dev_attr.attr,
883 &sensor_dev_attr_temp2_crit.dev_attr.attr,
884 &sensor_dev_attr_temp2_type.dev_attr.attr,
885 &sensor_dev_attr_temp2_min_alarm.dev_attr.attr,
886 &sensor_dev_attr_temp2_max_alarm.dev_attr.attr,
887 &sensor_dev_attr_temp2_crit_alarm.dev_attr.attr,
888 &sensor_dev_attr_temp2_fault.dev_attr.attr,
889 NULL
890 }, {
891 &sensor_dev_attr_temp3_input.dev_attr.attr,
892 &sensor_dev_attr_temp3_min.dev_attr.attr,
893 &sensor_dev_attr_temp3_max.dev_attr.attr,
894 &sensor_dev_attr_temp3_crit.dev_attr.attr,
895 &sensor_dev_attr_temp3_type.dev_attr.attr,
896 &sensor_dev_attr_temp3_min_alarm.dev_attr.attr,
897 &sensor_dev_attr_temp3_max_alarm.dev_attr.attr,
898 &sensor_dev_attr_temp3_crit_alarm.dev_attr.attr,
899 &sensor_dev_attr_temp3_fault.dev_attr.attr,
900 NULL
901 }, {
902 &sensor_dev_attr_temp4_input.dev_attr.attr,
903 &sensor_dev_attr_temp4_min.dev_attr.attr,
904 &sensor_dev_attr_temp4_max.dev_attr.attr,
905 &sensor_dev_attr_temp4_crit.dev_attr.attr,
906 &sensor_dev_attr_temp4_type.dev_attr.attr,
907 &sensor_dev_attr_temp4_min_alarm.dev_attr.attr,
908 &sensor_dev_attr_temp4_max_alarm.dev_attr.attr,
909 &sensor_dev_attr_temp4_crit_alarm.dev_attr.attr,
910 &sensor_dev_attr_temp4_fault.dev_attr.attr,
911 NULL
912 }, {
913 &sensor_dev_attr_temp5_input.dev_attr.attr,
914 &sensor_dev_attr_temp5_min.dev_attr.attr,
915 &sensor_dev_attr_temp5_max.dev_attr.attr,
916 &sensor_dev_attr_temp5_crit.dev_attr.attr,
917 &sensor_dev_attr_temp5_type.dev_attr.attr,
918 &sensor_dev_attr_temp5_min_alarm.dev_attr.attr,
919 &sensor_dev_attr_temp5_max_alarm.dev_attr.attr,
920 &sensor_dev_attr_temp5_crit_alarm.dev_attr.attr,
921 &sensor_dev_attr_temp5_fault.dev_attr.attr,
922 NULL
923 }, {
924 &sensor_dev_attr_temp6_input.dev_attr.attr,
925 &sensor_dev_attr_temp6_min.dev_attr.attr,
926 &sensor_dev_attr_temp6_max.dev_attr.attr,
927 &sensor_dev_attr_temp6_crit.dev_attr.attr,
928 &sensor_dev_attr_temp6_type.dev_attr.attr,
929 &sensor_dev_attr_temp6_min_alarm.dev_attr.attr,
930 &sensor_dev_attr_temp6_max_alarm.dev_attr.attr,
931 &sensor_dev_attr_temp6_crit_alarm.dev_attr.attr,
932 &sensor_dev_attr_temp6_fault.dev_attr.attr,
933 NULL
934 }
935};
936
937static const struct attribute_group pc87427_group_temp[6] = {
938 { .attrs = pc87427_attributes_temp[0] },
939 { .attrs = pc87427_attributes_temp[1] },
940 { .attrs = pc87427_attributes_temp[2] },
941 { .attrs = pc87427_attributes_temp[3] },
942 { .attrs = pc87427_attributes_temp[4] },
943 { .attrs = pc87427_attributes_temp[5] },
944};
945
a81b67da 946static ssize_t name_show(struct device *dev, struct device_attribute
ba224e2c
JD		 947 *devattr, char *buf)
948{
949 struct pc87427_data *data = dev_get_drvdata(dev);
950
951 return sprintf(buf, "%s\n", data->name);
952}
a81b67da 953static DEVICE_ATTR_RO(name);
ba224e2c
JD		 954
955
956/*
957 * Device detection, attach and detach
958 */
959
6c931ae1 960static int pc87427_request_regions(struct platform_device *pdev,
9d32df19
JD		 961 int count)
962{
963 struct resource *res;
5e0c8769 964 int i;
9d32df19
JD		 965
966 for (i = 0; i < count; i++) {
967 res = platform_get_resource(pdev, IORESOURCE_IO, i);
968 if (!res) {
9d32df19 969 dev_err(&pdev->dev, "Missing resource #%d\n", i);
5e0c8769 970 return -ENOENT;
9d32df19 971 }
5e0c8769
GR		 972 if (!devm_request_region(&pdev->dev, res->start,
973 resource_size(res), DRVNAME)) {
9d32df19
JD		 974 dev_err(&pdev->dev,
975 "Failed to request region 0x%lx-0x%lx\n",
976 (unsigned long)res->start,
977 (unsigned long)res->end);
5e0c8769 978 return -EBUSY;
9d32df19
JD		 979 }
980 }
5e0c8769 981 return 0;
9d32df19
JD		 982}
983
6c931ae1 984static void pc87427_init_device(struct device *dev)
ba224e2c 985{
a8b3a3a5 986 struct pc87427_sio_data *sio_data = dev_get_platdata(dev);
ba224e2c
JD		 987 struct pc87427_data *data = dev_get_drvdata(dev);
988 int i;
989 u8 reg;
990
991 /* The FMC module should be ready */
992 reg = pc87427_read8(data, LD_FAN, PC87427_REG_BANK);
993 if (!(reg & 0x80))
008e5f33 994 dev_warn(dev, "%s module not ready!\n", "FMC");
ba224e2c
JD		 995
996 /* Check which fans are enabled */
997 for (i = 0; i < 8; i++) {
4e7d99e1
JD		 998 if (!(sio_data->has_fanin & (1 << i))) /* Not wired */
999 continue;
ba224e2c
JD		 1000 reg = pc87427_read8_bank(data, LD_FAN, BANK_FM(i),
1001 PC87427_REG_FAN_STATUS);
1002 if (reg & FAN_STATUS_MONEN)
1003 data->fan_enabled |= (1 << i);
1004 }
1005
1006 if (!data->fan_enabled) {
4e7d99e1
JD		 1007 dev_dbg(dev, "Enabling monitoring of all fans\n");
1008 for (i = 0; i < 8; i++) {
1009 if (!(sio_data->has_fanin & (1 << i))) /* Not wired */
1010 continue;
ba224e2c
JD		 1011 pc87427_write8_bank(data, LD_FAN, BANK_FM(i),
1012 PC87427_REG_FAN_STATUS,
1013 FAN_STATUS_MONEN);
4e7d99e1
JD		 1014 }
1015 data->fan_enabled = sio_data->has_fanin;
ba224e2c 1016 }
328716bc
JD		 1017
1018 /* Check which PWM outputs are enabled */
1019 for (i = 0; i < 4; i++) {
1020 if (!(sio_data->has_fanout & (1 << i))) /* Not wired */
1021 continue;
1022 reg = pc87427_read8_bank(data, LD_FAN, BANK_FC(i),
1023 PC87427_REG_PWM_ENABLE);
1024 if (reg & PWM_ENABLE_CTLEN)
1025 data->pwm_enabled |= (1 << i);
1026
36564efa
GR		 1027 /*
1028 * We don't expose an interface to reconfigure the automatic
1029 * fan control mode, so only allow to return to this mode if
1030 * it was originally set.
1031 */
328716bc
JD		 1032 if ((reg & PWM_ENABLE_MODE_MASK) == PWM_MODE_AUTO) {
1033 dev_dbg(dev, "PWM%d is in automatic control mode\n",
1034 i + 1);
1035 data->pwm_auto_ok |= (1 << i);
1036 }
1037 }
008e5f33
JD		 1038
1039 /* The HMC module should be ready */
1040 reg = pc87427_read8(data, LD_TEMP, PC87427_REG_BANK);
1041 if (!(reg & 0x80))
1042 dev_warn(dev, "%s module not ready!\n", "HMC");
1043
1044 /* Check which temperature channels are enabled */
1045 for (i = 0; i < 6; i++) {
1046 reg = pc87427_read8_bank(data, LD_TEMP, BANK_TM(i),
1047 PC87427_REG_TEMP_STATUS);
1048 if (reg & TEMP_STATUS_CHANEN)
1049 data->temp_enabled |= (1 << i);
1050 }
ba224e2c
JD		 1051}
1052
c6b87246
JD		 1053static void pc87427_remove_files(struct device *dev)
1054{
1055 struct pc87427_data *data = dev_get_drvdata(dev);
1056 int i;
1057
1058 device_remove_file(dev, &dev_attr_name);
1059 for (i = 0; i < 8; i++) {
1060 if (!(data->fan_enabled & (1 << i)))
1061 continue;
1062 sysfs_remove_group(&dev->kobj, &pc87427_group_fan[i]);
1063 }
1064 for (i = 0; i < 4; i++) {
1065 if (!(data->pwm_enabled & (1 << i)))
1066 continue;
1067 sysfs_remove_group(&dev->kobj, &pc87427_group_pwm[i]);
1068 }
1069 for (i = 0; i < 6; i++) {
1070 if (!(data->temp_enabled & (1 << i)))
1071 continue;
1072 sysfs_remove_group(&dev->kobj, &pc87427_group_temp[i]);
1073 }
1074}
1075
6c931ae1 1076static int pc87427_probe(struct platform_device *pdev)
ba224e2c 1077{
a8b3a3a5 1078 struct pc87427_sio_data *sio_data = dev_get_platdata(&pdev->dev);
ba224e2c 1079 struct pc87427_data *data;
9d32df19 1080 int i, err, res_count;
ba224e2c 1081
5e0c8769
GR		 1082 data = devm_kzalloc(&pdev->dev, sizeof(struct pc87427_data),
1083 GFP_KERNEL);
2f89b072 1084 if (!data)
5e0c8769 1085 return -ENOMEM;
ba224e2c 1086
9d32df19
JD		 1087 data->address[0] = sio_data->address[0];
1088 data->address[1] = sio_data->address[1];
1089 res_count = (data->address[0] != 0) + (data->address[1] != 0);
1090
1091 err = pc87427_request_regions(pdev, res_count);
1092 if (err)
5e0c8769 1093 return err;
ba224e2c
JD		 1094
1095 mutex_init(&data->lock);
1096 data->name = "pc87427";
1097 platform_set_drvdata(pdev, data);
1098 pc87427_init_device(&pdev->dev);
1099
1100 /* Register sysfs hooks */
0d22d583
JD		 1101 err = device_create_file(&pdev->dev, &dev_attr_name);
1102 if (err)
5e0c8769 1103 return err;
ba224e2c
JD		 1104 for (i = 0; i < 8; i++) {
1105 if (!(data->fan_enabled & (1 << i)))
1106 continue;
0d22d583
JD		 1107 err = sysfs_create_group(&pdev->dev.kobj,
1108 &pc87427_group_fan[i]);
1109 if (err)
ba224e2c
JD		 1110 goto exit_remove_files;
1111 }
328716bc
JD		 1112 for (i = 0; i < 4; i++) {
1113 if (!(data->pwm_enabled & (1 << i)))
1114 continue;
1115 err = sysfs_create_group(&pdev->dev.kobj,
1116 &pc87427_group_pwm[i]);
1117 if (err)
1118 goto exit_remove_files;
1119 }
008e5f33
JD		 1120 for (i = 0; i < 6; i++) {
1121 if (!(data->temp_enabled & (1 << i)))
1122 continue;
1123 err = sysfs_create_group(&pdev->dev.kobj,
1124 &pc87427_group_temp[i]);
1125 if (err)
1126 goto exit_remove_files;
1127 }
ba224e2c 1128
1beeffe4
TJ		 1129 data->hwmon_dev = hwmon_device_register(&pdev->dev);
1130 if (IS_ERR(data->hwmon_dev)) {
1131 err = PTR_ERR(data->hwmon_dev);
ba224e2c
JD		 1132 dev_err(&pdev->dev, "Class registration failed (%d)\n", err);
1133 goto exit_remove_files;
1134 }
1135
1136 return 0;
1137
1138exit_remove_files:
c6b87246 1139 pc87427_remove_files(&pdev->dev);
ba224e2c
JD		 1140 return err;
1141}
1142
281dfd0b 1143static int pc87427_remove(struct platform_device *pdev)
ba224e2c
JD		 1144{
1145 struct pc87427_data *data = platform_get_drvdata(pdev);
ba224e2c 1146
1beeffe4 1147 hwmon_device_unregister(data->hwmon_dev);
c6b87246 1148 pc87427_remove_files(&pdev->dev);
ce7ee4e8 1149
ba224e2c
JD		 1150 return 0;
1151}
1152
1153
1154static struct platform_driver pc87427_driver = {
1155 .driver = {
ba224e2c
JD		 1156 .name = DRVNAME,
1157 },
1158 .probe = pc87427_probe,
9e5e9b7a 1159 .remove = pc87427_remove,
ba224e2c
JD		 1160};
1161
9d32df19 1162static int __init pc87427_device_add(const struct pc87427_sio_data *sio_data)
ba224e2c 1163{
9d32df19
JD		 1164 struct resource res[2] = {
1165 { .flags = IORESOURCE_IO },
1166 { .flags = IORESOURCE_IO },
ba224e2c 1167 };
9d32df19 1168 int err, i, res_count;
ba224e2c 1169
9d32df19
JD		 1170 res_count = 0;
1171 for (i = 0; i < 2; i++) {
1172 if (!sio_data->address[i])
1173 continue;
1174 res[res_count].start = sio_data->address[i];
1175 res[res_count].end = sio_data->address[i] + REGION_LENGTH - 1;
1176 res[res_count].name = logdev_str[i];
b9acb64a 1177
9d32df19
JD		 1178 err = acpi_check_resource_conflict(&res[res_count]);
1179 if (err)
1180 goto exit;
1181
1182 res_count++;
1183 }
1184
1185 pdev = platform_device_alloc(DRVNAME, res[0].start);
ba224e2c
JD		 1186 if (!pdev) {
1187 err = -ENOMEM;
5e24e0c3 1188 pr_err("Device allocation failed\n");
ba224e2c
JD		 1189 goto exit;
1190 }
1191
9d32df19 1192 err = platform_device_add_resources(pdev, res, res_count);
ba224e2c 1193 if (err) {
5e24e0c3 1194 pr_err("Device resource addition failed (%d)\n", err);
ba224e2c
JD		 1195 goto exit_device_put;
1196 }
1197
4e7d99e1
JD		 1198 err = platform_device_add_data(pdev, sio_data,
1199 sizeof(struct pc87427_sio_data));
1200 if (err) {
5e24e0c3 1201 pr_err("Platform data allocation failed\n");
4e7d99e1
JD		 1202 goto exit_device_put;
1203 }
1204
ba224e2c
JD		 1205 err = platform_device_add(pdev);
1206 if (err) {
5e24e0c3 1207 pr_err("Device addition failed (%d)\n", err);
ba224e2c
JD		 1208 goto exit_device_put;
1209 }
1210
1211 return 0;
1212
1213exit_device_put:
1214 platform_device_put(pdev);
1215exit:
1216 return err;
1217}
1218
9d32df19 1219static int __init pc87427_find(int sioaddr, struct pc87427_sio_data *sio_data)
ba224e2c
JD		 1220{
1221 u16 val;
4e7d99e1 1222 u8 cfg, cfg_b;
ba224e2c
JD		 1223 int i, err = 0;
1224
1225 /* Identify device */
67b671bc 1226 val = force_id ? force_id : superio_inb(sioaddr, SIOREG_DEVID);
ba224e2c
JD		 1227 if (val != 0xf2) { /* PC87427 */
1228 err = -ENODEV;
1229 goto exit;
1230 }
1231
1232 for (i = 0; i < 2; i++) {
9d32df19 1233 sio_data->address[i] = 0;
ba224e2c
JD		 1234 /* Select logical device */
1235 superio_outb(sioaddr, SIOREG_LDSEL, logdev[i]);
1236
1237 val = superio_inb(sioaddr, SIOREG_ACT);
1238 if (!(val & 0x01)) {
5e24e0c3
JP		 1239 pr_info("Logical device 0x%02x not activated\n",
1240 logdev[i]);
ba224e2c
JD		 1241 continue;
1242 }
1243
1244 val = superio_inb(sioaddr, SIOREG_MAP);
1245 if (val & 0x01) {
b55f3757
GR		 1246 pr_warn("Logical device 0x%02x is memory-mapped, can't use\n",
1247 logdev[i]);
ba224e2c
JD		 1248 continue;
1249 }
1250
1251 val = (superio_inb(sioaddr, SIOREG_IOBASE) << 8)
1252 | superio_inb(sioaddr, SIOREG_IOBASE + 1);
1253 if (!val) {
b55f3757
GR		 1254 pr_info("I/O base address not set for logical device 0x%02x\n",
1255 logdev[i]);
ba224e2c
JD		 1256 continue;
1257 }
9d32df19
JD		 1258 sio_data->address[i] = val;
1259 }
1260
1261 /* No point in loading the driver if everything is disabled */
1262 if (!sio_data->address[0] && !sio_data->address[1]) {
1263 err = -ENODEV;
1264 goto exit;
ba224e2c
JD		 1265 }
1266
4e7d99e1
JD		 1267 /* Check which fan inputs are wired */
1268 sio_data->has_fanin = (1 << 2) | (1 << 3); /* FANIN2, FANIN3 */
1269
1270 cfg = superio_inb(sioaddr, SIOREG_CF2);
1271 if (!(cfg & (1 << 3)))
1272 sio_data->has_fanin |= (1 << 0); /* FANIN0 */
1273 if (!(cfg & (1 << 2)))
1274 sio_data->has_fanin |= (1 << 4); /* FANIN4 */
1275
1276 cfg = superio_inb(sioaddr, SIOREG_CFD);
1277 if (!(cfg & (1 << 0)))
1278 sio_data->has_fanin |= (1 << 1); /* FANIN1 */
1279
1280 cfg = superio_inb(sioaddr, SIOREG_CF4);
1281 if (!(cfg & (1 << 0)))
1282 sio_data->has_fanin |= (1 << 7); /* FANIN7 */
1283 cfg_b = superio_inb(sioaddr, SIOREG_CFB);
1284 if (!(cfg & (1 << 1)) && (cfg_b & (1 << 3)))
1285 sio_data->has_fanin |= (1 << 5); /* FANIN5 */
1286 cfg = superio_inb(sioaddr, SIOREG_CF3);
1287 if ((cfg & (1 << 3)) && !(cfg_b & (1 << 5)))
1288 sio_data->has_fanin |= (1 << 6); /* FANIN6 */
1289
328716bc
JD		 1290 /* Check which fan outputs are wired */
1291 sio_data->has_fanout = (1 << 0); /* FANOUT0 */
1292 if (cfg_b & (1 << 0))
1293 sio_data->has_fanout |= (1 << 3); /* FANOUT3 */
1294
1295 cfg = superio_inb(sioaddr, SIOREG_CFC);
1296 if (!(cfg & (1 << 4))) {
1297 if (cfg_b & (1 << 1))
1298 sio_data->has_fanout |= (1 << 1); /* FANOUT1 */
1299 if (cfg_b & (1 << 2))
1300 sio_data->has_fanout |= (1 << 2); /* FANOUT2 */
1301 }
1302
1303 /* FANOUT1 and FANOUT2 can each be routed to 2 different pins */
1304 cfg = superio_inb(sioaddr, SIOREG_CF5);
1305 if (cfg & (1 << 6))
1306 sio_data->has_fanout |= (1 << 1); /* FANOUT1 */
1307 if (cfg & (1 << 5))
1308 sio_data->has_fanout |= (1 << 2); /* FANOUT2 */
1309
ba224e2c
JD		 1310exit:
1311 superio_exit(sioaddr);
1312 return err;
1313}
1314
1315static int __init pc87427_init(void)
1316{
1317 int err;
4e7d99e1 1318 struct pc87427_sio_data sio_data;
ba224e2c 1319
9d32df19
JD		 1320 if (pc87427_find(0x2e, &sio_data)
1321 && pc87427_find(0x4e, &sio_data))
ba224e2c
JD		 1322 return -ENODEV;
1323
1324 err = platform_driver_register(&pc87427_driver);
1325 if (err)
1326 goto exit;
1327
1328 /* Sets global pdev as a side effect */
9d32df19 1329 err = pc87427_device_add(&sio_data);
ba224e2c
JD		 1330 if (err)
1331 goto exit_driver;
1332
1333 return 0;
1334
1335exit_driver:
1336 platform_driver_unregister(&pc87427_driver);
1337exit:
1338 return err;
1339}
1340
1341static void __exit pc87427_exit(void)
1342{
1343 platform_device_unregister(pdev);
1344 platform_driver_unregister(&pc87427_driver);
1345}
1346
7c81c60f 1347MODULE_AUTHOR("Jean Delvare <jdelvare@suse.de>");
ba224e2c
JD		 1348MODULE_DESCRIPTION("PC87427 hardware monitoring driver");
1349MODULE_LICENSE("GPL");
1350
1351module_init(pc87427_init);
1352module_exit(pc87427_exit);
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