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cff37c9e 1/* Texas Instruments TMP102 SMBus temperature sensor driver
beb1b6bb 2 *
cff37c9e 3 * Copyright (C) 2010 Steven King <sfking@fdwdc.com>
beb1b6bb
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4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
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14 */
15
3d8f7a89 16#include <linux/delay.h>
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17#include <linux/module.h>
18#include <linux/init.h>
19#include <linux/slab.h>
20#include <linux/i2c.h>
21#include <linux/hwmon.h>
22#include <linux/hwmon-sysfs.h>
23#include <linux/err.h>
24#include <linux/mutex.h>
cff37c9e 25#include <linux/device.h>
dcd8f392 26#include <linux/jiffies.h>
28a340db 27#include <linux/regmap.h>
6a027523 28#include <linux/of.h>
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29
30#define DRIVER_NAME "tmp102"
31
32#define TMP102_TEMP_REG 0x00
33#define TMP102_CONF_REG 0x01
34/* note: these bit definitions are byte swapped */
35#define TMP102_CONF_SD 0x0100
36#define TMP102_CONF_TM 0x0200
37#define TMP102_CONF_POL 0x0400
38#define TMP102_CONF_F0 0x0800
39#define TMP102_CONF_F1 0x1000
40#define TMP102_CONF_R0 0x2000
41#define TMP102_CONF_R1 0x4000
42#define TMP102_CONF_OS 0x8000
43#define TMP102_CONF_EM 0x0010
44#define TMP102_CONF_AL 0x0020
45#define TMP102_CONF_CR0 0x0040
46#define TMP102_CONF_CR1 0x0080
47#define TMP102_TLOW_REG 0x02
48#define TMP102_THIGH_REG 0x03
49
a9f92ccf
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50#define TMP102_CONFREG_MASK (TMP102_CONF_SD | TMP102_CONF_TM | \
51 TMP102_CONF_POL | TMP102_CONF_F0 | \
52 TMP102_CONF_F1 | TMP102_CONF_OS | \
53 TMP102_CONF_EM | TMP102_CONF_AL | \
54 TMP102_CONF_CR0 | TMP102_CONF_CR1)
55
56#define TMP102_CONFIG_CLEAR (TMP102_CONF_SD | TMP102_CONF_OS | \
57 TMP102_CONF_CR0)
58#define TMP102_CONFIG_SET (TMP102_CONF_TM | TMP102_CONF_EM | \
59 TMP102_CONF_CR1)
60
3d8f7a89
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61#define CONVERSION_TIME_MS 35 /* in milli-seconds */
62
beb1b6bb 63struct tmp102 {
28a340db 64 struct regmap *regmap;
38806bda 65 u16 config_orig;
3d8f7a89 66 unsigned long ready_time;
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67};
68
cff37c9e
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69/* convert left adjusted 13-bit TMP102 register value to milliCelsius */
70static inline int tmp102_reg_to_mC(s16 val)
beb1b6bb 71{
cff37c9e 72 return ((val & ~0x01) * 1000) / 128;
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73}
74
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75/* convert milliCelsius to left adjusted 13-bit TMP102 register value */
76static inline u16 tmp102_mC_to_reg(int val)
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77{
78 return (val * 128) / 1000;
79}
80
0208531d
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81static int tmp102_read(struct device *dev, enum hwmon_sensor_types type,
82 u32 attr, int channel, long *temp)
6a027523 83{
3d8f7a89 84 struct tmp102 *tmp102 = dev_get_drvdata(dev);
0208531d
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85 unsigned int regval;
86 int err, reg;
87
88 switch (attr) {
89 case hwmon_temp_input:
90 /* Is it too early to return a conversion ? */
91 if (time_before(jiffies, tmp102->ready_time)) {
92 dev_dbg(dev, "%s: Conversion not ready yet..\n", __func__);
93 return -EAGAIN;
94 }
95 reg = TMP102_TEMP_REG;
96 break;
97 case hwmon_temp_max_hyst:
98 reg = TMP102_TLOW_REG;
99 break;
100 case hwmon_temp_max:
101 reg = TMP102_THIGH_REG;
102 break;
103 default:
104 return -EOPNOTSUPP;
00917b5c
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105 }
106
0208531d
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107 err = regmap_read(tmp102->regmap, reg, &regval);
108 if (err < 0)
109 return err;
110 *temp = tmp102_reg_to_mC(regval);
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111
112 return 0;
113}
114
0208531d
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115static int tmp102_write(struct device *dev, enum hwmon_sensor_types type,
116 u32 attr, int channel, long temp)
beb1b6bb 117{
3d8f7a89 118 struct tmp102 *tmp102 = dev_get_drvdata(dev);
0208531d
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119 int reg;
120
121 switch (attr) {
122 case hwmon_temp_max_hyst:
123 reg = TMP102_TLOW_REG;
124 break;
125 case hwmon_temp_max:
126 reg = TMP102_THIGH_REG;
127 break;
128 default:
129 return -EOPNOTSUPP;
130 }
3d8f7a89 131
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132 temp = clamp_val(temp, -256000, 255000);
133 return regmap_write(tmp102->regmap, reg, tmp102_mC_to_reg(temp));
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134}
135
0208531d
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136static umode_t tmp102_is_visible(const void *data, enum hwmon_sensor_types type,
137 u32 attr, int channel)
beb1b6bb 138{
0208531d
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139 if (type != hwmon_temp)
140 return 0;
141
142 switch (attr) {
143 case hwmon_temp_input:
144 return S_IRUGO;
145 case hwmon_temp_max_hyst:
146 case hwmon_temp_max:
147 return S_IRUGO | S_IWUSR;
148 default:
149 return 0;
150 }
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151}
152
0208531d
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153static u32 tmp102_chip_config[] = {
154 HWMON_C_REGISTER_TZ,
155 0
156};
157
158static const struct hwmon_channel_info tmp102_chip = {
159 .type = hwmon_chip,
160 .config = tmp102_chip_config,
161};
beb1b6bb 162
0208531d
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163static u32 tmp102_temp_config[] = {
164 HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MAX_HYST,
165 0
166};
beb1b6bb 167
0208531d
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168static const struct hwmon_channel_info tmp102_temp = {
169 .type = hwmon_temp,
170 .config = tmp102_temp_config,
171};
beb1b6bb 172
0208531d
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173static const struct hwmon_channel_info *tmp102_info[] = {
174 &tmp102_chip,
175 &tmp102_temp,
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176 NULL
177};
beb1b6bb 178
0208531d
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179static const struct hwmon_ops tmp102_hwmon_ops = {
180 .is_visible = tmp102_is_visible,
181 .read = tmp102_read,
182 .write = tmp102_write,
183};
184
185static const struct hwmon_chip_info tmp102_chip_info = {
186 .ops = &tmp102_hwmon_ops,
187 .info = tmp102_info,
2251aef6
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188};
189
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190static void tmp102_restore_config(void *data)
191{
192 struct tmp102 *tmp102 = data;
b17ea1ca 193
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194 regmap_write(tmp102->regmap, TMP102_CONF_REG, tmp102->config_orig);
195}
196
197static bool tmp102_is_writeable_reg(struct device *dev, unsigned int reg)
198{
199 return reg != TMP102_TEMP_REG;
b17ea1ca
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200}
201
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202static bool tmp102_is_volatile_reg(struct device *dev, unsigned int reg)
203{
204 return reg == TMP102_TEMP_REG;
205}
206
207static const struct regmap_config tmp102_regmap_config = {
208 .reg_bits = 8,
209 .val_bits = 16,
210 .max_register = TMP102_THIGH_REG,
211 .writeable_reg = tmp102_is_writeable_reg,
212 .volatile_reg = tmp102_is_volatile_reg,
213 .val_format_endian = REGMAP_ENDIAN_BIG,
214 .cache_type = REGCACHE_RBTREE,
215 .use_single_rw = true,
216};
217
6c931ae1 218static int tmp102_probe(struct i2c_client *client,
0208531d 219 const struct i2c_device_id *id)
beb1b6bb 220{
fbd9af16 221 struct device *dev = &client->dev;
ad9beea4 222 struct device *hwmon_dev;
beb1b6bb 223 struct tmp102 *tmp102;
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224 unsigned int regval;
225 int err;
beb1b6bb 226
cff37c9e 227 if (!i2c_check_functionality(client->adapter,
beb1b6bb 228 I2C_FUNC_SMBUS_WORD_DATA)) {
fbd9af16 229 dev_err(dev,
b55f3757 230 "adapter doesn't support SMBus word transactions\n");
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231 return -ENODEV;
232 }
233
fbd9af16 234 tmp102 = devm_kzalloc(dev, sizeof(*tmp102), GFP_KERNEL);
f511a21f 235 if (!tmp102)
beb1b6bb 236 return -ENOMEM;
f511a21f 237
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238 i2c_set_clientdata(client, tmp102);
239
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240 tmp102->regmap = devm_regmap_init_i2c(client, &tmp102_regmap_config);
241 if (IS_ERR(tmp102->regmap))
242 return PTR_ERR(tmp102->regmap);
243
244 err = regmap_read(tmp102->regmap, TMP102_CONF_REG, &regval);
245 if (err < 0) {
fbd9af16 246 dev_err(dev, "error reading config register\n");
28a340db 247 return err;
38806bda 248 }
a9f92ccf 249
28a340db 250 if ((regval & ~TMP102_CONFREG_MASK) !=
a9f92ccf
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251 (TMP102_CONF_R0 | TMP102_CONF_R1)) {
252 dev_err(dev, "unexpected config register value\n");
253 return -ENODEV;
254 }
255
28a340db 256 tmp102->config_orig = regval;
b17ea1ca 257
1aa4f028
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258 err = devm_add_action_or_reset(dev, tmp102_restore_config, tmp102);
259 if (err)
260 return err;
b17ea1ca 261
28a340db
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262 regval &= ~TMP102_CONFIG_CLEAR;
263 regval |= TMP102_CONFIG_SET;
a9f92ccf 264
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265 err = regmap_write(tmp102->regmap, TMP102_CONF_REG, regval);
266 if (err < 0) {
fbd9af16 267 dev_err(dev, "error writing config register\n");
28a340db 268 return err;
cff37c9e 269 }
3d8f7a89 270
3d8f7a89
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271 tmp102->ready_time = jiffies;
272 if (tmp102->config_orig & TMP102_CONF_SD) {
273 /*
274 * Mark that we are not ready with data until the first
275 * conversion is complete
276 */
277 tmp102->ready_time += msecs_to_jiffies(CONVERSION_TIME_MS);
278 }
279
0208531d
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280 hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
281 tmp102,
282 &tmp102_chip_info,
283 NULL);
ad9beea4 284 if (IS_ERR(hwmon_dev)) {
fbd9af16 285 dev_dbg(dev, "unable to register hwmon device\n");
b17ea1ca 286 return PTR_ERR(hwmon_dev);
beb1b6bb 287 }
fbd9af16 288 dev_info(dev, "initialized\n");
beb1b6bb 289
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290 return 0;
291}
292
dd378b1b 293#ifdef CONFIG_PM_SLEEP
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294static int tmp102_suspend(struct device *dev)
295{
296 struct i2c_client *client = to_i2c_client(dev);
28a340db 297 struct tmp102 *tmp102 = i2c_get_clientdata(client);
beb1b6bb 298
28a340db
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299 return regmap_update_bits(tmp102->regmap, TMP102_CONF_REG,
300 TMP102_CONF_SD, TMP102_CONF_SD);
beb1b6bb
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301}
302
303static int tmp102_resume(struct device *dev)
304{
305 struct i2c_client *client = to_i2c_client(dev);
3d8f7a89 306 struct tmp102 *tmp102 = i2c_get_clientdata(client);
28a340db 307 int err;
beb1b6bb 308
28a340db
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309 err = regmap_update_bits(tmp102->regmap, TMP102_CONF_REG,
310 TMP102_CONF_SD, 0);
beb1b6bb 311
3d8f7a89
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312 tmp102->ready_time = jiffies + msecs_to_jiffies(CONVERSION_TIME_MS);
313
28a340db 314 return err;
beb1b6bb 315}
beb1b6bb
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316#endif /* CONFIG_PM */
317
dd378b1b
GS
318static SIMPLE_DEV_PM_OPS(tmp102_dev_pm_ops, tmp102_suspend, tmp102_resume);
319
beb1b6bb 320static const struct i2c_device_id tmp102_id[] = {
cff37c9e 321 { "tmp102", 0 },
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322 { }
323};
cff37c9e 324MODULE_DEVICE_TABLE(i2c, tmp102_id);
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325
326static struct i2c_driver tmp102_driver = {
327 .driver.name = DRIVER_NAME,
dd378b1b 328 .driver.pm = &tmp102_dev_pm_ops,
beb1b6bb 329 .probe = tmp102_probe,
beb1b6bb 330 .id_table = tmp102_id,
beb1b6bb
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331};
332
f0967eea 333module_i2c_driver(tmp102_driver);
beb1b6bb 334
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335MODULE_AUTHOR("Steven King <sfking@fdwdc.com>");
336MODULE_DESCRIPTION("Texas Instruments TMP102 temperature sensor driver");
337MODULE_LICENSE("GPL");