]>
Commit | Line | Data |
---|---|---|
ab2b79d5 HG |
1 | /* tmp401.c |
2 | * | |
3 | * Copyright (C) 2007,2008 Hans de Goede <hdegoede@redhat.com> | |
fce0758f AP |
4 | * Preliminary tmp411 support by: |
5 | * Gabriel Konat, Sander Leget, Wouter Willems | |
6 | * Copyright (C) 2009 Andre Prendel <andre.prendel@gmx.de> | |
ab2b79d5 | 7 | * |
29dd3b64 GR |
8 | * Cleanup and support for TMP431 and TMP432 by Guenter Roeck |
9 | * Copyright (c) 2013 Guenter Roeck <linux@roeck-us.net> | |
10 | * | |
ab2b79d5 HG |
11 | * This program is free software; you can redistribute it and/or modify |
12 | * it under the terms of the GNU General Public License as published by | |
13 | * the Free Software Foundation; either version 2 of the License, or | |
14 | * (at your option) any later version. | |
15 | * | |
16 | * This program is distributed in the hope that it will be useful, | |
17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | * GNU General Public License for more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License | |
22 | * along with this program; if not, write to the Free Software | |
23 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
24 | */ | |
25 | ||
26 | /* | |
27 | * Driver for the Texas Instruments TMP401 SMBUS temperature sensor IC. | |
28 | * | |
29 | * Note this IC is in some aspect similar to the LM90, but it has quite a | |
30 | * few differences too, for example the local temp has a higher resolution | |
31 | * and thus has 16 bits registers for its value and limit instead of 8 bits. | |
32 | */ | |
33 | ||
34 | #include <linux/module.h> | |
35 | #include <linux/init.h> | |
947e9271 | 36 | #include <linux/bitops.h> |
ab2b79d5 HG |
37 | #include <linux/slab.h> |
38 | #include <linux/jiffies.h> | |
39 | #include <linux/i2c.h> | |
40 | #include <linux/hwmon.h> | |
41 | #include <linux/hwmon-sysfs.h> | |
42 | #include <linux/err.h> | |
43 | #include <linux/mutex.h> | |
44 | #include <linux/sysfs.h> | |
45 | ||
46 | /* Addresses to scan */ | |
9aecac04 | 47 | static const unsigned short normal_i2c[] = { 0x48, 0x49, 0x4a, 0x4c, 0x4d, |
907a6d58 | 48 | 0x4e, 0x4f, I2C_CLIENT_END }; |
ab2b79d5 | 49 | |
c0a68601 | 50 | enum chips { tmp401, tmp411, tmp431, tmp432, tmp435, tmp461 }; |
ab2b79d5 HG |
51 | |
52 | /* | |
53 | * The TMP401 registers, note some registers have different addresses for | |
54 | * reading and writing | |
55 | */ | |
56 | #define TMP401_STATUS 0x02 | |
57 | #define TMP401_CONFIG_READ 0x03 | |
58 | #define TMP401_CONFIG_WRITE 0x09 | |
59 | #define TMP401_CONVERSION_RATE_READ 0x04 | |
60 | #define TMP401_CONVERSION_RATE_WRITE 0x0A | |
61 | #define TMP401_TEMP_CRIT_HYST 0x21 | |
ab2b79d5 HG |
62 | #define TMP401_MANUFACTURER_ID_REG 0xFE |
63 | #define TMP401_DEVICE_ID_REG 0xFF | |
64 | ||
c0a68601 | 65 | static const u8 TMP401_TEMP_MSB_READ[7][2] = { |
14f2a665 GR |
66 | { 0x00, 0x01 }, /* temp */ |
67 | { 0x06, 0x08 }, /* low limit */ | |
68 | { 0x05, 0x07 }, /* high limit */ | |
69 | { 0x20, 0x19 }, /* therm (crit) limit */ | |
70 | { 0x30, 0x34 }, /* lowest */ | |
71 | { 0x32, 0x36 }, /* highest */ | |
c0a68601 | 72 | { 0, 0x11 }, /* offset */ |
14f2a665 GR |
73 | }; |
74 | ||
c0a68601 | 75 | static const u8 TMP401_TEMP_MSB_WRITE[7][2] = { |
14f2a665 GR |
76 | { 0, 0 }, /* temp (unused) */ |
77 | { 0x0C, 0x0E }, /* low limit */ | |
78 | { 0x0B, 0x0D }, /* high limit */ | |
79 | { 0x20, 0x19 }, /* therm (crit) limit */ | |
80 | { 0x30, 0x34 }, /* lowest */ | |
81 | { 0x32, 0x36 }, /* highest */ | |
c0a68601 | 82 | { 0, 0x11 }, /* offset */ |
14f2a665 GR |
83 | }; |
84 | ||
29dd3b64 GR |
85 | static const u8 TMP432_TEMP_MSB_READ[4][3] = { |
86 | { 0x00, 0x01, 0x23 }, /* temp */ | |
87 | { 0x06, 0x08, 0x16 }, /* low limit */ | |
88 | { 0x05, 0x07, 0x15 }, /* high limit */ | |
89 | { 0x20, 0x19, 0x1A }, /* therm (crit) limit */ | |
90 | }; | |
91 | ||
92 | static const u8 TMP432_TEMP_MSB_WRITE[4][3] = { | |
93 | { 0, 0, 0 }, /* temp - unused */ | |
94 | { 0x0C, 0x0E, 0x16 }, /* low limit */ | |
95 | { 0x0B, 0x0D, 0x15 }, /* high limit */ | |
96 | { 0x20, 0x19, 0x1A }, /* therm (crit) limit */ | |
97 | }; | |
98 | ||
29dd3b64 GR |
99 | /* [0] = fault, [1] = low, [2] = high, [3] = therm/crit */ |
100 | static const u8 TMP432_STATUS_REG[] = { | |
101 | 0x1b, 0x36, 0x35, 0x37 }; | |
102 | ||
ab2b79d5 | 103 | /* Flags */ |
947e9271 GR |
104 | #define TMP401_CONFIG_RANGE BIT(2) |
105 | #define TMP401_CONFIG_SHUTDOWN BIT(6) | |
106 | #define TMP401_STATUS_LOCAL_CRIT BIT(0) | |
107 | #define TMP401_STATUS_REMOTE_CRIT BIT(1) | |
108 | #define TMP401_STATUS_REMOTE_OPEN BIT(2) | |
109 | #define TMP401_STATUS_REMOTE_LOW BIT(3) | |
110 | #define TMP401_STATUS_REMOTE_HIGH BIT(4) | |
111 | #define TMP401_STATUS_LOCAL_LOW BIT(5) | |
112 | #define TMP401_STATUS_LOCAL_HIGH BIT(6) | |
ab2b79d5 | 113 | |
29dd3b64 GR |
114 | /* On TMP432, each status has its own register */ |
115 | #define TMP432_STATUS_LOCAL BIT(0) | |
116 | #define TMP432_STATUS_REMOTE1 BIT(1) | |
117 | #define TMP432_STATUS_REMOTE2 BIT(2) | |
118 | ||
ab2b79d5 HG |
119 | /* Manufacturer / Device ID's */ |
120 | #define TMP401_MANUFACTURER_ID 0x55 | |
121 | #define TMP401_DEVICE_ID 0x11 | |
4ce5b1fe GR |
122 | #define TMP411A_DEVICE_ID 0x12 |
123 | #define TMP411B_DEVICE_ID 0x13 | |
124 | #define TMP411C_DEVICE_ID 0x10 | |
a1fac92b | 125 | #define TMP431_DEVICE_ID 0x31 |
29dd3b64 | 126 | #define TMP432_DEVICE_ID 0x32 |
06adbaec | 127 | #define TMP435_DEVICE_ID 0x35 |
ab2b79d5 | 128 | |
ab2b79d5 HG |
129 | /* |
130 | * Driver data (common to all clients) | |
131 | */ | |
132 | ||
133 | static const struct i2c_device_id tmp401_id[] = { | |
134 | { "tmp401", tmp401 }, | |
fce0758f | 135 | { "tmp411", tmp411 }, |
a1fac92b | 136 | { "tmp431", tmp431 }, |
29dd3b64 | 137 | { "tmp432", tmp432 }, |
06adbaec | 138 | { "tmp435", tmp435 }, |
c0a68601 | 139 | { "tmp461", tmp461 }, |
ab2b79d5 HG |
140 | { } |
141 | }; | |
142 | MODULE_DEVICE_TABLE(i2c, tmp401_id); | |
143 | ||
ab2b79d5 HG |
144 | /* |
145 | * Client data (each client gets its own) | |
146 | */ | |
147 | ||
148 | struct tmp401_data { | |
f3643ac7 GR |
149 | struct i2c_client *client; |
150 | const struct attribute_group *groups[3]; | |
ab2b79d5 HG |
151 | struct mutex update_lock; |
152 | char valid; /* zero until following fields are valid */ | |
153 | unsigned long last_updated; /* in jiffies */ | |
dc71afe5 | 154 | enum chips kind; |
ab2b79d5 | 155 | |
0846e30d GR |
156 | unsigned int update_interval; /* in milliseconds */ |
157 | ||
ab2b79d5 | 158 | /* register values */ |
29dd3b64 | 159 | u8 status[4]; |
ab2b79d5 | 160 | u8 config; |
c0a68601 | 161 | u16 temp[7][3]; |
ab2b79d5 HG |
162 | u8 temp_crit_hyst; |
163 | }; | |
164 | ||
165 | /* | |
166 | * Sysfs attr show / store functions | |
167 | */ | |
168 | ||
169 | static int tmp401_register_to_temp(u16 reg, u8 config) | |
170 | { | |
171 | int temp = reg; | |
172 | ||
173 | if (config & TMP401_CONFIG_RANGE) | |
174 | temp -= 64 * 256; | |
175 | ||
14f2a665 | 176 | return DIV_ROUND_CLOSEST(temp * 125, 32); |
ab2b79d5 HG |
177 | } |
178 | ||
14f2a665 | 179 | static u16 tmp401_temp_to_register(long temp, u8 config, int zbits) |
ab2b79d5 HG |
180 | { |
181 | if (config & TMP401_CONFIG_RANGE) { | |
2a844c14 | 182 | temp = clamp_val(temp, -64000, 191000); |
ab2b79d5 HG |
183 | temp += 64000; |
184 | } else | |
2a844c14 | 185 | temp = clamp_val(temp, 0, 127000); |
ab2b79d5 | 186 | |
14f2a665 | 187 | return DIV_ROUND_CLOSEST(temp * (1 << (8 - zbits)), 1000) << zbits; |
ab2b79d5 HG |
188 | } |
189 | ||
14f2a665 GR |
190 | static int tmp401_update_device_reg16(struct i2c_client *client, |
191 | struct tmp401_data *data) | |
ea63c2b9 | 192 | { |
14f2a665 GR |
193 | int i, j, val; |
194 | int num_regs = data->kind == tmp411 ? 6 : 4; | |
29dd3b64 | 195 | int num_sensors = data->kind == tmp432 ? 3 : 2; |
14f2a665 | 196 | |
29dd3b64 | 197 | for (i = 0; i < num_sensors; i++) { /* local / r1 / r2 */ |
14f2a665 | 198 | for (j = 0; j < num_regs; j++) { /* temp / low / ... */ |
29dd3b64 | 199 | u8 regaddr; |
24333ac2 | 200 | |
29dd3b64 GR |
201 | regaddr = data->kind == tmp432 ? |
202 | TMP432_TEMP_MSB_READ[j][i] : | |
203 | TMP401_TEMP_MSB_READ[j][i]; | |
24333ac2 JDW |
204 | if (j == 3) { /* crit is msb only */ |
205 | val = i2c_smbus_read_byte_data(client, regaddr); | |
206 | } else { | |
207 | val = i2c_smbus_read_word_swapped(client, | |
208 | regaddr); | |
209 | } | |
14f2a665 GR |
210 | if (val < 0) |
211 | return val; | |
24333ac2 JDW |
212 | |
213 | data->temp[j][i] = j == 3 ? val << 8 : val; | |
ea63c2b9 AP |
214 | } |
215 | } | |
14f2a665 | 216 | return 0; |
ea63c2b9 AP |
217 | } |
218 | ||
219 | static struct tmp401_data *tmp401_update_device(struct device *dev) | |
220 | { | |
f3643ac7 GR |
221 | struct tmp401_data *data = dev_get_drvdata(dev); |
222 | struct i2c_client *client = data->client; | |
14f2a665 | 223 | struct tmp401_data *ret = data; |
29dd3b64 | 224 | int i, val; |
0846e30d | 225 | unsigned long next_update; |
ea63c2b9 AP |
226 | |
227 | mutex_lock(&data->update_lock); | |
228 | ||
0846e30d | 229 | next_update = data->last_updated + |
4e2284d2 | 230 | msecs_to_jiffies(data->update_interval); |
0846e30d | 231 | if (time_after(jiffies, next_update) || !data->valid) { |
29dd3b64 GR |
232 | if (data->kind != tmp432) { |
233 | /* | |
234 | * The driver uses the TMP432 status format internally. | |
235 | * Convert status to TMP432 format for other chips. | |
236 | */ | |
237 | val = i2c_smbus_read_byte_data(client, TMP401_STATUS); | |
238 | if (val < 0) { | |
239 | ret = ERR_PTR(val); | |
240 | goto abort; | |
241 | } | |
242 | data->status[0] = | |
243 | (val & TMP401_STATUS_REMOTE_OPEN) >> 1; | |
244 | data->status[1] = | |
245 | ((val & TMP401_STATUS_REMOTE_LOW) >> 2) | | |
246 | ((val & TMP401_STATUS_LOCAL_LOW) >> 5); | |
247 | data->status[2] = | |
248 | ((val & TMP401_STATUS_REMOTE_HIGH) >> 3) | | |
249 | ((val & TMP401_STATUS_LOCAL_HIGH) >> 6); | |
250 | data->status[3] = val & (TMP401_STATUS_LOCAL_CRIT | |
251 | | TMP401_STATUS_REMOTE_CRIT); | |
252 | } else { | |
253 | for (i = 0; i < ARRAY_SIZE(data->status); i++) { | |
254 | val = i2c_smbus_read_byte_data(client, | |
255 | TMP432_STATUS_REG[i]); | |
256 | if (val < 0) { | |
257 | ret = ERR_PTR(val); | |
258 | goto abort; | |
259 | } | |
260 | data->status[i] = val; | |
261 | } | |
14f2a665 | 262 | } |
29dd3b64 | 263 | |
14f2a665 GR |
264 | val = i2c_smbus_read_byte_data(client, TMP401_CONFIG_READ); |
265 | if (val < 0) { | |
266 | ret = ERR_PTR(val); | |
267 | goto abort; | |
268 | } | |
269 | data->config = val; | |
270 | val = tmp401_update_device_reg16(client, data); | |
271 | if (val < 0) { | |
272 | ret = ERR_PTR(val); | |
273 | goto abort; | |
274 | } | |
275 | val = i2c_smbus_read_byte_data(client, TMP401_TEMP_CRIT_HYST); | |
276 | if (val < 0) { | |
277 | ret = ERR_PTR(val); | |
278 | goto abort; | |
279 | } | |
280 | data->temp_crit_hyst = val; | |
ea63c2b9 AP |
281 | |
282 | data->last_updated = jiffies; | |
283 | data->valid = 1; | |
284 | } | |
285 | ||
14f2a665 | 286 | abort: |
ea63c2b9 | 287 | mutex_unlock(&data->update_lock); |
14f2a665 | 288 | return ret; |
ab2b79d5 HG |
289 | } |
290 | ||
14f2a665 GR |
291 | static ssize_t show_temp(struct device *dev, |
292 | struct device_attribute *devattr, char *buf) | |
ab2b79d5 | 293 | { |
14f2a665 GR |
294 | int nr = to_sensor_dev_attr_2(devattr)->nr; |
295 | int index = to_sensor_dev_attr_2(devattr)->index; | |
ab2b79d5 HG |
296 | struct tmp401_data *data = tmp401_update_device(dev); |
297 | ||
14f2a665 GR |
298 | if (IS_ERR(data)) |
299 | return PTR_ERR(data); | |
ab2b79d5 HG |
300 | |
301 | return sprintf(buf, "%d\n", | |
14f2a665 | 302 | tmp401_register_to_temp(data->temp[nr][index], data->config)); |
ab2b79d5 HG |
303 | } |
304 | ||
305 | static ssize_t show_temp_crit_hyst(struct device *dev, | |
306 | struct device_attribute *devattr, char *buf) | |
307 | { | |
308 | int temp, index = to_sensor_dev_attr(devattr)->index; | |
309 | struct tmp401_data *data = tmp401_update_device(dev); | |
310 | ||
14f2a665 GR |
311 | if (IS_ERR(data)) |
312 | return PTR_ERR(data); | |
313 | ||
ab2b79d5 | 314 | mutex_lock(&data->update_lock); |
14f2a665 | 315 | temp = tmp401_register_to_temp(data->temp[3][index], data->config); |
ab2b79d5 HG |
316 | temp -= data->temp_crit_hyst * 1000; |
317 | mutex_unlock(&data->update_lock); | |
318 | ||
319 | return sprintf(buf, "%d\n", temp); | |
320 | } | |
321 | ||
322 | static ssize_t show_status(struct device *dev, | |
323 | struct device_attribute *devattr, char *buf) | |
324 | { | |
29dd3b64 GR |
325 | int nr = to_sensor_dev_attr_2(devattr)->nr; |
326 | int mask = to_sensor_dev_attr_2(devattr)->index; | |
ab2b79d5 HG |
327 | struct tmp401_data *data = tmp401_update_device(dev); |
328 | ||
14f2a665 GR |
329 | if (IS_ERR(data)) |
330 | return PTR_ERR(data); | |
ab2b79d5 | 331 | |
29dd3b64 | 332 | return sprintf(buf, "%d\n", !!(data->status[nr] & mask)); |
ab2b79d5 HG |
333 | } |
334 | ||
14f2a665 GR |
335 | static ssize_t store_temp(struct device *dev, struct device_attribute *devattr, |
336 | const char *buf, size_t count) | |
ab2b79d5 | 337 | { |
14f2a665 GR |
338 | int nr = to_sensor_dev_attr_2(devattr)->nr; |
339 | int index = to_sensor_dev_attr_2(devattr)->index; | |
f3643ac7 GR |
340 | struct tmp401_data *data = dev_get_drvdata(dev); |
341 | struct i2c_client *client = data->client; | |
ab2b79d5 HG |
342 | long val; |
343 | u16 reg; | |
29dd3b64 | 344 | u8 regaddr; |
ab2b79d5 | 345 | |
179c4fdb | 346 | if (kstrtol(buf, 10, &val)) |
ab2b79d5 HG |
347 | return -EINVAL; |
348 | ||
14f2a665 | 349 | reg = tmp401_temp_to_register(val, data->config, nr == 3 ? 8 : 4); |
ab2b79d5 HG |
350 | |
351 | mutex_lock(&data->update_lock); | |
352 | ||
29dd3b64 GR |
353 | regaddr = data->kind == tmp432 ? TMP432_TEMP_MSB_WRITE[nr][index] |
354 | : TMP401_TEMP_MSB_WRITE[nr][index]; | |
24333ac2 JDW |
355 | if (nr == 3) { /* crit is msb only */ |
356 | i2c_smbus_write_byte_data(client, regaddr, reg >> 8); | |
357 | } else { | |
358 | /* Hardware expects big endian data --> use _swapped */ | |
359 | i2c_smbus_write_word_swapped(client, regaddr, reg); | |
14f2a665 GR |
360 | } |
361 | data->temp[nr][index] = reg; | |
ab2b79d5 HG |
362 | |
363 | mutex_unlock(&data->update_lock); | |
364 | ||
365 | return count; | |
366 | } | |
367 | ||
368 | static ssize_t store_temp_crit_hyst(struct device *dev, struct device_attribute | |
369 | *devattr, const char *buf, size_t count) | |
370 | { | |
371 | int temp, index = to_sensor_dev_attr(devattr)->index; | |
372 | struct tmp401_data *data = tmp401_update_device(dev); | |
373 | long val; | |
374 | u8 reg; | |
375 | ||
14f2a665 GR |
376 | if (IS_ERR(data)) |
377 | return PTR_ERR(data); | |
378 | ||
179c4fdb | 379 | if (kstrtol(buf, 10, &val)) |
ab2b79d5 HG |
380 | return -EINVAL; |
381 | ||
382 | if (data->config & TMP401_CONFIG_RANGE) | |
2a844c14 | 383 | val = clamp_val(val, -64000, 191000); |
ab2b79d5 | 384 | else |
2a844c14 | 385 | val = clamp_val(val, 0, 127000); |
ab2b79d5 HG |
386 | |
387 | mutex_lock(&data->update_lock); | |
14f2a665 | 388 | temp = tmp401_register_to_temp(data->temp[3][index], data->config); |
2a844c14 | 389 | val = clamp_val(val, temp - 255000, temp); |
ab2b79d5 HG |
390 | reg = ((temp - val) + 500) / 1000; |
391 | ||
f3643ac7 | 392 | i2c_smbus_write_byte_data(data->client, TMP401_TEMP_CRIT_HYST, |
14f2a665 | 393 | reg); |
ab2b79d5 HG |
394 | |
395 | data->temp_crit_hyst = reg; | |
396 | ||
397 | mutex_unlock(&data->update_lock); | |
398 | ||
399 | return count; | |
400 | } | |
401 | ||
fce0758f AP |
402 | /* |
403 | * Resets the historical measurements of minimum and maximum temperatures. | |
404 | * This is done by writing any value to any of the minimum/maximum registers | |
405 | * (0x30-0x37). | |
406 | */ | |
407 | static ssize_t reset_temp_history(struct device *dev, | |
408 | struct device_attribute *devattr, const char *buf, size_t count) | |
409 | { | |
f3643ac7 GR |
410 | struct tmp401_data *data = dev_get_drvdata(dev); |
411 | struct i2c_client *client = data->client; | |
fce0758f AP |
412 | long val; |
413 | ||
179c4fdb | 414 | if (kstrtol(buf, 10, &val)) |
fce0758f AP |
415 | return -EINVAL; |
416 | ||
417 | if (val != 1) { | |
b55f3757 GR |
418 | dev_err(dev, |
419 | "temp_reset_history value %ld not supported. Use 1 to reset the history!\n", | |
420 | val); | |
fce0758f AP |
421 | return -EINVAL; |
422 | } | |
8eb6d90f GR |
423 | mutex_lock(&data->update_lock); |
424 | i2c_smbus_write_byte_data(client, TMP401_TEMP_MSB_WRITE[5][0], val); | |
425 | data->valid = 0; | |
426 | mutex_unlock(&data->update_lock); | |
fce0758f AP |
427 | |
428 | return count; | |
429 | } | |
430 | ||
5343aed1 | 431 | static ssize_t update_interval_show(struct device *dev, |
0846e30d GR |
432 | struct device_attribute *attr, char *buf) |
433 | { | |
f3643ac7 | 434 | struct tmp401_data *data = dev_get_drvdata(dev); |
0846e30d GR |
435 | |
436 | return sprintf(buf, "%u\n", data->update_interval); | |
437 | } | |
438 | ||
5343aed1 JL |
439 | static ssize_t update_interval_store(struct device *dev, |
440 | struct device_attribute *attr, | |
441 | const char *buf, size_t count) | |
0846e30d | 442 | { |
f3643ac7 GR |
443 | struct tmp401_data *data = dev_get_drvdata(dev); |
444 | struct i2c_client *client = data->client; | |
0846e30d GR |
445 | unsigned long val; |
446 | int err, rate; | |
447 | ||
448 | err = kstrtoul(buf, 10, &val); | |
449 | if (err) | |
450 | return err; | |
451 | ||
452 | /* | |
453 | * For valid rates, interval can be calculated as | |
454 | * interval = (1 << (7 - rate)) * 125; | |
455 | * Rounded rate is therefore | |
456 | * rate = 7 - __fls(interval * 4 / (125 * 3)); | |
457 | * Use clamp_val() to avoid overflows, and to ensure valid input | |
458 | * for __fls. | |
459 | */ | |
460 | val = clamp_val(val, 125, 16000); | |
461 | rate = 7 - __fls(val * 4 / (125 * 3)); | |
462 | mutex_lock(&data->update_lock); | |
463 | i2c_smbus_write_byte_data(client, TMP401_CONVERSION_RATE_WRITE, rate); | |
464 | data->update_interval = (1 << (7 - rate)) * 125; | |
465 | mutex_unlock(&data->update_lock); | |
466 | ||
467 | return count; | |
468 | } | |
469 | ||
14f2a665 GR |
470 | static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0); |
471 | static SENSOR_DEVICE_ATTR_2(temp1_min, S_IWUSR | S_IRUGO, show_temp, | |
472 | store_temp, 1, 0); | |
473 | static SENSOR_DEVICE_ATTR_2(temp1_max, S_IWUSR | S_IRUGO, show_temp, | |
474 | store_temp, 2, 0); | |
475 | static SENSOR_DEVICE_ATTR_2(temp1_crit, S_IWUSR | S_IRUGO, show_temp, | |
476 | store_temp, 3, 0); | |
b4e665c7 GR |
477 | static SENSOR_DEVICE_ATTR(temp1_crit_hyst, S_IWUSR | S_IRUGO, |
478 | show_temp_crit_hyst, store_temp_crit_hyst, 0); | |
29dd3b64 GR |
479 | static SENSOR_DEVICE_ATTR_2(temp1_min_alarm, S_IRUGO, show_status, NULL, |
480 | 1, TMP432_STATUS_LOCAL); | |
481 | static SENSOR_DEVICE_ATTR_2(temp1_max_alarm, S_IRUGO, show_status, NULL, | |
482 | 2, TMP432_STATUS_LOCAL); | |
483 | static SENSOR_DEVICE_ATTR_2(temp1_crit_alarm, S_IRUGO, show_status, NULL, | |
484 | 3, TMP432_STATUS_LOCAL); | |
14f2a665 GR |
485 | static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 1); |
486 | static SENSOR_DEVICE_ATTR_2(temp2_min, S_IWUSR | S_IRUGO, show_temp, | |
487 | store_temp, 1, 1); | |
488 | static SENSOR_DEVICE_ATTR_2(temp2_max, S_IWUSR | S_IRUGO, show_temp, | |
489 | store_temp, 2, 1); | |
490 | static SENSOR_DEVICE_ATTR_2(temp2_crit, S_IWUSR | S_IRUGO, show_temp, | |
491 | store_temp, 3, 1); | |
b4e665c7 GR |
492 | static SENSOR_DEVICE_ATTR(temp2_crit_hyst, S_IRUGO, show_temp_crit_hyst, |
493 | NULL, 1); | |
29dd3b64 GR |
494 | static SENSOR_DEVICE_ATTR_2(temp2_fault, S_IRUGO, show_status, NULL, |
495 | 0, TMP432_STATUS_REMOTE1); | |
496 | static SENSOR_DEVICE_ATTR_2(temp2_min_alarm, S_IRUGO, show_status, NULL, | |
497 | 1, TMP432_STATUS_REMOTE1); | |
498 | static SENSOR_DEVICE_ATTR_2(temp2_max_alarm, S_IRUGO, show_status, NULL, | |
499 | 2, TMP432_STATUS_REMOTE1); | |
500 | static SENSOR_DEVICE_ATTR_2(temp2_crit_alarm, S_IRUGO, show_status, NULL, | |
501 | 3, TMP432_STATUS_REMOTE1); | |
b4e665c7 | 502 | |
5343aed1 | 503 | static DEVICE_ATTR_RW(update_interval); |
0846e30d | 504 | |
b4e665c7 GR |
505 | static struct attribute *tmp401_attributes[] = { |
506 | &sensor_dev_attr_temp1_input.dev_attr.attr, | |
507 | &sensor_dev_attr_temp1_min.dev_attr.attr, | |
508 | &sensor_dev_attr_temp1_max.dev_attr.attr, | |
509 | &sensor_dev_attr_temp1_crit.dev_attr.attr, | |
510 | &sensor_dev_attr_temp1_crit_hyst.dev_attr.attr, | |
511 | &sensor_dev_attr_temp1_max_alarm.dev_attr.attr, | |
512 | &sensor_dev_attr_temp1_min_alarm.dev_attr.attr, | |
513 | &sensor_dev_attr_temp1_crit_alarm.dev_attr.attr, | |
514 | ||
515 | &sensor_dev_attr_temp2_input.dev_attr.attr, | |
516 | &sensor_dev_attr_temp2_min.dev_attr.attr, | |
517 | &sensor_dev_attr_temp2_max.dev_attr.attr, | |
518 | &sensor_dev_attr_temp2_crit.dev_attr.attr, | |
519 | &sensor_dev_attr_temp2_crit_hyst.dev_attr.attr, | |
520 | &sensor_dev_attr_temp2_fault.dev_attr.attr, | |
521 | &sensor_dev_attr_temp2_max_alarm.dev_attr.attr, | |
522 | &sensor_dev_attr_temp2_min_alarm.dev_attr.attr, | |
523 | &sensor_dev_attr_temp2_crit_alarm.dev_attr.attr, | |
524 | ||
0846e30d GR |
525 | &dev_attr_update_interval.attr, |
526 | ||
b4e665c7 GR |
527 | NULL |
528 | }; | |
529 | ||
530 | static const struct attribute_group tmp401_group = { | |
531 | .attrs = tmp401_attributes, | |
ab2b79d5 HG |
532 | }; |
533 | ||
fce0758f AP |
534 | /* |
535 | * Additional features of the TMP411 chip. | |
536 | * The TMP411 stores the minimum and maximum | |
537 | * temperature measured since power-on, chip-reset, or | |
538 | * minimum and maximum register reset for both the local | |
539 | * and remote channels. | |
540 | */ | |
14f2a665 GR |
541 | static SENSOR_DEVICE_ATTR_2(temp1_lowest, S_IRUGO, show_temp, NULL, 4, 0); |
542 | static SENSOR_DEVICE_ATTR_2(temp1_highest, S_IRUGO, show_temp, NULL, 5, 0); | |
543 | static SENSOR_DEVICE_ATTR_2(temp2_lowest, S_IRUGO, show_temp, NULL, 4, 1); | |
544 | static SENSOR_DEVICE_ATTR_2(temp2_highest, S_IRUGO, show_temp, NULL, 5, 1); | |
b4e665c7 GR |
545 | static SENSOR_DEVICE_ATTR(temp_reset_history, S_IWUSR, NULL, reset_temp_history, |
546 | 0); | |
547 | ||
548 | static struct attribute *tmp411_attributes[] = { | |
549 | &sensor_dev_attr_temp1_highest.dev_attr.attr, | |
550 | &sensor_dev_attr_temp1_lowest.dev_attr.attr, | |
551 | &sensor_dev_attr_temp2_highest.dev_attr.attr, | |
552 | &sensor_dev_attr_temp2_lowest.dev_attr.attr, | |
553 | &sensor_dev_attr_temp_reset_history.dev_attr.attr, | |
554 | NULL | |
555 | }; | |
556 | ||
557 | static const struct attribute_group tmp411_group = { | |
558 | .attrs = tmp411_attributes, | |
fce0758f AP |
559 | }; |
560 | ||
29dd3b64 GR |
561 | static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 2); |
562 | static SENSOR_DEVICE_ATTR_2(temp3_min, S_IWUSR | S_IRUGO, show_temp, | |
563 | store_temp, 1, 2); | |
564 | static SENSOR_DEVICE_ATTR_2(temp3_max, S_IWUSR | S_IRUGO, show_temp, | |
565 | store_temp, 2, 2); | |
566 | static SENSOR_DEVICE_ATTR_2(temp3_crit, S_IWUSR | S_IRUGO, show_temp, | |
567 | store_temp, 3, 2); | |
568 | static SENSOR_DEVICE_ATTR(temp3_crit_hyst, S_IRUGO, show_temp_crit_hyst, | |
569 | NULL, 2); | |
570 | static SENSOR_DEVICE_ATTR_2(temp3_fault, S_IRUGO, show_status, NULL, | |
571 | 0, TMP432_STATUS_REMOTE2); | |
572 | static SENSOR_DEVICE_ATTR_2(temp3_min_alarm, S_IRUGO, show_status, NULL, | |
573 | 1, TMP432_STATUS_REMOTE2); | |
574 | static SENSOR_DEVICE_ATTR_2(temp3_max_alarm, S_IRUGO, show_status, NULL, | |
575 | 2, TMP432_STATUS_REMOTE2); | |
576 | static SENSOR_DEVICE_ATTR_2(temp3_crit_alarm, S_IRUGO, show_status, NULL, | |
577 | 3, TMP432_STATUS_REMOTE2); | |
578 | ||
579 | static struct attribute *tmp432_attributes[] = { | |
580 | &sensor_dev_attr_temp3_input.dev_attr.attr, | |
581 | &sensor_dev_attr_temp3_min.dev_attr.attr, | |
582 | &sensor_dev_attr_temp3_max.dev_attr.attr, | |
583 | &sensor_dev_attr_temp3_crit.dev_attr.attr, | |
584 | &sensor_dev_attr_temp3_crit_hyst.dev_attr.attr, | |
585 | &sensor_dev_attr_temp3_fault.dev_attr.attr, | |
586 | &sensor_dev_attr_temp3_max_alarm.dev_attr.attr, | |
587 | &sensor_dev_attr_temp3_min_alarm.dev_attr.attr, | |
588 | &sensor_dev_attr_temp3_crit_alarm.dev_attr.attr, | |
589 | ||
590 | NULL | |
591 | }; | |
592 | ||
593 | static const struct attribute_group tmp432_group = { | |
594 | .attrs = tmp432_attributes, | |
595 | }; | |
596 | ||
c0a68601 AD |
597 | /* |
598 | * Additional features of the TMP461 chip. | |
599 | * The TMP461 temperature offset for the remote channel. | |
600 | */ | |
601 | static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IWUSR | S_IRUGO, show_temp, | |
602 | store_temp, 6, 1); | |
603 | ||
604 | static struct attribute *tmp461_attributes[] = { | |
605 | &sensor_dev_attr_temp2_offset.dev_attr.attr, | |
606 | NULL | |
607 | }; | |
608 | ||
609 | static const struct attribute_group tmp461_group = { | |
610 | .attrs = tmp461_attributes, | |
611 | }; | |
612 | ||
ab2b79d5 HG |
613 | /* |
614 | * Begin non sysfs callback code (aka Real code) | |
615 | */ | |
616 | ||
90652efe BG |
617 | static int tmp401_init_client(struct tmp401_data *data, |
618 | struct i2c_client *client) | |
ab2b79d5 | 619 | { |
90652efe | 620 | int config, config_orig, status = 0; |
ab2b79d5 HG |
621 | |
622 | /* Set the conversion rate to 2 Hz */ | |
623 | i2c_smbus_write_byte_data(client, TMP401_CONVERSION_RATE_WRITE, 5); | |
0846e30d | 624 | data->update_interval = 500; |
ab2b79d5 HG |
625 | |
626 | /* Start conversions (disable shutdown if necessary) */ | |
627 | config = i2c_smbus_read_byte_data(client, TMP401_CONFIG_READ); | |
90652efe BG |
628 | if (config < 0) |
629 | return config; | |
ab2b79d5 HG |
630 | |
631 | config_orig = config; | |
632 | config &= ~TMP401_CONFIG_SHUTDOWN; | |
633 | ||
634 | if (config != config_orig) | |
90652efe BG |
635 | status = i2c_smbus_write_byte_data(client, |
636 | TMP401_CONFIG_WRITE, | |
637 | config); | |
638 | ||
639 | return status; | |
ab2b79d5 HG |
640 | } |
641 | ||
310ec792 | 642 | static int tmp401_detect(struct i2c_client *client, |
ab2b79d5 HG |
643 | struct i2c_board_info *info) |
644 | { | |
dbe73c8f | 645 | enum chips kind; |
ab2b79d5 | 646 | struct i2c_adapter *adapter = client->adapter; |
dbe73c8f | 647 | u8 reg; |
ab2b79d5 HG |
648 | |
649 | if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) | |
650 | return -ENODEV; | |
651 | ||
652 | /* Detect and identify the chip */ | |
dbe73c8f JD |
653 | reg = i2c_smbus_read_byte_data(client, TMP401_MANUFACTURER_ID_REG); |
654 | if (reg != TMP401_MANUFACTURER_ID) | |
655 | return -ENODEV; | |
ab2b79d5 | 656 | |
dbe73c8f | 657 | reg = i2c_smbus_read_byte_data(client, TMP401_DEVICE_ID_REG); |
ab2b79d5 | 658 | |
dbe73c8f JD |
659 | switch (reg) { |
660 | case TMP401_DEVICE_ID: | |
a1fac92b GR |
661 | if (client->addr != 0x4c) |
662 | return -ENODEV; | |
dbe73c8f JD |
663 | kind = tmp401; |
664 | break; | |
4ce5b1fe GR |
665 | case TMP411A_DEVICE_ID: |
666 | if (client->addr != 0x4c) | |
667 | return -ENODEV; | |
668 | kind = tmp411; | |
669 | break; | |
670 | case TMP411B_DEVICE_ID: | |
671 | if (client->addr != 0x4d) | |
672 | return -ENODEV; | |
673 | kind = tmp411; | |
674 | break; | |
675 | case TMP411C_DEVICE_ID: | |
676 | if (client->addr != 0x4e) | |
677 | return -ENODEV; | |
dbe73c8f JD |
678 | kind = tmp411; |
679 | break; | |
a1fac92b | 680 | case TMP431_DEVICE_ID: |
907a6d58 | 681 | if (client->addr != 0x4c && client->addr != 0x4d) |
a1fac92b GR |
682 | return -ENODEV; |
683 | kind = tmp431; | |
684 | break; | |
29dd3b64 | 685 | case TMP432_DEVICE_ID: |
907a6d58 | 686 | if (client->addr != 0x4c && client->addr != 0x4d) |
29dd3b64 GR |
687 | return -ENODEV; |
688 | kind = tmp432; | |
689 | break; | |
06adbaec | 690 | case TMP435_DEVICE_ID: |
06adbaec PT |
691 | kind = tmp435; |
692 | break; | |
dbe73c8f JD |
693 | default: |
694 | return -ENODEV; | |
ab2b79d5 | 695 | } |
dbe73c8f JD |
696 | |
697 | reg = i2c_smbus_read_byte_data(client, TMP401_CONFIG_READ); | |
698 | if (reg & 0x1b) | |
699 | return -ENODEV; | |
700 | ||
701 | reg = i2c_smbus_read_byte_data(client, TMP401_CONVERSION_RATE_READ); | |
702 | /* Datasheet says: 0x1-0x6 */ | |
703 | if (reg > 15) | |
704 | return -ENODEV; | |
705 | ||
dc71afe5 | 706 | strlcpy(info->type, tmp401_id[kind].name, I2C_NAME_SIZE); |
ab2b79d5 HG |
707 | |
708 | return 0; | |
709 | } | |
710 | ||
711 | static int tmp401_probe(struct i2c_client *client, | |
712 | const struct i2c_device_id *id) | |
713 | { | |
06adbaec | 714 | static const char * const names[] = { |
c0a68601 | 715 | "TMP401", "TMP411", "TMP431", "TMP432", "TMP435", "TMP461" |
06adbaec | 716 | }; |
b4e665c7 | 717 | struct device *dev = &client->dev; |
f3643ac7 | 718 | struct device *hwmon_dev; |
ab2b79d5 | 719 | struct tmp401_data *data; |
90652efe | 720 | int groups = 0, status; |
ab2b79d5 | 721 | |
b4e665c7 | 722 | data = devm_kzalloc(dev, sizeof(struct tmp401_data), GFP_KERNEL); |
ab2b79d5 HG |
723 | if (!data) |
724 | return -ENOMEM; | |
725 | ||
f3643ac7 | 726 | data->client = client; |
ab2b79d5 | 727 | mutex_init(&data->update_lock); |
fce0758f | 728 | data->kind = id->driver_data; |
ab2b79d5 HG |
729 | |
730 | /* Initialize the TMP401 chip */ | |
90652efe BG |
731 | status = tmp401_init_client(data, client); |
732 | if (status < 0) | |
733 | return status; | |
ab2b79d5 HG |
734 | |
735 | /* Register sysfs hooks */ | |
f3643ac7 | 736 | data->groups[groups++] = &tmp401_group; |
ab2b79d5 | 737 | |
a80581d0 | 738 | /* Register additional tmp411 sysfs hooks */ |
f3643ac7 GR |
739 | if (data->kind == tmp411) |
740 | data->groups[groups++] = &tmp411_group; | |
fce0758f | 741 | |
29dd3b64 | 742 | /* Register additional tmp432 sysfs hooks */ |
f3643ac7 GR |
743 | if (data->kind == tmp432) |
744 | data->groups[groups++] = &tmp432_group; | |
29dd3b64 | 745 | |
c0a68601 AD |
746 | if (data->kind == tmp461) |
747 | data->groups[groups++] = &tmp461_group; | |
748 | ||
f3643ac7 GR |
749 | hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name, |
750 | data, data->groups); | |
751 | if (IS_ERR(hwmon_dev)) | |
752 | return PTR_ERR(hwmon_dev); | |
ab2b79d5 | 753 | |
b4e665c7 | 754 | dev_info(dev, "Detected TI %s chip\n", names[data->kind]); |
ab2b79d5 HG |
755 | |
756 | return 0; | |
ab2b79d5 HG |
757 | } |
758 | ||
ea63c2b9 AP |
759 | static struct i2c_driver tmp401_driver = { |
760 | .class = I2C_CLASS_HWMON, | |
761 | .driver = { | |
762 | .name = "tmp401", | |
763 | }, | |
764 | .probe = tmp401_probe, | |
ea63c2b9 AP |
765 | .id_table = tmp401_id, |
766 | .detect = tmp401_detect, | |
767 | .address_list = normal_i2c, | |
768 | }; | |
ab2b79d5 | 769 | |
f0967eea | 770 | module_i2c_driver(tmp401_driver); |
ab2b79d5 HG |
771 | |
772 | MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>"); | |
773 | MODULE_DESCRIPTION("Texas Instruments TMP401 temperature sensor driver"); | |
774 | MODULE_LICENSE("GPL"); |