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ab2b79d5 HG |
1 | /* tmp401.c |
2 | * | |
3 | * Copyright (C) 2007,2008 Hans de Goede <hdegoede@redhat.com> | |
fce0758f AP |
4 | * Preliminary tmp411 support by: |
5 | * Gabriel Konat, Sander Leget, Wouter Willems | |
6 | * Copyright (C) 2009 Andre Prendel <andre.prendel@gmx.de> | |
ab2b79d5 | 7 | * |
29dd3b64 GR |
8 | * Cleanup and support for TMP431 and TMP432 by Guenter Roeck |
9 | * Copyright (c) 2013 Guenter Roeck <linux@roeck-us.net> | |
10 | * | |
ab2b79d5 HG |
11 | * This program is free software; you can redistribute it and/or modify |
12 | * it under the terms of the GNU General Public License as published by | |
13 | * the Free Software Foundation; either version 2 of the License, or | |
14 | * (at your option) any later version. | |
15 | * | |
16 | * This program is distributed in the hope that it will be useful, | |
17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | * GNU General Public License for more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License | |
22 | * along with this program; if not, write to the Free Software | |
23 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
24 | */ | |
25 | ||
26 | /* | |
27 | * Driver for the Texas Instruments TMP401 SMBUS temperature sensor IC. | |
28 | * | |
29 | * Note this IC is in some aspect similar to the LM90, but it has quite a | |
30 | * few differences too, for example the local temp has a higher resolution | |
31 | * and thus has 16 bits registers for its value and limit instead of 8 bits. | |
32 | */ | |
33 | ||
34 | #include <linux/module.h> | |
35 | #include <linux/init.h> | |
947e9271 | 36 | #include <linux/bitops.h> |
ab2b79d5 HG |
37 | #include <linux/slab.h> |
38 | #include <linux/jiffies.h> | |
39 | #include <linux/i2c.h> | |
40 | #include <linux/hwmon.h> | |
41 | #include <linux/hwmon-sysfs.h> | |
42 | #include <linux/err.h> | |
43 | #include <linux/mutex.h> | |
44 | #include <linux/sysfs.h> | |
45 | ||
46 | /* Addresses to scan */ | |
9aecac04 | 47 | static const unsigned short normal_i2c[] = { 0x48, 0x49, 0x4a, 0x4c, 0x4d, |
907a6d58 | 48 | 0x4e, 0x4f, I2C_CLIENT_END }; |
ab2b79d5 | 49 | |
c0a68601 | 50 | enum chips { tmp401, tmp411, tmp431, tmp432, tmp435, tmp461 }; |
ab2b79d5 HG |
51 | |
52 | /* | |
53 | * The TMP401 registers, note some registers have different addresses for | |
54 | * reading and writing | |
55 | */ | |
56 | #define TMP401_STATUS 0x02 | |
57 | #define TMP401_CONFIG_READ 0x03 | |
58 | #define TMP401_CONFIG_WRITE 0x09 | |
59 | #define TMP401_CONVERSION_RATE_READ 0x04 | |
60 | #define TMP401_CONVERSION_RATE_WRITE 0x0A | |
61 | #define TMP401_TEMP_CRIT_HYST 0x21 | |
ab2b79d5 HG |
62 | #define TMP401_MANUFACTURER_ID_REG 0xFE |
63 | #define TMP401_DEVICE_ID_REG 0xFF | |
64 | ||
c0a68601 | 65 | static const u8 TMP401_TEMP_MSB_READ[7][2] = { |
14f2a665 GR |
66 | { 0x00, 0x01 }, /* temp */ |
67 | { 0x06, 0x08 }, /* low limit */ | |
68 | { 0x05, 0x07 }, /* high limit */ | |
69 | { 0x20, 0x19 }, /* therm (crit) limit */ | |
70 | { 0x30, 0x34 }, /* lowest */ | |
71 | { 0x32, 0x36 }, /* highest */ | |
c0a68601 | 72 | { 0, 0x11 }, /* offset */ |
14f2a665 GR |
73 | }; |
74 | ||
c0a68601 | 75 | static const u8 TMP401_TEMP_MSB_WRITE[7][2] = { |
14f2a665 GR |
76 | { 0, 0 }, /* temp (unused) */ |
77 | { 0x0C, 0x0E }, /* low limit */ | |
78 | { 0x0B, 0x0D }, /* high limit */ | |
79 | { 0x20, 0x19 }, /* therm (crit) limit */ | |
80 | { 0x30, 0x34 }, /* lowest */ | |
81 | { 0x32, 0x36 }, /* highest */ | |
c0a68601 | 82 | { 0, 0x11 }, /* offset */ |
14f2a665 GR |
83 | }; |
84 | ||
c0a68601 | 85 | static const u8 TMP401_TEMP_LSB[7][2] = { |
14f2a665 GR |
86 | { 0x15, 0x10 }, /* temp */ |
87 | { 0x17, 0x14 }, /* low limit */ | |
88 | { 0x16, 0x13 }, /* high limit */ | |
89 | { 0, 0 }, /* therm (crit) limit (unused) */ | |
90 | { 0x31, 0x35 }, /* lowest */ | |
91 | { 0x33, 0x37 }, /* highest */ | |
c0a68601 | 92 | { 0, 0x12 }, /* offset */ |
14f2a665 | 93 | }; |
fce0758f | 94 | |
29dd3b64 GR |
95 | static const u8 TMP432_TEMP_MSB_READ[4][3] = { |
96 | { 0x00, 0x01, 0x23 }, /* temp */ | |
97 | { 0x06, 0x08, 0x16 }, /* low limit */ | |
98 | { 0x05, 0x07, 0x15 }, /* high limit */ | |
99 | { 0x20, 0x19, 0x1A }, /* therm (crit) limit */ | |
100 | }; | |
101 | ||
102 | static const u8 TMP432_TEMP_MSB_WRITE[4][3] = { | |
103 | { 0, 0, 0 }, /* temp - unused */ | |
104 | { 0x0C, 0x0E, 0x16 }, /* low limit */ | |
105 | { 0x0B, 0x0D, 0x15 }, /* high limit */ | |
106 | { 0x20, 0x19, 0x1A }, /* therm (crit) limit */ | |
107 | }; | |
108 | ||
109 | static const u8 TMP432_TEMP_LSB[3][3] = { | |
110 | { 0x29, 0x10, 0x24 }, /* temp */ | |
111 | { 0x3E, 0x14, 0x18 }, /* low limit */ | |
112 | { 0x3D, 0x13, 0x17 }, /* high limit */ | |
113 | }; | |
114 | ||
115 | /* [0] = fault, [1] = low, [2] = high, [3] = therm/crit */ | |
116 | static const u8 TMP432_STATUS_REG[] = { | |
117 | 0x1b, 0x36, 0x35, 0x37 }; | |
118 | ||
ab2b79d5 | 119 | /* Flags */ |
947e9271 GR |
120 | #define TMP401_CONFIG_RANGE BIT(2) |
121 | #define TMP401_CONFIG_SHUTDOWN BIT(6) | |
122 | #define TMP401_STATUS_LOCAL_CRIT BIT(0) | |
123 | #define TMP401_STATUS_REMOTE_CRIT BIT(1) | |
124 | #define TMP401_STATUS_REMOTE_OPEN BIT(2) | |
125 | #define TMP401_STATUS_REMOTE_LOW BIT(3) | |
126 | #define TMP401_STATUS_REMOTE_HIGH BIT(4) | |
127 | #define TMP401_STATUS_LOCAL_LOW BIT(5) | |
128 | #define TMP401_STATUS_LOCAL_HIGH BIT(6) | |
ab2b79d5 | 129 | |
29dd3b64 GR |
130 | /* On TMP432, each status has its own register */ |
131 | #define TMP432_STATUS_LOCAL BIT(0) | |
132 | #define TMP432_STATUS_REMOTE1 BIT(1) | |
133 | #define TMP432_STATUS_REMOTE2 BIT(2) | |
134 | ||
ab2b79d5 HG |
135 | /* Manufacturer / Device ID's */ |
136 | #define TMP401_MANUFACTURER_ID 0x55 | |
137 | #define TMP401_DEVICE_ID 0x11 | |
4ce5b1fe GR |
138 | #define TMP411A_DEVICE_ID 0x12 |
139 | #define TMP411B_DEVICE_ID 0x13 | |
140 | #define TMP411C_DEVICE_ID 0x10 | |
a1fac92b | 141 | #define TMP431_DEVICE_ID 0x31 |
29dd3b64 | 142 | #define TMP432_DEVICE_ID 0x32 |
06adbaec | 143 | #define TMP435_DEVICE_ID 0x35 |
ab2b79d5 | 144 | |
ab2b79d5 HG |
145 | /* |
146 | * Driver data (common to all clients) | |
147 | */ | |
148 | ||
149 | static const struct i2c_device_id tmp401_id[] = { | |
150 | { "tmp401", tmp401 }, | |
fce0758f | 151 | { "tmp411", tmp411 }, |
a1fac92b | 152 | { "tmp431", tmp431 }, |
29dd3b64 | 153 | { "tmp432", tmp432 }, |
06adbaec | 154 | { "tmp435", tmp435 }, |
c0a68601 | 155 | { "tmp461", tmp461 }, |
ab2b79d5 HG |
156 | { } |
157 | }; | |
158 | MODULE_DEVICE_TABLE(i2c, tmp401_id); | |
159 | ||
ab2b79d5 HG |
160 | /* |
161 | * Client data (each client gets its own) | |
162 | */ | |
163 | ||
164 | struct tmp401_data { | |
f3643ac7 GR |
165 | struct i2c_client *client; |
166 | const struct attribute_group *groups[3]; | |
ab2b79d5 HG |
167 | struct mutex update_lock; |
168 | char valid; /* zero until following fields are valid */ | |
169 | unsigned long last_updated; /* in jiffies */ | |
dc71afe5 | 170 | enum chips kind; |
ab2b79d5 | 171 | |
0846e30d GR |
172 | unsigned int update_interval; /* in milliseconds */ |
173 | ||
ab2b79d5 | 174 | /* register values */ |
29dd3b64 | 175 | u8 status[4]; |
ab2b79d5 | 176 | u8 config; |
c0a68601 | 177 | u16 temp[7][3]; |
ab2b79d5 HG |
178 | u8 temp_crit_hyst; |
179 | }; | |
180 | ||
181 | /* | |
182 | * Sysfs attr show / store functions | |
183 | */ | |
184 | ||
185 | static int tmp401_register_to_temp(u16 reg, u8 config) | |
186 | { | |
187 | int temp = reg; | |
188 | ||
189 | if (config & TMP401_CONFIG_RANGE) | |
190 | temp -= 64 * 256; | |
191 | ||
14f2a665 | 192 | return DIV_ROUND_CLOSEST(temp * 125, 32); |
ab2b79d5 HG |
193 | } |
194 | ||
14f2a665 | 195 | static u16 tmp401_temp_to_register(long temp, u8 config, int zbits) |
ab2b79d5 HG |
196 | { |
197 | if (config & TMP401_CONFIG_RANGE) { | |
2a844c14 | 198 | temp = clamp_val(temp, -64000, 191000); |
ab2b79d5 HG |
199 | temp += 64000; |
200 | } else | |
2a844c14 | 201 | temp = clamp_val(temp, 0, 127000); |
ab2b79d5 | 202 | |
14f2a665 | 203 | return DIV_ROUND_CLOSEST(temp * (1 << (8 - zbits)), 1000) << zbits; |
ab2b79d5 HG |
204 | } |
205 | ||
14f2a665 GR |
206 | static int tmp401_update_device_reg16(struct i2c_client *client, |
207 | struct tmp401_data *data) | |
ea63c2b9 | 208 | { |
14f2a665 GR |
209 | int i, j, val; |
210 | int num_regs = data->kind == tmp411 ? 6 : 4; | |
29dd3b64 | 211 | int num_sensors = data->kind == tmp432 ? 3 : 2; |
14f2a665 | 212 | |
29dd3b64 | 213 | for (i = 0; i < num_sensors; i++) { /* local / r1 / r2 */ |
14f2a665 | 214 | for (j = 0; j < num_regs; j++) { /* temp / low / ... */ |
29dd3b64 | 215 | u8 regaddr; |
14f2a665 GR |
216 | /* |
217 | * High byte must be read first immediately followed | |
218 | * by the low byte | |
219 | */ | |
29dd3b64 GR |
220 | regaddr = data->kind == tmp432 ? |
221 | TMP432_TEMP_MSB_READ[j][i] : | |
222 | TMP401_TEMP_MSB_READ[j][i]; | |
223 | val = i2c_smbus_read_byte_data(client, regaddr); | |
14f2a665 GR |
224 | if (val < 0) |
225 | return val; | |
226 | data->temp[j][i] = val << 8; | |
227 | if (j == 3) /* crit is msb only */ | |
228 | continue; | |
29dd3b64 GR |
229 | regaddr = data->kind == tmp432 ? TMP432_TEMP_LSB[j][i] |
230 | : TMP401_TEMP_LSB[j][i]; | |
231 | val = i2c_smbus_read_byte_data(client, regaddr); | |
14f2a665 GR |
232 | if (val < 0) |
233 | return val; | |
234 | data->temp[j][i] |= val; | |
ea63c2b9 AP |
235 | } |
236 | } | |
14f2a665 | 237 | return 0; |
ea63c2b9 AP |
238 | } |
239 | ||
240 | static struct tmp401_data *tmp401_update_device(struct device *dev) | |
241 | { | |
f3643ac7 GR |
242 | struct tmp401_data *data = dev_get_drvdata(dev); |
243 | struct i2c_client *client = data->client; | |
14f2a665 | 244 | struct tmp401_data *ret = data; |
29dd3b64 | 245 | int i, val; |
0846e30d | 246 | unsigned long next_update; |
ea63c2b9 AP |
247 | |
248 | mutex_lock(&data->update_lock); | |
249 | ||
0846e30d | 250 | next_update = data->last_updated + |
4e2284d2 | 251 | msecs_to_jiffies(data->update_interval); |
0846e30d | 252 | if (time_after(jiffies, next_update) || !data->valid) { |
29dd3b64 GR |
253 | if (data->kind != tmp432) { |
254 | /* | |
255 | * The driver uses the TMP432 status format internally. | |
256 | * Convert status to TMP432 format for other chips. | |
257 | */ | |
258 | val = i2c_smbus_read_byte_data(client, TMP401_STATUS); | |
259 | if (val < 0) { | |
260 | ret = ERR_PTR(val); | |
261 | goto abort; | |
262 | } | |
263 | data->status[0] = | |
264 | (val & TMP401_STATUS_REMOTE_OPEN) >> 1; | |
265 | data->status[1] = | |
266 | ((val & TMP401_STATUS_REMOTE_LOW) >> 2) | | |
267 | ((val & TMP401_STATUS_LOCAL_LOW) >> 5); | |
268 | data->status[2] = | |
269 | ((val & TMP401_STATUS_REMOTE_HIGH) >> 3) | | |
270 | ((val & TMP401_STATUS_LOCAL_HIGH) >> 6); | |
271 | data->status[3] = val & (TMP401_STATUS_LOCAL_CRIT | |
272 | | TMP401_STATUS_REMOTE_CRIT); | |
273 | } else { | |
274 | for (i = 0; i < ARRAY_SIZE(data->status); i++) { | |
275 | val = i2c_smbus_read_byte_data(client, | |
276 | TMP432_STATUS_REG[i]); | |
277 | if (val < 0) { | |
278 | ret = ERR_PTR(val); | |
279 | goto abort; | |
280 | } | |
281 | data->status[i] = val; | |
282 | } | |
14f2a665 | 283 | } |
29dd3b64 | 284 | |
14f2a665 GR |
285 | val = i2c_smbus_read_byte_data(client, TMP401_CONFIG_READ); |
286 | if (val < 0) { | |
287 | ret = ERR_PTR(val); | |
288 | goto abort; | |
289 | } | |
290 | data->config = val; | |
291 | val = tmp401_update_device_reg16(client, data); | |
292 | if (val < 0) { | |
293 | ret = ERR_PTR(val); | |
294 | goto abort; | |
295 | } | |
296 | val = i2c_smbus_read_byte_data(client, TMP401_TEMP_CRIT_HYST); | |
297 | if (val < 0) { | |
298 | ret = ERR_PTR(val); | |
299 | goto abort; | |
300 | } | |
301 | data->temp_crit_hyst = val; | |
ea63c2b9 AP |
302 | |
303 | data->last_updated = jiffies; | |
304 | data->valid = 1; | |
305 | } | |
306 | ||
14f2a665 | 307 | abort: |
ea63c2b9 | 308 | mutex_unlock(&data->update_lock); |
14f2a665 | 309 | return ret; |
ab2b79d5 HG |
310 | } |
311 | ||
14f2a665 GR |
312 | static ssize_t show_temp(struct device *dev, |
313 | struct device_attribute *devattr, char *buf) | |
ab2b79d5 | 314 | { |
14f2a665 GR |
315 | int nr = to_sensor_dev_attr_2(devattr)->nr; |
316 | int index = to_sensor_dev_attr_2(devattr)->index; | |
ab2b79d5 HG |
317 | struct tmp401_data *data = tmp401_update_device(dev); |
318 | ||
14f2a665 GR |
319 | if (IS_ERR(data)) |
320 | return PTR_ERR(data); | |
ab2b79d5 HG |
321 | |
322 | return sprintf(buf, "%d\n", | |
14f2a665 | 323 | tmp401_register_to_temp(data->temp[nr][index], data->config)); |
ab2b79d5 HG |
324 | } |
325 | ||
326 | static ssize_t show_temp_crit_hyst(struct device *dev, | |
327 | struct device_attribute *devattr, char *buf) | |
328 | { | |
329 | int temp, index = to_sensor_dev_attr(devattr)->index; | |
330 | struct tmp401_data *data = tmp401_update_device(dev); | |
331 | ||
14f2a665 GR |
332 | if (IS_ERR(data)) |
333 | return PTR_ERR(data); | |
334 | ||
ab2b79d5 | 335 | mutex_lock(&data->update_lock); |
14f2a665 | 336 | temp = tmp401_register_to_temp(data->temp[3][index], data->config); |
ab2b79d5 HG |
337 | temp -= data->temp_crit_hyst * 1000; |
338 | mutex_unlock(&data->update_lock); | |
339 | ||
340 | return sprintf(buf, "%d\n", temp); | |
341 | } | |
342 | ||
343 | static ssize_t show_status(struct device *dev, | |
344 | struct device_attribute *devattr, char *buf) | |
345 | { | |
29dd3b64 GR |
346 | int nr = to_sensor_dev_attr_2(devattr)->nr; |
347 | int mask = to_sensor_dev_attr_2(devattr)->index; | |
ab2b79d5 HG |
348 | struct tmp401_data *data = tmp401_update_device(dev); |
349 | ||
14f2a665 GR |
350 | if (IS_ERR(data)) |
351 | return PTR_ERR(data); | |
ab2b79d5 | 352 | |
29dd3b64 | 353 | return sprintf(buf, "%d\n", !!(data->status[nr] & mask)); |
ab2b79d5 HG |
354 | } |
355 | ||
14f2a665 GR |
356 | static ssize_t store_temp(struct device *dev, struct device_attribute *devattr, |
357 | const char *buf, size_t count) | |
ab2b79d5 | 358 | { |
14f2a665 GR |
359 | int nr = to_sensor_dev_attr_2(devattr)->nr; |
360 | int index = to_sensor_dev_attr_2(devattr)->index; | |
f3643ac7 GR |
361 | struct tmp401_data *data = dev_get_drvdata(dev); |
362 | struct i2c_client *client = data->client; | |
ab2b79d5 HG |
363 | long val; |
364 | u16 reg; | |
29dd3b64 | 365 | u8 regaddr; |
ab2b79d5 | 366 | |
179c4fdb | 367 | if (kstrtol(buf, 10, &val)) |
ab2b79d5 HG |
368 | return -EINVAL; |
369 | ||
14f2a665 | 370 | reg = tmp401_temp_to_register(val, data->config, nr == 3 ? 8 : 4); |
ab2b79d5 HG |
371 | |
372 | mutex_lock(&data->update_lock); | |
373 | ||
29dd3b64 GR |
374 | regaddr = data->kind == tmp432 ? TMP432_TEMP_MSB_WRITE[nr][index] |
375 | : TMP401_TEMP_MSB_WRITE[nr][index]; | |
376 | i2c_smbus_write_byte_data(client, regaddr, reg >> 8); | |
14f2a665 | 377 | if (nr != 3) { |
29dd3b64 GR |
378 | regaddr = data->kind == tmp432 ? TMP432_TEMP_LSB[nr][index] |
379 | : TMP401_TEMP_LSB[nr][index]; | |
380 | i2c_smbus_write_byte_data(client, regaddr, reg & 0xFF); | |
14f2a665 GR |
381 | } |
382 | data->temp[nr][index] = reg; | |
ab2b79d5 HG |
383 | |
384 | mutex_unlock(&data->update_lock); | |
385 | ||
386 | return count; | |
387 | } | |
388 | ||
389 | static ssize_t store_temp_crit_hyst(struct device *dev, struct device_attribute | |
390 | *devattr, const char *buf, size_t count) | |
391 | { | |
392 | int temp, index = to_sensor_dev_attr(devattr)->index; | |
393 | struct tmp401_data *data = tmp401_update_device(dev); | |
394 | long val; | |
395 | u8 reg; | |
396 | ||
14f2a665 GR |
397 | if (IS_ERR(data)) |
398 | return PTR_ERR(data); | |
399 | ||
179c4fdb | 400 | if (kstrtol(buf, 10, &val)) |
ab2b79d5 HG |
401 | return -EINVAL; |
402 | ||
403 | if (data->config & TMP401_CONFIG_RANGE) | |
2a844c14 | 404 | val = clamp_val(val, -64000, 191000); |
ab2b79d5 | 405 | else |
2a844c14 | 406 | val = clamp_val(val, 0, 127000); |
ab2b79d5 HG |
407 | |
408 | mutex_lock(&data->update_lock); | |
14f2a665 | 409 | temp = tmp401_register_to_temp(data->temp[3][index], data->config); |
2a844c14 | 410 | val = clamp_val(val, temp - 255000, temp); |
ab2b79d5 HG |
411 | reg = ((temp - val) + 500) / 1000; |
412 | ||
f3643ac7 | 413 | i2c_smbus_write_byte_data(data->client, TMP401_TEMP_CRIT_HYST, |
14f2a665 | 414 | reg); |
ab2b79d5 HG |
415 | |
416 | data->temp_crit_hyst = reg; | |
417 | ||
418 | mutex_unlock(&data->update_lock); | |
419 | ||
420 | return count; | |
421 | } | |
422 | ||
fce0758f AP |
423 | /* |
424 | * Resets the historical measurements of minimum and maximum temperatures. | |
425 | * This is done by writing any value to any of the minimum/maximum registers | |
426 | * (0x30-0x37). | |
427 | */ | |
428 | static ssize_t reset_temp_history(struct device *dev, | |
429 | struct device_attribute *devattr, const char *buf, size_t count) | |
430 | { | |
f3643ac7 GR |
431 | struct tmp401_data *data = dev_get_drvdata(dev); |
432 | struct i2c_client *client = data->client; | |
fce0758f AP |
433 | long val; |
434 | ||
179c4fdb | 435 | if (kstrtol(buf, 10, &val)) |
fce0758f AP |
436 | return -EINVAL; |
437 | ||
438 | if (val != 1) { | |
b55f3757 GR |
439 | dev_err(dev, |
440 | "temp_reset_history value %ld not supported. Use 1 to reset the history!\n", | |
441 | val); | |
fce0758f AP |
442 | return -EINVAL; |
443 | } | |
8eb6d90f GR |
444 | mutex_lock(&data->update_lock); |
445 | i2c_smbus_write_byte_data(client, TMP401_TEMP_MSB_WRITE[5][0], val); | |
446 | data->valid = 0; | |
447 | mutex_unlock(&data->update_lock); | |
fce0758f AP |
448 | |
449 | return count; | |
450 | } | |
451 | ||
0846e30d GR |
452 | static ssize_t show_update_interval(struct device *dev, |
453 | struct device_attribute *attr, char *buf) | |
454 | { | |
f3643ac7 | 455 | struct tmp401_data *data = dev_get_drvdata(dev); |
0846e30d GR |
456 | |
457 | return sprintf(buf, "%u\n", data->update_interval); | |
458 | } | |
459 | ||
460 | static ssize_t set_update_interval(struct device *dev, | |
461 | struct device_attribute *attr, | |
462 | const char *buf, size_t count) | |
463 | { | |
f3643ac7 GR |
464 | struct tmp401_data *data = dev_get_drvdata(dev); |
465 | struct i2c_client *client = data->client; | |
0846e30d GR |
466 | unsigned long val; |
467 | int err, rate; | |
468 | ||
469 | err = kstrtoul(buf, 10, &val); | |
470 | if (err) | |
471 | return err; | |
472 | ||
473 | /* | |
474 | * For valid rates, interval can be calculated as | |
475 | * interval = (1 << (7 - rate)) * 125; | |
476 | * Rounded rate is therefore | |
477 | * rate = 7 - __fls(interval * 4 / (125 * 3)); | |
478 | * Use clamp_val() to avoid overflows, and to ensure valid input | |
479 | * for __fls. | |
480 | */ | |
481 | val = clamp_val(val, 125, 16000); | |
482 | rate = 7 - __fls(val * 4 / (125 * 3)); | |
483 | mutex_lock(&data->update_lock); | |
484 | i2c_smbus_write_byte_data(client, TMP401_CONVERSION_RATE_WRITE, rate); | |
485 | data->update_interval = (1 << (7 - rate)) * 125; | |
486 | mutex_unlock(&data->update_lock); | |
487 | ||
488 | return count; | |
489 | } | |
490 | ||
14f2a665 GR |
491 | static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0); |
492 | static SENSOR_DEVICE_ATTR_2(temp1_min, S_IWUSR | S_IRUGO, show_temp, | |
493 | store_temp, 1, 0); | |
494 | static SENSOR_DEVICE_ATTR_2(temp1_max, S_IWUSR | S_IRUGO, show_temp, | |
495 | store_temp, 2, 0); | |
496 | static SENSOR_DEVICE_ATTR_2(temp1_crit, S_IWUSR | S_IRUGO, show_temp, | |
497 | store_temp, 3, 0); | |
b4e665c7 GR |
498 | static SENSOR_DEVICE_ATTR(temp1_crit_hyst, S_IWUSR | S_IRUGO, |
499 | show_temp_crit_hyst, store_temp_crit_hyst, 0); | |
29dd3b64 GR |
500 | static SENSOR_DEVICE_ATTR_2(temp1_min_alarm, S_IRUGO, show_status, NULL, |
501 | 1, TMP432_STATUS_LOCAL); | |
502 | static SENSOR_DEVICE_ATTR_2(temp1_max_alarm, S_IRUGO, show_status, NULL, | |
503 | 2, TMP432_STATUS_LOCAL); | |
504 | static SENSOR_DEVICE_ATTR_2(temp1_crit_alarm, S_IRUGO, show_status, NULL, | |
505 | 3, TMP432_STATUS_LOCAL); | |
14f2a665 GR |
506 | static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 1); |
507 | static SENSOR_DEVICE_ATTR_2(temp2_min, S_IWUSR | S_IRUGO, show_temp, | |
508 | store_temp, 1, 1); | |
509 | static SENSOR_DEVICE_ATTR_2(temp2_max, S_IWUSR | S_IRUGO, show_temp, | |
510 | store_temp, 2, 1); | |
511 | static SENSOR_DEVICE_ATTR_2(temp2_crit, S_IWUSR | S_IRUGO, show_temp, | |
512 | store_temp, 3, 1); | |
b4e665c7 GR |
513 | static SENSOR_DEVICE_ATTR(temp2_crit_hyst, S_IRUGO, show_temp_crit_hyst, |
514 | NULL, 1); | |
29dd3b64 GR |
515 | static SENSOR_DEVICE_ATTR_2(temp2_fault, S_IRUGO, show_status, NULL, |
516 | 0, TMP432_STATUS_REMOTE1); | |
517 | static SENSOR_DEVICE_ATTR_2(temp2_min_alarm, S_IRUGO, show_status, NULL, | |
518 | 1, TMP432_STATUS_REMOTE1); | |
519 | static SENSOR_DEVICE_ATTR_2(temp2_max_alarm, S_IRUGO, show_status, NULL, | |
520 | 2, TMP432_STATUS_REMOTE1); | |
521 | static SENSOR_DEVICE_ATTR_2(temp2_crit_alarm, S_IRUGO, show_status, NULL, | |
522 | 3, TMP432_STATUS_REMOTE1); | |
b4e665c7 | 523 | |
0846e30d GR |
524 | static DEVICE_ATTR(update_interval, S_IRUGO | S_IWUSR, show_update_interval, |
525 | set_update_interval); | |
526 | ||
b4e665c7 GR |
527 | static struct attribute *tmp401_attributes[] = { |
528 | &sensor_dev_attr_temp1_input.dev_attr.attr, | |
529 | &sensor_dev_attr_temp1_min.dev_attr.attr, | |
530 | &sensor_dev_attr_temp1_max.dev_attr.attr, | |
531 | &sensor_dev_attr_temp1_crit.dev_attr.attr, | |
532 | &sensor_dev_attr_temp1_crit_hyst.dev_attr.attr, | |
533 | &sensor_dev_attr_temp1_max_alarm.dev_attr.attr, | |
534 | &sensor_dev_attr_temp1_min_alarm.dev_attr.attr, | |
535 | &sensor_dev_attr_temp1_crit_alarm.dev_attr.attr, | |
536 | ||
537 | &sensor_dev_attr_temp2_input.dev_attr.attr, | |
538 | &sensor_dev_attr_temp2_min.dev_attr.attr, | |
539 | &sensor_dev_attr_temp2_max.dev_attr.attr, | |
540 | &sensor_dev_attr_temp2_crit.dev_attr.attr, | |
541 | &sensor_dev_attr_temp2_crit_hyst.dev_attr.attr, | |
542 | &sensor_dev_attr_temp2_fault.dev_attr.attr, | |
543 | &sensor_dev_attr_temp2_max_alarm.dev_attr.attr, | |
544 | &sensor_dev_attr_temp2_min_alarm.dev_attr.attr, | |
545 | &sensor_dev_attr_temp2_crit_alarm.dev_attr.attr, | |
546 | ||
0846e30d GR |
547 | &dev_attr_update_interval.attr, |
548 | ||
b4e665c7 GR |
549 | NULL |
550 | }; | |
551 | ||
552 | static const struct attribute_group tmp401_group = { | |
553 | .attrs = tmp401_attributes, | |
ab2b79d5 HG |
554 | }; |
555 | ||
fce0758f AP |
556 | /* |
557 | * Additional features of the TMP411 chip. | |
558 | * The TMP411 stores the minimum and maximum | |
559 | * temperature measured since power-on, chip-reset, or | |
560 | * minimum and maximum register reset for both the local | |
561 | * and remote channels. | |
562 | */ | |
14f2a665 GR |
563 | static SENSOR_DEVICE_ATTR_2(temp1_lowest, S_IRUGO, show_temp, NULL, 4, 0); |
564 | static SENSOR_DEVICE_ATTR_2(temp1_highest, S_IRUGO, show_temp, NULL, 5, 0); | |
565 | static SENSOR_DEVICE_ATTR_2(temp2_lowest, S_IRUGO, show_temp, NULL, 4, 1); | |
566 | static SENSOR_DEVICE_ATTR_2(temp2_highest, S_IRUGO, show_temp, NULL, 5, 1); | |
b4e665c7 GR |
567 | static SENSOR_DEVICE_ATTR(temp_reset_history, S_IWUSR, NULL, reset_temp_history, |
568 | 0); | |
569 | ||
570 | static struct attribute *tmp411_attributes[] = { | |
571 | &sensor_dev_attr_temp1_highest.dev_attr.attr, | |
572 | &sensor_dev_attr_temp1_lowest.dev_attr.attr, | |
573 | &sensor_dev_attr_temp2_highest.dev_attr.attr, | |
574 | &sensor_dev_attr_temp2_lowest.dev_attr.attr, | |
575 | &sensor_dev_attr_temp_reset_history.dev_attr.attr, | |
576 | NULL | |
577 | }; | |
578 | ||
579 | static const struct attribute_group tmp411_group = { | |
580 | .attrs = tmp411_attributes, | |
fce0758f AP |
581 | }; |
582 | ||
29dd3b64 GR |
583 | static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 2); |
584 | static SENSOR_DEVICE_ATTR_2(temp3_min, S_IWUSR | S_IRUGO, show_temp, | |
585 | store_temp, 1, 2); | |
586 | static SENSOR_DEVICE_ATTR_2(temp3_max, S_IWUSR | S_IRUGO, show_temp, | |
587 | store_temp, 2, 2); | |
588 | static SENSOR_DEVICE_ATTR_2(temp3_crit, S_IWUSR | S_IRUGO, show_temp, | |
589 | store_temp, 3, 2); | |
590 | static SENSOR_DEVICE_ATTR(temp3_crit_hyst, S_IRUGO, show_temp_crit_hyst, | |
591 | NULL, 2); | |
592 | static SENSOR_DEVICE_ATTR_2(temp3_fault, S_IRUGO, show_status, NULL, | |
593 | 0, TMP432_STATUS_REMOTE2); | |
594 | static SENSOR_DEVICE_ATTR_2(temp3_min_alarm, S_IRUGO, show_status, NULL, | |
595 | 1, TMP432_STATUS_REMOTE2); | |
596 | static SENSOR_DEVICE_ATTR_2(temp3_max_alarm, S_IRUGO, show_status, NULL, | |
597 | 2, TMP432_STATUS_REMOTE2); | |
598 | static SENSOR_DEVICE_ATTR_2(temp3_crit_alarm, S_IRUGO, show_status, NULL, | |
599 | 3, TMP432_STATUS_REMOTE2); | |
600 | ||
601 | static struct attribute *tmp432_attributes[] = { | |
602 | &sensor_dev_attr_temp3_input.dev_attr.attr, | |
603 | &sensor_dev_attr_temp3_min.dev_attr.attr, | |
604 | &sensor_dev_attr_temp3_max.dev_attr.attr, | |
605 | &sensor_dev_attr_temp3_crit.dev_attr.attr, | |
606 | &sensor_dev_attr_temp3_crit_hyst.dev_attr.attr, | |
607 | &sensor_dev_attr_temp3_fault.dev_attr.attr, | |
608 | &sensor_dev_attr_temp3_max_alarm.dev_attr.attr, | |
609 | &sensor_dev_attr_temp3_min_alarm.dev_attr.attr, | |
610 | &sensor_dev_attr_temp3_crit_alarm.dev_attr.attr, | |
611 | ||
612 | NULL | |
613 | }; | |
614 | ||
615 | static const struct attribute_group tmp432_group = { | |
616 | .attrs = tmp432_attributes, | |
617 | }; | |
618 | ||
c0a68601 AD |
619 | /* |
620 | * Additional features of the TMP461 chip. | |
621 | * The TMP461 temperature offset for the remote channel. | |
622 | */ | |
623 | static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IWUSR | S_IRUGO, show_temp, | |
624 | store_temp, 6, 1); | |
625 | ||
626 | static struct attribute *tmp461_attributes[] = { | |
627 | &sensor_dev_attr_temp2_offset.dev_attr.attr, | |
628 | NULL | |
629 | }; | |
630 | ||
631 | static const struct attribute_group tmp461_group = { | |
632 | .attrs = tmp461_attributes, | |
633 | }; | |
634 | ||
ab2b79d5 HG |
635 | /* |
636 | * Begin non sysfs callback code (aka Real code) | |
637 | */ | |
638 | ||
90652efe BG |
639 | static int tmp401_init_client(struct tmp401_data *data, |
640 | struct i2c_client *client) | |
ab2b79d5 | 641 | { |
90652efe | 642 | int config, config_orig, status = 0; |
ab2b79d5 HG |
643 | |
644 | /* Set the conversion rate to 2 Hz */ | |
645 | i2c_smbus_write_byte_data(client, TMP401_CONVERSION_RATE_WRITE, 5); | |
0846e30d | 646 | data->update_interval = 500; |
ab2b79d5 HG |
647 | |
648 | /* Start conversions (disable shutdown if necessary) */ | |
649 | config = i2c_smbus_read_byte_data(client, TMP401_CONFIG_READ); | |
90652efe BG |
650 | if (config < 0) |
651 | return config; | |
ab2b79d5 HG |
652 | |
653 | config_orig = config; | |
654 | config &= ~TMP401_CONFIG_SHUTDOWN; | |
655 | ||
656 | if (config != config_orig) | |
90652efe BG |
657 | status = i2c_smbus_write_byte_data(client, |
658 | TMP401_CONFIG_WRITE, | |
659 | config); | |
660 | ||
661 | return status; | |
ab2b79d5 HG |
662 | } |
663 | ||
310ec792 | 664 | static int tmp401_detect(struct i2c_client *client, |
ab2b79d5 HG |
665 | struct i2c_board_info *info) |
666 | { | |
dbe73c8f | 667 | enum chips kind; |
ab2b79d5 | 668 | struct i2c_adapter *adapter = client->adapter; |
dbe73c8f | 669 | u8 reg; |
ab2b79d5 HG |
670 | |
671 | if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) | |
672 | return -ENODEV; | |
673 | ||
674 | /* Detect and identify the chip */ | |
dbe73c8f JD |
675 | reg = i2c_smbus_read_byte_data(client, TMP401_MANUFACTURER_ID_REG); |
676 | if (reg != TMP401_MANUFACTURER_ID) | |
677 | return -ENODEV; | |
ab2b79d5 | 678 | |
dbe73c8f | 679 | reg = i2c_smbus_read_byte_data(client, TMP401_DEVICE_ID_REG); |
ab2b79d5 | 680 | |
dbe73c8f JD |
681 | switch (reg) { |
682 | case TMP401_DEVICE_ID: | |
a1fac92b GR |
683 | if (client->addr != 0x4c) |
684 | return -ENODEV; | |
dbe73c8f JD |
685 | kind = tmp401; |
686 | break; | |
4ce5b1fe GR |
687 | case TMP411A_DEVICE_ID: |
688 | if (client->addr != 0x4c) | |
689 | return -ENODEV; | |
690 | kind = tmp411; | |
691 | break; | |
692 | case TMP411B_DEVICE_ID: | |
693 | if (client->addr != 0x4d) | |
694 | return -ENODEV; | |
695 | kind = tmp411; | |
696 | break; | |
697 | case TMP411C_DEVICE_ID: | |
698 | if (client->addr != 0x4e) | |
699 | return -ENODEV; | |
dbe73c8f JD |
700 | kind = tmp411; |
701 | break; | |
a1fac92b | 702 | case TMP431_DEVICE_ID: |
907a6d58 | 703 | if (client->addr != 0x4c && client->addr != 0x4d) |
a1fac92b GR |
704 | return -ENODEV; |
705 | kind = tmp431; | |
706 | break; | |
29dd3b64 | 707 | case TMP432_DEVICE_ID: |
907a6d58 | 708 | if (client->addr != 0x4c && client->addr != 0x4d) |
29dd3b64 GR |
709 | return -ENODEV; |
710 | kind = tmp432; | |
711 | break; | |
06adbaec | 712 | case TMP435_DEVICE_ID: |
06adbaec PT |
713 | kind = tmp435; |
714 | break; | |
dbe73c8f JD |
715 | default: |
716 | return -ENODEV; | |
ab2b79d5 | 717 | } |
dbe73c8f JD |
718 | |
719 | reg = i2c_smbus_read_byte_data(client, TMP401_CONFIG_READ); | |
720 | if (reg & 0x1b) | |
721 | return -ENODEV; | |
722 | ||
723 | reg = i2c_smbus_read_byte_data(client, TMP401_CONVERSION_RATE_READ); | |
724 | /* Datasheet says: 0x1-0x6 */ | |
725 | if (reg > 15) | |
726 | return -ENODEV; | |
727 | ||
dc71afe5 | 728 | strlcpy(info->type, tmp401_id[kind].name, I2C_NAME_SIZE); |
ab2b79d5 HG |
729 | |
730 | return 0; | |
731 | } | |
732 | ||
733 | static int tmp401_probe(struct i2c_client *client, | |
734 | const struct i2c_device_id *id) | |
735 | { | |
06adbaec | 736 | static const char * const names[] = { |
c0a68601 | 737 | "TMP401", "TMP411", "TMP431", "TMP432", "TMP435", "TMP461" |
06adbaec | 738 | }; |
b4e665c7 | 739 | struct device *dev = &client->dev; |
f3643ac7 | 740 | struct device *hwmon_dev; |
ab2b79d5 | 741 | struct tmp401_data *data; |
90652efe | 742 | int groups = 0, status; |
ab2b79d5 | 743 | |
b4e665c7 | 744 | data = devm_kzalloc(dev, sizeof(struct tmp401_data), GFP_KERNEL); |
ab2b79d5 HG |
745 | if (!data) |
746 | return -ENOMEM; | |
747 | ||
f3643ac7 | 748 | data->client = client; |
ab2b79d5 | 749 | mutex_init(&data->update_lock); |
fce0758f | 750 | data->kind = id->driver_data; |
ab2b79d5 HG |
751 | |
752 | /* Initialize the TMP401 chip */ | |
90652efe BG |
753 | status = tmp401_init_client(data, client); |
754 | if (status < 0) | |
755 | return status; | |
ab2b79d5 HG |
756 | |
757 | /* Register sysfs hooks */ | |
f3643ac7 | 758 | data->groups[groups++] = &tmp401_group; |
ab2b79d5 | 759 | |
a80581d0 | 760 | /* Register additional tmp411 sysfs hooks */ |
f3643ac7 GR |
761 | if (data->kind == tmp411) |
762 | data->groups[groups++] = &tmp411_group; | |
fce0758f | 763 | |
29dd3b64 | 764 | /* Register additional tmp432 sysfs hooks */ |
f3643ac7 GR |
765 | if (data->kind == tmp432) |
766 | data->groups[groups++] = &tmp432_group; | |
29dd3b64 | 767 | |
c0a68601 AD |
768 | if (data->kind == tmp461) |
769 | data->groups[groups++] = &tmp461_group; | |
770 | ||
f3643ac7 GR |
771 | hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name, |
772 | data, data->groups); | |
773 | if (IS_ERR(hwmon_dev)) | |
774 | return PTR_ERR(hwmon_dev); | |
ab2b79d5 | 775 | |
b4e665c7 | 776 | dev_info(dev, "Detected TI %s chip\n", names[data->kind]); |
ab2b79d5 HG |
777 | |
778 | return 0; | |
ab2b79d5 HG |
779 | } |
780 | ||
ea63c2b9 AP |
781 | static struct i2c_driver tmp401_driver = { |
782 | .class = I2C_CLASS_HWMON, | |
783 | .driver = { | |
784 | .name = "tmp401", | |
785 | }, | |
786 | .probe = tmp401_probe, | |
ea63c2b9 AP |
787 | .id_table = tmp401_id, |
788 | .detect = tmp401_detect, | |
789 | .address_list = normal_i2c, | |
790 | }; | |
ab2b79d5 | 791 | |
f0967eea | 792 | module_i2c_driver(tmp401_driver); |
ab2b79d5 HG |
793 | |
794 | MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>"); | |
795 | MODULE_DESCRIPTION("Texas Instruments TMP401 temperature sensor driver"); | |
796 | MODULE_LICENSE("GPL"); |