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Commit | Line | Data |
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08e7e278 JD |
1 | /* |
2 | w83627ehf - Driver for the hardware monitoring functionality of | |
3 | the Winbond W83627EHF Super-I/O chip | |
4 | Copyright (C) 2005 Jean Delvare <khali@linux-fr.org> | |
3379ceee | 5 | Copyright (C) 2006 Yuan Mu (Winbond), |
7188cc66 | 6 | Rudolf Marek <r.marek@assembler.cz> |
c18beb5b | 7 | David Hubbard <david.c.hubbard@gmail.com> |
08e7e278 JD |
8 | |
9 | Shamelessly ripped from the w83627hf driver | |
10 | Copyright (C) 2003 Mark Studebaker | |
11 | ||
12 | Thanks to Leon Moonen, Steve Cliffe and Grant Coady for their help | |
13 | in testing and debugging this driver. | |
14 | ||
8dd2d2ca JD |
15 | This driver also supports the W83627EHG, which is the lead-free |
16 | version of the W83627EHF. | |
17 | ||
08e7e278 JD |
18 | This program is free software; you can redistribute it and/or modify |
19 | it under the terms of the GNU General Public License as published by | |
20 | the Free Software Foundation; either version 2 of the License, or | |
21 | (at your option) any later version. | |
22 | ||
23 | This program is distributed in the hope that it will be useful, | |
24 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
25 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
26 | GNU General Public License for more details. | |
27 | ||
28 | You should have received a copy of the GNU General Public License | |
29 | along with this program; if not, write to the Free Software | |
30 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
31 | ||
32 | ||
33 | Supports the following chips: | |
34 | ||
657c93b1 DH |
35 | Chip #vin #fan #pwm #temp chip IDs man ID |
36 | w83627ehf 10 5 4 3 0x8850 0x88 0x5ca3 | |
37 | 0x8860 0xa1 | |
38 | w83627dhg 9 5 4 3 0xa020 0xc1 0x5ca3 | |
237c8d2f | 39 | w83667hg 9 5 3 3 0xa510 0xc1 0x5ca3 |
08e7e278 JD |
40 | */ |
41 | ||
42 | #include <linux/module.h> | |
43 | #include <linux/init.h> | |
44 | #include <linux/slab.h> | |
1ea6dd38 DH |
45 | #include <linux/jiffies.h> |
46 | #include <linux/platform_device.h> | |
943b0830 | 47 | #include <linux/hwmon.h> |
412fec82 | 48 | #include <linux/hwmon-sysfs.h> |
fc18d6c0 | 49 | #include <linux/hwmon-vid.h> |
943b0830 | 50 | #include <linux/err.h> |
9a61bf63 | 51 | #include <linux/mutex.h> |
b9acb64a | 52 | #include <linux/acpi.h> |
08e7e278 JD |
53 | #include <asm/io.h> |
54 | #include "lm75.h" | |
55 | ||
237c8d2f | 56 | enum kinds { w83627ehf, w83627dhg, w83667hg }; |
08e7e278 | 57 | |
1ea6dd38 DH |
58 | /* used to set data->name = w83627ehf_device_names[data->sio_kind] */ |
59 | static const char * w83627ehf_device_names[] = { | |
60 | "w83627ehf", | |
61 | "w83627dhg", | |
237c8d2f | 62 | "w83667hg", |
1ea6dd38 DH |
63 | }; |
64 | ||
67b671bc JD |
65 | static unsigned short force_id; |
66 | module_param(force_id, ushort, 0); | |
67 | MODULE_PARM_DESC(force_id, "Override the detected device ID"); | |
68 | ||
1ea6dd38 | 69 | #define DRVNAME "w83627ehf" |
08e7e278 | 70 | |
657c93b1 | 71 | /* |
1ea6dd38 | 72 | * Super-I/O constants and functions |
657c93b1 | 73 | */ |
08e7e278 JD |
74 | |
75 | #define W83627EHF_LD_HWM 0x0b | |
237c8d2f | 76 | #define W83667HG_LD_VID 0x0d |
08e7e278 JD |
77 | |
78 | #define SIO_REG_LDSEL 0x07 /* Logical device select */ | |
79 | #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */ | |
fc18d6c0 | 80 | #define SIO_REG_EN_VRM10 0x2C /* GPIO3, GPIO4 selection */ |
08e7e278 JD |
81 | #define SIO_REG_ENABLE 0x30 /* Logical device enable */ |
82 | #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */ | |
fc18d6c0 JD |
83 | #define SIO_REG_VID_CTRL 0xF0 /* VID control */ |
84 | #define SIO_REG_VID_DATA 0xF1 /* VID data */ | |
08e7e278 | 85 | |
657c93b1 DH |
86 | #define SIO_W83627EHF_ID 0x8850 |
87 | #define SIO_W83627EHG_ID 0x8860 | |
88 | #define SIO_W83627DHG_ID 0xa020 | |
237c8d2f | 89 | #define SIO_W83667HG_ID 0xa510 |
657c93b1 | 90 | #define SIO_ID_MASK 0xFFF0 |
08e7e278 JD |
91 | |
92 | static inline void | |
1ea6dd38 | 93 | superio_outb(int ioreg, int reg, int val) |
08e7e278 | 94 | { |
1ea6dd38 DH |
95 | outb(reg, ioreg); |
96 | outb(val, ioreg + 1); | |
08e7e278 JD |
97 | } |
98 | ||
99 | static inline int | |
1ea6dd38 | 100 | superio_inb(int ioreg, int reg) |
08e7e278 | 101 | { |
1ea6dd38 DH |
102 | outb(reg, ioreg); |
103 | return inb(ioreg + 1); | |
08e7e278 JD |
104 | } |
105 | ||
106 | static inline void | |
1ea6dd38 | 107 | superio_select(int ioreg, int ld) |
08e7e278 | 108 | { |
1ea6dd38 DH |
109 | outb(SIO_REG_LDSEL, ioreg); |
110 | outb(ld, ioreg + 1); | |
08e7e278 JD |
111 | } |
112 | ||
113 | static inline void | |
1ea6dd38 | 114 | superio_enter(int ioreg) |
08e7e278 | 115 | { |
1ea6dd38 DH |
116 | outb(0x87, ioreg); |
117 | outb(0x87, ioreg); | |
08e7e278 JD |
118 | } |
119 | ||
120 | static inline void | |
1ea6dd38 | 121 | superio_exit(int ioreg) |
08e7e278 | 122 | { |
1ea6dd38 DH |
123 | outb(0x02, ioreg); |
124 | outb(0x02, ioreg + 1); | |
08e7e278 JD |
125 | } |
126 | ||
127 | /* | |
128 | * ISA constants | |
129 | */ | |
130 | ||
1a641fce JD |
131 | #define IOREGION_ALIGNMENT ~7 |
132 | #define IOREGION_OFFSET 5 | |
133 | #define IOREGION_LENGTH 2 | |
1ea6dd38 DH |
134 | #define ADDR_REG_OFFSET 0 |
135 | #define DATA_REG_OFFSET 1 | |
08e7e278 JD |
136 | |
137 | #define W83627EHF_REG_BANK 0x4E | |
138 | #define W83627EHF_REG_CONFIG 0x40 | |
657c93b1 DH |
139 | |
140 | /* Not currently used: | |
141 | * REG_MAN_ID has the value 0x5ca3 for all supported chips. | |
142 | * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model. | |
143 | * REG_MAN_ID is at port 0x4f | |
144 | * REG_CHIP_ID is at port 0x58 */ | |
08e7e278 JD |
145 | |
146 | static const u16 W83627EHF_REG_FAN[] = { 0x28, 0x29, 0x2a, 0x3f, 0x553 }; | |
147 | static const u16 W83627EHF_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d, 0x3e, 0x55c }; | |
148 | ||
cf0676fe RM |
149 | /* The W83627EHF registers for nr=7,8,9 are in bank 5 */ |
150 | #define W83627EHF_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \ | |
151 | (0x554 + (((nr) - 7) * 2))) | |
152 | #define W83627EHF_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \ | |
153 | (0x555 + (((nr) - 7) * 2))) | |
154 | #define W83627EHF_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \ | |
155 | (0x550 + (nr) - 7)) | |
156 | ||
08e7e278 JD |
157 | #define W83627EHF_REG_TEMP1 0x27 |
158 | #define W83627EHF_REG_TEMP1_HYST 0x3a | |
159 | #define W83627EHF_REG_TEMP1_OVER 0x39 | |
160 | static const u16 W83627EHF_REG_TEMP[] = { 0x150, 0x250 }; | |
161 | static const u16 W83627EHF_REG_TEMP_HYST[] = { 0x153, 0x253 }; | |
162 | static const u16 W83627EHF_REG_TEMP_OVER[] = { 0x155, 0x255 }; | |
163 | static const u16 W83627EHF_REG_TEMP_CONFIG[] = { 0x152, 0x252 }; | |
164 | ||
165 | /* Fan clock dividers are spread over the following five registers */ | |
166 | #define W83627EHF_REG_FANDIV1 0x47 | |
167 | #define W83627EHF_REG_FANDIV2 0x4B | |
168 | #define W83627EHF_REG_VBAT 0x5D | |
169 | #define W83627EHF_REG_DIODE 0x59 | |
170 | #define W83627EHF_REG_SMI_OVT 0x4C | |
171 | ||
a4589dbb JD |
172 | #define W83627EHF_REG_ALARM1 0x459 |
173 | #define W83627EHF_REG_ALARM2 0x45A | |
174 | #define W83627EHF_REG_ALARM3 0x45B | |
175 | ||
08c79950 RM |
176 | /* SmartFan registers */ |
177 | /* DC or PWM output fan configuration */ | |
178 | static const u8 W83627EHF_REG_PWM_ENABLE[] = { | |
179 | 0x04, /* SYS FAN0 output mode and PWM mode */ | |
180 | 0x04, /* CPU FAN0 output mode and PWM mode */ | |
181 | 0x12, /* AUX FAN mode */ | |
182 | 0x62, /* CPU fan1 mode */ | |
183 | }; | |
184 | ||
185 | static const u8 W83627EHF_PWM_MODE_SHIFT[] = { 0, 1, 0, 6 }; | |
186 | static const u8 W83627EHF_PWM_ENABLE_SHIFT[] = { 2, 4, 1, 4 }; | |
187 | ||
188 | /* FAN Duty Cycle, be used to control */ | |
189 | static const u8 W83627EHF_REG_PWM[] = { 0x01, 0x03, 0x11, 0x61 }; | |
190 | static const u8 W83627EHF_REG_TARGET[] = { 0x05, 0x06, 0x13, 0x63 }; | |
191 | static const u8 W83627EHF_REG_TOLERANCE[] = { 0x07, 0x07, 0x14, 0x62 }; | |
192 | ||
193 | ||
194 | /* Advanced Fan control, some values are common for all fans */ | |
195 | static const u8 W83627EHF_REG_FAN_MIN_OUTPUT[] = { 0x08, 0x09, 0x15, 0x64 }; | |
196 | static const u8 W83627EHF_REG_FAN_STOP_TIME[] = { 0x0C, 0x0D, 0x17, 0x66 }; | |
197 | ||
08e7e278 JD |
198 | /* |
199 | * Conversions | |
200 | */ | |
201 | ||
08c79950 RM |
202 | /* 1 is PWM mode, output in ms */ |
203 | static inline unsigned int step_time_from_reg(u8 reg, u8 mode) | |
204 | { | |
205 | return mode ? 100 * reg : 400 * reg; | |
206 | } | |
207 | ||
208 | static inline u8 step_time_to_reg(unsigned int msec, u8 mode) | |
209 | { | |
210 | return SENSORS_LIMIT((mode ? (msec + 50) / 100 : | |
211 | (msec + 200) / 400), 1, 255); | |
212 | } | |
213 | ||
08e7e278 JD |
214 | static inline unsigned int |
215 | fan_from_reg(u8 reg, unsigned int div) | |
216 | { | |
217 | if (reg == 0 || reg == 255) | |
218 | return 0; | |
219 | return 1350000U / (reg * div); | |
220 | } | |
221 | ||
222 | static inline unsigned int | |
223 | div_from_reg(u8 reg) | |
224 | { | |
225 | return 1 << reg; | |
226 | } | |
227 | ||
228 | static inline int | |
229 | temp1_from_reg(s8 reg) | |
230 | { | |
231 | return reg * 1000; | |
232 | } | |
233 | ||
234 | static inline s8 | |
5bfedac0 | 235 | temp1_to_reg(long temp, int min, int max) |
08e7e278 | 236 | { |
08c79950 RM |
237 | if (temp <= min) |
238 | return min / 1000; | |
239 | if (temp >= max) | |
240 | return max / 1000; | |
08e7e278 JD |
241 | if (temp < 0) |
242 | return (temp - 500) / 1000; | |
243 | return (temp + 500) / 1000; | |
244 | } | |
245 | ||
cf0676fe RM |
246 | /* Some of analog inputs have internal scaling (2x), 8mV is ADC LSB */ |
247 | ||
248 | static u8 scale_in[10] = { 8, 8, 16, 16, 8, 8, 8, 16, 16, 8 }; | |
249 | ||
250 | static inline long in_from_reg(u8 reg, u8 nr) | |
251 | { | |
252 | return reg * scale_in[nr]; | |
253 | } | |
254 | ||
255 | static inline u8 in_to_reg(u32 val, u8 nr) | |
256 | { | |
257 | return SENSORS_LIMIT(((val + (scale_in[nr] / 2)) / scale_in[nr]), 0, 255); | |
258 | } | |
259 | ||
08e7e278 JD |
260 | /* |
261 | * Data structures and manipulation thereof | |
262 | */ | |
263 | ||
264 | struct w83627ehf_data { | |
1ea6dd38 DH |
265 | int addr; /* IO base of hw monitor block */ |
266 | const char *name; | |
267 | ||
1beeffe4 | 268 | struct device *hwmon_dev; |
9a61bf63 | 269 | struct mutex lock; |
08e7e278 | 270 | |
9a61bf63 | 271 | struct mutex update_lock; |
08e7e278 JD |
272 | char valid; /* !=0 if following fields are valid */ |
273 | unsigned long last_updated; /* In jiffies */ | |
274 | ||
275 | /* Register values */ | |
1ea6dd38 | 276 | u8 in_num; /* number of in inputs we have */ |
cf0676fe RM |
277 | u8 in[10]; /* Register value */ |
278 | u8 in_max[10]; /* Register value */ | |
279 | u8 in_min[10]; /* Register value */ | |
08e7e278 JD |
280 | u8 fan[5]; |
281 | u8 fan_min[5]; | |
282 | u8 fan_div[5]; | |
283 | u8 has_fan; /* some fan inputs can be disabled */ | |
da667365 | 284 | u8 temp_type[3]; |
08e7e278 JD |
285 | s8 temp1; |
286 | s8 temp1_max; | |
287 | s8 temp1_max_hyst; | |
288 | s16 temp[2]; | |
289 | s16 temp_max[2]; | |
290 | s16 temp_max_hyst[2]; | |
a4589dbb | 291 | u32 alarms; |
08c79950 RM |
292 | |
293 | u8 pwm_mode[4]; /* 0->DC variable voltage, 1->PWM variable duty cycle */ | |
294 | u8 pwm_enable[4]; /* 1->manual | |
295 | 2->thermal cruise (also called SmartFan I) */ | |
237c8d2f | 296 | u8 pwm_num; /* number of pwm */ |
08c79950 RM |
297 | u8 pwm[4]; |
298 | u8 target_temp[4]; | |
299 | u8 tolerance[4]; | |
300 | ||
301 | u8 fan_min_output[4]; /* minimum fan speed */ | |
302 | u8 fan_stop_time[4]; | |
fc18d6c0 JD |
303 | |
304 | u8 vid; | |
305 | u8 vrm; | |
a157d06d GJ |
306 | |
307 | u8 temp3_disable; | |
308 | u8 in6_skip; | |
08e7e278 JD |
309 | }; |
310 | ||
1ea6dd38 DH |
311 | struct w83627ehf_sio_data { |
312 | int sioreg; | |
313 | enum kinds kind; | |
314 | }; | |
315 | ||
08e7e278 JD |
316 | static inline int is_word_sized(u16 reg) |
317 | { | |
318 | return (((reg & 0xff00) == 0x100 | |
319 | || (reg & 0xff00) == 0x200) | |
320 | && ((reg & 0x00ff) == 0x50 | |
321 | || (reg & 0x00ff) == 0x53 | |
322 | || (reg & 0x00ff) == 0x55)); | |
323 | } | |
324 | ||
0956895a | 325 | /* Registers 0x50-0x5f are banked */ |
1ea6dd38 | 326 | static inline void w83627ehf_set_bank(struct w83627ehf_data *data, u16 reg) |
08e7e278 | 327 | { |
0956895a | 328 | if ((reg & 0x00f0) == 0x50) { |
1ea6dd38 DH |
329 | outb_p(W83627EHF_REG_BANK, data->addr + ADDR_REG_OFFSET); |
330 | outb_p(reg >> 8, data->addr + DATA_REG_OFFSET); | |
08e7e278 JD |
331 | } |
332 | } | |
333 | ||
0956895a | 334 | /* Not strictly necessary, but play it safe for now */ |
1ea6dd38 | 335 | static inline void w83627ehf_reset_bank(struct w83627ehf_data *data, u16 reg) |
08e7e278 JD |
336 | { |
337 | if (reg & 0xff00) { | |
1ea6dd38 DH |
338 | outb_p(W83627EHF_REG_BANK, data->addr + ADDR_REG_OFFSET); |
339 | outb_p(0, data->addr + DATA_REG_OFFSET); | |
08e7e278 JD |
340 | } |
341 | } | |
342 | ||
1ea6dd38 | 343 | static u16 w83627ehf_read_value(struct w83627ehf_data *data, u16 reg) |
08e7e278 | 344 | { |
08e7e278 JD |
345 | int res, word_sized = is_word_sized(reg); |
346 | ||
9a61bf63 | 347 | mutex_lock(&data->lock); |
08e7e278 | 348 | |
1ea6dd38 DH |
349 | w83627ehf_set_bank(data, reg); |
350 | outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET); | |
351 | res = inb_p(data->addr + DATA_REG_OFFSET); | |
08e7e278 JD |
352 | if (word_sized) { |
353 | outb_p((reg & 0xff) + 1, | |
1ea6dd38 DH |
354 | data->addr + ADDR_REG_OFFSET); |
355 | res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET); | |
08e7e278 | 356 | } |
1ea6dd38 | 357 | w83627ehf_reset_bank(data, reg); |
08e7e278 | 358 | |
9a61bf63 | 359 | mutex_unlock(&data->lock); |
08e7e278 JD |
360 | |
361 | return res; | |
362 | } | |
363 | ||
1ea6dd38 | 364 | static int w83627ehf_write_value(struct w83627ehf_data *data, u16 reg, u16 value) |
08e7e278 | 365 | { |
08e7e278 JD |
366 | int word_sized = is_word_sized(reg); |
367 | ||
9a61bf63 | 368 | mutex_lock(&data->lock); |
08e7e278 | 369 | |
1ea6dd38 DH |
370 | w83627ehf_set_bank(data, reg); |
371 | outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET); | |
08e7e278 | 372 | if (word_sized) { |
1ea6dd38 | 373 | outb_p(value >> 8, data->addr + DATA_REG_OFFSET); |
08e7e278 | 374 | outb_p((reg & 0xff) + 1, |
1ea6dd38 | 375 | data->addr + ADDR_REG_OFFSET); |
08e7e278 | 376 | } |
1ea6dd38 DH |
377 | outb_p(value & 0xff, data->addr + DATA_REG_OFFSET); |
378 | w83627ehf_reset_bank(data, reg); | |
08e7e278 | 379 | |
9a61bf63 | 380 | mutex_unlock(&data->lock); |
08e7e278 JD |
381 | return 0; |
382 | } | |
383 | ||
384 | /* This function assumes that the caller holds data->update_lock */ | |
1ea6dd38 | 385 | static void w83627ehf_write_fan_div(struct w83627ehf_data *data, int nr) |
08e7e278 | 386 | { |
08e7e278 JD |
387 | u8 reg; |
388 | ||
389 | switch (nr) { | |
390 | case 0: | |
1ea6dd38 | 391 | reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0xcf) |
08e7e278 | 392 | | ((data->fan_div[0] & 0x03) << 4); |
14992c7e RM |
393 | /* fan5 input control bit is write only, compute the value */ |
394 | reg |= (data->has_fan & (1 << 4)) ? 1 : 0; | |
1ea6dd38 DH |
395 | w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg); |
396 | reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xdf) | |
08e7e278 | 397 | | ((data->fan_div[0] & 0x04) << 3); |
1ea6dd38 | 398 | w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg); |
08e7e278 JD |
399 | break; |
400 | case 1: | |
1ea6dd38 | 401 | reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0x3f) |
08e7e278 | 402 | | ((data->fan_div[1] & 0x03) << 6); |
14992c7e RM |
403 | /* fan5 input control bit is write only, compute the value */ |
404 | reg |= (data->has_fan & (1 << 4)) ? 1 : 0; | |
1ea6dd38 DH |
405 | w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg); |
406 | reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xbf) | |
08e7e278 | 407 | | ((data->fan_div[1] & 0x04) << 4); |
1ea6dd38 | 408 | w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg); |
08e7e278 JD |
409 | break; |
410 | case 2: | |
1ea6dd38 | 411 | reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV2) & 0x3f) |
08e7e278 | 412 | | ((data->fan_div[2] & 0x03) << 6); |
1ea6dd38 DH |
413 | w83627ehf_write_value(data, W83627EHF_REG_FANDIV2, reg); |
414 | reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0x7f) | |
08e7e278 | 415 | | ((data->fan_div[2] & 0x04) << 5); |
1ea6dd38 | 416 | w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg); |
08e7e278 JD |
417 | break; |
418 | case 3: | |
1ea6dd38 | 419 | reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0xfc) |
08e7e278 | 420 | | (data->fan_div[3] & 0x03); |
1ea6dd38 DH |
421 | w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg); |
422 | reg = (w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT) & 0x7f) | |
08e7e278 | 423 | | ((data->fan_div[3] & 0x04) << 5); |
1ea6dd38 | 424 | w83627ehf_write_value(data, W83627EHF_REG_SMI_OVT, reg); |
08e7e278 JD |
425 | break; |
426 | case 4: | |
1ea6dd38 | 427 | reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0x73) |
33725ad3 | 428 | | ((data->fan_div[4] & 0x03) << 2) |
08e7e278 | 429 | | ((data->fan_div[4] & 0x04) << 5); |
1ea6dd38 | 430 | w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg); |
08e7e278 JD |
431 | break; |
432 | } | |
433 | } | |
434 | ||
ea7be66c MH |
435 | static void w83627ehf_update_fan_div(struct w83627ehf_data *data) |
436 | { | |
437 | int i; | |
438 | ||
439 | i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1); | |
440 | data->fan_div[0] = (i >> 4) & 0x03; | |
441 | data->fan_div[1] = (i >> 6) & 0x03; | |
442 | i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV2); | |
443 | data->fan_div[2] = (i >> 6) & 0x03; | |
444 | i = w83627ehf_read_value(data, W83627EHF_REG_VBAT); | |
445 | data->fan_div[0] |= (i >> 3) & 0x04; | |
446 | data->fan_div[1] |= (i >> 4) & 0x04; | |
447 | data->fan_div[2] |= (i >> 5) & 0x04; | |
448 | if (data->has_fan & ((1 << 3) | (1 << 4))) { | |
449 | i = w83627ehf_read_value(data, W83627EHF_REG_DIODE); | |
450 | data->fan_div[3] = i & 0x03; | |
451 | data->fan_div[4] = ((i >> 2) & 0x03) | |
452 | | ((i >> 5) & 0x04); | |
453 | } | |
454 | if (data->has_fan & (1 << 3)) { | |
455 | i = w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT); | |
456 | data->fan_div[3] |= (i >> 5) & 0x04; | |
457 | } | |
458 | } | |
459 | ||
08e7e278 JD |
460 | static struct w83627ehf_data *w83627ehf_update_device(struct device *dev) |
461 | { | |
1ea6dd38 | 462 | struct w83627ehf_data *data = dev_get_drvdata(dev); |
08c79950 | 463 | int pwmcfg = 0, tolerance = 0; /* shut up the compiler */ |
08e7e278 JD |
464 | int i; |
465 | ||
9a61bf63 | 466 | mutex_lock(&data->update_lock); |
08e7e278 | 467 | |
6b3e4645 | 468 | if (time_after(jiffies, data->last_updated + HZ + HZ/2) |
08e7e278 JD |
469 | || !data->valid) { |
470 | /* Fan clock dividers */ | |
ea7be66c | 471 | w83627ehf_update_fan_div(data); |
08e7e278 | 472 | |
cf0676fe | 473 | /* Measured voltages and limits */ |
1ea6dd38 DH |
474 | for (i = 0; i < data->in_num; i++) { |
475 | data->in[i] = w83627ehf_read_value(data, | |
cf0676fe | 476 | W83627EHF_REG_IN(i)); |
1ea6dd38 | 477 | data->in_min[i] = w83627ehf_read_value(data, |
cf0676fe | 478 | W83627EHF_REG_IN_MIN(i)); |
1ea6dd38 | 479 | data->in_max[i] = w83627ehf_read_value(data, |
cf0676fe RM |
480 | W83627EHF_REG_IN_MAX(i)); |
481 | } | |
482 | ||
08e7e278 JD |
483 | /* Measured fan speeds and limits */ |
484 | for (i = 0; i < 5; i++) { | |
485 | if (!(data->has_fan & (1 << i))) | |
486 | continue; | |
487 | ||
1ea6dd38 | 488 | data->fan[i] = w83627ehf_read_value(data, |
08e7e278 | 489 | W83627EHF_REG_FAN[i]); |
1ea6dd38 | 490 | data->fan_min[i] = w83627ehf_read_value(data, |
08e7e278 JD |
491 | W83627EHF_REG_FAN_MIN[i]); |
492 | ||
493 | /* If we failed to measure the fan speed and clock | |
494 | divider can be increased, let's try that for next | |
495 | time */ | |
496 | if (data->fan[i] == 0xff | |
497 | && data->fan_div[i] < 0x07) { | |
1ea6dd38 | 498 | dev_dbg(dev, "Increasing fan%d " |
08e7e278 | 499 | "clock divider from %u to %u\n", |
33725ad3 | 500 | i + 1, div_from_reg(data->fan_div[i]), |
08e7e278 JD |
501 | div_from_reg(data->fan_div[i] + 1)); |
502 | data->fan_div[i]++; | |
1ea6dd38 | 503 | w83627ehf_write_fan_div(data, i); |
08e7e278 JD |
504 | /* Preserve min limit if possible */ |
505 | if (data->fan_min[i] >= 2 | |
506 | && data->fan_min[i] != 255) | |
1ea6dd38 | 507 | w83627ehf_write_value(data, |
08e7e278 JD |
508 | W83627EHF_REG_FAN_MIN[i], |
509 | (data->fan_min[i] /= 2)); | |
510 | } | |
511 | } | |
512 | ||
08c79950 | 513 | for (i = 0; i < 4; i++) { |
77fa49d9 | 514 | /* pwmcfg, tolerance mapped for i=0, i=1 to same reg */ |
08c79950 | 515 | if (i != 1) { |
1ea6dd38 | 516 | pwmcfg = w83627ehf_read_value(data, |
08c79950 | 517 | W83627EHF_REG_PWM_ENABLE[i]); |
1ea6dd38 | 518 | tolerance = w83627ehf_read_value(data, |
08c79950 RM |
519 | W83627EHF_REG_TOLERANCE[i]); |
520 | } | |
521 | data->pwm_mode[i] = | |
522 | ((pwmcfg >> W83627EHF_PWM_MODE_SHIFT[i]) & 1) | |
523 | ? 0 : 1; | |
524 | data->pwm_enable[i] = | |
525 | ((pwmcfg >> W83627EHF_PWM_ENABLE_SHIFT[i]) | |
526 | & 3) + 1; | |
1ea6dd38 | 527 | data->pwm[i] = w83627ehf_read_value(data, |
08c79950 | 528 | W83627EHF_REG_PWM[i]); |
1ea6dd38 | 529 | data->fan_min_output[i] = w83627ehf_read_value(data, |
08c79950 | 530 | W83627EHF_REG_FAN_MIN_OUTPUT[i]); |
1ea6dd38 | 531 | data->fan_stop_time[i] = w83627ehf_read_value(data, |
08c79950 RM |
532 | W83627EHF_REG_FAN_STOP_TIME[i]); |
533 | data->target_temp[i] = | |
1ea6dd38 | 534 | w83627ehf_read_value(data, |
08c79950 RM |
535 | W83627EHF_REG_TARGET[i]) & |
536 | (data->pwm_mode[i] == 1 ? 0x7f : 0xff); | |
537 | data->tolerance[i] = (tolerance >> (i == 1 ? 4 : 0)) | |
538 | & 0x0f; | |
539 | } | |
540 | ||
08e7e278 | 541 | /* Measured temperatures and limits */ |
1ea6dd38 | 542 | data->temp1 = w83627ehf_read_value(data, |
08e7e278 | 543 | W83627EHF_REG_TEMP1); |
1ea6dd38 | 544 | data->temp1_max = w83627ehf_read_value(data, |
08e7e278 | 545 | W83627EHF_REG_TEMP1_OVER); |
1ea6dd38 | 546 | data->temp1_max_hyst = w83627ehf_read_value(data, |
08e7e278 JD |
547 | W83627EHF_REG_TEMP1_HYST); |
548 | for (i = 0; i < 2; i++) { | |
1ea6dd38 | 549 | data->temp[i] = w83627ehf_read_value(data, |
08e7e278 | 550 | W83627EHF_REG_TEMP[i]); |
1ea6dd38 | 551 | data->temp_max[i] = w83627ehf_read_value(data, |
08e7e278 | 552 | W83627EHF_REG_TEMP_OVER[i]); |
1ea6dd38 | 553 | data->temp_max_hyst[i] = w83627ehf_read_value(data, |
08e7e278 JD |
554 | W83627EHF_REG_TEMP_HYST[i]); |
555 | } | |
556 | ||
1ea6dd38 | 557 | data->alarms = w83627ehf_read_value(data, |
a4589dbb | 558 | W83627EHF_REG_ALARM1) | |
1ea6dd38 | 559 | (w83627ehf_read_value(data, |
a4589dbb | 560 | W83627EHF_REG_ALARM2) << 8) | |
1ea6dd38 | 561 | (w83627ehf_read_value(data, |
a4589dbb JD |
562 | W83627EHF_REG_ALARM3) << 16); |
563 | ||
08e7e278 JD |
564 | data->last_updated = jiffies; |
565 | data->valid = 1; | |
566 | } | |
567 | ||
9a61bf63 | 568 | mutex_unlock(&data->update_lock); |
08e7e278 JD |
569 | return data; |
570 | } | |
571 | ||
572 | /* | |
573 | * Sysfs callback functions | |
574 | */ | |
cf0676fe RM |
575 | #define show_in_reg(reg) \ |
576 | static ssize_t \ | |
577 | show_##reg(struct device *dev, struct device_attribute *attr, \ | |
578 | char *buf) \ | |
579 | { \ | |
580 | struct w83627ehf_data *data = w83627ehf_update_device(dev); \ | |
581 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \ | |
582 | int nr = sensor_attr->index; \ | |
583 | return sprintf(buf, "%ld\n", in_from_reg(data->reg[nr], nr)); \ | |
584 | } | |
585 | show_in_reg(in) | |
586 | show_in_reg(in_min) | |
587 | show_in_reg(in_max) | |
588 | ||
589 | #define store_in_reg(REG, reg) \ | |
590 | static ssize_t \ | |
591 | store_in_##reg (struct device *dev, struct device_attribute *attr, \ | |
592 | const char *buf, size_t count) \ | |
593 | { \ | |
1ea6dd38 | 594 | struct w83627ehf_data *data = dev_get_drvdata(dev); \ |
cf0676fe RM |
595 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \ |
596 | int nr = sensor_attr->index; \ | |
597 | u32 val = simple_strtoul(buf, NULL, 10); \ | |
598 | \ | |
599 | mutex_lock(&data->update_lock); \ | |
600 | data->in_##reg[nr] = in_to_reg(val, nr); \ | |
1ea6dd38 | 601 | w83627ehf_write_value(data, W83627EHF_REG_IN_##REG(nr), \ |
cf0676fe RM |
602 | data->in_##reg[nr]); \ |
603 | mutex_unlock(&data->update_lock); \ | |
604 | return count; \ | |
605 | } | |
606 | ||
607 | store_in_reg(MIN, min) | |
608 | store_in_reg(MAX, max) | |
609 | ||
a4589dbb JD |
610 | static ssize_t show_alarm(struct device *dev, struct device_attribute *attr, char *buf) |
611 | { | |
612 | struct w83627ehf_data *data = w83627ehf_update_device(dev); | |
613 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); | |
614 | int nr = sensor_attr->index; | |
615 | return sprintf(buf, "%u\n", (data->alarms >> nr) & 0x01); | |
616 | } | |
617 | ||
cf0676fe RM |
618 | static struct sensor_device_attribute sda_in_input[] = { |
619 | SENSOR_ATTR(in0_input, S_IRUGO, show_in, NULL, 0), | |
620 | SENSOR_ATTR(in1_input, S_IRUGO, show_in, NULL, 1), | |
621 | SENSOR_ATTR(in2_input, S_IRUGO, show_in, NULL, 2), | |
622 | SENSOR_ATTR(in3_input, S_IRUGO, show_in, NULL, 3), | |
623 | SENSOR_ATTR(in4_input, S_IRUGO, show_in, NULL, 4), | |
624 | SENSOR_ATTR(in5_input, S_IRUGO, show_in, NULL, 5), | |
625 | SENSOR_ATTR(in6_input, S_IRUGO, show_in, NULL, 6), | |
626 | SENSOR_ATTR(in7_input, S_IRUGO, show_in, NULL, 7), | |
627 | SENSOR_ATTR(in8_input, S_IRUGO, show_in, NULL, 8), | |
628 | SENSOR_ATTR(in9_input, S_IRUGO, show_in, NULL, 9), | |
629 | }; | |
630 | ||
a4589dbb JD |
631 | static struct sensor_device_attribute sda_in_alarm[] = { |
632 | SENSOR_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0), | |
633 | SENSOR_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1), | |
634 | SENSOR_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2), | |
635 | SENSOR_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3), | |
636 | SENSOR_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8), | |
637 | SENSOR_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 21), | |
638 | SENSOR_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 20), | |
639 | SENSOR_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16), | |
640 | SENSOR_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17), | |
641 | SENSOR_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 19), | |
642 | }; | |
643 | ||
cf0676fe RM |
644 | static struct sensor_device_attribute sda_in_min[] = { |
645 | SENSOR_ATTR(in0_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 0), | |
646 | SENSOR_ATTR(in1_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 1), | |
647 | SENSOR_ATTR(in2_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 2), | |
648 | SENSOR_ATTR(in3_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 3), | |
649 | SENSOR_ATTR(in4_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 4), | |
650 | SENSOR_ATTR(in5_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 5), | |
651 | SENSOR_ATTR(in6_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 6), | |
652 | SENSOR_ATTR(in7_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 7), | |
653 | SENSOR_ATTR(in8_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 8), | |
654 | SENSOR_ATTR(in9_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 9), | |
655 | }; | |
656 | ||
657 | static struct sensor_device_attribute sda_in_max[] = { | |
658 | SENSOR_ATTR(in0_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 0), | |
659 | SENSOR_ATTR(in1_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 1), | |
660 | SENSOR_ATTR(in2_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 2), | |
661 | SENSOR_ATTR(in3_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 3), | |
662 | SENSOR_ATTR(in4_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 4), | |
663 | SENSOR_ATTR(in5_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 5), | |
664 | SENSOR_ATTR(in6_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 6), | |
665 | SENSOR_ATTR(in7_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 7), | |
666 | SENSOR_ATTR(in8_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 8), | |
667 | SENSOR_ATTR(in9_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 9), | |
668 | }; | |
669 | ||
08e7e278 JD |
670 | #define show_fan_reg(reg) \ |
671 | static ssize_t \ | |
412fec82 YM |
672 | show_##reg(struct device *dev, struct device_attribute *attr, \ |
673 | char *buf) \ | |
08e7e278 JD |
674 | { \ |
675 | struct w83627ehf_data *data = w83627ehf_update_device(dev); \ | |
412fec82 YM |
676 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \ |
677 | int nr = sensor_attr->index; \ | |
08e7e278 JD |
678 | return sprintf(buf, "%d\n", \ |
679 | fan_from_reg(data->reg[nr], \ | |
680 | div_from_reg(data->fan_div[nr]))); \ | |
681 | } | |
682 | show_fan_reg(fan); | |
683 | show_fan_reg(fan_min); | |
684 | ||
685 | static ssize_t | |
412fec82 YM |
686 | show_fan_div(struct device *dev, struct device_attribute *attr, |
687 | char *buf) | |
08e7e278 JD |
688 | { |
689 | struct w83627ehf_data *data = w83627ehf_update_device(dev); | |
412fec82 YM |
690 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); |
691 | int nr = sensor_attr->index; | |
692 | return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr])); | |
08e7e278 JD |
693 | } |
694 | ||
695 | static ssize_t | |
412fec82 YM |
696 | store_fan_min(struct device *dev, struct device_attribute *attr, |
697 | const char *buf, size_t count) | |
08e7e278 | 698 | { |
1ea6dd38 | 699 | struct w83627ehf_data *data = dev_get_drvdata(dev); |
412fec82 YM |
700 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); |
701 | int nr = sensor_attr->index; | |
08e7e278 JD |
702 | unsigned int val = simple_strtoul(buf, NULL, 10); |
703 | unsigned int reg; | |
704 | u8 new_div; | |
705 | ||
9a61bf63 | 706 | mutex_lock(&data->update_lock); |
08e7e278 JD |
707 | if (!val) { |
708 | /* No min limit, alarm disabled */ | |
709 | data->fan_min[nr] = 255; | |
710 | new_div = data->fan_div[nr]; /* No change */ | |
711 | dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1); | |
712 | } else if ((reg = 1350000U / val) >= 128 * 255) { | |
713 | /* Speed below this value cannot possibly be represented, | |
714 | even with the highest divider (128) */ | |
715 | data->fan_min[nr] = 254; | |
716 | new_div = 7; /* 128 == (1 << 7) */ | |
717 | dev_warn(dev, "fan%u low limit %u below minimum %u, set to " | |
718 | "minimum\n", nr + 1, val, fan_from_reg(254, 128)); | |
719 | } else if (!reg) { | |
720 | /* Speed above this value cannot possibly be represented, | |
721 | even with the lowest divider (1) */ | |
722 | data->fan_min[nr] = 1; | |
723 | new_div = 0; /* 1 == (1 << 0) */ | |
724 | dev_warn(dev, "fan%u low limit %u above maximum %u, set to " | |
b9110b1c | 725 | "maximum\n", nr + 1, val, fan_from_reg(1, 1)); |
08e7e278 JD |
726 | } else { |
727 | /* Automatically pick the best divider, i.e. the one such | |
728 | that the min limit will correspond to a register value | |
729 | in the 96..192 range */ | |
730 | new_div = 0; | |
731 | while (reg > 192 && new_div < 7) { | |
732 | reg >>= 1; | |
733 | new_div++; | |
734 | } | |
735 | data->fan_min[nr] = reg; | |
736 | } | |
737 | ||
738 | /* Write both the fan clock divider (if it changed) and the new | |
739 | fan min (unconditionally) */ | |
740 | if (new_div != data->fan_div[nr]) { | |
158ce075 JD |
741 | /* Preserve the fan speed reading */ |
742 | if (data->fan[nr] != 0xff) { | |
743 | if (new_div > data->fan_div[nr]) | |
744 | data->fan[nr] >>= new_div - data->fan_div[nr]; | |
745 | else if (data->fan[nr] & 0x80) | |
746 | data->fan[nr] = 0xff; | |
747 | else | |
748 | data->fan[nr] <<= data->fan_div[nr] - new_div; | |
749 | } | |
08e7e278 JD |
750 | |
751 | dev_dbg(dev, "fan%u clock divider changed from %u to %u\n", | |
752 | nr + 1, div_from_reg(data->fan_div[nr]), | |
753 | div_from_reg(new_div)); | |
754 | data->fan_div[nr] = new_div; | |
1ea6dd38 | 755 | w83627ehf_write_fan_div(data, nr); |
6b3e4645 JD |
756 | /* Give the chip time to sample a new speed value */ |
757 | data->last_updated = jiffies; | |
08e7e278 | 758 | } |
1ea6dd38 | 759 | w83627ehf_write_value(data, W83627EHF_REG_FAN_MIN[nr], |
08e7e278 | 760 | data->fan_min[nr]); |
9a61bf63 | 761 | mutex_unlock(&data->update_lock); |
08e7e278 JD |
762 | |
763 | return count; | |
764 | } | |
765 | ||
412fec82 YM |
766 | static struct sensor_device_attribute sda_fan_input[] = { |
767 | SENSOR_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0), | |
768 | SENSOR_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1), | |
769 | SENSOR_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2), | |
770 | SENSOR_ATTR(fan4_input, S_IRUGO, show_fan, NULL, 3), | |
771 | SENSOR_ATTR(fan5_input, S_IRUGO, show_fan, NULL, 4), | |
772 | }; | |
08e7e278 | 773 | |
a4589dbb JD |
774 | static struct sensor_device_attribute sda_fan_alarm[] = { |
775 | SENSOR_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6), | |
776 | SENSOR_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7), | |
777 | SENSOR_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11), | |
778 | SENSOR_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 10), | |
779 | SENSOR_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 23), | |
780 | }; | |
781 | ||
412fec82 YM |
782 | static struct sensor_device_attribute sda_fan_min[] = { |
783 | SENSOR_ATTR(fan1_min, S_IWUSR | S_IRUGO, show_fan_min, | |
784 | store_fan_min, 0), | |
785 | SENSOR_ATTR(fan2_min, S_IWUSR | S_IRUGO, show_fan_min, | |
786 | store_fan_min, 1), | |
787 | SENSOR_ATTR(fan3_min, S_IWUSR | S_IRUGO, show_fan_min, | |
788 | store_fan_min, 2), | |
789 | SENSOR_ATTR(fan4_min, S_IWUSR | S_IRUGO, show_fan_min, | |
790 | store_fan_min, 3), | |
791 | SENSOR_ATTR(fan5_min, S_IWUSR | S_IRUGO, show_fan_min, | |
792 | store_fan_min, 4), | |
793 | }; | |
08e7e278 | 794 | |
412fec82 YM |
795 | static struct sensor_device_attribute sda_fan_div[] = { |
796 | SENSOR_ATTR(fan1_div, S_IRUGO, show_fan_div, NULL, 0), | |
797 | SENSOR_ATTR(fan2_div, S_IRUGO, show_fan_div, NULL, 1), | |
798 | SENSOR_ATTR(fan3_div, S_IRUGO, show_fan_div, NULL, 2), | |
799 | SENSOR_ATTR(fan4_div, S_IRUGO, show_fan_div, NULL, 3), | |
800 | SENSOR_ATTR(fan5_div, S_IRUGO, show_fan_div, NULL, 4), | |
801 | }; | |
802 | ||
08e7e278 JD |
803 | #define show_temp1_reg(reg) \ |
804 | static ssize_t \ | |
6f637a64 GKH |
805 | show_##reg(struct device *dev, struct device_attribute *attr, \ |
806 | char *buf) \ | |
08e7e278 JD |
807 | { \ |
808 | struct w83627ehf_data *data = w83627ehf_update_device(dev); \ | |
809 | return sprintf(buf, "%d\n", temp1_from_reg(data->reg)); \ | |
810 | } | |
811 | show_temp1_reg(temp1); | |
812 | show_temp1_reg(temp1_max); | |
813 | show_temp1_reg(temp1_max_hyst); | |
814 | ||
815 | #define store_temp1_reg(REG, reg) \ | |
816 | static ssize_t \ | |
6f637a64 GKH |
817 | store_temp1_##reg(struct device *dev, struct device_attribute *attr, \ |
818 | const char *buf, size_t count) \ | |
08e7e278 | 819 | { \ |
1ea6dd38 | 820 | struct w83627ehf_data *data = dev_get_drvdata(dev); \ |
5bfedac0 | 821 | long val = simple_strtol(buf, NULL, 10); \ |
08e7e278 | 822 | \ |
9a61bf63 | 823 | mutex_lock(&data->update_lock); \ |
08c79950 | 824 | data->temp1_##reg = temp1_to_reg(val, -128000, 127000); \ |
1ea6dd38 | 825 | w83627ehf_write_value(data, W83627EHF_REG_TEMP1_##REG, \ |
08e7e278 | 826 | data->temp1_##reg); \ |
9a61bf63 | 827 | mutex_unlock(&data->update_lock); \ |
08e7e278 JD |
828 | return count; \ |
829 | } | |
830 | store_temp1_reg(OVER, max); | |
831 | store_temp1_reg(HYST, max_hyst); | |
832 | ||
08e7e278 JD |
833 | #define show_temp_reg(reg) \ |
834 | static ssize_t \ | |
412fec82 YM |
835 | show_##reg(struct device *dev, struct device_attribute *attr, \ |
836 | char *buf) \ | |
08e7e278 JD |
837 | { \ |
838 | struct w83627ehf_data *data = w83627ehf_update_device(dev); \ | |
412fec82 YM |
839 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \ |
840 | int nr = sensor_attr->index; \ | |
08e7e278 JD |
841 | return sprintf(buf, "%d\n", \ |
842 | LM75_TEMP_FROM_REG(data->reg[nr])); \ | |
843 | } | |
844 | show_temp_reg(temp); | |
845 | show_temp_reg(temp_max); | |
846 | show_temp_reg(temp_max_hyst); | |
847 | ||
848 | #define store_temp_reg(REG, reg) \ | |
849 | static ssize_t \ | |
412fec82 YM |
850 | store_##reg(struct device *dev, struct device_attribute *attr, \ |
851 | const char *buf, size_t count) \ | |
08e7e278 | 852 | { \ |
1ea6dd38 | 853 | struct w83627ehf_data *data = dev_get_drvdata(dev); \ |
412fec82 YM |
854 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \ |
855 | int nr = sensor_attr->index; \ | |
5bfedac0 | 856 | long val = simple_strtol(buf, NULL, 10); \ |
08e7e278 | 857 | \ |
9a61bf63 | 858 | mutex_lock(&data->update_lock); \ |
08e7e278 | 859 | data->reg[nr] = LM75_TEMP_TO_REG(val); \ |
1ea6dd38 | 860 | w83627ehf_write_value(data, W83627EHF_REG_TEMP_##REG[nr], \ |
08e7e278 | 861 | data->reg[nr]); \ |
9a61bf63 | 862 | mutex_unlock(&data->update_lock); \ |
08e7e278 JD |
863 | return count; \ |
864 | } | |
865 | store_temp_reg(OVER, temp_max); | |
866 | store_temp_reg(HYST, temp_max_hyst); | |
867 | ||
da667365 JD |
868 | static ssize_t |
869 | show_temp_type(struct device *dev, struct device_attribute *attr, char *buf) | |
870 | { | |
871 | struct w83627ehf_data *data = w83627ehf_update_device(dev); | |
872 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); | |
873 | int nr = sensor_attr->index; | |
874 | return sprintf(buf, "%d\n", (int)data->temp_type[nr]); | |
875 | } | |
876 | ||
a157d06d | 877 | static struct sensor_device_attribute sda_temp_input[] = { |
412fec82 YM |
878 | SENSOR_ATTR(temp1_input, S_IRUGO, show_temp1, NULL, 0), |
879 | SENSOR_ATTR(temp2_input, S_IRUGO, show_temp, NULL, 0), | |
880 | SENSOR_ATTR(temp3_input, S_IRUGO, show_temp, NULL, 1), | |
a157d06d GJ |
881 | }; |
882 | ||
883 | static struct sensor_device_attribute sda_temp_max[] = { | |
412fec82 YM |
884 | SENSOR_ATTR(temp1_max, S_IRUGO | S_IWUSR, show_temp1_max, |
885 | store_temp1_max, 0), | |
886 | SENSOR_ATTR(temp2_max, S_IRUGO | S_IWUSR, show_temp_max, | |
887 | store_temp_max, 0), | |
888 | SENSOR_ATTR(temp3_max, S_IRUGO | S_IWUSR, show_temp_max, | |
889 | store_temp_max, 1), | |
a157d06d GJ |
890 | }; |
891 | ||
892 | static struct sensor_device_attribute sda_temp_max_hyst[] = { | |
412fec82 YM |
893 | SENSOR_ATTR(temp1_max_hyst, S_IRUGO | S_IWUSR, show_temp1_max_hyst, |
894 | store_temp1_max_hyst, 0), | |
895 | SENSOR_ATTR(temp2_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst, | |
896 | store_temp_max_hyst, 0), | |
897 | SENSOR_ATTR(temp3_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst, | |
898 | store_temp_max_hyst, 1), | |
a157d06d GJ |
899 | }; |
900 | ||
901 | static struct sensor_device_attribute sda_temp_alarm[] = { | |
a4589dbb JD |
902 | SENSOR_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4), |
903 | SENSOR_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5), | |
904 | SENSOR_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13), | |
a157d06d GJ |
905 | }; |
906 | ||
907 | static struct sensor_device_attribute sda_temp_type[] = { | |
da667365 JD |
908 | SENSOR_ATTR(temp1_type, S_IRUGO, show_temp_type, NULL, 0), |
909 | SENSOR_ATTR(temp2_type, S_IRUGO, show_temp_type, NULL, 1), | |
910 | SENSOR_ATTR(temp3_type, S_IRUGO, show_temp_type, NULL, 2), | |
412fec82 | 911 | }; |
08e7e278 | 912 | |
08c79950 RM |
913 | #define show_pwm_reg(reg) \ |
914 | static ssize_t show_##reg (struct device *dev, struct device_attribute *attr, \ | |
915 | char *buf) \ | |
916 | { \ | |
917 | struct w83627ehf_data *data = w83627ehf_update_device(dev); \ | |
918 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \ | |
919 | int nr = sensor_attr->index; \ | |
920 | return sprintf(buf, "%d\n", data->reg[nr]); \ | |
921 | } | |
922 | ||
923 | show_pwm_reg(pwm_mode) | |
924 | show_pwm_reg(pwm_enable) | |
925 | show_pwm_reg(pwm) | |
926 | ||
927 | static ssize_t | |
928 | store_pwm_mode(struct device *dev, struct device_attribute *attr, | |
929 | const char *buf, size_t count) | |
930 | { | |
1ea6dd38 | 931 | struct w83627ehf_data *data = dev_get_drvdata(dev); |
08c79950 RM |
932 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); |
933 | int nr = sensor_attr->index; | |
934 | u32 val = simple_strtoul(buf, NULL, 10); | |
935 | u16 reg; | |
936 | ||
937 | if (val > 1) | |
938 | return -EINVAL; | |
939 | mutex_lock(&data->update_lock); | |
1ea6dd38 | 940 | reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[nr]); |
08c79950 RM |
941 | data->pwm_mode[nr] = val; |
942 | reg &= ~(1 << W83627EHF_PWM_MODE_SHIFT[nr]); | |
943 | if (!val) | |
944 | reg |= 1 << W83627EHF_PWM_MODE_SHIFT[nr]; | |
1ea6dd38 | 945 | w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[nr], reg); |
08c79950 RM |
946 | mutex_unlock(&data->update_lock); |
947 | return count; | |
948 | } | |
949 | ||
950 | static ssize_t | |
951 | store_pwm(struct device *dev, struct device_attribute *attr, | |
952 | const char *buf, size_t count) | |
953 | { | |
1ea6dd38 | 954 | struct w83627ehf_data *data = dev_get_drvdata(dev); |
08c79950 RM |
955 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); |
956 | int nr = sensor_attr->index; | |
957 | u32 val = SENSORS_LIMIT(simple_strtoul(buf, NULL, 10), 0, 255); | |
958 | ||
959 | mutex_lock(&data->update_lock); | |
960 | data->pwm[nr] = val; | |
1ea6dd38 | 961 | w83627ehf_write_value(data, W83627EHF_REG_PWM[nr], val); |
08c79950 RM |
962 | mutex_unlock(&data->update_lock); |
963 | return count; | |
964 | } | |
965 | ||
966 | static ssize_t | |
967 | store_pwm_enable(struct device *dev, struct device_attribute *attr, | |
968 | const char *buf, size_t count) | |
969 | { | |
1ea6dd38 | 970 | struct w83627ehf_data *data = dev_get_drvdata(dev); |
08c79950 RM |
971 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); |
972 | int nr = sensor_attr->index; | |
973 | u32 val = simple_strtoul(buf, NULL, 10); | |
974 | u16 reg; | |
975 | ||
976 | if (!val || (val > 2)) /* only modes 1 and 2 are supported */ | |
977 | return -EINVAL; | |
978 | mutex_lock(&data->update_lock); | |
1ea6dd38 | 979 | reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[nr]); |
08c79950 RM |
980 | data->pwm_enable[nr] = val; |
981 | reg &= ~(0x03 << W83627EHF_PWM_ENABLE_SHIFT[nr]); | |
982 | reg |= (val - 1) << W83627EHF_PWM_ENABLE_SHIFT[nr]; | |
1ea6dd38 | 983 | w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[nr], reg); |
08c79950 RM |
984 | mutex_unlock(&data->update_lock); |
985 | return count; | |
986 | } | |
987 | ||
988 | ||
989 | #define show_tol_temp(reg) \ | |
990 | static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \ | |
991 | char *buf) \ | |
992 | { \ | |
993 | struct w83627ehf_data *data = w83627ehf_update_device(dev); \ | |
994 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \ | |
995 | int nr = sensor_attr->index; \ | |
996 | return sprintf(buf, "%d\n", temp1_from_reg(data->reg[nr])); \ | |
997 | } | |
998 | ||
999 | show_tol_temp(tolerance) | |
1000 | show_tol_temp(target_temp) | |
1001 | ||
1002 | static ssize_t | |
1003 | store_target_temp(struct device *dev, struct device_attribute *attr, | |
1004 | const char *buf, size_t count) | |
1005 | { | |
1ea6dd38 | 1006 | struct w83627ehf_data *data = dev_get_drvdata(dev); |
08c79950 RM |
1007 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); |
1008 | int nr = sensor_attr->index; | |
1009 | u8 val = temp1_to_reg(simple_strtoul(buf, NULL, 10), 0, 127000); | |
1010 | ||
1011 | mutex_lock(&data->update_lock); | |
1012 | data->target_temp[nr] = val; | |
1ea6dd38 | 1013 | w83627ehf_write_value(data, W83627EHF_REG_TARGET[nr], val); |
08c79950 RM |
1014 | mutex_unlock(&data->update_lock); |
1015 | return count; | |
1016 | } | |
1017 | ||
1018 | static ssize_t | |
1019 | store_tolerance(struct device *dev, struct device_attribute *attr, | |
1020 | const char *buf, size_t count) | |
1021 | { | |
1ea6dd38 | 1022 | struct w83627ehf_data *data = dev_get_drvdata(dev); |
08c79950 RM |
1023 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); |
1024 | int nr = sensor_attr->index; | |
1025 | u16 reg; | |
1026 | /* Limit the temp to 0C - 15C */ | |
1027 | u8 val = temp1_to_reg(simple_strtoul(buf, NULL, 10), 0, 15000); | |
1028 | ||
1029 | mutex_lock(&data->update_lock); | |
1ea6dd38 | 1030 | reg = w83627ehf_read_value(data, W83627EHF_REG_TOLERANCE[nr]); |
08c79950 RM |
1031 | data->tolerance[nr] = val; |
1032 | if (nr == 1) | |
1033 | reg = (reg & 0x0f) | (val << 4); | |
1034 | else | |
1035 | reg = (reg & 0xf0) | val; | |
1ea6dd38 | 1036 | w83627ehf_write_value(data, W83627EHF_REG_TOLERANCE[nr], reg); |
08c79950 RM |
1037 | mutex_unlock(&data->update_lock); |
1038 | return count; | |
1039 | } | |
1040 | ||
1041 | static struct sensor_device_attribute sda_pwm[] = { | |
1042 | SENSOR_ATTR(pwm1, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0), | |
1043 | SENSOR_ATTR(pwm2, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 1), | |
1044 | SENSOR_ATTR(pwm3, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 2), | |
1045 | SENSOR_ATTR(pwm4, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 3), | |
1046 | }; | |
1047 | ||
1048 | static struct sensor_device_attribute sda_pwm_mode[] = { | |
1049 | SENSOR_ATTR(pwm1_mode, S_IWUSR | S_IRUGO, show_pwm_mode, | |
1050 | store_pwm_mode, 0), | |
1051 | SENSOR_ATTR(pwm2_mode, S_IWUSR | S_IRUGO, show_pwm_mode, | |
1052 | store_pwm_mode, 1), | |
1053 | SENSOR_ATTR(pwm3_mode, S_IWUSR | S_IRUGO, show_pwm_mode, | |
1054 | store_pwm_mode, 2), | |
1055 | SENSOR_ATTR(pwm4_mode, S_IWUSR | S_IRUGO, show_pwm_mode, | |
1056 | store_pwm_mode, 3), | |
1057 | }; | |
1058 | ||
1059 | static struct sensor_device_attribute sda_pwm_enable[] = { | |
1060 | SENSOR_ATTR(pwm1_enable, S_IWUSR | S_IRUGO, show_pwm_enable, | |
1061 | store_pwm_enable, 0), | |
1062 | SENSOR_ATTR(pwm2_enable, S_IWUSR | S_IRUGO, show_pwm_enable, | |
1063 | store_pwm_enable, 1), | |
1064 | SENSOR_ATTR(pwm3_enable, S_IWUSR | S_IRUGO, show_pwm_enable, | |
1065 | store_pwm_enable, 2), | |
1066 | SENSOR_ATTR(pwm4_enable, S_IWUSR | S_IRUGO, show_pwm_enable, | |
1067 | store_pwm_enable, 3), | |
1068 | }; | |
1069 | ||
1070 | static struct sensor_device_attribute sda_target_temp[] = { | |
1071 | SENSOR_ATTR(pwm1_target, S_IWUSR | S_IRUGO, show_target_temp, | |
1072 | store_target_temp, 0), | |
1073 | SENSOR_ATTR(pwm2_target, S_IWUSR | S_IRUGO, show_target_temp, | |
1074 | store_target_temp, 1), | |
1075 | SENSOR_ATTR(pwm3_target, S_IWUSR | S_IRUGO, show_target_temp, | |
1076 | store_target_temp, 2), | |
1077 | SENSOR_ATTR(pwm4_target, S_IWUSR | S_IRUGO, show_target_temp, | |
1078 | store_target_temp, 3), | |
1079 | }; | |
1080 | ||
1081 | static struct sensor_device_attribute sda_tolerance[] = { | |
1082 | SENSOR_ATTR(pwm1_tolerance, S_IWUSR | S_IRUGO, show_tolerance, | |
1083 | store_tolerance, 0), | |
1084 | SENSOR_ATTR(pwm2_tolerance, S_IWUSR | S_IRUGO, show_tolerance, | |
1085 | store_tolerance, 1), | |
1086 | SENSOR_ATTR(pwm3_tolerance, S_IWUSR | S_IRUGO, show_tolerance, | |
1087 | store_tolerance, 2), | |
1088 | SENSOR_ATTR(pwm4_tolerance, S_IWUSR | S_IRUGO, show_tolerance, | |
1089 | store_tolerance, 3), | |
1090 | }; | |
1091 | ||
08c79950 RM |
1092 | /* Smart Fan registers */ |
1093 | ||
1094 | #define fan_functions(reg, REG) \ | |
1095 | static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \ | |
1096 | char *buf) \ | |
1097 | { \ | |
1098 | struct w83627ehf_data *data = w83627ehf_update_device(dev); \ | |
1099 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \ | |
1100 | int nr = sensor_attr->index; \ | |
1101 | return sprintf(buf, "%d\n", data->reg[nr]); \ | |
1102 | }\ | |
1103 | static ssize_t \ | |
1104 | store_##reg(struct device *dev, struct device_attribute *attr, \ | |
1105 | const char *buf, size_t count) \ | |
1106 | {\ | |
1ea6dd38 | 1107 | struct w83627ehf_data *data = dev_get_drvdata(dev); \ |
08c79950 RM |
1108 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \ |
1109 | int nr = sensor_attr->index; \ | |
1110 | u32 val = SENSORS_LIMIT(simple_strtoul(buf, NULL, 10), 1, 255); \ | |
1111 | mutex_lock(&data->update_lock); \ | |
1112 | data->reg[nr] = val; \ | |
1ea6dd38 | 1113 | w83627ehf_write_value(data, W83627EHF_REG_##REG[nr], val); \ |
08c79950 RM |
1114 | mutex_unlock(&data->update_lock); \ |
1115 | return count; \ | |
1116 | } | |
1117 | ||
1118 | fan_functions(fan_min_output, FAN_MIN_OUTPUT) | |
1119 | ||
1120 | #define fan_time_functions(reg, REG) \ | |
1121 | static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \ | |
1122 | char *buf) \ | |
1123 | { \ | |
1124 | struct w83627ehf_data *data = w83627ehf_update_device(dev); \ | |
1125 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \ | |
1126 | int nr = sensor_attr->index; \ | |
1127 | return sprintf(buf, "%d\n", \ | |
1128 | step_time_from_reg(data->reg[nr], data->pwm_mode[nr])); \ | |
1129 | } \ | |
1130 | \ | |
1131 | static ssize_t \ | |
1132 | store_##reg(struct device *dev, struct device_attribute *attr, \ | |
1133 | const char *buf, size_t count) \ | |
1134 | { \ | |
1ea6dd38 | 1135 | struct w83627ehf_data *data = dev_get_drvdata(dev); \ |
08c79950 RM |
1136 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \ |
1137 | int nr = sensor_attr->index; \ | |
1138 | u8 val = step_time_to_reg(simple_strtoul(buf, NULL, 10), \ | |
1139 | data->pwm_mode[nr]); \ | |
1140 | mutex_lock(&data->update_lock); \ | |
1141 | data->reg[nr] = val; \ | |
1ea6dd38 | 1142 | w83627ehf_write_value(data, W83627EHF_REG_##REG[nr], val); \ |
08c79950 RM |
1143 | mutex_unlock(&data->update_lock); \ |
1144 | return count; \ | |
1145 | } \ | |
1146 | ||
1147 | fan_time_functions(fan_stop_time, FAN_STOP_TIME) | |
1148 | ||
1ea6dd38 DH |
1149 | static ssize_t show_name(struct device *dev, struct device_attribute *attr, |
1150 | char *buf) | |
1151 | { | |
1152 | struct w83627ehf_data *data = dev_get_drvdata(dev); | |
1153 | ||
1154 | return sprintf(buf, "%s\n", data->name); | |
1155 | } | |
1156 | static DEVICE_ATTR(name, S_IRUGO, show_name, NULL); | |
08c79950 RM |
1157 | |
1158 | static struct sensor_device_attribute sda_sf3_arrays_fan4[] = { | |
1159 | SENSOR_ATTR(pwm4_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time, | |
1160 | store_fan_stop_time, 3), | |
1161 | SENSOR_ATTR(pwm4_min_output, S_IWUSR | S_IRUGO, show_fan_min_output, | |
1162 | store_fan_min_output, 3), | |
1163 | }; | |
1164 | ||
1165 | static struct sensor_device_attribute sda_sf3_arrays[] = { | |
1166 | SENSOR_ATTR(pwm1_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time, | |
1167 | store_fan_stop_time, 0), | |
1168 | SENSOR_ATTR(pwm2_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time, | |
1169 | store_fan_stop_time, 1), | |
1170 | SENSOR_ATTR(pwm3_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time, | |
1171 | store_fan_stop_time, 2), | |
1172 | SENSOR_ATTR(pwm1_min_output, S_IWUSR | S_IRUGO, show_fan_min_output, | |
1173 | store_fan_min_output, 0), | |
1174 | SENSOR_ATTR(pwm2_min_output, S_IWUSR | S_IRUGO, show_fan_min_output, | |
1175 | store_fan_min_output, 1), | |
1176 | SENSOR_ATTR(pwm3_min_output, S_IWUSR | S_IRUGO, show_fan_min_output, | |
1177 | store_fan_min_output, 2), | |
1178 | }; | |
1179 | ||
fc18d6c0 JD |
1180 | static ssize_t |
1181 | show_vid(struct device *dev, struct device_attribute *attr, char *buf) | |
1182 | { | |
1183 | struct w83627ehf_data *data = dev_get_drvdata(dev); | |
1184 | return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm)); | |
1185 | } | |
1186 | static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL); | |
1187 | ||
08e7e278 | 1188 | /* |
1ea6dd38 | 1189 | * Driver and device management |
08e7e278 JD |
1190 | */ |
1191 | ||
c18beb5b DH |
1192 | static void w83627ehf_device_remove_files(struct device *dev) |
1193 | { | |
1194 | /* some entries in the following arrays may not have been used in | |
1195 | * device_create_file(), but device_remove_file() will ignore them */ | |
1196 | int i; | |
1ea6dd38 | 1197 | struct w83627ehf_data *data = dev_get_drvdata(dev); |
c18beb5b DH |
1198 | |
1199 | for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays); i++) | |
1200 | device_remove_file(dev, &sda_sf3_arrays[i].dev_attr); | |
1201 | for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan4); i++) | |
1202 | device_remove_file(dev, &sda_sf3_arrays_fan4[i].dev_attr); | |
1ea6dd38 | 1203 | for (i = 0; i < data->in_num; i++) { |
a157d06d GJ |
1204 | if ((i == 6) && data->in6_skip) |
1205 | continue; | |
c18beb5b DH |
1206 | device_remove_file(dev, &sda_in_input[i].dev_attr); |
1207 | device_remove_file(dev, &sda_in_alarm[i].dev_attr); | |
1208 | device_remove_file(dev, &sda_in_min[i].dev_attr); | |
1209 | device_remove_file(dev, &sda_in_max[i].dev_attr); | |
1210 | } | |
1211 | for (i = 0; i < 5; i++) { | |
1212 | device_remove_file(dev, &sda_fan_input[i].dev_attr); | |
1213 | device_remove_file(dev, &sda_fan_alarm[i].dev_attr); | |
1214 | device_remove_file(dev, &sda_fan_div[i].dev_attr); | |
1215 | device_remove_file(dev, &sda_fan_min[i].dev_attr); | |
1216 | } | |
237c8d2f | 1217 | for (i = 0; i < data->pwm_num; i++) { |
c18beb5b DH |
1218 | device_remove_file(dev, &sda_pwm[i].dev_attr); |
1219 | device_remove_file(dev, &sda_pwm_mode[i].dev_attr); | |
1220 | device_remove_file(dev, &sda_pwm_enable[i].dev_attr); | |
1221 | device_remove_file(dev, &sda_target_temp[i].dev_attr); | |
1222 | device_remove_file(dev, &sda_tolerance[i].dev_attr); | |
1223 | } | |
a157d06d GJ |
1224 | for (i = 0; i < 3; i++) { |
1225 | if ((i == 2) && data->temp3_disable) | |
1226 | continue; | |
1227 | device_remove_file(dev, &sda_temp_input[i].dev_attr); | |
1228 | device_remove_file(dev, &sda_temp_max[i].dev_attr); | |
1229 | device_remove_file(dev, &sda_temp_max_hyst[i].dev_attr); | |
1230 | device_remove_file(dev, &sda_temp_alarm[i].dev_attr); | |
1231 | device_remove_file(dev, &sda_temp_type[i].dev_attr); | |
1232 | } | |
c18beb5b | 1233 | |
1ea6dd38 | 1234 | device_remove_file(dev, &dev_attr_name); |
cbe311f2 | 1235 | device_remove_file(dev, &dev_attr_cpu0_vid); |
1ea6dd38 | 1236 | } |
08e7e278 | 1237 | |
1ea6dd38 DH |
1238 | /* Get the monitoring functions started */ |
1239 | static inline void __devinit w83627ehf_init_device(struct w83627ehf_data *data) | |
08e7e278 JD |
1240 | { |
1241 | int i; | |
da667365 | 1242 | u8 tmp, diode; |
08e7e278 JD |
1243 | |
1244 | /* Start monitoring is needed */ | |
1ea6dd38 | 1245 | tmp = w83627ehf_read_value(data, W83627EHF_REG_CONFIG); |
08e7e278 | 1246 | if (!(tmp & 0x01)) |
1ea6dd38 | 1247 | w83627ehf_write_value(data, W83627EHF_REG_CONFIG, |
08e7e278 JD |
1248 | tmp | 0x01); |
1249 | ||
1250 | /* Enable temp2 and temp3 if needed */ | |
1251 | for (i = 0; i < 2; i++) { | |
1ea6dd38 | 1252 | tmp = w83627ehf_read_value(data, |
08e7e278 | 1253 | W83627EHF_REG_TEMP_CONFIG[i]); |
a157d06d GJ |
1254 | if ((i == 1) && data->temp3_disable) |
1255 | continue; | |
08e7e278 | 1256 | if (tmp & 0x01) |
1ea6dd38 | 1257 | w83627ehf_write_value(data, |
08e7e278 JD |
1258 | W83627EHF_REG_TEMP_CONFIG[i], |
1259 | tmp & 0xfe); | |
1260 | } | |
d3130f0e JD |
1261 | |
1262 | /* Enable VBAT monitoring if needed */ | |
1263 | tmp = w83627ehf_read_value(data, W83627EHF_REG_VBAT); | |
1264 | if (!(tmp & 0x01)) | |
1265 | w83627ehf_write_value(data, W83627EHF_REG_VBAT, tmp | 0x01); | |
da667365 JD |
1266 | |
1267 | /* Get thermal sensor types */ | |
1268 | diode = w83627ehf_read_value(data, W83627EHF_REG_DIODE); | |
1269 | for (i = 0; i < 3; i++) { | |
1270 | if ((tmp & (0x02 << i))) | |
1271 | data->temp_type[i] = (diode & (0x10 << i)) ? 1 : 2; | |
1272 | else | |
1273 | data->temp_type[i] = 4; /* thermistor */ | |
1274 | } | |
08e7e278 JD |
1275 | } |
1276 | ||
1ea6dd38 | 1277 | static int __devinit w83627ehf_probe(struct platform_device *pdev) |
08e7e278 | 1278 | { |
1ea6dd38 DH |
1279 | struct device *dev = &pdev->dev; |
1280 | struct w83627ehf_sio_data *sio_data = dev->platform_data; | |
08e7e278 | 1281 | struct w83627ehf_data *data; |
1ea6dd38 | 1282 | struct resource *res; |
fc18d6c0 | 1283 | u8 fan4pin, fan5pin, en_vrm10; |
08e7e278 JD |
1284 | int i, err = 0; |
1285 | ||
1ea6dd38 DH |
1286 | res = platform_get_resource(pdev, IORESOURCE_IO, 0); |
1287 | if (!request_region(res->start, IOREGION_LENGTH, DRVNAME)) { | |
08e7e278 | 1288 | err = -EBUSY; |
1ea6dd38 DH |
1289 | dev_err(dev, "Failed to request region 0x%lx-0x%lx\n", |
1290 | (unsigned long)res->start, | |
1291 | (unsigned long)res->start + IOREGION_LENGTH - 1); | |
08e7e278 JD |
1292 | goto exit; |
1293 | } | |
1294 | ||
ba9c2e8d | 1295 | if (!(data = kzalloc(sizeof(struct w83627ehf_data), GFP_KERNEL))) { |
08e7e278 JD |
1296 | err = -ENOMEM; |
1297 | goto exit_release; | |
1298 | } | |
08e7e278 | 1299 | |
1ea6dd38 | 1300 | data->addr = res->start; |
9a61bf63 | 1301 | mutex_init(&data->lock); |
9a61bf63 | 1302 | mutex_init(&data->update_lock); |
1ea6dd38 DH |
1303 | data->name = w83627ehf_device_names[sio_data->kind]; |
1304 | platform_set_drvdata(pdev, data); | |
08e7e278 | 1305 | |
237c8d2f GJ |
1306 | /* 627EHG and 627EHF have 10 voltage inputs; 627DHG and 667HG have 9 */ |
1307 | data->in_num = (sio_data->kind == w83627ehf) ? 10 : 9; | |
1308 | /* 667HG has 3 pwms */ | |
1309 | data->pwm_num = (sio_data->kind == w83667hg) ? 3 : 4; | |
08e7e278 | 1310 | |
a157d06d GJ |
1311 | /* Check temp3 configuration bit for 667HG */ |
1312 | if (sio_data->kind == w83667hg) { | |
1313 | data->temp3_disable = w83627ehf_read_value(data, | |
1314 | W83627EHF_REG_TEMP_CONFIG[1]) & 0x01; | |
1315 | data->in6_skip = !data->temp3_disable; | |
1316 | } | |
1317 | ||
08e7e278 | 1318 | /* Initialize the chip */ |
1ea6dd38 | 1319 | w83627ehf_init_device(data); |
08e7e278 | 1320 | |
fc18d6c0 JD |
1321 | data->vrm = vid_which_vrm(); |
1322 | superio_enter(sio_data->sioreg); | |
fc18d6c0 | 1323 | /* Read VID value */ |
237c8d2f GJ |
1324 | if (sio_data->kind == w83667hg) { |
1325 | /* W83667HG has different pins for VID input and output, so | |
1326 | we can get the VID input values directly at logical device D | |
1327 | 0xe3. */ | |
1328 | superio_select(sio_data->sioreg, W83667HG_LD_VID); | |
1329 | data->vid = superio_inb(sio_data->sioreg, 0xe3); | |
cbe311f2 JD |
1330 | err = device_create_file(dev, &dev_attr_cpu0_vid); |
1331 | if (err) | |
1332 | goto exit_release; | |
58e6e781 | 1333 | } else { |
237c8d2f GJ |
1334 | superio_select(sio_data->sioreg, W83627EHF_LD_HWM); |
1335 | if (superio_inb(sio_data->sioreg, SIO_REG_VID_CTRL) & 0x80) { | |
1336 | /* Set VID input sensibility if needed. In theory the | |
1337 | BIOS should have set it, but in practice it's not | |
1338 | always the case. We only do it for the W83627EHF/EHG | |
1339 | because the W83627DHG is more complex in this | |
1340 | respect. */ | |
1341 | if (sio_data->kind == w83627ehf) { | |
1342 | en_vrm10 = superio_inb(sio_data->sioreg, | |
1343 | SIO_REG_EN_VRM10); | |
1344 | if ((en_vrm10 & 0x08) && data->vrm == 90) { | |
1345 | dev_warn(dev, "Setting VID input " | |
1346 | "voltage to TTL\n"); | |
1347 | superio_outb(sio_data->sioreg, | |
1348 | SIO_REG_EN_VRM10, | |
1349 | en_vrm10 & ~0x08); | |
1350 | } else if (!(en_vrm10 & 0x08) | |
1351 | && data->vrm == 100) { | |
1352 | dev_warn(dev, "Setting VID input " | |
1353 | "voltage to VRM10\n"); | |
1354 | superio_outb(sio_data->sioreg, | |
1355 | SIO_REG_EN_VRM10, | |
1356 | en_vrm10 | 0x08); | |
1357 | } | |
1358 | } | |
1359 | ||
1360 | data->vid = superio_inb(sio_data->sioreg, | |
1361 | SIO_REG_VID_DATA); | |
1362 | if (sio_data->kind == w83627ehf) /* 6 VID pins only */ | |
1363 | data->vid &= 0x3f; | |
1364 | ||
1365 | err = device_create_file(dev, &dev_attr_cpu0_vid); | |
1366 | if (err) | |
1367 | goto exit_release; | |
1368 | } else { | |
1369 | dev_info(dev, "VID pins in output mode, CPU VID not " | |
1370 | "available\n"); | |
1371 | } | |
fc18d6c0 JD |
1372 | } |
1373 | ||
08c79950 | 1374 | /* fan4 and fan5 share some pins with the GPIO and serial flash */ |
237c8d2f GJ |
1375 | if (sio_data->kind == w83667hg) { |
1376 | fan5pin = superio_inb(sio_data->sioreg, 0x27) & 0x20; | |
1377 | fan4pin = superio_inb(sio_data->sioreg, 0x27) & 0x40; | |
1378 | } else { | |
1379 | fan5pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x02); | |
1380 | fan4pin = !(superio_inb(sio_data->sioreg, 0x29) & 0x06); | |
1381 | } | |
1ea6dd38 | 1382 | superio_exit(sio_data->sioreg); |
08c79950 | 1383 | |
08e7e278 | 1384 | /* It looks like fan4 and fan5 pins can be alternatively used |
14992c7e RM |
1385 | as fan on/off switches, but fan5 control is write only :/ |
1386 | We assume that if the serial interface is disabled, designers | |
1387 | connected fan5 as input unless they are emitting log 1, which | |
1388 | is not the default. */ | |
08c79950 | 1389 | |
08e7e278 | 1390 | data->has_fan = 0x07; /* fan1, fan2 and fan3 */ |
1ea6dd38 | 1391 | i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1); |
1704b26e | 1392 | if ((i & (1 << 2)) && fan4pin) |
08e7e278 | 1393 | data->has_fan |= (1 << 3); |
1704b26e | 1394 | if (!(i & (1 << 1)) && fan5pin) |
08e7e278 JD |
1395 | data->has_fan |= (1 << 4); |
1396 | ||
ea7be66c MH |
1397 | /* Read fan clock dividers immediately */ |
1398 | w83627ehf_update_fan_div(data); | |
1399 | ||
08e7e278 | 1400 | /* Register sysfs hooks */ |
08c79950 | 1401 | for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays); i++) |
c18beb5b DH |
1402 | if ((err = device_create_file(dev, |
1403 | &sda_sf3_arrays[i].dev_attr))) | |
1404 | goto exit_remove; | |
08c79950 RM |
1405 | |
1406 | /* if fan4 is enabled create the sf3 files for it */ | |
237c8d2f | 1407 | if ((data->has_fan & (1 << 3)) && data->pwm_num >= 4) |
c18beb5b DH |
1408 | for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan4); i++) { |
1409 | if ((err = device_create_file(dev, | |
1410 | &sda_sf3_arrays_fan4[i].dev_attr))) | |
1411 | goto exit_remove; | |
1412 | } | |
08c79950 | 1413 | |
a157d06d GJ |
1414 | for (i = 0; i < data->in_num; i++) { |
1415 | if ((i == 6) && data->in6_skip) | |
1416 | continue; | |
c18beb5b DH |
1417 | if ((err = device_create_file(dev, &sda_in_input[i].dev_attr)) |
1418 | || (err = device_create_file(dev, | |
1419 | &sda_in_alarm[i].dev_attr)) | |
1420 | || (err = device_create_file(dev, | |
1421 | &sda_in_min[i].dev_attr)) | |
1422 | || (err = device_create_file(dev, | |
1423 | &sda_in_max[i].dev_attr))) | |
1424 | goto exit_remove; | |
a157d06d | 1425 | } |
cf0676fe | 1426 | |
412fec82 | 1427 | for (i = 0; i < 5; i++) { |
08c79950 | 1428 | if (data->has_fan & (1 << i)) { |
c18beb5b DH |
1429 | if ((err = device_create_file(dev, |
1430 | &sda_fan_input[i].dev_attr)) | |
1431 | || (err = device_create_file(dev, | |
1432 | &sda_fan_alarm[i].dev_attr)) | |
1433 | || (err = device_create_file(dev, | |
1434 | &sda_fan_div[i].dev_attr)) | |
1435 | || (err = device_create_file(dev, | |
1436 | &sda_fan_min[i].dev_attr))) | |
1437 | goto exit_remove; | |
237c8d2f | 1438 | if (i < data->pwm_num && |
c18beb5b DH |
1439 | ((err = device_create_file(dev, |
1440 | &sda_pwm[i].dev_attr)) | |
1441 | || (err = device_create_file(dev, | |
1442 | &sda_pwm_mode[i].dev_attr)) | |
1443 | || (err = device_create_file(dev, | |
1444 | &sda_pwm_enable[i].dev_attr)) | |
1445 | || (err = device_create_file(dev, | |
1446 | &sda_target_temp[i].dev_attr)) | |
1447 | || (err = device_create_file(dev, | |
1448 | &sda_tolerance[i].dev_attr)))) | |
1449 | goto exit_remove; | |
08c79950 | 1450 | } |
08e7e278 | 1451 | } |
08c79950 | 1452 | |
a157d06d GJ |
1453 | for (i = 0; i < 3; i++) { |
1454 | if ((i == 2) && data->temp3_disable) | |
1455 | continue; | |
1456 | if ((err = device_create_file(dev, | |
1457 | &sda_temp_input[i].dev_attr)) | |
1458 | || (err = device_create_file(dev, | |
1459 | &sda_temp_max[i].dev_attr)) | |
1460 | || (err = device_create_file(dev, | |
1461 | &sda_temp_max_hyst[i].dev_attr)) | |
1462 | || (err = device_create_file(dev, | |
1463 | &sda_temp_alarm[i].dev_attr)) | |
1464 | || (err = device_create_file(dev, | |
1465 | &sda_temp_type[i].dev_attr))) | |
c18beb5b | 1466 | goto exit_remove; |
a157d06d | 1467 | } |
c18beb5b | 1468 | |
1ea6dd38 DH |
1469 | err = device_create_file(dev, &dev_attr_name); |
1470 | if (err) | |
1471 | goto exit_remove; | |
1472 | ||
1beeffe4 TJ |
1473 | data->hwmon_dev = hwmon_device_register(dev); |
1474 | if (IS_ERR(data->hwmon_dev)) { | |
1475 | err = PTR_ERR(data->hwmon_dev); | |
c18beb5b DH |
1476 | goto exit_remove; |
1477 | } | |
08e7e278 JD |
1478 | |
1479 | return 0; | |
1480 | ||
c18beb5b DH |
1481 | exit_remove: |
1482 | w83627ehf_device_remove_files(dev); | |
08e7e278 | 1483 | kfree(data); |
1ea6dd38 | 1484 | platform_set_drvdata(pdev, NULL); |
08e7e278 | 1485 | exit_release: |
1ea6dd38 | 1486 | release_region(res->start, IOREGION_LENGTH); |
08e7e278 JD |
1487 | exit: |
1488 | return err; | |
1489 | } | |
1490 | ||
1ea6dd38 | 1491 | static int __devexit w83627ehf_remove(struct platform_device *pdev) |
08e7e278 | 1492 | { |
1ea6dd38 | 1493 | struct w83627ehf_data *data = platform_get_drvdata(pdev); |
08e7e278 | 1494 | |
1beeffe4 | 1495 | hwmon_device_unregister(data->hwmon_dev); |
1ea6dd38 DH |
1496 | w83627ehf_device_remove_files(&pdev->dev); |
1497 | release_region(data->addr, IOREGION_LENGTH); | |
1498 | platform_set_drvdata(pdev, NULL); | |
943b0830 | 1499 | kfree(data); |
08e7e278 JD |
1500 | |
1501 | return 0; | |
1502 | } | |
1503 | ||
1ea6dd38 | 1504 | static struct platform_driver w83627ehf_driver = { |
cdaf7934 | 1505 | .driver = { |
87218842 | 1506 | .owner = THIS_MODULE, |
1ea6dd38 | 1507 | .name = DRVNAME, |
cdaf7934 | 1508 | }, |
1ea6dd38 DH |
1509 | .probe = w83627ehf_probe, |
1510 | .remove = __devexit_p(w83627ehf_remove), | |
08e7e278 JD |
1511 | }; |
1512 | ||
1ea6dd38 DH |
1513 | /* w83627ehf_find() looks for a '627 in the Super-I/O config space */ |
1514 | static int __init w83627ehf_find(int sioaddr, unsigned short *addr, | |
1515 | struct w83627ehf_sio_data *sio_data) | |
08e7e278 | 1516 | { |
1ea6dd38 DH |
1517 | static const char __initdata sio_name_W83627EHF[] = "W83627EHF"; |
1518 | static const char __initdata sio_name_W83627EHG[] = "W83627EHG"; | |
1519 | static const char __initdata sio_name_W83627DHG[] = "W83627DHG"; | |
237c8d2f | 1520 | static const char __initdata sio_name_W83667HG[] = "W83667HG"; |
1ea6dd38 | 1521 | |
08e7e278 | 1522 | u16 val; |
1ea6dd38 | 1523 | const char *sio_name; |
08e7e278 | 1524 | |
1ea6dd38 | 1525 | superio_enter(sioaddr); |
08e7e278 | 1526 | |
67b671bc JD |
1527 | if (force_id) |
1528 | val = force_id; | |
1529 | else | |
1530 | val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8) | |
1531 | | superio_inb(sioaddr, SIO_REG_DEVID + 1); | |
657c93b1 | 1532 | switch (val & SIO_ID_MASK) { |
657c93b1 | 1533 | case SIO_W83627EHF_ID: |
1ea6dd38 DH |
1534 | sio_data->kind = w83627ehf; |
1535 | sio_name = sio_name_W83627EHF; | |
1536 | break; | |
657c93b1 | 1537 | case SIO_W83627EHG_ID: |
1ea6dd38 DH |
1538 | sio_data->kind = w83627ehf; |
1539 | sio_name = sio_name_W83627EHG; | |
1540 | break; | |
1541 | case SIO_W83627DHG_ID: | |
1542 | sio_data->kind = w83627dhg; | |
1543 | sio_name = sio_name_W83627DHG; | |
657c93b1 | 1544 | break; |
237c8d2f GJ |
1545 | case SIO_W83667HG_ID: |
1546 | sio_data->kind = w83667hg; | |
1547 | sio_name = sio_name_W83667HG; | |
1548 | break; | |
657c93b1 | 1549 | default: |
9f66036b JD |
1550 | if (val != 0xffff) |
1551 | pr_debug(DRVNAME ": unsupported chip ID: 0x%04x\n", | |
1552 | val); | |
1ea6dd38 | 1553 | superio_exit(sioaddr); |
08e7e278 JD |
1554 | return -ENODEV; |
1555 | } | |
1556 | ||
1ea6dd38 DH |
1557 | /* We have a known chip, find the HWM I/O address */ |
1558 | superio_select(sioaddr, W83627EHF_LD_HWM); | |
1559 | val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8) | |
1560 | | superio_inb(sioaddr, SIO_REG_ADDR + 1); | |
1a641fce | 1561 | *addr = val & IOREGION_ALIGNMENT; |
2d8672c5 | 1562 | if (*addr == 0) { |
475ef855 DH |
1563 | printk(KERN_ERR DRVNAME ": Refusing to enable a Super-I/O " |
1564 | "device with a base I/O port 0.\n"); | |
1ea6dd38 | 1565 | superio_exit(sioaddr); |
08e7e278 JD |
1566 | return -ENODEV; |
1567 | } | |
1568 | ||
1569 | /* Activate logical device if needed */ | |
1ea6dd38 | 1570 | val = superio_inb(sioaddr, SIO_REG_ENABLE); |
475ef855 DH |
1571 | if (!(val & 0x01)) { |
1572 | printk(KERN_WARNING DRVNAME ": Forcibly enabling Super-I/O. " | |
1573 | "Sensor is probably unusable.\n"); | |
1ea6dd38 | 1574 | superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01); |
475ef855 | 1575 | } |
1ea6dd38 DH |
1576 | |
1577 | superio_exit(sioaddr); | |
1578 | pr_info(DRVNAME ": Found %s chip at %#x\n", sio_name, *addr); | |
1579 | sio_data->sioreg = sioaddr; | |
08e7e278 | 1580 | |
08e7e278 JD |
1581 | return 0; |
1582 | } | |
1583 | ||
1ea6dd38 DH |
1584 | /* when Super-I/O functions move to a separate file, the Super-I/O |
1585 | * bus will manage the lifetime of the device and this module will only keep | |
1586 | * track of the w83627ehf driver. But since we platform_device_alloc(), we | |
1587 | * must keep track of the device */ | |
1588 | static struct platform_device *pdev; | |
1589 | ||
08e7e278 JD |
1590 | static int __init sensors_w83627ehf_init(void) |
1591 | { | |
1ea6dd38 DH |
1592 | int err; |
1593 | unsigned short address; | |
1594 | struct resource res; | |
1595 | struct w83627ehf_sio_data sio_data; | |
1596 | ||
1597 | /* initialize sio_data->kind and sio_data->sioreg. | |
1598 | * | |
1599 | * when Super-I/O functions move to a separate file, the Super-I/O | |
1600 | * driver will probe 0x2e and 0x4e and auto-detect the presence of a | |
1601 | * w83627ehf hardware monitor, and call probe() */ | |
1602 | if (w83627ehf_find(0x2e, &address, &sio_data) && | |
1603 | w83627ehf_find(0x4e, &address, &sio_data)) | |
08e7e278 JD |
1604 | return -ENODEV; |
1605 | ||
1ea6dd38 DH |
1606 | err = platform_driver_register(&w83627ehf_driver); |
1607 | if (err) | |
1608 | goto exit; | |
1609 | ||
1610 | if (!(pdev = platform_device_alloc(DRVNAME, address))) { | |
1611 | err = -ENOMEM; | |
1612 | printk(KERN_ERR DRVNAME ": Device allocation failed\n"); | |
1613 | goto exit_unregister; | |
1614 | } | |
1615 | ||
1616 | err = platform_device_add_data(pdev, &sio_data, | |
1617 | sizeof(struct w83627ehf_sio_data)); | |
1618 | if (err) { | |
1619 | printk(KERN_ERR DRVNAME ": Platform data allocation failed\n"); | |
1620 | goto exit_device_put; | |
1621 | } | |
1622 | ||
1623 | memset(&res, 0, sizeof(res)); | |
1624 | res.name = DRVNAME; | |
1625 | res.start = address + IOREGION_OFFSET; | |
1626 | res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1; | |
1627 | res.flags = IORESOURCE_IO; | |
b9acb64a JD |
1628 | |
1629 | err = acpi_check_resource_conflict(&res); | |
1630 | if (err) | |
18632f84 | 1631 | goto exit_device_put; |
b9acb64a | 1632 | |
1ea6dd38 DH |
1633 | err = platform_device_add_resources(pdev, &res, 1); |
1634 | if (err) { | |
1635 | printk(KERN_ERR DRVNAME ": Device resource addition failed " | |
1636 | "(%d)\n", err); | |
1637 | goto exit_device_put; | |
1638 | } | |
1639 | ||
1640 | /* platform_device_add calls probe() */ | |
1641 | err = platform_device_add(pdev); | |
1642 | if (err) { | |
1643 | printk(KERN_ERR DRVNAME ": Device addition failed (%d)\n", | |
1644 | err); | |
1645 | goto exit_device_put; | |
1646 | } | |
1647 | ||
1648 | return 0; | |
1649 | ||
1650 | exit_device_put: | |
1651 | platform_device_put(pdev); | |
1652 | exit_unregister: | |
1653 | platform_driver_unregister(&w83627ehf_driver); | |
1654 | exit: | |
1655 | return err; | |
08e7e278 JD |
1656 | } |
1657 | ||
1658 | static void __exit sensors_w83627ehf_exit(void) | |
1659 | { | |
1ea6dd38 DH |
1660 | platform_device_unregister(pdev); |
1661 | platform_driver_unregister(&w83627ehf_driver); | |
08e7e278 JD |
1662 | } |
1663 | ||
1664 | MODULE_AUTHOR("Jean Delvare <khali@linux-fr.org>"); | |
1665 | MODULE_DESCRIPTION("W83627EHF driver"); | |
1666 | MODULE_LICENSE("GPL"); | |
1667 | ||
1668 | module_init(sensors_w83627ehf_init); | |
1669 | module_exit(sensors_w83627ehf_exit); |