]> git.proxmox.com Git - mirror_ubuntu-zesty-kernel.git/blame - drivers/hwmon/w83781d.c
[PATCH] kfree cleanup: drivers/media
[mirror_ubuntu-zesty-kernel.git] / drivers / hwmon / w83781d.c
CommitLineData
1da177e4
LT
1/*
2 w83781d.c - Part of lm_sensors, Linux kernel modules for hardware
3 monitoring
4 Copyright (c) 1998 - 2001 Frodo Looijaard <frodol@dds.nl>,
5 Philip Edelbrock <phil@netroedge.com>,
6 and Mark Studebaker <mdsxyz123@yahoo.com>
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21*/
22
23/*
24 Supports following chips:
25
26 Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
27 as99127f 7 3 0 3 0x31 0x12c3 yes no
28 as99127f rev.2 (type_name = as99127f) 0x31 0x5ca3 yes no
29 w83781d 7 3 0 3 0x10-1 0x5ca3 yes yes
30 w83627hf 9 3 2 3 0x21 0x5ca3 yes yes(LPC)
1da177e4
LT
31 w83782d 9 3 2-4 3 0x30 0x5ca3 yes yes
32 w83783s 5-6 3 2 1-2 0x40 0x5ca3 yes no
1da177e4
LT
33
34*/
35
1da177e4
LT
36#include <linux/module.h>
37#include <linux/init.h>
38#include <linux/slab.h>
39#include <linux/jiffies.h>
40#include <linux/i2c.h>
fde09509 41#include <linux/i2c-isa.h>
943b0830 42#include <linux/hwmon.h>
303760b4 43#include <linux/hwmon-vid.h>
943b0830 44#include <linux/err.h>
1da177e4
LT
45#include <asm/io.h>
46#include "lm75.h"
47
48/* Addresses to scan */
49static unsigned short normal_i2c[] = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25,
50 0x26, 0x27, 0x28, 0x29, 0x2a, 0x2b,
51 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END };
2d8672c5 52static unsigned short isa_address = 0x290;
1da177e4
LT
53
54/* Insmod parameters */
f4b50261 55I2C_CLIENT_INSMOD_5(w83781d, w83782d, w83783s, w83627hf, as99127f);
1da177e4
LT
56I2C_CLIENT_MODULE_PARM(force_subclients, "List of subclient addresses: "
57 "{bus, clientaddr, subclientaddr1, subclientaddr2}");
58
59static int init = 1;
60module_param(init, bool, 0);
61MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
62
63/* Constants specified below */
64
65/* Length of ISA address segment */
66#define W83781D_EXTENT 8
67
68/* Where are the ISA address/data registers relative to the base address */
69#define W83781D_ADDR_REG_OFFSET 5
70#define W83781D_DATA_REG_OFFSET 6
71
72/* The W83781D registers */
73/* The W83782D registers for nr=7,8 are in bank 5 */
74#define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
75 (0x554 + (((nr) - 7) * 2)))
76#define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
77 (0x555 + (((nr) - 7) * 2)))
78#define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
79 (0x550 + (nr) - 7))
80
81#define W83781D_REG_FAN_MIN(nr) (0x3a + (nr))
82#define W83781D_REG_FAN(nr) (0x27 + (nr))
83
84#define W83781D_REG_BANK 0x4E
85#define W83781D_REG_TEMP2_CONFIG 0x152
86#define W83781D_REG_TEMP3_CONFIG 0x252
87#define W83781D_REG_TEMP(nr) ((nr == 3) ? (0x0250) : \
88 ((nr == 2) ? (0x0150) : \
89 (0x27)))
90#define W83781D_REG_TEMP_HYST(nr) ((nr == 3) ? (0x253) : \
91 ((nr == 2) ? (0x153) : \
92 (0x3A)))
93#define W83781D_REG_TEMP_OVER(nr) ((nr == 3) ? (0x255) : \
94 ((nr == 2) ? (0x155) : \
95 (0x39)))
96
97#define W83781D_REG_CONFIG 0x40
98#define W83781D_REG_ALARM1 0x41
99#define W83781D_REG_ALARM2 0x42
100#define W83781D_REG_ALARM3 0x450 /* not on W83781D */
101
102#define W83781D_REG_IRQ 0x4C
103#define W83781D_REG_BEEP_CONFIG 0x4D
104#define W83781D_REG_BEEP_INTS1 0x56
105#define W83781D_REG_BEEP_INTS2 0x57
106#define W83781D_REG_BEEP_INTS3 0x453 /* not on W83781D */
107
108#define W83781D_REG_VID_FANDIV 0x47
109
110#define W83781D_REG_CHIPID 0x49
111#define W83781D_REG_WCHIPID 0x58
112#define W83781D_REG_CHIPMAN 0x4F
113#define W83781D_REG_PIN 0x4B
114
115/* 782D/783S only */
116#define W83781D_REG_VBAT 0x5D
117
118/* PWM 782D (1-4) and 783S (1-2) only */
119#define W83781D_REG_PWM1 0x5B /* 782d and 783s/627hf datasheets disagree */
120 /* on which is which; */
121#define W83781D_REG_PWM2 0x5A /* We follow the 782d convention here, */
122 /* However 782d is probably wrong. */
123#define W83781D_REG_PWM3 0x5E
124#define W83781D_REG_PWM4 0x5F
125#define W83781D_REG_PWMCLK12 0x5C
126#define W83781D_REG_PWMCLK34 0x45C
127static const u8 regpwm[] = { W83781D_REG_PWM1, W83781D_REG_PWM2,
128 W83781D_REG_PWM3, W83781D_REG_PWM4
129};
130
131#define W83781D_REG_PWM(nr) (regpwm[(nr) - 1])
132
133#define W83781D_REG_I2C_ADDR 0x48
134#define W83781D_REG_I2C_SUBADDR 0x4A
135
136/* The following are undocumented in the data sheets however we
137 received the information in an email from Winbond tech support */
138/* Sensor selection - not on 781d */
139#define W83781D_REG_SCFG1 0x5D
140static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
141
142#define W83781D_REG_SCFG2 0x59
143static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
144
145#define W83781D_DEFAULT_BETA 3435
146
147/* RT Table registers */
148#define W83781D_REG_RT_IDX 0x50
149#define W83781D_REG_RT_VAL 0x51
150
151/* Conversions. Rounding and limit checking is only done on the TO_REG
152 variants. Note that you should be a bit careful with which arguments
153 these macros are called: arguments may be evaluated more than once.
154 Fixing this is just not worth it. */
155#define IN_TO_REG(val) (SENSORS_LIMIT((((val) * 10 + 8)/16),0,255))
156#define IN_FROM_REG(val) (((val) * 16) / 10)
157
158static inline u8
159FAN_TO_REG(long rpm, int div)
160{
161 if (rpm == 0)
162 return 255;
163 rpm = SENSORS_LIMIT(rpm, 1, 1000000);
164 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
165}
166
167#define FAN_FROM_REG(val,div) ((val) == 0 ? -1 : \
168 ((val) == 255 ? 0 : \
169 1350000 / ((val) * (div))))
170
171#define TEMP_TO_REG(val) (SENSORS_LIMIT(((val) < 0 ? (val)+0x100*1000 \
172 : (val)) / 1000, 0, 0xff))
173#define TEMP_FROM_REG(val) (((val) & 0x80 ? (val)-0x100 : (val)) * 1000)
174
1da177e4
LT
175#define PWM_FROM_REG(val) (val)
176#define PWM_TO_REG(val) (SENSORS_LIMIT((val),0,255))
177#define BEEP_MASK_FROM_REG(val,type) ((type) == as99127f ? \
178 (val) ^ 0x7fff : (val))
179#define BEEP_MASK_TO_REG(val,type) ((type) == as99127f ? \
180 (~(val)) & 0x7fff : (val) & 0xffffff)
181
182#define BEEP_ENABLE_TO_REG(val) ((val) ? 1 : 0)
183#define BEEP_ENABLE_FROM_REG(val) ((val) ? 1 : 0)
184
185#define DIV_FROM_REG(val) (1 << (val))
186
187static inline u8
188DIV_TO_REG(long val, enum chips type)
189{
190 int i;
191 val = SENSORS_LIMIT(val, 1,
192 ((type == w83781d
193 || type == as99127f) ? 8 : 128)) >> 1;
abc01922 194 for (i = 0; i < 7; i++) {
1da177e4
LT
195 if (val == 0)
196 break;
197 val >>= 1;
198 }
199 return ((u8) i);
200}
201
202/* There are some complications in a module like this. First off, W83781D chips
203 may be both present on the SMBus and the ISA bus, and we have to handle
204 those cases separately at some places. Second, there might be several
205 W83781D chips available (well, actually, that is probably never done; but
206 it is a clean illustration of how to handle a case like that). Finally,
207 a specific chip may be attached to *both* ISA and SMBus, and we would
208 not like to detect it double. Fortunately, in the case of the W83781D at
209 least, a register tells us what SMBus address we are on, so that helps
210 a bit - except if there could be more than one SMBus. Groan. No solution
211 for this yet. */
212
213/* This module may seem overly long and complicated. In fact, it is not so
214 bad. Quite a lot of bookkeeping is done. A real driver can often cut
215 some corners. */
216
217/* For each registered W83781D, we need to keep some data in memory. That
218 data is pointed to by w83781d_list[NR]->data. The structure itself is
219 dynamically allocated, at the same time when a new w83781d client is
220 allocated. */
221struct w83781d_data {
222 struct i2c_client client;
943b0830 223 struct class_device *class_dev;
1da177e4
LT
224 struct semaphore lock;
225 enum chips type;
226
227 struct semaphore update_lock;
228 char valid; /* !=0 if following fields are valid */
229 unsigned long last_updated; /* In jiffies */
230
231 struct i2c_client *lm75[2]; /* for secondary I2C addresses */
232 /* array of 2 pointers to subclients */
233
234 u8 in[9]; /* Register value - 8 & 9 for 782D only */
235 u8 in_max[9]; /* Register value - 8 & 9 for 782D only */
236 u8 in_min[9]; /* Register value - 8 & 9 for 782D only */
237 u8 fan[3]; /* Register value */
238 u8 fan_min[3]; /* Register value */
239 u8 temp;
240 u8 temp_max; /* Register value */
241 u8 temp_max_hyst; /* Register value */
242 u16 temp_add[2]; /* Register value */
243 u16 temp_max_add[2]; /* Register value */
244 u16 temp_max_hyst_add[2]; /* Register value */
245 u8 fan_div[3]; /* Register encoding, shifted right */
246 u8 vid; /* Register encoding, combined */
247 u32 alarms; /* Register encoding, combined */
248 u32 beep_mask; /* Register encoding, combined */
249 u8 beep_enable; /* Boolean */
250 u8 pwm[4]; /* Register value */
251 u8 pwmenable[4]; /* Boolean */
252 u16 sens[3]; /* 782D/783S only.
253 1 = pentium diode; 2 = 3904 diode;
254 3000-5000 = thermistor beta.
255 Default = 3435.
256 Other Betas unimplemented */
257 u8 vrm;
258};
259
260static int w83781d_attach_adapter(struct i2c_adapter *adapter);
2d8672c5 261static int w83781d_isa_attach_adapter(struct i2c_adapter *adapter);
1da177e4
LT
262static int w83781d_detect(struct i2c_adapter *adapter, int address, int kind);
263static int w83781d_detach_client(struct i2c_client *client);
264
265static int w83781d_read_value(struct i2c_client *client, u16 register);
266static int w83781d_write_value(struct i2c_client *client, u16 register,
267 u16 value);
268static struct w83781d_data *w83781d_update_device(struct device *dev);
269static void w83781d_init_client(struct i2c_client *client);
270
271static struct i2c_driver w83781d_driver = {
272 .owner = THIS_MODULE,
273 .name = "w83781d",
274 .id = I2C_DRIVERID_W83781D,
275 .flags = I2C_DF_NOTIFY,
276 .attach_adapter = w83781d_attach_adapter,
277 .detach_client = w83781d_detach_client,
278};
279
fde09509
JD
280static struct i2c_driver w83781d_isa_driver = {
281 .owner = THIS_MODULE,
282 .name = "w83781d-isa",
2d8672c5 283 .attach_adapter = w83781d_isa_attach_adapter,
fde09509
JD
284 .detach_client = w83781d_detach_client,
285};
286
287
1da177e4
LT
288/* following are the sysfs callback functions */
289#define show_in_reg(reg) \
290static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
291{ \
292 struct w83781d_data *data = w83781d_update_device(dev); \
293 return sprintf(buf,"%ld\n", (long)IN_FROM_REG(data->reg[nr] * 10)); \
294}
295show_in_reg(in);
296show_in_reg(in_min);
297show_in_reg(in_max);
298
299#define store_in_reg(REG, reg) \
300static ssize_t store_in_##reg (struct device *dev, const char *buf, size_t count, int nr) \
301{ \
302 struct i2c_client *client = to_i2c_client(dev); \
303 struct w83781d_data *data = i2c_get_clientdata(client); \
304 u32 val; \
305 \
306 val = simple_strtoul(buf, NULL, 10) / 10; \
307 \
308 down(&data->update_lock); \
309 data->in_##reg[nr] = IN_TO_REG(val); \
310 w83781d_write_value(client, W83781D_REG_IN_##REG(nr), data->in_##reg[nr]); \
311 \
312 up(&data->update_lock); \
313 return count; \
314}
315store_in_reg(MIN, min);
316store_in_reg(MAX, max);
317
318#define sysfs_in_offset(offset) \
319static ssize_t \
e404e274 320show_regs_in_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT
321{ \
322 return show_in(dev, buf, offset); \
323} \
324static DEVICE_ATTR(in##offset##_input, S_IRUGO, show_regs_in_##offset, NULL);
325
326#define sysfs_in_reg_offset(reg, offset) \
e404e274 327static ssize_t show_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT
328{ \
329 return show_in_##reg (dev, buf, offset); \
330} \
e404e274 331static ssize_t store_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
1da177e4
LT
332{ \
333 return store_in_##reg (dev, buf, count, offset); \
334} \
335static DEVICE_ATTR(in##offset##_##reg, S_IRUGO| S_IWUSR, show_regs_in_##reg##offset, store_regs_in_##reg##offset);
336
337#define sysfs_in_offsets(offset) \
338sysfs_in_offset(offset); \
339sysfs_in_reg_offset(min, offset); \
340sysfs_in_reg_offset(max, offset);
341
342sysfs_in_offsets(0);
343sysfs_in_offsets(1);
344sysfs_in_offsets(2);
345sysfs_in_offsets(3);
346sysfs_in_offsets(4);
347sysfs_in_offsets(5);
348sysfs_in_offsets(6);
349sysfs_in_offsets(7);
350sysfs_in_offsets(8);
351
352#define device_create_file_in(client, offset) \
353do { \
354device_create_file(&client->dev, &dev_attr_in##offset##_input); \
355device_create_file(&client->dev, &dev_attr_in##offset##_min); \
356device_create_file(&client->dev, &dev_attr_in##offset##_max); \
357} while (0)
358
359#define show_fan_reg(reg) \
360static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
361{ \
362 struct w83781d_data *data = w83781d_update_device(dev); \
363 return sprintf(buf,"%ld\n", \
364 FAN_FROM_REG(data->reg[nr-1], (long)DIV_FROM_REG(data->fan_div[nr-1]))); \
365}
366show_fan_reg(fan);
367show_fan_reg(fan_min);
368
369static ssize_t
370store_fan_min(struct device *dev, const char *buf, size_t count, int nr)
371{
372 struct i2c_client *client = to_i2c_client(dev);
373 struct w83781d_data *data = i2c_get_clientdata(client);
374 u32 val;
375
376 val = simple_strtoul(buf, NULL, 10);
377
378 down(&data->update_lock);
379 data->fan_min[nr - 1] =
380 FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr - 1]));
381 w83781d_write_value(client, W83781D_REG_FAN_MIN(nr),
382 data->fan_min[nr - 1]);
383
384 up(&data->update_lock);
385 return count;
386}
387
388#define sysfs_fan_offset(offset) \
e404e274 389static ssize_t show_regs_fan_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT
390{ \
391 return show_fan(dev, buf, offset); \
392} \
393static DEVICE_ATTR(fan##offset##_input, S_IRUGO, show_regs_fan_##offset, NULL);
394
395#define sysfs_fan_min_offset(offset) \
e404e274 396static ssize_t show_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT
397{ \
398 return show_fan_min(dev, buf, offset); \
399} \
e404e274 400static ssize_t store_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
1da177e4
LT
401{ \
402 return store_fan_min(dev, buf, count, offset); \
403} \
404static DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, show_regs_fan_min##offset, store_regs_fan_min##offset);
405
406sysfs_fan_offset(1);
407sysfs_fan_min_offset(1);
408sysfs_fan_offset(2);
409sysfs_fan_min_offset(2);
410sysfs_fan_offset(3);
411sysfs_fan_min_offset(3);
412
413#define device_create_file_fan(client, offset) \
414do { \
415device_create_file(&client->dev, &dev_attr_fan##offset##_input); \
416device_create_file(&client->dev, &dev_attr_fan##offset##_min); \
417} while (0)
418
419#define show_temp_reg(reg) \
420static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
421{ \
422 struct w83781d_data *data = w83781d_update_device(dev); \
423 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
424 return sprintf(buf,"%d\n", \
425 LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \
426 } else { /* TEMP1 */ \
427 return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \
428 } \
429}
430show_temp_reg(temp);
431show_temp_reg(temp_max);
432show_temp_reg(temp_max_hyst);
433
434#define store_temp_reg(REG, reg) \
435static ssize_t store_temp_##reg (struct device *dev, const char *buf, size_t count, int nr) \
436{ \
437 struct i2c_client *client = to_i2c_client(dev); \
438 struct w83781d_data *data = i2c_get_clientdata(client); \
439 s32 val; \
440 \
441 val = simple_strtol(buf, NULL, 10); \
442 \
443 down(&data->update_lock); \
444 \
445 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
446 data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \
447 w83781d_write_value(client, W83781D_REG_TEMP_##REG(nr), \
448 data->temp_##reg##_add[nr-2]); \
449 } else { /* TEMP1 */ \
450 data->temp_##reg = TEMP_TO_REG(val); \
451 w83781d_write_value(client, W83781D_REG_TEMP_##REG(nr), \
452 data->temp_##reg); \
453 } \
454 \
455 up(&data->update_lock); \
456 return count; \
457}
458store_temp_reg(OVER, max);
459store_temp_reg(HYST, max_hyst);
460
461#define sysfs_temp_offset(offset) \
462static ssize_t \
e404e274 463show_regs_temp_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT
464{ \
465 return show_temp(dev, buf, offset); \
466} \
467static DEVICE_ATTR(temp##offset##_input, S_IRUGO, show_regs_temp_##offset, NULL);
468
469#define sysfs_temp_reg_offset(reg, offset) \
e404e274 470static ssize_t show_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT
471{ \
472 return show_temp_##reg (dev, buf, offset); \
473} \
e404e274 474static ssize_t store_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
1da177e4
LT
475{ \
476 return store_temp_##reg (dev, buf, count, offset); \
477} \
478static DEVICE_ATTR(temp##offset##_##reg, S_IRUGO| S_IWUSR, show_regs_temp_##reg##offset, store_regs_temp_##reg##offset);
479
480#define sysfs_temp_offsets(offset) \
481sysfs_temp_offset(offset); \
482sysfs_temp_reg_offset(max, offset); \
483sysfs_temp_reg_offset(max_hyst, offset);
484
485sysfs_temp_offsets(1);
486sysfs_temp_offsets(2);
487sysfs_temp_offsets(3);
488
489#define device_create_file_temp(client, offset) \
490do { \
491device_create_file(&client->dev, &dev_attr_temp##offset##_input); \
492device_create_file(&client->dev, &dev_attr_temp##offset##_max); \
493device_create_file(&client->dev, &dev_attr_temp##offset##_max_hyst); \
494} while (0)
495
496static ssize_t
e404e274 497show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT
498{
499 struct w83781d_data *data = w83781d_update_device(dev);
500 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
501}
502
503static
504DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
505#define device_create_file_vid(client) \
506device_create_file(&client->dev, &dev_attr_cpu0_vid);
507static ssize_t
e404e274 508show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT
509{
510 struct w83781d_data *data = w83781d_update_device(dev);
511 return sprintf(buf, "%ld\n", (long) data->vrm);
512}
513
514static ssize_t
e404e274 515store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
1da177e4
LT
516{
517 struct i2c_client *client = to_i2c_client(dev);
518 struct w83781d_data *data = i2c_get_clientdata(client);
519 u32 val;
520
521 val = simple_strtoul(buf, NULL, 10);
522 data->vrm = val;
523
524 return count;
525}
526
527static
528DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
529#define device_create_file_vrm(client) \
530device_create_file(&client->dev, &dev_attr_vrm);
531static ssize_t
e404e274 532show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT
533{
534 struct w83781d_data *data = w83781d_update_device(dev);
68188ba7 535 return sprintf(buf, "%u\n", data->alarms);
1da177e4
LT
536}
537
538static
539DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
540#define device_create_file_alarms(client) \
541device_create_file(&client->dev, &dev_attr_alarms);
e404e274 542static ssize_t show_beep_mask (struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT
543{
544 struct w83781d_data *data = w83781d_update_device(dev);
545 return sprintf(buf, "%ld\n",
546 (long)BEEP_MASK_FROM_REG(data->beep_mask, data->type));
547}
e404e274 548static ssize_t show_beep_enable (struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT
549{
550 struct w83781d_data *data = w83781d_update_device(dev);
551 return sprintf(buf, "%ld\n",
552 (long)BEEP_ENABLE_FROM_REG(data->beep_enable));
553}
554
555#define BEEP_ENABLE 0 /* Store beep_enable */
556#define BEEP_MASK 1 /* Store beep_mask */
557
558static ssize_t
559store_beep_reg(struct device *dev, const char *buf, size_t count,
560 int update_mask)
561{
562 struct i2c_client *client = to_i2c_client(dev);
563 struct w83781d_data *data = i2c_get_clientdata(client);
564 u32 val, val2;
565
566 val = simple_strtoul(buf, NULL, 10);
567
568 down(&data->update_lock);
569
570 if (update_mask == BEEP_MASK) { /* We are storing beep_mask */
571 data->beep_mask = BEEP_MASK_TO_REG(val, data->type);
572 w83781d_write_value(client, W83781D_REG_BEEP_INTS1,
573 data->beep_mask & 0xff);
574
575 if ((data->type != w83781d) && (data->type != as99127f)) {
576 w83781d_write_value(client, W83781D_REG_BEEP_INTS3,
577 ((data->beep_mask) >> 16) & 0xff);
578 }
579
580 val2 = (data->beep_mask >> 8) & 0x7f;
581 } else { /* We are storing beep_enable */
582 val2 = w83781d_read_value(client, W83781D_REG_BEEP_INTS2) & 0x7f;
583 data->beep_enable = BEEP_ENABLE_TO_REG(val);
584 }
585
586 w83781d_write_value(client, W83781D_REG_BEEP_INTS2,
587 val2 | data->beep_enable << 7);
588
589 up(&data->update_lock);
590 return count;
591}
592
593#define sysfs_beep(REG, reg) \
e404e274 594static ssize_t show_regs_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4 595{ \
e404e274 596 return show_beep_##reg(dev, attr, buf); \
1da177e4 597} \
e404e274 598static ssize_t store_regs_beep_##reg (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
1da177e4
LT
599{ \
600 return store_beep_reg(dev, buf, count, BEEP_##REG); \
601} \
602static DEVICE_ATTR(beep_##reg, S_IRUGO | S_IWUSR, show_regs_beep_##reg, store_regs_beep_##reg);
603
604sysfs_beep(ENABLE, enable);
605sysfs_beep(MASK, mask);
606
607#define device_create_file_beep(client) \
608do { \
609device_create_file(&client->dev, &dev_attr_beep_enable); \
610device_create_file(&client->dev, &dev_attr_beep_mask); \
611} while (0)
612
613static ssize_t
614show_fan_div_reg(struct device *dev, char *buf, int nr)
615{
616 struct w83781d_data *data = w83781d_update_device(dev);
617 return sprintf(buf, "%ld\n",
618 (long) DIV_FROM_REG(data->fan_div[nr - 1]));
619}
620
621/* Note: we save and restore the fan minimum here, because its value is
622 determined in part by the fan divisor. This follows the principle of
623 least suprise; the user doesn't expect the fan minimum to change just
624 because the divisor changed. */
625static ssize_t
626store_fan_div_reg(struct device *dev, const char *buf, size_t count, int nr)
627{
628 struct i2c_client *client = to_i2c_client(dev);
629 struct w83781d_data *data = i2c_get_clientdata(client);
630 unsigned long min;
631 u8 reg;
632 unsigned long val = simple_strtoul(buf, NULL, 10);
633
634 down(&data->update_lock);
635
636 /* Save fan_min */
637 min = FAN_FROM_REG(data->fan_min[nr],
638 DIV_FROM_REG(data->fan_div[nr]));
639
640 data->fan_div[nr] = DIV_TO_REG(val, data->type);
641
642 reg = (w83781d_read_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
643 & (nr==0 ? 0xcf : 0x3f))
644 | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
645 w83781d_write_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
646
647 /* w83781d and as99127f don't have extended divisor bits */
648 if (data->type != w83781d && data->type != as99127f) {
649 reg = (w83781d_read_value(client, W83781D_REG_VBAT)
650 & ~(1 << (5 + nr)))
651 | ((data->fan_div[nr] & 0x04) << (3 + nr));
652 w83781d_write_value(client, W83781D_REG_VBAT, reg);
653 }
654
655 /* Restore fan_min */
656 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
657 w83781d_write_value(client, W83781D_REG_FAN_MIN(nr+1), data->fan_min[nr]);
658
659 up(&data->update_lock);
660 return count;
661}
662
663#define sysfs_fan_div(offset) \
e404e274 664static ssize_t show_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT
665{ \
666 return show_fan_div_reg(dev, buf, offset); \
667} \
e404e274 668static ssize_t store_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
1da177e4
LT
669{ \
670 return store_fan_div_reg(dev, buf, count, offset - 1); \
671} \
672static DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, show_regs_fan_div_##offset, store_regs_fan_div_##offset);
673
674sysfs_fan_div(1);
675sysfs_fan_div(2);
676sysfs_fan_div(3);
677
678#define device_create_file_fan_div(client, offset) \
679do { \
680device_create_file(&client->dev, &dev_attr_fan##offset##_div); \
681} while (0)
682
683static ssize_t
684show_pwm_reg(struct device *dev, char *buf, int nr)
685{
686 struct w83781d_data *data = w83781d_update_device(dev);
687 return sprintf(buf, "%ld\n", (long) PWM_FROM_REG(data->pwm[nr - 1]));
688}
689
690static ssize_t
691show_pwmenable_reg(struct device *dev, char *buf, int nr)
692{
693 struct w83781d_data *data = w83781d_update_device(dev);
694 return sprintf(buf, "%ld\n", (long) data->pwmenable[nr - 1]);
695}
696
697static ssize_t
698store_pwm_reg(struct device *dev, const char *buf, size_t count, int nr)
699{
700 struct i2c_client *client = to_i2c_client(dev);
701 struct w83781d_data *data = i2c_get_clientdata(client);
702 u32 val;
703
704 val = simple_strtoul(buf, NULL, 10);
705
706 down(&data->update_lock);
707 data->pwm[nr - 1] = PWM_TO_REG(val);
708 w83781d_write_value(client, W83781D_REG_PWM(nr), data->pwm[nr - 1]);
709 up(&data->update_lock);
710 return count;
711}
712
713static ssize_t
714store_pwmenable_reg(struct device *dev, const char *buf, size_t count, int nr)
715{
716 struct i2c_client *client = to_i2c_client(dev);
717 struct w83781d_data *data = i2c_get_clientdata(client);
718 u32 val, reg;
719
720 val = simple_strtoul(buf, NULL, 10);
721
722 down(&data->update_lock);
723
724 switch (val) {
725 case 0:
726 case 1:
727 reg = w83781d_read_value(client, W83781D_REG_PWMCLK12);
728 w83781d_write_value(client, W83781D_REG_PWMCLK12,
729 (reg & 0xf7) | (val << 3));
730
731 reg = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG);
732 w83781d_write_value(client, W83781D_REG_BEEP_CONFIG,
733 (reg & 0xef) | (!val << 4));
734
735 data->pwmenable[nr - 1] = val;
736 break;
737
738 default:
739 up(&data->update_lock);
740 return -EINVAL;
741 }
742
743 up(&data->update_lock);
744 return count;
745}
746
747#define sysfs_pwm(offset) \
e404e274 748static ssize_t show_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT
749{ \
750 return show_pwm_reg(dev, buf, offset); \
751} \
e404e274 752static ssize_t store_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, \
1da177e4
LT
753 const char *buf, size_t count) \
754{ \
755 return store_pwm_reg(dev, buf, count, offset); \
756} \
757static DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, \
758 show_regs_pwm_##offset, store_regs_pwm_##offset);
759
760#define sysfs_pwmenable(offset) \
e404e274 761static ssize_t show_regs_pwmenable_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT
762{ \
763 return show_pwmenable_reg(dev, buf, offset); \
764} \
e404e274 765static ssize_t store_regs_pwmenable_##offset (struct device *dev, struct device_attribute *attr, \
1da177e4
LT
766 const char *buf, size_t count) \
767{ \
768 return store_pwmenable_reg(dev, buf, count, offset); \
769} \
770static DEVICE_ATTR(pwm##offset##_enable, S_IRUGO | S_IWUSR, \
771 show_regs_pwmenable_##offset, store_regs_pwmenable_##offset);
772
773sysfs_pwm(1);
774sysfs_pwm(2);
775sysfs_pwmenable(2); /* only PWM2 can be enabled/disabled */
776sysfs_pwm(3);
777sysfs_pwm(4);
778
779#define device_create_file_pwm(client, offset) \
780do { \
781device_create_file(&client->dev, &dev_attr_pwm##offset); \
782} while (0)
783
784#define device_create_file_pwmenable(client, offset) \
785do { \
786device_create_file(&client->dev, &dev_attr_pwm##offset##_enable); \
787} while (0)
788
789static ssize_t
790show_sensor_reg(struct device *dev, char *buf, int nr)
791{
792 struct w83781d_data *data = w83781d_update_device(dev);
793 return sprintf(buf, "%ld\n", (long) data->sens[nr - 1]);
794}
795
796static ssize_t
797store_sensor_reg(struct device *dev, const char *buf, size_t count, int nr)
798{
799 struct i2c_client *client = to_i2c_client(dev);
800 struct w83781d_data *data = i2c_get_clientdata(client);
801 u32 val, tmp;
802
803 val = simple_strtoul(buf, NULL, 10);
804
805 down(&data->update_lock);
806
807 switch (val) {
808 case 1: /* PII/Celeron diode */
809 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
810 w83781d_write_value(client, W83781D_REG_SCFG1,
811 tmp | BIT_SCFG1[nr - 1]);
812 tmp = w83781d_read_value(client, W83781D_REG_SCFG2);
813 w83781d_write_value(client, W83781D_REG_SCFG2,
814 tmp | BIT_SCFG2[nr - 1]);
815 data->sens[nr - 1] = val;
816 break;
817 case 2: /* 3904 */
818 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
819 w83781d_write_value(client, W83781D_REG_SCFG1,
820 tmp | BIT_SCFG1[nr - 1]);
821 tmp = w83781d_read_value(client, W83781D_REG_SCFG2);
822 w83781d_write_value(client, W83781D_REG_SCFG2,
823 tmp & ~BIT_SCFG2[nr - 1]);
824 data->sens[nr - 1] = val;
825 break;
826 case W83781D_DEFAULT_BETA: /* thermistor */
827 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
828 w83781d_write_value(client, W83781D_REG_SCFG1,
829 tmp & ~BIT_SCFG1[nr - 1]);
830 data->sens[nr - 1] = val;
831 break;
832 default:
833 dev_err(dev, "Invalid sensor type %ld; must be 1, 2, or %d\n",
834 (long) val, W83781D_DEFAULT_BETA);
835 break;
836 }
837
838 up(&data->update_lock);
839 return count;
840}
841
842#define sysfs_sensor(offset) \
e404e274 843static ssize_t show_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT
844{ \
845 return show_sensor_reg(dev, buf, offset); \
846} \
e404e274 847static ssize_t store_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
1da177e4
LT
848{ \
849 return store_sensor_reg(dev, buf, count, offset); \
850} \
851static DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, show_regs_sensor_##offset, store_regs_sensor_##offset);
852
853sysfs_sensor(1);
854sysfs_sensor(2);
855sysfs_sensor(3);
856
857#define device_create_file_sensor(client, offset) \
858do { \
859device_create_file(&client->dev, &dev_attr_temp##offset##_type); \
860} while (0)
861
862/* This function is called when:
863 * w83781d_driver is inserted (when this module is loaded), for each
864 available adapter
865 * when a new adapter is inserted (and w83781d_driver is still present) */
866static int
867w83781d_attach_adapter(struct i2c_adapter *adapter)
868{
869 if (!(adapter->class & I2C_CLASS_HWMON))
870 return 0;
2ed2dc3c 871 return i2c_probe(adapter, &addr_data, w83781d_detect);
1da177e4
LT
872}
873
2d8672c5
JD
874static int
875w83781d_isa_attach_adapter(struct i2c_adapter *adapter)
876{
877 return w83781d_detect(adapter, isa_address, -1);
878}
879
1da177e4
LT
880/* Assumes that adapter is of I2C, not ISA variety.
881 * OTHERWISE DON'T CALL THIS
882 */
883static int
884w83781d_detect_subclients(struct i2c_adapter *adapter, int address, int kind,
885 struct i2c_client *new_client)
886{
887 int i, val1 = 0, id;
888 int err;
889 const char *client_name = "";
890 struct w83781d_data *data = i2c_get_clientdata(new_client);
891
ba9c2e8d 892 data->lm75[0] = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
1da177e4
LT
893 if (!(data->lm75[0])) {
894 err = -ENOMEM;
895 goto ERROR_SC_0;
896 }
1da177e4
LT
897
898 id = i2c_adapter_id(adapter);
899
900 if (force_subclients[0] == id && force_subclients[1] == address) {
901 for (i = 2; i <= 3; i++) {
902 if (force_subclients[i] < 0x48 ||
903 force_subclients[i] > 0x4f) {
904 dev_err(&new_client->dev, "Invalid subclient "
905 "address %d; must be 0x48-0x4f\n",
906 force_subclients[i]);
907 err = -EINVAL;
908 goto ERROR_SC_1;
909 }
910 }
911 w83781d_write_value(new_client, W83781D_REG_I2C_SUBADDR,
912 (force_subclients[2] & 0x07) |
913 ((force_subclients[3] & 0x07) << 4));
914 data->lm75[0]->addr = force_subclients[2];
915 } else {
916 val1 = w83781d_read_value(new_client, W83781D_REG_I2C_SUBADDR);
917 data->lm75[0]->addr = 0x48 + (val1 & 0x07);
918 }
919
920 if (kind != w83783s) {
ba9c2e8d 921 data->lm75[1] = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
1da177e4
LT
922 if (!(data->lm75[1])) {
923 err = -ENOMEM;
924 goto ERROR_SC_1;
925 }
1da177e4
LT
926
927 if (force_subclients[0] == id &&
928 force_subclients[1] == address) {
929 data->lm75[1]->addr = force_subclients[3];
930 } else {
931 data->lm75[1]->addr = 0x48 + ((val1 >> 4) & 0x07);
932 }
933 if (data->lm75[0]->addr == data->lm75[1]->addr) {
934 dev_err(&new_client->dev,
935 "Duplicate addresses 0x%x for subclients.\n",
936 data->lm75[0]->addr);
937 err = -EBUSY;
938 goto ERROR_SC_2;
939 }
940 }
941
942 if (kind == w83781d)
943 client_name = "w83781d subclient";
944 else if (kind == w83782d)
945 client_name = "w83782d subclient";
946 else if (kind == w83783s)
947 client_name = "w83783s subclient";
948 else if (kind == w83627hf)
949 client_name = "w83627hf subclient";
950 else if (kind == as99127f)
951 client_name = "as99127f subclient";
952
953 for (i = 0; i <= 1; i++) {
954 /* store all data in w83781d */
955 i2c_set_clientdata(data->lm75[i], NULL);
956 data->lm75[i]->adapter = adapter;
957 data->lm75[i]->driver = &w83781d_driver;
958 data->lm75[i]->flags = 0;
959 strlcpy(data->lm75[i]->name, client_name,
960 I2C_NAME_SIZE);
961 if ((err = i2c_attach_client(data->lm75[i]))) {
962 dev_err(&new_client->dev, "Subclient %d "
963 "registration at address 0x%x "
964 "failed.\n", i, data->lm75[i]->addr);
965 if (i == 1)
966 goto ERROR_SC_3;
967 goto ERROR_SC_2;
968 }
969 if (kind == w83783s)
970 break;
971 }
972
973 return 0;
974
975/* Undo inits in case of errors */
976ERROR_SC_3:
977 i2c_detach_client(data->lm75[0]);
978ERROR_SC_2:
943b0830 979 if (data->lm75[1])
1da177e4
LT
980 kfree(data->lm75[1]);
981ERROR_SC_1:
943b0830 982 if (data->lm75[0])
1da177e4
LT
983 kfree(data->lm75[0]);
984ERROR_SC_0:
985 return err;
986}
987
988static int
989w83781d_detect(struct i2c_adapter *adapter, int address, int kind)
990{
991 int i = 0, val1 = 0, val2;
992 struct i2c_client *new_client;
993 struct w83781d_data *data;
994 int err;
995 const char *client_name = "";
996 int is_isa = i2c_is_isa_adapter(adapter);
997 enum vendor { winbond, asus } vendid;
998
999 if (!is_isa
1000 && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
1001 err = -EINVAL;
1002 goto ERROR0;
1003 }
1004
1005 /* Prevent users from forcing a kind for a bus it isn't supposed
1006 to possibly be on */
1007 if (is_isa && (kind == as99127f || kind == w83783s)) {
1008 dev_err(&adapter->dev,
1009 "Cannot force I2C-only chip for ISA address 0x%02x.\n",
1010 address);
1011 err = -EINVAL;
1012 goto ERROR0;
1013 }
1da177e4
LT
1014
1015 if (is_isa)
1016 if (!request_region(address, W83781D_EXTENT,
fde09509 1017 w83781d_isa_driver.name)) {
1da177e4
LT
1018 dev_dbg(&adapter->dev, "Request of region "
1019 "0x%x-0x%x for w83781d failed\n", address,
1020 address + W83781D_EXTENT - 1);
1021 err = -EBUSY;
1022 goto ERROR0;
1023 }
1024
1025 /* Probe whether there is anything available on this address. Already
1026 done for SMBus clients */
1027 if (kind < 0) {
1028 if (is_isa) {
1029
1030#define REALLY_SLOW_IO
1031 /* We need the timeouts for at least some LM78-like
1032 chips. But only if we read 'undefined' registers. */
1033 i = inb_p(address + 1);
1034 if (inb_p(address + 2) != i
1035 || inb_p(address + 3) != i
1036 || inb_p(address + 7) != i) {
1037 dev_dbg(&adapter->dev, "Detection of w83781d "
1038 "chip failed at step 1\n");
1039 err = -ENODEV;
1040 goto ERROR1;
1041 }
1042#undef REALLY_SLOW_IO
1043
1044 /* Let's just hope nothing breaks here */
1045 i = inb_p(address + 5) & 0x7f;
1046 outb_p(~i & 0x7f, address + 5);
1047 val2 = inb_p(address + 5) & 0x7f;
1048 if (val2 != (~i & 0x7f)) {
1049 outb_p(i, address + 5);
1050 dev_dbg(&adapter->dev, "Detection of w83781d "
1051 "chip failed at step 2 (0x%x != "
1052 "0x%x at 0x%x)\n", val2, ~i & 0x7f,
1053 address + 5);
1054 err = -ENODEV;
1055 goto ERROR1;
1056 }
1057 }
1058 }
1059
1060 /* OK. For now, we presume we have a valid client. We now create the
1061 client structure, even though we cannot fill it completely yet.
1062 But it allows us to access w83781d_{read,write}_value. */
1063
ba9c2e8d 1064 if (!(data = kzalloc(sizeof(struct w83781d_data), GFP_KERNEL))) {
1da177e4
LT
1065 err = -ENOMEM;
1066 goto ERROR1;
1067 }
1da177e4
LT
1068
1069 new_client = &data->client;
1070 i2c_set_clientdata(new_client, data);
1071 new_client->addr = address;
1072 init_MUTEX(&data->lock);
1073 new_client->adapter = adapter;
fde09509 1074 new_client->driver = is_isa ? &w83781d_isa_driver : &w83781d_driver;
1da177e4
LT
1075 new_client->flags = 0;
1076
1077 /* Now, we do the remaining detection. */
1078
1079 /* The w8378?d may be stuck in some other bank than bank 0. This may
1080 make reading other information impossible. Specify a force=... or
1081 force_*=... parameter, and the Winbond will be reset to the right
1082 bank. */
1083 if (kind < 0) {
1084 if (w83781d_read_value(new_client, W83781D_REG_CONFIG) & 0x80) {
1085 dev_dbg(&new_client->dev, "Detection failed at step "
1086 "3\n");
1087 err = -ENODEV;
1088 goto ERROR2;
1089 }
1090 val1 = w83781d_read_value(new_client, W83781D_REG_BANK);
1091 val2 = w83781d_read_value(new_client, W83781D_REG_CHIPMAN);
1092 /* Check for Winbond or Asus ID if in bank 0 */
1093 if ((!(val1 & 0x07)) &&
1094 (((!(val1 & 0x80)) && (val2 != 0xa3) && (val2 != 0xc3))
1095 || ((val1 & 0x80) && (val2 != 0x5c) && (val2 != 0x12)))) {
1096 dev_dbg(&new_client->dev, "Detection failed at step "
1097 "4\n");
1098 err = -ENODEV;
1099 goto ERROR2;
1100 }
1101 /* If Winbond SMBus, check address at 0x48.
1102 Asus doesn't support, except for as99127f rev.2 */
1103 if ((!is_isa) && (((!(val1 & 0x80)) && (val2 == 0xa3)) ||
1104 ((val1 & 0x80) && (val2 == 0x5c)))) {
1105 if (w83781d_read_value
1106 (new_client, W83781D_REG_I2C_ADDR) != address) {
1107 dev_dbg(&new_client->dev, "Detection failed "
1108 "at step 5\n");
1109 err = -ENODEV;
1110 goto ERROR2;
1111 }
1112 }
1113 }
1114
1115 /* We have either had a force parameter, or we have already detected the
1116 Winbond. Put it now into bank 0 and Vendor ID High Byte */
1117 w83781d_write_value(new_client, W83781D_REG_BANK,
1118 (w83781d_read_value(new_client,
1119 W83781D_REG_BANK) & 0x78) |
1120 0x80);
1121
1122 /* Determine the chip type. */
1123 if (kind <= 0) {
1124 /* get vendor ID */
1125 val2 = w83781d_read_value(new_client, W83781D_REG_CHIPMAN);
1126 if (val2 == 0x5c)
1127 vendid = winbond;
1128 else if (val2 == 0x12)
1129 vendid = asus;
1130 else {
1131 dev_dbg(&new_client->dev, "Chip was made by neither "
1132 "Winbond nor Asus?\n");
1133 err = -ENODEV;
1134 goto ERROR2;
1135 }
1136
1137 val1 = w83781d_read_value(new_client, W83781D_REG_WCHIPID);
1138 if ((val1 == 0x10 || val1 == 0x11) && vendid == winbond)
1139 kind = w83781d;
1140 else if (val1 == 0x30 && vendid == winbond)
1141 kind = w83782d;
1142 else if (val1 == 0x40 && vendid == winbond && !is_isa
1143 && address == 0x2d)
1144 kind = w83783s;
7c7a5304 1145 else if (val1 == 0x21 && vendid == winbond)
1da177e4
LT
1146 kind = w83627hf;
1147 else if (val1 == 0x31 && !is_isa && address >= 0x28)
1148 kind = as99127f;
1da177e4
LT
1149 else {
1150 if (kind == 0)
1151 dev_warn(&new_client->dev, "Ignoring 'force' "
1152 "parameter for unknown chip at "
1153 "adapter %d, address 0x%02x\n",
1154 i2c_adapter_id(adapter), address);
1155 err = -EINVAL;
1156 goto ERROR2;
1157 }
1158 }
1159
1160 if (kind == w83781d) {
1161 client_name = "w83781d";
1162 } else if (kind == w83782d) {
1163 client_name = "w83782d";
1164 } else if (kind == w83783s) {
1165 client_name = "w83783s";
1166 } else if (kind == w83627hf) {
7c7a5304 1167 client_name = "w83627hf";
1da177e4
LT
1168 } else if (kind == as99127f) {
1169 client_name = "as99127f";
1da177e4
LT
1170 }
1171
1172 /* Fill in the remaining client fields and put into the global list */
1173 strlcpy(new_client->name, client_name, I2C_NAME_SIZE);
1174 data->type = kind;
1175
1176 data->valid = 0;
1177 init_MUTEX(&data->update_lock);
1178
1179 /* Tell the I2C layer a new client has arrived */
1180 if ((err = i2c_attach_client(new_client)))
1181 goto ERROR2;
1182
1183 /* attach secondary i2c lm75-like clients */
1184 if (!is_isa) {
1185 if ((err = w83781d_detect_subclients(adapter, address,
1186 kind, new_client)))
1187 goto ERROR3;
1188 } else {
1189 data->lm75[0] = NULL;
1190 data->lm75[1] = NULL;
1191 }
1192
1193 /* Initialize the chip */
1194 w83781d_init_client(new_client);
1195
1196 /* A few vars need to be filled upon startup */
1197 for (i = 1; i <= 3; i++) {
1198 data->fan_min[i - 1] = w83781d_read_value(new_client,
1199 W83781D_REG_FAN_MIN(i));
1200 }
1201 if (kind != w83781d && kind != as99127f)
1202 for (i = 0; i < 4; i++)
1203 data->pwmenable[i] = 1;
1204
1205 /* Register sysfs hooks */
943b0830
MH
1206 data->class_dev = hwmon_device_register(&new_client->dev);
1207 if (IS_ERR(data->class_dev)) {
1208 err = PTR_ERR(data->class_dev);
1209 goto ERROR4;
1210 }
1211
1da177e4 1212 device_create_file_in(new_client, 0);
7c7a5304 1213 if (kind != w83783s)
1da177e4
LT
1214 device_create_file_in(new_client, 1);
1215 device_create_file_in(new_client, 2);
1216 device_create_file_in(new_client, 3);
1217 device_create_file_in(new_client, 4);
1218 device_create_file_in(new_client, 5);
1219 device_create_file_in(new_client, 6);
1220 if (kind != as99127f && kind != w83781d && kind != w83783s) {
1221 device_create_file_in(new_client, 7);
1222 device_create_file_in(new_client, 8);
1223 }
1224
1225 device_create_file_fan(new_client, 1);
1226 device_create_file_fan(new_client, 2);
7c7a5304 1227 device_create_file_fan(new_client, 3);
1da177e4
LT
1228
1229 device_create_file_temp(new_client, 1);
1230 device_create_file_temp(new_client, 2);
7c7a5304 1231 if (kind != w83783s)
1da177e4
LT
1232 device_create_file_temp(new_client, 3);
1233
7c7a5304
JD
1234 device_create_file_vid(new_client);
1235 device_create_file_vrm(new_client);
1da177e4
LT
1236
1237 device_create_file_fan_div(new_client, 1);
1238 device_create_file_fan_div(new_client, 2);
7c7a5304 1239 device_create_file_fan_div(new_client, 3);
1da177e4
LT
1240
1241 device_create_file_alarms(new_client);
1242
1243 device_create_file_beep(new_client);
1244
1245 if (kind != w83781d && kind != as99127f) {
1246 device_create_file_pwm(new_client, 1);
1247 device_create_file_pwm(new_client, 2);
1248 device_create_file_pwmenable(new_client, 2);
1249 }
1250 if (kind == w83782d && !is_isa) {
1251 device_create_file_pwm(new_client, 3);
1252 device_create_file_pwm(new_client, 4);
1253 }
1254
1255 if (kind != as99127f && kind != w83781d) {
1256 device_create_file_sensor(new_client, 1);
1257 device_create_file_sensor(new_client, 2);
7c7a5304 1258 if (kind != w83783s)
1da177e4
LT
1259 device_create_file_sensor(new_client, 3);
1260 }
1261
1262 return 0;
1263
943b0830
MH
1264ERROR4:
1265 if (data->lm75[1]) {
1266 i2c_detach_client(data->lm75[1]);
1267 kfree(data->lm75[1]);
1268 }
1269 if (data->lm75[0]) {
1270 i2c_detach_client(data->lm75[0]);
1271 kfree(data->lm75[0]);
1272 }
1da177e4
LT
1273ERROR3:
1274 i2c_detach_client(new_client);
1275ERROR2:
1276 kfree(data);
1277ERROR1:
1278 if (is_isa)
1279 release_region(address, W83781D_EXTENT);
1280ERROR0:
1281 return err;
1282}
1283
1284static int
1285w83781d_detach_client(struct i2c_client *client)
1286{
943b0830 1287 struct w83781d_data *data = i2c_get_clientdata(client);
1da177e4
LT
1288 int err;
1289
943b0830
MH
1290 /* main client */
1291 if (data)
1292 hwmon_device_unregister(data->class_dev);
1293
1da177e4
LT
1294 if (i2c_is_isa_client(client))
1295 release_region(client->addr, W83781D_EXTENT);
1296
7bef5594 1297 if ((err = i2c_detach_client(client)))
1da177e4 1298 return err;
1da177e4 1299
943b0830
MH
1300 /* main client */
1301 if (data)
1302 kfree(data);
1303
1304 /* subclient */
1305 else
1da177e4 1306 kfree(client);
1da177e4
LT
1307
1308 return 0;
1309}
1310
1311/* The SMBus locks itself, usually, but nothing may access the Winbond between
1312 bank switches. ISA access must always be locked explicitly!
1313 We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,
1314 would slow down the W83781D access and should not be necessary.
1315 There are some ugly typecasts here, but the good news is - they should
1316 nowhere else be necessary! */
1317static int
1318w83781d_read_value(struct i2c_client *client, u16 reg)
1319{
1320 struct w83781d_data *data = i2c_get_clientdata(client);
1321 int res, word_sized, bank;
1322 struct i2c_client *cl;
1323
1324 down(&data->lock);
1325 if (i2c_is_isa_client(client)) {
1326 word_sized = (((reg & 0xff00) == 0x100)
1327 || ((reg & 0xff00) == 0x200))
1328 && (((reg & 0x00ff) == 0x50)
1329 || ((reg & 0x00ff) == 0x53)
1330 || ((reg & 0x00ff) == 0x55));
1331 if (reg & 0xff00) {
1332 outb_p(W83781D_REG_BANK,
1333 client->addr + W83781D_ADDR_REG_OFFSET);
1334 outb_p(reg >> 8,
1335 client->addr + W83781D_DATA_REG_OFFSET);
1336 }
1337 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1338 res = inb_p(client->addr + W83781D_DATA_REG_OFFSET);
1339 if (word_sized) {
1340 outb_p((reg & 0xff) + 1,
1341 client->addr + W83781D_ADDR_REG_OFFSET);
1342 res =
1343 (res << 8) + inb_p(client->addr +
1344 W83781D_DATA_REG_OFFSET);
1345 }
1346 if (reg & 0xff00) {
1347 outb_p(W83781D_REG_BANK,
1348 client->addr + W83781D_ADDR_REG_OFFSET);
1349 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1350 }
1351 } else {
1352 bank = (reg >> 8) & 0x0f;
1353 if (bank > 2)
1354 /* switch banks */
1355 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1356 bank);
1357 if (bank == 0 || bank > 2) {
1358 res = i2c_smbus_read_byte_data(client, reg & 0xff);
1359 } else {
1360 /* switch to subclient */
1361 cl = data->lm75[bank - 1];
1362 /* convert from ISA to LM75 I2C addresses */
1363 switch (reg & 0xff) {
1364 case 0x50: /* TEMP */
1365 res = swab16(i2c_smbus_read_word_data(cl, 0));
1366 break;
1367 case 0x52: /* CONFIG */
1368 res = i2c_smbus_read_byte_data(cl, 1);
1369 break;
1370 case 0x53: /* HYST */
1371 res = swab16(i2c_smbus_read_word_data(cl, 2));
1372 break;
1373 case 0x55: /* OVER */
1374 default:
1375 res = swab16(i2c_smbus_read_word_data(cl, 3));
1376 break;
1377 }
1378 }
1379 if (bank > 2)
1380 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1381 }
1382 up(&data->lock);
1383 return res;
1384}
1385
1386static int
1387w83781d_write_value(struct i2c_client *client, u16 reg, u16 value)
1388{
1389 struct w83781d_data *data = i2c_get_clientdata(client);
1390 int word_sized, bank;
1391 struct i2c_client *cl;
1392
1393 down(&data->lock);
1394 if (i2c_is_isa_client(client)) {
1395 word_sized = (((reg & 0xff00) == 0x100)
1396 || ((reg & 0xff00) == 0x200))
1397 && (((reg & 0x00ff) == 0x53)
1398 || ((reg & 0x00ff) == 0x55));
1399 if (reg & 0xff00) {
1400 outb_p(W83781D_REG_BANK,
1401 client->addr + W83781D_ADDR_REG_OFFSET);
1402 outb_p(reg >> 8,
1403 client->addr + W83781D_DATA_REG_OFFSET);
1404 }
1405 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1406 if (word_sized) {
1407 outb_p(value >> 8,
1408 client->addr + W83781D_DATA_REG_OFFSET);
1409 outb_p((reg & 0xff) + 1,
1410 client->addr + W83781D_ADDR_REG_OFFSET);
1411 }
1412 outb_p(value & 0xff, client->addr + W83781D_DATA_REG_OFFSET);
1413 if (reg & 0xff00) {
1414 outb_p(W83781D_REG_BANK,
1415 client->addr + W83781D_ADDR_REG_OFFSET);
1416 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1417 }
1418 } else {
1419 bank = (reg >> 8) & 0x0f;
1420 if (bank > 2)
1421 /* switch banks */
1422 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1423 bank);
1424 if (bank == 0 || bank > 2) {
1425 i2c_smbus_write_byte_data(client, reg & 0xff,
1426 value & 0xff);
1427 } else {
1428 /* switch to subclient */
1429 cl = data->lm75[bank - 1];
1430 /* convert from ISA to LM75 I2C addresses */
1431 switch (reg & 0xff) {
1432 case 0x52: /* CONFIG */
1433 i2c_smbus_write_byte_data(cl, 1, value & 0xff);
1434 break;
1435 case 0x53: /* HYST */
1436 i2c_smbus_write_word_data(cl, 2, swab16(value));
1437 break;
1438 case 0x55: /* OVER */
1439 i2c_smbus_write_word_data(cl, 3, swab16(value));
1440 break;
1441 }
1442 }
1443 if (bank > 2)
1444 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1445 }
1446 up(&data->lock);
1447 return 0;
1448}
1449
1da177e4
LT
1450static void
1451w83781d_init_client(struct i2c_client *client)
1452{
1453 struct w83781d_data *data = i2c_get_clientdata(client);
1454 int i, p;
1455 int type = data->type;
1456 u8 tmp;
1457
1458 if (init && type != as99127f) { /* this resets registers we don't have
1459 documentation for on the as99127f */
1460 /* save these registers */
1461 i = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG);
1462 p = w83781d_read_value(client, W83781D_REG_PWMCLK12);
1463 /* Reset all except Watchdog values and last conversion values
1464 This sets fan-divs to 2, among others */
1465 w83781d_write_value(client, W83781D_REG_CONFIG, 0x80);
1466 /* Restore the registers and disable power-on abnormal beep.
1467 This saves FAN 1/2/3 input/output values set by BIOS. */
1468 w83781d_write_value(client, W83781D_REG_BEEP_CONFIG, i | 0x80);
1469 w83781d_write_value(client, W83781D_REG_PWMCLK12, p);
1470 /* Disable master beep-enable (reset turns it on).
1471 Individual beep_mask should be reset to off but for some reason
1472 disabling this bit helps some people not get beeped */
1473 w83781d_write_value(client, W83781D_REG_BEEP_INTS2, 0);
1474 }
1475
303760b4 1476 data->vrm = vid_which_vrm();
1da177e4
LT
1477
1478 if ((type != w83781d) && (type != as99127f)) {
1479 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
1480 for (i = 1; i <= 3; i++) {
1481 if (!(tmp & BIT_SCFG1[i - 1])) {
1482 data->sens[i - 1] = W83781D_DEFAULT_BETA;
1483 } else {
1484 if (w83781d_read_value
1485 (client,
1486 W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1487 data->sens[i - 1] = 1;
1488 else
1489 data->sens[i - 1] = 2;
1490 }
7c7a5304 1491 if (type == w83783s && i == 2)
1da177e4
LT
1492 break;
1493 }
1494 }
1495
1496 if (init && type != as99127f) {
1497 /* Enable temp2 */
1498 tmp = w83781d_read_value(client, W83781D_REG_TEMP2_CONFIG);
1499 if (tmp & 0x01) {
1500 dev_warn(&client->dev, "Enabling temp2, readings "
1501 "might not make sense\n");
1502 w83781d_write_value(client, W83781D_REG_TEMP2_CONFIG,
1503 tmp & 0xfe);
1504 }
1505
1506 /* Enable temp3 */
7c7a5304 1507 if (type != w83783s) {
1da177e4
LT
1508 tmp = w83781d_read_value(client,
1509 W83781D_REG_TEMP3_CONFIG);
1510 if (tmp & 0x01) {
1511 dev_warn(&client->dev, "Enabling temp3, "
1512 "readings might not make sense\n");
1513 w83781d_write_value(client,
1514 W83781D_REG_TEMP3_CONFIG, tmp & 0xfe);
1515 }
1516 }
1517
1518 if (type != w83781d) {
1519 /* enable comparator mode for temp2 and temp3 so
1520 alarm indication will work correctly */
1521 i = w83781d_read_value(client, W83781D_REG_IRQ);
1522 if (!(i & 0x40))
1523 w83781d_write_value(client, W83781D_REG_IRQ,
1524 i | 0x40);
1525 }
1526 }
1527
1528 /* Start monitoring */
1529 w83781d_write_value(client, W83781D_REG_CONFIG,
1530 (w83781d_read_value(client,
1531 W83781D_REG_CONFIG) & 0xf7)
1532 | 0x01);
1533}
1534
1535static struct w83781d_data *w83781d_update_device(struct device *dev)
1536{
1537 struct i2c_client *client = to_i2c_client(dev);
1538 struct w83781d_data *data = i2c_get_clientdata(client);
1539 int i;
1540
1541 down(&data->update_lock);
1542
1543 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1544 || !data->valid) {
1545 dev_dbg(dev, "Starting device update\n");
1546
1547 for (i = 0; i <= 8; i++) {
7c7a5304 1548 if (data->type == w83783s && i == 1)
1da177e4
LT
1549 continue; /* 783S has no in1 */
1550 data->in[i] =
1551 w83781d_read_value(client, W83781D_REG_IN(i));
1552 data->in_min[i] =
1553 w83781d_read_value(client, W83781D_REG_IN_MIN(i));
1554 data->in_max[i] =
1555 w83781d_read_value(client, W83781D_REG_IN_MAX(i));
7c7a5304 1556 if ((data->type != w83782d)
1da177e4
LT
1557 && (data->type != w83627hf) && (i == 6))
1558 break;
1559 }
1560 for (i = 1; i <= 3; i++) {
1561 data->fan[i - 1] =
1562 w83781d_read_value(client, W83781D_REG_FAN(i));
1563 data->fan_min[i - 1] =
1564 w83781d_read_value(client, W83781D_REG_FAN_MIN(i));
1565 }
1566 if (data->type != w83781d && data->type != as99127f) {
1567 for (i = 1; i <= 4; i++) {
1568 data->pwm[i - 1] =
1569 w83781d_read_value(client,
1570 W83781D_REG_PWM(i));
1571 if ((data->type != w83782d
1572 || i2c_is_isa_client(client))
1573 && i == 2)
1574 break;
1575 }
1576 /* Only PWM2 can be disabled */
1577 data->pwmenable[1] = (w83781d_read_value(client,
1578 W83781D_REG_PWMCLK12) & 0x08) >> 3;
1579 }
1580
1581 data->temp = w83781d_read_value(client, W83781D_REG_TEMP(1));
1582 data->temp_max =
1583 w83781d_read_value(client, W83781D_REG_TEMP_OVER(1));
1584 data->temp_max_hyst =
1585 w83781d_read_value(client, W83781D_REG_TEMP_HYST(1));
1586 data->temp_add[0] =
1587 w83781d_read_value(client, W83781D_REG_TEMP(2));
1588 data->temp_max_add[0] =
1589 w83781d_read_value(client, W83781D_REG_TEMP_OVER(2));
1590 data->temp_max_hyst_add[0] =
1591 w83781d_read_value(client, W83781D_REG_TEMP_HYST(2));
7c7a5304 1592 if (data->type != w83783s) {
1da177e4
LT
1593 data->temp_add[1] =
1594 w83781d_read_value(client, W83781D_REG_TEMP(3));
1595 data->temp_max_add[1] =
1596 w83781d_read_value(client,
1597 W83781D_REG_TEMP_OVER(3));
1598 data->temp_max_hyst_add[1] =
1599 w83781d_read_value(client,
1600 W83781D_REG_TEMP_HYST(3));
1601 }
1602 i = w83781d_read_value(client, W83781D_REG_VID_FANDIV);
7c7a5304
JD
1603 data->vid = i & 0x0f;
1604 data->vid |= (w83781d_read_value(client,
1605 W83781D_REG_CHIPID) & 0x01) << 4;
1da177e4
LT
1606 data->fan_div[0] = (i >> 4) & 0x03;
1607 data->fan_div[1] = (i >> 6) & 0x03;
7c7a5304
JD
1608 data->fan_div[2] = (w83781d_read_value(client,
1609 W83781D_REG_PIN) >> 6) & 0x03;
1da177e4
LT
1610 if ((data->type != w83781d) && (data->type != as99127f)) {
1611 i = w83781d_read_value(client, W83781D_REG_VBAT);
1612 data->fan_div[0] |= (i >> 3) & 0x04;
1613 data->fan_div[1] |= (i >> 4) & 0x04;
7c7a5304 1614 data->fan_div[2] |= (i >> 5) & 0x04;
1da177e4
LT
1615 }
1616 data->alarms =
1617 w83781d_read_value(client,
1618 W83781D_REG_ALARM1) +
1619 (w83781d_read_value(client, W83781D_REG_ALARM2) << 8);
1620 if ((data->type == w83782d) || (data->type == w83627hf)) {
1621 data->alarms |=
1622 w83781d_read_value(client,
1623 W83781D_REG_ALARM3) << 16;
1624 }
1625 i = w83781d_read_value(client, W83781D_REG_BEEP_INTS2);
1626 data->beep_enable = i >> 7;
1627 data->beep_mask = ((i & 0x7f) << 8) +
1628 w83781d_read_value(client, W83781D_REG_BEEP_INTS1);
1629 if ((data->type != w83781d) && (data->type != as99127f)) {
1630 data->beep_mask |=
1631 w83781d_read_value(client,
1632 W83781D_REG_BEEP_INTS3) << 16;
1633 }
1634 data->last_updated = jiffies;
1635 data->valid = 1;
1636 }
1637
1638 up(&data->update_lock);
1639
1640 return data;
1641}
1642
1643static int __init
1644sensors_w83781d_init(void)
1645{
fde09509
JD
1646 int res;
1647
1648 res = i2c_add_driver(&w83781d_driver);
1649 if (res)
1650 return res;
1651
1652 res = i2c_isa_add_driver(&w83781d_isa_driver);
1653 if (res) {
1654 i2c_del_driver(&w83781d_driver);
1655 return res;
1656 }
1657
1658 return 0;
1da177e4
LT
1659}
1660
1661static void __exit
1662sensors_w83781d_exit(void)
1663{
fde09509 1664 i2c_isa_del_driver(&w83781d_isa_driver);
1da177e4
LT
1665 i2c_del_driver(&w83781d_driver);
1666}
1667
1668MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
1669 "Philip Edelbrock <phil@netroedge.com>, "
1670 "and Mark Studebaker <mdsxyz123@yahoo.com>");
1671MODULE_DESCRIPTION("W83781D driver");
1672MODULE_LICENSE("GPL");
1673
1674module_init(sensors_w83781d_init);
1675module_exit(sensors_w83781d_exit);