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Merge branch 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6
[mirror_ubuntu-jammy-kernel.git] / drivers / hwmon / w83793.c
CommitLineData
ff7924b0 1// SPDX-License-Identifier: GPL-2.0-only
6800c3d0 2/*
47efe877
GR		 3 * w83793.c - Linux kernel driver for hardware monitoring
4 * Copyright (C) 2006 Winbond Electronics Corp.
5 * Yuan Mu
6 * Rudolf Marek <r.marek@assembler.cz>
7 * Copyright (C) 2009-2010 Sven Anders <anders@anduras.de>, ANDURAS AG.
8 * Watchdog driver part
9 * (Based partially on fschmd driver,
10 * Copyright 2007-2008 by Hans de Goede)
47efe877 11 */
6800c3d0
RM		 12
13/*
47efe877
GR		 14 * Supports following chips:
15 *
16 * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
17 * w83793 10 12 8 6 0x7b 0x5ca3 yes no
18 */
6800c3d0
RM		 19
20#include <linux/module.h>
21#include <linux/init.h>
22#include <linux/slab.h>
23#include <linux/i2c.h>
24#include <linux/hwmon.h>
25#include <linux/hwmon-vid.h>
26#include <linux/hwmon-sysfs.h>
27#include <linux/err.h>
28#include <linux/mutex.h>
5852f960
SA		 29#include <linux/fs.h>
30#include <linux/watchdog.h>
31#include <linux/miscdevice.h>
32#include <linux/uaccess.h>
33#include <linux/kref.h>
34#include <linux/notifier.h>
35#include <linux/reboot.h>
dcd8f392 36#include <linux/jiffies.h>
5852f960
SA		 37
38/* Default values */
39#define WATCHDOG_TIMEOUT 2 /* 2 minute default timeout */
6800c3d0
RM		 40
41/* Addresses to scan */
25e9c86d
MH		 42static const unsigned short normal_i2c[] = { 0x2c, 0x2d, 0x2e, 0x2f,
43 I2C_CLIENT_END };
6800c3d0
RM		 44
45/* Insmod parameters */
3aed198c
JD		 46
47static unsigned short force_subclients[4];
48module_param_array(force_subclients, short, NULL, 0);
b55f3757
GR		 49MODULE_PARM_DESC(force_subclients,
50 "List of subclient addresses: {bus, clientaddr, subclientaddr1, subclientaddr2}");
6800c3d0 51
90ab5ee9 52static bool reset;
6800c3d0
RM		 53module_param(reset, bool, 0);
54MODULE_PARM_DESC(reset, "Set to 1 to reset chip, not recommended");
55
5852f960
SA		 56static int timeout = WATCHDOG_TIMEOUT; /* default timeout in minutes */
57module_param(timeout, int, 0);
58MODULE_PARM_DESC(timeout,
59 "Watchdog timeout in minutes. 2<= timeout <=255 (default="
60 __MODULE_STRING(WATCHDOG_TIMEOUT) ")");
61
86a1e189
WVS		 62static bool nowayout = WATCHDOG_NOWAYOUT;
63module_param(nowayout, bool, 0);
5852f960
SA		 64MODULE_PARM_DESC(nowayout,
65 "Watchdog cannot be stopped once started (default="
66 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
67
6800c3d0 68/*
47efe877
GR		 69 * Address 0x00, 0x0d, 0x0e, 0x0f in all three banks are reserved
70 * as ID, Bank Select registers
71 */
6800c3d0
RM		 72#define W83793_REG_BANKSEL 0x00
73#define W83793_REG_VENDORID 0x0d
74#define W83793_REG_CHIPID 0x0e
75#define W83793_REG_DEVICEID 0x0f
76
77#define W83793_REG_CONFIG 0x40
78#define W83793_REG_MFC 0x58
79#define W83793_REG_FANIN_CTRL 0x5c
80#define W83793_REG_FANIN_SEL 0x5d
81#define W83793_REG_I2C_ADDR 0x0b
82#define W83793_REG_I2C_SUBADDR 0x0c
83#define W83793_REG_VID_INA 0x05
84#define W83793_REG_VID_INB 0x06
85#define W83793_REG_VID_LATCHA 0x07
86#define W83793_REG_VID_LATCHB 0x08
87#define W83793_REG_VID_CTRL 0x59
88
5852f960
SA		 89#define W83793_REG_WDT_LOCK 0x01
90#define W83793_REG_WDT_ENABLE 0x02
91#define W83793_REG_WDT_STATUS 0x03
92#define W83793_REG_WDT_TIMEOUT 0x04
93
6800c3d0
RM		 94static u16 W83793_REG_TEMP_MODE[2] = { 0x5e, 0x5f };
95
96#define TEMP_READ 0
97#define TEMP_CRIT 1
98#define TEMP_CRIT_HYST 2
99#define TEMP_WARN 3
100#define TEMP_WARN_HYST 4
47efe877
GR		 101/*
102 * only crit and crit_hyst affect real-time alarm status
103 * current crit crit_hyst warn warn_hyst
104 */
6800c3d0
RM		 105static u16 W83793_REG_TEMP[][5] = {
106 {0x1c, 0x78, 0x79, 0x7a, 0x7b},
107 {0x1d, 0x7c, 0x7d, 0x7e, 0x7f},
108 {0x1e, 0x80, 0x81, 0x82, 0x83},
109 {0x1f, 0x84, 0x85, 0x86, 0x87},
110 {0x20, 0x88, 0x89, 0x8a, 0x8b},
111 {0x21, 0x8c, 0x8d, 0x8e, 0x8f},
112};
113
114#define W83793_REG_TEMP_LOW_BITS 0x22
115
116#define W83793_REG_BEEP(index) (0x53 + (index))
117#define W83793_REG_ALARM(index) (0x4b + (index))
118
119#define W83793_REG_CLR_CHASSIS 0x4a /* SMI MASK4 */
120#define W83793_REG_IRQ_CTRL 0x50
121#define W83793_REG_OVT_CTRL 0x51
122#define W83793_REG_OVT_BEEP 0x52
123
124#define IN_READ 0
125#define IN_MAX 1
126#define IN_LOW 2
127static const u16 W83793_REG_IN[][3] = {
128 /* Current, High, Low */
129 {0x10, 0x60, 0x61}, /* Vcore A */
130 {0x11, 0x62, 0x63}, /* Vcore B */
131 {0x12, 0x64, 0x65}, /* Vtt */
132 {0x14, 0x6a, 0x6b}, /* VSEN1 */
133 {0x15, 0x6c, 0x6d}, /* VSEN2 */
134 {0x16, 0x6e, 0x6f}, /* +3VSEN */
135 {0x17, 0x70, 0x71}, /* +12VSEN */
136 {0x18, 0x72, 0x73}, /* 5VDD */
137 {0x19, 0x74, 0x75}, /* 5VSB */
138 {0x1a, 0x76, 0x77}, /* VBAT */
139};
140
141/* Low Bits of Vcore A/B Vtt Read/High/Low */
142static const u16 W83793_REG_IN_LOW_BITS[] = { 0x1b, 0x68, 0x69 };
143static u8 scale_in[] = { 2, 2, 2, 16, 16, 16, 8, 24, 24, 16 };
ddca933b 144static u8 scale_in_add[] = { 0, 0, 0, 0, 0, 0, 0, 150, 150, 0 };
6800c3d0
RM		 145
146#define W83793_REG_FAN(index) (0x23 + 2 * (index)) /* High byte */
147#define W83793_REG_FAN_MIN(index) (0x90 + 2 * (index)) /* High byte */
148
149#define W83793_REG_PWM_DEFAULT 0xb2
150#define W83793_REG_PWM_ENABLE 0x207
151#define W83793_REG_PWM_UPTIME 0xc3 /* Unit in 0.1 second */
152#define W83793_REG_PWM_DOWNTIME 0xc4 /* Unit in 0.1 second */
153#define W83793_REG_TEMP_CRITICAL 0xc5
154
155#define PWM_DUTY 0
156#define PWM_START 1
157#define PWM_NONSTOP 2
5aebefb0 158#define PWM_STOP_TIME 3
6800c3d0
RM		 159#define W83793_REG_PWM(index, nr) (((nr) == 0 ? 0xb3 : \
160 (nr) == 1 ? 0x220 : 0x218) + (index))
161
162/* bit field, fan1 is bit0, fan2 is bit1 ... */
163#define W83793_REG_TEMP_FAN_MAP(index) (0x201 + (index))
164#define W83793_REG_TEMP_TOL(index) (0x208 + (index))
165#define W83793_REG_TEMP_CRUISE(index) (0x210 + (index))
166#define W83793_REG_PWM_STOP_TIME(index) (0x228 + (index))
167#define W83793_REG_SF2_TEMP(index, nr) (0x230 + ((index) << 4) + (nr))
168#define W83793_REG_SF2_PWM(index, nr) (0x238 + ((index) << 4) + (nr))
169
170static inline unsigned long FAN_FROM_REG(u16 val)
171{
172 if ((val >= 0xfff) || (val == 0))
173 return 0;
7fe83ad8 174 return 1350000UL / val;
6800c3d0
RM		 175}
176
177static inline u16 FAN_TO_REG(long rpm)
178{
179 if (rpm <= 0)
180 return 0x0fff;
2a844c14 181 return clamp_val((1350000 + (rpm >> 1)) / rpm, 1, 0xffe);
6800c3d0
RM		 182}
183
184static inline unsigned long TIME_FROM_REG(u8 reg)
185{
7fe83ad8 186 return reg * 100;
6800c3d0
RM		 187}
188
189static inline u8 TIME_TO_REG(unsigned long val)
190{
2a844c14 191 return clamp_val((val + 50) / 100, 0, 0xff);
6800c3d0
RM		 192}
193
194static inline long TEMP_FROM_REG(s8 reg)
195{
7fe83ad8 196 return reg * 1000;
6800c3d0
RM		 197}
198
199static inline s8 TEMP_TO_REG(long val, s8 min, s8 max)
200{
2a844c14 201 return clamp_val((val + (val < 0 ? -500 : 500)) / 1000, min, max);
6800c3d0
RM		 202}
203
204struct w83793_data {
6800c3d0 205 struct i2c_client *lm75[2];
1beeffe4 206 struct device *hwmon_dev;
6800c3d0
RM		 207 struct mutex update_lock;
208 char valid; /* !=0 if following fields are valid */
209 unsigned long last_updated; /* In jiffies */
210 unsigned long last_nonvolatile; /* In jiffies, last time we update the
47efe877
GR		 211 * nonvolatile registers
212 */
6800c3d0
RM		 213
214 u8 bank;
215 u8 vrm;
216 u8 vid[2];
217 u8 in[10][3]; /* Register value, read/high/low */
218 u8 in_low_bits[3]; /* Additional resolution for VCore A/B Vtt */
219
220 u16 has_fan; /* Only fan1- fan5 has own pins */
221 u16 fan[12]; /* Register value combine */
222 u16 fan_min[12]; /* Register value combine */
223
224 s8 temp[6][5]; /* current, crit, crit_hyst,warn, warn_hyst */
225 u8 temp_low_bits; /* Additional resolution TD1-TD4 */
226 u8 temp_mode[2]; /* byte 0: Temp D1-D4 mode each has 2 bits
47efe877
GR		 227 * byte 1: Temp R1,R2 mode, each has 1 bit
228 */
6800c3d0
RM		 229 u8 temp_critical; /* If reached all fan will be at full speed */
230 u8 temp_fan_map[6]; /* Temp controls which pwm fan, bit field */
231
232 u8 has_pwm;
46bed4df 233 u8 has_temp;
c70a8c34 234 u8 has_vid;
6800c3d0
RM		 235 u8 pwm_enable; /* Register value, each Temp has 1 bit */
236 u8 pwm_uptime; /* Register value */
237 u8 pwm_downtime; /* Register value */
238 u8 pwm_default; /* All fan default pwm, next poweron valid */
239 u8 pwm[8][3]; /* Register value */
240 u8 pwm_stop_time[8];
241 u8 temp_cruise[6];
242
243 u8 alarms[5]; /* realtime status registers */
244 u8 beeps[5];
245 u8 beep_enable;
246 u8 tolerance[3]; /* Temp tolerance(Smart Fan I/II) */
247 u8 sf2_pwm[6][7]; /* Smart FanII: Fan duty cycle */
248 u8 sf2_temp[6][7]; /* Smart FanII: Temp level point */
5852f960
SA		 249
250 /* watchdog */
251 struct i2c_client *client;
252 struct mutex watchdog_lock;
253 struct list_head list; /* member of the watchdog_data_list */
254 struct kref kref;
255 struct miscdevice watchdog_miscdev;
256 unsigned long watchdog_is_open;
257 char watchdog_expect_close;
258 char watchdog_name[10]; /* must be unique to avoid sysfs conflict */
259 unsigned int watchdog_caused_reboot;
260 int watchdog_timeout; /* watchdog timeout in minutes */
6800c3d0
RM		 261};
262
47efe877
GR		 263/*
264 * Somewhat ugly :( global data pointer list with all devices, so that
265 * we can find our device data as when using misc_register. There is no
266 * other method to get to one's device data from the open file-op and
267 * for usage in the reboot notifier callback.
268 */
5852f960
SA		 269static LIST_HEAD(watchdog_data_list);
270
271/* Note this lock not only protect list access, but also data.kref access */
272static DEFINE_MUTEX(watchdog_data_mutex);
273
47efe877
GR		 274/*
275 * Release our data struct when we're detached from the i2c client *and* all
276 * references to our watchdog device are released
277 */
5852f960
SA		 278static void w83793_release_resources(struct kref *ref)
279{
280 struct w83793_data *data = container_of(ref, struct w83793_data, kref);
281 kfree(data);
282}
283
6800c3d0
RM		 284static u8 w83793_read_value(struct i2c_client *client, u16 reg);
285static int w83793_write_value(struct i2c_client *client, u16 reg, u8 value);
a7f13a6e
JD		 286static int w83793_probe(struct i2c_client *client,
287 const struct i2c_device_id *id);
310ec792 288static int w83793_detect(struct i2c_client *client,
a7f13a6e
JD		 289 struct i2c_board_info *info);
290static int w83793_remove(struct i2c_client *client);
6800c3d0
RM		 291static void w83793_init_client(struct i2c_client *client);
292static void w83793_update_nonvolatile(struct device *dev);
293static struct w83793_data *w83793_update_device(struct device *dev);
294
a7f13a6e 295static const struct i2c_device_id w83793_id[] = {
1f86df49 296 { "w83793", 0 },
a7f13a6e
JD		 297 { }
298};
299MODULE_DEVICE_TABLE(i2c, w83793_id);
300
6800c3d0 301static struct i2c_driver w83793_driver = {
a7f13a6e 302 .class = I2C_CLASS_HWMON,
6800c3d0
RM		 303 .driver = {
304 .name = "w83793",
305 },
a7f13a6e
JD		 306 .probe = w83793_probe,
307 .remove = w83793_remove,
308 .id_table = w83793_id,
309 .detect = w83793_detect,
c3813d6a 310 .address_list = normal_i2c,
6800c3d0
RM		 311};
312
313static ssize_t
329beb71 314vrm_show(struct device *dev, struct device_attribute *attr, char *buf)
6800c3d0 315{
8f74efe8 316 struct w83793_data *data = dev_get_drvdata(dev);
6800c3d0
RM		 317 return sprintf(buf, "%d\n", data->vrm);
318}
319
320static ssize_t
321show_vid(struct device *dev, struct device_attribute *attr, char *buf)
322{
323 struct w83793_data *data = w83793_update_device(dev);
324 struct sensor_device_attribute_2 *sensor_attr =
325 to_sensor_dev_attr_2(attr);
326 int index = sensor_attr->index;
327
328 return sprintf(buf, "%d\n", vid_from_reg(data->vid[index], data->vrm));
329}
330
331static ssize_t
329beb71 332vrm_store(struct device *dev, struct device_attribute *attr,
6800c3d0
RM		 333 const char *buf, size_t count)
334{
8f74efe8 335 struct w83793_data *data = dev_get_drvdata(dev);
47efe877
GR		 336 unsigned long val;
337 int err;
338
339 err = kstrtoul(buf, 10, &val);
340 if (err)
341 return err;
342
2aeee04d
AL		 343 if (val > 255)
344 return -EINVAL;
345
47efe877 346 data->vrm = val;
6800c3d0
RM		 347 return count;
348}
349
350#define ALARM_STATUS 0
351#define BEEP_ENABLE 1
352static ssize_t
353show_alarm_beep(struct device *dev, struct device_attribute *attr, char *buf)
354{
355 struct w83793_data *data = w83793_update_device(dev);
356 struct sensor_device_attribute_2 *sensor_attr =
357 to_sensor_dev_attr_2(attr);
358 int nr = sensor_attr->nr;
359 int index = sensor_attr->index >> 3;
360 int bit = sensor_attr->index & 0x07;
361 u8 val;
362
47efe877 363 if (nr == ALARM_STATUS) {
6800c3d0
RM		 364 val = (data->alarms[index] >> (bit)) & 1;
365 } else { /* BEEP_ENABLE */
366 val = (data->beeps[index] >> (bit)) & 1;
367 }
368
369 return sprintf(buf, "%u\n", val);
370}
371
372static ssize_t
373store_beep(struct device *dev, struct device_attribute *attr,
374 const char *buf, size_t count)
375{
376 struct i2c_client *client = to_i2c_client(dev);
377 struct w83793_data *data = i2c_get_clientdata(client);
378 struct sensor_device_attribute_2 *sensor_attr =
379 to_sensor_dev_attr_2(attr);
380 int index = sensor_attr->index >> 3;
381 int shift = sensor_attr->index & 0x07;
382 u8 beep_bit = 1 << shift;
47efe877
GR		 383 unsigned long val;
384 int err;
6800c3d0 385
47efe877
GR		 386 err = kstrtoul(buf, 10, &val);
387 if (err)
388 return err;
389
390 if (val > 1)
6800c3d0
RM		 391 return -EINVAL;
392
393 mutex_lock(&data->update_lock);
394 data->beeps[index] = w83793_read_value(client, W83793_REG_BEEP(index));
395 data->beeps[index] &= ~beep_bit;
396 data->beeps[index] |= val << shift;
397 w83793_write_value(client, W83793_REG_BEEP(index), data->beeps[index]);
398 mutex_unlock(&data->update_lock);
399
400 return count;
401}
402
403static ssize_t
404show_beep_enable(struct device *dev, struct device_attribute *attr, char *buf)
405{
406 struct w83793_data *data = w83793_update_device(dev);
407 return sprintf(buf, "%u\n", (data->beep_enable >> 1) & 0x01);
408}
409
410static ssize_t
411store_beep_enable(struct device *dev, struct device_attribute *attr,
412 const char *buf, size_t count)
413{
414 struct i2c_client *client = to_i2c_client(dev);
415 struct w83793_data *data = i2c_get_clientdata(client);
47efe877
GR		 416 unsigned long val;
417 int err;
418
419 err = kstrtoul(buf, 10, &val);
420 if (err)
421 return err;
6800c3d0 422
47efe877 423 if (val > 1)
6800c3d0
RM		 424 return -EINVAL;
425
426 mutex_lock(&data->update_lock);
427 data->beep_enable = w83793_read_value(client, W83793_REG_OVT_BEEP)
428 & 0xfd;
429 data->beep_enable |= val << 1;
430 w83793_write_value(client, W83793_REG_OVT_BEEP, data->beep_enable);
431 mutex_unlock(&data->update_lock);
432
433 return count;
434}
435
a516dc3e
JD		 436/* Write 0 to clear chassis alarm */
437static ssize_t
438store_chassis_clear(struct device *dev,
439 struct device_attribute *attr, const char *buf,
440 size_t count)
441{
442 struct i2c_client *client = to_i2c_client(dev);
443 struct w83793_data *data = i2c_get_clientdata(client);
444 unsigned long val;
445 u8 reg;
47efe877 446 int err;
a516dc3e 447
47efe877
GR		 448 err = kstrtoul(buf, 10, &val);
449 if (err)
450 return err;
451 if (val)
a516dc3e
JD		 452 return -EINVAL;
453
454 mutex_lock(&data->update_lock);
455 reg = w83793_read_value(client, W83793_REG_CLR_CHASSIS);
456 w83793_write_value(client, W83793_REG_CLR_CHASSIS, reg | 0x80);
457 data->valid = 0; /* Force cache refresh */
458 mutex_unlock(&data->update_lock);
459 return count;
460}
461
6800c3d0
RM		 462#define FAN_INPUT 0
463#define FAN_MIN 1
464static ssize_t
465show_fan(struct device *dev, struct device_attribute *attr, char *buf)
466{
467 struct sensor_device_attribute_2 *sensor_attr =
468 to_sensor_dev_attr_2(attr);
469 int nr = sensor_attr->nr;
470 int index = sensor_attr->index;
471 struct w83793_data *data = w83793_update_device(dev);
472 u16 val;
473
47efe877 474 if (nr == FAN_INPUT)
6800c3d0 475 val = data->fan[index] & 0x0fff;
47efe877 476 else
6800c3d0 477 val = data->fan_min[index] & 0x0fff;
6800c3d0
RM		 478
479 return sprintf(buf, "%lu\n", FAN_FROM_REG(val));
480}
481
482static ssize_t
483store_fan_min(struct device *dev, struct device_attribute *attr,
484 const char *buf, size_t count)
485{
486 struct sensor_device_attribute_2 *sensor_attr =
487 to_sensor_dev_attr_2(attr);
488 int index = sensor_attr->index;
489 struct i2c_client *client = to_i2c_client(dev);
490 struct w83793_data *data = i2c_get_clientdata(client);
47efe877
GR		 491 unsigned long val;
492 int err;
493
494 err = kstrtoul(buf, 10, &val);
495 if (err)
496 return err;
497 val = FAN_TO_REG(val);
6800c3d0
RM		 498
499 mutex_lock(&data->update_lock);
500 data->fan_min[index] = val;
501 w83793_write_value(client, W83793_REG_FAN_MIN(index),
502 (val >> 8) & 0xff);
503 w83793_write_value(client, W83793_REG_FAN_MIN(index) + 1, val & 0xff);
504 mutex_unlock(&data->update_lock);
505
506 return count;
507}
508
6800c3d0
RM		 509static ssize_t
510show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
511{
512 struct sensor_device_attribute_2 *sensor_attr =
513 to_sensor_dev_attr_2(attr);
514 struct w83793_data *data = w83793_update_device(dev);
515 u16 val;
516 int nr = sensor_attr->nr;
517 int index = sensor_attr->index;
518
47efe877 519 if (nr == PWM_STOP_TIME)
6800c3d0
RM		 520 val = TIME_FROM_REG(data->pwm_stop_time[index]);
521 else
522 val = (data->pwm[index][nr] & 0x3f) << 2;
523
524 return sprintf(buf, "%d\n", val);
525}
526
527static ssize_t
528store_pwm(struct device *dev, struct device_attribute *attr,
529 const char *buf, size_t count)
530{
531 struct i2c_client *client = to_i2c_client(dev);
532 struct w83793_data *data = i2c_get_clientdata(client);
533 struct sensor_device_attribute_2 *sensor_attr =
534 to_sensor_dev_attr_2(attr);
535 int nr = sensor_attr->nr;
536 int index = sensor_attr->index;
47efe877
GR		 537 unsigned long val;
538 int err;
539
540 err = kstrtoul(buf, 10, &val);
541 if (err)
542 return err;
6800c3d0
RM		 543
544 mutex_lock(&data->update_lock);
47efe877
GR		 545 if (nr == PWM_STOP_TIME) {
546 val = TIME_TO_REG(val);
6800c3d0
RM		 547 data->pwm_stop_time[index] = val;
548 w83793_write_value(client, W83793_REG_PWM_STOP_TIME(index),
549 val);
550 } else {
2a844c14 551 val = clamp_val(val, 0, 0xff) >> 2;
6800c3d0
RM		 552 data->pwm[index][nr] =
553 w83793_read_value(client, W83793_REG_PWM(index, nr)) & 0xc0;
554 data->pwm[index][nr] |= val;
555 w83793_write_value(client, W83793_REG_PWM(index, nr),
556 data->pwm[index][nr]);
557 }
558
559 mutex_unlock(&data->update_lock);
560 return count;
561}
562
563static ssize_t
564show_temp(struct device *dev, struct device_attribute *attr, char *buf)
565{
566 struct sensor_device_attribute_2 *sensor_attr =
567 to_sensor_dev_attr_2(attr);
568 int nr = sensor_attr->nr;
569 int index = sensor_attr->index;
570 struct w83793_data *data = w83793_update_device(dev);
571 long temp = TEMP_FROM_REG(data->temp[index][nr]);
572
47efe877 573 if (nr == TEMP_READ && index < 4) { /* Only TD1-TD4 have low bits */
6800c3d0
RM		 574 int low = ((data->temp_low_bits >> (index * 2)) & 0x03) * 250;
575 temp += temp > 0 ? low : -low;
576 }
577 return sprintf(buf, "%ld\n", temp);
578}
579
580static ssize_t
581store_temp(struct device *dev, struct device_attribute *attr,
582 const char *buf, size_t count)
583{
584 struct sensor_device_attribute_2 *sensor_attr =
585 to_sensor_dev_attr_2(attr);
586 int nr = sensor_attr->nr;
587 int index = sensor_attr->index;
588 struct i2c_client *client = to_i2c_client(dev);
589 struct w83793_data *data = i2c_get_clientdata(client);
47efe877
GR		 590 long tmp;
591 int err;
592
593 err = kstrtol(buf, 10, &tmp);
594 if (err)
595 return err;
6800c3d0
RM		 596
597 mutex_lock(&data->update_lock);
598 data->temp[index][nr] = TEMP_TO_REG(tmp, -128, 127);
599 w83793_write_value(client, W83793_REG_TEMP[index][nr],
600 data->temp[index][nr]);
601 mutex_unlock(&data->update_lock);
602 return count;
603}
604
605/*
47efe877
GR		 606 * TD1-TD4
607 * each has 4 mode:(2 bits)
608 * 0: Stop monitor
609 * 1: Use internal temp sensor(default)
610 * 2: Reserved
611 * 3: Use sensor in Intel CPU and get result by PECI
612 *
613 * TR1-TR2
614 * each has 2 mode:(1 bit)
615 * 0: Disable temp sensor monitor
616 * 1: To enable temp sensors monitor
617 */
6800c3d0 618
ddca933b
GJ		 619/* 0 disable, 6 PECI */
620static u8 TO_TEMP_MODE[] = { 0, 0, 0, 6 };
6800c3d0
RM		 621
622static ssize_t
623show_temp_mode(struct device *dev, struct device_attribute *attr, char *buf)
624{
625 struct w83793_data *data = w83793_update_device(dev);
626 struct sensor_device_attribute_2 *sensor_attr =
627 to_sensor_dev_attr_2(attr);
628 int index = sensor_attr->index;
629 u8 mask = (index < 4) ? 0x03 : 0x01;
630 u8 shift = (index < 4) ? (2 * index) : (index - 4);
631 u8 tmp;
632 index = (index < 4) ? 0 : 1;
633
634 tmp = (data->temp_mode[index] >> shift) & mask;
635
636 /* for the internal sensor, found out if diode or thermistor */
47efe877 637 if (tmp == 1)
6800c3d0 638 tmp = index == 0 ? 3 : 4;
47efe877 639 else
6800c3d0 640 tmp = TO_TEMP_MODE[tmp];
6800c3d0
RM		 641
642 return sprintf(buf, "%d\n", tmp);
643}
644
645static ssize_t
646store_temp_mode(struct device *dev, struct device_attribute *attr,
647 const char *buf, size_t count)
648{
649 struct i2c_client *client = to_i2c_client(dev);
650 struct w83793_data *data = i2c_get_clientdata(client);
651 struct sensor_device_attribute_2 *sensor_attr =
652 to_sensor_dev_attr_2(attr);
653 int index = sensor_attr->index;
654 u8 mask = (index < 4) ? 0x03 : 0x01;
655 u8 shift = (index < 4) ? (2 * index) : (index - 4);
47efe877
GR		 656 unsigned long val;
657 int err;
658
659 err = kstrtoul(buf, 10, &val);
660 if (err)
661 return err;
6800c3d0
RM		 662
663 /* transform the sysfs interface values into table above */
ddca933b 664 if ((val == 6) && (index < 4)) {
6800c3d0
RM		 665 val -= 3;
666 } else if ((val == 3 && index < 4)
46bed4df 667 || (val == 4 && index >= 4)) {
6800c3d0
RM		 668 /* transform diode or thermistor into internal enable */
669 val = !!val;
670 } else {
671 return -EINVAL;
672 }
673
674 index = (index < 4) ? 0 : 1;
675 mutex_lock(&data->update_lock);
676 data->temp_mode[index] =
677 w83793_read_value(client, W83793_REG_TEMP_MODE[index]);
678 data->temp_mode[index] &= ~(mask << shift);
679 data->temp_mode[index] |= val << shift;
680 w83793_write_value(client, W83793_REG_TEMP_MODE[index],
681 data->temp_mode[index]);
682 mutex_unlock(&data->update_lock);
683
684 return count;
685}
686
687#define SETUP_PWM_DEFAULT 0
688#define SETUP_PWM_UPTIME 1 /* Unit in 0.1s */
689#define SETUP_PWM_DOWNTIME 2 /* Unit in 0.1s */
690#define SETUP_TEMP_CRITICAL 3
691static ssize_t
692show_sf_setup(struct device *dev, struct device_attribute *attr, char *buf)
693{
694 struct sensor_device_attribute_2 *sensor_attr =
695 to_sensor_dev_attr_2(attr);
696 int nr = sensor_attr->nr;
697 struct w83793_data *data = w83793_update_device(dev);
698 u32 val = 0;
699
47efe877 700 if (nr == SETUP_PWM_DEFAULT)
6800c3d0 701 val = (data->pwm_default & 0x3f) << 2;
47efe877 702 else if (nr == SETUP_PWM_UPTIME)
6800c3d0 703 val = TIME_FROM_REG(data->pwm_uptime);
47efe877 704 else if (nr == SETUP_PWM_DOWNTIME)
6800c3d0 705 val = TIME_FROM_REG(data->pwm_downtime);
47efe877 706 else if (nr == SETUP_TEMP_CRITICAL)
6800c3d0 707 val = TEMP_FROM_REG(data->temp_critical & 0x7f);
6800c3d0
RM		 708
709 return sprintf(buf, "%d\n", val);
710}
711
712static ssize_t
713store_sf_setup(struct device *dev, struct device_attribute *attr,
714 const char *buf, size_t count)
715{
716 struct sensor_device_attribute_2 *sensor_attr =
717 to_sensor_dev_attr_2(attr);
718 int nr = sensor_attr->nr;
719 struct i2c_client *client = to_i2c_client(dev);
720 struct w83793_data *data = i2c_get_clientdata(client);
47efe877
GR		 721 long val;
722 int err;
723
724 err = kstrtol(buf, 10, &val);
725 if (err)
726 return err;
6800c3d0
RM		 727
728 mutex_lock(&data->update_lock);
47efe877 729 if (nr == SETUP_PWM_DEFAULT) {
6800c3d0
RM		 730 data->pwm_default =
731 w83793_read_value(client, W83793_REG_PWM_DEFAULT) & 0xc0;
2a844c14 732 data->pwm_default |= clamp_val(val, 0, 0xff) >> 2;
6800c3d0
RM		 733 w83793_write_value(client, W83793_REG_PWM_DEFAULT,
734 data->pwm_default);
47efe877
GR		 735 } else if (nr == SETUP_PWM_UPTIME) {
736 data->pwm_uptime = TIME_TO_REG(val);
6800c3d0
RM		 737 data->pwm_uptime += data->pwm_uptime == 0 ? 1 : 0;
738 w83793_write_value(client, W83793_REG_PWM_UPTIME,
739 data->pwm_uptime);
47efe877
GR		 740 } else if (nr == SETUP_PWM_DOWNTIME) {
741 data->pwm_downtime = TIME_TO_REG(val);
6800c3d0
RM		 742 data->pwm_downtime += data->pwm_downtime == 0 ? 1 : 0;
743 w83793_write_value(client, W83793_REG_PWM_DOWNTIME,
744 data->pwm_downtime);
745 } else { /* SETUP_TEMP_CRITICAL */
746 data->temp_critical =
747 w83793_read_value(client, W83793_REG_TEMP_CRITICAL) & 0x80;
47efe877 748 data->temp_critical |= TEMP_TO_REG(val, 0, 0x7f);
6800c3d0
RM		 749 w83793_write_value(client, W83793_REG_TEMP_CRITICAL,
750 data->temp_critical);
751 }
752
753 mutex_unlock(&data->update_lock);
754 return count;
755}
756
757/*
47efe877
GR		 758 * Temp SmartFan control
759 * TEMP_FAN_MAP
760 * Temp channel control which pwm fan, bitfield, bit 0 indicate pwm1...
761 * It's possible two or more temp channels control the same fan, w83793
762 * always prefers to pick the most critical request and applies it to
763 * the related Fan.
764 * It's possible one fan is not in any mapping of 6 temp channels, this
765 * means the fan is manual mode
766 *
767 * TEMP_PWM_ENABLE
768 * Each temp channel has its own SmartFan mode, and temp channel
769 * control fans that are set by TEMP_FAN_MAP
770 * 0: SmartFanII mode
771 * 1: Thermal Cruise Mode
772 *
773 * TEMP_CRUISE
774 * Target temperature in thermal cruise mode, w83793 will try to turn
775 * fan speed to keep the temperature of target device around this
776 * temperature.
777 *
778 * TEMP_TOLERANCE
779 * If Temp higher or lower than target with this tolerance, w83793
780 * will take actions to speed up or slow down the fan to keep the
781 * temperature within the tolerance range.
782 */
6800c3d0
RM		 783
784#define TEMP_FAN_MAP 0
785#define TEMP_PWM_ENABLE 1
786#define TEMP_CRUISE 2
787#define TEMP_TOLERANCE 3
788static ssize_t
789show_sf_ctrl(struct device *dev, struct device_attribute *attr, char *buf)
790{
791 struct sensor_device_attribute_2 *sensor_attr =
792 to_sensor_dev_attr_2(attr);
793 int nr = sensor_attr->nr;
794 int index = sensor_attr->index;
795 struct w83793_data *data = w83793_update_device(dev);
796 u32 val;
797
47efe877 798 if (nr == TEMP_FAN_MAP) {
6800c3d0 799 val = data->temp_fan_map[index];
47efe877 800 } else if (nr == TEMP_PWM_ENABLE) {
84fb029f 801 /* +2 to transform into 2 and 3 to conform with sysfs intf */
6800c3d0 802 val = ((data->pwm_enable >> index) & 0x01) + 2;
47efe877 803 } else if (nr == TEMP_CRUISE) {
6800c3d0
RM		 804 val = TEMP_FROM_REG(data->temp_cruise[index] & 0x7f);
805 } else { /* TEMP_TOLERANCE */
806 val = data->tolerance[index >> 1] >> ((index & 0x01) ? 4 : 0);
807 val = TEMP_FROM_REG(val & 0x0f);
808 }
809 return sprintf(buf, "%d\n", val);
810}
811
812static ssize_t
813store_sf_ctrl(struct device *dev, struct device_attribute *attr,
814 const char *buf, size_t count)
815{
816 struct sensor_device_attribute_2 *sensor_attr =
817 to_sensor_dev_attr_2(attr);
818 int nr = sensor_attr->nr;
819 int index = sensor_attr->index;
820 struct i2c_client *client = to_i2c_client(dev);
821 struct w83793_data *data = i2c_get_clientdata(client);
47efe877
GR		 822 long val;
823 int err;
824
825 err = kstrtol(buf, 10, &val);
826 if (err)
827 return err;
6800c3d0
RM		 828
829 mutex_lock(&data->update_lock);
47efe877 830 if (nr == TEMP_FAN_MAP) {
2a844c14 831 val = clamp_val(val, 0, 255);
6800c3d0
RM		 832 w83793_write_value(client, W83793_REG_TEMP_FAN_MAP(index), val);
833 data->temp_fan_map[index] = val;
47efe877
GR		 834 } else if (nr == TEMP_PWM_ENABLE) {
835 if (val == 2 || val == 3) {
6800c3d0
RM		 836 data->pwm_enable =
837 w83793_read_value(client, W83793_REG_PWM_ENABLE);
838 if (val - 2)
839 data->pwm_enable |= 1 << index;
840 else
841 data->pwm_enable &= ~(1 << index);
842 w83793_write_value(client, W83793_REG_PWM_ENABLE,
843 data->pwm_enable);
844 } else {
845 mutex_unlock(&data->update_lock);
846 return -EINVAL;
847 }
47efe877 848 } else if (nr == TEMP_CRUISE) {
6800c3d0
RM		 849 data->temp_cruise[index] =
850 w83793_read_value(client, W83793_REG_TEMP_CRUISE(index));
6800c3d0 851 data->temp_cruise[index] &= 0x80;
47efe877 852 data->temp_cruise[index] |= TEMP_TO_REG(val, 0, 0x7f);
6800c3d0
RM		 853
854 w83793_write_value(client, W83793_REG_TEMP_CRUISE(index),
855 data->temp_cruise[index]);
856 } else { /* TEMP_TOLERANCE */
857 int i = index >> 1;
858 u8 shift = (index & 0x01) ? 4 : 0;
859 data->tolerance[i] =
860 w83793_read_value(client, W83793_REG_TEMP_TOL(i));
861
6800c3d0 862 data->tolerance[i] &= ~(0x0f << shift);
47efe877 863 data->tolerance[i] |= TEMP_TO_REG(val, 0, 0x0f) << shift;
6800c3d0
RM		 864 w83793_write_value(client, W83793_REG_TEMP_TOL(i),
865 data->tolerance[i]);
866 }
867
868 mutex_unlock(&data->update_lock);
869 return count;
870}
871
872static ssize_t
873show_sf2_pwm(struct device *dev, struct device_attribute *attr, char *buf)
874{
875 struct sensor_device_attribute_2 *sensor_attr =
876 to_sensor_dev_attr_2(attr);
877 int nr = sensor_attr->nr;
878 int index = sensor_attr->index;
879 struct w83793_data *data = w83793_update_device(dev);
880
881 return sprintf(buf, "%d\n", (data->sf2_pwm[index][nr] & 0x3f) << 2);
882}
883
884static ssize_t
885store_sf2_pwm(struct device *dev, struct device_attribute *attr,
886 const char *buf, size_t count)
887{
888 struct i2c_client *client = to_i2c_client(dev);
889 struct w83793_data *data = i2c_get_clientdata(client);
890 struct sensor_device_attribute_2 *sensor_attr =
891 to_sensor_dev_attr_2(attr);
892 int nr = sensor_attr->nr;
893 int index = sensor_attr->index;
47efe877
GR		 894 unsigned long val;
895 int err;
896
897 err = kstrtoul(buf, 10, &val);
898 if (err)
899 return err;
2a844c14 900 val = clamp_val(val, 0, 0xff) >> 2;
6800c3d0
RM		 901
902 mutex_lock(&data->update_lock);
903 data->sf2_pwm[index][nr] =
904 w83793_read_value(client, W83793_REG_SF2_PWM(index, nr)) & 0xc0;
905 data->sf2_pwm[index][nr] |= val;
906 w83793_write_value(client, W83793_REG_SF2_PWM(index, nr),
907 data->sf2_pwm[index][nr]);
908 mutex_unlock(&data->update_lock);
909 return count;
910}
911
912static ssize_t
913show_sf2_temp(struct device *dev, struct device_attribute *attr, char *buf)
914{
915 struct sensor_device_attribute_2 *sensor_attr =
916 to_sensor_dev_attr_2(attr);
917 int nr = sensor_attr->nr;
918 int index = sensor_attr->index;
919 struct w83793_data *data = w83793_update_device(dev);
920
921 return sprintf(buf, "%ld\n",
922 TEMP_FROM_REG(data->sf2_temp[index][nr] & 0x7f));
923}
924
925static ssize_t
926store_sf2_temp(struct device *dev, struct device_attribute *attr,
927 const char *buf, size_t count)
928{
929 struct i2c_client *client = to_i2c_client(dev);
930 struct w83793_data *data = i2c_get_clientdata(client);
931 struct sensor_device_attribute_2 *sensor_attr =
932 to_sensor_dev_attr_2(attr);
933 int nr = sensor_attr->nr;
934 int index = sensor_attr->index;
47efe877
GR		 935 long val;
936 int err;
937
938 err = kstrtol(buf, 10, &val);
939 if (err)
940 return err;
941 val = TEMP_TO_REG(val, 0, 0x7f);
6800c3d0
RM		 942
943 mutex_lock(&data->update_lock);
944 data->sf2_temp[index][nr] =
945 w83793_read_value(client, W83793_REG_SF2_TEMP(index, nr)) & 0x80;
946 data->sf2_temp[index][nr] |= val;
947 w83793_write_value(client, W83793_REG_SF2_TEMP(index, nr),
948 data->sf2_temp[index][nr]);
949 mutex_unlock(&data->update_lock);
950 return count;
951}
952
953/* only Vcore A/B and Vtt have additional 2 bits precision */
954static ssize_t
955show_in(struct device *dev, struct device_attribute *attr, char *buf)
956{
957 struct sensor_device_attribute_2 *sensor_attr =
958 to_sensor_dev_attr_2(attr);
959 int nr = sensor_attr->nr;
960 int index = sensor_attr->index;
961 struct w83793_data *data = w83793_update_device(dev);
962 u16 val = data->in[index][nr];
963
964 if (index < 3) {
965 val <<= 2;
966 val += (data->in_low_bits[nr] >> (index * 2)) & 0x3;
967 }
ddca933b
GJ		 968 /* voltage inputs 5VDD and 5VSB needs 150mV offset */
969 val = val * scale_in[index] + scale_in_add[index];
970 return sprintf(buf, "%d\n", val);
6800c3d0
RM		 971}
972
973static ssize_t
974store_in(struct device *dev, struct device_attribute *attr,
975 const char *buf, size_t count)
976{
977 struct sensor_device_attribute_2 *sensor_attr =
978 to_sensor_dev_attr_2(attr);
979 int nr = sensor_attr->nr;
980 int index = sensor_attr->index;
981 struct i2c_client *client = to_i2c_client(dev);
982 struct w83793_data *data = i2c_get_clientdata(client);
47efe877
GR		 983 unsigned long val;
984 int err;
985
986 err = kstrtoul(buf, 10, &val);
987 if (err)
988 return err;
989 val = (val + scale_in[index] / 2) / scale_in[index];
6800c3d0 990
6800c3d0
RM		 991 mutex_lock(&data->update_lock);
992 if (index > 2) {
ddca933b 993 /* fix the limit values of 5VDD and 5VSB to ALARM mechanism */
47efe877 994 if (nr == 1 || nr == 2)
ddca933b 995 val -= scale_in_add[index] / scale_in[index];
2a844c14 996 val = clamp_val(val, 0, 255);
6800c3d0 997 } else {
2a844c14 998 val = clamp_val(val, 0, 0x3FF);
6800c3d0
RM		 999 data->in_low_bits[nr] =
1000 w83793_read_value(client, W83793_REG_IN_LOW_BITS[nr]);
1001 data->in_low_bits[nr] &= ~(0x03 << (2 * index));
1002 data->in_low_bits[nr] |= (val & 0x03) << (2 * index);
1003 w83793_write_value(client, W83793_REG_IN_LOW_BITS[nr],
1004 data->in_low_bits[nr]);
1005 val >>= 2;
1006 }
1007 data->in[index][nr] = val;
1008 w83793_write_value(client, W83793_REG_IN[index][nr],
1009 data->in[index][nr]);
1010 mutex_unlock(&data->update_lock);
1011 return count;
1012}
1013
1014#define NOT_USED -1
1015
1016#define SENSOR_ATTR_IN(index) \
1017 SENSOR_ATTR_2(in##index##_input, S_IRUGO, show_in, NULL, \
1018 IN_READ, index), \
1019 SENSOR_ATTR_2(in##index##_max, S_IRUGO | S_IWUSR, show_in, \
1020 store_in, IN_MAX, index), \
1021 SENSOR_ATTR_2(in##index##_min, S_IRUGO | S_IWUSR, show_in, \
1022 store_in, IN_LOW, index), \
1023 SENSOR_ATTR_2(in##index##_alarm, S_IRUGO, show_alarm_beep, \
1024 NULL, ALARM_STATUS, index + ((index > 2) ? 1 : 0)), \
1025 SENSOR_ATTR_2(in##index##_beep, S_IWUSR | S_IRUGO, \
1026 show_alarm_beep, store_beep, BEEP_ENABLE, \
1027 index + ((index > 2) ? 1 : 0))
1028
1029#define SENSOR_ATTR_FAN(index) \
1030 SENSOR_ATTR_2(fan##index##_alarm, S_IRUGO, show_alarm_beep, \
1031 NULL, ALARM_STATUS, index + 17), \
1032 SENSOR_ATTR_2(fan##index##_beep, S_IWUSR | S_IRUGO, \
1033 show_alarm_beep, store_beep, BEEP_ENABLE, index + 17), \
1034 SENSOR_ATTR_2(fan##index##_input, S_IRUGO, show_fan, \
1035 NULL, FAN_INPUT, index - 1), \
1036 SENSOR_ATTR_2(fan##index##_min, S_IWUSR | S_IRUGO, \
1037 show_fan, store_fan_min, FAN_MIN, index - 1)
1038
1039#define SENSOR_ATTR_PWM(index) \
1040 SENSOR_ATTR_2(pwm##index, S_IWUSR | S_IRUGO, show_pwm, \
1041 store_pwm, PWM_DUTY, index - 1), \
1042 SENSOR_ATTR_2(pwm##index##_nonstop, S_IWUSR | S_IRUGO, \
1043 show_pwm, store_pwm, PWM_NONSTOP, index - 1), \
1044 SENSOR_ATTR_2(pwm##index##_start, S_IWUSR | S_IRUGO, \
1045 show_pwm, store_pwm, PWM_START, index - 1), \
1046 SENSOR_ATTR_2(pwm##index##_stop_time, S_IWUSR | S_IRUGO, \
1047 show_pwm, store_pwm, PWM_STOP_TIME, index - 1)
1048
1049#define SENSOR_ATTR_TEMP(index) \
1050 SENSOR_ATTR_2(temp##index##_type, S_IRUGO | S_IWUSR, \
1051 show_temp_mode, store_temp_mode, NOT_USED, index - 1), \
1052 SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_temp, \
1053 NULL, TEMP_READ, index - 1), \
1054 SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_temp, \
1055 store_temp, TEMP_CRIT, index - 1), \
1056 SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \
1057 show_temp, store_temp, TEMP_CRIT_HYST, index - 1), \
1058 SENSOR_ATTR_2(temp##index##_warn, S_IRUGO | S_IWUSR, show_temp, \
1059 store_temp, TEMP_WARN, index - 1), \
1060 SENSOR_ATTR_2(temp##index##_warn_hyst, S_IRUGO | S_IWUSR, \
1061 show_temp, store_temp, TEMP_WARN_HYST, index - 1), \
1062 SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \
1063 show_alarm_beep, NULL, ALARM_STATUS, index + 11), \
1064 SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \
1065 show_alarm_beep, store_beep, BEEP_ENABLE, index + 11), \
1066 SENSOR_ATTR_2(temp##index##_auto_channels_pwm, \
1067 S_IRUGO | S_IWUSR, show_sf_ctrl, store_sf_ctrl, \
1068 TEMP_FAN_MAP, index - 1), \
1069 SENSOR_ATTR_2(temp##index##_pwm_enable, S_IWUSR | S_IRUGO, \
1070 show_sf_ctrl, store_sf_ctrl, TEMP_PWM_ENABLE, \
1071 index - 1), \
1072 SENSOR_ATTR_2(thermal_cruise##index, S_IRUGO | S_IWUSR, \
1073 show_sf_ctrl, store_sf_ctrl, TEMP_CRUISE, index - 1), \
1074 SENSOR_ATTR_2(tolerance##index, S_IRUGO | S_IWUSR, show_sf_ctrl,\
1075 store_sf_ctrl, TEMP_TOLERANCE, index - 1), \
1076 SENSOR_ATTR_2(temp##index##_auto_point1_pwm, S_IRUGO | S_IWUSR, \
1077 show_sf2_pwm, store_sf2_pwm, 0, index - 1), \
1078 SENSOR_ATTR_2(temp##index##_auto_point2_pwm, S_IRUGO | S_IWUSR, \
1079 show_sf2_pwm, store_sf2_pwm, 1, index - 1), \
1080 SENSOR_ATTR_2(temp##index##_auto_point3_pwm, S_IRUGO | S_IWUSR, \
1081 show_sf2_pwm, store_sf2_pwm, 2, index - 1), \
1082 SENSOR_ATTR_2(temp##index##_auto_point4_pwm, S_IRUGO | S_IWUSR, \
1083 show_sf2_pwm, store_sf2_pwm, 3, index - 1), \
1084 SENSOR_ATTR_2(temp##index##_auto_point5_pwm, S_IRUGO | S_IWUSR, \
1085 show_sf2_pwm, store_sf2_pwm, 4, index - 1), \
1086 SENSOR_ATTR_2(temp##index##_auto_point6_pwm, S_IRUGO | S_IWUSR, \
1087 show_sf2_pwm, store_sf2_pwm, 5, index - 1), \
1088 SENSOR_ATTR_2(temp##index##_auto_point7_pwm, S_IRUGO | S_IWUSR, \
1089 show_sf2_pwm, store_sf2_pwm, 6, index - 1), \
1090 SENSOR_ATTR_2(temp##index##_auto_point1_temp, S_IRUGO | S_IWUSR,\
1091 show_sf2_temp, store_sf2_temp, 0, index - 1), \
1092 SENSOR_ATTR_2(temp##index##_auto_point2_temp, S_IRUGO | S_IWUSR,\
1093 show_sf2_temp, store_sf2_temp, 1, index - 1), \
1094 SENSOR_ATTR_2(temp##index##_auto_point3_temp, S_IRUGO | S_IWUSR,\
1095 show_sf2_temp, store_sf2_temp, 2, index - 1), \
1096 SENSOR_ATTR_2(temp##index##_auto_point4_temp, S_IRUGO | S_IWUSR,\
1097 show_sf2_temp, store_sf2_temp, 3, index - 1), \
1098 SENSOR_ATTR_2(temp##index##_auto_point5_temp, S_IRUGO | S_IWUSR,\
1099 show_sf2_temp, store_sf2_temp, 4, index - 1), \
1100 SENSOR_ATTR_2(temp##index##_auto_point6_temp, S_IRUGO | S_IWUSR,\
1101 show_sf2_temp, store_sf2_temp, 5, index - 1), \
1102 SENSOR_ATTR_2(temp##index##_auto_point7_temp, S_IRUGO | S_IWUSR,\
1103 show_sf2_temp, store_sf2_temp, 6, index - 1)
1104
1105static struct sensor_device_attribute_2 w83793_sensor_attr_2[] = {
1106 SENSOR_ATTR_IN(0),
1107 SENSOR_ATTR_IN(1),
1108 SENSOR_ATTR_IN(2),
1109 SENSOR_ATTR_IN(3),
1110 SENSOR_ATTR_IN(4),
1111 SENSOR_ATTR_IN(5),
1112 SENSOR_ATTR_IN(6),
1113 SENSOR_ATTR_IN(7),
1114 SENSOR_ATTR_IN(8),
1115 SENSOR_ATTR_IN(9),
6800c3d0
RM		 1116 SENSOR_ATTR_FAN(1),
1117 SENSOR_ATTR_FAN(2),
1118 SENSOR_ATTR_FAN(3),
1119 SENSOR_ATTR_FAN(4),
1120 SENSOR_ATTR_FAN(5),
1121 SENSOR_ATTR_PWM(1),
1122 SENSOR_ATTR_PWM(2),
1123 SENSOR_ATTR_PWM(3),
1124};
1125
46bed4df
GJ		 1126static struct sensor_device_attribute_2 w83793_temp[] = {
1127 SENSOR_ATTR_TEMP(1),
1128 SENSOR_ATTR_TEMP(2),
1129 SENSOR_ATTR_TEMP(3),
1130 SENSOR_ATTR_TEMP(4),
1131 SENSOR_ATTR_TEMP(5),
1132 SENSOR_ATTR_TEMP(6),
1133};
1134
6800c3d0
RM		 1135/* Fan6-Fan12 */
1136static struct sensor_device_attribute_2 w83793_left_fan[] = {
1137 SENSOR_ATTR_FAN(6),
1138 SENSOR_ATTR_FAN(7),
1139 SENSOR_ATTR_FAN(8),
1140 SENSOR_ATTR_FAN(9),
1141 SENSOR_ATTR_FAN(10),
1142 SENSOR_ATTR_FAN(11),
1143 SENSOR_ATTR_FAN(12),
1144};
1145
1146/* Pwm4-Pwm8 */
1147static struct sensor_device_attribute_2 w83793_left_pwm[] = {
1148 SENSOR_ATTR_PWM(4),
1149 SENSOR_ATTR_PWM(5),
1150 SENSOR_ATTR_PWM(6),
1151 SENSOR_ATTR_PWM(7),
1152 SENSOR_ATTR_PWM(8),
1153};
1154
c70a8c34 1155static struct sensor_device_attribute_2 w83793_vid[] = {
6800c3d0
RM		 1156 SENSOR_ATTR_2(cpu0_vid, S_IRUGO, show_vid, NULL, NOT_USED, 0),
1157 SENSOR_ATTR_2(cpu1_vid, S_IRUGO, show_vid, NULL, NOT_USED, 1),
c70a8c34 1158};
329beb71 1159static DEVICE_ATTR_RW(vrm);
c70a8c34
GJ		 1160
1161static struct sensor_device_attribute_2 sda_single_files[] = {
a516dc3e 1162 SENSOR_ATTR_2(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm_beep,
6800c3d0
RM		 1163 store_chassis_clear, ALARM_STATUS, 30),
1164 SENSOR_ATTR_2(beep_enable, S_IWUSR | S_IRUGO, show_beep_enable,
1165 store_beep_enable, NOT_USED, NOT_USED),
1166 SENSOR_ATTR_2(pwm_default, S_IWUSR | S_IRUGO, show_sf_setup,
1167 store_sf_setup, SETUP_PWM_DEFAULT, NOT_USED),
1168 SENSOR_ATTR_2(pwm_uptime, S_IWUSR | S_IRUGO, show_sf_setup,
1169 store_sf_setup, SETUP_PWM_UPTIME, NOT_USED),
1170 SENSOR_ATTR_2(pwm_downtime, S_IWUSR | S_IRUGO, show_sf_setup,
1171 store_sf_setup, SETUP_PWM_DOWNTIME, NOT_USED),
1172 SENSOR_ATTR_2(temp_critical, S_IWUSR | S_IRUGO, show_sf_setup,
1173 store_sf_setup, SETUP_TEMP_CRITICAL, NOT_USED),
1174};
1175
1176static void w83793_init_client(struct i2c_client *client)
1177{
47efe877 1178 if (reset)
6800c3d0 1179 w83793_write_value(client, W83793_REG_CONFIG, 0x80);
6800c3d0
RM		 1180
1181 /* Start monitoring */
1182 w83793_write_value(client, W83793_REG_CONFIG,
1183 w83793_read_value(client, W83793_REG_CONFIG) | 0x01);
5852f960
SA		 1184}
1185
1186/*
1187 * Watchdog routines
1188 */
1189
1190static int watchdog_set_timeout(struct w83793_data *data, int timeout)
1191{
26336c8a
DC		 1192 unsigned int mtimeout;
1193 int ret;
5852f960
SA		 1194
1195 mtimeout = DIV_ROUND_UP(timeout, 60);
1196
1197 if (mtimeout > 255)
1198 return -EINVAL;
1199
1200 mutex_lock(&data->watchdog_lock);
1201 if (!data->client) {
1202 ret = -ENODEV;
1203 goto leave;
1204 }
1205
1206 data->watchdog_timeout = mtimeout;
1207
1208 /* Set Timeout value (in Minutes) */
1209 w83793_write_value(data->client, W83793_REG_WDT_TIMEOUT,
1210 data->watchdog_timeout);
1211
1212 ret = mtimeout * 60;
1213
1214leave:
1215 mutex_unlock(&data->watchdog_lock);
1216 return ret;
1217}
1218
1219static int watchdog_get_timeout(struct w83793_data *data)
1220{
1221 int timeout;
1222
1223 mutex_lock(&data->watchdog_lock);
1224 timeout = data->watchdog_timeout * 60;
1225 mutex_unlock(&data->watchdog_lock);
1226
1227 return timeout;
1228}
1229
1230static int watchdog_trigger(struct w83793_data *data)
1231{
1232 int ret = 0;
1233
1234 mutex_lock(&data->watchdog_lock);
1235 if (!data->client) {
1236 ret = -ENODEV;
1237 goto leave;
1238 }
1239
1240 /* Set Timeout value (in Minutes) */
1241 w83793_write_value(data->client, W83793_REG_WDT_TIMEOUT,
1242 data->watchdog_timeout);
1243
1244leave:
1245 mutex_unlock(&data->watchdog_lock);
1246 return ret;
1247}
1248
1249static int watchdog_enable(struct w83793_data *data)
1250{
1251 int ret = 0;
1252
1253 mutex_lock(&data->watchdog_lock);
1254 if (!data->client) {
1255 ret = -ENODEV;
1256 goto leave;
1257 }
1258
1259 /* Set initial timeout */
1260 w83793_write_value(data->client, W83793_REG_WDT_TIMEOUT,
1261 data->watchdog_timeout);
1262
1263 /* Enable Soft Watchdog */
1264 w83793_write_value(data->client, W83793_REG_WDT_LOCK, 0x55);
1265
1266leave:
1267 mutex_unlock(&data->watchdog_lock);
1268 return ret;
1269}
1270
1271static int watchdog_disable(struct w83793_data *data)
1272{
1273 int ret = 0;
1274
1275 mutex_lock(&data->watchdog_lock);
1276 if (!data->client) {
1277 ret = -ENODEV;
1278 goto leave;
1279 }
1280
1281 /* Disable Soft Watchdog */
1282 w83793_write_value(data->client, W83793_REG_WDT_LOCK, 0xAA);
1283
1284leave:
1285 mutex_unlock(&data->watchdog_lock);
1286 return ret;
1287}
1288
1289static int watchdog_open(struct inode *inode, struct file *filp)
1290{
1291 struct w83793_data *pos, *data = NULL;
1292 int watchdog_is_open;
1293
47efe877
GR		 1294 /*
1295 * We get called from drivers/char/misc.c with misc_mtx hold, and we
1296 * call misc_register() from w83793_probe() with watchdog_data_mutex
1297 * hold, as misc_register() takes the misc_mtx lock, this is a possible
1298 * deadlock, so we use mutex_trylock here.
1299 */
5852f960
SA		 1300 if (!mutex_trylock(&watchdog_data_mutex))
1301 return -ERESTARTSYS;
1302 list_for_each_entry(pos, &watchdog_data_list, list) {
1303 if (pos->watchdog_miscdev.minor == iminor(inode)) {
1304 data = pos;
1305 break;
1306 }
1307 }
1308
1309 /* Check, if device is already open */
1310 watchdog_is_open = test_and_set_bit(0, &data->watchdog_is_open);
1311
47efe877
GR		 1312 /*
1313 * Increase data reference counter (if not already done).
1314 * Note we can never not have found data, so we don't check for this
1315 */
5852f960
SA		 1316 if (!watchdog_is_open)
1317 kref_get(&data->kref);
1318
1319 mutex_unlock(&watchdog_data_mutex);
1320
1321 /* Check, if device is already open and possibly issue error */
1322 if (watchdog_is_open)
1323 return -EBUSY;
1324
1325 /* Enable Soft Watchdog */
1326 watchdog_enable(data);
1327
1328 /* Store pointer to data into filp's private data */
1329 filp->private_data = data;
1330
c5bf68fe 1331 return stream_open(inode, filp);
5852f960
SA		 1332}
1333
1334static int watchdog_close(struct inode *inode, struct file *filp)
1335{
1336 struct w83793_data *data = filp->private_data;
6800c3d0 1337
5852f960
SA		 1338 if (data->watchdog_expect_close) {
1339 watchdog_disable(data);
1340 data->watchdog_expect_close = 0;
1341 } else {
1342 watchdog_trigger(data);
1343 dev_crit(&data->client->dev,
1344 "unexpected close, not stopping watchdog!\n");
1345 }
1346
1347 clear_bit(0, &data->watchdog_is_open);
1348
1349 /* Decrease data reference counter */
1350 mutex_lock(&watchdog_data_mutex);
1351 kref_put(&data->kref, w83793_release_resources);
1352 mutex_unlock(&watchdog_data_mutex);
1353
1354 return 0;
1355}
1356
1357static ssize_t watchdog_write(struct file *filp, const char __user *buf,
1358 size_t count, loff_t *offset)
1359{
3f7cd7ea 1360 ssize_t ret;
5852f960
SA		 1361 struct w83793_data *data = filp->private_data;
1362
1363 if (count) {
1364 if (!nowayout) {
1365 size_t i;
1366
1367 /* Clear it in case it was set with a previous write */
1368 data->watchdog_expect_close = 0;
1369
1370 for (i = 0; i != count; i++) {
1371 char c;
1372 if (get_user(c, buf + i))
1373 return -EFAULT;
1374 if (c == 'V')
1375 data->watchdog_expect_close = 1;
1376 }
1377 }
1378 ret = watchdog_trigger(data);
1379 if (ret < 0)
1380 return ret;
1381 }
1382 return count;
1383}
1384
55929332
AB		 1385static long watchdog_ioctl(struct file *filp, unsigned int cmd,
1386 unsigned long arg)
5852f960 1387{
36c7fe13 1388 struct watchdog_info ident = {
5852f960
SA		 1389 .options = WDIOF_KEEPALIVEPING |
1390 WDIOF_SETTIMEOUT |
1391 WDIOF_CARDRESET,
1392 .identity = "w83793 watchdog"
1393 };
1394
1395 int val, ret = 0;
1396 struct w83793_data *data = filp->private_data;
1397
1398 switch (cmd) {
1399 case WDIOC_GETSUPPORT:
1400 if (!nowayout)
1401 ident.options |= WDIOF_MAGICCLOSE;
1402 if (copy_to_user((void __user *)arg, &ident, sizeof(ident)))
1403 ret = -EFAULT;
1404 break;
1405
1406 case WDIOC_GETSTATUS:
1407 val = data->watchdog_caused_reboot ? WDIOF_CARDRESET : 0;
1408 ret = put_user(val, (int __user *)arg);
1409 break;
1410
1411 case WDIOC_GETBOOTSTATUS:
1412 ret = put_user(0, (int __user *)arg);
1413 break;
1414
1415 case WDIOC_KEEPALIVE:
1416 ret = watchdog_trigger(data);
1417 break;
1418
1419 case WDIOC_GETTIMEOUT:
1420 val = watchdog_get_timeout(data);
1421 ret = put_user(val, (int __user *)arg);
1422 break;
1423
1424 case WDIOC_SETTIMEOUT:
1425 if (get_user(val, (int __user *)arg)) {
1426 ret = -EFAULT;
1427 break;
1428 }
1429 ret = watchdog_set_timeout(data, val);
1430 if (ret > 0)
1431 ret = put_user(ret, (int __user *)arg);
1432 break;
1433
1434 case WDIOC_SETOPTIONS:
1435 if (get_user(val, (int __user *)arg)) {
1436 ret = -EFAULT;
1437 break;
1438 }
1439
1440 if (val & WDIOS_DISABLECARD)
1441 ret = watchdog_disable(data);
1442 else if (val & WDIOS_ENABLECARD)
1443 ret = watchdog_enable(data);
1444 else
1445 ret = -EINVAL;
1446
1447 break;
1448 default:
1449 ret = -ENOTTY;
1450 }
5852f960
SA		 1451 return ret;
1452}
1453
1454static const struct file_operations watchdog_fops = {
1455 .owner = THIS_MODULE,
1456 .llseek = no_llseek,
1457 .open = watchdog_open,
1458 .release = watchdog_close,
1459 .write = watchdog_write,
55929332 1460 .unlocked_ioctl = watchdog_ioctl,
b6dfb247 1461 .compat_ioctl = compat_ptr_ioctl,
5852f960
SA		 1462};
1463
1464/*
1465 * Notifier for system down
1466 */
1467
1468static int watchdog_notify_sys(struct notifier_block *this, unsigned long code,
1469 void *unused)
1470{
1471 struct w83793_data *data = NULL;
1472
1473 if (code == SYS_DOWN || code == SYS_HALT) {
1474
1475 /* Disable each registered watchdog */
1476 mutex_lock(&watchdog_data_mutex);
1477 list_for_each_entry(data, &watchdog_data_list, list) {
1478 if (data->watchdog_miscdev.minor)
1479 watchdog_disable(data);
1480 }
1481 mutex_unlock(&watchdog_data_mutex);
1482 }
1483
1484 return NOTIFY_DONE;
6800c3d0
RM		 1485}
1486
5852f960
SA		 1487/*
1488 * The WDT needs to learn about soft shutdowns in order to
1489 * turn the timebomb registers off.
1490 */
1491
1492static struct notifier_block watchdog_notifier = {
1493 .notifier_call = watchdog_notify_sys,
1494};
1495
1496/*
1497 * Init / remove routines
1498 */
1499
a7f13a6e 1500static int w83793_remove(struct i2c_client *client)
6800c3d0
RM		 1501{
1502 struct w83793_data *data = i2c_get_clientdata(client);
1503 struct device *dev = &client->dev;
5852f960
SA		 1504 int i, tmp;
1505
1506 /* Unregister the watchdog (if registered) */
1507 if (data->watchdog_miscdev.minor) {
1508 misc_deregister(&data->watchdog_miscdev);
1509
1510 if (data->watchdog_is_open) {
1511 dev_warn(&client->dev,
1512 "i2c client detached with watchdog open! "
1513 "Stopping watchdog.\n");
1514 watchdog_disable(data);
1515 }
1516
1517 mutex_lock(&watchdog_data_mutex);
1518 list_del(&data->list);
1519 mutex_unlock(&watchdog_data_mutex);
1520
1521 /* Tell the watchdog code the client is gone */
1522 mutex_lock(&data->watchdog_lock);
1523 data->client = NULL;
1524 mutex_unlock(&data->watchdog_lock);
1525 }
1526
1527 /* Reset Configuration Register to Disable Watch Dog Registers */
1528 tmp = w83793_read_value(client, W83793_REG_CONFIG);
1529 w83793_write_value(client, W83793_REG_CONFIG, tmp & ~0x04);
1530
1531 unregister_reboot_notifier(&watchdog_notifier);
6800c3d0 1532
a7f13a6e 1533 hwmon_device_unregister(data->hwmon_dev);
6800c3d0 1534
a7f13a6e
JD		 1535 for (i = 0; i < ARRAY_SIZE(w83793_sensor_attr_2); i++)
1536 device_remove_file(dev,
1537 &w83793_sensor_attr_2[i].dev_attr);
6800c3d0 1538
a7f13a6e
JD		 1539 for (i = 0; i < ARRAY_SIZE(sda_single_files); i++)
1540 device_remove_file(dev, &sda_single_files[i].dev_attr);
6800c3d0 1541
a7f13a6e
JD		 1542 for (i = 0; i < ARRAY_SIZE(w83793_vid); i++)
1543 device_remove_file(dev, &w83793_vid[i].dev_attr);
1544 device_remove_file(dev, &dev_attr_vrm);
c70a8c34 1545
a7f13a6e
JD		 1546 for (i = 0; i < ARRAY_SIZE(w83793_left_fan); i++)
1547 device_remove_file(dev, &w83793_left_fan[i].dev_attr);
6800c3d0 1548
a7f13a6e
JD		 1549 for (i = 0; i < ARRAY_SIZE(w83793_left_pwm); i++)
1550 device_remove_file(dev, &w83793_left_pwm[i].dev_attr);
46bed4df 1551
a7f13a6e
JD		 1552 for (i = 0; i < ARRAY_SIZE(w83793_temp); i++)
1553 device_remove_file(dev, &w83793_temp[i].dev_attr);
6800c3d0 1554
5852f960
SA		 1555 /* Decrease data reference counter */
1556 mutex_lock(&watchdog_data_mutex);
1557 kref_put(&data->kref, w83793_release_resources);
1558 mutex_unlock(&watchdog_data_mutex);
6800c3d0
RM		 1559
1560 return 0;
1561}
1562
1563static int
a7f13a6e 1564w83793_detect_subclients(struct i2c_client *client)
6800c3d0 1565{
cf48d176 1566 int i, id;
a7f13a6e 1567 int address = client->addr;
6800c3d0 1568 u8 tmp;
a7f13a6e 1569 struct i2c_adapter *adapter = client->adapter;
6800c3d0
RM		 1570 struct w83793_data *data = i2c_get_clientdata(client);
1571
1572 id = i2c_adapter_id(adapter);
1573 if (force_subclients[0] == id && force_subclients[1] == address) {
1574 for (i = 2; i <= 3; i++) {
1575 if (force_subclients[i] < 0x48
1576 || force_subclients[i] > 0x4f) {
1577 dev_err(&client->dev,
1578 "invalid subclient "
1579 "address %d; must be 0x48-0x4f\n",
1580 force_subclients[i]);
cf48d176 1581 return -EINVAL;
6800c3d0
RM		 1582 }
1583 }
1584 w83793_write_value(client, W83793_REG_I2C_SUBADDR,
1585 (force_subclients[2] & 0x07) |
1586 ((force_subclients[3] & 0x07) << 4));
1587 }
1588
1589 tmp = w83793_read_value(client, W83793_REG_I2C_SUBADDR);
47efe877 1590 if (!(tmp & 0x08))
cf48d176
WS		 1591 data->lm75[0] = devm_i2c_new_dummy_device(&client->dev, adapter,
1592 0x48 + (tmp & 0x7));
6800c3d0 1593 if (!(tmp & 0x80)) {
cf48d176 1594 if (!IS_ERR(data->lm75[0])
6800c3d0
RM		 1595 && ((tmp & 0x7) == ((tmp >> 4) & 0x7))) {
1596 dev_err(&client->dev,
1597 "duplicate addresses 0x%x, "
1598 "use force_subclients\n", data->lm75[0]->addr);
cf48d176 1599 return -ENODEV;
6800c3d0 1600 }
cf48d176
WS		 1601 data->lm75[1] = devm_i2c_new_dummy_device(&client->dev, adapter,
1602 0x48 + ((tmp >> 4) & 0x7));
6800c3d0
RM		 1603 }
1604
1605 return 0;
6800c3d0
RM		 1606}
1607
a7f13a6e 1608/* Return 0 if detection is successful, -ENODEV otherwise */
310ec792 1609static int w83793_detect(struct i2c_client *client,
a7f13a6e 1610 struct i2c_board_info *info)
6800c3d0 1611{
52df6440 1612 u8 tmp, bank, chip_id;
a7f13a6e
JD		 1613 struct i2c_adapter *adapter = client->adapter;
1614 unsigned short address = client->addr;
6800c3d0 1615
47efe877 1616 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
a7f13a6e 1617 return -ENODEV;
6800c3d0 1618
a7f13a6e 1619 bank = i2c_smbus_read_byte_data(client, W83793_REG_BANKSEL);
6800c3d0 1620
52df6440
JD		 1621 tmp = bank & 0x80 ? 0x5c : 0xa3;
1622 /* Check Winbond vendor ID */
1623 if (tmp != i2c_smbus_read_byte_data(client, W83793_REG_VENDORID)) {
1624 pr_debug("w83793: Detection failed at check vendor id\n");
1625 return -ENODEV;
6800c3d0
RM		 1626 }
1627
47efe877
GR		 1628 /*
1629 * If Winbond chip, address of chip and W83793_REG_I2C_ADDR
1630 * should match
1631 */
52df6440
JD		 1632 if ((bank & 0x07) == 0
1633 && i2c_smbus_read_byte_data(client, W83793_REG_I2C_ADDR) !=
1634 (address << 1)) {
1635 pr_debug("w83793: Detection failed at check i2c addr\n");
1636 return -ENODEV;
6800c3d0
RM		 1637 }
1638
52df6440
JD		 1639 /* Determine the chip type now */
1640 chip_id = i2c_smbus_read_byte_data(client, W83793_REG_CHIPID);
1641 if (chip_id != 0x7b)
1642 return -ENODEV;
1643
a7f13a6e
JD		 1644 strlcpy(info->type, "w83793", I2C_NAME_SIZE);
1645
1646 return 0;
1647}
6800c3d0 1648
a7f13a6e
JD		 1649static int w83793_probe(struct i2c_client *client,
1650 const struct i2c_device_id *id)
1651{
1652 struct device *dev = &client->dev;
7a76a7f3
CIK		 1653 static const int watchdog_minors[] = {
1654 WATCHDOG_MINOR, 212, 213, 214, 215
1655 };
a7f13a6e
JD		 1656 struct w83793_data *data;
1657 int i, tmp, val, err;
1658 int files_fan = ARRAY_SIZE(w83793_left_fan) / 7;
1659 int files_pwm = ARRAY_SIZE(w83793_left_pwm) / 5;
1660 int files_temp = ARRAY_SIZE(w83793_temp) / 6;
1661
1662 data = kzalloc(sizeof(struct w83793_data), GFP_KERNEL);
1663 if (!data) {
1664 err = -ENOMEM;
1665 goto exit;
1666 }
1667
1668 i2c_set_clientdata(client, data);
1669 data->bank = i2c_smbus_read_byte_data(client, W83793_REG_BANKSEL);
6800c3d0 1670 mutex_init(&data->update_lock);
5852f960
SA		 1671 mutex_init(&data->watchdog_lock);
1672 INIT_LIST_HEAD(&data->list);
1673 kref_init(&data->kref);
1674
47efe877
GR		 1675 /*
1676 * Store client pointer in our data struct for watchdog usage
1677 * (where the client is found through a data ptr instead of the
1678 * otherway around)
1679 */
5852f960 1680 data->client = client;
6800c3d0 1681
a7f13a6e
JD		 1682 err = w83793_detect_subclients(client);
1683 if (err)
6800c3d0
RM		 1684 goto free_mem;
1685
6800c3d0
RM		 1686 /* Initialize the chip */
1687 w83793_init_client(client);
1688
6800c3d0 1689 /*
47efe877
GR		 1690 * Only fan 1-5 has their own input pins,
1691 * Pwm 1-3 has their own pins
6800c3d0
RM		 1692 */
1693 data->has_fan = 0x1f;
1694 data->has_pwm = 0x07;
1695 tmp = w83793_read_value(client, W83793_REG_MFC);
1696 val = w83793_read_value(client, W83793_REG_FANIN_CTRL);
1697
1698 /* check the function of pins 49-56 */
93c75a4a
JD		 1699 if (tmp & 0x80) {
1700 data->has_vid |= 0x2; /* has VIDB */
1701 } else {
6800c3d0
RM		 1702 data->has_pwm |= 0x18; /* pwm 4,5 */
1703 if (val & 0x01) { /* fan 6 */
1704 data->has_fan |= 0x20;
1705 data->has_pwm |= 0x20;
1706 }
1707 if (val & 0x02) { /* fan 7 */
1708 data->has_fan |= 0x40;
1709 data->has_pwm |= 0x40;
1710 }
1711 if (!(tmp & 0x40) && (val & 0x04)) { /* fan 8 */
1712 data->has_fan |= 0x80;
1713 data->has_pwm |= 0x80;
1714 }
1715 }
1716
93c75a4a
JD		 1717 /* check the function of pins 37-40 */
1718 if (!(tmp & 0x29))
1719 data->has_vid |= 0x1; /* has VIDA */
6800c3d0
RM		 1720 if (0x08 == (tmp & 0x0c)) {
1721 if (val & 0x08) /* fan 9 */
1722 data->has_fan |= 0x100;
1723 if (val & 0x10) /* fan 10 */
1724 data->has_fan |= 0x200;
1725 }
6800c3d0
RM		 1726 if (0x20 == (tmp & 0x30)) {
1727 if (val & 0x20) /* fan 11 */
1728 data->has_fan |= 0x400;
1729 if (val & 0x40) /* fan 12 */
1730 data->has_fan |= 0x800;
1731 }
1732
1733 if ((tmp & 0x01) && (val & 0x04)) { /* fan 8, second location */
1734 data->has_fan |= 0x80;
1735 data->has_pwm |= 0x80;
1736 }
1737
c9294315
RM		 1738 tmp = w83793_read_value(client, W83793_REG_FANIN_SEL);
1739 if ((tmp & 0x01) && (val & 0x08)) { /* fan 9, second location */
1740 data->has_fan |= 0x100;
1741 }
1742 if ((tmp & 0x02) && (val & 0x10)) { /* fan 10, second location */
1743 data->has_fan |= 0x200;
1744 }
1745 if ((tmp & 0x04) && (val & 0x20)) { /* fan 11, second location */
1746 data->has_fan |= 0x400;
1747 }
1748 if ((tmp & 0x08) && (val & 0x40)) { /* fan 12, second location */
1749 data->has_fan |= 0x800;
1750 }
1751
46bed4df 1752 /* check the temp1-6 mode, ignore former AMDSI selected inputs */
47efe877 1753 tmp = w83793_read_value(client, W83793_REG_TEMP_MODE[0]);
46bed4df
GJ		 1754 if (tmp & 0x01)
1755 data->has_temp |= 0x01;
1756 if (tmp & 0x04)
1757 data->has_temp |= 0x02;
1758 if (tmp & 0x10)
1759 data->has_temp |= 0x04;
1760 if (tmp & 0x40)
1761 data->has_temp |= 0x08;
1762
47efe877 1763 tmp = w83793_read_value(client, W83793_REG_TEMP_MODE[1]);
46bed4df
GJ		 1764 if (tmp & 0x01)
1765 data->has_temp |= 0x10;
1766 if (tmp & 0x02)
1767 data->has_temp |= 0x20;
1768
6800c3d0
RM		 1769 /* Register sysfs hooks */
1770 for (i = 0; i < ARRAY_SIZE(w83793_sensor_attr_2); i++) {
1771 err = device_create_file(dev,
1772 &w83793_sensor_attr_2[i].dev_attr);
1773 if (err)
1774 goto exit_remove;
1775 }
1776
c70a8c34
GJ		 1777 for (i = 0; i < ARRAY_SIZE(w83793_vid); i++) {
1778 if (!(data->has_vid & (1 << i)))
1779 continue;
1780 err = device_create_file(dev, &w83793_vid[i].dev_attr);
1781 if (err)
1782 goto exit_remove;
1783 }
93c75a4a
JD		 1784 if (data->has_vid) {
1785 data->vrm = vid_which_vrm();
1786 err = device_create_file(dev, &dev_attr_vrm);
1787 if (err)
1788 goto exit_remove;
1789 }
c70a8c34 1790
6800c3d0
RM		 1791 for (i = 0; i < ARRAY_SIZE(sda_single_files); i++) {
1792 err = device_create_file(dev, &sda_single_files[i].dev_attr);
1793 if (err)
1794 goto exit_remove;
1795
1796 }
1797
46bed4df
GJ		 1798 for (i = 0; i < 6; i++) {
1799 int j;
1800 if (!(data->has_temp & (1 << i)))
1801 continue;
1802 for (j = 0; j < files_temp; j++) {
1803 err = device_create_file(dev,
1804 &w83793_temp[(i) * files_temp
1805 + j].dev_attr);
1806 if (err)
1807 goto exit_remove;
1808 }
1809 }
1810
6800c3d0
RM		 1811 for (i = 5; i < 12; i++) {
1812 int j;
1813 if (!(data->has_fan & (1 << i)))
1814 continue;
1815 for (j = 0; j < files_fan; j++) {
1816 err = device_create_file(dev,
1817 &w83793_left_fan[(i - 5) * files_fan
1818 + j].dev_attr);
1819 if (err)
1820 goto exit_remove;
1821 }
1822 }
1823
1824 for (i = 3; i < 8; i++) {
1825 int j;
1826 if (!(data->has_pwm & (1 << i)))
1827 continue;
1828 for (j = 0; j < files_pwm; j++) {
1829 err = device_create_file(dev,
1830 &w83793_left_pwm[(i - 3) * files_pwm
1831 + j].dev_attr);
1832 if (err)
1833 goto exit_remove;
1834 }
1835 }
1836
1beeffe4
TJ		 1837 data->hwmon_dev = hwmon_device_register(dev);
1838 if (IS_ERR(data->hwmon_dev)) {
1839 err = PTR_ERR(data->hwmon_dev);
6800c3d0
RM		 1840 goto exit_remove;
1841 }
1842
5852f960
SA		 1843 /* Watchdog initialization */
1844
1845 /* Register boot notifier */
1846 err = register_reboot_notifier(&watchdog_notifier);
1847 if (err != 0) {
1848 dev_err(&client->dev,
1849 "cannot register reboot notifier (err=%d)\n", err);
1850 goto exit_devunreg;
1851 }
1852
47efe877
GR		 1853 /*
1854 * Enable Watchdog registers.
1855 * Set Configuration Register to Enable Watch Dog Registers
1856 * (Bit 2) = XXXX, X1XX.
1857 */
5852f960
SA		 1858 tmp = w83793_read_value(client, W83793_REG_CONFIG);
1859 w83793_write_value(client, W83793_REG_CONFIG, tmp | 0x04);
1860
1861 /* Set the default watchdog timeout */
1862 data->watchdog_timeout = timeout;
1863
1864 /* Check, if last reboot was caused by watchdog */
1865 data->watchdog_caused_reboot =
1866 w83793_read_value(data->client, W83793_REG_WDT_STATUS) & 0x01;
1867
1868 /* Disable Soft Watchdog during initialiation */
1869 watchdog_disable(data);
1870
47efe877
GR		 1871 /*
1872 * We take the data_mutex lock early so that watchdog_open() cannot
1873 * run when misc_register() has completed, but we've not yet added
1874 * our data to the watchdog_data_list (and set the default timeout)
1875 */
5852f960
SA		 1876 mutex_lock(&watchdog_data_mutex);
1877 for (i = 0; i < ARRAY_SIZE(watchdog_minors); i++) {
1878 /* Register our watchdog part */
1879 snprintf(data->watchdog_name, sizeof(data->watchdog_name),
1880 "watchdog%c", (i == 0) ? '\0' : ('0' + i));
1881 data->watchdog_miscdev.name = data->watchdog_name;
1882 data->watchdog_miscdev.fops = &watchdog_fops;
1883 data->watchdog_miscdev.minor = watchdog_minors[i];
1884
1885 err = misc_register(&data->watchdog_miscdev);
1886 if (err == -EBUSY)
1887 continue;
1888 if (err) {
1889 data->watchdog_miscdev.minor = 0;
1890 dev_err(&client->dev,
1891 "Registering watchdog chardev: %d\n", err);
1892 break;
1893 }
1894
1895 list_add(&data->list, &watchdog_data_list);
1896
1897 dev_info(&client->dev,
1898 "Registered watchdog chardev major 10, minor: %d\n",
1899 watchdog_minors[i]);
1900 break;
1901 }
1902 if (i == ARRAY_SIZE(watchdog_minors)) {
1903 data->watchdog_miscdev.minor = 0;
b55f3757
GR		 1904 dev_warn(&client->dev,
1905 "Couldn't register watchdog chardev (due to no free minor)\n");
5852f960
SA		 1906 }
1907
1908 mutex_unlock(&watchdog_data_mutex);
1909
6800c3d0
RM		 1910 return 0;
1911
5852f960
SA		 1912 /* Unregister hwmon device */
1913
1914exit_devunreg:
1915
1916 hwmon_device_unregister(data->hwmon_dev);
1917
6800c3d0
RM		 1918 /* Unregister sysfs hooks */
1919
1920exit_remove:
1921 for (i = 0; i < ARRAY_SIZE(w83793_sensor_attr_2); i++)
1922 device_remove_file(dev, &w83793_sensor_attr_2[i].dev_attr);
1923
1924 for (i = 0; i < ARRAY_SIZE(sda_single_files); i++)
1925 device_remove_file(dev, &sda_single_files[i].dev_attr);
1926
c70a8c34
GJ		 1927 for (i = 0; i < ARRAY_SIZE(w83793_vid); i++)
1928 device_remove_file(dev, &w83793_vid[i].dev_attr);
1929
6800c3d0
RM		 1930 for (i = 0; i < ARRAY_SIZE(w83793_left_fan); i++)
1931 device_remove_file(dev, &w83793_left_fan[i].dev_attr);
1932
1933 for (i = 0; i < ARRAY_SIZE(w83793_left_pwm); i++)
1934 device_remove_file(dev, &w83793_left_pwm[i].dev_attr);
1935
46bed4df
GJ		 1936 for (i = 0; i < ARRAY_SIZE(w83793_temp); i++)
1937 device_remove_file(dev, &w83793_temp[i].dev_attr);
6800c3d0
RM		 1938free_mem:
1939 kfree(data);
1940exit:
1941 return err;
1942}
1943
1944static void w83793_update_nonvolatile(struct device *dev)
1945{
1946 struct i2c_client *client = to_i2c_client(dev);
1947 struct w83793_data *data = i2c_get_clientdata(client);
1948 int i, j;
1949 /*
47efe877
GR		 1950 * They are somewhat "stable" registers, and to update them every time
1951 * takes so much time, it's just not worthy. Update them in a long
1952 * interval to avoid exception.
6800c3d0
RM		 1953 */
1954 if (!(time_after(jiffies, data->last_nonvolatile + HZ * 300)
1955 || !data->valid))
1956 return;
1957 /* update voltage limits */
1958 for (i = 1; i < 3; i++) {
1959 for (j = 0; j < ARRAY_SIZE(data->in); j++) {
1960 data->in[j][i] =
1961 w83793_read_value(client, W83793_REG_IN[j][i]);
1962 }
1963 data->in_low_bits[i] =
1964 w83793_read_value(client, W83793_REG_IN_LOW_BITS[i]);
1965 }
1966
1967 for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
1968 /* Update the Fan measured value and limits */
47efe877 1969 if (!(data->has_fan & (1 << i)))
6800c3d0 1970 continue;
6800c3d0
RM		 1971 data->fan_min[i] =
1972 w83793_read_value(client, W83793_REG_FAN_MIN(i)) << 8;
1973 data->fan_min[i] |=
1974 w83793_read_value(client, W83793_REG_FAN_MIN(i) + 1);
1975 }
1976
1977 for (i = 0; i < ARRAY_SIZE(data->temp_fan_map); i++) {
46bed4df
GJ		 1978 if (!(data->has_temp & (1 << i)))
1979 continue;
6800c3d0
RM		 1980 data->temp_fan_map[i] =
1981 w83793_read_value(client, W83793_REG_TEMP_FAN_MAP(i));
1982 for (j = 1; j < 5; j++) {
1983 data->temp[i][j] =
1984 w83793_read_value(client, W83793_REG_TEMP[i][j]);
1985 }
1986 data->temp_cruise[i] =
1987 w83793_read_value(client, W83793_REG_TEMP_CRUISE(i));
1988 for (j = 0; j < 7; j++) {
1989 data->sf2_pwm[i][j] =
1990 w83793_read_value(client, W83793_REG_SF2_PWM(i, j));
1991 data->sf2_temp[i][j] =
1992 w83793_read_value(client,
1993 W83793_REG_SF2_TEMP(i, j));
1994 }
1995 }
1996
1997 for (i = 0; i < ARRAY_SIZE(data->temp_mode); i++)
1998 data->temp_mode[i] =
1999 w83793_read_value(client, W83793_REG_TEMP_MODE[i]);
2000
2001 for (i = 0; i < ARRAY_SIZE(data->tolerance); i++) {
2002 data->tolerance[i] =
2003 w83793_read_value(client, W83793_REG_TEMP_TOL(i));
2004 }
2005
2006 for (i = 0; i < ARRAY_SIZE(data->pwm); i++) {
2007 if (!(data->has_pwm & (1 << i)))
2008 continue;
2009 data->pwm[i][PWM_NONSTOP] =
2010 w83793_read_value(client, W83793_REG_PWM(i, PWM_NONSTOP));
2011 data->pwm[i][PWM_START] =
2012 w83793_read_value(client, W83793_REG_PWM(i, PWM_START));
2013 data->pwm_stop_time[i] =
2014 w83793_read_value(client, W83793_REG_PWM_STOP_TIME(i));
2015 }
2016
2017 data->pwm_default = w83793_read_value(client, W83793_REG_PWM_DEFAULT);
2018 data->pwm_enable = w83793_read_value(client, W83793_REG_PWM_ENABLE);
2019 data->pwm_uptime = w83793_read_value(client, W83793_REG_PWM_UPTIME);
2020 data->pwm_downtime = w83793_read_value(client, W83793_REG_PWM_DOWNTIME);
2021 data->temp_critical =
2022 w83793_read_value(client, W83793_REG_TEMP_CRITICAL);
2023 data->beep_enable = w83793_read_value(client, W83793_REG_OVT_BEEP);
2024
47efe877 2025 for (i = 0; i < ARRAY_SIZE(data->beeps); i++)
6800c3d0 2026 data->beeps[i] = w83793_read_value(client, W83793_REG_BEEP(i));
6800c3d0
RM		 2027
2028 data->last_nonvolatile = jiffies;
2029}
2030
2031static struct w83793_data *w83793_update_device(struct device *dev)
2032{
2033 struct i2c_client *client = to_i2c_client(dev);
2034 struct w83793_data *data = i2c_get_clientdata(client);
2035 int i;
2036
2037 mutex_lock(&data->update_lock);
2038
2039 if (!(time_after(jiffies, data->last_updated + HZ * 2)
2040 || !data->valid))
2041 goto END;
2042
2043 /* Update the voltages measured value and limits */
2044 for (i = 0; i < ARRAY_SIZE(data->in); i++)
2045 data->in[i][IN_READ] =
2046 w83793_read_value(client, W83793_REG_IN[i][IN_READ]);
2047
2048 data->in_low_bits[IN_READ] =
2049 w83793_read_value(client, W83793_REG_IN_LOW_BITS[IN_READ]);
2050
2051 for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
47efe877 2052 if (!(data->has_fan & (1 << i)))
6800c3d0 2053 continue;
6800c3d0
RM		 2054 data->fan[i] =
2055 w83793_read_value(client, W83793_REG_FAN(i)) << 8;
2056 data->fan[i] |=
2057 w83793_read_value(client, W83793_REG_FAN(i) + 1);
2058 }
2059
46bed4df
GJ		 2060 for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
2061 if (!(data->has_temp & (1 << i)))
2062 continue;
6800c3d0
RM		 2063 data->temp[i][TEMP_READ] =
2064 w83793_read_value(client, W83793_REG_TEMP[i][TEMP_READ]);
46bed4df 2065 }
6800c3d0
RM		 2066
2067 data->temp_low_bits =
2068 w83793_read_value(client, W83793_REG_TEMP_LOW_BITS);
2069
2070 for (i = 0; i < ARRAY_SIZE(data->pwm); i++) {
2071 if (data->has_pwm & (1 << i))
2072 data->pwm[i][PWM_DUTY] =
2073 w83793_read_value(client,
2074 W83793_REG_PWM(i, PWM_DUTY));
2075 }
2076
2077 for (i = 0; i < ARRAY_SIZE(data->alarms); i++)
2078 data->alarms[i] =
2079 w83793_read_value(client, W83793_REG_ALARM(i));
c70a8c34
GJ		 2080 if (data->has_vid & 0x01)
2081 data->vid[0] = w83793_read_value(client, W83793_REG_VID_INA);
2082 if (data->has_vid & 0x02)
2083 data->vid[1] = w83793_read_value(client, W83793_REG_VID_INB);
6800c3d0
RM		 2084 w83793_update_nonvolatile(dev);
2085 data->last_updated = jiffies;
2086 data->valid = 1;
2087
2088END:
2089 mutex_unlock(&data->update_lock);
2090 return data;
2091}
2092
47efe877
GR		 2093/*
2094 * Ignore the possibility that somebody change bank outside the driver
2095 * Must be called with data->update_lock held, except during initialization
2096 */
6800c3d0
RM		 2097static u8 w83793_read_value(struct i2c_client *client, u16 reg)
2098{
2099 struct w83793_data *data = i2c_get_clientdata(client);
58a24b52 2100 u8 res;
6800c3d0
RM		 2101 u8 new_bank = reg >> 8;
2102
2103 new_bank |= data->bank & 0xfc;
2104 if (data->bank != new_bank) {
2105 if (i2c_smbus_write_byte_data
2106 (client, W83793_REG_BANKSEL, new_bank) >= 0)
2107 data->bank = new_bank;
2108 else {
2109 dev_err(&client->dev,
2110 "set bank to %d failed, fall back "
2111 "to bank %d, read reg 0x%x error\n",
2112 new_bank, data->bank, reg);
2113 res = 0x0; /* read 0x0 from the chip */
2114 goto END;
2115 }
2116 }
2117 res = i2c_smbus_read_byte_data(client, reg & 0xff);
2118END:
2119 return res;
2120}
2121
2122/* Must be called with data->update_lock held, except during initialization */
2123static int w83793_write_value(struct i2c_client *client, u16 reg, u8 value)
2124{
2125 struct w83793_data *data = i2c_get_clientdata(client);
2126 int res;
2127 u8 new_bank = reg >> 8;
2128
2129 new_bank |= data->bank & 0xfc;
2130 if (data->bank != new_bank) {
47efe877
GR		 2131 res = i2c_smbus_write_byte_data(client, W83793_REG_BANKSEL,
2132 new_bank);
2133 if (res < 0) {
6800c3d0
RM		 2134 dev_err(&client->dev,
2135 "set bank to %d failed, fall back "
2136 "to bank %d, write reg 0x%x error\n",
2137 new_bank, data->bank, reg);
2138 goto END;
2139 }
47efe877 2140 data->bank = new_bank;
6800c3d0
RM		 2141 }
2142
2143 res = i2c_smbus_write_byte_data(client, reg & 0xff, value);
2144END:
2145 return res;
2146}
2147
f0967eea 2148module_i2c_driver(w83793_driver);
6800c3d0 2149
5852f960 2150MODULE_AUTHOR("Yuan Mu, Sven Anders");
6800c3d0
RM		 2151MODULE_DESCRIPTION("w83793 driver");
2152MODULE_LICENSE("GPL");
Ubuntu Jammy Linux kernel mirror